Commit Graph

33966 Commits

Author SHA1 Message Date
Bin Meng aedefb6f79 x86: qemu: Convert to use driver model pci
Move to driver model for pci on QEMU.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:23 -08:00
Bin Meng 487485956b x86: qemu: Move chipset-specific codes from pci.c to qemu.c
Move chipset-specific codes such as PAM init, PCIe ECAM and MP table
from pci.c to qemu.c, to prepare for DM PCI conversion.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:22 -08:00
Bin Meng 20cbafa6fa x86: qemu: Remove call to vgabios execution
The call to pci_run_vga_bios() is not needed as this is handled
in the vesa_fb driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:21 -08:00
Bin Meng 643b0f75e7 x86: Move timer_init() call a bit earlier
Currently timer_init() is called in board_r.c which is quite late.
Some vgabios execution requires we set up the i8254 timer correctly,
but video initialization comes before timer_init(). Move the call
to board_f.c.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:20 -08:00
Bin Meng e5ffa4bb62 x86: queensbay: Really disable IGD
According to Atom E6xx datasheet, setting VGA Disable (bit17)
of Graphics Controller register (offset 0x50) prevents IGD
(D2:F0) from reporting itself as a VGA display controller
class in the PCI configuration space, and should also prevent
it from responding to VGA legacy memory range and I/O addresses.

However test result shows that with just VGA Disable bit set and
a PCIe graphics card connected to one of the PCIe controllers on
the E6xx, accessing the VGA legacy space still causes system hang.
After a number of attempts, it turns out besides VGA Disable bit,
the SDVO (D3:F0) device should be disabled to make it work.

To simplify, use the Function Disable register (offset 0xc4)
to disable both IGD (D2:F0) and SDVO (D3:F0) devices. Now these
two devices will be completely disabled (invisible in the PCI
configuration space) unless a system reset is performed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:20 -08:00
Bin Meng 1eb39a5093 x86: Move CONFIG_8259_PIC and CONFIG_8254_TIMER to Kconfig
Add Kconfig options for 8259 and 8254.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:19 -08:00
Bin Meng da3fe24759 x86: Rename pcat_ to i8254 and i8259 accordingly
Rename pcat_timer.c to i8254.c and pcat_interrupts.c to i8259.c,
to match their header file names (i8254.h and i8259.h).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:18 -08:00
Bin Meng bffeed0158 x86: Initialize i8254 timer counter 1
Initialize counter 1, used to refresh request signal. This is
required for legacy purpose as some codes like vgabios utilizes
counter 1 to provide delay functionality.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:18 -08:00
Bin Meng 0a2ea02068 x86: Fix cosmetic issues in the i8254 and i8259 codes
This cleans up i8254 and i8259 codes to fix several cosmetic
issues, like coding convention and some comments improvement.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:17 -08:00
Bin Meng 360c3013c8 x86: Remove dead codes wrapped by PARANOID_IRQ_TRIGGERS
PARANOID_IRQ_TRIGGERS is not referenced anywhere in U-Boot.
Remove these dead codes wrapped by it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:16 -08:00
Bin Meng 6c5052716e x86: Rename CONFIG_SYS_NUM_IRQS to SYS_NUM_IRQS
CONFIG_SYS_NUM_IRQS is actually not something we can configure,
but an architecture defined number of ISA IRQs. Move it from
x86-common.h to asm/interrupt.h and rename it to SYS_NUM_IRQS.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-13 06:46:16 -08:00
Stefano Babic 3d99e86269 imx6: fix warnings due to switch to distro environment
wandboard and mx6cuboxi have warnings because BOOT_DELAY
is defined twice.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Vagrant Cascadian <vagrant@debian.org>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2015-11-13 10:49:01 +01:00
Francois Retief e43ce3fca7 sparc: leon3: Add debug_uart support to LEON3 serial driver.
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-11-13 10:23:33 +02:00
Daniel Hellstrom 5786071e4a sparc: ambapp: Removed warning and unnecessary printout.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-11-13 10:23:33 +02:00
Daniel Hellstrom f2879f5952 sparc: leon3: Moved GRLIB core header files to common include/grlib directory
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-11-13 10:23:33 +02:00
Daniel Hellstrom cff009ed6f sparc: leon3: Added memory controller initialization using new AMBA PnP routines.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-11-13 10:23:33 +02:00
Francois Retief 3f33f6a28b sparc: Kconfig: Move the CMD_AMBAPP command to Kconfig
Add an initr function in the board_r.c file for the AMBA Plug&Play
command. Add a Kconfig entry for the ambapp command and remove all
CONFIG_CMD_AMBAPP defines from the board configuration headers.

Add a Kconfig entry to display the AMBA Plug&Play information
on startup. This option is off by default. Remove relevent define
from board configuration headers.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-11-13 10:23:32 +02:00
Daniel Hellstrom 898cc81da3 sparc: leon3: Reimplemented AMBA Plug&Play scanning routines.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-11-13 10:23:32 +02:00
Francois Retief 0070109f68 sparc: Update startup code to take PIC mode into account
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-11-13 10:23:32 +02:00
Francois Retief b6b280ce07 sparc: Update GRSIM board with memory settings for TSIM eval
Update the GRSIM board with the memory settings for the evaluation
version of TSIM. This free version of TSIM is used for testing.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-11-13 10:23:32 +02:00
Francois Retief a50adb7b4d sparc: Update LEON serial drivers to use readl/writel macros
Update the LEON2/3 serial driver to make use of the readl and writel
macros as well as the WATCHDOG_RESET() macro.

Add readl/writel and friends to the asm/io.h file.

Introduce the gd->arch.uart variable to store register address.

Lastly, remove baudrate scaler macro variables from board config. It
is now calculated in the serial driver using the global data variable.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-11-13 10:23:32 +02:00
Francois Retief c33759aebd sparc: Add -mcpu= compiler flags for LEON2/LEON3
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-11-13 10:23:32 +02:00
Francois Retief fdf075fbee sparc: Update the maintainer for SPARC architecture
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-11-13 10:23:32 +02:00
Francois Retief 72bcbd4bfb sparc: Fix broken files during license changes
Fixes broken search and replaced license changes in
files cpu/leon3/start.S and include/asm/winmacro.h
from commit 1a4596601f

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

Series-to: u-boot
Series-cc: Tom Rini <trini@konsulko.com>
Series-version: 2
Cover-letter:
sparc: Updates to SPARC architecture in preperation for generic board

This patch series is a backlog of preparation work for upcomming
generic board changes.

I first want to get these reviewed and submitted to mainline before
sending out more patches.
END
2015-11-13 10:22:49 +02:00
Fabio Estevam 9ac4fc8207 board_init: Change the logic to setup malloc_base
Prior to commit 5ba534d247 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.

Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.

In board_init_f_mem() there was a deliberate choice to support only
early malloc() or full malloc() in SPL, but not both.

Adapt this logic to allow both to be used, one after the other, in SPL.

This issue has been observed in a Congatec board, where we need to
retrieve the manufacturing information from the SPI NOR (the SPI API
calls malloc) prior to configuring the DRAM. In this case as malloc_base
was not configured we always see malloc to fail.

With this change we are able to use malloc in SPL prior to DRAM gets
initialized.

Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-12 20:34:07 -05:00
Tom Rini bc80109b11 Merge branch 'master' of git://git.denx.de/u-boot-tegra 2015-11-12 19:32:51 -05:00
Vignesh R 42d1b818a8 am43xx_evm: Add DFU support for qspi flash
This adds support to update firmware on qspi flash present on
am437x-sk-evm and am43xx-epos-evm via DFU.

On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0

On host:
$ sudo dfu-util -l
$ sudo dfu-util -D u-boot.bin -a u-boot.bin

Signed-off-by: Vignesh R <vigneshr@ti.com>
2015-11-12 18:13:21 -05:00
Michal Simek 8d7a2b83f9 spl: Add support for CONFIG_OF_EMBED=y
CONFIG_OF_EMBED=y is the option which is here only for testing purpose
and shouldn't be enabled by default as is describe at:
"dts: Add a comment about CONFIG_OF_EMBED being for local use"
(sha1: 3d3f60cb7a)

But still enabling this option locally shouldn't end up with compilation
error when you build SPL. This patch fix it.

Compilation error:
lib/built-in.o: In function `fdtdec_setup':
/mnt/disk/u-boot/lib/fdtdec.c:1246: undefined reference to
`__dtb_dt_begin'

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-12 18:13:21 -05:00
Guillaume REMBERT 87da2690ab openrisc: updating build tools naming convention
Dear u-boot community,

I just made a small change on the openrisc-generic platform
configuration to take in account the new naming convention (or1k instead
of or32, so the build process gets fine).

Could you take care to review and approve the following patch, please?

Kind regards,
2015-11-12 18:13:20 -05:00
Andy Fleming ca746f044e Fix trini email in the get_maintainer.pl script
Looks like one spot got missed. Probably due to the backslash.

Signed-off-by: Andy Fleming <afleming@gmail.com>
2015-11-12 18:13:20 -05:00
Vincent BENOIT 5ea667ea2f pengwyn: nand and ethernet fixes
-> Add National instrument ethernet transceiver configuration used (DP83848)
-> Change cpsw slave phy address
-> modify nand configuration to use the correct ECC and correct nand features
2015-11-12 18:13:19 -05:00
Fabio Estevam 4408248146 block: ahci: Remove dead code
CONFIG_AHCI_SETFEATURES_XFER is not selected by any user, so delete
the dead code.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 18:13:19 -05:00
Peng Fan 7664846bbb common: Simplify get_clocks() #ifdef
get_clocks is wrapped by CONFIG_FSL_CLK and CONFIG_M68K in seperate
piece code. They can be merged into one snippet.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: "angelo@sysam.it" <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: "Andreas Bießmann" <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
2015-11-12 18:13:19 -05:00
Matwey V. Kornilov 755324c432 configs: Use config_distro_defaults.h in ti_armv7_common.h
CONFIG_BOOTDELAY is defined in config_distro_defaults.h

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
[trini: Drop omap3_logic.h settings which were a warning and no longer
        correct usage].
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-12 18:12:56 -05:00
Dirk Eibach daa75b3482 i2c: Fix pca953x endianess issue
By reading 2 consecutive bytes from i2c to an u16 value
we have an endianess issue.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:12 -05:00
Dirk Eibach 37b33254c2 i2c: soft_i2c: Fix bus indizes
Since busses are sorted in alphabetical order, introducing more
than nine busses led to unexpected behaviour.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:12 -05:00
Dirk Eibach acff73fda0 board: gdsys: Enable osd on output only
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:11 -05:00
Dirk Eibach da4833c7bf board: gdsys: Add osdsize command
osdsize adjusts the gdsys IHS osd dimensions in characters.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:11 -05:00
Dirk Eibach 5c3b6dc1fb hrcon: Add fan controllers
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:10 -05:00
Dirk Eibach 7ed45d3d0a hrcon: Add support for the DH variant
hrcon DH(dual head) has two video outputs per FPGA.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:10 -05:00
Dirk Eibach b847f5b622 hrcon: Fix videoboard i2c setup
- i2c addresses for the videoboard port expanders were
  wrong.
- the fpga reset signal was not initialized.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:09 -05:00
Dirk Eibach d4e5888801 hrcon: Use generic ioep-fpga support
The strider platform moved some generic code into ioep-fpga.c.
Make use of that on hrcon platform.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 18:04:09 -05:00
Dirk Eibach a3f9d6c779 mpc83xx: Add strider board
The gdsys strider board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x 10/100 Mbit/s Ethernet (optional)
- Lattice ECP3 FPGA connected via eLBC

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
[trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-12 18:03:48 -05:00
Dirk Eibach 51b96fc67c hrcon: Remove CH7301 configuration
hrcon has no CH7301 DVI-transmitter.
Probably not removed when copying from iocon.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 15:59:05 -05:00
Reinhard Pfau 57b84a0d5a iocon: reset FPGAs in last_stage_init()
- Reset FPGAs in last_stage_init()

Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 15:59:05 -05:00
Dirk Eibach 1c7639ae8a controlcenterd: Disable sideband clocks
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 15:59:04 -05:00
Dirk Eibach e1d1127a9a dlvision-10g: Support displayport
Support dlvision-10g hardware with displayport output.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 15:59:04 -05:00
Dirk Eibach d054c2f8c6 board: gdsys: Consider DP501 limits on link training
DP501 only supports DP 1.1a.
Limit settings for link bandwidth and lane count to
values allowed by DP 1.1a.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-11-12 15:59:03 -05:00
Dirk Eibach 2302fd32a5 board: gdsys: Increase DP501 I2C retry interval
With Club 3D dual link adapter there are AUX-channel timeouts
when EDID is read. Increasing retry interval time to max (400us)
fixes this.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-12 15:59:03 -05:00
Dirk Eibach 0caad193cd board: gdsys: Configure DP501 SPDIF input
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-12 15:59:02 -05:00