Commit Graph

14 Commits

Author SHA1 Message Date
Stephen Warren 930c514d47 ARM: tegra: expand all SPL sizes to be consistent
The size allocation for SPL is increased in all cases to match the
already-expanded value used on Tegra124. This is both for general
consistency, and because the seaboard build trips over the limit already
when using one of the ARM compilers packaged with 14.04. For the record,
when building Seaboard:

arm-linux-gnueabi- SPL is too big by 0x36 bytes
arm-linux-gnueabihf- SPL fits by 0x2a bytes
arm-none-eabi- SPL fits by 0xa bytes

(Those figures are from builds with the expanded SPL size allocation,
relative to the non-expanded SPL size limit; they're better by about
6 bytes in the more constrained build.)

Fixes: ba52199422 ("tegra124: Expand SPL space by 8KB")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-10-02 11:05:30 -07:00
Stephen Warren 48cfca240d ARM: tegra: CONFIG_{SYS_, }LOAD{_, }ADDR rationalization
As best I can tell, CONFIG_SYS_LOAD_ADDR and CONFIG_LOADADDR/$loadaddr
serve essentially the same purpose. Roughly, if a command takes a load
address, then CONFIG_SYS_LOAD_ADDR or $loadaddr (or both) are the default
if the command-line does not specify the address. Different U-Boot
commands are inconsistent re: which of the two default values they use.
As such, set the two to the same value, and move the logic that does this
 into tegra-common-post.h so it's not duplicated. A number of other non-
Tegra boards do this too.

The values chosen for these macros are no longer consistent with anything
in MEM_LAYOUT_ENV_SETTINGS. Regain consistency by setting $kernel_addr_r
to CONFIG_LOADADDR. Older scripts tend to use $loadaddr for the default
kernel load address, whereas newer scripts and features tend to use
$kernel_addr_r, along with other variables for other purposes such as
DTBs and initrds. Hence, it's logical they should share the same value.

I had originally thought to make the $kernel_addr_r and CONFIG_LOADADDR
have different values. This would guarantee no interference if a script
used the two variables for different purposes. However, that scenario is
unlikely given the semantic meaning associated with the two variables.
The lowest available value is 0x90200000; see comments for
MEM_LAYOUT_ENV_SETTINGS in tegra30-common-post.h for details. However,
that value would be problematic for a script that loaded a raw zImage to
$loadaddr, since it's more than 128MB beyond the start of SDRAM, which
would interfere with the kernel's CONFIG_AUTO_ZRELADDR. So, let's not do
that.

The only potential fallout I could foresee from this patch is if someone
has a script that loads the kernel to $loadaddr, but some other file
(DTB, initrd) to a hard-coded address that the new value of $loadaddr
interferes with. This seems unlikely. A user should not do that; they
should either hard-code all load addresses, or use U-Boot-supplied
variables for all load addresses. Equally, any fallout due to this change
is trivial to fix; simply modify the load addresses in that script.

Cc: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Paul Walmsley <pwalmsley@nvidia.com>
Reviewed-by: Simon Glass
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13 09:24:12 -07:00
Simon Glass b0e6ef4640 dm: i2c: tegra: Convert to driver model
This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:

   - CONFIG_SYS_I2C_INIT_BOARD
   - CONFIG_I2C_MULTI_BUS
   - CONFIG_SYS_MAX_I2C_BUS
   - CONFIG_SYS_I2C_SPEED
   - CONFIG_SYS_I2C

This has been tested on:
- trimslice (no I2C)
- beaver
- Jetson-TK1

It has not been tested on Tegra 114 as I don't have that board.

Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-11 13:18:44 -07:00
Stephen Warren f940c72e16 ARM: tegra: implement bootcmd_pxe
This retrieves a PXE config file over the network, and executes it. This
allows an extlinux config file  to be retrieved over the network and
executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-05 16:59:08 -07:00
Stephen Warren f75dc784fc ARM: tegra: set CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
Tegra's EHCI controllers only have a single PORTSC register. Configure
U-Boot to know this. This prevents e.g. ehci_shutdown() from touching
non-existent registers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-05 16:59:08 -07:00
Stephen Warren cd7efc2a94 ARM: tegra: move CONFIG_TEGRAnn
<asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize
some definitions, since some modules moved between generations. Move
the definition of CONFIG_TEGRAnn to a header that's included earlier,
so that it's set by the time tegra.h needs to use it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-05 16:59:07 -07:00
Jim Lin 81d21e98b0 ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"
Fix the timeout issue after running "bootp" command in u-boot
console. For example you see "EHCI timed out on TD- token=0x...".
TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10
after a controller reset and before RUN bit is set
(per technical reference manual).

Signed-off-by: Jim Lin <jilin@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-12-18 10:19:48 -07:00
Thierry Reding 0d79f4f490 ARM: tegra: Make cache line size SoC specific
Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
therefore uses a cache line size of 64 bytes. Move the cache line size
setting to the per-SoC common configuration file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-08-19 15:31:37 -07:00
Wolfgang Denk 1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Jim Lin d6cf707e81 Tegra: Config: Enable Tegra30/Tegra114 USB function
Add USB EHCI, storage and network support.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11 14:15:16 -07:00
Tom Warren d56273de15 Tegra: Remove unused/non-existent spl linker script reference
Tegra builds use the common u-boot-spl.lds now.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 12:58:42 -07:00
Stephen Warren c44bb3a30f ARM: tegra: enable some CPU errata workarounds
Tegra20 has a Cortex A9 r1p1, and Tegra30 has a Cortex A9 r2p9. As such,
some CPU errata exist, and must be worked around.

These must be worked around in the bootloader, since in general, the
kernel (especially a multi-platform kernel) needs to support being
launched in non-secure mode (normal world), and hence may not be able
to write to the CP15 register to enable these workarounds.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 22:24:14 +01:00
Tom Warren bb1e7cde62 Tegra30: I2C: Enable I2C driver on Cardhu
Tested all 5 'buses', i2c probe enumerates device addresses on all
but dev 4 (I2C4) [no devices on that bus on my Cardhu].

Note that this uses the extant tegra_i2c.c driver w/o modification.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren f01b631f7d Tegra30: Add/enable Cardhu build (T30 reference board)
This build is stripped down. It boots to the command prompt.
GPIO is the only peripheral supported. Others TBD.

include/configs/tegra-common.h now holds common config options
for Tegra SoCs.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-01-16 13:40:08 -07:00