4 commits

Author	SHA1	Message	Date
Allen Martin	c98f03fae0	tegra20: fdt: add SPI SFLASH node ... Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>	2013-02-11 10:35:24 -07:00
Allen Martin	d3f8752ed6	tegra: fdt: remove clocks nodes ... These nodes are unused. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>	2013-01-17 09:07:23 -07:00
Stephen Warren	7155dc97f6	ARM: tegra: TrimSlice: add support for USB1 port ... TrimSlice's USB1 port has two purposes; it either acts as a device port hosting Tegra's USB recovery protocol, or acts as a host port connected to the internal USB->SATA bridge chip, which may in turn be connected to an SSD or HDD. Add the appropriate device tree and board configuration options to enable this port as a host port, and route the port to the SATA bridge using the VBUS GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>	2012-11-19 08:15:41 -07:00
Allen Martin	00a2749d7b	tegra20: rename tegra2 -> tegra20 ... This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>	2012-09-01 14:58:21 +02:00

Renamed from board/compulab/dts/tegra2-trimslice.dts (Browse further)