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12 commits

Author SHA1 Message Date
Ilya Ledvich
ef59bb7cc8 drivers: net: cpsw: init phy with gigabit features
CPSW ia a gigabit device. Use the PHY_GBIT_FEATURES macro to determine phy
supported features.
Tested on cm_t335.

Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
2014-03-12 16:22:12 -04:00
Mugunthan V N
9c653aad16 drivers: net: cpsw: add support to have phy address from cpsw platform data
Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards]
Signed-off-by: Tom Rini <trini@ti.com>
2014-03-04 09:41:53 -05:00
Vladimir Koutny
74007b8519 am335x: cpsw: optimize cpsw_recv to increase network performance
In 48ec5291, only TX path was optimized; this does the same also for RX
path. This results in huge increase of TFTP throughput on custom am3352
board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer
timeouts.

Signed-off-by: Vladimir Koutny <vladimir.koutny@streamunlimited.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Tom Rini <trini@ti.com>
2013-12-04 11:41:13 -05:00
Heiko Schocher
93ff255298 net, phy, cpsw: fix NULL pointer deference
if phy_connect() did not find a phy, phydev is NULL and
following code in cpsw_phy_init() crashes. Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-09-20 16:57:40 -04:00
Heiko Schocher
f6d1f6e4a5 net, phy, cpsw: fix gigabit register access
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30 09:21:42 -04:00
Mugunthan V N
454ac63525 drivers: net: cpsw: Enable statistics for all port
Enable hardware statistics for all ports, enabling only to host port is useless

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
2bf36ac638 drivers: net: cpsw: remove hard coding bd ram for cpsw
BD ram address may vary in various SOC, so removing the hardcoding and
passing the same information through platform data

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Matt Porter
f6f86a64ac cpsw: add support for TI814x slave_regs differences
TI814x's version 1 CPSW has a different slave_regs layout.
Add support for the differing registers.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-05-10 08:25:54 -04:00
Tom Rini
98f92001b3 am33xx: Add required includes to some omap/am33xx code
- In arch/arm/cpu/armv7/omap-common/timer.c,
  drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files
  that the driver needs but had been relying on <config.h> to bring in.
- In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h>
- In am335x_evm.h and pcm051.h don't globally include
  <asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h>
  as that is the only include which defines things the config uses.

Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
2013-03-24 12:49:11 -04:00
Mugunthan V N
48ec529100 am335x: cpsw: optimize cpsw_send to increase network performance
Before submitting packets to cpdma, phy status is updated on every packet
which leads to delay in packet send intern reduces the Ethernet performance.
Checking mdio status for each packet will reduce timetaken to send a packet
and there by increasing the Ethernet performance. With this the performance
is increased from 208KiB/s to 375KiB/s on EVMsk

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-03-11 11:06:09 -04:00
Yegor Yefremov
cdd0729ead am335x: cpsw: make phy address configurable
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2012-12-10 08:56:38 -07:00
Cyril Chemparathy
2b62997ce9 cpsw: add driver for cpsw ethernet device
CPSW is an on-chip ethernet switch that is found on various SoCs from Texas
Instruments.  This patch adds a simple driver (based on the Linux driver) for
this hardware module.

This patch also adds support to clean and flush dcache during packet send
and receive.

Changes by Sandhya: Added support to clean and flush dcache during packet
		    send/receive and added timeouts.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
[Ilya: Cleaned cache handling, some style cleanup, some small
fixes, use of internal RAM for descriptors]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01 14:58:10 +02:00