Commit graph

47 commits

Author SHA1 Message Date
Sergey Kostanbaev
7237d22baa arm: ep9315: Return back Cirrus Logic EDB9315A board support
This patch returns back support for old ep93xx processors family

Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com>
Cc: albert.u.boot@aribaud.net
2014-07-04 23:45:48 +02:00
Alison Wang
6b57ff6fd5 arm: vf610: Add QSPI driver support
Add Freescale QSPI driver support for VF610.

Signed-off-by: Alison Wang <Huan.Wang@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
2014-06-09 09:18:09 +02:00
Kuo-Jung Su
66cb9eb1d6 spi: Add Faraday SPI controller support
The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF. However This
patch implements only the SPI mode.

NOTE:
The DMA and CS/Clock control logic has been altered
since hardware revision 1.19.0. So this patch
would first detects the revision id of the underlying
chip, and then switch to the corresponding software
control routines.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
CC: Tom Rini <trini@ti.com>
2014-01-11 12:21:30 +05:30
Nobuhiro Iwamatsu
16f47c9c51 spi: Add support SH Quad SPI driver
This patch adds a driver for Renesas SoC's Quad SPI bus.
This supports with 8 bits per transfer to use with SPI flash.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-12-18 23:23:41 +05:30
Mike Frysinger
6122813fa2 sandbox: spi: Add SPI emulation bus
This adds a SPI framework for people to hook up simulated SPI clients.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-12-09 12:22:18 -07:00
Masahiro Yamada
710f1d3d5f drivers: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-31 13:26:01 -04:00
Matt Porter
1d0933eaf9 spi: add TI QSPI driver
Adds a SPI master driver for the TI QSPI peripheral.
- Added quad read support.
- Added memory mapped support.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:51 +05:30
Jagannadha Sutradharudu Teki
1465d055f9 spi: Add zynq spi controller driver
Zynq spi controller driver supports 2 buses and
3 chipselects on each bus.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-08-07 01:09:47 +05:30
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Albert ARIBAUD
009d75ccc1 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	drivers/spi/tegra20_sflash.c
	include/fdtdec.h
	lib/fdtdec.c
2013-03-28 18:50:01 +01:00
Allen Martin
77c42e80b9 tegra114: add SPI driver
Add driver for tegra114 SPI controller.  This controller is not
compatible with either the tegra20 or tegra30 controllers, so it
requires a new driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
78f47b7353 spi: add common fdt SPI driver interface
Add a common interface to fdt based SPI drivers.  Each driver is
represented by a table entry in fdt_spi_drivers[].  If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
ff1da6fb5f tegra: spi: rename tegra SPI drivers
Rename tegra SPI drivers to tegra20_flash and tegra20_slink in
preparation for commonization and addition of tegra114_spi.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:05 -07:00
Simon Glass
1853030e21 x86: spi: Add Intel ICH driver
This supports Intel ICH7/9. The Intel controller is a little unusual in
that it is mostly intended for use with SPI flash, and has some
optimisations and features specifically for that application. In
particular it is not possible to support ongoing transactions that
continue over many calls with SPI_XFER_BEGIN and SPI_XFER_END.

This driver supports writes of up to 64 bytes at a time, the limit
for the controller. Future work will improve this.

Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-03-19 08:45:36 -07:00
Simon Glass
ba6c3ce9bd spi: Add function to allocate a new SPI slave
At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-03-19 08:45:36 -07:00
Scott Jiang
4a207e8b9a blackfin: add bf6xx spi driver
Spi driver for bf60x is different from old one, so implement a new
driver for it.

Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
2013-03-04 13:42:07 +08:00
Allen Martin
b19f57491a tegra: add SPI SLINK driver
Add driver for tegra SPI "SLINK" style driver.  This controller is
similar to the tegra20 SPI "SFLASH" controller.  The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices.  In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH.  Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.

This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings.  Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.

To enable this driver, use CONFIG_TEGRA_SLINK

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:25 -07:00
Rajeshwari Shinde
1bf43b829e SPI: Add SPI Driver for EXYNOS.
This patch adds SPI driver for EXYNOS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: jy0922.shim@samsung.com
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-11-15 21:08:21 +09:00
Richard Retanubun
59d0612252 ColdFire: Queued SPI driver
This patch adds a driver for Freescale Colfire Queued SPI bus.
Coded to work with 8 bits per transfer to use with SPI flash.
CPOL, CPHA, and CS_ACTIVE_HIGH can be configured.

Tested with MCF5270 which have 4 chip selects.

Activate by #define CONFIG_CF_QSPI in board config.

Signed-off-by: Richard Retanubun <richardretanubun@ruggedcom.com>
2012-09-20 20:39:27 +08:00
Michal Simek
968766a7e8 spi: Fix merge conflicts - Makefile
The patch "spi: tegra2: rename tegra2_spi.* to tegra_spi.*"
(sha1: edffa63d3d)
renamed tegra2_spi.c to tegra_spi.c

and the patch "Merge branch 'master' of git://git.denx.de/u-boot-microblaze"
(sha1: d978780b2e)

has wrongly resolved confict.

This patch fix it.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-08-07 23:08:14 +02:00
Wolfgang Denk
d978780b2e Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
  microblaze: Wire up SPI driver
  spi: microblaze: Adds driver for Xilinx SPI controller
  microblaze: intc: Clear interrupt code
  microblaze: Call serial multi initialization
  microblaze: Move __udelay implementation
  microblaze: Remove extern from board.c
  microblaze: Wire up dts configuration
  fdt: Add board specific dts inclusion
  microblaze: Move individual board linker scripts to common script in cpu tree.
  microblaze: Add gpio.h
  microblaze: Add missing undefs for UBI and UBIFS
  microblaze: Expand and correct configuration comments
  microblaze: Enable ubi support
  microblaze: Avoid compile error on systems without cfi flash
  microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION

Conflicts:
	drivers/spi/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-31 22:01:08 +02:00
Stephan Linz
09aac75e4d spi: microblaze: Adds driver for Xilinx SPI controller
This is an improved version of the driver patch original
submitted by Graeme Smecher <graeme.smecher@mail.mcgill.ca>

The changes are:
    - remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
      use CONFIG_SYS_SPI_BASE from config.h instead
    - add extensive register struct definitions
    - remove offset calculation for register access and
      use the new register struct instead
    - move default SPI controller configuration from
      spi_setup_slave() to spi_claim_bus()
    - add spi_set_speed()
    - insert SPI controller deactivation in spi_release_bus()
    - protect while loops in spi_xfer() with counter / timeouts
    - support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP

Come from:
    http://patchwork.ozlabs.org/patch/71797/

Signed-off-by: Stephan Linz <linz@li-pro.net>
Tested-by: Michal Simek <monstr@monstr.eu>
2012-07-31 07:14:04 +02:00
Tom Warren
edffa63d3d spi: tegra2: rename tegra2_spi.* to tegra_spi.*
In anticipation of Tegra3 support, start removing/renaming
Tegra2-specific files. No functional changes (yet).
Also updated copyright to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
Tom Warren
9112ef8d89 tegra2: spi: Add SPI driver for Tegra2 SOC
This driver supports SPI on Tegra2, running at 48MHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-12-24 10:23:30 +01:00
Marek Vasut
ec33de3d12 iMX28: Add SPI driver
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-11-11 11:36:57 +01:00
Ajay Bhargav
51100cfcca SPI: Add SPI driver support for Marvell Armada100
This patch provides support for SPI emulated over SSP for Marvell
Armada100 SOC.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-10-27 21:56:32 +02:00
Macpaul Lin
fafc245401 andes_spi: add andes_spi interface
andes_spi is an spi interface developed by Andes Tech.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-25 23:40:11 +02:00
Wolfgang Denk
aeabdeb7a3 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-04-30 22:45:55 +02:00
Thomas Chou
dea6386b71 spi: add new driver for OpenCores tiny_spi
This patch adds support for OpenCores tiny_spi.

http://opencores.org/project,tiny_spi

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2011-04-30 20:58:36 +02:00
Mingkai Hu
273feafefd powerpc: eSPI and eSPI controller support
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Singed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:34:09 -05:00
Yoshihiro Shimoda
6639562e6a spi: add support SuperH SPI module
SH7757 has SPI module. This patch supports it.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02 16:38:41 +09:00
Dirk Behme
53736baaff OMAP3: SPI driver
CC: Ruslan N. Araslanov <byaaka@yandex.ru>
Signed-off-by: Ruslan Araslanov <ruslan.araslanov@vitecmm.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-12-11 11:01:00 -05:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Thomas Chou
661ba14051 spi: add altera spi controller support
This patch adds the driver of altera spi controller, which is
used as epcs/spi flash controller. It also works with mmc_spi
driver.

This driver support more than one spi bus, with base list declared
#define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-05-28 10:56:03 -04:00
Sekhar Nori
8ed5885693 TI DaVinci: Driver for the davinci SPI controller
This adds a driver for the SPI controller found on davinci
based SoCs from Texas Instruments.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-02-12 12:31:53 -06:00
TsiChung Liew
dec61c7851 Coldfire: Consolidate DSPI driver
Unify both MCF5227x and MCF5445x DSPI driver in CPU to
driver/spi folder for common use.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:46:09 -05:00
Wolfgang Denk
a48ecc969f Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	drivers/spi/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-07 22:22:05 +02:00
Prafulla Wadaskar
5710de4580 spi: Add Marvell Kirkwood SPI driver
This patch adds a SPI driver for the Marvell Kirkwood SoC's.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-26 00:59:09 +02:00
Grzegorz Bernacki
6325b7780d mpc52xx: Add SPI driver.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:01:38 +02:00
Jean-Christophe PLAGNIOL-VILLARD
4758ebdd53 at91: move dataflash spi driver to drivers/spi
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:22 +02:00
Mike Frysinger
400f5778f3 Blackfin: add driver for on-chip SPI controller
This fills out the SPI backend for the Blackfin on-chip SPI peripheral.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-02-02 12:24:30 -05:00
Jean-Christophe PLAGNIOL-VILLARD
e831403599 soft_spi: move to drivers/spi
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-29 12:25:02 +02:00
Ben Warren
f8cc312bbe Move conditional compilation of MPC8XXX SPI driver to Makefile
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-01 21:02:11 +02:00
Hans-Christian Egtvedt
60445cb5c3 atmel_spi: Driver for the Atmel SPI controller
This adds a driver for the SPI controller found on most AT91 and AVR32
chips, implementing the new SPI API.

Changed in v4:
  - Update to new API
  - Handle zero-length transfers appropriately. The user may send a
    zero-length SPI transfer with SPI_XFER_END set in order to
    deactivate the chip select after a series of transfers with chip
    select active. This is useful e.g. when polling the status
    register of DataFlash.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-03 20:30:05 +02:00
Guennadi Liakhovetski
38254f45b0 New i.MX31 SPI driver
This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
only implemented and tested on i.MX31, can with a modified register layout
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
controllers too.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-18 00:43:23 -07:00
Kim Phillips
2956acd5ef codingstyle cleanup for spi driver
..and rm unused CONFIG_FSL_SPI define

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-17 14:01:59 -06:00
Ben Warren
04a9e1180a Add support for a Freescale non-CPM SPI controller
This patch adds support for the SPI controller found on Freescale PowerPC
processors such as the MCP834x family.  Additionally, a new config option,
CONFIG_HARD_SPI, is added for general purpose SPI controller use.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-17 11:02:25 -06:00