Commit graph

30 commits

Author SHA1 Message Date
Tom Rini
aca5cd27db configs: Resync with savedefconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-09 09:51:28 -04:00
Heiko Stübner
9f862ec717 cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming
The rk3288 pinctrl is very specific to this soc, so should
not hog the generic rockchip naming.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:20 -06:00
Simon Glass
97feca3325 rockchip: Use of-platdata for firefly-rk3288
As an experiment, move this board over to use of-platdata. This means that
its SPL configuration will come from C structures generated at build-time
from the device tree, instead of coming from the device tree at run-time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Tom Rini
7802ce910b configs: Re-sync BOOTDELAY changes
With updated moveconfig.py and an better default, re-generate
the migration of BOOTDELAY to the defconfig.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-06-17 09:34:49 -04:00
Heiko Schocher
bb597c0eeb common: bootdelay: move CONFIG_BOOTDELAY into a Kconfig option
move CONFIG_BOOTDELAY into a Kconfig option. Used for this
purpose the moveconfig.py tool in tools.

Signed-off-by: Heiko Schocher <hs@denx.de>

Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2016-06-09 13:53:05 -04:00
Simon Glass
56d6977121 rockchip: Drop unnecessary SPL properties
While we consider whether to drop use of DT in SPL, remove some unwanted
properties. This reduces SPL size by about 250 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:07 -06:00
Stephen Warren
1163625898 Rename reset to sysreset
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:48:31 -06:00
Tom Rini
89cb2b5f8b configs: Re-sync with cmd/Kconfig
Update the config.h and defconfig files for the commands that 8e3c036
converted over to Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:09:47 -04:00
Tom Rini
78d1e1d0a1 configs: Re-sync almost all of cmd/Kconfig
This syncs up the current cmd/Kconfig and include/configs/ files with the
only exception being CMD_NAND.  Due to how we have used this historically
we need to take further care here when converting.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:09:40 -04:00
Tom Rini
adad96e60d configs: Re-sync HUSH options
Move all cases of CONFIG_SYS_HUSH_PARSER out of the config.h files.  Remove
all cases of CONFIG_SYS_PROMPT_HUSH_PS2 as everyone uses the default.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-25 14:22:43 -04:00
Bin Meng
6b33687995 defconfig: Reorder boards' defconfig files
Some boards' defconfig files are out of order. Clean this up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-03-22 12:16:31 -04:00
Simon Glass
73223f0e1b Kconfig: Move CONFIG_FIT and related options to Kconfig
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.

Move these options to Kconfig and tidy up board configuration:

   CONFIG_FIT
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_FIT_SIGNATURE
   CONFIG_FIT_BEST_MATCH
   CONFIG_FIT_VERBOSE
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_RSA

Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.

Note: Masahiro's moveconfig.py script is amazing.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-03-14 19:18:07 -04:00
Simon Glass
4edb9458b2 Correct defconfig ordering
Various boards have the wrong Kconfig ordering now. To avoid a misleading

diff in the next patch, reorder the configuration correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-14 14:21:27 -04:00
Simon Glass
c4a45d4bdd rockchip: Drop old CONFIG_VIDEO_ROTATION option
The option was renamed to CONFIG_CONSOLE_ROTATION and Rockchip boards
were not updated. However this option is is not needed by default for
Rockchip since we don't need a rotated console for current boards. So just
remove the old option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-06 14:17:11 +01:00
Anatolij Gustschin
7588c31252 video: add CONFIG_I2C_EDID and disable CONFIG_DISPLAY by default
Enabling CONFIG_DISPLAY breaks building for some architectures
(microblaze-generic), so we disable CONFIG_DISPLAY in Kconfig
by default and enable this option in defconfigs. CONFIG_DISPLAY
depends on CONFIG_I2C_EDID, so add and enable it in defconfigs, too.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-01-26 08:06:13 +01:00
Simon Glass
889b8a3147 rockchip: firefly-rk3288: Enable HDMI output
Enable HDMI output and a console on firefly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
7991809c98 rockchip: Disable simple-bus in SPL for firefly-rk3288, jerry
This is not needed for booting, so drop it from SPL to save about 300 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
9c56d6f71e rockchip: Move firefly and jerry to use the full pinctrl
Use the full pinctrl driver in U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
898d64395c rockchip: Use a separate clock ID for clocks
At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.

Update the clock drivers and the code that uses them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
ec4ac4e7c0 rockchip: Correct the defconfig order
This has got out of sequence somehow. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Sjoerd Simons
f4a8a1757b rockchip: firefly: Use tiny-printf
Switch to using tiny-printf for the firefly SPL, this reduces the SPL by
around 1800 bytes bringing it back under the 32k limit for both gcc 4.9
and gcc 5.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 17:07:31 -07:00
Sjoerd Simons
00ea76e800 rockchip: Explicitly set CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN
Now that u-boot relocates the malloc area in SPL to SDRAM, with the
malloc area sitting below the SPL_STACK_R_ADDR the
SPL_STACK_R_MALLOC_SIMPLE_LEN needs to be set explicitly for
rockchip as its SPL_STACK_R_ADDR (512kb) is smaller then
STACK_R_MALLOC_SIMPLE_LEN (1Mb).

Using the same value as SYS_MALLOC_F_LEN (8kb) is enough to load u-boot
from SD card.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
huang lin
41c7f664b9 dm: core: Add SPL Kconfig for REGMAP and SYSCON
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
Bin Meng
e5d5d4474a spi: Move SPI drivers to defconfig
There are already Kconfig options for SPI drivers, but we
have not moved them from config.h to defconfig files. This
commit does this in a batch.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-25 10:05:28 -05:00
Thomas Chou
9e39003e7f ns16550: move CONFIG_SYS_NS16550 to Kconfig
Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-21 21:50:18 -05:00
Ariel D'Alessandro
2b24e09c66 rockchip: Turn on CONFIG_DEBUG_UART_NS16550 in defconfigs
No UART driver was specified in defconfig, thus
DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
commit 220e8021af added a new Altera UART
driver.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19 17:06:25 -05:00
Thomas Chou
e4aa8edb6e common: add CMD_GPIO to Kconfig
Add CMD_GPIO to Kconfig and run tools/moveconfig.py .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-18 14:50:06 -05:00
Bin Meng
80df691349 Reorder defconfigs with 'savedefconfig'
Some boards' defconfigs are disordered. Reorder them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-09-28 09:06:13 -04:00
Sjoerd Simons
139230e722 rockchip: Turn off CONFIG_SPL_LED for firefly
With LED support enabled the SPL easily goes over the size limit (e.g.
with both Debians gcc 4.9 and 5.2 cross-compilers). Turn off LED support
in the SPL to reduce the size just enough for those compilers.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tweaked commit subject to remove _SUPPORT
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:25 -06:00
Simon Glass
17aa548ced rockchip: Add basic support for firefly-rk3288
The Firefly RK3288 is a suitable target board for initial mainline Rockchip
support. It includes a good set of peripherals, a recent SoC and it is
readily available.

This adds only some basic files required to allow the baord to display a
serial message in SPL and hang.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:24 -06:00