Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig
entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on
platforms with AEMIF controller.
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that we can properly boot EFI payloads from iso el torito
images, let's enable support for isos by default in the distro
header.
Signed-off-by: Alexander Graf <agraf@suse.de>
Whenever we want to tell our payload about a path, we limit ourselves
to a reasonable amount of characters. So far we only passed in device
names - exceeding 16 chars was unlikely there.
However by now we also pass real file path information, so let's increase
the limit to 32 characters. That way common paths like "boot/efi/bootaa64.efi"
fit just fine.
Signed-off-by: Alexander Graf <agraf@suse.de>
The payload gets information on where it got loaded from. This includes
the device as well as file path.
So far we've treated both as the same thing and always gave it the device
name. However, in some situations grub2 actually wants to find its loading
path to find its configuration file.
So let's split the two semantically separte bits into separate structs and
pass the loaded file name into our payload when we load it using "load".
Signed-off-by: Alexander Graf <agraf@suse.de>
Create CMD_FDT Kconfig entry to have an option to disable fdt command
which is not required for small configuration which requires libfdt
only.
Enable it by default for all targets which enables OF_LIBFDT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Fixup flea3/sandbox/id8313/siemens-am33xx/smartweb]
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch follows work done by:
"Move CONFIG_OF_LIBFDT to Kconfig"
(sha1: 69e173eb57)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Add xpress* to the patch]
Signed-off-by: Tom Rini <trini@konsulko.com>
The Pi firmware has changed the default "kernel" load address for 64-bit
mode. The authors have confirmed that this is a deliberate and long-term
change. Adapt U-Boot to the new value.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
This function parses the reg property based on an index found in the
reg-names property. This is required for bindings that are written
using reg-names rather than hard-coding indices in reg.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Commit 73a1cb27 moved the check whether we should set the architected
timer frequency from CONFIG_SYS_CLK_FREQ to CONFIG_TIMER_CLK_FREQ, but
did not update all users of it.
The one where I (finally) realized why KVM didn't work is the Arndale
board, so this patch adds the respective define to it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Fixes: 73a1cb27
Reviewed-by: York Sun <york.sun@nxp.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Use i2c cadence DM driver for all zynqmp targets except ZCU102
because I2C muxes and PCA953x are not supported in the tree yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
zcu102 has two pca953x on i2c bus 0. Chips 0x20 and 0x21.
Enable option to work with these two chips.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable DM GPIO and ZYNQ GPIO using kconfig instead of the board
config file.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move kernel and fdt offsets and sizes to board config file
as the flash size varies across boards
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sometimes the PCIe link for the PEX-switch will not come-up. In this case,
the board is not in a usable state. This patch makes sure that in this
case a soft-reset is issued. If this soft-reset does not result in the
PEX-switch being detected after some soft-reset cycles, an I2C message
is sent to the uC to issue a complete power-cycle of the board.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds bootcount support to the MVEBU theadorable board. Since
no reset-safe registers seem to be available, it uses the last 4KiB
of SDRAM for the bootcounter location.
Signed-off-by: Stefan Roese <sr@denx.de>
To make the usage of this function more flexible, lets add the CRC start
value as parameter to this function. This way it can be used by other
functions requiring different start values than 0 as well.
For non-zero CRC start values to work, I've reworked the function a bit.
The new implementation is copied from the Linux version in
drivers/i2c/i2c-core.c / i2c_smbus_pec(). Which supports non-zero
CRC stating values.
I've double-checked that the results for zero starting values are
identical to the results from the original version of this function.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch "dm: part: Convert partition API use to linker lists"
(sha1: 96e5b03c8a) is adding new
dependency for enabling SPL_EXT_SUPPORT to be able to get
information about DOS partition.
get_info is also required for FAT support only which is used on Xilinx
Zynq boards.
Reported-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that rpi_*defconfig and Kconfig (rather than the config header file)
provide the identity of the build, we don't need to separate config
headers and board directories for each RPi variant. Set CONFIG_SYS_BOARD
and CONFIG_SYS_CONFIG_NAME so that we can get rid of the duplication. This
requires a tiny number of extra ifdefs in the config header.
The only disadvantage of this approach is that the $board/$board_name
environment variables aren't as descriptive as they used to be. This isn't
really an issue because those only exist to allow scripts to create DTB
filenames at runtime. However, the RPi board code already sets $fdtfile to
something more accurate based on FW-reported board ID anyway.
While at it, unify some Kconfig select options, and add a MAINTAINERS
entry for bcm283x too.
Partially-suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
On all Pis so far, the VC FW provides a short stub to set up the ARM CPU
before entering the kernel (a/k/a U-Boot for us). This feature is not
currently supported by the VC FW when booting in 64-bit mode. However,
this feature will likely appear in the near future, and this U-Boot port
assumes that such a feature is in place. Without that feature, or a
temporary workaround described below, U-Boot will not boot.
Once the VC FW does provide the ARM stub, u-boot.bin built for rpi_3 can
be used drectly as kernel7.img, in the same way as any other RPi port. The
following config.txt is required:
# Fix mini UART input frequency, and setup/enable up the UART.
# Without this option, U-Boot will not boot, even if you don't care
# about the serial console. This option will always be required for
# all RPi3 use-cases, unless the PL011 UART is used, which is not
# yet supported by rpi_3* builds of U-Boot.
enable_uart=1
# Boot in AArch64 (64-bit) mode.
# It is possible that a future VC FW will remove the need for this
# option, instead auto-setting 32-/64-bit mode based on the "kernel"
# filename present on the SD card.
arm_control=0x200
Prior to the VC FW providing the ARM boot stub, you can use the following
steps to build an equivalent stub into the U-Boot binary:
git clone https://github.com/swarren/rpi-3-aarch64-demo.git \
../rpi-3-aarch64-demo
(cd ../rpi-3-aarch64-demo && ./build.sh)
Build U-Boot for rpi_3 in the usual way
cat ../rpi-3-aarch64-demo/armstub64.bin u-boot.bin > u-boot.bin.stubbed
Use u-boot.bin.stubbed as kernel7.img on the Pi SD card.
In this case, the following additional entries are required in config.txt:
# Tell the FW to load the kernel image at address 0, the reset vector.
kernel_old=1
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
There is an incorrect space after loadaddr= in the extra environment,
so drop it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
CONFIG_SPI_FLASH_BAR was deleted from socfpga_common.h
and placed in socfpga_*_defconfig because it is Kconfig symbol.
Signed-off-by: Denis Bakhvalov <dendibakh@gmail.com>
Reported-by: Denis Bakhvalov <dendibakh@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
To enable DM on MPC85xx, we need pre-relocation malloc, which is
implemented in this patch.
We also make sure that the IVORs are always 4-aligned on e500 to prevent
alignment exceptions caused by code changes in start.S.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Cc: York Sun <york.sun@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file.
Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To
unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mario Six <mario.six@gdsys.cc>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
The commands for the VSC9953 l2 switch from T1040 became generic in
patch https://patchwork.ozlabs.org/patch/499748/ and the define
was renamed.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
We can use phys_addr_to for esdhc_base to discard
the #ifdef.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Yangbo Lu <yangbo.lu@nxp.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
preboot macro load the uEnv.txt from mmc 0 when bootmode is mmc. uenvcmd is
executed after load of uEnv.txt if it is defined in the uEnv.txt env text
file.
The default importbootenv macro reads the uEnv.txt from mmc.
Additional to this, usb_loadbootenv is added to support loading uEnv.txt
from usb dev 0.
Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Read information about memory from DT. This patch simplify life with
synchronization between DT and board files.
dram_init() only needs maximum RAM size below 4GB that's why please sort
banks in memory node.
dram_init_banksize() copies memory setup to bi_dram[].
This will avoid reading information from DT twice.
Memory test start/end were changed to DDR location to let memtest still
compiled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zybo has on board I2C EEPROM which contains preprogrammed MAC address.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support of Xilinx PCS/PMA core phy for Zynq
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds basic support for the Marvell A375 eval board. Tested
are the following interfaces:
- I2C
- SPI
- SPI NOR
- Ethernet (mvpp2), port 0 & 1
Currently the A375 SerDes and DDR3 init code is not intergrated. So
the SPL U-Boot is not fully functional.
Right now, this A375 mainline U-Boot can only be used by chainloading
it via the original Marvell U-Boot. This can be done via this
command:
=> tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch adds support for the mvpp2 ethernet controller which is integrated
in the Marvell Armada 375 SoC. This port is based on the Linux driver (v4.4),
which has been stripped of the in U-Boot unused portions.
Tested on the Marvell Armada 375 eval board db-88f6720.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
Having CONFIG_SYS_MALLOC_LEN in mx7_common.h is not a good idea,
because the malloc() pool size is board dependent.
For example: if a certain board has support for splashscreen or DFU,
it may be necessary to adjust CONFIG_SYS_MALLOC_LEN to a larger value.
So define CONFIG_SYS_MALLOC_LEN in each board config file.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Since commit 5d69269dee ("mx7dsabresd: Define serial port locally")
we need to specify the UART base address in each board config
file, so do this to avoid a build error.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Add a block device cache to speed up repeated reads of block devices by
various filesystems.
This small amount of cache can dramatically speed up filesystem
operations by skipping repeated reads of common areas of a block
device (typically directory structures).
This has shown to have some benefit on FAT filesystem operations of
loading a kernel and RAM disk, but more dramatic benefits on ext4
filesystems when the kernel and/or RAM disk are spread across
multiple extent header structures as described in commit fc0fc50.
The cache is implemented through a minimal list (block_cache) maintained
in most-recently-used order and count of the current number of entries
(cache_count). It uses a maximum block count setting to prevent copies
of large block reads and an upper bound on the number of cached areas.
The maximum number of entries in the cache defaults to 32 and the maximum
number of blocks per cache entry has a default of 2, which has shown to
produce the best results on testing of ext4 and FAT filesystems.
The 'blkcache' command (enabled through CONFIG_CMD_BLOCK_CACHE) allows
changing these values and can be used to tune for a particular filesystem
layout.
Signed-off-by: Eric Nelson <eric@nelint.com>
This commit add support for 96Boards Dragonboard410C.
It is board based on APQ8016 Qualcomm SoC, complying with
96boards specification.
Features (present out of the box):
- 4x Cortex A53 (ARMv8)
- 2x USB Host port
- 1x USB Device port
- 4x LEDs
- 1x HDMI connector
- 1x uSD connector
- 3x buttons (Power, Vol+, Vol-/Reset)
- WIFI, Bluetooth with integrated antenna
- 8GiB eMMC
U-Boot boots chained with fastboot in 64-bit mode.
For detailed build instructions see readme.txt in board directory.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org>
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
Some registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have
meaning on other devices.
The following registers were added:
sbusstatus/sbusmode: AHB-related registers
genconfig*: Auxiluary IP core configuration registers.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
ulpi_read and ulpi_write are used to read/write registers via ULPI bus.
Code generates compilation warnings on 64-bit machines where pointer
is cast to u32.
This patch drops all but last 8 bits of register address.
It is possible, because addresses on ULPI bus are 6- or 8-bit.
It is not possible (according to ULPI 1.1 spec) to have more
than 8-bit addressing.
This patch should not cause regressions as all calls to
ulpi_read/write use either structure pointer (@ address 0) or integer
offsets cast to pointer - addresses requested are way below 8-bit range.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
viewport_addr is address of memory mapped ULPI viewport.
It is used only as argument to readl/writel later
causing compile warnings on 64-bit devices.
This fix changes its type to match pointer size.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Move CONFIG_USB_ULPI* from headers to defconfigs for boards that use it.
Also - add CONFIG_USB where necesarry - all boards use it,
but some are not defining it explicitly.
Affected boards:
colibri_t20, harmony, mcx, mt_ventoux, twister,
zynq_(picozed, zc702, zc706, zed, zybo)
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the TI DP83867 Giga bit phy on the
dra7 rev c board. The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
U-boot for general purpose KS2 devices is loaded to the beginning of the
internal memory (0x0c000000). Secure devices uses this memory and
CONFIG_SYS_TEXT_BASE has to be different for those devices.
This commit make this configurable at build time by giving
CONFIG_SYS_TEXT_BASE as a command line definition to make command.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with
the CPU complex swapped out for a quad-core ARMv8. This can operate in 32-
or 64-bit mode. 32-bit mode is the current default selected by the
VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of
U-Boot for the Raspberry Pi 3.
>From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a
change in usage of the SoC UARTs. On all previous Pis, the PL011 was the
only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a
UART to connect to the SoC. By default, the PL011 is used for this purpose
since it has larger FIFOs than the other "mini" UART. However, this can
be configured via the VideoCore firmware's config.txt file. This patch
hard-codes use of the mini UART in the RPi 3 port. If your system uses the
PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot
port instead. A future change might determine which UART to use at
run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed
together.
The mini UART has some limitations. One externally visible issue in the
BCM2837 integration is that the UART divides the SoC's "core clock" to
generate the baud rate. The core clock is typically variable, and under
control of the VideoCore firmware for thermal management reasons. If the
VC FW does modify the core clock rate, UART communication will be
corrupted since the baud rate will vary from the expected value. This was
not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To
work around this, the VideoCore firmware can be told not to modify the SoC
core clock. However, the only way this can happen and be thermally safe is
to limit the core clock to a low/minimum frequency. This leaves
performance on the table for use-cases that don't care about a UART
console. Consequently, use of the mini UART console must be explicitly
requested by entering the following line into config.txt:
enable_uart=1
A recent version of the VC firmware is required to ensure that the mini
UART is fully and correctly initialized by the VC FW; at least
firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on
core clock See: https://github.com/raspberrypi/firmware/issues/572".
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Command parsing and processing code is not needed when the command line is
disabled. Remove this code in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The Allwinner A64 SoC is used in the Pine64. This patch adds
all bits necessary to compile U-Boot for it running in AArch64
mode.
Unfortunately SPL is not ready yet due to legal problems, so
we need to boot using the binary boot0 for now.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
[agraf: remove SPL code, move to AArch64]
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
I no longer see the problem claimed in the comment block. Rather,
the 0.5 msec timeout seems too short for some TFTP servers.
Drop the CONFIG_ARM_TIMEOUT to fall back to the 5 sec timeout.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
These defined were used for pre-DM ns16550 serial driver. They are
unneeded because UniPhier SoCs now use DM serial.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit d085ecd61b ("ARM: uniphier: switch to raw U-Boot image")
claimed that u-boot-with-spl.bin would be useful in its commit log,
but it was not available because the commit missed to define
CONFIG_SPL_MAX_SIZE. Without it, CONFIG_SPL_PAD_TO is not defined
either (see include/config_fallbacks.h). So, the SPL image is not
padded correctly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The A83T has 3 USB PHYs: 1 for USB OTG, 1 for standard USB 1.1/2.0 host,
1 for USB HSIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The FLDOs on AXP818 PMIC normally provide power to CPUS and USB HSIC PHY
on the A83T/H8.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
AXP818 supports VBUS drive function, even though the manual does not
mention it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
VBUS drive is supported on AXP221 and later PMICs. Rework the macros
so we can support this on later PMICs without too much work.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
axp818_init() is declared, but never defined.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This patch enable VID support for ls2080ardb platform.
It uses the common VID driver.
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Use a pointer to pass image address to fsl_secboot_validate(),
instead of using environmental variable "img_addr".
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In case of fatal failure during secure boot execution (e.g. header
not found), reset is asserted to stop execution. If the RESET_REQ
is not tied to HRESET, this allows the execution to continue.
Add esbh_halt() after the reset to make sure execution stops.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
For secure boot, currently we were using fixed bootargs for all SoCs.
This is not needed and we can use the bootargs which are used in
non-secure boot.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
To unify steps for secure boot for xip (eg. NOR) and non-xip memories
(eg. NAND, SD), bootscipts and its header are copied to main memory.
Validation and execution are performed from there.
For other ARM Platforms (ls1043 and ls1020), to avoid disruption of
existing users, this copy step is not used for NOR boot.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sec_init has been called at the beginning to initialize SEC Block
(CAAM) which is used by secure boot validation later for both ls2080a
qds and rdb. 64-bit address in ESBC Header has been enabled. Secure
boot defconfigs are created for boards (NOR boot).
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
For secure boot, a header is used to identify key table, signature
and image address. A new header structure is added for lsch3.
Currently key extension (IE) feature is not supported. Single key
feature is not supported. Keys must be in table format. Hence, SRK
(key table) must be present. Max key number has increase from 4 to
8. The 8th key is irrevocable. A new barker Code is used.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In LS2080, SFP has version 3.4. It is in little endian. The base
address is 0x01e80200. SFP is used in Secure Boot to read fuses.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The RPi3 typically uses the regular UART for high-speed communication with
the Bluetooth device, leaving us the mini UART to use for the serial
console. Add support for this UART so we can use it.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Some TI boards (e.g. IDK) have 4 to 6 ethernet ports and
this function is handy at board.c to configure the
MAC address of the ports.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently, CONFIG_BCM2835 is defined for all BCM283x builds and _BCM2836
is defined when building for that SoC. That means there isn't a single
define that means "exactly BCM2835". This will complicate future patches
where BCM2835-vs-anything-else needs to be determined simply.
Modify the code to define one or the other of CONFIG_BCM2835/BCM2836 so
future patches are simpler.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that we have support for running with caches enabled in HYP mode,
opt in to that on the Raspberry Pi 2. This brings a significant performance
boost.
Signed-off-by: Alexander Graf <agraf@suse.de>
The EFI standard defines a simple boot protocol that an EFI payload can use
to access video output.
This patch adds support to expose exactly that one (and the mode already in
use) as possible graphical configuration to an EFI payload.
With this, I can successfully run grub2 with graphical output.
Signed-off-by: Alexander Graf <agraf@suse.de>
Same flash driver can be used by other stm32 families like stm32f7.
Better place for this driver would be mtd driver location.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
This patch add support for the CCV xPress board which is equipped
with the i.MX6UL. And provides the following interfaces:
- 128MiB DDR
- UART
- I2C
- eMMC (with booting)
- Ethernet
- USB
This patch adds two build targets. One with and one without SPL. The
non-SPL version is used for loading U-Boot via USB (imx_usb_loader).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
CONFIG_BOARD_EARLY_INIT_F and CONFIG_BOARD_LATE_INIT should not be
placed into mx7_common because not all boards need these options.
Move them to the board file instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The description was borrowed from kernel. "tristate" type was changed
to "bool" (I believe we don't support modules for u-boot yet, right?).
CONFIG_USB_GADGET requires CONFIG_USB to be defined too, so add it along
as well.
Definitions were added to defconfig files in a way that
"make savedefconfig" generates exactly the same file as used defconfig.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Add zynq_zc702 conversion]
Signed-off-by: Tom Rini <trini@konsulko.com>
Booting mx6qp sabreauto board and then doing:
=> saveenv
=> reset
, causes a system hang.
This happens because the size of the U-Boot binary is larger than
CONFIG_ENV_OFFSET.
Fix this problem by increasing CONFIG_ENV_OFFSET, so that the U-boot binary
and the environment variables region do not overlap.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Enable NAND TrimFFS support in M53EVK, since it is convenient when
installing UBI images to NAND.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
This patch adds support for Altera StratixV bitstream programming. 2 FPGAs
are connected to the SPI busses. This patch uses board specific write
code to program the bitstream via SPI direct write mode.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.
This StratixV support will be used by the theadorable board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 1e3d640316 (ARM: sheevaplug: redefine MTDPARTS) changed the partition
layout (without any description why), but didn't change the offset/size to
load the kernel from or the root=/dev/mtdblockX in the bootargs.
The 3MB forseen for a kernel is furthermore too little. A 4.4 build of
mvebu_v5_defconfig is 3.6MB:
-rw-r--r-- 1 peko peko 3.6M Jan 16 20:24 uImage.kirkwood-sheevaplug
When device tree support for sheevaplug was added to the kernel in commit
ee514b381e (ARM: Kirkwood: Add dts files for Sheevaplug and eSATA
Sheevaplug) a default flash partition layout (used if mtdparts= isn't passed
on the command line / CONFIG_MTD_CMDLINE_PARTS isn't enabled) with 1MB for
u-boot / environment, 4MB for the kernel and the rest for the rootfs, so use
that layout here and adjust the kernel loading to match.
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Enable building of drivers/net/phy/realtek.c so that realtek phys
get properly initialized.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This commit syncs the dt-bindings/input/* headers with the kernel (v4.5)
and adds dt-bindings/clock/sun4i-a10-pll2.h, both are necessary for newer
sunxi dts files to build.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Now everything is done to load a raw U-Boot proper image instead of
an mkimage-processed one (as far as I tested on NAND, eMMC, NOR).
The SPL already knows the load address of the U-Boot proper without
parsing its uImage header because the load address is defined by
CONFIG_SYS_TEXT_BASE, assuming that the two images are generated from
the same build.
My main motivation of this switch is to use u-boot-with-spl.bin, a
concatenation of u-boot-spl.bin and u-boot.bin. (I wish there were
a concatenation of u-boot-spl.bin and u-boot.img...) Anyway, this
commit would be useful for one-shot image burn.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This allows to boot from NOR flash (or SRAM) with help of an external
loader (NOR-loader).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long. It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family. Also, rename files for consistency.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This TODO is no longer useful. CONFIG_SYS_NS16550_SERIAL is just
ignored on DM serial.
If one wants to use the 16550A UART device on the UniPhier Micro
Support Card, it can be enabled by CONFIG_SYS_NS16550 via Kconfig.
Please notice CONFIG_SPL_OF_TRANSLATE must be enabled as well and
the device tree must be treaked in order to use the NS16550 serial
on SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Stephen Warren <swaren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Fixup MPC8641HPCN* and r2dplus configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
The license command isn't usually built and has a few problems:
- The rules to generate license.h haven't worked in a long time,
re-write these based on the bmp_logo.h rules.
- 'tok' is unused and the license text size has increased
- bin2header.c wasn't grabbing unistd.h to know the prototype for
read().
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
For Raspberry Pi, we had the input clock rate to the pl011 fixed in
the rpi.c file, but it may be changed by firmware due to user changes
to config.txt. Since the firmware always sets up the uart (default
115200 output unless the user changes it), we can just skip our own
uart init to simplify the boot process and more reliably get serial
output.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Some features are only useful or meaningful when the command line is
present. Ensure that these features are not compiled in when CONFIG_CMDLINE
is not enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
When CONFIG_CMDLINE is disabled we need to remove all the command-line
code. Most can be removed by dropping the appropriate linker lists from the
images, but sub-commands must be dealt with specially.
A simple mechanism is used to avoid 'unused static function' errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
After power cycle of a K2G EVM dhcp fails due to a auto-negotiation
timeout. This commit increases the timeout to fix the issue.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
CONFIG_SYS_CONSOLE_IS_IN_ENV needs to be enabled, so we could set stdout
environment variable to specify the vga for the console output when
LCD/HDMI is connected to the boards.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add support of address parity for DDR4 UDIMM or discrete memory.
It requires to configurate corresponding MR5[2:0] and
TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig,
e.g. hwconfig=fsl_ddr:parity=on.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Put pci_get_hose_head() prototype in header so it is available to
external users, allowing them to find and iterate over all pci
controllers.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins
polarity by setting IRQCR register, because AQR405 interrupt is low
active but GIC accepts high active.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch makes the following changes to the SR1500 board port:
- Update defconfig to support SPI NOR (use make savedefconfig).
- Increase SPI speed to a maximum of 100MHz for faster system
bootup.
- Change environment location, so that its not between SPL and
main U-Boot. This way the combined SPL / U-Boot image can
be used for updates.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
This patch makes it possible that boards can define a board-specific env
size. This is used by the SR1500 SoCFPGA board port.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Marek Vasut <marex@denx.de>
Move the inclusion of the common socfpga configuration file further
down in the sr1500 configuration, so that the socfpga_common.h can
check if environment is in SPI NOR and it's location is defined and
if it is not, define default location.
This fixes "arm: socfpga: Enabling U-Boot environment support in QSPI"
which introduced a minor warning.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Enabling the support of storing U-Boot environment
within serial NOR flash. By default, its still
store into SDMMC
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
This patch changes the USB port scanning procedure and timeout
handling in the following ways:
a)
The power-on delay in usb_hub_power_on() is now reduced to a value of
max(100ms, "hub->desc.bPwrOn2PwrGood * 2"). The code does not wait
using mdelay, instead usb_hub_power_on() will wait before querying
the device in the scanning loop later. The total timeout for this
hub, which is 1 second + "hub->desc.bPwrOn2PwrGood * 2" is calculated
and will be used in the following per-port scanning loop as the timeout
to detect active USB devices on this hub.
b)
Don't delay the minimum delay (for power to stabilize) in
usb_hub_power_on(). Instead skip querying these devices in the scannig
loop until the delay time is reached.
c)
The ports are now scanned in a quasi parallel way. The current code did
wait for each (unconnected) port to reach its timeout and only then
continue with the next port. This patch now changes this to scan all
ports of all USB hubs quasi simultaneously. For this, all ports are added
to a scanning list. This list is scanned until all ports are ready
by either a) reaching the connection timeout (calculated earlier), or
by b) detecting a USB device. This results in a faster USB scan time as
the recursive scanning of USB hubs connected to the hub that's currently
being scanned will start earlier.
One small functional change to the original code is, that ports with
overcurrent detection will now get rescanned multiple times
(PORT_OVERCURRENT_MAX_SCAN_COUNT).
Without this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 20.163 seconds
With this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 1.822 seconds
So ~18.3 seconds of USB scanning time reduction.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moved the new field to the end of the struct to avoid problems:
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch adds support for the congatec conga-QA3/E3845-4G eMMC8 SoM,
installed on the congatec Qseven 2.0 evaluation carrier board
(conga-QEVAL).
Its port is very similar to the MinnowboardMAX port and also uses
the Intel FSP as described in doc/README.x86.
Currently supported are the following interfaces / devices:
- UART (via Winbond legacy SuperIO chip on carrier board)
- Ethernet (PCIe Intel I210 / E1000)
- SPI including SPI NOR as boot-device
- USB 2.0
- SATA via U-Boot SCSI IF
- eMMC
- Video (HDMI output @ 800x600)
- PCIe
Not supported yet is:
- I2C
- USB 3.0
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This adds basic support for chromebook_samus. This is the 2015 Pixel and
is based on an Intel broadwell platform.
Supported so far are:
- Serial
- SPI flash
- SDRAM init (with MRC cache)
- SATA
- Video (on the internal LCD panel)
- Keyboard
Various less-visible drivers are provided to make the above work (e.g. PCH,
power control and LPC).
The platform requires various binary blobs which are documented in the
README. The major missing feature is USB3 since the existing U-Boot support
does not work correctly with Intel XHCI controllers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is not needed now that the memory controller driver has the SPD data
in its own node.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There is an extra line in the comment in the header. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is a little easier on the eyes, particularly when the backlight is set
to maximum.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add an address which can be used for loading and running the reference code
when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
GPIO pins need to be set up on start-up. Add a driver to provide this,
configured from the device tree.
The binding is slightly different from the existing ICH6 binding, since that
is quite verbose. The new binding should be just as extensible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
We don't need this anymore - we can use device tree and the new pinconfig
driver instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add one more step into the init sequence. This fixes the keyboard on samus,
which otherwise does not work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some functions do not change the struct gpio_desc parameter. Update these to
use const so this is clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We can use GPIOs as binary digits for reading 'strapping' values. Each GPIO
is assigned a single bit and can be set high or low on the circuit board. We
already have a legacy function for reading these values. Add one that
supports driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some CPUs use microcode and each core can have a different version of
microcode loaded. Also some CPUs support the concept of an integer ID used
for identification purposes. Add support for these in the CPU uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
NFS loading is similar to net loading except initial files are loaded
over NFS instead of TFTP, this removes the need for multiple different
protocol servers running on the host and allows the use of a single
network file system containing boot related files in their usual
in-filesystem directory. Add defaults for this boot style here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For k2l, k2e and k2hk, ubi is set to default boot in uboot
environment settings; while for k2g, mmc should be the
default boot. This patch is to set mmc as default for k2g-evm
Signed-off-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch updates the env script to include a initramfs with firmware
loaded and provided to kernel through second argument of bootz command
during boot. Defined DEFAULT_FW_INITRAMFS_BOOT_ENV to have all of the
required env variables and use it in evm specific config file.
The K2 linux drivers for PCIe and NetCP (1G, 10G) requires serdes
firmwares. These requires firmware to be available early through the boot
process in some cases to satisfy firmware requests from driver. Hence use
a small initramfs to provide the same and update boot env to accommodate
this in the boot flow. This method is used when rootfs is nfs and ubifs.
This fs contains just lib/firmware folder with all required firmware.
When rootfs is on initramfs, then the filesystem has the firmware under
lib/firmware and this early initramfs is not required and is not used.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adding support to save env in MMC on k2g platforms, as it is the
preferred peripheral in saving env.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For development purposes, it is easier to use the env import command
and plain text or script files instead of script-images. So allow
u-boot to load env var from a text file or a script file.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Support for loading bootscript and text env file is duplicated in all TI
platforms. Add this information to DEFAULT_MMC_TI_ARGS so that it can be
reused in all TI platforms.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
With commit aee119bd70 ('am43xx_evm: add usb host boot support') usb
commands is removed from U-boot second stage and enbaled only on USB
boot config. Fixing this by enable USB commands for both USB boot and
in second stage u-boot.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
CONFIG_SPL_NET_VCI_STRING is available only with BOOTP. So if
CMD_DHCP is enabled for SPL in usb ether boot, it will not pass
the right vendor name and failing to download the right file.
Also all the net CMD_* are not required in SPL builds. So defining
these only for non-SPL builds.
Reported-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
securedb.key.bin is not supported so it should not be loaded by
default init_ubi command.
Signed-off-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
UBI images created by OE does not contain boot partition by default,
instead kernel and dtb are placed in /boot directory inside rootfs
partition. So update env commands to load files from correct
location.
Signed-off-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add USB mass storage support so that kernel can be read from
connected usb storage.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
EFI payloads can query for the device they were booted from. Because
we have a disconnect between loading binaries and running binaries,
we passed in a dummy device path so far.
Unfortunately that breaks grub2's logic to find its configuration
file from the same device it was booted from.
This patch adds logic to have the "load" command call into our efi
code to set the device path to the one we last loaded a binary from.
With this grub2 properly detects where we got booted from and can
find its configuration file, even when searching by-partition.
Signed-off-by: Alexander Graf <agraf@suse.de>
The commonly defined environment variable to determine the device tree
file name is called fdtfile rather than fdt_name. Replace all occurences
of fdt_name with fdtfile.
Signed-off-by: Alexander Graf <agraf@suse.de>
UEFI defines a simple boot protocol for removable media. There we should look
at the EFI (first GPT FAT) partition and search for /efi/boot/bootXXX.efi with
XXX being different between different platforms (x86, x64, arm, aa64, ...).
This patch implements a simple version of that protocol for the default distro
boot script. With this we can automatically boot from valid UEFI enabled
removable media.
Because from all I could see U-Boot by default doesn't deliver device tree
blobs with its firmware, we also need to load the dtb from somewhere. Traverse
the same EFI partition for an fdt file that fits our current board so that
an OS receives a valid device tree when booted automatically.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The EFI loader needs to maintain views of memory - general system memory
windows as well as used locations inside those and potential runtime service
MMIO windows.
To manage all of these, add a few helpers that maintain an internal
representation of the map the similar to how the EFI API later on reports
it to the application.
For allocations, the scheme is very simple. We basically allow allocations
to replace chunks of previously done maps, so that a new LOADER_DATA
allocation for example can remove a piece of the RAM map. When no specific
address is given, we just take the highest possible address in the lowest
RAM map that fits the allocation size.
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Simon Glass <sjg@chromium.org>
A EFI applications usually want to access storage devices to load data from.
This patch adds support for EFI disk interfaces. It loops through all block
storage interfaces known to U-Boot and creates an EFI object for each existing
one. EFI applications can then through these objects call U-Boot's read and
write functions.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
[trini: Update for various DM changes since posting]
Signed-off-by: Tom Rini <trini@konsulko.com>
After booting has finished, EFI allows firmware to still interact with the OS
using the "runtime services". These callbacks live in a separate address space,
since they are available long after U-Boot has been overwritten by the OS.
This patch adds enough framework for arbitrary code inside of U-Boot to become
a runtime service with the right section attributes set. For now, we don't make
use of it yet though.
We could maybe in the future map U-boot environment variables to EFI variables
here.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
One of the basic EFI interfaces is the console interface. Using it an EFI
application can interface with the user. This patch implements an EFI console
interface using getc() and putc().
Today, we only implement text based consoles. We also convert the EFI Unicode
characters to UTF-8 on the fly, hoping that everyone managed to jump on the
train by now.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
When an EFI application runs, it has access to a few descriptor and callback
tables to instruct the EFI compliant firmware to do things for it. The bulk
of those interfaces are "boot time services". They handle all object management,
and memory allocation.
This patch adds support for the boot time services and also exposes a system
table, which is the point of entry descriptor table for EFI payloads.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
EFI uses the PE binary format for its application images. Add support to EFI PE
binaries as well as all necessary bits for the "EFI image loader" interfaces.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The EFI API header is great, but missing a good chunk of function prototype,
GUID defines and enum declarations.
This patch extends it to cover more of the EFI API. It's still not 100%
complete, but sufficient enough for our EFI payload interface.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
We have a pretty nice and generic interface to ask for a specific block
device. However, that one is still based around the magic notion that
we know the driver name.
In order to be able to write fully generic disk access code, expose the
currently internal list to other source files so that they can scan through
all available block drivers.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Signed-off-by: Alexander Graf <agraf@suse.de>
The hikey runs with dcache disabled today. There really should be no reason
not to use caches on AArch64, so let's add MMU definitions and enable the
dcache.
Signed-off-by: Alexander Graf <agraf@suse.de>
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.
Signed-off-by: Alexander Graf <agraf@suse.de>
Lokesh Vutla
Mateusz Kulikowski
Alexander Graf
Michal Simek
Steve Rae
Stephen Warren
Stephen Warren
Tom Rini
Siva Durga Prasad Paladugu
Stefan Roese
Eric Nelson
Marek Vasut
Denis Bakhvalov
Sriram Dash
Purna Chandra Mandal
mario.six@gdsys.cc
York Sun
Codrin Ciubotariu
Qianyu Gong
Wenbin Song
Peng Fan
Michal Simek
Soren Brinkmann
Fabio Estevam
Dan Murphy
Paul Kocialkowski
Vitaly Andrianov
Simon Glass
Siarhei Siamashka
Masahiro Yamada
Chen-Yu Tsai
Rai Harninder
Saksham Jain
Vasily Khoruzhick
Roger Quadros
Vikas Manocha
Sam Protsenko
Peter Korsgaard
Hans de Goede
Bin Meng
Vagrant Cascadian
Eric Anholt
Alison Wang
Shengzhou Liu
Stuart Yoder
Shaohui Xie
Reinhard Pfau
Dirk Eibach
Stefano Babic
Chin Liang See
Andrew F. Davis
Yan Liu
Murali Karicheri
Mugunthan V N
Carlos Hernandez