Commit graph

56 commits

Author SHA1 Message Date
Ira W. Snyder
9f530d59e6 e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels
Newer Linux kernels can overrun the initial memory window used for
booting with their BSS area. When this happens, they overwrite the FDT
and silently fail to boot.

On e300 CPUs, the Linux kernel uses an initial BAT covering the first
256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase
the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value
allowed by Linux. This will allow very large kernels to boot.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:13:32 +02:00
Scott Wood
e8d3ca8b33 mpc831xerdb: enable mtdparts for NAND
The default partition table matches the .dts files for these boards in
Linux.  This allows these partitions to be used by name with U-Boot's
"nand" command.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:13:22 +02:00
Becky Bruce
0914f48328 powerpc: Update configs to properly set FSL_ELBC
Some parts that have an Enhanced Local Bus Controller weren't
setting CONFIG_FSL_ELBC.  Fix this so we can use this define
properly going forward (currently it's only used if PHYS_64BIT is
set, which meant not all platforms needed to have it set correctly).

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Ron Madrid
f986325dd5 Update SICRL_USBDR to reflect 4 different settings
This patch changed the SICRL_USBDR define to reflect the 4 different bit
settings for this two-bit field.  The four different options are '00', '01',
'10', and '11'.  This patch also corrects the config file for SIMPC8313 and
MPC8313ERDB for the appropriate fields.  This change only affects the MPC8313
cpu.

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-06-04 10:42:59 -05:00
Kim Phillips
1a2e203b31 mpc83xx: turn on icache in core initialization to improve u-boot boot time
before, MPC8349ITX boots u-boot in 4.3sec:

        column1 is elapsed time since first message
        column2 is elapsed time since previous message
        column3 is the message
0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX
0.000 0.000:
0.000 0.000: Reset Status:
0.000 0.000:
0.032 0.032: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.032 0.000: Board: Freescale MPC8349E-mITX
0.032 0.000: UPMA:  Configured for compact flash
0.032 0.000: I2C:   ready
0.061 0.028: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
1.516 1.456: FLASH: 16 MB
2.641 1.125: PCI:   Bus Dev VenId DevId Class Int
2.652 0.011:         00  10  1095  3114  0180  00
2.652 0.000: PCI:   Bus Dev VenId DevId Class Int
2.652 0.000: In:    serial
2.652 0.000: Out:   serial
2.652 0.000: Err:   serial
2.682 0.030: Board revision: 1.0 (PCF8475A)
3.080 0.398: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
3.080 0.000: TSEC0, TSEC1
4.300 1.219: IDE:   Bus 0: .** Timeout **

after, MPC8349ITX boots u-boot in 3.0sec:

0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
0.010 0.000:
0.010 0.000: Reset Status:
0.010 0.000:
0.017 0.007: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.017 0.000: Board: Freescale MPC8349E-mITX
0.038 0.020: UPMA:  Configured for compact flash
0.038 0.000: I2C:   ready
0.038 0.000: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
0.260 0.222: FLASH: 16 MB
1.390 1.130: PCI:   Bus Dev VenId DevId Class Int
1.390 0.000:         00  10  1095  3114  0180  00
1.390 0.000: PCI:   Bus Dev VenId DevId Class Int
1.400 0.010: In:    serial
1.400 0.000: Out:   serial
1.400 0.000: Err:   serial
1.400 0.000: Board revision: 1.0 (PCF8475A)
1.832 0.432: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
1.832 0.000: TSEC0, TSEC1
3.038 1.205: IDE:   Bus 0: .** Timeout **

also tested on these boards (albeit with a less accurate
boottime measurement method):

seconds: before  after
8349MDS  ~2.6    ~2.2
8360MDS  ~2.8    ~2.6
8313RDB  ~2.5    ~2.3 #nand boot
837xRDB  ~3.1    ~2.3

also tested on an 8323ERDB.

v2: also remove the delayed icache enablement assumption in arch ppc's
board.c, and add a CONFIG_MPC83xx define in the ITX config file for
consistency (even though it was already being defined in 83xx'
config.mk).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-22 18:44:56 -05:00
Kim Phillips
a059e90e16 mpc83xx: enable command line autocompletion
because it's convenient.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-22 18:34:49 -05:00
Kim Phillips
ecd1a09b81 mpc83xx: remove hardcoded network addresses from config files
and avoid e.g., two identical boards from causing random networking
conflicts when hooked up to the same network.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-02-22 16:48:06 -06:00
Heiko Schocher
4b142febff common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:14:07 +01:00
Kim Phillips
c7190f028f mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.

Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS_<registername>_<bitfield> assignments in the board
config file.

also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.

also start to use i/o accessors.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-26 21:19:38 -05:00
Mingkai Hu
6e1385d5f8 NAND boot: change NAND loader's relocate SP to CONFIG param
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:09 -05:00
Kim Phillips
79f516bccc mpc83xx: accommodate larger kernel sizes by default
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:11:44 -05:00
Kim Phillips
be9b56df02 mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove the former
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 10:17:54 -05:00
Kim Phillips
4a9932a436 mpc83xx: increase MONITOR_LEN to offset growing pains
Saving the environment leads to overwriting u-boot itself,
bricking boards.  Increase u-boot's image size so the environment
base address doesn't end up overlapping u-boot text.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-14 14:58:39 -05:00
Kim Phillips
d9ac3d5a17 mpc83xx: set 64BIT_VSPRINTF for boards using nand_util
When enabling NAND support for a board, one must also define
CONFIG_SYS_64BIT_VSPRINTF because this is needed in nand_util.c
for correct output.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Ron Madrid <ron_madrid@sbcglobal.net>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
2009-07-14 14:47:21 -05:00
Peter Tyser
2c7920afaf 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x
Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Peter Tyser
0f89860494 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx
Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Peter Tyser
d48eb5131d i2c: Remove deprecated individual i2c commands
The following individual I2C commands have been removed: imd, imm, inm,
imw, icrc32, iprobe, iloop, isdram.

The functionality of the individual commands is still available via
the 'i2c' command.

This change only has an impact on those boards which did not have
CONFIG_I2C_CMD_TREE defined.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:46 +02:00
Scott Wood
c123098035 mpc83xx: Set guarded bit on BAT that covers the end of the address space
The mpc8313erdb board currently sets DBAT6 to cover all of the final 256MiB of
address space; however, not all of this space is covered by a device.  In
particular, flash sits at 0xfe000000-0xfe7fffff, and nothing is mapped
at the far end of the address space.

In zlib, there is a loop that references p[-1] if p is non-NULL.  Under
some circumstances, this leads to the CPU speculatively loading from
0xfffffff8 if p is NULL.  This leads to a machine check.

Signed-off-by: Scott Wood <scottwood@freescale.com>

continuation to the remaining mpc83xx boards that suffer from the same problem.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-04-01 16:48:57 -05:00
Mike Frysinger
bdab39d358 rename CONFIG_CMD_ENV to CONFIG_CMD_SAVEENV
The CONFIG_CMD_ENV option controls enablement of the `saveenv` command
rather than a generic "env" command, or anything else related to the
environment.  So, let's make sure the define is named accordingly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-02-18 00:47:43 +01:00
Wolfgang Grandegger
6c869637fe NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define

 #define NAND_MAX_CHIPS          CONFIG_SYS_MAX_NAND_DEVICE

but that's bogus and did not work anyhow.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:51 -06:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Selvamuthukumar
03e2dbb18e Remove unwanted ';' at end of define.
Currently this is not creating any problem. But it will result
in compilation error when used as below.

printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2);

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>

continuation of the theme based on git grep "^#define CFG_.*;$" include/

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-14 23:03:03 +02:00
Kim Phillips
7fd0bea2e4 mpc83xx: don't disable autoboot
bootdelay set to -1 'permanently' disables autobooting, even if
bootcmd is specified.  Change to a positive value to allow
autobooting when a bootcmd is set.

Reported-by: Coray Tate <Coray.Tate@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-24 09:58:34 -05:00
Kim Phillips
162c41c031 mpc83xx: add h/w flash protection to board configs
the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-24 09:58:34 -05:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5a1aceb068 rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
93f6d72544 rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHERE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:00 +02:00
Jean-Christophe PLAGNIOL-VILLARD
51bfee1920 rename CFG_ENV_IS_IN_NAND in CONFIG_ENV_IS_IN_NAND
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:47:58 +02:00
Wolfgang Denk
4b0708093e Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-14 14:41:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
00b1883a4c drivers/mtd: Move conditional compilation to Makefile
rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:42 +02:00
Scott Wood
e4c0950854 NAND boot: MPC8313ERDB support
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset.  I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:31 -05:00
Scott Wood
acdab5c33f mpc8313erdb: Enable NAND in config.
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:30 -05:00
Becky Bruce
31d8267224 PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now.  Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 17:48:41 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
York Sun
4ce1e23b5e Fix 8313ERDB board configuration
Change LCRR clock ratio from 2 to 4 to commodate VSC7385.
Correct TSEC1 vs TSEC2 assignment.
Define ETHADDR and ETH1ADDR always.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
2008-05-19 23:04:24 +02:00
Kim Phillips
b211575740 mpc83xx: bump loadaddr over fdtaddr to 0x500000
this seems as a good compromise between human memory, typing,
and last but not least, to accommodate for current and future kernel bloat.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
2008-04-25 10:54:06 -05:00
Timur Tabi
89c7784ed9 83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware.  Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:43 -05:00
Poonam Aggrwal
e1d8ed2c08 Changes in uboot DDR configuration for MPC8313eRDB
These changes were identified by HighSmith Bill ,Mazzyar and Joseph for
DDR configuration in u-boot code. Some are related to performance, some
affect stability and some correct few basic errors in the current
configuration.

The changes have been tested and found to give better memory latency
figures on MPC8313eRDB.LMBench figures prove it.

The changes are:

- CS0_CONFIG[ AP_n_EN] is changed from 1 to 0
  (this may improve performance for application with many read
  or write to open pages).
- CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to
  001 (activating all the CS when only one is used may cause
  unwanted noise on the system)

- TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on
  Tras=45ns)
- TIMING_CFG_1[REFREC] changed from 21 clks to 18clks.

- TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to
  comply with the 3 ODT clk requirements)
- TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4.
- TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks.

- DDR_SDRAM_MODE[AL]changed from 0 to 1.
- DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks.

- DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510.
- DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500.

The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git
The last commit on this tree was 6775c68683

Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com>
Cc: Bill HighSmith <Bill.Highsmith@freescale.com>
Cc: Razzaz Mazyar <MRazzaz@freescale.com>
Cc: Josep P J <PJ.Joseph@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-16 12:00:49 -06:00
Dave Liu
2c5b48fc20 mpc83xx: Remove cache config from config.h
clean up the cache config from configs.h of board

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10 21:06:32 -06:00
Marcel Ziswiler
7817cb2083 fix comments with new drivers organization
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-01-09 21:48:49 +01:00
Kim Phillips
5b8bc606c6 mpc83xx: convert to using do_fixup_*()
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:56:42 -06:00
Timur Tabi
b2893e1fcb 83xx: fix CFG_ENV_ADDR and CFG_ENV_SECT_SIZE definitions
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the
currently-defined 83xx boards.  This change guarantees that the environment
will be located on the first flash sector after the U-Boot image.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:55:39 -06:00
Kim Phillips
3bb342fc85 fdt: remove unused OF_FLAT_TREE_MAX_SIZE references
and make some minor corrections to the FDT part of the README.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-29 01:46:25 +02:00
Wolfgang Denk
8f22b671eb Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xx 2007-08-18 21:50:01 +02:00
Wolfgang Denk
1d55483cf7 Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xx 2007-08-18 21:47:33 +02:00
Kim Phillips
bbea46f76f mpc83xx: implement board_add_ram_info
add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:

DRAM:  256 MB (DDR1, 64-bit, ECC on)

and for boards with SDRAM on the local bus, a line such as this is
added:

SDRAM: 64 MB (local bus)

also replaced some magic numbers with their equivalent define names.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-16 23:12:24 -05:00
Andy Fleming
10327dc554 Add CONFIG_HAS_ETH0 to all boards with TSEC
The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
to update TSEC1's device-tree node, so we need to add it
to all the boards with TSECs.  Do this for 83xx and 86xx, too,
since they will eventually do something similar.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-16 16:35:02 -05:00
Andy Fleming
3a79013e2a Define tsec flag values in config files
The tsec_info structure and array has a "flags" field for each
ethernet controller.  This field is the only reason there are
settings.  Switch to defining TSECn_FLAGS for each controller
in the config header, and we can greatly simplify the array, and
also simplify the addition of future boards.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-16 12:12:49 +02:00
Kim Phillips
35cc4e4823 mpc83xx: enable libfdt by default on freescale boards
this enables libfdt code by default for the
freescale mpc8313erdb, mpc832xemds, mpc8349emds,
mpc8349itx and gp boards.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-15 22:36:33 -05:00
Wolfgang Denk
cdd917a43d Fix build errors and warnings / code cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-02 00:48:45 +02:00