Commit graph

9 commits

Author SHA1 Message Date
Haavard Skinnemoen
1f36f73fe7 avr32: Add simple paging support
Use the MMU hardware to set up 1:1 mappings between physical and virtual
addresses. This allows us to bypass the cache when accessing the flash
without having to do any physical-to-virtual address mapping in the CFI
driver.

The virtual memory mappings are defined at compile time through a sorted
array of virtual memory range objects. When a TLB miss exception
happens, the exception handler does a binary search through the array
until it finds a matching entry and loads it into the TLB. The u-boot
image itself is covered by a fixed TLB entry which is never replaced.

This makes the 'saveenv' command work again on ATNGW100 and other boards
using the CFI driver, hopefully without breaking any rules.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2010-09-03 15:13:02 +02:00
Haavard Skinnemoen
cb54732052 Merge branch 'fixes' into cleanups
Conflicts:

	board/atmel/atngw100/atngw100.c
	board/atmel/atstk1000/atstk1000.c
	cpu/at32ap/at32ap700x/gpio.c
	include/asm-avr32/arch-at32ap700x/clk.h
	include/configs/atngw100.h
	include/configs/atstk1002.h
	include/configs/atstk1003.h
	include/configs/atstk1004.h
	include/configs/atstk1006.h
	include/configs/favr-32-ezkit.h
	include/configs/hammerhead.h
	include/configs/mimc200.h
2008-12-17 16:53:07 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5a1aceb068 rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:04 +02:00
Haavard Skinnemoen
ab0df36fc7 avr32: refactor the portmux/gpio code
- Separate the portmux configuration functionality from the GPIO pin
    control API.
  - Separate the controller-specific code from the chip-specific code.
  - Allow "ganged" port configuration (multiple pins at once).
  - Add more flexibility to the "canned" peripheral select functions:
      - Allow using more than 23 address bits, more chip selects, as
	well as NAND- and CF-specific pins.
      - Make the MACB SPEED pin optional, and choose between MII/RMII
	using a parameter instead of an #ifdef.
      - Make it possible to use other MMC slots than slot 0, and support
	different MMC/SDCard data bus widths.
  - Use more reasonable pull-up defaults; floating pins may consume a
    lot of power.
  - Get rid of some custom portmux code from the mimc200 board code. The
    old gpio/portmux API couldn't really handle its requirements, but
    the new one can.
  - Add documentation.

The end result is slightly smaller code for all boards. Which isn't
really the point, but at least it isn't any larger.

This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if
the board maintainers could help me test this on their boards. In
particular, the mimc200 port has lost a lot of code, so I'm hoping Mark
can help me out.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Mark Jackson <mpfj@mimc.co.uk>
Cc: Alex Raimondi <alex.raimondi@miromico.ch>
Cc: Julien May <julien.may@miromico.ch>

Changes since v1:
  * Enable pullup on NWAIT
  * Add missing include to portmux-pio.h
  * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
2008-09-01 14:20:41 +02:00
Haavard Skinnemoen
4926714041 hammerhead/mimc200: Use CONFIG_FLASH_CFI_DRIVER
CFG_FLASH_CFI_DRIVER was recently renamed CONFIG_FLASH_CFI_DRIVER.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-20 09:40:16 +02:00
Haavard Skinnemoen
33eac2b3d9 hammerhead: Add missing printf parameter to CONFIG_AUTOBOOT_PROMPT
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-20 09:28:36 +02:00
Julien May
5c374c9ee1 Add support for the hammerhead (AVR32) board
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

For more information see: http:///www.miromico.com/hammerhead

Signed-off-by: Julien May <mailinglist@miromico.ch>
[haavard.skinnemoen@atmel.com: various small fixes and adaptions]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-30 10:06:11 +02:00