Commit graph

18 commits

Author SHA1 Message Date
Jason Jin
5a58a73ceb Add flash cmd function to 8641HPCN ramboot
Also fixes some commmand for 8641 HPCN ramboot case.

Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-03-22 11:02:34 -05:00
Jon Loeliger
2047672684 Converted all 85xx boards to use a common FSL I2C driver.
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-20 15:50:15 -05:00
Jon Loeliger
7237c033b0 Moved i2c driver out of cpu/mpc86xx/i2c.c into drivers/fsl_i2c.c
in an effort to begin to unify the umpteen FSL I2C drivers that
are all otherwise very similar.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-19 11:34:11 -05:00
Jon Loeliger
8b283dbb3a Fix whitespace issues. 2006-10-10 17:16:04 -05:00
Haiying Wang
5567806b67 Change ramdiskaddr and dtbaddr
Remove PEX fluff commands.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-08-25 17:28:20 -05:00
Jin Zhengxiong
dabf9ef8c1 Add AHCI define and sata support for MPC8641HPCN board.
Signed-off-by:Jason Jin<jason.jin@freescale.com>
2006-08-23 10:40:10 -05:00
Zhang Wei
d8ea2acf5f Add dtb boot-up parameter to default boot commands.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
2006-08-23 10:32:08 -05:00
Jon Loeliger
fecf1c7e4d Fix BAT0 to actually be cacheable, non-guarded as documented.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-08-14 16:40:33 -05:00
John Traill
515ab8a62e Fix 8641HPCN timebase 2006-07-28 09:54:10 -05:00
Haiying Wang
bea3f28d28 Add support for reading and writing mac addresses to or from ID EEPROM.
Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.

U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).

If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2006-07-13 10:57:37 -05:00
Jin Zhengxiong
fcb28e7634 Fixed initrd issue by define big RAM
Signed-off-by:Jason Jin <Jason.jin@freescale.com>
2006-07-13 10:35:10 -05:00
Jin Zhengxiong-R64188
bc09cf3c2b Fix RTL8139 in big endian
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
signed-off-by: Wei Zhang <wei.zhang@freescale.com>
2006-06-27 10:29:32 -05:00
Jin Zhengxiong-R64188
fa7db9c377 Enable PCIE1 for MPC8641HPCN board
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2006-06-27 09:17:59 -05:00
Jon Loeliger
9a655876e5 Enable dual DDR controllers and interleaving. 2006-05-19 13:54:02 -05:00
Jon Loeliger
586d1d5abd Update 86xx address map and LAWBARs. 2006-05-19 13:54:02 -05:00
Jon Loeliger
18b6c8cd8a Get MPC8641HPCN flash images working.
Enable the CFI driver.
    Remove bogus LAWBAR7 cruft.
    Use correct TEXT_BASE, Fixup load script.
    Enable SPD EEPROM during DDR setup.
    Use generic RFC 1918 IP addresses by default.
2006-05-09 08:23:49 -05:00
Jon Loeliger
5c9efb36a6 Cleanup whitespaces and style issues.
Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
2006-04-27 10:15:16 -05:00
Jon Loeliger
debb7354d1 Initial support for MPC8641 HPCN board. 2006-04-26 17:58:56 -05:00