Commit Graph

16436 Commits

Author SHA1 Message Date
Lukasz Majewski b9300531c1 usb:udc: Remove duplicated USB definitions from include/linux/usb/ch9.h file
Remove the repeated USB descriptor code and use usbdescriptors.h file.
ch9.h file has been copied from linux and is needed for USB gadget
related work.
Now usbdescriptors.h and ch9.h shall be used together.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2012-05-20 08:32:32 +02:00
Marek Vasut 41b1f0ac2e USB: Document the QH and qTD antics in EHCI-HCD
The construction of QH and qTD lists in ehci_submit_async() call is cryptic
business, add at least a bit of comments so if someone is reading it, he can at
least reference the intel ehci manual (ehci-r10.pdf).

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-20 08:32:32 +02:00
Marek Vasut b8adb12095 USB: Drop cache flush bloat in EHCI-HCD
Discard the creepy cache flushing mechanisms in ehci-hcd.c and replace them with
more straightforward flushing. In the new approach, the flushing takes place
directly in ehci_submit_async() call instead of going through the QH list and
flushing all members and buffers. This discards a lot of weird bit operations
on the members of QH and qTD structures.

NOTE: Certainly, this flushes even qTDs which are possibly unused in some
transactions, though the overhead of the previous code was much higher than is
the overhead of flushing two more cache lines (which most probably aren't even
cached).

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-20 08:32:32 +02:00
Marek Vasut de98e8b22a USB: Drop ehci_alloc/ehci_free in ehci-hcd
These two functions were called only from ehci_submit_async(), therefore
dissolve them as part of ehci_submit_async() to get rid of all those static
variables.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-05-20 08:32:32 +02:00
Puneet Saxena f57661394a USB: Align buffers at cacheline
This avoids cache-alignment warnings shown in console
when a usb command is entered.

Whenever X bytes of unaligned buffer is invalidated, arm core
invalidates X + Y bytes as per the cache line size and throws
these warnings.

Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2012-05-20 08:32:32 +02:00
Mike Frysinger 66cf64107b usb: use noinline define
Building usb for Blackfin boards fails as we get linux/compiler.h
included which expands the "noinline" inside of the attribute and
we get attribute(attribute(noinline)).

Explicitly use the helper define to avoid this.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-05-20 08:32:31 +02:00
Stefan Roese e52fee9b04 NAND: Remove ONFI detection message to from bootup log
Without this patch, boot shows this messages upon NAND detection:

NAND:  ONFI flash detected
ONFI param page 0 valid
ONFI flash detected
ONFI param page 0 valid
128 MiB

With this patch, its back to the U-Boot "standard":

NAND:  128 MiB

Tested on x600 (SPEAr600).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:17:06 -05:00
Prabhakar Kushwaha 76d067ac33 driver/mtd:IFC: Fix possible memory leak
if priv->bank >= MAX_BANK, priv should be freed before returning ENODEV.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:15:24 -05:00
Prabhakar Kushwaha 807fc702e0 driver/mtd: IFC NAND: Add support of ONFI NAND flash
- Fix NAND_CMD_READID command for ONFI detect.
  - Add NAND_CMD_PARAM command to read the ONFI parameter page.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:13:50 -05:00
Heiko Schocher a35ea8070c mtd, nand: move some printfs to debug output.
current U-Boot shows on startup (for example on the enbw_cmc
board) the following printfs from the nand subsystem:

Flash: 2 MiB
NAND:  Bad block table found at page 65472, version 0x01
Bad block table found at page 65408, version 0x01
nand_read_bbt: Bad block at 0x000002980000
nand_read_bbt: Bad block at 0x000003240000
128 MiB
MMC:   davinci: 0

remove them to debug output, so it shows with this patch:

Flash: 2 MiB
NAND:  128 MiB
MMC:   davinci: 0

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:11:37 -05:00
Liu, Wentao 65683026a5 nand_util: correct YAFFS image write function
In function nand_write_skip_bad(),for YAFFS filesystem part,
write_oob() will return 0 when success, so when rval equals 0,
it should continue to write the next page, and no break.

Signed-off-by: Wentao, Liu <wentao.liu@intel.com>
Acked-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:08:45 -05:00
Scott Wood d2a97daf62 powerpc/85xx: fix NAND boot linker scripts for -fpic
GOT is now handled the way the main u-boot.lds does it.  Without this,
the boot hangs when built with newer GCC (since 4.6).  Older toolchains
hid the issue by converting -fpic to -fPIC.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-05-18 17:34:39 -05:00
Scott Wood 418396e212 nand: extend .raw accesses to work on multiple pages
A use for this is to read, modify, erase, and write an entire block as a
single unit, as a replacement for the biterr command.  This way gives
more flexibility in that you can also test multiple bit errors, errors
in the ECC, etc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-05-18 17:34:31 -05:00
Andy Fleming f50bf50d7f Improve MAKEALL parallel builds
The patch that added parallel builds broke MAKEALL -l, so this
fixes that. At the same time, it improves the termination so
that it shuts down the build threads if you cancel the build.
Lastly, it removes a bunch of debug code.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Tested-by: Wolfgang Denk <wd@denx.de>
2012-05-18 13:49:04 +02:00
Andy Fleming bb1c01eaf6 Remove extra boards from LIST_ixp
pdnb3 and scpu are explicitly on LIST_ixp, even though they are
also specified in boards.cfg as having cpu ixp. This means that
they will be built twice when doing ./MAKEALL ixp, or ./MAKEALL arm.

This was pointless before, but actually breaks things if you launch
both builds at the same time, as they overwrite each other.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-05-18 13:44:40 +02:00
Mike Frysinger de30122bb5 net: move bootfile init into eth_initialize
All arches init this the same way, so move the logic into the core
net code to avoid duplicating it everywhere else.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-15 17:32:33 -05:00
Mike Frysinger 50a47d0523 net: punt bd->bi_ip_addr
This field gets read in one place (by "bdinfo"), and we can replace
that with getenv("ipaddr").  After all, the bi_ip_addr field is kept
up-to-date implicitly with the value of the ipaddr env var.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-15 17:32:05 -05:00
Joe Hershberger e1902ac698 net: cosmetic: netconsole.c checkpatch compliance
Requires:
--ignore CONSIDER_KSTRTO

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:17:00 -05:00
Joe Hershberger 13dfe94379 net: cosmetic: tftp.* checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:16:52 -05:00
Joe Hershberger 6c3234a343 net: cosmetic: sntp.* checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:16:45 -05:00
Joe Hershberger c2faf4f901 net: cosmetic: rarp.* checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:16:36 -05:00
Joe Hershberger c9f6c91b48 net: cosmetic: nfs.* checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:16:27 -05:00
Joe Hershberger 48522bb503 net: cosmetic: net.c checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:16:19 -05:00
Joe Hershberger 66c7385a5f net: cosmetic: eth.c checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:16:10 -05:00
Joe Hershberger 3090b7e36c net: cosmetic: bootp.* checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:15:58 -05:00
Joe Hershberger b28e28bbce net: cosmetic: net.h checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:13:37 -05:00
Joe Hershberger db288a9602 net: Remove volatile from net API
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-05-15 17:10:04 -05:00
SRICHARAN R 2ca4a209a5 OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer
Signed-off-by: R Sricharan <r.sricharan@ti.com>
CC: Aneesh V <aneesh@ti.com>
CC: Tom Rini <trini@ti.com>
Acked-by: Aneesh V <aneesh@ti.com>
2012-05-15 08:31:41 +02:00
Tom Rini 49175c49ba ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT
As originally reported against beagleboard we currently have the
following error message reported in SPL:

U-Boot SPL 2012.04-00020-gb8310b9-dirty (Apr 25 2012 - 18:49:57)
Texas Instruments Revision detection unimplemented
OMAP SD/MMC: 0
timed out in wait_for_bb: I2C_STAT=1000
reading u-boot.img
....

The reason for above message is that when booting from MMC, I2C needs to
be initialized to talk with the TWL4030.  On OMAP3 I2C is only
initalized in SPL if CONFIG_SPL_BOARD_INIT is set.

Cc: Thomas Weber <weber@corscience.de>
Cc: Steve Sakoman <sakoman@gmail.com>

Original patch for Beagleboard is:
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>

Extended to cover all other boards:
Signed-off-by: Tom Rini <trini@ti.com>
2012-05-15 08:31:41 +02:00
Tom Rini e0820ccc38 ARM: omap3: Set SPL stack size to 8KB, image to 54KB.
With older toolchains it is possible to not fit entirely into the 45KB
that we had assigned to SPL.  Adjust to allow for 8KB of stack (which
should be more than required) and 54KB of text/data.

Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-05-15 08:31:41 +02:00
Matt Porter a3c3fabb0f arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx
In warm reset conditions on OMAP36xx/AM/DM37xx the rom code
incorrectly sets the DPLL4 clock input divider to /6.5 which
is an invalid value unless the input clock is 13MHz. When a JTAG
emulator is attached, a warm reset is necessary after the emulator
gains control of the process. This results in a loss of serial
output due to the invalid DPLL4 settings.

This patch fixes the issue by resetting the DPLL4 clock input
divider to /1 when the input clock is not 13MHz. AM/DM37x TRM
section 3.5.3.3.3.2.1 specifies that the /6.5 setting is only
used when the input clock is 13MHz.

Signed-off-by: Matt Porter <mporter@ti.com>
2012-05-15 08:31:41 +02:00
Jon Hunter c176dd0442 OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree
For OMAP4 boards, such as the panda-es, that have 1GB of memory the linux
kernel fails to locate the device tree blob on boot. The reason being is that
u-boot is copying the DT blob to the upper part of RAM when booting the kernel
and the kernel is unable to access the blob. By setting the fdt_high variable
to either 0xffffffff (to prevent the copy) or 0xac000000 (704MB boundary
of memory for OMAP4) the kernel is able to locate the DT blob and boot.

Based upon following patch by Dirk Behme set the fdt_high variable to allow
booting with device tree on OMAP4 boards.

"7e9603e i.mx6q: configs: Add fdt_high and initrd_high variables"

Cc: Sricharan R <r.sricharan@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
2012-05-15 08:31:41 +02:00
Tero Kristo 2d622b03f8 omap4: do not enable auxiliary cores
Booting up these cores (dsp / ivahd / cortex-m3) is bad without
firmware running on them, and they will hang preventing any kind
of sleep transitions later on with the kernel.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:41 +02:00
Tero Kristo 71ee921de0 omap4: do not enable fs-usb module
If this is done in the bootloader, the FS-USB will later be stuck into
intransition state, which will prevent the device from entering idle.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2012-05-15 08:31:41 +02:00
Tero Kristo 954211cb8c omap4: panda: disable uart2 pads during boot
If uart2 is enabled during boot, spurious wifi chip transmission will
hang the module and it is impossible to recover from this situation
without hard reset. This will prevent any l4_per domain idle
transitions.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2012-05-15 08:31:40 +02:00
Enric Balletbo i Serra f1e445c3c9 igep00x0: change mpurate from 500 to auto
This patch changes the default mpurate variable from 500 to auto on
all IGEP boards, with this the default rate is autoselected.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-05-15 08:31:40 +02:00
Enric Balletbo i Serra 1b8ec016cd igep00x0: enable the use of a plain text file
Based on commit cf073e49bc for beagleboard

Using the new env import command it is possible to use plain text files instead
of script-images. Plain text files are much easier to handle.

E.g. If your boot.scr contains the following:
 -----------------------------------
setenv dvimode 1024x768-16@60
run loaduimage
run mmcboot
-----------------------------------
you could create a file named uEnv.txt and use that instead of boot.scr:
 -----------------------------------
dvimode=1024x768-16@60
uenvcmd=run loaduimage; run mmcboot
-----------------------------------
The variable uenvcmd (if existent) will be executed (using run) after uEnv.txt
was loaded. If uenvcmd doesn't exist the default boot sequence will be started,
therefore you could just use
-----------------------------------
dvimode=1024x768-16@60
-----------------------------------
as uEnv.txt because loaduimage and mmcboot is part of the default boot sequence

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-05-15 08:31:40 +02:00
Lucas Stach b8cb5194f0 tegra2: trivially enable 13 mhz crystal frequency
This is needed for upcoming Toradex Colibri T20 upstream support.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Simon Glass 2cacf516df tegra: Enable keyboard for Seaboard
This enables the standard keyboard on Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Simon Glass 4120c271c3 tegra: Switch on console mux and use environment for console
All tegra boards will use these options by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Rakesh Iyer 6642a681e4 tegra: Add tegra keyboard driver
Add support for internal matrix keyboard controller for Nvidia Tegra
platforms. This driver uses the fdt decode function to obtain its key
codes.

Support for the Ctrl modifier is provided. The left and right ctrl keys are
dealt with in the same way.

This uses the new keyboard input library (drivers/input/input.c) to decode
keys and handle most of the common input logic. The new key matrix library
is also used to decode (row, column) key positions into key codes.

The intent is to make this driver purely about dealing with the hardware.

Key detection before the driver is loaded is supported. This key will be
picked up when the keyboard driver is initialized.

Modified by Bernie Thompson <bhthompson@chromium.org> and
Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix
and various other things.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Anton Staff c3ab91f064 tegra: fdt: Add keyboard definitions for Seaboard
Seaboard uses a QUERTY keyboard. We add key codes for this to
enable key scanning to work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Anton Staff 8436fbc392 tegra: fdt: Add keyboard controller definition
The Tegra keyboard controller provides a simple interface to a matrix
keyboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Simon Glass 7e91f40dd5 tegra: Add keyboard support to funcmux
Add funcmux support for the default keyboard mapping.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Bernie Thompson 92c27c5193 input: Add support for keyboard matrix decoding from an fdt
Matrix keyboards require a key map to be set up, and must also deal with
key ghosting.

Create a keyboard matrix management implementation which can be leveraged
by various keyboard drivers. This includes code to read the keymap from
the FDT and perform debouncing.

Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Simon Glass 9bc590e511 input: Add generic keyboard input handler
Add a module which understands converting key codes (or scan codes)
to ASCII characters. It includes FIFO support and can call back to
drivers to read new characters when its FIFO is empty.

Keycode maps are provided for un-modified, shift and ctrl keys.

The plan is to use this module where such mapping is required.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Simon Glass d81e270d95 input: Add linux/input.h for key code support
We want to able to decode Linux fdt keymaps, so bring part of this
enormous header file over to U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Anton Staff bed4d89277 fdt: Add fdtdec functions to read byte array
Sometimes we don't need a full cell for each value. This provides
a simple function to read a byte array, both with and without
copying it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Simon Glass 649d0ffbc1 tegra: Enable LP0 on Seaboard
This enables LP0 to support suspend / resume on Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Simon Glass d376e8d228 tegra: fdt: Add EMC data for Tegra2 Seaboard
This adds timings for T20 and T25 Seaboards, using the bindings found here:

http://patchwork.ozlabs.org/patch/132928/

We supply both full speed options for normal running, and half speed options
for testing / development.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00