Commit graph

32 commits

Author SHA1 Message Date
Stefan Roese
3e11ae80fe ppc4xx: Add 667/133 (CPU/PLB) frequency setup to Sequoia bootstrap command
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-18 07:44:56 +02:00
Stefan Roese
e2e93442e5 ppc4xx: Fix bug in I2C bootstrap values for Sequoia/Rainier
The I2C bootstrap values that can be setup via the "bootstrap" command,
were setup incorrect regarding the generation of the internal sync PCI
clock. The values for PLB clock == 133MHz were slighly incorrect and the
values for PLB clock == 166MHz were totally incorrect. This could
lead to a hangup upon booting while PCI configuration scan.

This patch fixes this issue and configures valid PCI divisor values
for the sync PCI clock, with respect to the provided external async
PCI frequency.

Here the values of the formula in the chapter 14.2 "PCI clocking"
from the 440EPx users manual:

AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz

33MHz async PCI frequency:
PLB = 133:
=>      32 <= 44.3 <= 65        (div = 3)

PLB = 166:
=>      32 <= 55.3 <= 65        (div = 3)

66MHz async PCI frequency:
PLB = 133:
=>      65 <= 66.5 <= 132       (div = 2)

PLB = 166:
=>      65 <= 83 <= 132         (div = 2)

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-15 11:39:00 +02:00
Stefan Roese
5a5958b7de ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.

This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-15 11:29:33 +02:00
Gary Jennejohn
81b73dec16 ppc4xx: (Re-)Enable CONFIG_PCI_PNP on AMCC 440EPx Sequoia
The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
set to non-zero, because it doesn't support MRM (memory-read-
multiple) correctly. We now added the possibility to configure
this register in the board config file, so that the default value
of 8 can be overridden.

Here the details of this patch:

o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
  board-specific settings. As an example the sequoia board requires 0.
  Idea from Stefan Roese <sr@denx.de>.
o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
  PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
  CFG_PCI_CACHE_LINE_SIZE to 0.

Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-31 15:21:46 +02:00
Stefan Roese
02ba7022f6 ppc4xx: Update Sequoia/Rainier bootstrap command
As suggested by David Mitchell, here an update for the Sequoia/Rainier
bootstrap command.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-16 09:52:29 +02:00
Niklaus Giger
f780b83316 resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
2007-07-04 10:14:07 +02:00
Stefan Roese
e4feb7638c Merge with git://www.denx.de/git/u-boot.git 2007-06-25 20:20:30 +02:00
Stefan Roese
466fff1a7b ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 15:57:39 +02:00
Igor Lisitsin
a11e06965e Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.

Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
2007-06-22 23:21:01 +02:00
Stefan Roese
b3f9ec86e3 ppc4xx: Add bootstrap command for AMCC Sequoia (440EPx) eval board
This patch adds a board command to configure the I2C bootstrap EEPROM
values. Right now 533 and 667MHz are supported for booting either via NOR
or NAND FLASH. Here the usage:

=> bootstrap 533 nor        ;to configure the board for 533MHz NOR booting
=> bootstrap 667 nand       ;to configure the board for 667MHz NNAND booting

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-19 17:22:44 +02:00
Stefan Roese
f3679aa13d Merge with /home/stefan/git/u-boot/bamboo-nand 2007-06-01 16:15:34 +02:00
Stefan Roese
155a96478a ppc4xx: Undo Sequoia patch for dynamic EBC speed support of 83MHz
This patch undoes the patch by Jeff Mann with commit-id ada4697d. As
suggested by AMCC it is not recommended to dynamically change the EBC
speed after bootup. So we undo this change to be on the safe side.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 15:58:19 +02:00
Stefan Roese
9d9096043e ppc4xx: Update Sequoia NAND booting support with ECC
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 15:29:04 +02:00
Jeffrey Mann
ada4697d02 [PATCH] Run new sequoia boards with an EBC speed of 83MHz
Because the Sequoia board does not boot with an EBC faster than 66MHz,
the clock divider are changed after the initial boot process.

This allows for maximum clocking speeds  to be achieved on newer boards.
Sequoia boards with 666.66 MHz processors require that the EBC divider
be set to 3 in order to start the initial boot process at a slower EBC
speed. After the initial boot process, the divider can be set back to 2,
which will cause the boards to run at 83.333MHz. This is backward
compatible with boards with 533.33 MHz processors, as these boards will
already be set with an EBC divider of 2.

Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
2007-05-16 13:23:10 +02:00
Stefan Roese
f544ff6656 ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND booting
Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
for the 4k NAND boot image so define bus_frequency to 133MHz here
which is save for the refresh counter setup.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-05 08:29:01 +02:00
Stefan Roese
e50b791b3f Merge with /home/stefan/git/u-boot/acadia 2007-03-24 15:59:23 +01:00
Stefan Roese
2db633658b [PATCH] Small Sequoia cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24 15:55:58 +01:00
Stefan Roese
992423ab43 ppc4xx: Fix file mode of sequoia.c
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08 23:00:08 +01:00
John Otken john@softadvances.com
8ce16f55c7 ppc4xx: Clear Sequoia/Rainier security engine reset bits
Signed-off-by: John Otken john@softadvances.com <john@softadvances.com>
2007-03-08 22:49:22 +01:00
Stefan Roese
07b7b0037a [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
As provided by the AMCC applications team, this patch optimizes the
DDR2 setup for 166MHz bus speed. The values provided are also save
to use on a "normal" 133MHz PLB bus system. Only the refresh counter
setup has to be adjusted as done in this patch.

For this the NAND booting version had to include the "speed.c" file
from the cpu/ppc4xx directory. With this addition the NAND SPL image
will just fit into the 4kbytes of program space. gcc version 4.x as
provided with ELDK 4.x is needed to generate this optimized code.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-06 07:47:04 +01:00
Wolfgang Denk
f11033e739 Merge with /home/hs/SC3/u-boot
Some code cleanup.
2007-01-15 13:41:04 +01:00
Stefan Roese
e0b9ea8c8a [PATCH] Update Sequoia (440EPx) to display board rev and PCI bus speed
Now the board revision and the current PCI bus speed are printed after
the board message.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-13 07:57:51 +01:00
Stefan Roese
a78bc443ae [PATCH] Clear PLB4A0_ACR[WRP] on Sequoia (440EPx)
This fix will make the MAL burst disabling patch for the Linux
EMAC driver obsolete.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-05 10:40:36 +01:00
Stefan Roese
0238898382 [PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
This code will optimize the DDR2 controller setup on a board specific
basis.

Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-05 10:38:05 +01:00
Stefan Roese
1b3c360c23 [PATCH] Fix sequoia flash autodetection (finally correct)
Now 32MByte and 64MByte FLASH is know to work and other
configurations should work too.

Signed-off-by: Stefan Roese <sr@denx.de>
2006-12-22 14:29:40 +01:00
Marian Balakowicz
8318fbf8cc Fix sequoia separate object direcory building problems. 2006-10-23 22:17:05 +02:00
Wolfgang Denk
2b208f5308 Move "ar" flags to config.mk to allow for silent "make -s"
Based on patch by Mike Frysinger, 20 Jun 2006
2006-10-09 01:02:05 +02:00
Wolfgang Denk
511d0c72b8 Coding style cleanup 2006-10-09 00:42:01 +02:00
Stefan Roese
d373325efd Fix reset problem in sequoia sdram init code
Patch by Stefan Roese, 23 Sep 2006
2006-10-04 07:12:27 +02:00
Stefan Roese
854bc8da75 Add support for AMCC Rainier PPX440GRx eval board
Patch by Stefan Roese, 13 Sep 2006
2006-09-13 13:56:49 +02:00
Stefan Roese
d12ae80889 Add NAND environment support for PPC440EPx Sequoia NAND boot config
Patch by Stefan Roese, 12 Sep 2006
2006-09-12 20:19:10 +02:00
Stefan Roese
887e2ec9ec Add support for AMCC Sequoia PPC440EPx eval board
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
  in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
  please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
  in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
2006-09-07 11:51:23 +02:00