Commit Graph

5 Commits

Author SHA1 Message Date
Haavard Skinnemoen a8092c021d avr32: Fix theoretical race in udelay()
If the specified delay is very short, the cycle counter may go past the
"end" time we are waiting for before we get around to reading it.

Fix it by checking the different between the cycle count "now" and the
cycle count at the beginning. This will work as long as the delay
measured in number of cycles is below 2^31.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen 0ba8eed28b AVR32: Include <div64.h> instead of <asm/div64.h>
include/asm-avr32/div64.h was recently moved to include/div64.h, but
cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
the patch was merged perhaps?)

This patch updates cpu/at32ap/interrupts.c so that the avr32 port
compiles again.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-08-13 17:22:31 +02:00
Haavard Skinnemoen 1f4f2121c2 AVR32: Relocate u-boot to SDRAM
Relocate the u-boot image into SDRAM like everyone else does. This
means that we can handle much larger .data and .bss than we used to.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 15:20:27 +02:00
Haavard Skinnemoen df548d3c3e AVR32: Resource management rewrite
Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.

As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 15:20:27 +02:00
Wolfgang Denk 72a087e047 Add AT32AP CPU and AT32AP7000 SoC support
Patch by Haavard Skinnemoen, 06 Sep 2006

This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.

The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2006-10-24 14:27:35 +02:00