Commit Graph

14 Commits

Author SHA1 Message Date
Nickey Yang Nickey Yang 0fc41e551e rockchip: video: fix mpixelclock in rockchip HDMI
Correct mpixelclock errors in rockchip_phy_config[] and rockchip_mpll_cfg[].

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2017-01-11 20:23:50 -07:00
Simon Glass 095e6c1f2d rockchip: video: Avoid using u8 in the HDMI driver
It makes not sense using u8 to hold a value on a 32-bit or 64-bit machine.
It can only bloat the code by forcing the compiler to mask the value.
Change it to uint.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass 987a404aa1 rockchip: video: Check for device in use
Check whether a display device is in use before using it. Add a comment as
to why two displays cannot currently be used at the same time.

This allows us to remove the device-tree change that disables vopb on
jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass 9ed6826060 rockchip: video: Correct VOP clock selection
This code incorrectly uses the oscillator. It should use the clock
selected in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 135aa95 (clk: convert API to match reset/mailbox style)
2016-11-25 17:59:30 -07:00
Simon Glass e4ab3d712a rockchip: video: Correct HDMI data source selection
This code currently always selects the second source. It only worked
because both sources are set up.

With the change to only init video devices that are present in the stdout
environment variable, this fails. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass c3aad6f65b rockchip: Use rockchip_get_clk() to obtain the SoC clock
The current code picks the first available clock. In U-Boot proper this is
the oscillator device, not the SoC clock device. As a result the HDMI display
does not work.

Fix this by calling rockchip_get_clk() instead.

Fixes: 135aa950 (clk: convert API to match reset/mailbox style)
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2016-07-25 20:46:45 -06:00
Sjoerd Simons 70c440e5bd rockchip: video: Lower hpd wait time
Waiting 30 seconds for the hpd to go high seems a bit much, especially
on headless boots. Lowering the timeout to 300ms.

Sending as RFC because frankly i don't know what a sensible timeout is
here, but 30 seconds is clearly not it :)

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped RFC tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-05 10:38:56 -06:00
Stephen Warren 135aa95002 clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
  provider now implements a single set of clocks. This provides a simpler
  conceptual interface to clients, and better aligns with device tree
  clock bindings.
* Clocks are now identified with a single "struct clk", rather than
  requiring clients to store the clock provider device and clock identity
  values separately. For simple clock consumers, this isolates clients
  from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
  clk-uclass.h contains the provider API. This aligns with the recently
  added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
  can customize these operations if needed. This also aligns with the
  recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
  clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.

Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.

test/py passes for sandbox (which invokes the dm clk test amongst
others).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00
Simon Glass b55e04a021 rockchip: video: Flush the cache when the display is updated
Enable this option to correct display artifacts when a write-back cache is
in use.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:08 -06:00
Jacob Chen 8530783594 rockchip: video: Add LVDS support in vop driver
LVDS have a different display out mode, add code to get right flag.

The vop_ip decide display device and the remote_vop_id decide which
vop was being used. So we should use the remote_vop_id to set DCLK_VOP.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-03-14 22:24:10 +01:00
Jacob Chen 35ac89dd8f rockchip: video: Add a display driver for rockchip LVDS
Some Rockchip SoCs support LVDS output. Add a display driver for this so
that these displays can be used on supported boards.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-03-14 22:06:33 +01:00
Simon Glass 7b7ad5c31c rockchip: video: Add a video-output driver
Some rockchip SoCs include video output (VOP). Add a driver to support this.
It can output via a display driver (UCLASS_DISPLAY) and currently HDMI and
eDP are supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass 5852d539ea rockchip: video: Add a display driver for rockchip eDP
Some Rockchip SoCs support embedded DisplayPort output. Add a display driver
for this so that these displays can be used on supported boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass c253948341 rockchip: video: Add a display driver for rockchip HDMI
Some Rockchip SoCs support HDMI output. Add a display driver for this so
that these displays can be used on supported boards.

Unfortunately this driver is not fully functional. It cannot reliably read
EDID information over HDMI. This seems to be due to the clocks being
incorrect - the I2C bus speed appears to be up to 100x slower than the
clock settings indicate. The root cause may be in the clock logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00