Commit graph

7159 commits

Author SHA1 Message Date
Thierry Reding
aa4418770e ARM: tegra: Initialize timer earlier
A subsequent patch will enable the use of the architected timer on
ARMv8. Doing so implies that udelay() will be backed by this timer
implementation, and hence the architected timer must be ready when
udelay() is first called. The first time udelay() is used is while
resetting the debug UART, which happens very early. Make sure that
arch_timer_init() is called before that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-28 10:30:18 -07:00
Thierry Reding
32b3234f09 ARM: tegra: Use standard cache enable for 64-bit
On 64-bit SoCs the I-cache isn't enabled in early code, so the default
cache enable functions for 64-bit ARM can be used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-07-28 10:30:18 -07:00
Thierry Reding
00f782a9f8 ARM: tegra: Restrict usable RAM to 32-bit on 64-bit SoCs
Most peripherals on Tegra can do DMA only to the lower 32-bit
address space, even on 64-bit SoCs. This limitation is
typically overcome by the use of an IOMMU. Since the IOMMU is
not entirely trivial to set up and serves no other purpose
(I/O protection, ...) in U-Boot, restrict 64-bit Tegra SoCs to
the lower 32-bit address space for RAM. This ensures that the
physical addresses of buffers that are programmed into the
various DMA engines are valid and don't alias to lower addresses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-07-28 10:30:17 -07:00
Thierry Reding
8b19dff579 armv8/cache: Fix page table creation
While generating the page tables, a running integer index is shifted by
SECTION_SHIFT (29) and causes overflow for any integer bigger than 7.
The page tables therefore alias to the same 8 sections and cause U-Boot
to hang once the MMU is enabled.

Fix this by making the index a 64-bit unsigned integer and so avoid the
overflow.

swarren notes: currently "i" ranges from 0..8191 on all ARM64 boards, and
"j" varies depending on RAM size; from 4 to 11 for a board with 4GB at
physical address 2GB, as some Tegra boards have.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-28 10:30:17 -07:00
Thierry Reding
502a2aff76 arm64: Handle arbitrary CONFIG_SYS_MALLOC_F_LEN values
The encoding of the sub instruction used to handle CONFIG_SYS_MALLOC_F_LEN
can only accept certain values, and the set of acceptable values differs
between the AArch32 and AArch64 instructions sets. The default value of
CONFIG_SYS_MALLOC_F_LEN works with either ISA. Tegra uses a non-default
value that can only be encoded in the AArch32 ISA. Fix the AArch64 crt0
assembly so it can handle completely arbitrary values.

Signed-off-by: Thierry Reding <treding@nvidia.com>
[twarren: trimmed Thierry's patch to remove changes already present]
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, cleaned up patch, wrote description, re-wrote subject]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-27 15:54:28 -07:00
Thierry Reding
f49357baad ARM: tegra: Build warning fixes for 64-bit
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, stripped out changes not strictly related to warnings]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-27 15:54:18 -07:00
Simon Glass
537e967361 tegra124: Implement spl_was_boot_source()
Add an implementation of this function for Tegra.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-27 14:03:06 -07:00
Tom Rini
26473945ad Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-07-25 09:04:18 -04:00
Hans de Goede
a51c832cc1 sunxi: ga10h: Enable both otg and regular usb host controllers
This allows using devices plugged into both ports of the tablet.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
9ecce9707b sunxi: musb: Stop treating not having a vbus-det gpio as an error
On some boards the otg is wired up in host-only mode in this case we
have no vbus-det gpio.

Stop logging an error from sunxi_usb_phy_vbus_detect() in this case, and
stop treating sunxi_usb_phy_vbus_detect() returning a negative errno, as
if a charger is plugged into the otg port.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
91183babea sunxi: musb: Use device-model for musb host mode
Modify the sunxi musb glue to use the device-model for musb host mode.

This allows using musb in host mode together with other host drivers
such as ehci / ohci, which is esp. useful on boards which use the
musb controller in host-only mode, these boards have e.g. an usb-a
receptacle or an usb to sata converter attached to the musb controller.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
d42faf3198 sunxi: musb: Move musb config and platdata to the sunxi-musb glue
Move the musb config and platdata to the sunxi-musb glue, which is where
it really belongs. This is preparation patch for adding device-model
support for the sunxi-musb-host code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
48c06c98ec sunxi: usb-phy: Add support for reading otg id pin value
Add support for reading the id pin value of the otg connector to the usb
phy code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:54 +02:00
Hans de Goede
de1502c937 sunxi: Enable CMD_USB and USB_STORAGE by default on sunxi
Start using the new Kconfig options which are available for these now,
and simply always enable them by selecting them as sunxi builds always
include USB support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-25 11:22:54 +02:00
Tom Rini
4536882710 sunxi: Update selects in arch/arm/Kconfig for DM conversions
With certain features being convert to DM now we want sunxi to default
to having DM enabled for ETH/SERIAL and USB in some cases.

Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Tom Rini <trini@konsulko.com>
[hdegoede@redhat.com: Also select CONFIG_USB for all sunxi builds]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-25 11:22:54 +02:00
Hans de Goede
d08980de02 sunxi: Remove bogus uart entry from utoo-p66 dts file
At one point in time the utoo-p66 dts file in the kernel had a bogus
uart entry, and it seems like we synced with the kernel at just the wrong
moment.

This commit removes the bogus uart entry, which breaks booting the utoo-p66
when DM_SERIAL=y.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-25 11:22:54 +02:00
Tom Rini
6f4e050639 Merge git://git.denx.de/u-boot-usb 2015-07-24 16:39:56 -04:00
Daniel Kochmański
a151403fd2 sunxi: spl: Detect at runtime where SPL was read from
Make possible using a single `u-boot-sunxi-with-spl.bin` binary for both NAND
memory and SD card. Detection where SPL was read from is implemented in
`spl_boot_device`.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Some small coding style fixes]
Acked-by: Hans De Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Daniel Kochmański
645c48f50e sunxi: Create helper function veryfing valid boot signature on MMC
This patch extracts checking for valid SD card "eGON.BT0" signature from
`board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`.

Buffer for mmc sector is allocated and freed at runtime. `panic` is
triggered on malloc failure.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Stefan Roese
8ed43b966c arm: mvebu: Add SPL SDIO/MMC boot support
This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since
I don't know of a way to test the boot-device upon runtime, this patch
hardcodes the spl_boot_device instead.

Tested on Marvell DB-88F6820-GP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
2015-07-24 09:45:30 +02:00
Tom Rini
413978d118 Merge git://git.denx.de/u-boot-uniphier 2015-07-23 11:46:05 -04:00
Masahiro Yamada
f1d794531c ARM: dts: UniPhier: add I2C ch4 device node for PH1-sLD3
This I2C device is used SoC-internally for controlling the DMD core.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:42:34 +09:00
Masahiro Yamada
3365b4eb55 ARM: UniPhier: add PH1-sLD3 SoC support
The init code for UMC (Unified Memory Controller) and PLL has not
been mainlined yet, but U-boot proper should work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:42:22 +09:00
Masahiro Yamada
6b71e6d7ac ARM: dts: UniPhier: add device-specific compatible string for EEPROM
For the record, describe exactly which device of which vendor
is used on this board.

I2C EEPROM is bound by the generic compatible string, "i2c-eeprom",
so this commit has no impact on the functionality.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:41:38 +09:00
Tom Rini
3c9cc70d71 Merge git://git.denx.de/u-boot-marvell 2015-07-23 09:02:28 -04:00
Stefan Roese
ad6ac7aa00 arm: mvebu: a38x: Use correct PEX register access macros
Remove the incorrect PEX macros from the DDR header. And insert the
correct ones in ctrl_pex.h instead.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:39:25 +02:00
Stefan Roese
ff9112df8b arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory
With the upcoming addition of the Armada 38x DDR support, which is not
compatible to the Armada XP DDR init code, we need to introduce a new
directory infrastructure. To support multiple Marvell DDR controller.

This will be the new structure:

     drivers/ddr/marvell/axp
     Supporting Armada XP (AXP) devices (and perhaps Armada 370)

     drivers/ddr/marvell/a38x
     Supporting Armada 38x devices (and perhaps Armada 39x)

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:38:30 +02:00
Stefan Roese
edb4702533 arm: mvebu: Add Armada 38x SERDES / PHY init code from Marvell bin_hdr
This code is ported from the Marvell bin_hdr code into mainline
SPL U-Boot. It needs to be executed very early so that the devices
connected to the serdes PHY are configured correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:38:14 +02:00
Stefan Roese
29b103c733 arm: mvebu: serdes: Move Armada XP SERDES / PHY init code into new directory
With the upcoming addition of the Armada 38x SPL support, which is not
compatible to the Armada XP SERDES init code, we need to introduce a new
directory infrastructure. So lets move the AXP serdes init code into
a new directory. This way the A38x code can be added in a clean way.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:38:05 +02:00
Stefan Roese
9f62b44ec7 arm: mvebu: Disable MMU before changing register base address
Only with disabled MMU its possible to switch the base register address on
Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not
accessible, as its still locked to cache.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:37:36 +02:00
Stefan Roese
e3cccf9eb2 arm: mvebu: spl.c: Add call to board_early_init_f()
Pin muxing needs to be done before UART output, since on A38x the UART
pins need some re-muxing for output to work.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:37:20 +02:00
Stefan Roese
21427708a6 arm: mvebu: Use default reg base address for SPL on A38x
On A38x switching the regs base address without running from
SDRAM doesn't seem to work. So let the SPL still use the
default base address and switch to the new address in the
mail u-boot later.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:37:10 +02:00
Stefan Roese
ade741b389 arm: mvebu: Call timer_init early before PHY and DDR init
Without calling timer_init(), the xdelay() functions return immediately.
We need to call timer_init() early, so that these functions work and
the PHY and DDR init code works correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-23 08:30:58 +02:00
Anton Schubert
e863f7f051 arm: mvebu: add Armada XP SATA support
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.

Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-23 08:30:58 +02:00
Masahiro Yamada
5f7e310467 x86: delete unneeded declarations of disable_irq() and enable_irq()
These two declarations in arch/x86/include/asm/interrupt.h conflict
with ones in include/linux/compat.h, so x86 boards cannot include
<linux/compat.h>.

The comment /* arch/x86/lib/interrupts.c */ is bogus now, and we do
not see any definitions of disable_irq() and enable_irq() in there.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-22 07:30:31 -06:00
Jiandong Zheng
854cbd2977 usb: gadget: bcm_udc_otg files
Add the required files for the Broadcom UDC OTG interface.

Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
2015-07-22 08:57:54 +02:00
Paul Kocialkowski
17da3c0c8c usb: Fastboot function config for better consistency with other functions
USB download gadget functions such as thor and dfu have a separate config option
for the USB gadget part of the code, independent from the command part.
This switches the fastboot USB gadget to the same scheme, for better
consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
2015-07-22 08:57:53 +02:00
Nikhil Badola
909a1ab2f0 include: usb: Move USB controller base address mapping
Move USB controller Base address mapping from ls102xa immap
to fsl xhci header. This is required to remove any warnings when
controller base addresses are mapped for multiple platforms
in their respective files.

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
2015-07-22 08:55:45 +02:00
Ramneek Mehresh
d09e401b43 arch: arm: fsl: Add XHCI support for LS1021A
Add base register address information for USB
XHCI controller on LS1021A

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:45 +02:00
Simon Glass
0503e8207c dm: test: Add a size to each reg property
Each sandbox peripheral should have a size as well as a base address. This
is required for regmaps to work, so make this change for all nodes that have
an address.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:33 -06:00
Simon Glass
04035fd36c dm: test: Add a test for the system controller uclass
Add a test to confirm that we can access system controllers and find their
driver data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:33 -06:00
Simon Glass
3c43fba3d2 dm: test: Add a test for the LED uclass
Add a test to confirm that we can adjust LEDs using the led_gpio driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
8e6cc46178 dm: test: Add a test for the mmc uclass
Add a test to confirm that we can probe this device. Since there is no
MMC stack support in sandbox at present, this is as far as the test goes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
64ce0cad9e dm: test: Add a test for the ram uclass
Add a test to confirm that we can probe this device and get information on
the available RAM.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
5010d98f02 sandbox: Use the reset driver to handle reset
Move sandbox over to use the reset uclass for reset, instead of a direct
call to do_reset(). This allows us to add tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:31 -06:00
Simon Glass
dc6f4d3a55 sandbox: Support multiple reset types
Add settings for the last reset generated, and the types of resets which
are permitted. This will be used for testing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:31 -06:00
Simon Glass
6a1c7cef14 dm: test: Add tests for the clk uclass
Add tests of each API call using a sandbox clock device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:30 -06:00
Simon Glass
30db918768 zynq: Rename struct clk_ops to zynq_clk_ops
Since we want clk_ops to be used in U-Boot as a whole, rename the Zynq
version until it can be converted to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:29 -06:00
Simon Glass
4eae498e68 dm: arm: Put driver model I2C drivers before legacy ones
Driver-model I2C drivers can be picked up by the linker script rule for
legacy drivers. Change the order to avoid this.

We could make the legacy code depend on !CONFIG_DM_I2C but that is not
necessary and it is good to keep conditions to a minimum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:21 -06:00
Simon Glass
fa78e0a371 dm: Reduce SPL device tree size
The SPL device tree size must be minimised to save memory. Only include
properties that are needed by SPL - this is determined by the presence
of the "u-boot,dm-pre-reloc" property. Also remove a predefined list of
unused properties from the nodes that remain.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:21 -06:00