Commit graph

32 commits

Author SHA1 Message Date
Stefan Roese
fdd1247a66 ppc4xx: Individual handling of ddr2_fixed.c for canyonlands_nand build
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-14 12:26:16 +02:00
Stefan Roese
4f27098e5b ppc4xx: Adapt Canyonlands fixed DDR2 setup to new DIMM module
This patch changes the Canyonlands/Glacier fixed DDR2 controller setup
used for NAND booting to match the values needed for the new 512MB
DIMM modules shipped with the productions boards:

Crucial: CT6464AC667.8FB

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-30 14:51:36 +02:00
Wolfgang Denk
926662762e Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash 2008-04-25 11:10:17 +02:00
Stefan Roese
499e7831e1 ppc4xx: Change Canyonlands to support booting from 2k page NAND devices
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:30:49 +02:00
Stefan Roese
5e182dce04 ppc4xx: Adjust Canyonlands fixed DDR2 setup (NAND booting) to 512MB SODIMM
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:30:39 +02:00
Stefan Roese
46f373838e nand_spl: Update nand_spl to support 2k page size NAND devices
This patch adds support for booting from 2k page sized NAND device
(e.g. Micron 29F2G08AAC).

Tested on AMCC Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:12:46 +02:00
Stefan Roese
71665ebf88 ppc4xx: Add Canyonlands NAND booting support
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.

This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.

Tested with 512 byte page NAND device (32MByte) on Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:05 +01:00
Wolfgang Denk
64134f0112 Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections
With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]

For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.

The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-12 20:31:39 +01:00
Marcel Ziswiler
10c7382bc5 fix various comments
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-01-09 21:50:47 +01:00
Marcel Ziswiler
7817cb2083 fix comments with new drivers organization
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-01-09 21:48:49 +01:00
Stefan Roese
fe9c26b330 ppc4xx: Fix Sequoia NAND booting target
The Sequoia NAND booting target now uses the recently extracted
cpu/ppc4xx/denali_data_eye.c file too.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-01-04 12:00:01 +01:00
Stefan Roese
fb83a65c60 ppc4xx: Fix compilation problem of kilauea/haleakala nand booting target
Use correct link to nand_ecc now located in drivers/mtd/nand/ for the
platforms mentioned above.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-28 06:06:04 +01:00
Stefan Roese
9caeaadf50 Merge commit 'u-boot/master' into for-1.3.1
Conflicts:

	drivers/rtc/Makefile
2007-12-11 11:34:54 +01:00
Jean-Christophe PLAGNIOL-VILLARD
59829cc189 drivers/mtd : move mtd drivers to drivers/mtd
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-11-25 23:28:52 +01:00
Stefan Roese
3d6cb3b24a ppc4xx: Add AMCC Kilauea/Haleakala NAND booting support
This patch adds NAND booting support for the AMCC 405EX(r) eval boards.
Again, only one image supports both targets.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-03 12:08:28 +01:00
Stefan Roese
5d96d40d3f ppc4xx: Fix acadia_nand build problem
Since the cache handling functions were moved from start.S into cache.S
the acadia NAND booting Makfile needs to be adapted accordingly.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Eugene O'Brien
9f798766aa ppc4xx: Fixed offset of refresh rate type for Bamboo on-board DDR SDRAM
This patch also adds a note to the fixed DDR setup for Bamboo NAND booting:

Note:
As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed
DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM
modules are still plugged in. So it is recommended to remove the DIMM
modules while using the NAND booting code with the fixed SDRAM setup!

Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:51 +01:00
Grzegorz Bernacki
6c2f4f388e [ppc4xx] Individual handling of sdram.c for bamboo_nand build
Bamboo has a file sdram.c which needs special treatment when building in
separate directory. It has to be linked to build directory otherwise it is
not seen.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-11 12:57:52 +02:00
Stefan Roese
df8a24cdd3 [ppc4xx] Fix problem with NAND booting on AMCC Acadia
The latest changes showed a problem with the location of the NAND-SPL
image in the OCM and the init-data area (incl. cache). This patch
fixes this problem.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-19 16:42:31 +02:00
Stefan Roese
c440bfe6d6 ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval board
This patch adds NAND booting support for the AMCC Acadia eval board.

Please make sure to configure jumper J7 to position 2-3 when booting
from NOR, and to position 1-2 when booting for NAND.

I also added a board command to configure the I2C bootstrap EEPROM
values. Right now only 267MHz is support for booting either via NOR
or NAND FLASH. Here the usage:

=> bootstrap 267 nor	;to configure the board for 267MHz NOR booting
=> bootstrap 267 nand	;to configure the board for 267MHz NNAND booting

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-06 11:42:13 +02:00
Stefan Roese
f3679aa13d Merge with /home/stefan/git/u-boot/bamboo-nand 2007-06-01 16:15:34 +02:00
Stefan Roese
9d9096043e ppc4xx: Update Sequoia NAND booting support with ECC
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 15:29:04 +02:00
Stefan Roese
cf959c7d66 ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval board
This patch adds NAND booting support for the AMCC Bamboo eval board.
Since the NAND-SPL boot image is limited to 4kbytes, this version
only supports the onboard 64MBytes of DDR. The DIMM modules can't be
supported, since the setup code for I2C DIMM autodetection and
configuration is too big for this NAND bootloader.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 15:27:11 +02:00
Stefan Roese
42be56f53c NAND: Add ECC support to NAND booting support in nand_spl/nand_boot.c
The U-Boot NAND booting support is now extended to support ECC
upon loading of the NAND U-Boot image.

Tested on AMCC Sequoia (440EPx) and Bamboo (440EP).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 15:23:04 +02:00
Stefan Roese
f544ff6656 ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND booting
Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
for the 4k NAND boot image so define bus_frequency to 133MHz here
which is save for the refresh counter setup.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-05 08:29:01 +02:00
Stefan Roese
07b7b0037a [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
As provided by the AMCC applications team, this patch optimizes the
DDR2 setup for 166MHz bus speed. The values provided are also save
to use on a "normal" 133MHz PLB bus system. Only the refresh counter
setup has to be adjusted as done in this patch.

For this the NAND booting version had to include the "speed.c" file
from the cpu/ppc4xx directory. With this addition the NAND SPL image
will just fit into the 4kbytes of program space. gcc version 4.x as
provided with ELDK 4.x is needed to generate this optimized code.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-06 07:47:04 +01:00
Stefan Roese
0238898382 [PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
This code will optimize the DDR2 controller setup on a board specific
basis.

Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-05 10:38:05 +01:00
Marian Balakowicz
8318fbf8cc Fix sequoia separate object direcory building problems. 2006-10-23 22:17:05 +02:00
Wolfgang Denk
511d0c72b8 Coding style cleanup 2006-10-09 00:42:01 +02:00
Stefan Roese
d12ae80889 Add NAND environment support for PPC440EPx Sequoia NAND boot config
Patch by Stefan Roese, 12 Sep 2006
2006-09-12 20:19:10 +02:00
Stefan Roese
a73c8dbb43 Update NAND boot documentation
Patch by Stefan Roese, 12 Sep 2006
2006-09-12 08:49:07 +02:00
Stefan Roese
887e2ec9ec Add support for AMCC Sequoia PPC440EPx eval board
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
  in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
  please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
  in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
2006-09-07 11:51:23 +02:00