Compare commits
No commits in common. "master" and "laforge/v2013.04-sysmobts2050" have entirely different histories.
master
...
laforge/v2
|
|
@ -1 +1,71 @@
|
|||
buildroot/**
|
||||
#
|
||||
# NOTE! Don't add files that are generated in specific
|
||||
# subdirectories here. Add them in the ".gitignore" file
|
||||
# in that subdirectory instead.
|
||||
#
|
||||
# Normal rules
|
||||
#
|
||||
|
||||
*.rej
|
||||
*.orig
|
||||
*.a
|
||||
*.o
|
||||
*~
|
||||
*.swp
|
||||
*.patch
|
||||
*.bin
|
||||
|
||||
#
|
||||
# Top-level generic files
|
||||
#
|
||||
|
||||
/System.map
|
||||
/u-boot
|
||||
/u-boot.hex
|
||||
/u-boot.imx
|
||||
/u-boot.map
|
||||
/u-boot.srec
|
||||
/u-boot.ldr
|
||||
/u-boot.ldr.hex
|
||||
/u-boot.ldr.srec
|
||||
/u-boot.img
|
||||
/u-boot.kwb
|
||||
/u-boot.sha1
|
||||
/u-boot.dis
|
||||
/u-boot.lds
|
||||
|
||||
#
|
||||
# Generated files
|
||||
#
|
||||
|
||||
*.depend
|
||||
/LOG
|
||||
/errlog
|
||||
/reloc_off
|
||||
|
||||
/include/generated/
|
||||
/lib/asm-offsets.s
|
||||
|
||||
# stgit generated dirs
|
||||
patches-*
|
||||
.stgit-edit.txt
|
||||
|
||||
# quilt's files
|
||||
patches
|
||||
series
|
||||
|
||||
# gdb files
|
||||
.gdb_history
|
||||
|
||||
# cscope files
|
||||
cscope.*
|
||||
|
||||
# tags files
|
||||
/tags
|
||||
/ctags
|
||||
/etags
|
||||
|
||||
# OneNAND IPL files
|
||||
/onenand_ipl/onenand-ipl*
|
||||
/onenand_ipl/board/*/onenand*
|
||||
/onenand_ipl/board/*/*.S
|
||||
|
|
|
|||
10
CHANGELOG
10
CHANGELOG
|
|
@ -1,10 +0,0 @@
|
|||
CHANGELOG
|
||||
=========
|
||||
|
||||
2014-11-04 - v2.1
|
||||
* Add configurable boot-stop string support
|
||||
* Add configurable baudrate support
|
||||
* Fix memory init bug
|
||||
|
||||
2014-10-21 - v2.0
|
||||
* Initial USB support
|
||||
|
|
@ -1,4 +1,12 @@
|
|||
NOTE! This copyright does *not* cover the so-called "standalone"
|
||||
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
|
||||
many others who contributed code (see the actual source code for
|
||||
details). You can redistribute U-Boot and/or modify it under the
|
||||
terms of version 2 of the GNU General Public License as published by
|
||||
the Free Software Foundation. Most of it can also be distributed,
|
||||
at your option, under any later version of the GNU General Public
|
||||
License -- see individual files for exceptions.
|
||||
|
||||
NOTE! This license does *not* cover the so-called "standalone"
|
||||
applications that use U-Boot services by means of the jump table
|
||||
provided by U-Boot exactly for this purpose - this is merely
|
||||
considered normal use of U-Boot, and does *not* fall under the
|
||||
|
|
@ -22,10 +22,6 @@ N: Guillaume Alexandre
|
|||
E: guillaume.alexandre@gespac.ch
|
||||
D: Add PCIPPC6 configuration
|
||||
|
||||
N: Swen Anderson
|
||||
E: sand@peppercon.de
|
||||
D: ERIC Support
|
||||
|
||||
N: Pantelis Antoniou
|
||||
E: panto@intracom.gr
|
||||
D: NETVIA & NETPHONE board support, ARTOS support.
|
||||
|
|
@ -105,6 +101,10 @@ N: Magnus Damm
|
|||
E: damm@opensource.se
|
||||
D: 8xxrom
|
||||
|
||||
N: Richard Danter
|
||||
E: richard.danter@windriver.com
|
||||
D: Support for Wind River PPMC 7xx/74xx boards
|
||||
|
||||
N: George G. Davis
|
||||
E: gdavis@mvista.com
|
||||
D: Board ports for ADS GraphicsClient+ and Intel Assabet
|
||||
|
|
@ -113,7 +113,7 @@ N: Arun Dharankar
|
|||
E: ADharankar@ATTBI.Com
|
||||
D: threads / scheduler example code
|
||||
|
||||
N: Kári Davíðsson
|
||||
N: K?ri Dav??sson
|
||||
E: kd@flaga.is
|
||||
D: FLAGA DM Support
|
||||
|
||||
|
|
@ -139,10 +139,15 @@ E: info@elste.org
|
|||
D: Port for the ModNET50 Board, NET+50 CPU Port
|
||||
W: http://www.imms.de
|
||||
|
||||
N: Daniel Engström
|
||||
N: Daniel Engstr?m
|
||||
E: daniel@omicron.se
|
||||
D: x86 port, Support for sc520_cdp board
|
||||
|
||||
N: Hayden Fraser
|
||||
E: Hayden.Fraser@freescale.com
|
||||
D: Support for ColdFire MCF5253
|
||||
W: www.freescale.com
|
||||
|
||||
N: Dr. Wolfgang Grandegger
|
||||
E: wg@denx.de
|
||||
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
|
||||
|
|
@ -156,6 +161,15 @@ N: Thomas Frieden
|
|||
E: ThomasF@hyperion-entertainment.com
|
||||
D: Support for AmigaOne
|
||||
|
||||
N: Niklaus Giger
|
||||
E: niklaus.giger@netstal.com
|
||||
D: Support for HCU(x) boards
|
||||
W: www.netstal.com
|
||||
|
||||
N: Paul Gortmaker
|
||||
E: paul.gortmaker@windriver.com
|
||||
D: Support for WRS SBC8347/8349 boards
|
||||
|
||||
N: Frank Gottschling
|
||||
E: fgottschling@eltec.de
|
||||
D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
|
||||
|
|
@ -182,10 +196,6 @@ N: Andreas Heppel
|
|||
E: aheppel@sysgo.de
|
||||
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
|
||||
|
||||
N: August Hoeraendl
|
||||
E: august.hoerandl@gmx.at
|
||||
D: Support for the logodl board (PXA2xx)
|
||||
|
||||
N: Josh Huber
|
||||
E: huber@alum.wpi.edu
|
||||
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
|
||||
|
|
@ -199,8 +209,12 @@ H: Rich Ireland
|
|||
E: r.ireland@computer.org
|
||||
D: FPGA device configuration driver
|
||||
|
||||
H: Mark Jackson
|
||||
E: mpfj@mimc.co.uk
|
||||
D: Port to MIMC200 board
|
||||
|
||||
N: Gary Jennejohn
|
||||
E: garyj@jennejohn.org, gj@denx.de
|
||||
E: garyj@jennejohn.org
|
||||
D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB"
|
||||
W: www.denx.de
|
||||
|
||||
|
|
@ -218,6 +232,10 @@ E: mark.jonas@freescale.com
|
|||
D: Support for Freescale Total5200 platform
|
||||
W: http://www.mobilegt.com/
|
||||
|
||||
N: Mark Jonas
|
||||
E: mark.jonas@de.bosch.com
|
||||
D: Support for MPR2 board
|
||||
|
||||
N: Sam Song
|
||||
E: samsongshu@yahoo.com.cn
|
||||
D: Port to the RPXlite_DW board
|
||||
|
|
@ -229,6 +247,7 @@ D: Port to Windriver ppmc8260 board
|
|||
N: Sangmoon Kim
|
||||
E: dogoil@etinsys.com
|
||||
D: Support for debris board
|
||||
D: Support for KVME080 board
|
||||
|
||||
N: Frederick W. Klatt
|
||||
E: fred.klatt@windriver.com
|
||||
|
|
@ -243,6 +262,10 @@ E: Raghu.Krishnaprasad@fci.com
|
|||
D: Support for Adder-II MPC852T evaluation board
|
||||
W: http://www.forcecomputers.com
|
||||
|
||||
N: Sergey Kubushyn
|
||||
E: ksi@koi8.net
|
||||
D: Support for various TI DaVinci based boards.
|
||||
|
||||
N: Bernhard Kuhn
|
||||
E: bkuhn@metrowerks.com
|
||||
D Support for Coldfire CPU; Support for Motorola M5272C3 and M5282EVB boards
|
||||
|
|
@ -253,18 +276,18 @@ D Support for Intrinsyc CERF PXA250 board.
|
|||
|
||||
N: Thomas Lange
|
||||
E: thomas@corelatus.se
|
||||
D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes
|
||||
|
||||
N: Marc Leeman
|
||||
E: marc.leeman@barco.com
|
||||
D: Support for Barco Streaming Video Card (SVC) and Sample Compress Network (SCN)
|
||||
W: www.barco.com
|
||||
D: Support for GTH, GTH2 and dbau1x00 boards; lots of PCMCIA fixes
|
||||
|
||||
N: The LEOX team
|
||||
E: team@leox.org
|
||||
D: Support for LEOX boards, DS164x RTC
|
||||
W: http://www.leox.org
|
||||
|
||||
N: TsiChung Liew
|
||||
E: Tsi-Chung.Liew@freescale.com
|
||||
D: Support for ColdFire MCF523x, MCF532x, MCF5445x, MCF547x_8x
|
||||
W: www.freescale.com
|
||||
|
||||
N: Leif Lindholm
|
||||
E: leif.lindholm@i3micro.com
|
||||
D: Support for AMD dbau1550 board.
|
||||
|
|
@ -275,10 +298,20 @@ D: Support for Nios Stratix Development Kit (DK-1S10)
|
|||
D: Support for SSV ADNP/ESC1 (Nios Cyclone)
|
||||
W: http://www.li-pro.net
|
||||
|
||||
N: Dave Liu
|
||||
E: daveliu@freescale.com
|
||||
D: Support for MPC8315, MPC832x, MPC8360, MPC837x
|
||||
W: www.freescale.com
|
||||
|
||||
N: Raymond Lo
|
||||
E: lo@routefree.com
|
||||
D: Support for DOS partitions
|
||||
|
||||
N: James MacAulay
|
||||
E: james.macaulay@amirix.com
|
||||
D: Suppport for Amirix AP1000
|
||||
W: www.amirix.com
|
||||
|
||||
N: Dan Malek
|
||||
E: dan@embeddedalley.com
|
||||
D: FADSROM, the grandfather of all of this
|
||||
|
|
@ -301,7 +334,7 @@ N: Frank Morauf
|
|||
E: frank.morauf@salzbrenner.com
|
||||
D: Support for Embedded Planet RPX Super Board
|
||||
|
||||
N: David Müller
|
||||
N: David M?ller
|
||||
E: d.mueller@elsoft.ch
|
||||
D: Support for Samsung ARM920T SMDK2410 eval board
|
||||
|
||||
|
|
@ -353,9 +386,21 @@ E: dan.poirot@windriver.com
|
|||
D: Support for the Wind River sbc405, sbc8240 board
|
||||
W: http://www.windriver.com
|
||||
|
||||
N: Stelian Pop
|
||||
E: stelian.pop@leadtechdesign.com
|
||||
D: Atmel AT91CAP9ADK support
|
||||
|
||||
N: Ricardo Ribalda Delgado
|
||||
E: ricardo.ribalda@uam.es
|
||||
D: PPC440x5 (Virtex5), ML507 Board, eeprom_simul, adt7460, v5fx30teval
|
||||
D: Virtex ppc440 generic architecture
|
||||
D: Virtex ppc405 generic architecture
|
||||
W: http://www.ii.uam.es/~rribalda
|
||||
|
||||
N: Stefan Roese
|
||||
E: stefan.roese@esd-electronics.com
|
||||
D: AMCC PPC401/403/405GP Support; Windows environment support
|
||||
E: sr@denx.de
|
||||
D: AMCC PPC4xx Support
|
||||
W: http://www.denx.de
|
||||
|
||||
N: Erwin Rol
|
||||
E: erwin@muffin.org
|
||||
|
|
@ -377,13 +422,27 @@ N: Paolo Scaffardi
|
|||
E: arsenio@tin.it
|
||||
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
|
||||
|
||||
N: Andre Schwarz
|
||||
E: andre.schwarz@matrix-vision.de
|
||||
D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR)
|
||||
|
||||
N: Robert Schwebel
|
||||
E: r.schwebel@pengutronix.de
|
||||
D: Support for csb226, logodl and innokom boards (PXA2xx)
|
||||
D: Support for csb226 and innokom boards (PXA2xx)
|
||||
|
||||
N: Aaron Sells
|
||||
E: sellsa@embeddedplanet.com
|
||||
D: Support for EP82xxM
|
||||
|
||||
N: Art Shipkowski
|
||||
E: art@videon-central.com
|
||||
D: Support for NetSilicon NS7520
|
||||
D: Support for ColdFire MCF5275
|
||||
|
||||
N: Michal Simek
|
||||
E: monstr@monstr.eu
|
||||
D: Support for Microblaze, ML401, XUPV2P board
|
||||
W: www.monstr.eu
|
||||
|
||||
N: Yasushi Shoji
|
||||
E: yashi@atmark-techno.com
|
||||
|
|
@ -398,6 +457,11 @@ E: andrea.scian@dave-tech.it
|
|||
D: Port to B2 board
|
||||
W: www.dave-tech.it
|
||||
|
||||
N: Timur Tabi
|
||||
E: timur@freescale.com
|
||||
D: Support for MPC8349E-mITX
|
||||
W: www.freescale.com
|
||||
|
||||
N: Rob Taylor
|
||||
E: robt@flyingpig.com
|
||||
D: Port to MBX860T and Sandpoint8240
|
||||
|
|
@ -434,6 +498,11 @@ N: Martin Winistoerfer
|
|||
E: martinwinistoerfer@gmx.ch
|
||||
D: Port to MPC555/556 microcontrollers and support for cmi board
|
||||
|
||||
N: David Wu
|
||||
E: support@arcturusnetworks.com
|
||||
D: Mercury Security EP2500
|
||||
W: http://www.arcturusnetworks.com
|
||||
|
||||
N: Ming-Len Wu
|
||||
E: minglen_wu@techware.com.tw
|
||||
D: Motorola MX1ADS board support
|
||||
|
|
@ -452,7 +521,27 @@ E: azu@sysgo.de
|
|||
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
|
||||
W: www.elinos.com
|
||||
|
||||
N: James MacAulay
|
||||
E: james.macaulay@amirix.com
|
||||
D: Suppport for Amirix AP1000
|
||||
W: www.amirix.com
|
||||
N: Nobuhiro Iwamatsu
|
||||
E: iwamatsu@nigauri.org
|
||||
D: Support for SuperH, MS7750SE01 and MS7722SE01 boards.
|
||||
W: http://www.nigauri.org/~iwamatsu/
|
||||
|
||||
N: Alan Lu
|
||||
E: alnalu001@gmail.com
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.artila.com/
|
||||
|
||||
N: Kimmo Leppala
|
||||
E: kimmo.leppala@sysart.fi
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.sysart.fi/
|
||||
|
||||
N: Timo Tuunainen
|
||||
E: timo.tuunainen@sysart.fi
|
||||
D: Support for Artila M-501 starter kit
|
||||
W: http://www.sysart.fi/
|
||||
|
||||
N: Philip Balister
|
||||
E: philip@opensdr.com
|
||||
D: Port to Lyrtech SFFSDR development board.
|
||||
W: www.opensdr.com
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,682 @@
|
|||
#!/bin/bash
|
||||
|
||||
# Tool mainly for U-Boot Quality Assurance: build one or more board
|
||||
# configurations with minimal verbosity, showing only warnings and
|
||||
# errors.
|
||||
#
|
||||
# There are several ways to select which boards to build.
|
||||
#
|
||||
# Traditionally, architecture names (like "powerpc"), CPU family names
|
||||
# (like "mpc83xx") or board names can be specified on the command
|
||||
# line; without any arguments, MAKEALL defaults to building all Power
|
||||
# Architecture systems (i. e. same as for "MAKEALL powerpc").
|
||||
#
|
||||
# With the introduction of the board.cfg file, it has become possible
|
||||
# to provide additional selections. We use standard command line
|
||||
# options for this:
|
||||
#
|
||||
# -a or --arch : Select architecture
|
||||
# -c or --cpu : Select CPU family
|
||||
# -s or --soc : Select SoC type
|
||||
# -v or --vendor: Select board vendor
|
||||
#
|
||||
# Selections by these options are logically ANDed; if the same option
|
||||
# is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
|
||||
# will select all configurations where the vendor is either FOO or
|
||||
# BAR. Any additional arguments specified on the command line are
|
||||
# always build additionally.
|
||||
#
|
||||
# Examples:
|
||||
#
|
||||
# - build all Power Architecture boards:
|
||||
#
|
||||
# MAKEALL -a powerpc
|
||||
# or
|
||||
# MAKEALL --arch powerpc
|
||||
# or
|
||||
# MAKEALL powerpc
|
||||
#
|
||||
# - build all PowerPC boards manufactured by vendor "esd":
|
||||
#
|
||||
# MAKEALL -a powerpc -v esd
|
||||
#
|
||||
# - build all PowerPC boards manufactured either by "keymile" or
|
||||
# "siemens":
|
||||
#
|
||||
# MAKEALL -a powerpc -v keymile -v siemens
|
||||
#
|
||||
# - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
|
||||
#
|
||||
# MAKEALL -c mpc83xx -v freescale 4xx
|
||||
#
|
||||
#########################################################################
|
||||
|
||||
SHORT_OPTS="a:c:v:s:"
|
||||
LONG_OPTS="arch:,cpu:,vendor:,soc:"
|
||||
|
||||
# Option processing based on util-linux-2.13/getopt-parse.bash
|
||||
|
||||
# Note that we use `"$@"' to let each command-line parameter expand to a
|
||||
# separate word. The quotes around `$@' are essential!
|
||||
# We need TEMP as the `eval set --' would nuke the return value of
|
||||
# getopt.
|
||||
TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
|
||||
-n 'MAKEALL' -- "$@"`
|
||||
|
||||
if [ $? != 0 ] ; then echo "Terminating..." >&2 ; exit 1 ; fi
|
||||
|
||||
# Note the quotes around `$TEMP': they are essential!
|
||||
eval set -- "$TEMP"
|
||||
|
||||
SELECTED=''
|
||||
|
||||
while true ; do
|
||||
case "$1" in
|
||||
-a|--arch)
|
||||
# echo "Option ARCH: argument \`$2'"
|
||||
if [ "$opt_a" ] ; then
|
||||
opt_a="${opt_a%)} || \$2 == \"$2\")"
|
||||
else
|
||||
opt_a="(\$2 == \"$2\")"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
-c|--cpu)
|
||||
# echo "Option CPU: argument \`$2'"
|
||||
if [ "$opt_c" ] ; then
|
||||
opt_c="${opt_c%)} || \$3 == \"$2\")"
|
||||
else
|
||||
opt_c="(\$3 == \"$2\")"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
-s|--soc)
|
||||
# echo "Option SoC: argument \`$2'"
|
||||
if [ "$opt_s" ] ; then
|
||||
opt_s="${opt_s%)} || \$6 == \"$2\")"
|
||||
else
|
||||
opt_s="(\$6 == \"$2\")"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
-v|--vendor)
|
||||
# echo "Option VENDOR: argument \`$2'"
|
||||
if [ "$opt_v" ] ; then
|
||||
opt_v="${opt_v%)} || \$5 == \"$2\")"
|
||||
else
|
||||
opt_v="(\$5 == \"$2\")"
|
||||
fi
|
||||
SELECTED='y'
|
||||
shift 2 ;;
|
||||
--)
|
||||
shift ; break ;;
|
||||
*)
|
||||
echo "Internal error!" >&2 ; exit 1 ;;
|
||||
esac
|
||||
done
|
||||
# echo "Remaining arguments:"
|
||||
# for arg do echo '--> '"\`$arg'" ; done
|
||||
|
||||
FILTER="\$1 !~ /^#/"
|
||||
[ "$opt_a" ] && FILTER="${FILTER} && $opt_a"
|
||||
[ "$opt_c" ] && FILTER="${FILTER} && $opt_c"
|
||||
[ "$opt_s" ] && FILTER="${FILTER} && $opt_s"
|
||||
[ "$opt_v" ] && FILTER="${FILTER} && $opt_v"
|
||||
|
||||
if [ "$SELECTED" ] ; then
|
||||
SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg)
|
||||
|
||||
# Make sure some boards from boards.cfg are actually found
|
||||
if [ -z "$SELECTED" ] ; then
|
||||
echo "Error: No boards selected, invalid arguments"
|
||||
exit 1
|
||||
fi
|
||||
fi
|
||||
|
||||
#########################################################################
|
||||
|
||||
# Print statistics when we exit
|
||||
trap exit 1 2 3 15
|
||||
trap print_stats 0
|
||||
|
||||
# Determine number of CPU cores if no default was set
|
||||
: ${BUILD_NCPUS:="`getconf _NPROCESSORS_ONLN`"}
|
||||
|
||||
if [ "$BUILD_NCPUS" -gt 1 ]
|
||||
then
|
||||
JOBS="-j $((BUILD_NCPUS + 1))"
|
||||
else
|
||||
JOBS=""
|
||||
fi
|
||||
|
||||
|
||||
if [ "${CROSS_COMPILE}" ] ; then
|
||||
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
|
||||
else
|
||||
MAKE=make
|
||||
fi
|
||||
|
||||
if [ "${MAKEALL_LOGDIR}" ] ; then
|
||||
LOG_DIR=${MAKEALL_LOGDIR}
|
||||
else
|
||||
LOG_DIR="LOG"
|
||||
fi
|
||||
|
||||
if [ ! "${BUILD_DIR}" ] ; then
|
||||
BUILD_DIR="."
|
||||
fi
|
||||
|
||||
[ -d ${LOG_DIR} ] || mkdir ${LOG_DIR} || exit 1
|
||||
|
||||
LIST=""
|
||||
|
||||
# Keep track of the number of builds and errors
|
||||
ERR_CNT=0
|
||||
ERR_LIST=""
|
||||
TOTAL_CNT=0
|
||||
RC=0
|
||||
|
||||
# Helper funcs for parsing boards.cfg
|
||||
boards_by_field()
|
||||
{
|
||||
awk \
|
||||
-v field="$1" \
|
||||
-v select="$2" \
|
||||
'($1 !~ /^#/ && $field == select) { print $1 }' \
|
||||
boards.cfg
|
||||
}
|
||||
boards_by_arch() { boards_by_field 2 "$@" ; }
|
||||
boards_by_cpu() { boards_by_field 3 "$@" ; }
|
||||
boards_by_soc() { boards_by_field 6 "$@" ; }
|
||||
|
||||
#########################################################################
|
||||
## MPC5xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_5xx="$(boards_by_cpu mpc5xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC5xxx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_5xxx="$(boards_by_cpu mpc5xxx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC512x Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_512x="$(boards_by_cpu mpc512x)"
|
||||
|
||||
#########################################################################
|
||||
## MPC8xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_8xx="$(boards_by_cpu mpc8xx)"
|
||||
|
||||
#########################################################################
|
||||
## PPC4xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_4xx="$(boards_by_cpu ppc4xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC8220 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_8220="$(boards_by_cpu mpc8220)"
|
||||
|
||||
#########################################################################
|
||||
## MPC824x Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_824x="$(boards_by_cpu mpc824x)"
|
||||
|
||||
#########################################################################
|
||||
## MPC8260 Systems (includes 8250, 8255 etc.)
|
||||
#########################################################################
|
||||
|
||||
LIST_8260="$(boards_by_cpu mpc8260)"
|
||||
|
||||
#########################################################################
|
||||
## MPC83xx Systems (includes 8349, etc.)
|
||||
#########################################################################
|
||||
|
||||
LIST_83xx="$(boards_by_cpu mpc83xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC85xx Systems (includes 8540, 8560 etc.)
|
||||
#########################################################################
|
||||
|
||||
LIST_85xx="$(boards_by_cpu mpc85xx)"
|
||||
|
||||
#########################################################################
|
||||
## MPC86xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_86xx="$(boards_by_cpu mpc86xx)"
|
||||
|
||||
#########################################################################
|
||||
## 74xx/7xx Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)"
|
||||
|
||||
#########################################################################
|
||||
## PowerPC groups
|
||||
#########################################################################
|
||||
|
||||
LIST_TSEC=" \
|
||||
${LIST_83xx} \
|
||||
${LIST_85xx} \
|
||||
${LIST_86xx} \
|
||||
"
|
||||
|
||||
LIST_powerpc=" \
|
||||
${LIST_5xx} \
|
||||
${LIST_512x} \
|
||||
${LIST_5xxx} \
|
||||
${LIST_8xx} \
|
||||
${LIST_8220} \
|
||||
${LIST_824x} \
|
||||
${LIST_8260} \
|
||||
${LIST_83xx} \
|
||||
${LIST_85xx} \
|
||||
${LIST_86xx} \
|
||||
${LIST_4xx} \
|
||||
${LIST_74xx_7xx}\
|
||||
"
|
||||
|
||||
# Alias "ppc" -> "powerpc" to not break compatibility with older scripts
|
||||
# still using "ppc" instead of "powerpc"
|
||||
LIST_ppc=" \
|
||||
${LIST_powerpc} \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## StrongARM Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_SA="$(boards_by_cpu sa1100)"
|
||||
|
||||
#########################################################################
|
||||
## ARM7 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_ARM7=" \
|
||||
ap7 \
|
||||
ap720t \
|
||||
armadillo \
|
||||
B2 \
|
||||
ep7312 \
|
||||
evb4510 \
|
||||
impa7 \
|
||||
integratorap \
|
||||
lpc2292sodimm \
|
||||
modnet50 \
|
||||
SMN42 \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## ARM9 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_ARM9=" \
|
||||
a320evb \
|
||||
ap920t \
|
||||
ap922_XA10 \
|
||||
ap926ejs \
|
||||
ap946es \
|
||||
ap966 \
|
||||
aspenite \
|
||||
cp920t \
|
||||
cp922_XA10 \
|
||||
cp926ejs \
|
||||
cp946es \
|
||||
cp966 \
|
||||
da830evm \
|
||||
da850evm \
|
||||
edb9301 \
|
||||
edb9302 \
|
||||
edb9302a \
|
||||
edb9307 \
|
||||
edb9307a \
|
||||
edb9312 \
|
||||
edb9315 \
|
||||
edb9315a \
|
||||
edminiv2 \
|
||||
guruplug \
|
||||
imx27lite \
|
||||
jadecpu \
|
||||
lpd7a400 \
|
||||
magnesium \
|
||||
mv88f6281gtw_ge \
|
||||
mx1ads \
|
||||
mx1fs2 \
|
||||
netstar \
|
||||
nhk8815 \
|
||||
nhk8815_onenand \
|
||||
omap1510inn \
|
||||
omap1610h2 \
|
||||
omap1610inn \
|
||||
omap5912osk \
|
||||
omap730p2 \
|
||||
openrd_base \
|
||||
openrd_client \
|
||||
openrd_ultimate \
|
||||
rd6281a \
|
||||
sbc2410x \
|
||||
scb9328 \
|
||||
sheevaplug \
|
||||
smdk2400 \
|
||||
smdk2410 \
|
||||
spear300 \
|
||||
spear310 \
|
||||
spear320 \
|
||||
spear600 \
|
||||
suen3 \
|
||||
trab \
|
||||
VCMA9 \
|
||||
versatile \
|
||||
versatileab \
|
||||
versatilepb \
|
||||
voiceblue \
|
||||
davinci_dvevm \
|
||||
davinci_schmoogie \
|
||||
davinci_sffsdr \
|
||||
davinci_sonata \
|
||||
davinci_dm355evm \
|
||||
davinci_dm355leopard \
|
||||
davinci_dm365evm \
|
||||
davinci_dm6467evm \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## ARM10 Systems
|
||||
#########################################################################
|
||||
LIST_ARM10=" \
|
||||
integratorcp \
|
||||
cp1026 \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## ARM11 Systems
|
||||
#########################################################################
|
||||
LIST_ARM11=" \
|
||||
cp1136 \
|
||||
omap2420h4 \
|
||||
apollon \
|
||||
imx31_litekit \
|
||||
imx31_phycore \
|
||||
imx31_phycore_eet \
|
||||
mx31ads \
|
||||
mx31pdk \
|
||||
mx31pdk_nand \
|
||||
qong \
|
||||
smdk6400 \
|
||||
tnetv107x_evm \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## ARMV7 Systems
|
||||
#########################################################################
|
||||
LIST_ARMV7=" \
|
||||
am3517_crane \
|
||||
am3517_evm \
|
||||
ca9x4_ct_vxp \
|
||||
devkit8000 \
|
||||
dig297 \
|
||||
igep0020 \
|
||||
igep0030 \
|
||||
mx51evk \
|
||||
omap3_beagle \
|
||||
omap3_overo \
|
||||
omap3_evm \
|
||||
omap3_pandora \
|
||||
omap3_sdp3430 \
|
||||
omap3_zoom1 \
|
||||
omap3_zoom2 \
|
||||
omap4_panda \
|
||||
omap4_sdp4430 \
|
||||
s5p_goni \
|
||||
smdkc100 \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## AT91 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_at91="$(boards_by_soc at91)\
|
||||
$(boards_by_soc at91rm9200)\
|
||||
at91sam9260ek \
|
||||
at91sam9261ek \
|
||||
at91sam9263ek \
|
||||
at91sam9g10ek \
|
||||
at91sam9g20ek \
|
||||
at91sam9m10g45ek \
|
||||
at91sam9rlek \
|
||||
CPUAT91 \
|
||||
CPU9260 \
|
||||
CPU9G20 \
|
||||
pm9g45 \
|
||||
SBC35_A9G20 \
|
||||
TNY_A9260 \
|
||||
TNY_A9G20 \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## Xscale Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_pxa="$(boards_by_cpu pxa)"
|
||||
|
||||
LIST_ixp="$(boards_by_cpu ixp)
|
||||
pdnb3 \
|
||||
scpu \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## ARM groups
|
||||
#########################################################################
|
||||
|
||||
LIST_arm=" \
|
||||
${LIST_SA} \
|
||||
${LIST_ARM7} \
|
||||
${LIST_ARM9} \
|
||||
${LIST_ARM10} \
|
||||
${LIST_ARM11} \
|
||||
${LIST_ARMV7} \
|
||||
${LIST_at91} \
|
||||
${LIST_pxa} \
|
||||
${LIST_ixp} \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## MIPS Systems (default = big endian)
|
||||
#########################################################################
|
||||
|
||||
LIST_mips4kc=" \
|
||||
incaip \
|
||||
qemu_mips \
|
||||
vct_platinum \
|
||||
vct_platinum_small \
|
||||
vct_platinum_onenand \
|
||||
vct_platinum_onenand_small \
|
||||
vct_platinumavc \
|
||||
vct_platinumavc_small \
|
||||
vct_platinumavc_onenand \
|
||||
vct_platinumavc_onenand_small \
|
||||
vct_premium \
|
||||
vct_premium_small \
|
||||
vct_premium_onenand \
|
||||
vct_premium_onenand_small \
|
||||
"
|
||||
|
||||
LIST_mips5kc=""
|
||||
|
||||
LIST_au1xx0=" \
|
||||
dbau1000 \
|
||||
dbau1100 \
|
||||
dbau1500 \
|
||||
dbau1550 \
|
||||
dbau1550_el \
|
||||
gth2 \
|
||||
"
|
||||
|
||||
LIST_mips=" \
|
||||
${LIST_mips4kc} \
|
||||
${LIST_mips5kc} \
|
||||
${LIST_au1xx0} \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## MIPS Systems (little endian)
|
||||
#########################################################################
|
||||
|
||||
LIST_mips4kc_el=""
|
||||
|
||||
LIST_mips5kc_el=""
|
||||
|
||||
LIST_au1xx0_el=" \
|
||||
dbau1550_el \
|
||||
pb1000 \
|
||||
"
|
||||
|
||||
LIST_mips_el=" \
|
||||
${LIST_mips4kc_el} \
|
||||
${LIST_mips5kc_el} \
|
||||
${LIST_au1xx0_el} \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## x86 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_x86="$(boards_by_arch x86)"
|
||||
|
||||
#########################################################################
|
||||
## Nios-II Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_nios2="$(boards_by_arch nios2)
|
||||
nios2-generic \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## MicroBlaze Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_microblaze="$(boards_by_arch microblaze)"
|
||||
|
||||
#########################################################################
|
||||
## ColdFire Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_coldfire="$(boards_by_arch m68k)
|
||||
astro_mcf5373l \
|
||||
cobra5272 \
|
||||
EB+MCF-EV123 \
|
||||
EB+MCF-EV123_internal \
|
||||
M52277EVB \
|
||||
M5235EVB \
|
||||
M5329AFEE \
|
||||
M5373EVB \
|
||||
M54451EVB \
|
||||
M54455EVB \
|
||||
M5475AFE \
|
||||
M5485AFE \
|
||||
"
|
||||
|
||||
#########################################################################
|
||||
## AVR32 Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_avr32="$(boards_by_arch avr32)"
|
||||
|
||||
#########################################################################
|
||||
## Blackfin Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_blackfin="$(boards_by_arch blackfin)"
|
||||
|
||||
#########################################################################
|
||||
## SH Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_sh2="$(boards_by_cpu sh2)"
|
||||
LIST_sh3="$(boards_by_cpu sh3)"
|
||||
LIST_sh4="$(boards_by_cpu sh4)"
|
||||
|
||||
LIST_sh="$(boards_by_arch sh)"
|
||||
|
||||
#########################################################################
|
||||
## SPARC Systems
|
||||
#########################################################################
|
||||
|
||||
LIST_sparc="$(boards_by_arch sparc)"
|
||||
|
||||
#-----------------------------------------------------------------------
|
||||
|
||||
build_target() {
|
||||
target=$1
|
||||
|
||||
${MAKE} distclean >/dev/null
|
||||
${MAKE} -s ${target}_config
|
||||
|
||||
${MAKE} ${JOBS} all 2>&1 >${LOG_DIR}/$target.MAKELOG \
|
||||
| tee ${LOG_DIR}/$target.ERR
|
||||
|
||||
# Check for 'make' errors
|
||||
if [ ${PIPESTATUS[0]} -ne 0 ] ; then
|
||||
RC=1
|
||||
fi
|
||||
|
||||
if [ -s ${LOG_DIR}/$target.ERR ] ; then
|
||||
ERR_CNT=$((ERR_CNT + 1))
|
||||
ERR_LIST="${ERR_LIST} $target"
|
||||
else
|
||||
rm ${LOG_DIR}/$target.ERR
|
||||
fi
|
||||
|
||||
TOTAL_CNT=$((TOTAL_CNT + 1))
|
||||
|
||||
${CROSS_COMPILE}size ${BUILD_DIR}/u-boot \
|
||||
| tee -a ${LOG_DIR}/$target.MAKELOG
|
||||
}
|
||||
build_targets() {
|
||||
for t in "$@" ; do
|
||||
# If a LIST_xxx var exists, use it. But avoid variable
|
||||
# expansion in the eval when a board name contains certain
|
||||
# characters that the shell interprets.
|
||||
case ${t} in
|
||||
*[-+=]*) list= ;;
|
||||
*) list=$(eval echo '${LIST_'$t'}') ;;
|
||||
esac
|
||||
if [ -n "${list}" ] ; then
|
||||
build_targets ${list}
|
||||
else
|
||||
build_target ${t}
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
#-----------------------------------------------------------------------
|
||||
|
||||
print_stats() {
|
||||
echo ""
|
||||
echo "--------------------- SUMMARY ----------------------------"
|
||||
echo "Boards compiled: ${TOTAL_CNT}"
|
||||
if [ ${ERR_CNT} -gt 0 ] ; then
|
||||
echo "Boards with warnings or errors: ${ERR_CNT} (${ERR_LIST} )"
|
||||
fi
|
||||
echo "----------------------------------------------------------"
|
||||
|
||||
exit $RC
|
||||
}
|
||||
|
||||
#-----------------------------------------------------------------------
|
||||
|
||||
# Build target groups selected by options, plus any command line args
|
||||
set -- ${SELECTED} "$@"
|
||||
# run PowerPC by default
|
||||
[ $# = 0 ] && set -- powerpc
|
||||
build_targets "$@"
|
||||
57
README.md
57
README.md
|
|
@ -1,57 +0,0 @@
|
|||
Caraboot
|
||||
========
|
||||
|
||||
U-Boot for Carambola2 based boards
|
||||
|
||||
|
||||
Build
|
||||
-------
|
||||
|
||||
1) Build buildroot toolchain (http://buildroot.org)
|
||||
|
||||
Download:
|
||||
```
|
||||
git clone git://git.buildroot.net/buildroot
|
||||
cd buildroot
|
||||
git checkout 2015.02
|
||||
```
|
||||
|
||||
Configure:
|
||||
```
|
||||
cd buildroot
|
||||
cp ../buildroot.config .config
|
||||
make oldconfig
|
||||
```
|
||||
In Target Options select Target Architecture as MIPS (big endian) and Target Architecture Variant as mips 32r2.
|
||||
In Toolchain select GCC Compiler version as gcc 4.7.x.
|
||||
Save and exit.
|
||||
|
||||
Build:
|
||||
```
|
||||
make toolchain
|
||||
```
|
||||
|
||||
2) Build Caraboot image
|
||||
|
||||
Download:
|
||||
```
|
||||
cd your_work_dir
|
||||
git clone https://github.com/8devices/Caraboot.git
|
||||
```
|
||||
|
||||
Configure:
|
||||
Open Caraboot Makefile and change CONFIG_TOOLCHAIN_PREFIX to your buildroot binary path, i.e ```CONFIG_TOOLCHAIN_PREFIX=your_work_dir/buildroot/output/host/usr/bin/mips-linux- ```
|
||||
```
|
||||
cd Caraboot
|
||||
vi/nano/gedit Makefile
|
||||
```
|
||||
|
||||
Build:
|
||||
```
|
||||
make
|
||||
```
|
||||
|
||||
The bootloader binary will be saved to ```bin/carambola2_u-boot.bin``` file.
|
||||
You can now use this file to upgrade your bootloader on Carambola2 board (http://8devices.com/wiki/carambola:2:gettingstarted:bootloader-upgrade)
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
#
|
||||
# (C) Copyright 2007 Semihalf
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundatio; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)libapi.o
|
||||
|
||||
COBJS-$(CONFIG_API) += api.o api_net.o api_storage.o api_platform-$(ARCH).o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
U-Boot machine/arch independent API for external apps
|
||||
=====================================================
|
||||
|
||||
1. Main assumptions
|
||||
|
||||
- there is a single entry point (syscall) to the API
|
||||
|
||||
- per current design the syscall is a C-callable function in the U-Boot
|
||||
text, which might evolve into a real syscall using machine exception trap
|
||||
once this initial version proves functional
|
||||
|
||||
- the consumer app is responsible for producing appropriate context (call
|
||||
number and arguments)
|
||||
|
||||
- upon entry, the syscall dispatches the call to other (existing) U-Boot
|
||||
functional areas like networking or storage operations
|
||||
|
||||
- consumer application will recognize the API is available by searching
|
||||
a specified (assumed by convention) range of address space for the
|
||||
signature
|
||||
|
||||
- the U-Boot integral part of the API is meant to be thin and non-intrusive,
|
||||
leaving as much processing as possible on the consumer application side,
|
||||
for example it doesn't keep states, but relies on hints from the app and
|
||||
so on
|
||||
|
||||
- optional (CONFIG_API)
|
||||
|
||||
|
||||
2. Calls
|
||||
|
||||
- console related (getc, putc, tstc etc.)
|
||||
- system (reset, platform info)
|
||||
- time (delay, current)
|
||||
- env vars (enumerate all, get, set)
|
||||
- devices (enumerate all, open, close, read, write); currently two classes
|
||||
of devices are recognized and supported: network and storage (ide, scsi,
|
||||
usb etc.)
|
||||
|
||||
|
||||
3. Structure overview
|
||||
|
||||
- core API, integral part of U-Boot, mandatory
|
||||
- implements the single entry point (mimics UNIX syscall)
|
||||
|
||||
- glue
|
||||
- entry point at the consumer side, allows to make syscall, mandatory
|
||||
part
|
||||
|
||||
- helper conveniency wrappers so that consumer app does not have to use
|
||||
the syscall directly, but in a more friendly manner (a la libc calls),
|
||||
optional part
|
||||
|
||||
- consumer application
|
||||
- calls directly, or leverages the provided glue mid-layer
|
||||
|
|
@ -0,0 +1,661 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <command.h>
|
||||
#include <common.h>
|
||||
#include <malloc.h>
|
||||
#include <environment.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#include "api_private.h"
|
||||
|
||||
#define DEBUG
|
||||
#undef DEBUG
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* This is the API core.
|
||||
*
|
||||
* API_ functions are part of U-Boot code and constitute the lowest level
|
||||
* calls:
|
||||
*
|
||||
* - they know what values they need as arguments
|
||||
* - their direct return value pertains to the API_ "shell" itself (0 on
|
||||
* success, some error code otherwise)
|
||||
* - if the call returns a value it is buried within arguments
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef DEBUG
|
||||
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
#else
|
||||
#define debugf(fmt, args...)
|
||||
#endif
|
||||
|
||||
typedef int (*cfp_t)(va_list argp);
|
||||
|
||||
static int calls_no;
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_getc(int *c)
|
||||
*/
|
||||
static int API_getc(va_list ap)
|
||||
{
|
||||
int *c;
|
||||
|
||||
if ((c = (int *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*c = getc();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_tstc(int *c)
|
||||
*/
|
||||
static int API_tstc(va_list ap)
|
||||
{
|
||||
int *t;
|
||||
|
||||
if ((t = (int *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*t = tstc();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_putc(char *ch)
|
||||
*/
|
||||
static int API_putc(va_list ap)
|
||||
{
|
||||
char *c;
|
||||
|
||||
if ((c = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
putc(*c);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_puts(char **s)
|
||||
*/
|
||||
static int API_puts(va_list ap)
|
||||
{
|
||||
char *s;
|
||||
|
||||
if ((s = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
puts(s);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_reset(void)
|
||||
*/
|
||||
static int API_reset(va_list ap)
|
||||
{
|
||||
do_reset(NULL, 0, 0, NULL);
|
||||
|
||||
/* NOT REACHED */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_get_sys_info(struct sys_info *si)
|
||||
*
|
||||
* fill out the sys_info struct containing selected parameters about the
|
||||
* machine
|
||||
*/
|
||||
static int API_get_sys_info(va_list ap)
|
||||
{
|
||||
struct sys_info *si;
|
||||
|
||||
si = (struct sys_info *)va_arg(ap, u_int32_t);
|
||||
if (si == NULL)
|
||||
return API_ENOMEM;
|
||||
|
||||
return (platform_sys_info(si)) ? 0 : API_ENODEV;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_udelay(unsigned long *udelay)
|
||||
*/
|
||||
static int API_udelay(va_list ap)
|
||||
{
|
||||
unsigned long *d;
|
||||
|
||||
if ((d = (unsigned long *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
udelay(*d);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_get_timer(unsigned long *current, unsigned long *base)
|
||||
*/
|
||||
static int API_get_timer(va_list ap)
|
||||
{
|
||||
unsigned long *base, *cur;
|
||||
|
||||
cur = (unsigned long *)va_arg(ap, u_int32_t);
|
||||
if (cur == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
base = (unsigned long *)va_arg(ap, u_int32_t);
|
||||
if (base == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*cur = get_timer(*base);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_dev_enum(struct device_info *)
|
||||
*
|
||||
*
|
||||
* cookies uniqely identify the previously enumerated device instance and
|
||||
* provide a hint for what to inspect in current enum iteration:
|
||||
*
|
||||
* - net: ð_device struct address from list pointed to by eth_devices
|
||||
*
|
||||
* - storage: block_dev_desc_t struct address from &ide_dev_desc[n],
|
||||
* &scsi_dev_desc[n] and similar tables
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int API_dev_enum(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
|
||||
/* arg is ptr to the device_info struct we are going to fill out */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->cookie == NULL) {
|
||||
/* start over - clean up enumeration */
|
||||
dev_enum_reset(); /* XXX shouldn't the name contain 'stor'? */
|
||||
debugf("RESTART ENUM\n");
|
||||
|
||||
/* net device enumeration first */
|
||||
if (dev_enum_net(di))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* The hidden assumption is there can only be one active network
|
||||
* device and it is identified upon enumeration (re)start, so there's
|
||||
* no point in trying to find network devices in other cases than the
|
||||
* (re)start and hence the 'next' device can only be storage
|
||||
*/
|
||||
if (!dev_enum_storage(di))
|
||||
/* make sure we mark there are no more devices */
|
||||
di->cookie = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int API_dev_open(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
int err = 0;
|
||||
|
||||
/* arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* Allow only one consumer of the device at a time */
|
||||
if (di->state == DEV_STA_OPEN)
|
||||
return API_EBUSY;
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
if (di->type & DEV_TYP_STOR)
|
||||
err = dev_open_stor(di->cookie);
|
||||
|
||||
else if (di->type & DEV_TYP_NET)
|
||||
err = dev_open_net(di->cookie);
|
||||
else
|
||||
err = API_ENODEV;
|
||||
|
||||
if (!err)
|
||||
di->state = DEV_STA_OPEN;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
static int API_dev_close(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
int err = 0;
|
||||
|
||||
/* arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->state == DEV_STA_CLOSED)
|
||||
return 0;
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
if (di->type & DEV_TYP_STOR)
|
||||
err = dev_close_stor(di->cookie);
|
||||
|
||||
else if (di->type & DEV_TYP_NET)
|
||||
err = dev_close_net(di->cookie);
|
||||
else
|
||||
/*
|
||||
* In case of unknown device we cannot change its state, so
|
||||
* only return error code
|
||||
*/
|
||||
err = API_ENODEV;
|
||||
|
||||
if (!err)
|
||||
di->state = DEV_STA_CLOSED;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Notice: this is for sending network packets only, as U-Boot does not
|
||||
* support writing to storage at the moment (12.2007)
|
||||
*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_dev_write(
|
||||
* struct device_info *di,
|
||||
* void *buf,
|
||||
* int *len
|
||||
* )
|
||||
*
|
||||
* buf: ptr to buffer from where to get the data to send
|
||||
*
|
||||
* len: length of packet to be sent (in bytes)
|
||||
*
|
||||
*/
|
||||
static int API_dev_write(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
void *buf;
|
||||
int *len;
|
||||
int err = 0;
|
||||
|
||||
/* 1. arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* XXX should we check if device is open? i.e. the ->state ? */
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
/* 2. arg is ptr to buffer from where to get data to write */
|
||||
buf = (void *)va_arg(ap, u_int32_t);
|
||||
if (buf == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* 3. arg is length of buffer */
|
||||
len = (int *)va_arg(ap, u_int32_t);
|
||||
if (len == NULL)
|
||||
return API_EINVAL;
|
||||
if (*len <= 0)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->type & DEV_TYP_STOR)
|
||||
/*
|
||||
* write to storage is currently not supported by U-Boot:
|
||||
* no storage device implements block_write() method
|
||||
*/
|
||||
return API_ENODEV;
|
||||
|
||||
else if (di->type & DEV_TYP_NET)
|
||||
err = dev_write_net(di->cookie, buf, *len);
|
||||
else
|
||||
err = API_ENODEV;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_dev_read(
|
||||
* struct device_info *di,
|
||||
* void *buf,
|
||||
* size_t *len,
|
||||
* unsigned long *start
|
||||
* size_t *act_len
|
||||
* )
|
||||
*
|
||||
* buf: ptr to buffer where to put the read data
|
||||
*
|
||||
* len: ptr to length to be read
|
||||
* - network: len of packet to read (in bytes)
|
||||
* - storage: # of blocks to read (can vary in size depending on define)
|
||||
*
|
||||
* start: ptr to start block (only used for storage devices, ignored for
|
||||
* network)
|
||||
*
|
||||
* act_len: ptr to where to put the len actually read
|
||||
*/
|
||||
static int API_dev_read(va_list ap)
|
||||
{
|
||||
struct device_info *di;
|
||||
void *buf;
|
||||
lbasize_t *len_stor, *act_len_stor;
|
||||
lbastart_t *start;
|
||||
int *len_net, *act_len_net;
|
||||
|
||||
/* 1. arg is ptr to the device_info struct */
|
||||
di = (struct device_info *)va_arg(ap, u_int32_t);
|
||||
if (di == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
/* XXX should we check if device is open? i.e. the ->state ? */
|
||||
|
||||
if (di->cookie == NULL)
|
||||
return API_ENODEV;
|
||||
|
||||
/* 2. arg is ptr to buffer from where to put the read data */
|
||||
buf = (void *)va_arg(ap, u_int32_t);
|
||||
if (buf == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (di->type & DEV_TYP_STOR) {
|
||||
/* 3. arg - ptr to var with # of blocks to read */
|
||||
len_stor = (lbasize_t *)va_arg(ap, u_int32_t);
|
||||
if (!len_stor)
|
||||
return API_EINVAL;
|
||||
if (*len_stor <= 0)
|
||||
return API_EINVAL;
|
||||
|
||||
/* 4. arg - ptr to var with start block */
|
||||
start = (lbastart_t *)va_arg(ap, u_int32_t);
|
||||
|
||||
/* 5. arg - ptr to var where to put the len actually read */
|
||||
act_len_stor = (lbasize_t *)va_arg(ap, u_int32_t);
|
||||
if (!act_len_stor)
|
||||
return API_EINVAL;
|
||||
|
||||
*act_len_stor = dev_read_stor(di->cookie, buf, *len_stor, *start);
|
||||
|
||||
} else if (di->type & DEV_TYP_NET) {
|
||||
|
||||
/* 3. arg points to the var with length of packet to read */
|
||||
len_net = (int *)va_arg(ap, u_int32_t);
|
||||
if (!len_net)
|
||||
return API_EINVAL;
|
||||
if (*len_net <= 0)
|
||||
return API_EINVAL;
|
||||
|
||||
/* 4. - ptr to var where to put the len actually read */
|
||||
act_len_net = (int *)va_arg(ap, u_int32_t);
|
||||
if (!act_len_net)
|
||||
return API_EINVAL;
|
||||
|
||||
*act_len_net = dev_read_net(di->cookie, buf, *len_net);
|
||||
|
||||
} else
|
||||
return API_ENODEV;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_env_get(const char *name, char **value)
|
||||
*
|
||||
* name: ptr to name of env var
|
||||
*/
|
||||
static int API_env_get(va_list ap)
|
||||
{
|
||||
char *name, **value;
|
||||
|
||||
if ((name = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
if ((value = (char **)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
*value = getenv(name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_env_set(const char *name, const char *value)
|
||||
*
|
||||
* name: ptr to name of env var
|
||||
*
|
||||
* value: ptr to value to be set
|
||||
*/
|
||||
static int API_env_set(va_list ap)
|
||||
{
|
||||
char *name, *value;
|
||||
|
||||
if ((name = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
if ((value = (char *)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
setenv(name, value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pseudo signature:
|
||||
*
|
||||
* int API_env_enum(const char *last, char **next)
|
||||
*
|
||||
* last: ptr to name of env var found in last iteration
|
||||
*/
|
||||
static int API_env_enum(va_list ap)
|
||||
{
|
||||
int i, n;
|
||||
char *last, **next;
|
||||
|
||||
last = (char *)va_arg(ap, u_int32_t);
|
||||
|
||||
if ((next = (char **)va_arg(ap, u_int32_t)) == NULL)
|
||||
return API_EINVAL;
|
||||
|
||||
if (last == NULL)
|
||||
/* start over */
|
||||
*next = ((char *)env_get_addr(0));
|
||||
else {
|
||||
*next = last;
|
||||
|
||||
for (i = 0; env_get_char(i) != '\0'; i = n + 1) {
|
||||
for (n = i; env_get_char(n) != '\0'; ++n) {
|
||||
if (n >= CONFIG_ENV_SIZE) {
|
||||
/* XXX shouldn't we set *next = NULL?? */
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (envmatch((uchar *)last, i) < 0)
|
||||
continue;
|
||||
|
||||
/* try to get next name */
|
||||
i = n + 1;
|
||||
if (env_get_char(i) == '\0') {
|
||||
/* no more left */
|
||||
*next = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
*next = ((char *)env_get_addr(i));
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static cfp_t calls_table[API_MAXCALL] = { NULL, };
|
||||
|
||||
/*
|
||||
* The main syscall entry point - this is not reentrant, only one call is
|
||||
* serviced until finished.
|
||||
*
|
||||
* e.g. syscall(1, int *, u_int32_t, u_int32_t, u_int32_t, u_int32_t);
|
||||
*
|
||||
* call: syscall number
|
||||
*
|
||||
* retval: points to the return value placeholder, this is the place the
|
||||
* syscall puts its return value, if NULL the caller does not
|
||||
* expect a return value
|
||||
*
|
||||
* ... syscall arguments (variable number)
|
||||
*
|
||||
* returns: 0 if the call not found, 1 if serviced
|
||||
*/
|
||||
int syscall(int call, int *retval, ...)
|
||||
{
|
||||
va_list ap;
|
||||
int rv;
|
||||
|
||||
if (call < 0 || call >= calls_no) {
|
||||
debugf("invalid call #%d\n", call);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (calls_table[call] == NULL) {
|
||||
debugf("syscall #%d does not have a handler\n", call);
|
||||
return 0;
|
||||
}
|
||||
|
||||
va_start(ap, retval);
|
||||
rv = calls_table[call](ap);
|
||||
if (retval != NULL)
|
||||
*retval = rv;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
void api_init(void)
|
||||
{
|
||||
struct api_signature *sig = NULL;
|
||||
|
||||
/* TODO put this into linker set one day... */
|
||||
calls_table[API_RSVD] = NULL;
|
||||
calls_table[API_GETC] = &API_getc;
|
||||
calls_table[API_PUTC] = &API_putc;
|
||||
calls_table[API_TSTC] = &API_tstc;
|
||||
calls_table[API_PUTS] = &API_puts;
|
||||
calls_table[API_RESET] = &API_reset;
|
||||
calls_table[API_GET_SYS_INFO] = &API_get_sys_info;
|
||||
calls_table[API_UDELAY] = &API_udelay;
|
||||
calls_table[API_GET_TIMER] = &API_get_timer;
|
||||
calls_table[API_DEV_ENUM] = &API_dev_enum;
|
||||
calls_table[API_DEV_OPEN] = &API_dev_open;
|
||||
calls_table[API_DEV_CLOSE] = &API_dev_close;
|
||||
calls_table[API_DEV_READ] = &API_dev_read;
|
||||
calls_table[API_DEV_WRITE] = &API_dev_write;
|
||||
calls_table[API_ENV_GET] = &API_env_get;
|
||||
calls_table[API_ENV_SET] = &API_env_set;
|
||||
calls_table[API_ENV_ENUM] = &API_env_enum;
|
||||
calls_no = API_MAXCALL;
|
||||
|
||||
debugf("API initialized with %d calls\n", calls_no);
|
||||
|
||||
dev_stor_init();
|
||||
|
||||
/*
|
||||
* Produce the signature so the API consumers can find it
|
||||
*/
|
||||
sig = malloc(sizeof(struct api_signature));
|
||||
if (sig == NULL) {
|
||||
printf("API: could not allocate memory for the signature!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
debugf("API sig @ 0x%08x\n", sig);
|
||||
memcpy(sig->magic, API_SIG_MAGIC, 8);
|
||||
sig->version = API_SIG_VERSION;
|
||||
sig->syscall = &syscall;
|
||||
sig->checksum = 0;
|
||||
sig->checksum = crc32(0, (unsigned char *)sig,
|
||||
sizeof(struct api_signature));
|
||||
debugf("syscall entry: 0x%08x\n", sig->syscall);
|
||||
}
|
||||
|
||||
void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long size,
|
||||
int flags)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!si->mr || !size || (flags == 0))
|
||||
return;
|
||||
|
||||
/* find free slot */
|
||||
for (i = 0; i < si->mr_no; i++)
|
||||
if (si->mr[i].flags == 0) {
|
||||
/* insert new mem region */
|
||||
si->mr[i].start = start;
|
||||
si->mr[i].size = size;
|
||||
si->mr[i].flags = flags;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,108 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <net.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define DEBUG
|
||||
#undef DEBUG
|
||||
|
||||
#if !defined(CONFIG_NET_MULTI)
|
||||
#error "API/net is currently only available for platforms with CONFIG_NET_MULTI"
|
||||
#endif
|
||||
|
||||
#ifdef DEBUG
|
||||
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
#else
|
||||
#define debugf(fmt, args...)
|
||||
#endif
|
||||
|
||||
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
|
||||
|
||||
static int dev_valid_net(void *cookie)
|
||||
{
|
||||
return ((void *)eth_get_dev() == cookie) ? 1 : 0;
|
||||
}
|
||||
|
||||
int dev_open_net(void *cookie)
|
||||
{
|
||||
if (!dev_valid_net(cookie))
|
||||
return API_ENODEV;
|
||||
|
||||
if (eth_init(gd->bd) < 0)
|
||||
return API_EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dev_close_net(void *cookie)
|
||||
{
|
||||
if (!dev_valid_net(cookie))
|
||||
return API_ENODEV;
|
||||
|
||||
eth_halt();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* There can only be one active eth interface at a time - use what is
|
||||
* currently set to eth_current
|
||||
*/
|
||||
int dev_enum_net(struct device_info *di)
|
||||
{
|
||||
struct eth_device *eth_current = eth_get_dev();
|
||||
|
||||
di->type = DEV_TYP_NET;
|
||||
di->cookie = (void *)eth_current;
|
||||
if (di->cookie == NULL)
|
||||
return 0;
|
||||
|
||||
memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6);
|
||||
|
||||
debugf("device found, returning cookie 0x%08x\n",
|
||||
(u_int32_t)di->cookie);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int dev_write_net(void *cookie, void *buf, int len)
|
||||
{
|
||||
/* XXX verify that cookie points to a valid net device??? */
|
||||
|
||||
return eth_send(buf, len);
|
||||
}
|
||||
|
||||
int dev_read_net(void *cookie, void *buf, int len)
|
||||
{
|
||||
/* XXX verify that cookie points to a valid net device??? */
|
||||
|
||||
return eth_receive(buf, len);
|
||||
}
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*
|
||||
* This file contains routines that fetch data from ARM-dependent sources
|
||||
* (bd_info etc.)
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#include <asm/u-boot.h>
|
||||
#include <asm/global_data.h>
|
||||
|
||||
#include "api_private.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/*
|
||||
* Important notice: handling of individual fields MUST be kept in sync with
|
||||
* include/asm-arm/u-boot.h and include/asm-arm/global_data.h, so any changes
|
||||
* need to reflect their current state and layout of structures involved!
|
||||
*/
|
||||
int platform_sys_info(struct sys_info *si)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
|
||||
platform_set_mr(si, gd->bd->bi_dram[i].start,
|
||||
gd->bd->bi_dram[i].size, MR_ATTR_DRAM);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
@ -0,0 +1,74 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*
|
||||
* This file contains routines that fetch data from PowerPC-dependent sources
|
||||
* (bd_info etc.)
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <linux/types.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#include <asm/u-boot.h>
|
||||
#include <asm/global_data.h>
|
||||
|
||||
#include "api_private.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/*
|
||||
* Important notice: handling of individual fields MUST be kept in sync with
|
||||
* include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
|
||||
* need to reflect their current state and layout of structures involved!
|
||||
*/
|
||||
int platform_sys_info(struct sys_info *si)
|
||||
{
|
||||
si->clk_bus = gd->bus_clk;
|
||||
si->clk_cpu = gd->cpu_clk;
|
||||
|
||||
#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) || \
|
||||
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
|
||||
#define bi_bar bi_immr_base
|
||||
#elif defined(CONFIG_MPC5xxx)
|
||||
#define bi_bar bi_mbar_base
|
||||
#elif defined(CONFIG_MPC83xx)
|
||||
#define bi_bar bi_immrbar
|
||||
#elif defined(CONFIG_MPC8220)
|
||||
#define bi_bar bi_mbar_base
|
||||
#endif
|
||||
|
||||
#if defined(bi_bar)
|
||||
si->bar = gd->bd->bi_bar;
|
||||
#undef bi_bar
|
||||
#else
|
||||
si->bar = 0;
|
||||
#endif
|
||||
|
||||
platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
|
||||
platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
|
||||
platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
* (C) Copyright 2007 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _API_PRIVATE_H_
|
||||
#define _API_PRIVATE_H_
|
||||
|
||||
void api_init(void);
|
||||
void platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
|
||||
int platform_sys_info(struct sys_info *);
|
||||
|
||||
void dev_enum_reset(void);
|
||||
int dev_enum_storage(struct device_info *);
|
||||
int dev_enum_net(struct device_info *);
|
||||
|
||||
int dev_open_stor(void *);
|
||||
int dev_open_net(void *);
|
||||
int dev_close_stor(void *);
|
||||
int dev_close_net(void *);
|
||||
|
||||
lbasize_t dev_read_stor(void *, void *, lbasize_t, lbastart_t);
|
||||
int dev_read_net(void *, void *, int);
|
||||
int dev_write_net(void *, void *, int);
|
||||
|
||||
void dev_stor_init(void);
|
||||
|
||||
#endif /* _API_PRIVATE_H_ */
|
||||
|
|
@ -0,0 +1,390 @@
|
|||
/*
|
||||
* (C) Copyright 2007-2008 Semihalf
|
||||
*
|
||||
* Written by: Rafal Jaworowski <raj@semihalf.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <api_public.h>
|
||||
|
||||
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
|
||||
#include <usb.h>
|
||||
#endif
|
||||
|
||||
#define DEBUG
|
||||
#undef DEBUG
|
||||
|
||||
#ifdef DEBUG
|
||||
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
#else
|
||||
#define debugf(fmt, args...)
|
||||
#endif
|
||||
|
||||
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
|
||||
|
||||
|
||||
#define ENUM_IDE 0
|
||||
#define ENUM_USB 1
|
||||
#define ENUM_SCSI 2
|
||||
#define ENUM_MMC 3
|
||||
#define ENUM_SATA 4
|
||||
#define ENUM_MAX 5
|
||||
|
||||
struct stor_spec {
|
||||
int max_dev;
|
||||
int enum_started;
|
||||
int enum_ended;
|
||||
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
|
||||
char *name;
|
||||
};
|
||||
|
||||
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
|
||||
|
||||
|
||||
void dev_stor_init(void)
|
||||
{
|
||||
#if defined(CONFIG_CMD_IDE)
|
||||
specs[ENUM_IDE].max_dev = CONFIG_SYS_IDE_MAXDEVICE;
|
||||
specs[ENUM_IDE].enum_started = 0;
|
||||
specs[ENUM_IDE].enum_ended = 0;
|
||||
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
|
||||
specs[ENUM_IDE].name = "ide";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_MMC)
|
||||
specs[ENUM_MMC].max_dev = CONFIG_SYS_MMC_MAX_DEVICE;
|
||||
specs[ENUM_MMC].enum_started = 0;
|
||||
specs[ENUM_MMC].enum_ended = 0;
|
||||
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
|
||||
specs[ENUM_MMC].name = "mmc";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_SATA)
|
||||
specs[ENUM_SATA].max_dev = CONFIG_SYS_SATA_MAX_DEVICE;
|
||||
specs[ENUM_SATA].enum_started = 0;
|
||||
specs[ENUM_SATA].enum_ended = 0;
|
||||
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
|
||||
specs[ENUM_SATA].name = "sata";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_SCSI)
|
||||
specs[ENUM_SCSI].max_dev = CONFIG_SYS_SCSI_MAX_DEVICE;
|
||||
specs[ENUM_SCSI].enum_started = 0;
|
||||
specs[ENUM_SCSI].enum_ended = 0;
|
||||
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
|
||||
specs[ENUM_SCSI].name = "scsi";
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
|
||||
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
|
||||
specs[ENUM_USB].enum_started = 0;
|
||||
specs[ENUM_USB].enum_ended = 0;
|
||||
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
|
||||
specs[ENUM_USB].name = "usb";
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Finds next available device in the storage group
|
||||
*
|
||||
* type: storage group type - ENUM_IDE, ENUM_SCSI etc.
|
||||
*
|
||||
* first: if 1 the first device in the storage group is returned (if
|
||||
* exists), if 0 the next available device is searched
|
||||
*
|
||||
* more: returns 0/1 depending if there are more devices in this group
|
||||
* available (for future iterations)
|
||||
*
|
||||
* returns: 0/1 depending if device found in this iteration
|
||||
*/
|
||||
static int dev_stor_get(int type, int first, int *more, struct device_info *di)
|
||||
{
|
||||
int found = 0;
|
||||
*more = 0;
|
||||
|
||||
int i;
|
||||
|
||||
block_dev_desc_t *dd;
|
||||
|
||||
if (first) {
|
||||
di->cookie = (void *)get_dev(specs[type].name, 0);
|
||||
if (di->cookie == NULL)
|
||||
return 0;
|
||||
else
|
||||
found = 1;
|
||||
|
||||
} else {
|
||||
for (i = 0; i < specs[type].max_dev; i++)
|
||||
if (di->cookie == (void *)get_dev(specs[type].name, i)) {
|
||||
/* previous cookie found -- advance to the
|
||||
* next device, if possible */
|
||||
|
||||
if (++i >= specs[type].max_dev) {
|
||||
/* out of range, no more to enum */
|
||||
di->cookie = NULL;
|
||||
break;
|
||||
}
|
||||
|
||||
di->cookie = (void *)get_dev(specs[type].name, i);
|
||||
if (di->cookie == NULL)
|
||||
return 0;
|
||||
else
|
||||
found = 1;
|
||||
|
||||
/* provide hint if there are more devices in
|
||||
* this group to enumerate */
|
||||
if ((i + 1) < specs[type].max_dev)
|
||||
*more = 1;
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (found) {
|
||||
di->type = specs[type].type;
|
||||
|
||||
if (di->cookie != NULL) {
|
||||
dd = (block_dev_desc_t *)di->cookie;
|
||||
if (dd->type == DEV_TYPE_UNKNOWN) {
|
||||
debugf("device instance exists, but is not active..");
|
||||
found = 0;
|
||||
} else {
|
||||
di->di_stor.block_count = dd->lba;
|
||||
di->di_stor.block_size = dd->blksz;
|
||||
}
|
||||
}
|
||||
|
||||
} else
|
||||
di->cookie = NULL;
|
||||
|
||||
return found;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* returns: ENUM_IDE, ENUM_USB etc. based on block_dev_desc_t
|
||||
*/
|
||||
static int dev_stor_type(block_dev_desc_t *dd)
|
||||
{
|
||||
int i, j;
|
||||
|
||||
for (i = ENUM_IDE; i < ENUM_MAX; i++)
|
||||
for (j = 0; j < specs[i].max_dev; j++)
|
||||
if (dd == get_dev(specs[i].name, j))
|
||||
return i;
|
||||
|
||||
return ENUM_MAX;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* returns: 0/1 whether cookie points to some device in this group
|
||||
*/
|
||||
static int dev_is_stor(int type, struct device_info *di)
|
||||
{
|
||||
return (dev_stor_type(di->cookie) == type) ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
static int dev_enum_stor(int type, struct device_info *di)
|
||||
{
|
||||
int found = 0, more = 0;
|
||||
|
||||
debugf("called, type %d\n", type);
|
||||
|
||||
/*
|
||||
* Formulae for enumerating storage devices:
|
||||
* 1. if cookie (hint from previous enum call) is NULL we start again
|
||||
* with enumeration, so return the first available device, done.
|
||||
*
|
||||
* 2. if cookie is not NULL, check if it identifies some device in
|
||||
* this group:
|
||||
*
|
||||
* 2a. if cookie is a storage device from our group (IDE, USB etc.),
|
||||
* return next available (if exists) in this group
|
||||
*
|
||||
* 2b. if it isn't device from our group, check if such devices were
|
||||
* ever enumerated before:
|
||||
* - if not, return the first available device from this group
|
||||
* - else return 0
|
||||
*/
|
||||
|
||||
if (di->cookie == NULL) {
|
||||
|
||||
debugf("group%d - enum restart\n", type);
|
||||
|
||||
/*
|
||||
* 1. Enumeration (re-)started: take the first available
|
||||
* device, if exists
|
||||
*/
|
||||
found = dev_stor_get(type, 1, &more, di);
|
||||
specs[type].enum_started = 1;
|
||||
|
||||
} else if (dev_is_stor(type, di)) {
|
||||
|
||||
debugf("group%d - enum continued for the next device\n", type);
|
||||
|
||||
if (specs[type].enum_ended) {
|
||||
debugf("group%d - nothing more to enum!\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 2a. Attempt to take a next available device in the group */
|
||||
found = dev_stor_get(type, 0, &more, di);
|
||||
|
||||
} else {
|
||||
|
||||
if (specs[type].enum_ended) {
|
||||
debugf("group %d - already enumerated, skipping\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
debugf("group%d - first time enum\n", type);
|
||||
|
||||
if (specs[type].enum_started == 0) {
|
||||
/*
|
||||
* 2b. If enumerating devices in this group did not
|
||||
* happen before, it means the cookie pointed to a
|
||||
* device frome some other group (another storage
|
||||
* group, or network); in this case try to take the
|
||||
* first available device from our group
|
||||
*/
|
||||
specs[type].enum_started = 1;
|
||||
|
||||
/*
|
||||
* Attempt to take the first device in this group:
|
||||
*'first element' flag is set
|
||||
*/
|
||||
found = dev_stor_get(type, 1, &more, di);
|
||||
|
||||
} else {
|
||||
errf("group%d - out of order iteration\n", type);
|
||||
found = 0;
|
||||
more = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* If there are no more devices in this group, consider its
|
||||
* enumeration finished
|
||||
*/
|
||||
specs[type].enum_ended = (!more) ? 1 : 0;
|
||||
|
||||
if (found)
|
||||
debugf("device found, returning cookie 0x%08x\n",
|
||||
(u_int32_t)di->cookie);
|
||||
else
|
||||
debugf("no device found\n");
|
||||
|
||||
return found;
|
||||
}
|
||||
|
||||
void dev_enum_reset(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ENUM_MAX; i ++) {
|
||||
specs[i].enum_started = 0;
|
||||
specs[i].enum_ended = 0;
|
||||
}
|
||||
}
|
||||
|
||||
int dev_enum_storage(struct device_info *di)
|
||||
{
|
||||
int i;
|
||||
|
||||
/*
|
||||
* check: ide, usb, scsi, mmc
|
||||
*/
|
||||
for (i = ENUM_IDE; i < ENUM_MAX; i ++) {
|
||||
if (dev_enum_stor(i, di))
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dev_stor_is_valid(int type, block_dev_desc_t *dd)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < specs[type].max_dev; i++)
|
||||
if (dd == get_dev(specs[type].name, i))
|
||||
if (dd->type != DEV_TYPE_UNKNOWN)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int dev_open_stor(void *cookie)
|
||||
{
|
||||
int type = dev_stor_type(cookie);
|
||||
|
||||
if (type == ENUM_MAX)
|
||||
return API_ENODEV;
|
||||
|
||||
if (dev_stor_is_valid(type, (block_dev_desc_t *)cookie))
|
||||
return 0;
|
||||
|
||||
return API_ENODEV;
|
||||
}
|
||||
|
||||
|
||||
int dev_close_stor(void *cookie)
|
||||
{
|
||||
/*
|
||||
* Not much to do as we actually do not alter storage devices upon
|
||||
* close
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int dev_stor_index(block_dev_desc_t *dd)
|
||||
{
|
||||
int i, type;
|
||||
|
||||
type = dev_stor_type(dd);
|
||||
for (i = 0; i < specs[type].max_dev; i++)
|
||||
if (dd == get_dev(specs[type].name, i))
|
||||
return i;
|
||||
|
||||
return (specs[type].max_dev);
|
||||
}
|
||||
|
||||
|
||||
lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
|
||||
{
|
||||
int type;
|
||||
block_dev_desc_t *dd = (block_dev_desc_t *)cookie;
|
||||
|
||||
if ((type = dev_stor_type(dd)) == ENUM_MAX)
|
||||
return 0;
|
||||
|
||||
if (!dev_stor_is_valid(type, dd))
|
||||
return 0;
|
||||
|
||||
if ((dd->block_read) == NULL) {
|
||||
debugf("no block_read() for device 0x%08x\n", cookie);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return (dd->block_read(dev_stor_index(dd), start, len, buf));
|
||||
}
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
/*/include/asm/arch
|
||||
/*/include/asm/proc
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
#
|
||||
# (C) Copyright 2000-2002
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
CROSS_COMPILE ?= arm-linux-
|
||||
|
||||
ifndef CONFIG_STANDALONE_LOAD_ADDR
|
||||
ifeq ($(SOC),omap3)
|
||||
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
|
||||
else
|
||||
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
|
||||
endif
|
||||
endif
|
||||
|
||||
PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
|
||||
|
||||
# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
|
||||
PLATFORM_CPPFLAGS += $(call cc-option,-marm,)
|
||||
|
||||
# Try if EABI is supported, else fall back to old API,
|
||||
# i. e. for example:
|
||||
# - with ELDK 4.2 (EABI supported), use:
|
||||
# -mabi=aapcs-linux -mno-thumb-interwork
|
||||
# - with ELDK 4.1 (gcc 4.x, no EABI), use:
|
||||
# -mabi=apcs-gnu -mno-thumb-interwork
|
||||
# - with ELDK 3.1 (gcc 3.x), use:
|
||||
# -mapcs-32 -mno-thumb-interwork
|
||||
PLATFORM_CPPFLAGS += $(call cc-option,\
|
||||
-mabi=aapcs-linux -mno-thumb-interwork,\
|
||||
$(call cc-option,\
|
||||
-mapcs-32,\
|
||||
$(call cc-option,\
|
||||
-mabi=apcs-gnu,\
|
||||
)\
|
||||
) $(call cc-option,-mno-thumb-interwork,)\
|
||||
)
|
||||
|
||||
# For EABI, make sure to provide raise()
|
||||
ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
|
||||
# This file is parsed several times; make sure to add only once.
|
||||
ifeq (,$(findstring arch/arm/lib/eabi_compat.o,$(PLATFORM_LIBS)))
|
||||
PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o
|
||||
endif
|
||||
endif
|
||||
|
||||
# needed for relocation
|
||||
ifndef CONFIG_NAND_SPL
|
||||
LDFLAGS_u-boot += -pie
|
||||
endif
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
COBJS = cpu.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
|
||||
|
||||
# Make ARMv5 to allow more compilers to work, even though its v6.
|
||||
PLATFORM_CPPFLAGS += -march=armv5
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
* (C) Copyright 2004 Texas Insturments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* CPU specific code
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
static void cache_flush(void);
|
||||
|
||||
int cleanup_before_linux (void)
|
||||
{
|
||||
/*
|
||||
* this function is called just before we call linux
|
||||
* it prepares the processor for linux
|
||||
*
|
||||
* we turn off caches etc ...
|
||||
*/
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
#ifdef CONFIG_LCD
|
||||
{
|
||||
extern void lcd_disable(void);
|
||||
extern void lcd_panel_disable(void);
|
||||
|
||||
lcd_disable(); /* proper disable of lcd & panel */
|
||||
lcd_panel_disable();
|
||||
}
|
||||
#endif
|
||||
|
||||
/* turn off I/D-cache */
|
||||
icache_disable();
|
||||
dcache_disable();
|
||||
/* flush I/D-cache */
|
||||
cache_flush();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void cache_flush(void)
|
||||
{
|
||||
unsigned long i = 0;
|
||||
|
||||
asm ("mcr p15, 0, %0, c7, c10, 0": :"r" (i)); /* clean entire data cache */
|
||||
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); /* invalidate both caches and flush btb */
|
||||
asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); /* mem barrier to sync things */
|
||||
}
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += generic.o
|
||||
COBJS += timer.o
|
||||
COBJS += devices.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
*
|
||||
* (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
|
||||
*
|
||||
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
#ifdef CONFIG_SYS_MX31_UART1
|
||||
void mx31_uart1_hw_init(void)
|
||||
{
|
||||
/* setup pins for UART1 */
|
||||
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
|
||||
mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
|
||||
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
|
||||
mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MXC_SPI
|
||||
void mx31_spi2_hw_init(void)
|
||||
{
|
||||
/* SPI2 */
|
||||
mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
|
||||
mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
|
||||
mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
|
||||
mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
|
||||
mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
|
||||
mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
|
||||
mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
|
||||
|
||||
/* start SPI2 clock */
|
||||
__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,174 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
static u32 mx31_decode_pll(u32 reg, u32 infreq)
|
||||
{
|
||||
u32 mfi = (reg >> 10) & 0xf;
|
||||
u32 mfn = reg & 0x3ff;
|
||||
u32 mfd = (reg >> 16) & 0x3ff;
|
||||
u32 pd = (reg >> 26) & 0xf;
|
||||
|
||||
mfi = mfi <= 5 ? 5 : mfi;
|
||||
mfd += 1;
|
||||
pd += 1;
|
||||
|
||||
return ((2 * (infreq >> 10) * (mfi * mfd + mfn)) /
|
||||
(mfd * pd)) << 10;
|
||||
}
|
||||
|
||||
static u32 mx31_get_mpl_dpdgck_clk(void)
|
||||
{
|
||||
u32 infreq;
|
||||
|
||||
if ((__REG(CCM_CCMR) & CCMR_PRCS_MASK) == CCMR_FPM)
|
||||
infreq = CONFIG_MX31_CLK32 * 1024;
|
||||
else
|
||||
infreq = CONFIG_MX31_HCLK_FREQ;
|
||||
|
||||
return mx31_decode_pll(__REG(CCM_MPCTL), infreq);
|
||||
}
|
||||
|
||||
static u32 mx31_get_mcu_main_clk(void)
|
||||
{
|
||||
/* For now we assume mpl_dpdgck_clk == mcu_main_clk
|
||||
* which should be correct for most boards
|
||||
*/
|
||||
return mx31_get_mpl_dpdgck_clk();
|
||||
}
|
||||
|
||||
u32 mx31_get_ipg_clk(void)
|
||||
{
|
||||
u32 freq = mx31_get_mcu_main_clk();
|
||||
u32 pdr0 = __REG(CCM_PDR0);
|
||||
|
||||
freq /= ((pdr0 >> 3) & 0x7) + 1;
|
||||
freq /= ((pdr0 >> 6) & 0x3) + 1;
|
||||
|
||||
return freq;
|
||||
}
|
||||
|
||||
void mx31_dump_clocks(void)
|
||||
{
|
||||
u32 cpufreq = mx31_get_mcu_main_clk();
|
||||
printf("mx31 cpu clock: %dMHz\n",cpufreq / 1000000);
|
||||
printf("ipg clock : %dHz\n", mx31_get_ipg_clk());
|
||||
}
|
||||
|
||||
void mx31_gpio_mux(unsigned long mode)
|
||||
{
|
||||
unsigned long reg, shift, tmp;
|
||||
|
||||
reg = IOMUXC_BASE + (mode & 0x1fc);
|
||||
shift = (~mode & 0x3) * 8;
|
||||
|
||||
tmp = __REG(reg);
|
||||
tmp &= ~(0xff << shift);
|
||||
tmp |= ((mode >> IOMUX_MODE_POS) & 0xff) << shift;
|
||||
__REG(reg) = tmp;
|
||||
}
|
||||
|
||||
void mx31_set_pad(enum iomux_pins pin, u32 config)
|
||||
{
|
||||
u32 field, l, reg;
|
||||
|
||||
pin &= IOMUX_PADNUM_MASK;
|
||||
reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4;
|
||||
field = (pin + 2) % 3;
|
||||
|
||||
l = __REG(reg);
|
||||
l &= ~(0x1ff << (field * 10));
|
||||
l |= config << (field * 10);
|
||||
__REG(reg) = l;
|
||||
|
||||
}
|
||||
|
||||
struct mx3_cpu_type mx31_cpu_type[] = {
|
||||
{ .srev = 0x00, .v = 0x10 },
|
||||
{ .srev = 0x10, .v = 0x11 },
|
||||
{ .srev = 0x11, .v = 0x11 },
|
||||
{ .srev = 0x12, .v = 0x1F },
|
||||
{ .srev = 0x13, .v = 0x1F },
|
||||
{ .srev = 0x14, .v = 0x12 },
|
||||
{ .srev = 0x15, .v = 0x12 },
|
||||
{ .srev = 0x28, .v = 0x20 },
|
||||
{ .srev = 0x29, .v = 0x20 },
|
||||
};
|
||||
|
||||
u32 get_cpu_rev(void)
|
||||
{
|
||||
u32 i, srev;
|
||||
|
||||
/* read SREV register from IIM module */
|
||||
struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR;
|
||||
srev = readl(&iim->iim_srev);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
|
||||
if (srev == mx31_cpu_type[i].srev)
|
||||
return mx31_cpu_type[i].v;
|
||||
|
||||
return srev | 0x8000;
|
||||
}
|
||||
|
||||
char *get_reset_cause(void)
|
||||
{
|
||||
/* read RCSR register from CCM module */
|
||||
struct clock_control_regs *ccm =
|
||||
(struct clock_control_regs *)CCM_BASE;
|
||||
|
||||
u32 cause = readl(&ccm->rcsr) & 0x07;
|
||||
|
||||
switch (cause) {
|
||||
case 0x0000:
|
||||
return "POR";
|
||||
break;
|
||||
case 0x0001:
|
||||
return "RST";
|
||||
break;
|
||||
case 0x0002:
|
||||
return "WDOG";
|
||||
break;
|
||||
case 0x0006:
|
||||
return "JTAG";
|
||||
break;
|
||||
default:
|
||||
return "unknown reset";
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DISPLAY_CPUINFO)
|
||||
int print_cpuinfo (void)
|
||||
{
|
||||
u32 srev = get_cpu_rev();
|
||||
|
||||
printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.",
|
||||
(srev & 0xF0) >> 4, (srev & 0x0F),
|
||||
((srev & 0x8000) ? " unknown" : ""),
|
||||
mx31_get_mcu_main_clk() / 1000000);
|
||||
printf("Reset cause: %s\n", get_reset_cause());
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,205 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <div64.h>
|
||||
#include <watchdog.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
|
||||
|
||||
/* General purpose timers registers */
|
||||
#define GPTCR __REG(TIMER_BASE) /* Control register */
|
||||
#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
|
||||
#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
|
||||
#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
|
||||
|
||||
/* General purpose timers bitfields */
|
||||
#define GPTCR_SWR (1 << 15) /* Software reset */
|
||||
#define GPTCR_FRR (1 << 9) /* Freerun / restart */
|
||||
#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
|
||||
#define GPTCR_TEN 1 /* Timer enable */
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */
|
||||
#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
|
||||
/* ~0.4% error - measured with stop-watch on 100s boot-delay */
|
||||
static inline unsigned long long tick_to_time(unsigned long long tick)
|
||||
{
|
||||
tick *= CONFIG_SYS_HZ;
|
||||
do_div(tick, CONFIG_MX31_CLK32);
|
||||
return tick;
|
||||
}
|
||||
|
||||
static inline unsigned long long time_to_tick(unsigned long long time)
|
||||
{
|
||||
time *= CONFIG_MX31_CLK32;
|
||||
do_div(time, CONFIG_SYS_HZ);
|
||||
return time;
|
||||
}
|
||||
|
||||
static inline unsigned long long us_to_tick(unsigned long long us)
|
||||
{
|
||||
us = us * CONFIG_MX31_CLK32 + 999999;
|
||||
do_div(us, 1000000);
|
||||
return us;
|
||||
}
|
||||
#else
|
||||
/* ~2% error */
|
||||
#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
|
||||
#define US_PER_TICK (1000000 / CONFIG_MX31_CLK32)
|
||||
|
||||
static inline unsigned long long tick_to_time(unsigned long long tick)
|
||||
{
|
||||
do_div(tick, TICK_PER_TIME);
|
||||
return tick;
|
||||
}
|
||||
|
||||
static inline unsigned long long time_to_tick(unsigned long long time)
|
||||
{
|
||||
return time * TICK_PER_TIME;
|
||||
}
|
||||
|
||||
static inline unsigned long long us_to_tick(unsigned long long us)
|
||||
{
|
||||
us += US_PER_TICK - 1;
|
||||
do_div(us, US_PER_TICK);
|
||||
return us;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
|
||||
int timer_init (void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* setup GP Timer 1 */
|
||||
GPTCR = GPTCR_SWR;
|
||||
for (i = 0; i < 100; i++)
|
||||
GPTCR = 0; /* We have no udelay by now */
|
||||
GPTPR = 0; /* 32Khz */
|
||||
/* Freerun Mode, PERCLK1 input */
|
||||
GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void reset_timer_masked (void)
|
||||
{
|
||||
/* reset time */
|
||||
gd->lastinc = GPTCNT; /* capture current incrementer value time */
|
||||
gd->tbl = 0; /* start "advancing" time stamp from 0 */
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
reset_timer_masked();
|
||||
}
|
||||
|
||||
unsigned long long get_ticks (void)
|
||||
{
|
||||
ulong now = GPTCNT; /* current tick value */
|
||||
|
||||
if (now >= gd->lastinc) /* normal mode (non roll) */
|
||||
/* move stamp forward with absolut diff ticks */
|
||||
gd->tbl += (now - gd->lastinc);
|
||||
else /* we have rollover of incrementer */
|
||||
gd->tbl += (0xFFFFFFFF - gd->lastinc) + now;
|
||||
gd->lastinc = now;
|
||||
return gd->tbl;
|
||||
}
|
||||
|
||||
ulong get_timer_masked (void)
|
||||
{
|
||||
/*
|
||||
* get_ticks() returns a long long (64 bit), it wraps in
|
||||
* 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
|
||||
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
|
||||
* 5 * 10^6 days - long enough.
|
||||
*/
|
||||
return tick_to_time(get_ticks());
|
||||
}
|
||||
|
||||
ulong get_timer (ulong base)
|
||||
{
|
||||
return get_timer_masked () - base;
|
||||
}
|
||||
|
||||
void set_timer (ulong t)
|
||||
{
|
||||
gd->tbl = time_to_tick(t);
|
||||
}
|
||||
|
||||
/* delay x useconds AND preserve advance timestamp value */
|
||||
void __udelay (unsigned long usec)
|
||||
{
|
||||
unsigned long long tmp;
|
||||
ulong tmo;
|
||||
|
||||
tmo = us_to_tick(usec);
|
||||
tmp = get_ticks() + tmo; /* get current timestamp */
|
||||
|
||||
while (get_ticks() < tmp) /* loop till event */
|
||||
/*NOP*/;
|
||||
}
|
||||
|
||||
void reset_cpu (ulong addr)
|
||||
{
|
||||
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
|
||||
wdog->wcr = WDOG_ENABLE;
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HW_WATCHDOG
|
||||
void mxc_hw_watchdog_enable(void)
|
||||
{
|
||||
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
|
||||
u16 secs;
|
||||
|
||||
/*
|
||||
* The timer watchdog can be set between
|
||||
* 0.5 and 128 Seconds. If not defined
|
||||
* in configuration file, sets 64 Seconds
|
||||
*/
|
||||
#ifdef CONFIG_SYS_WD_TIMER_SECS
|
||||
secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF;
|
||||
if (!secs) secs = 1;
|
||||
#else
|
||||
secs = 64;
|
||||
#endif
|
||||
writew(readw(&wdog->wcr) | (secs << WDOG_WT_SHIFT) | WDOG_ENABLE,
|
||||
&wdog->wcr);
|
||||
}
|
||||
|
||||
|
||||
void mxc_hw_watchdog_reset(void)
|
||||
{
|
||||
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
|
||||
|
||||
writew(0x5555, &wdog->wsr);
|
||||
writew(0xAAAA, &wdog->wsr);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += generic.o
|
||||
COBJS += timer.o
|
||||
COBJS += iomux.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
|
||||
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
$(TOPDIR)/include/asm/arch/asm-offsets.h: $(TOPDIR)/include/autoconf.mk.dep \
|
||||
./asm-offsets.s
|
||||
@echo Generating $@
|
||||
$(TOPDIR)/tools/scripts/make-asm-offsets ./asm-offsets.s $@
|
||||
|
||||
asm-offsets.s: $(TOPDIR)/include/autoconf.mk.dep \
|
||||
./asm-offsets.c
|
||||
$(CC) -DDO_DEPS_ONLY \
|
||||
$(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
|
||||
-o $@ ./asm-offsets.c -c -S
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
/*
|
||||
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
|
||||
*
|
||||
* This program is used to generate definitions needed by
|
||||
* assembly language modules.
|
||||
*
|
||||
* We use the technique used in the OSF Mach kernel code:
|
||||
* generate asm statements containing #defines,
|
||||
* compile this file to assembler, and then extract the
|
||||
* #defines from the assembly-language output.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
#include <linux/kbuild.h>
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
/* Round up to make sure size gives nice stack alignment */
|
||||
DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
|
||||
DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
|
||||
DEFINE(CLKCTL_PDR1, offsetof(struct ccm_regs, pdr1));
|
||||
DEFINE(CLKCTL_PDR2, offsetof(struct ccm_regs, pdr2));
|
||||
DEFINE(CLKCTL_PDR3, offsetof(struct ccm_regs, pdr3));
|
||||
DEFINE(CLKCTL_PDR4, offsetof(struct ccm_regs, pdr4));
|
||||
DEFINE(CLKCTL_RCSR, offsetof(struct ccm_regs, rcsr));
|
||||
DEFINE(CLKCTL_MPCTL, offsetof(struct ccm_regs, mpctl));
|
||||
DEFINE(CLKCTL_PPCTL, offsetof(struct ccm_regs, ppctl));
|
||||
DEFINE(CLKCTL_ACMR, offsetof(struct ccm_regs, acmr));
|
||||
DEFINE(CLKCTL_COSR, offsetof(struct ccm_regs, cosr));
|
||||
DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
|
||||
DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
|
||||
DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,463 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/crm_regs.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <netdev.h>
|
||||
|
||||
#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel))
|
||||
#define CLK_CODE_ARM(c) (((c) >> 16) & 0xFF)
|
||||
#define CLK_CODE_AHB(c) (((c) >> 8) & 0xFF)
|
||||
#define CLK_CODE_PATH(c) ((c) & 0xFF)
|
||||
|
||||
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
|
||||
|
||||
#ifdef CONFIG_FSL_ESDHC
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
#endif
|
||||
|
||||
static int g_clk_mux_auto[8] = {
|
||||
CLK_CODE(1, 3, 0), CLK_CODE(1, 2, 1), CLK_CODE(2, 1, 1), -1,
|
||||
CLK_CODE(1, 6, 0), CLK_CODE(1, 4, 1), CLK_CODE(2, 2, 1), -1,
|
||||
};
|
||||
|
||||
static int g_clk_mux_consumer[16] = {
|
||||
CLK_CODE(1, 4, 0), CLK_CODE(1, 3, 1), CLK_CODE(1, 3, 1), -1,
|
||||
-1, -1, CLK_CODE(4, 1, 0), CLK_CODE(1, 5, 0),
|
||||
CLK_CODE(1, 8, 1), CLK_CODE(1, 6, 1), CLK_CODE(2, 4, 0), -1,
|
||||
-1, -1, CLK_CODE(4, 2, 0), -1,
|
||||
};
|
||||
|
||||
static int hsp_div_table[3][16] = {
|
||||
{4, 3, 2, -1, -1, -1, 1, 5, 4, 3, 2, -1, -1, -1, 1, -1},
|
||||
{-1, -1, -1, -1, -1, -1, -1, -1, 8, 6, 4, -1, -1, -1, 2, -1},
|
||||
{3, -1, -1, -1, -1, -1, -1, -1, 3, -1, -1, -1, -1, -1, -1, -1},
|
||||
};
|
||||
|
||||
u32 get_cpu_rev(void)
|
||||
{
|
||||
int reg;
|
||||
struct iim_regs *iim =
|
||||
(struct iim_regs *)IIM_BASE_ADDR;
|
||||
reg = readl(&iim->iim_srev);
|
||||
if (!reg) {
|
||||
reg = readw(ROMPATCH_REV);
|
||||
reg <<= 4;
|
||||
} else {
|
||||
reg += CHIP_REV_1_0;
|
||||
}
|
||||
|
||||
return 0x35000 + (reg & 0xFF);
|
||||
}
|
||||
|
||||
static u32 get_arm_div(u32 pdr0, u32 *fi, u32 *fd)
|
||||
{
|
||||
int *pclk_mux;
|
||||
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
|
||||
pclk_mux = g_clk_mux_consumer +
|
||||
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
|
||||
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
|
||||
} else {
|
||||
pclk_mux = g_clk_mux_auto +
|
||||
((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >>
|
||||
MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET);
|
||||
}
|
||||
|
||||
if ((*pclk_mux) == -1)
|
||||
return -1;
|
||||
|
||||
if (fi && fd) {
|
||||
if (!CLK_CODE_PATH(*pclk_mux)) {
|
||||
*fi = *fd = 1;
|
||||
return CLK_CODE_ARM(*pclk_mux);
|
||||
}
|
||||
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
|
||||
*fi = 3;
|
||||
*fd = 4;
|
||||
} else {
|
||||
*fi = 2;
|
||||
*fd = 3;
|
||||
}
|
||||
}
|
||||
return CLK_CODE_ARM(*pclk_mux);
|
||||
}
|
||||
|
||||
static int get_ahb_div(u32 pdr0)
|
||||
{
|
||||
int *pclk_mux;
|
||||
|
||||
pclk_mux = g_clk_mux_consumer +
|
||||
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
|
||||
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
|
||||
|
||||
if ((*pclk_mux) == -1)
|
||||
return -1;
|
||||
|
||||
return CLK_CODE_AHB(*pclk_mux);
|
||||
}
|
||||
|
||||
static u32 decode_pll(u32 reg, u32 infreq)
|
||||
{
|
||||
u32 mfi = (reg >> 10) & 0xf;
|
||||
u32 mfn = reg & 0x3f;
|
||||
u32 mfd = (reg >> 16) & 0x3f;
|
||||
u32 pd = (reg >> 26) & 0xf;
|
||||
|
||||
mfi = mfi <= 5 ? 5 : mfi;
|
||||
mfd += 1;
|
||||
pd += 1;
|
||||
|
||||
return ((2 * (infreq / 1000) * (mfi * mfd + mfn)) / (mfd * pd)) * 1000;
|
||||
}
|
||||
|
||||
static u32 get_mcu_main_clk(void)
|
||||
{
|
||||
u32 arm_div = 0, fi = 0, fd = 0;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
arm_div = get_arm_div(readl(&ccm->pdr0), &fi, &fd);
|
||||
fi *=
|
||||
decode_pll(readl(&ccm->mpctl),
|
||||
CONFIG_MX35_HCLK_FREQ);
|
||||
return fi / (arm_div * fd);
|
||||
}
|
||||
|
||||
static u32 get_ipg_clk(void)
|
||||
{
|
||||
u32 freq = get_mcu_main_clk();
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 pdr0 = readl(&ccm->pdr0);
|
||||
|
||||
return freq / (get_ahb_div(pdr0) * 2);
|
||||
}
|
||||
|
||||
static u32 get_ipg_per_clk(void)
|
||||
{
|
||||
u32 freq = get_mcu_main_clk();
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 pdr0 = readl(&ccm->pdr0);
|
||||
u32 pdr4 = readl(&ccm->pdr4);
|
||||
u32 div;
|
||||
if (pdr0 & MXC_CCM_PDR0_PER_SEL) {
|
||||
div = (CCM_GET_DIVIDER(pdr4,
|
||||
MXC_CCM_PDR4_PER0_PRDF_MASK,
|
||||
MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1) *
|
||||
(CCM_GET_DIVIDER(pdr4,
|
||||
MXC_CCM_PDR4_PER0_PODF_MASK,
|
||||
MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1);
|
||||
} else {
|
||||
div = CCM_GET_DIVIDER(pdr0,
|
||||
MXC_CCM_PDR0_PER_PODF_MASK,
|
||||
MXC_CCM_PDR0_PER_PODF_OFFSET) + 1;
|
||||
freq /= get_ahb_div(pdr0);
|
||||
}
|
||||
return freq / div;
|
||||
}
|
||||
|
||||
u32 imx_get_uartclk(void)
|
||||
{
|
||||
u32 freq;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 pdr4 = readl(&ccm->pdr4);
|
||||
|
||||
if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U) {
|
||||
freq = get_mcu_main_clk();
|
||||
} else {
|
||||
freq = decode_pll(readl(&ccm->ppctl),
|
||||
CONFIG_MX35_HCLK_FREQ);
|
||||
}
|
||||
freq /= ((CCM_GET_DIVIDER(pdr4,
|
||||
MXC_CCM_PDR4_UART_PRDF_MASK,
|
||||
MXC_CCM_PDR4_UART_PRDF_OFFSET) + 1) *
|
||||
(CCM_GET_DIVIDER(pdr4,
|
||||
MXC_CCM_PDR4_UART_PODF_MASK,
|
||||
MXC_CCM_PDR4_UART_PODF_OFFSET) + 1));
|
||||
return freq;
|
||||
}
|
||||
|
||||
unsigned int mxc_get_main_clock(enum mxc_main_clocks clk)
|
||||
{
|
||||
u32 nfc_pdf, hsp_podf;
|
||||
u32 pll, ret_val = 0, usb_prdf, usb_podf;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
|
||||
u32 reg = readl(&ccm->pdr0);
|
||||
u32 reg4 = readl(&ccm->pdr4);
|
||||
|
||||
reg |= 0x1;
|
||||
|
||||
switch (clk) {
|
||||
case CPU_CLK:
|
||||
ret_val = get_mcu_main_clk();
|
||||
break;
|
||||
case AHB_CLK:
|
||||
ret_val = get_mcu_main_clk();
|
||||
break;
|
||||
case HSP_CLK:
|
||||
if (reg & CLKMODE_CONSUMER) {
|
||||
hsp_podf = (reg >> 20) & 0x3;
|
||||
pll = get_mcu_main_clk();
|
||||
hsp_podf = hsp_div_table[hsp_podf][(reg>>16)&0xF];
|
||||
if (hsp_podf > 0) {
|
||||
ret_val = pll / hsp_podf;
|
||||
} else {
|
||||
puts("mismatch HSP with ARM clock setting\n");
|
||||
ret_val = 0;
|
||||
}
|
||||
} else {
|
||||
ret_val = get_mcu_main_clk();
|
||||
}
|
||||
break;
|
||||
case IPG_CLK:
|
||||
ret_val = get_ipg_clk();;
|
||||
break;
|
||||
case IPG_PER_CLK:
|
||||
ret_val = get_ipg_per_clk();
|
||||
break;
|
||||
case NFC_CLK:
|
||||
nfc_pdf = (reg4 >> 28) & 0xF;
|
||||
pll = get_mcu_main_clk();
|
||||
/* AHB/nfc_pdf */
|
||||
ret_val = pll / (nfc_pdf + 1);
|
||||
break;
|
||||
case USB_CLK:
|
||||
usb_prdf = (reg4 >> 25) & 0x7;
|
||||
usb_podf = (reg4 >> 22) & 0x7;
|
||||
if (reg4 & 0x200) {
|
||||
pll = get_mcu_main_clk();
|
||||
} else {
|
||||
pll = decode_pll(readl(&ccm->ppctl),
|
||||
CONFIG_MX35_HCLK_FREQ);
|
||||
}
|
||||
|
||||
ret_val = pll / ((usb_prdf + 1) * (usb_podf + 1));
|
||||
break;
|
||||
default:
|
||||
printf("Unknown clock: %d\n", clk);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret_val;
|
||||
}
|
||||
unsigned int mxc_get_peri_clock(enum mxc_peri_clocks clk)
|
||||
{
|
||||
u32 ret_val = 0, pdf, pre_pdf, clk_sel;
|
||||
struct ccm_regs *ccm =
|
||||
(struct ccm_regs *)IMX_CCM_BASE;
|
||||
u32 mpdr2 = readl(&ccm->pdr2);
|
||||
u32 mpdr3 = readl(&ccm->pdr3);
|
||||
u32 mpdr4 = readl(&ccm->pdr4);
|
||||
|
||||
switch (clk) {
|
||||
case UART1_BAUD:
|
||||
case UART2_BAUD:
|
||||
case UART3_BAUD:
|
||||
clk_sel = mpdr3 & (1 << 14);
|
||||
pre_pdf = (mpdr4 >> 13) & 0x7;
|
||||
pdf = (mpdr4 >> 10) & 0x7;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case SSI1_BAUD:
|
||||
pre_pdf = (mpdr2 >> 24) & 0x7;
|
||||
pdf = mpdr2 & 0x3F;
|
||||
clk_sel = mpdr2 & (1 << 6);
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case SSI2_BAUD:
|
||||
pre_pdf = (mpdr2 >> 27) & 0x7;
|
||||
pdf = (mpdr2 >> 8) & 0x3F;
|
||||
clk_sel = mpdr2 & (1 << 6);
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case CSI_BAUD:
|
||||
clk_sel = mpdr2 & (1 << 7);
|
||||
pre_pdf = (mpdr2 >> 16) & 0x7;
|
||||
pdf = (mpdr2 >> 19) & 0x7;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case MSHC_CLK:
|
||||
pre_pdf = readl(&ccm->pdr1);
|
||||
clk_sel = (pre_pdf & 0x80);
|
||||
pdf = (pre_pdf >> 22) & 0x3F;
|
||||
pre_pdf = (pre_pdf >> 28) & 0x7;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case ESDHC1_CLK:
|
||||
clk_sel = mpdr3 & 0x40;
|
||||
pre_pdf = mpdr3 & 0x7;
|
||||
pdf = (mpdr3>>3) & 0x7;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case ESDHC2_CLK:
|
||||
clk_sel = mpdr3 & 0x40;
|
||||
pre_pdf = (mpdr3 >> 8) & 0x7;
|
||||
pdf = (mpdr3 >> 11) & 0x7;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case ESDHC3_CLK:
|
||||
clk_sel = mpdr3 & 0x40;
|
||||
pre_pdf = (mpdr3 >> 16) & 0x7;
|
||||
pdf = (mpdr3 >> 19) & 0x7;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
case SPDIF_CLK:
|
||||
clk_sel = mpdr3 & 0x400000;
|
||||
pre_pdf = (mpdr3 >> 29) & 0x7;
|
||||
pdf = (mpdr3 >> 23) & 0x3F;
|
||||
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
|
||||
decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
|
||||
((pre_pdf + 1) * (pdf + 1));
|
||||
break;
|
||||
default:
|
||||
printf("%s(): This clock: %d not supported yet\n",
|
||||
__func__, clk);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
unsigned int mxc_get_clock(enum mxc_clock clk)
|
||||
{
|
||||
switch (clk) {
|
||||
case MXC_ARM_CLK:
|
||||
return get_mcu_main_clk();
|
||||
case MXC_AHB_CLK:
|
||||
break;
|
||||
case MXC_IPG_CLK:
|
||||
return get_ipg_clk();
|
||||
case MXC_IPG_PERCLK:
|
||||
return get_ipg_per_clk();
|
||||
case MXC_UART_CLK:
|
||||
return imx_get_uartclk();
|
||||
case MXC_ESDHC_CLK:
|
||||
return mxc_get_peri_clock(ESDHC1_CLK);
|
||||
case MXC_USB_CLK:
|
||||
return mxc_get_main_clock(USB_CLK);
|
||||
case MXC_FEC_CLK:
|
||||
return get_ipg_clk();
|
||||
case MXC_CSPI_CLK:
|
||||
return get_ipg_clk();
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FEC_MXC
|
||||
/*
|
||||
* The MX35 has no fuse for MAC, return a NULL MAC
|
||||
*/
|
||||
void imx_get_mac_from_fuse(unsigned char *mac)
|
||||
{
|
||||
memset(mac, 0, 6);
|
||||
}
|
||||
|
||||
u32 imx_get_fecclk(void)
|
||||
{
|
||||
return mxc_get_clock(MXC_IPG_CLK);
|
||||
}
|
||||
#endif
|
||||
|
||||
int do_mx35_showclocks(cmd_tbl_t *cmdtp,
|
||||
int flag, int argc, char * const argv[])
|
||||
{
|
||||
u32 cpufreq = get_mcu_main_clk();
|
||||
printf("mx35 cpu clock: %dMHz\n", cpufreq / 1000000);
|
||||
printf("ipg clock : %dHz\n", get_ipg_clk());
|
||||
printf("ipg per clock : %dHz\n", get_ipg_per_clk());
|
||||
printf("uart clock : %dHz\n", mxc_get_clock(MXC_UART_CLK));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx35_showclocks,
|
||||
"display clocks\n",
|
||||
""
|
||||
);
|
||||
|
||||
#if defined(CONFIG_DISPLAY_CPUINFO)
|
||||
int print_cpuinfo(void)
|
||||
{
|
||||
printf("CPU: Freescale i.MX35 at %d MHz\n",
|
||||
get_mcu_main_clk() / 1000000);
|
||||
/* mxc_dump_clocks(); */
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Initializes on-chip ethernet controllers.
|
||||
* to override, implement board_eth_init()
|
||||
*/
|
||||
|
||||
int cpu_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = -ENODEV;
|
||||
|
||||
#if defined(CONFIG_FEC_MXC)
|
||||
rc = fecmxc_initialize(bis);
|
||||
#endif
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
int get_clocks(void)
|
||||
{
|
||||
#ifdef CONFIG_FSL_ESDHC
|
||||
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
void reset_cpu(ulong addr)
|
||||
{
|
||||
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
|
||||
writew(4, &wdog->wcr);
|
||||
}
|
||||
|
|
@ -0,0 +1,116 @@
|
|||
/*
|
||||
* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/mx35_pins.h>
|
||||
#include <asm/arch/iomux.h>
|
||||
|
||||
/*
|
||||
* IOMUX register (base) addresses
|
||||
*/
|
||||
enum iomux_reg_addr {
|
||||
IOMUXGPR = IOMUXC_BASE_ADDR, /* General purpose */
|
||||
IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR + 4, /* MUX control */
|
||||
IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + 0x324, /* last MUX control */
|
||||
IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + 0x328, /* Pad control */
|
||||
IOMUXSW_PAD_END = IOMUXC_BASE_ADDR + 0x794, /* last Pad control */
|
||||
IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + 0x7AC, /* input select */
|
||||
IOMUXSW_INPUT_END = IOMUXC_BASE_ADDR + 0x9F4, /* last input select */
|
||||
};
|
||||
|
||||
#define MUX_PIN_NUM_MAX \
|
||||
(((IOMUXSW_PAD_END - IOMUXSW_PAD_CTL) >> 2) + 1)
|
||||
#define MUX_INPUT_NUM_MUX \
|
||||
(((IOMUXSW_INPUT_END - IOMUXSW_INPUT_CTL) >> 2) + 1)
|
||||
|
||||
#define PIN_TO_IOMUX_INDEX(pin) ((PIN_TO_IOMUX_PAD(pin) - 0x328) >> 2)
|
||||
|
||||
/*
|
||||
* Request ownership for an IO pin. This function has to be the first one
|
||||
* being called before that pin is used.
|
||||
*/
|
||||
void mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
|
||||
{
|
||||
u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
|
||||
|
||||
if (mux_reg != NON_MUX_I) {
|
||||
mux_reg += IOMUXGPR;
|
||||
writel(cfg, mux_reg);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Release ownership for an IO pin
|
||||
*/
|
||||
void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* This function configures the pad value for a IOMUX pin.
|
||||
*
|
||||
* @param pin a pin number as defined in iomux_pin_name_t
|
||||
* @param config the ORed value of elements defined in iomux_pad_config_t
|
||||
*/
|
||||
void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config)
|
||||
{
|
||||
u32 pad_reg = IOMUXGPR + PIN_TO_IOMUX_PAD(pin);
|
||||
|
||||
writel(config, pad_reg);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function enables/disables the general purpose function for a particular
|
||||
* signal.
|
||||
*
|
||||
* @param gp one signal as defined in iomux_gp_func_t
|
||||
* @param en enable/disable
|
||||
*/
|
||||
void mxc_iomux_set_gpr(iomux_gp_func_t gp, int en)
|
||||
{
|
||||
u32 l;
|
||||
|
||||
l = readl(IOMUXGPR);
|
||||
if (en)
|
||||
l |= gp;
|
||||
else
|
||||
l &= ~gp;
|
||||
|
||||
writel(l, IOMUXGPR);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function configures input path.
|
||||
*
|
||||
* @param input index of input select register as defined in
|
||||
* iomux_input_select_t
|
||||
* @param config the binary value of elements defined in
|
||||
* iomux_input_config_t
|
||||
*/
|
||||
void mxc_iomux_set_input(iomux_input_select_t input, u32 config)
|
||||
{
|
||||
u32 reg = IOMUXSW_INPUT_CTL + (input << 2);
|
||||
|
||||
writel(config, reg);
|
||||
}
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Sascha Hauer, Pengutronix
|
||||
*
|
||||
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
/* General purpose timers bitfields */
|
||||
#define GPTCR_SWR (1<<15) /* Software reset */
|
||||
#define GPTCR_FRR (1<<9) /* Freerun / restart */
|
||||
#define GPTCR_CLKSOURCE_32 (0x100<<6) /* Clock source */
|
||||
#define GPTCR_CLKSOURCE_IPG (0x001<<6) /* Clock source */
|
||||
#define GPTCR_TEN (1) /* Timer enable */
|
||||
#define GPTPR_VAL (66)
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
int i;
|
||||
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
|
||||
|
||||
/* setup GP Timer 1 */
|
||||
writel(GPTCR_SWR, &gpt->ctrl);
|
||||
for (i = 0; i < 100; i++)
|
||||
writel(0, &gpt->ctrl); /* We have no udelay by now */
|
||||
|
||||
writel(GPTPR_VAL, &gpt->pre);
|
||||
/* Freerun Mode, PERCLK1 input */
|
||||
writel(readl(&gpt->ctrl) |
|
||||
GPTCR_CLKSOURCE_IPG | GPTCR_TEN,
|
||||
&gpt->ctrl);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void reset_timer_masked(void)
|
||||
{
|
||||
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
|
||||
|
||||
writel(0, &gpt->ctrl);
|
||||
/* Freerun Mode, PERCLK1 input */
|
||||
writel(GPTCR_CLKSOURCE_IPG | GPTCR_TEN,
|
||||
&gpt->ctrl);
|
||||
}
|
||||
|
||||
inline ulong get_timer_masked(void)
|
||||
{
|
||||
|
||||
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
|
||||
ulong val = readl(&gpt->counter);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
reset_timer_masked();
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
ulong tmp;
|
||||
|
||||
tmp = get_timer_masked();
|
||||
|
||||
if (tmp <= (base * 1000)) {
|
||||
/* Overflow */
|
||||
tmp += (0xffffffff - base);
|
||||
}
|
||||
|
||||
return (tmp / 1000) - base;
|
||||
}
|
||||
|
||||
void set_timer(ulong t)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* delay x useconds AND preserve advance timstamp value
|
||||
* GPTCNT is now supposed to tick 1 by 1 us.
|
||||
*/
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
ulong tmp;
|
||||
|
||||
tmp = get_timer_masked(); /* get current timestamp */
|
||||
|
||||
/* if setting this forward will roll time stamp */
|
||||
if ((usec + tmp + 1) < tmp) {
|
||||
/* reset "advancing" timestamp to 0, set lastinc value */
|
||||
reset_timer_masked();
|
||||
} else {
|
||||
/* else, set advancing stamp wake up time */
|
||||
tmp += usec;
|
||||
}
|
||||
|
||||
while (get_timer_masked() < tmp) /* loop till event */
|
||||
/*NOP*/;
|
||||
}
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS = reset.o
|
||||
|
||||
COBJS = timer.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* armboot - Startup Code for OMP2420/ARM1136 CPU-core
|
||||
*
|
||||
* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
|
||||
*
|
||||
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
|
||||
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
|
||||
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <asm/arch/omap2420.h>
|
||||
|
||||
.globl reset_cpu
|
||||
reset_cpu:
|
||||
ldr r1, rstctl /* get addr for global reset reg */
|
||||
mov r3, #0x2 /* full reset pll+mpu */
|
||||
str r3, [r1] /* force reset */
|
||||
mov r0, r0
|
||||
_loop_forever:
|
||||
b _loop_forever
|
||||
rstctl:
|
||||
.word PM_RSTCTRL_WKUP
|
||||
|
|
@ -0,0 +1,157 @@
|
|||
/*
|
||||
* (C) Copyright 2004
|
||||
* Texas Instruments
|
||||
* Richard Woodruff <r-woodruff2@ti.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/bits.h>
|
||||
#include <asm/arch/omap2420.h>
|
||||
|
||||
#define TIMER_LOAD_VAL 0
|
||||
|
||||
/* macro to read the 32 bit timer */
|
||||
#define READ_TIMER (*((volatile ulong *)(CONFIG_SYS_TIMERBASE+TCRR)))
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int timer_init (void)
|
||||
{
|
||||
int32_t val;
|
||||
|
||||
/* Start the counter ticking up */
|
||||
*((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/
|
||||
val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/
|
||||
*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */
|
||||
|
||||
reset_timer_masked(); /* init the timestamp and lastinc value */
|
||||
|
||||
return(0);
|
||||
}
|
||||
/*
|
||||
* timer without interrupts
|
||||
*/
|
||||
void reset_timer (void)
|
||||
{
|
||||
reset_timer_masked ();
|
||||
}
|
||||
|
||||
ulong get_timer (ulong base)
|
||||
{
|
||||
return get_timer_masked () - base;
|
||||
}
|
||||
|
||||
void set_timer (ulong t)
|
||||
{
|
||||
gd->tbl = t;
|
||||
}
|
||||
|
||||
/* delay x useconds AND preserve advance timestamp value */
|
||||
void __udelay (unsigned long usec)
|
||||
{
|
||||
ulong tmo, tmp;
|
||||
|
||||
if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
|
||||
tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
|
||||
tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
|
||||
tmo /= 1000; /* finish normalize. */
|
||||
} else { /* else small number, don't kill it prior to HZ multiply */
|
||||
tmo = usec * CONFIG_SYS_HZ;
|
||||
tmo /= (1000*1000);
|
||||
}
|
||||
|
||||
tmp = get_timer (0); /* get current timestamp */
|
||||
if ( (tmo + tmp + 1) < tmp ) /* if setting this forward will roll time stamp */
|
||||
reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */
|
||||
else
|
||||
tmo += tmp; /* else, set advancing stamp wake up time */
|
||||
while (get_timer_masked () < tmo)/* loop till event */
|
||||
/*NOP*/;
|
||||
}
|
||||
|
||||
void reset_timer_masked (void)
|
||||
{
|
||||
/* reset time */
|
||||
gd->lastinc = READ_TIMER; /* capture current incrementer value time */
|
||||
gd->tbl = 0; /* start "advancing" time stamp from 0 */
|
||||
}
|
||||
|
||||
ulong get_timer_masked (void)
|
||||
{
|
||||
ulong now = READ_TIMER; /* current tick value */
|
||||
|
||||
if (now >= gd->lastinc) /* normal mode (non roll) */
|
||||
gd->tbl += (now - gd->lastinc); /* move stamp fordward with absoulte diff ticks */
|
||||
else /* we have rollover of incrementer */
|
||||
gd->tbl += (0xFFFFFFFF - gd->lastinc) + now;
|
||||
gd->lastinc = now;
|
||||
return gd->tbl;
|
||||
}
|
||||
|
||||
/* waits specified delay value and resets timestamp */
|
||||
void udelay_masked (unsigned long usec)
|
||||
{
|
||||
ulong tmo;
|
||||
ulong endtime;
|
||||
signed long diff;
|
||||
|
||||
if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
|
||||
tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
|
||||
tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
|
||||
tmo /= 1000; /* finish normalize. */
|
||||
} else { /* else small number, don't kill it prior to HZ multiply */
|
||||
tmo = usec * CONFIG_SYS_HZ;
|
||||
tmo /= (1000*1000);
|
||||
}
|
||||
endtime = get_timer_masked () + tmo;
|
||||
|
||||
do {
|
||||
ulong now = get_timer_masked ();
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (read timebase as long long).
|
||||
* On ARM it just returns the timer value.
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk (void)
|
||||
{
|
||||
ulong tbclk;
|
||||
tbclk = CONFIG_SYS_HZ;
|
||||
return tbclk;
|
||||
}
|
||||
|
|
@ -0,0 +1,522 @@
|
|||
/*
|
||||
* armboot - Startup Code for OMP2420/ARM1136 CPU-core
|
||||
*
|
||||
* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
|
||||
*
|
||||
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
|
||||
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
|
||||
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <asm-offsets.h>
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
.globl _start
|
||||
_start: b reset
|
||||
#ifdef CONFIG_PRELOADER
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
ldr pc, _hang
|
||||
|
||||
_hang:
|
||||
.word do_hang
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678
|
||||
.word 0x12345678 /* now 16*4=64 */
|
||||
#else
|
||||
ldr pc, _undefined_instruction
|
||||
ldr pc, _software_interrupt
|
||||
ldr pc, _prefetch_abort
|
||||
ldr pc, _data_abort
|
||||
ldr pc, _not_used
|
||||
ldr pc, _irq
|
||||
ldr pc, _fiq
|
||||
|
||||
_undefined_instruction: .word undefined_instruction
|
||||
_software_interrupt: .word software_interrupt
|
||||
_prefetch_abort: .word prefetch_abort
|
||||
_data_abort: .word data_abort
|
||||
_not_used: .word not_used
|
||||
_irq: .word irq
|
||||
_fiq: .word fiq
|
||||
_pad: .word 0x12345678 /* now 16*4=64 */
|
||||
#endif /* CONFIG_PRELOADER */
|
||||
.global _end_vect
|
||||
_end_vect:
|
||||
|
||||
.balignl 16,0xdeadbeef
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Startup Code (reset vector)
|
||||
*
|
||||
* do important init only if we don't start from memory!
|
||||
* setup Memory and board specific bits prior to relocation.
|
||||
* relocate armboot to ram
|
||||
* setup stack
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _TEXT_BASE
|
||||
_TEXT_BASE:
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
|
||||
/*
|
||||
* These are defined in the board-specific linker script.
|
||||
* Subtracting _start from them lets the linker put their
|
||||
* relative position in the executable instead of leaving
|
||||
* them null.
|
||||
*/
|
||||
.globl _bss_start_ofs
|
||||
_bss_start_ofs:
|
||||
.word __bss_start - _start
|
||||
|
||||
.globl _bss_end_ofs
|
||||
_bss_end_ofs:
|
||||
.word __bss_end__ - _start
|
||||
|
||||
.globl _end_ofs
|
||||
_end_ofs:
|
||||
.word _end - _start
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl IRQ_STACK_START
|
||||
IRQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl FIQ_STACK_START
|
||||
FIQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
#endif
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) + 8 bytes */
|
||||
.globl IRQ_STACK_START_IN
|
||||
IRQ_STACK_START_IN:
|
||||
.word 0x0badc0de
|
||||
|
||||
/*
|
||||
* the actual reset code
|
||||
*/
|
||||
|
||||
reset:
|
||||
/*
|
||||
* set the cpu to SVC32 mode
|
||||
*/
|
||||
mrs r0,cpsr
|
||||
bic r0,r0,#0x1f
|
||||
orr r0,r0,#0xd3
|
||||
msr cpsr,r0
|
||||
|
||||
#ifdef CONFIG_OMAP2420H4
|
||||
/* Copy vectors to mask ROM indirect addr */
|
||||
adr r0, _start /* r0 <- current position of code */
|
||||
add r0, r0, #4 /* skip reset vector */
|
||||
mov r2, #64 /* r2 <- size to copy */
|
||||
add r2, r0, r2 /* r2 <- source end address */
|
||||
mov r1, #SRAM_OFFSET0 /* build vect addr */
|
||||
mov r3, #SRAM_OFFSET1
|
||||
add r1, r1, r3
|
||||
mov r3, #SRAM_OFFSET2
|
||||
add r1, r1, r3
|
||||
next:
|
||||
ldmia r0!, {r3-r10} /* copy from source address [r0] */
|
||||
stmia r1!, {r3-r10} /* copy to target address [r1] */
|
||||
cmp r0, r2 /* until source end address [r2] */
|
||||
bne next /* loop until equal */
|
||||
bl cpy_clk_code /* put dpll adjust code behind vectors */
|
||||
#endif
|
||||
/* the mask ROM code should have PLL and others stable */
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
bl cpu_init_crit
|
||||
#endif
|
||||
|
||||
/* Set stackpointer in internal RAM to call board_init_f */
|
||||
call_board_init_f:
|
||||
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
|
||||
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
|
||||
ldr r0,=0x00000000
|
||||
|
||||
bl board_init_f
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* void relocate_code (addr_sp, gd, addr_moni)
|
||||
*
|
||||
* This "function" does not return, instead it continues in RAM
|
||||
* after relocating the monitor code.
|
||||
*
|
||||
*/
|
||||
.globl relocate_code
|
||||
relocate_code:
|
||||
mov r4, r0 /* save addr_sp */
|
||||
mov r5, r1 /* save addr of gd */
|
||||
mov r6, r2 /* save addr of destination */
|
||||
|
||||
/* Set up the stack */
|
||||
stack_setup:
|
||||
mov sp, r4
|
||||
|
||||
adr r0, _start
|
||||
cmp r0, r6
|
||||
beq clear_bss /* skip relocation */
|
||||
mov r1, r6 /* r1 <- scratch for copy_loop */
|
||||
ldr r3, _bss_start_ofs
|
||||
add r2, r0, r3 /* r2 <- source end address */
|
||||
|
||||
copy_loop:
|
||||
ldmia r0!, {r9-r10} /* copy from source address [r0] */
|
||||
stmia r1!, {r9-r10} /* copy to target address [r1] */
|
||||
cmp r0, r2 /* until source end address [r2] */
|
||||
blo copy_loop
|
||||
|
||||
#ifndef CONFIG_PRELOADER
|
||||
/*
|
||||
* fix .rel.dyn relocations
|
||||
*/
|
||||
ldr r0, _TEXT_BASE /* r0 <- Text base */
|
||||
sub r9, r6, r0 /* r9 <- relocation offset */
|
||||
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
|
||||
add r10, r10, r0 /* r10 <- sym table in FLASH */
|
||||
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
|
||||
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
|
||||
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
|
||||
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
|
||||
fixloop:
|
||||
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
|
||||
add r0, r0, r9 /* r0 <- location to fix up in RAM */
|
||||
ldr r1, [r2, #4]
|
||||
and r7, r1, #0xff
|
||||
cmp r7, #23 /* relative fixup? */
|
||||
beq fixrel
|
||||
cmp r7, #2 /* absolute fixup? */
|
||||
beq fixabs
|
||||
/* ignore unknown type of fixup */
|
||||
b fixnext
|
||||
fixabs:
|
||||
/* absolute fix: set location to (offset) symbol value */
|
||||
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
|
||||
add r1, r10, r1 /* r1 <- address of symbol in table */
|
||||
ldr r1, [r1, #4] /* r1 <- symbol value */
|
||||
add r1, r1, r9 /* r1 <- relocated sym addr */
|
||||
b fixnext
|
||||
fixrel:
|
||||
/* relative fix: increase location by offset */
|
||||
ldr r1, [r0]
|
||||
add r1, r1, r9
|
||||
fixnext:
|
||||
str r1, [r0]
|
||||
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
|
||||
cmp r2, r3
|
||||
blo fixloop
|
||||
#endif
|
||||
|
||||
clear_bss:
|
||||
#ifndef CONFIG_PRELOADER
|
||||
ldr r0, _bss_start_ofs
|
||||
ldr r1, _bss_end_ofs
|
||||
mov r4, r6 /* reloc addr */
|
||||
add r0, r0, r4
|
||||
add r1, r1, r4
|
||||
mov r2, #0x00000000 /* clear */
|
||||
|
||||
clbss_l:str r2, [r0] /* clear loop... */
|
||||
add r0, r0, #4
|
||||
cmp r0, r1
|
||||
bne clbss_l
|
||||
#endif /* #ifndef CONFIG_PRELOADER */
|
||||
|
||||
/*
|
||||
* We are done. Do not return, instead branch to second part of board
|
||||
* initialization, now running from RAM.
|
||||
*/
|
||||
#ifdef CONFIG_NAND_SPL
|
||||
ldr r0, _nand_boot_ofs
|
||||
mov pc, r0
|
||||
|
||||
_nand_boot_ofs:
|
||||
.word nand_boot
|
||||
#else
|
||||
jump_2_ram:
|
||||
ldr r0, _board_init_r_ofs
|
||||
ldr r1, _TEXT_BASE
|
||||
add lr, r0, r1
|
||||
add lr, lr, r9
|
||||
/* setup parameters for board_init_r */
|
||||
mov r0, r5 /* gd_t */
|
||||
mov r1, r6 /* dest_addr */
|
||||
/* jump to it ... */
|
||||
mov pc, lr
|
||||
|
||||
_board_init_r_ofs:
|
||||
.word board_init_r - _start
|
||||
#endif
|
||||
|
||||
_rel_dyn_start_ofs:
|
||||
.word __rel_dyn_start - _start
|
||||
_rel_dyn_end_ofs:
|
||||
.word __rel_dyn_end - _start
|
||||
_dynsym_start_ofs:
|
||||
.word __dynsym_start - _start
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* CPU_init_critical registers
|
||||
*
|
||||
* setup important registers
|
||||
* setup memory timing
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
cpu_init_crit:
|
||||
/*
|
||||
* flush v4 I/D caches
|
||||
*/
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
|
||||
mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
|
||||
|
||||
/*
|
||||
* disable MMU stuff and caches
|
||||
*/
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
|
||||
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
|
||||
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
|
||||
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
/*
|
||||
* Jump to board specific initialization... The Mask ROM will have already initialized
|
||||
* basic memory. Go here to bump up clock rate and handle wake up conditions.
|
||||
*/
|
||||
mov ip, lr /* persevere link reg across call */
|
||||
bl lowlevel_init /* go setup pll,mux,memory */
|
||||
mov lr, ip /* restore link */
|
||||
mov pc, lr /* back to my caller */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
#ifndef CONFIG_PRELOADER
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Interrupt handling
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
@
|
||||
@ IRQ stack frame.
|
||||
@
|
||||
#define S_FRAME_SIZE 72
|
||||
|
||||
#define S_OLD_R0 68
|
||||
#define S_PSR 64
|
||||
#define S_PC 60
|
||||
#define S_LR 56
|
||||
#define S_SP 52
|
||||
|
||||
#define S_IP 48
|
||||
#define S_FP 44
|
||||
#define S_R10 40
|
||||
#define S_R9 36
|
||||
#define S_R8 32
|
||||
#define S_R7 28
|
||||
#define S_R6 24
|
||||
#define S_R5 20
|
||||
#define S_R4 16
|
||||
#define S_R3 12
|
||||
#define S_R2 8
|
||||
#define S_R1 4
|
||||
#define S_R0 0
|
||||
|
||||
#define MODE_SVC 0x13
|
||||
#define I_BIT 0x80
|
||||
|
||||
/*
|
||||
* use bad_save_user_regs for abort/prefetch/undef/swi ...
|
||||
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
|
||||
*/
|
||||
|
||||
.macro bad_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
|
||||
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
|
||||
|
||||
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
|
||||
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
|
||||
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
|
||||
|
||||
add r5, sp, #S_SP
|
||||
mov r1, lr
|
||||
stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
|
||||
mov r0, sp @ save current stack into r0 (param register)
|
||||
.endm
|
||||
|
||||
.macro irq_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||
add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
|
||||
stmdb r8, {sp, lr}^ @ Calling SP, LR
|
||||
str lr, [r8, #0] @ Save calling PC
|
||||
mrs r6, spsr
|
||||
str r6, [r8, #4] @ Save CPSR
|
||||
str r0, [r8, #8] @ Save OLD_R0
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro irq_restore_user_regs
|
||||
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
|
||||
mov r0, r0
|
||||
ldr lr, [sp, #S_PC] @ Get PC
|
||||
add sp, sp, #S_FRAME_SIZE
|
||||
subs pc, lr, #4 @ return & move spsr_svc into cpsr
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
|
||||
|
||||
str lr, [r13] @ save caller lr in position 0 of saved stack
|
||||
mrs lr, spsr @ get the spsr
|
||||
str lr, [r13, #4] @ save spsr in position 1 of saved stack
|
||||
|
||||
mov r13, #MODE_SVC @ prepare SVC-Mode
|
||||
@ msr spsr_c, r13
|
||||
msr spsr, r13 @ switch modes, make sure moves will execute
|
||||
mov lr, pc @ capture return pc
|
||||
movs pc, lr @ jump to next instruction & switch modes.
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack_swi
|
||||
sub r13, r13, #4 @ space on current stack for scratch reg.
|
||||
str r0, [r13] @ save R0's value.
|
||||
ldr r0, IRQ_STACK_START_IN @ get data regions start
|
||||
str lr, [r0] @ save caller lr in position 0 of saved stack
|
||||
mrs r0, spsr @ get the spsr
|
||||
str lr, [r0, #4] @ save spsr in position 1 of saved stack
|
||||
ldr r0, [r13] @ restore r0
|
||||
add r13, r13, #4 @ pop stack entry
|
||||
.endm
|
||||
|
||||
.macro get_irq_stack @ setup IRQ stack
|
||||
ldr sp, IRQ_STACK_START
|
||||
.endm
|
||||
|
||||
.macro get_fiq_stack @ setup FIQ stack
|
||||
ldr sp, FIQ_STACK_START
|
||||
.endm
|
||||
#endif /* CONFIG_PRELOADER */
|
||||
|
||||
/*
|
||||
* exception handlers
|
||||
*/
|
||||
#ifdef CONFIG_PRELOADER
|
||||
.align 5
|
||||
do_hang:
|
||||
ldr sp, _TEXT_BASE /* use 32 words about stack */
|
||||
bl hang /* hang and never return */
|
||||
#else /* !CONFIG_PRELOADER */
|
||||
.align 5
|
||||
undefined_instruction:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_undefined_instruction
|
||||
|
||||
.align 5
|
||||
software_interrupt:
|
||||
get_bad_stack_swi
|
||||
bad_save_user_regs
|
||||
bl do_software_interrupt
|
||||
|
||||
.align 5
|
||||
prefetch_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_prefetch_abort
|
||||
|
||||
.align 5
|
||||
data_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_data_abort
|
||||
|
||||
.align 5
|
||||
not_used:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_not_used
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_irq_stack
|
||||
irq_save_user_regs
|
||||
bl do_irq
|
||||
irq_restore_user_regs
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_fiq_stack
|
||||
/* someone ought to write a more effiction fiq_save_user_regs */
|
||||
irq_save_user_regs
|
||||
bl do_fiq
|
||||
irq_restore_user_regs
|
||||
|
||||
#else
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_irq
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_fiq
|
||||
|
||||
#endif
|
||||
.align 5
|
||||
.global arm1136_cache_flush
|
||||
arm1136_cache_flush:
|
||||
#if !defined(CONFIG_SYS_NO_ICACHE)
|
||||
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
|
||||
#endif
|
||||
#if !defined(CONFIG_SYS_NO_DCACHE)
|
||||
mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
|
||||
#endif
|
||||
mov pc, lr @ back to caller
|
||||
#endif /* CONFIG_PRELOADER */
|
||||
|
|
@ -0,0 +1,89 @@
|
|||
/*
|
||||
* (C) Copyright 2009
|
||||
* Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
|
||||
*
|
||||
* Copyright (C) 2005-2007 Samsung Electronics
|
||||
* Kyungin Park <kyugnmin.park@samsung.com>
|
||||
*
|
||||
* Copyright (c) 2004 Texas Instruments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
arch/arm/cpu/arm1136/start.o (.text)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
*(.data)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.rel.dyn : {
|
||||
__rel_dyn_start = .;
|
||||
*(.rel*)
|
||||
__rel_dyn_end = .;
|
||||
}
|
||||
|
||||
.dynsym : {
|
||||
__dynsym_start = .;
|
||||
*(.dynsym)
|
||||
}
|
||||
|
||||
_end = .;
|
||||
|
||||
.bss __rel_dyn_start (OVERLAY) : {
|
||||
__bss_start = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
}
|
||||
|
||||
/DISCARD/ : { *(.dynstr*) }
|
||||
/DISCARD/ : { *(.dynamic*) }
|
||||
/DISCARD/ : { *(.plt*) }
|
||||
/DISCARD/ : { *(.interp*) }
|
||||
/DISCARD/ : { *(.gnu*) }
|
||||
}
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
COBJS = cpu.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
|
||||
|
||||
# Make ARMv5 to allow more compilers to work, even though its v6.
|
||||
PLATFORM_CPPFLAGS += -march=armv5t
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
/*
|
||||
* (C) Copyright 2004 Texas Insturments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* CPU specific code
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
static void cache_flush (void);
|
||||
|
||||
int cleanup_before_linux (void)
|
||||
{
|
||||
/*
|
||||
* this function is called just before we call linux
|
||||
* it prepares the processor for linux
|
||||
*
|
||||
* we turn off caches etc ...
|
||||
*/
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
/* turn off I/D-cache */
|
||||
icache_disable();
|
||||
dcache_disable();
|
||||
/* flush I/D-cache */
|
||||
cache_flush();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* flush I/D-cache */
|
||||
static void cache_flush (void)
|
||||
{
|
||||
/* invalidate both caches and flush btb */
|
||||
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
|
||||
/* mem barrier to sync things */
|
||||
asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
|
||||
}
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
#
|
||||
# (C) Copyright 2000-2003
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS = reset.o
|
||||
|
||||
COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o
|
||||
COBJS-y += timer.o
|
||||
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
|
||||
|
||||
# Make ARMv5 to allow more compilers to work, even though its v6.
|
||||
PLATFORM_CPPFLAGS += -march=armv5t
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
/*
|
||||
* Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400
|
||||
*
|
||||
* Copyright (C) 2008
|
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <asm/arch/s3c6400.h>
|
||||
|
||||
.globl mem_ctrl_asm_init
|
||||
mem_ctrl_asm_init:
|
||||
/* DMC1 base address 0x7e001000 */
|
||||
ldr r0, =ELFIN_DMC1_BASE
|
||||
|
||||
ldr r1, =0x4
|
||||
str r1, [r0, #INDEX_DMC_MEMC_CMD]
|
||||
|
||||
ldr r1, =DMC_DDR_REFRESH_PRD
|
||||
str r1, [r0, #INDEX_DMC_REFRESH_PRD]
|
||||
|
||||
ldr r1, =DMC_DDR_CAS_LATENCY
|
||||
str r1, [r0, #INDEX_DMC_CAS_LATENCY]
|
||||
|
||||
ldr r1, =DMC_DDR_t_DQSS
|
||||
str r1, [r0, #INDEX_DMC_T_DQSS]
|
||||
|
||||
ldr r1, =DMC_DDR_t_MRD
|
||||
str r1, [r0, #INDEX_DMC_T_MRD]
|
||||
|
||||
ldr r1, =DMC_DDR_t_RAS
|
||||
str r1, [r0, #INDEX_DMC_T_RAS]
|
||||
|
||||
ldr r1, =DMC_DDR_t_RC
|
||||
str r1, [r0, #INDEX_DMC_T_RC]
|
||||
|
||||
ldr r1, =DMC_DDR_t_RCD
|
||||
ldr r2, =DMC_DDR_schedule_RCD
|
||||
orr r1, r1, r2
|
||||
str r1, [r0, #INDEX_DMC_T_RCD]
|
||||
|
||||
ldr r1, =DMC_DDR_t_RFC
|
||||
ldr r2, =DMC_DDR_schedule_RFC
|
||||
orr r1, r1, r2
|
||||
str r1, [r0, #INDEX_DMC_T_RFC]
|
||||
|
||||
ldr r1, =DMC_DDR_t_RP
|
||||
ldr r2, =DMC_DDR_schedule_RP
|
||||
orr r1, r1, r2
|
||||
str r1, [r0, #INDEX_DMC_T_RP]
|
||||
|
||||
ldr r1, =DMC_DDR_t_RRD
|
||||
str r1, [r0, #INDEX_DMC_T_RRD]
|
||||
|
||||
ldr r1, =DMC_DDR_t_WR
|
||||
str r1, [r0, #INDEX_DMC_T_WR]
|
||||
|
||||
ldr r1, =DMC_DDR_t_WTR
|
||||
str r1, [r0, #INDEX_DMC_T_WTR]
|
||||
|
||||
ldr r1, =DMC_DDR_t_XP
|
||||
str r1, [r0, #INDEX_DMC_T_XP]
|
||||
|
||||
ldr r1, =DMC_DDR_t_XSR
|
||||
str r1, [r0, #INDEX_DMC_T_XSR]
|
||||
|
||||
ldr r1, =DMC_DDR_t_ESR
|
||||
str r1, [r0, #INDEX_DMC_T_ESR]
|
||||
|
||||
ldr r1, =DMC1_MEM_CFG
|
||||
str r1, [r0, #INDEX_DMC_MEMORY_CFG]
|
||||
|
||||
ldr r1, =DMC1_MEM_CFG2
|
||||
str r1, [r0, #INDEX_DMC_MEMORY_CFG2]
|
||||
|
||||
ldr r1, =DMC1_CHIP0_CFG
|
||||
str r1, [r0, #INDEX_DMC_CHIP_0_CFG]
|
||||
|
||||
ldr r1, =DMC_DDR_32_CFG
|
||||
str r1, [r0, #INDEX_DMC_USER_CONFIG]
|
||||
|
||||
/* DMC0 DDR Chip 0 configuration direct command reg */
|
||||
ldr r1, =DMC_NOP0
|
||||
str r1, [r0, #INDEX_DMC_DIRECT_CMD]
|
||||
|
||||
/* Precharge All */
|
||||
ldr r1, =DMC_PA0
|
||||
str r1, [r0, #INDEX_DMC_DIRECT_CMD]
|
||||
|
||||
/* Auto Refresh 2 time */
|
||||
ldr r1, =DMC_AR0
|
||||
str r1, [r0, #INDEX_DMC_DIRECT_CMD]
|
||||
str r1, [r0, #INDEX_DMC_DIRECT_CMD]
|
||||
|
||||
/* MRS */
|
||||
ldr r1, =DMC_mDDR_EMR0
|
||||
str r1, [r0, #INDEX_DMC_DIRECT_CMD]
|
||||
|
||||
/* Mode Reg */
|
||||
ldr r1, =DMC_mDDR_MR0
|
||||
str r1, [r0, #INDEX_DMC_DIRECT_CMD]
|
||||
|
||||
/* Enable DMC1 */
|
||||
mov r1, #0x0
|
||||
str r1, [r0, #INDEX_DMC_MEMC_CMD]
|
||||
|
||||
check_dmc1_ready:
|
||||
ldr r1, [r0, #INDEX_DMC_MEMC_STATUS]
|
||||
mov r2, #0x3
|
||||
and r1, r1, r2
|
||||
cmp r1, #0x1
|
||||
bne check_dmc1_ready
|
||||
nop
|
||||
|
||||
mov pc, lr
|
||||
|
||||
.ltorg
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
/*
|
||||
* Copyright (c) 2009 Samsung Electronics.
|
||||
* Minkyu Kang <mk7.kang@samsung.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <asm/arch/s3c6400.h>
|
||||
|
||||
.globl reset_cpu
|
||||
reset_cpu:
|
||||
ldr r1, =ELFIN_CLOCK_POWER_BASE
|
||||
ldr r2, [r1, #SYS_ID_OFFSET]
|
||||
ldr r3, =0xffff
|
||||
and r2, r3, r2, lsr #12
|
||||
str r2, [r1, #SW_RST_OFFSET]
|
||||
_loop_forever:
|
||||
b _loop_forever
|
||||
|
|
@ -0,0 +1,145 @@
|
|||
/*
|
||||
* (C) Copyright 2001-2004
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* David Mueller, ELSOFT AG, d.mueller@elsoft.ch
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* This code should work for both the S3C2400 and the S3C2410
|
||||
* as they seem to have the same PLL and clock machinery inside.
|
||||
* The different address mapping is handled by the s3c24xx.h files below.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/s3c6400.h>
|
||||
|
||||
#define APLL 0
|
||||
#define MPLL 1
|
||||
#define EPLL 2
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
/*
|
||||
* NOTE: This describes the proper use of this file.
|
||||
*
|
||||
* CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
|
||||
*
|
||||
* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
|
||||
* the specified bus in HZ.
|
||||
*/
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
static ulong get_PLLCLK(int pllreg)
|
||||
{
|
||||
ulong r, m, p, s;
|
||||
|
||||
switch (pllreg) {
|
||||
case APLL:
|
||||
r = APLL_CON_REG;
|
||||
break;
|
||||
case MPLL:
|
||||
r = MPLL_CON_REG;
|
||||
break;
|
||||
case EPLL:
|
||||
r = EPLL_CON0_REG;
|
||||
break;
|
||||
default:
|
||||
hang();
|
||||
}
|
||||
|
||||
m = (r >> 16) & 0x3ff;
|
||||
p = (r >> 8) & 0x3f;
|
||||
s = r & 0x7;
|
||||
|
||||
return m * (CONFIG_SYS_CLK_FREQ / (p * (1 << s)));
|
||||
}
|
||||
|
||||
/* return ARMCORE frequency */
|
||||
ulong get_ARMCLK(void)
|
||||
{
|
||||
ulong div;
|
||||
|
||||
div = CLK_DIV0_REG;
|
||||
|
||||
return get_PLLCLK(APLL) / ((div & 0x7) + 1);
|
||||
}
|
||||
|
||||
/* return FCLK frequency */
|
||||
ulong get_FCLK(void)
|
||||
{
|
||||
return get_PLLCLK(APLL);
|
||||
}
|
||||
|
||||
/* return HCLK frequency */
|
||||
ulong get_HCLK(void)
|
||||
{
|
||||
ulong fclk;
|
||||
|
||||
uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
|
||||
uint hclk_div = ((CLK_DIV0_REG >> 8) & 0x1) + 1;
|
||||
|
||||
/*
|
||||
* Bit 7 exists on s3c6410, and not on s3c6400, it is reserved on
|
||||
* s3c6400 and is always 0, and it is indeed running in ASYNC mode
|
||||
*/
|
||||
if (OTHERS_REG & 0x80)
|
||||
fclk = get_FCLK(); /* SYNC Mode */
|
||||
else
|
||||
fclk = get_PLLCLK(MPLL); /* ASYNC Mode */
|
||||
|
||||
return fclk / (hclk_div * hclkx2_div);
|
||||
}
|
||||
|
||||
/* return PCLK frequency */
|
||||
ulong get_PCLK(void)
|
||||
{
|
||||
ulong fclk;
|
||||
uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
|
||||
uint pre_div = ((CLK_DIV0_REG >> 12) & 0xf) + 1;
|
||||
|
||||
if (OTHERS_REG & 0x80)
|
||||
fclk = get_FCLK(); /* SYNC Mode */
|
||||
else
|
||||
fclk = get_PLLCLK(MPLL); /* ASYNC Mode */
|
||||
|
||||
return fclk / (hclkx2_div * pre_div);
|
||||
}
|
||||
|
||||
/* return UCLK frequency */
|
||||
ulong get_UCLK(void)
|
||||
{
|
||||
return get_PLLCLK(EPLL);
|
||||
}
|
||||
|
||||
int print_cpuinfo(void)
|
||||
{
|
||||
printf("\nCPU: S3C6400@%luMHz\n", get_ARMCLK() / 1000000);
|
||||
printf(" Fclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz ",
|
||||
get_FCLK() / 1000000, get_HCLK() / 1000000,
|
||||
get_PCLK() / 1000000);
|
||||
|
||||
if (OTHERS_REG & 0x80)
|
||||
printf("(SYNC Mode) \n");
|
||||
else
|
||||
printf("(ASYNC Mode) \n");
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,177 @@
|
|||
/*
|
||||
* (C) Copyright 2003
|
||||
* Texas Instruments <www.ti.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002-2004
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* (C) Copyright 2004
|
||||
* Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
|
||||
*
|
||||
* (C) Copyright 2008
|
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/proc-armv/ptrace.h>
|
||||
#include <asm/arch/s3c6400.h>
|
||||
#include <div64.h>
|
||||
|
||||
static ulong timer_load_val;
|
||||
|
||||
#define PRESCALER 167
|
||||
|
||||
static s3c64xx_timers *s3c64xx_get_base_timers(void)
|
||||
{
|
||||
return (s3c64xx_timers *)ELFIN_TIMER_BASE;
|
||||
}
|
||||
|
||||
/* macro to read the 16 bit timer */
|
||||
static inline ulong read_timer(void)
|
||||
{
|
||||
s3c64xx_timers *const timers = s3c64xx_get_base_timers();
|
||||
|
||||
return timers->TCNTO4;
|
||||
}
|
||||
|
||||
/* Internal tick units */
|
||||
/* Last decremneter snapshot */
|
||||
static unsigned long lastdec;
|
||||
/* Monotonic incrementing timer */
|
||||
static unsigned long long timestamp;
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
s3c64xx_timers *const timers = s3c64xx_get_base_timers();
|
||||
|
||||
/* use PWM Timer 4 because it has no output */
|
||||
/*
|
||||
* We use the following scheme for the timer:
|
||||
* Prescaler is hard fixed at 167, divider at 1/4.
|
||||
* This gives at PCLK frequency 66MHz approx. 10us ticks
|
||||
* The timer is set to wrap after 100s, at 66MHz this obviously
|
||||
* happens after 10,000,000 ticks. A long variable can thus
|
||||
* keep values up to 40,000s, i.e., 11 hours. This should be
|
||||
* enough for most uses:-) Possible optimizations: select a
|
||||
* binary-friendly frequency, e.g., 1ms / 128. Also calculate
|
||||
* the prescaler automatically for other PCLK frequencies.
|
||||
*/
|
||||
timers->TCFG0 = PRESCALER << 8;
|
||||
if (timer_load_val == 0) {
|
||||
timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
|
||||
timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
|
||||
}
|
||||
|
||||
/* load value for 10 ms timeout */
|
||||
lastdec = timers->TCNTB4 = timer_load_val;
|
||||
/* auto load, manual update of Timer 4 */
|
||||
timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
|
||||
TCON_4_UPDATE;
|
||||
|
||||
/* auto load, start Timer 4 */
|
||||
timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
|
||||
timestamp = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* timer without interrupts
|
||||
*/
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (read timebase as long long).
|
||||
* On ARM it just returns the timer value.
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
ulong now = read_timer();
|
||||
|
||||
if (lastdec >= now) {
|
||||
/* normal mode */
|
||||
timestamp += lastdec - now;
|
||||
} else {
|
||||
/* we have an overflow ... */
|
||||
timestamp += lastdec + timer_load_val - now;
|
||||
}
|
||||
lastdec = now;
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
/* We overrun in 100s */
|
||||
return (ulong)(timer_load_val / 100);
|
||||
}
|
||||
|
||||
void reset_timer_masked(void)
|
||||
{
|
||||
/* reset time */
|
||||
lastdec = read_timer();
|
||||
timestamp = 0;
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
reset_timer_masked();
|
||||
}
|
||||
|
||||
ulong get_timer_masked(void)
|
||||
{
|
||||
unsigned long long res = get_ticks();
|
||||
do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
|
||||
return res;
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
void set_timer(ulong t)
|
||||
{
|
||||
timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
unsigned long long tmp;
|
||||
ulong tmo;
|
||||
|
||||
tmo = (usec + 9) / 10;
|
||||
tmp = get_ticks() + tmo; /* get current timestamp */
|
||||
|
||||
while (get_ticks() < tmp)/* loop till event */
|
||||
/*NOP*/;
|
||||
}
|
||||
|
|
@ -0,0 +1,578 @@
|
|||
/*
|
||||
* armboot - Startup Code for ARM1176 CPU-core
|
||||
*
|
||||
* Copyright (c) 2007 Samsung Electronics
|
||||
*
|
||||
* Copyright (C) 2008
|
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
* 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
|
||||
* 2007-09-21 - Added MoviNAND and OneNAND boot codes by
|
||||
* jsgood (jsgood.yang@samsung.com)
|
||||
* Base codes by scsuh (sc.suh)
|
||||
*/
|
||||
|
||||
#include <asm-offsets.h>
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
#ifdef CONFIG_ENABLE_MMU
|
||||
#include <asm/proc/domain.h>
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
|
||||
#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
|
||||
#endif
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Jump vector table as in table 3.1 in [1]
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _start
|
||||
_start: b reset
|
||||
#ifndef CONFIG_NAND_SPL
|
||||
ldr pc, _undefined_instruction
|
||||
ldr pc, _software_interrupt
|
||||
ldr pc, _prefetch_abort
|
||||
ldr pc, _data_abort
|
||||
ldr pc, _not_used
|
||||
ldr pc, _irq
|
||||
ldr pc, _fiq
|
||||
|
||||
_undefined_instruction:
|
||||
.word undefined_instruction
|
||||
_software_interrupt:
|
||||
.word software_interrupt
|
||||
_prefetch_abort:
|
||||
.word prefetch_abort
|
||||
_data_abort:
|
||||
.word data_abort
|
||||
_not_used:
|
||||
.word not_used
|
||||
_irq:
|
||||
.word irq
|
||||
_fiq:
|
||||
.word fiq
|
||||
_pad:
|
||||
.word 0x12345678 /* now 16*4=64 */
|
||||
#else
|
||||
. = _start + 64
|
||||
#endif
|
||||
|
||||
.global _end_vect
|
||||
_end_vect:
|
||||
.balignl 16,0xdeadbeef
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Startup Code (reset vector)
|
||||
*
|
||||
* do important init only if we don't start from memory!
|
||||
* setup Memory and board specific bits prior to relocation.
|
||||
* relocate armboot to ram
|
||||
* setup stack
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _TEXT_BASE
|
||||
_TEXT_BASE:
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
|
||||
/*
|
||||
* Below variable is very important because we use MMU in U-Boot.
|
||||
* Without it, we cannot run code correctly before MMU is ON.
|
||||
* by scsuh.
|
||||
*/
|
||||
_TEXT_PHY_BASE:
|
||||
.word CONFIG_SYS_PHY_UBOOT_BASE
|
||||
|
||||
/*
|
||||
* These are defined in the board-specific linker script.
|
||||
* Subtracting _start from them lets the linker put their
|
||||
* relative position in the executable instead of leaving
|
||||
* them null.
|
||||
*/
|
||||
|
||||
.globl _bss_start_ofs
|
||||
_bss_start_ofs:
|
||||
.word __bss_start - _start
|
||||
|
||||
.globl _bss_end_ofs
|
||||
_bss_end_ofs:
|
||||
.word __bss_end__ - _start
|
||||
|
||||
.globl _end_ofs
|
||||
_end_ofs:
|
||||
.word _end - _start
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) + 8 bytes */
|
||||
.globl IRQ_STACK_START_IN
|
||||
IRQ_STACK_START_IN:
|
||||
.word 0x0badc0de
|
||||
|
||||
/*
|
||||
* the actual reset code
|
||||
*/
|
||||
|
||||
reset:
|
||||
/*
|
||||
* set the cpu to SVC32 mode
|
||||
*/
|
||||
mrs r0, cpsr
|
||||
bic r0, r0, #0x3f
|
||||
orr r0, r0, #0xd3
|
||||
msr cpsr, r0
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* CPU_init_critical registers
|
||||
*
|
||||
* setup important registers
|
||||
* setup memory timing
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
/*
|
||||
* we do sys-critical inits only at reboot,
|
||||
* not when booting from ram!
|
||||
*/
|
||||
cpu_init_crit:
|
||||
/*
|
||||
* When booting from NAND - it has definitely been a reset, so, no need
|
||||
* to flush caches and disable the MMU
|
||||
*/
|
||||
#ifndef CONFIG_NAND_SPL
|
||||
/*
|
||||
* flush v4 I/D caches
|
||||
*/
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
|
||||
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
|
||||
|
||||
/*
|
||||
* disable MMU stuff and caches
|
||||
*/
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
|
||||
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
|
||||
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
|
||||
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
|
||||
|
||||
/* Prepare to disable the MMU */
|
||||
adr r2, mmu_disable_phys
|
||||
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
|
||||
b mmu_disable
|
||||
|
||||
.align 5
|
||||
/* Run in a single cache-line */
|
||||
mmu_disable:
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
nop
|
||||
nop
|
||||
mov pc, r2
|
||||
mmu_disable_phys:
|
||||
|
||||
#ifdef CONFIG_DISABLE_TCM
|
||||
/*
|
||||
* Disable the TCMs
|
||||
*/
|
||||
mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
|
||||
cmp r0, #0
|
||||
beq skip_tcmdisable
|
||||
mov r1, #0
|
||||
mov r2, #1
|
||||
tst r0, r2
|
||||
mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
|
||||
tst r0, r2, LSL #16
|
||||
mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
|
||||
skip_tcmdisable:
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PERIPORT_REMAP
|
||||
/* Peri port setup */
|
||||
ldr r0, =CONFIG_PERIPORT_BASE
|
||||
orr r0, r0, #CONFIG_PERIPORT_SIZE
|
||||
mcr p15,0,r0,c15,c2,4
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Go setup Memory and board specific bits prior to relocation.
|
||||
*/
|
||||
bl lowlevel_init /* go setup pll,mux,memory */
|
||||
|
||||
/* Set stackpointer in internal RAM to call board_init_f */
|
||||
call_board_init_f:
|
||||
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
|
||||
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
|
||||
ldr r0,=0x00000000
|
||||
bl board_init_f
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* void relocate_code (addr_sp, gd, addr_moni)
|
||||
*
|
||||
* This "function" does not return, instead it continues in RAM
|
||||
* after relocating the monitor code.
|
||||
*
|
||||
*/
|
||||
.globl relocate_code
|
||||
relocate_code:
|
||||
mov r4, r0 /* save addr_sp */
|
||||
mov r5, r1 /* save addr of gd */
|
||||
mov r6, r2 /* save addr of destination */
|
||||
|
||||
/* Set up the stack */
|
||||
stack_setup:
|
||||
mov sp, r4
|
||||
|
||||
adr r0, _start
|
||||
cmp r0, r6
|
||||
beq clear_bss /* skip relocation */
|
||||
mov r1, r6 /* r1 <- scratch for copy_loop */
|
||||
ldr r3, _bss_start_ofs
|
||||
add r2, r0, r3 /* r2 <- source end address */
|
||||
|
||||
copy_loop:
|
||||
ldmia r0!, {r9-r10} /* copy from source address [r0] */
|
||||
stmia r1!, {r9-r10} /* copy to target address [r1] */
|
||||
cmp r0, r2 /* until source end address [r2] */
|
||||
blo copy_loop
|
||||
|
||||
#ifndef CONFIG_PRELOADER
|
||||
/*
|
||||
* fix .rel.dyn relocations
|
||||
*/
|
||||
ldr r0, _TEXT_BASE /* r0 <- Text base */
|
||||
sub r9, r6, r0 /* r9 <- relocation offset */
|
||||
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
|
||||
add r10, r10, r0 /* r10 <- sym table in FLASH */
|
||||
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
|
||||
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
|
||||
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
|
||||
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
|
||||
fixloop:
|
||||
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
|
||||
add r0, r0, r9 /* r0 <- location to fix up in RAM */
|
||||
ldr r1, [r2, #4]
|
||||
and r7, r1, #0xff
|
||||
cmp r7, #23 /* relative fixup? */
|
||||
beq fixrel
|
||||
cmp r7, #2 /* absolute fixup? */
|
||||
beq fixabs
|
||||
/* ignore unknown type of fixup */
|
||||
b fixnext
|
||||
fixabs:
|
||||
/* absolute fix: set location to (offset) symbol value */
|
||||
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
|
||||
add r1, r10, r1 /* r1 <- address of symbol in table */
|
||||
ldr r1, [r1, #4] /* r1 <- symbol value */
|
||||
add r1, r1, r9 /* r1 <- relocated sym addr */
|
||||
b fixnext
|
||||
fixrel:
|
||||
/* relative fix: increase location by offset */
|
||||
ldr r1, [r0]
|
||||
add r1, r1, r9
|
||||
fixnext:
|
||||
str r1, [r0]
|
||||
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
|
||||
cmp r2, r3
|
||||
blo fixloop
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ENABLE_MMU
|
||||
enable_mmu:
|
||||
/* enable domain access */
|
||||
ldr r5, =0x0000ffff
|
||||
mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
|
||||
|
||||
/* Set the TTB register */
|
||||
ldr r0, _mmu_table_base
|
||||
ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
|
||||
ldr r2, =0xfff00000
|
||||
bic r0, r0, r2
|
||||
orr r1, r0, r1
|
||||
mcr p15, 0, r1, c2, c0, 0
|
||||
|
||||
/* Enable the MMU */
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #1 /* Set CR_M to enable MMU */
|
||||
|
||||
/* Prepare to enable the MMU */
|
||||
adr r1, skip_hw_init
|
||||
and r1, r1, #0x3fc
|
||||
ldr r2, _TEXT_BASE
|
||||
ldr r3, =0xfff00000
|
||||
and r2, r2, r3
|
||||
orr r2, r2, r1
|
||||
b mmu_enable
|
||||
|
||||
.align 5
|
||||
/* Run in a single cache-line */
|
||||
mmu_enable:
|
||||
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
nop
|
||||
nop
|
||||
mov pc, r2
|
||||
skip_hw_init:
|
||||
#endif
|
||||
|
||||
clear_bss:
|
||||
#ifndef CONFIG_PRELOADER
|
||||
ldr r0, _bss_start_ofs
|
||||
ldr r1, _bss_end_ofs
|
||||
mov r4, r6 /* reloc addr */
|
||||
add r0, r0, r4
|
||||
add r1, r1, r4
|
||||
mov r2, #0x00000000 /* clear */
|
||||
|
||||
clbss_l:str r2, [r0] /* clear loop... */
|
||||
add r0, r0, #4
|
||||
cmp r0, r1
|
||||
bne clbss_l
|
||||
|
||||
#ifndef CONFIG_NAND_SPL
|
||||
bl coloured_LED_init
|
||||
bl red_LED_on
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* We are done. Do not return, instead branch to second part of board
|
||||
* initialization, now running from RAM.
|
||||
*/
|
||||
#ifdef CONFIG_NAND_SPL
|
||||
ldr pc, _nand_boot
|
||||
|
||||
_nand_boot: .word nand_boot
|
||||
#else
|
||||
ldr r0, _board_init_r_ofs
|
||||
adr r1, _start
|
||||
add lr, r0, r1
|
||||
add lr, lr, r9
|
||||
/* setup parameters for board_init_r */
|
||||
mov r0, r5 /* gd_t */
|
||||
mov r1, r6 /* dest_addr */
|
||||
/* jump to it ... */
|
||||
mov pc, lr
|
||||
|
||||
_board_init_r_ofs:
|
||||
.word board_init_r - _start
|
||||
#endif
|
||||
|
||||
_rel_dyn_start_ofs:
|
||||
.word __rel_dyn_start - _start
|
||||
_rel_dyn_end_ofs:
|
||||
.word __rel_dyn_end - _start
|
||||
_dynsym_start_ofs:
|
||||
.word __dynsym_start - _start
|
||||
|
||||
#ifdef CONFIG_ENABLE_MMU
|
||||
_mmu_table_base:
|
||||
.word mmu_table
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_NAND_SPL
|
||||
/*
|
||||
* we assume that cache operation is done before. (eg. cleanup_before_linux())
|
||||
* actually, we don't need to do anything about cache if not use d-cache in
|
||||
* U-Boot. So, in this function we clean only MMU. by scsuh
|
||||
*
|
||||
* void theLastJump(void *kernel, int arch_num, uint boot_params);
|
||||
*/
|
||||
#ifdef CONFIG_ENABLE_MMU
|
||||
.globl theLastJump
|
||||
theLastJump:
|
||||
mov r9, r0
|
||||
ldr r3, =0xfff00000
|
||||
ldr r4, _TEXT_PHY_BASE
|
||||
adr r5, phy_last_jump
|
||||
bic r5, r5, r3
|
||||
orr r5, r5, r4
|
||||
mov pc, r5
|
||||
phy_last_jump:
|
||||
/*
|
||||
* disable MMU stuff
|
||||
*/
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
|
||||
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
|
||||
orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
|
||||
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
|
||||
|
||||
mov r0, #0
|
||||
mov pc, r9
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Interrupt handling
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
@
|
||||
@ IRQ stack frame.
|
||||
@
|
||||
#define S_FRAME_SIZE 72
|
||||
|
||||
#define S_OLD_R0 68
|
||||
#define S_PSR 64
|
||||
#define S_PC 60
|
||||
#define S_LR 56
|
||||
#define S_SP 52
|
||||
|
||||
#define S_IP 48
|
||||
#define S_FP 44
|
||||
#define S_R10 40
|
||||
#define S_R9 36
|
||||
#define S_R8 32
|
||||
#define S_R7 28
|
||||
#define S_R6 24
|
||||
#define S_R5 20
|
||||
#define S_R4 16
|
||||
#define S_R3 12
|
||||
#define S_R2 8
|
||||
#define S_R1 4
|
||||
#define S_R0 0
|
||||
|
||||
#define MODE_SVC 0x13
|
||||
#define I_BIT 0x80
|
||||
|
||||
/*
|
||||
* use bad_save_user_regs for abort/prefetch/undef/swi ...
|
||||
*/
|
||||
|
||||
.macro bad_save_user_regs
|
||||
/* carve out a frame on current user stack */
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
/* Save user registers (now in svc mode) r0-r12 */
|
||||
stmia sp, {r0 - r12}
|
||||
|
||||
ldr r2, IRQ_STACK_START_IN
|
||||
/* get values for "aborted" pc and cpsr (into parm regs) */
|
||||
ldmia r2, {r2 - r3}
|
||||
/* grab pointer to old stack */
|
||||
add r0, sp, #S_FRAME_SIZE
|
||||
|
||||
add r5, sp, #S_SP
|
||||
mov r1, lr
|
||||
/* save sp_SVC, lr_SVC, pc, cpsr */
|
||||
stmia r5, {r0 - r3}
|
||||
/* save current stack into r0 (param register) */
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
|
||||
|
||||
/* save caller lr in position 0 of saved stack */
|
||||
str lr, [r13]
|
||||
/* get the spsr */
|
||||
mrs lr, spsr
|
||||
/* save spsr in position 1 of saved stack */
|
||||
str lr, [r13, #4]
|
||||
|
||||
/* prepare SVC-Mode */
|
||||
mov r13, #MODE_SVC
|
||||
@ msr spsr_c, r13
|
||||
/* switch modes, make sure moves will execute */
|
||||
msr spsr, r13
|
||||
/* capture return pc */
|
||||
mov lr, pc
|
||||
/* jump to next instruction & switch modes. */
|
||||
movs pc, lr
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack_swi
|
||||
/* space on current stack for scratch reg. */
|
||||
sub r13, r13, #4
|
||||
/* save R0's value. */
|
||||
str r0, [r13]
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
|
||||
/* save caller lr in position 0 of saved stack */
|
||||
str lr, [r0]
|
||||
/* get the spsr */
|
||||
mrs r0, spsr
|
||||
/* save spsr in position 1 of saved stack */
|
||||
str lr, [r0, #4]
|
||||
/* restore r0 */
|
||||
ldr r0, [r13]
|
||||
/* pop stack entry */
|
||||
add r13, r13, #4
|
||||
.endm
|
||||
|
||||
/*
|
||||
* exception handlers
|
||||
*/
|
||||
.align 5
|
||||
undefined_instruction:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_undefined_instruction
|
||||
|
||||
.align 5
|
||||
software_interrupt:
|
||||
get_bad_stack_swi
|
||||
bad_save_user_regs
|
||||
bl do_software_interrupt
|
||||
|
||||
.align 5
|
||||
prefetch_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_prefetch_abort
|
||||
|
||||
.align 5
|
||||
data_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_data_abort
|
||||
|
||||
.align 5
|
||||
not_used:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_not_used
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_irq
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_fiq
|
||||
#endif /* CONFIG_NAND_SPL */
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += aemif.o clock.o init.o mux.o timer.o wdt.o
|
||||
SOBJS += lowlevel_init.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,93 @@
|
|||
/*
|
||||
* TNETV107X: Asynchronous EMIF Configuration
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/mux.h>
|
||||
|
||||
#define ASYNC_EMIF_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
|
||||
#define ASYNC_EMIF_CONFIG(cs) (ASYNC_EMIF_BASE+0x10+(cs)*4)
|
||||
#define ASYNC_EMIF_ONENAND_CONTROL (ASYNC_EMIF_BASE+0x5c)
|
||||
#define ASYNC_EMIF_NAND_CONTROL (ASYNC_EMIF_BASE+0x60)
|
||||
#define ASYNC_EMIF_WAITCYCLE_CONFIG (ASYNC_EMIF_BASE+0x4)
|
||||
|
||||
#define CONFIG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
|
||||
#define CONFIG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
|
||||
#define CONFIG_WR_SETUP(v) (((v) & 0x0f) << 26)
|
||||
#define CONFIG_WR_STROBE(v) (((v) & 0x3f) << 20)
|
||||
#define CONFIG_WR_HOLD(v) (((v) & 0x07) << 17)
|
||||
#define CONFIG_RD_SETUP(v) (((v) & 0x0f) << 13)
|
||||
#define CONFIG_RD_STROBE(v) (((v) & 0x3f) << 7)
|
||||
#define CONFIG_RD_HOLD(v) (((v) & 0x07) << 4)
|
||||
#define CONFIG_TURN_AROUND(v) (((v) & 0x03) << 2)
|
||||
#define CONFIG_WIDTH(v) (((v) & 0x03) << 0)
|
||||
|
||||
#define NUM_CS 4
|
||||
|
||||
#define set_config_field(reg, field, val) \
|
||||
do { \
|
||||
if (val != -1) { \
|
||||
reg &= ~CONFIG_##field(0xffffffff); \
|
||||
reg |= CONFIG_##field(val); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
void configure_async_emif(int cs, struct async_emif_config *cfg)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
|
||||
tmp = __raw_readl(ASYNC_EMIF_NAND_CONTROL);
|
||||
tmp |= (1 << cs);
|
||||
__raw_writel(tmp, ASYNC_EMIF_NAND_CONTROL);
|
||||
|
||||
} else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
|
||||
tmp = __raw_readl(ASYNC_EMIF_ONENAND_CONTROL);
|
||||
tmp |= (1 << cs);
|
||||
__raw_writel(tmp, ASYNC_EMIF_ONENAND_CONTROL);
|
||||
}
|
||||
|
||||
tmp = __raw_readl(ASYNC_EMIF_CONFIG(cs));
|
||||
|
||||
set_config_field(tmp, SELECT_STROBE, cfg->select_strobe);
|
||||
set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait);
|
||||
set_config_field(tmp, WR_SETUP, cfg->wr_setup);
|
||||
set_config_field(tmp, WR_STROBE, cfg->wr_strobe);
|
||||
set_config_field(tmp, WR_HOLD, cfg->wr_hold);
|
||||
set_config_field(tmp, RD_SETUP, cfg->rd_setup);
|
||||
set_config_field(tmp, RD_STROBE, cfg->rd_strobe);
|
||||
set_config_field(tmp, RD_HOLD, cfg->rd_hold);
|
||||
set_config_field(tmp, TURN_AROUND, cfg->turn_around);
|
||||
set_config_field(tmp, WIDTH, cfg->width);
|
||||
|
||||
__raw_writel(tmp, ASYNC_EMIF_CONFIG(cs));
|
||||
}
|
||||
|
||||
void init_async_emif(int num_cs, struct async_emif_config *config)
|
||||
{
|
||||
int cs;
|
||||
|
||||
clk_enable(TNETV107X_LPSC_AEMIF);
|
||||
|
||||
for (cs = 0; cs < num_cs; cs++)
|
||||
configure_async_emif(cs, config + cs);
|
||||
}
|
||||
|
|
@ -0,0 +1,451 @@
|
|||
/*
|
||||
* TNETV107X: Clock management APIs
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm-generic/errno.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
#define CLOCK_BASE TNETV107X_CLOCK_CONTROL_BASE
|
||||
#define PSC_BASE TNETV107X_PSC_BASE
|
||||
|
||||
#define BIT(x) (1 << (x))
|
||||
|
||||
#define MAX_PREDIV 64
|
||||
#define MAX_POSTDIV 8
|
||||
#define MAX_MULT 512
|
||||
#define MAX_DIV (MAX_PREDIV * MAX_POSTDIV)
|
||||
|
||||
/* LPSC registers */
|
||||
#define PSC_PTCMD 0x120
|
||||
#define PSC_PTSTAT 0x128
|
||||
#define PSC_MDSTAT(n) (0x800 + (n) * 4)
|
||||
#define PSC_MDCTL(n) (0xA00 + (n) * 4)
|
||||
|
||||
#define PSC_MDCTL_LRSTZ BIT(8)
|
||||
|
||||
#define psc_reg_read(reg) __raw_readl((u32 *)(PSC_BASE + (reg)))
|
||||
#define psc_reg_write(reg, val) __raw_writel(val, (u32 *)(PSC_BASE + (reg)))
|
||||
|
||||
/* SSPLL registers */
|
||||
struct sspll_regs {
|
||||
u32 modes;
|
||||
u32 postdiv;
|
||||
u32 prediv;
|
||||
u32 mult_factor;
|
||||
u32 divider_range;
|
||||
u32 bw_divider;
|
||||
u32 spr_amount;
|
||||
u32 spr_rate_div;
|
||||
u32 diag;
|
||||
};
|
||||
|
||||
/* SSPLL base addresses */
|
||||
static struct sspll_regs *sspll_regs[] = {
|
||||
(struct sspll_regs *)(CLOCK_BASE + 0x040),
|
||||
(struct sspll_regs *)(CLOCK_BASE + 0x080),
|
||||
(struct sspll_regs *)(CLOCK_BASE + 0x0c0),
|
||||
};
|
||||
|
||||
#define sspll_reg(pll, reg) (&(sspll_regs[pll]->reg))
|
||||
#define sspll_reg_read(pll, reg) __raw_readl(sspll_reg(pll, reg))
|
||||
#define sspll_reg_write(pll, reg, val) __raw_writel(val, sspll_reg(pll, reg))
|
||||
|
||||
|
||||
/* PLL Control Registers */
|
||||
struct pllctl_regs {
|
||||
u32 ctl; /* 00 */
|
||||
u32 ocsel; /* 04 */
|
||||
u32 secctl; /* 08 */
|
||||
u32 __pad0;
|
||||
u32 mult; /* 10 */
|
||||
u32 prediv; /* 14 */
|
||||
u32 div1; /* 18 */
|
||||
u32 div2; /* 1c */
|
||||
u32 div3; /* 20 */
|
||||
u32 oscdiv1; /* 24 */
|
||||
u32 postdiv; /* 28 */
|
||||
u32 bpdiv; /* 2c */
|
||||
u32 wakeup; /* 30 */
|
||||
u32 __pad1;
|
||||
u32 cmd; /* 38 */
|
||||
u32 stat; /* 3c */
|
||||
u32 alnctl; /* 40 */
|
||||
u32 dchange; /* 44 */
|
||||
u32 cken; /* 48 */
|
||||
u32 ckstat; /* 4c */
|
||||
u32 systat; /* 50 */
|
||||
u32 ckctl; /* 54 */
|
||||
u32 __pad2[2];
|
||||
u32 div4; /* 60 */
|
||||
u32 div5; /* 64 */
|
||||
u32 div6; /* 68 */
|
||||
u32 div7; /* 6c */
|
||||
u32 div8; /* 70 */
|
||||
};
|
||||
|
||||
struct lpsc_map {
|
||||
int pll, div;
|
||||
};
|
||||
|
||||
static struct pllctl_regs *pllctl_regs[] = {
|
||||
(struct pllctl_regs *)(CLOCK_BASE + 0x700),
|
||||
(struct pllctl_regs *)(CLOCK_BASE + 0x300),
|
||||
(struct pllctl_regs *)(CLOCK_BASE + 0x500),
|
||||
};
|
||||
|
||||
#define pllctl_reg(pll, reg) (&(pllctl_regs[pll]->reg))
|
||||
#define pllctl_reg_read(pll, reg) __raw_readl(pllctl_reg(pll, reg))
|
||||
#define pllctl_reg_write(pll, reg, val) __raw_writel(val, pllctl_reg(pll, reg))
|
||||
|
||||
#define pllctl_reg_rmw(pll, reg, mask, val) \
|
||||
pllctl_reg_write(pll, reg, \
|
||||
(pllctl_reg_read(pll, reg) & ~(mask)) | val)
|
||||
|
||||
#define pllctl_reg_setbits(pll, reg, mask) \
|
||||
pllctl_reg_rmw(pll, reg, 0, mask)
|
||||
|
||||
#define pllctl_reg_clrbits(pll, reg, mask) \
|
||||
pllctl_reg_rmw(pll, reg, mask, 0)
|
||||
|
||||
/* PLLCTL Bits */
|
||||
#define PLLCTL_CLKMODE BIT(8)
|
||||
#define PLLCTL_PLLSELB BIT(7)
|
||||
#define PLLCTL_PLLENSRC BIT(5)
|
||||
#define PLLCTL_PLLDIS BIT(4)
|
||||
#define PLLCTL_PLLRST BIT(3)
|
||||
#define PLLCTL_PLLPWRDN BIT(1)
|
||||
#define PLLCTL_PLLEN BIT(0)
|
||||
|
||||
#define PLLDIV_ENABLE BIT(15)
|
||||
|
||||
static int pll_div_offset[] = {
|
||||
#define div_offset(reg) offsetof(struct pllctl_regs, reg)
|
||||
div_offset(div1), div_offset(div2), div_offset(div3),
|
||||
div_offset(div4), div_offset(div5), div_offset(div6),
|
||||
div_offset(div7), div_offset(div8),
|
||||
};
|
||||
|
||||
static unsigned long pll_bypass_mask[] = { 1, 4, 2 };
|
||||
static unsigned long pll_div_mask[] = { 0x01ff, 0x00ff, 0x00ff };
|
||||
|
||||
/* Mappings from PLL+DIV to subsystem clocks */
|
||||
#define sys_arm1176_clk {SYS_PLL, 0}
|
||||
#define sys_dsp_clk {SYS_PLL, 1}
|
||||
#define sys_ddr_clk {SYS_PLL, 2}
|
||||
#define sys_full_clk {SYS_PLL, 3}
|
||||
#define sys_lcd_clk {SYS_PLL, 4}
|
||||
#define sys_vlynq_ref_clk {SYS_PLL, 5}
|
||||
#define sys_tsc_clk {SYS_PLL, 6}
|
||||
#define sys_half_clk {SYS_PLL, 7}
|
||||
|
||||
#define eth_clk_5 {ETH_PLL, 0}
|
||||
#define eth_clk_50 {ETH_PLL, 1}
|
||||
#define eth_clk_125 {ETH_PLL, 2}
|
||||
#define eth_clk_250 {ETH_PLL, 3}
|
||||
#define eth_clk_25 {ETH_PLL, 4}
|
||||
|
||||
#define tdm_clk {TDM_PLL, 0}
|
||||
#define tdm_extra_clk {TDM_PLL, 1}
|
||||
#define tdm1_clk {TDM_PLL, 2}
|
||||
|
||||
/* Optimization barrier */
|
||||
#define barrier() \
|
||||
__asm__ __volatile__("mov r0, r0\n" : : : "memory");
|
||||
|
||||
static const struct lpsc_map lpsc_clk_map[] = {
|
||||
[TNETV107X_LPSC_ARM] = sys_arm1176_clk,
|
||||
[TNETV107X_LPSC_GEM] = sys_dsp_clk,
|
||||
[TNETV107X_LPSC_DDR2_PHY] = sys_ddr_clk,
|
||||
[TNETV107X_LPSC_TPCC] = sys_full_clk,
|
||||
[TNETV107X_LPSC_TPTC0] = sys_full_clk,
|
||||
[TNETV107X_LPSC_TPTC1] = sys_full_clk,
|
||||
[TNETV107X_LPSC_RAM] = sys_full_clk,
|
||||
[TNETV107X_LPSC_MBX_LITE] = sys_arm1176_clk,
|
||||
[TNETV107X_LPSC_LCD] = sys_lcd_clk,
|
||||
[TNETV107X_LPSC_ETHSS] = eth_clk_125,
|
||||
[TNETV107X_LPSC_AEMIF] = sys_full_clk,
|
||||
[TNETV107X_LPSC_CHIP_CFG] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TSC] = sys_tsc_clk,
|
||||
[TNETV107X_LPSC_ROM] = sys_half_clk,
|
||||
[TNETV107X_LPSC_UART2] = sys_half_clk,
|
||||
[TNETV107X_LPSC_PKTSEC] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SECCTL] = sys_half_clk,
|
||||
[TNETV107X_LPSC_KEYMGR] = sys_half_clk,
|
||||
[TNETV107X_LPSC_KEYPAD] = sys_half_clk,
|
||||
[TNETV107X_LPSC_GPIO] = sys_half_clk,
|
||||
[TNETV107X_LPSC_MDIO] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SDIO0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_UART0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_UART1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TIMER0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TIMER1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_WDT_ARM] = sys_half_clk,
|
||||
[TNETV107X_LPSC_WDT_DSP] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SSP] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TDM0] = tdm_clk,
|
||||
[TNETV107X_LPSC_VLYNQ] = sys_vlynq_ref_clk,
|
||||
[TNETV107X_LPSC_MCDMA] = sys_half_clk,
|
||||
[TNETV107X_LPSC_USB0] = sys_half_clk,
|
||||
[TNETV107X_LPSC_TDM1] = tdm1_clk,
|
||||
[TNETV107X_LPSC_DEBUGSS] = sys_half_clk,
|
||||
[TNETV107X_LPSC_ETHSS_RGMII] = eth_clk_250,
|
||||
[TNETV107X_LPSC_SYSTEM] = sys_half_clk,
|
||||
[TNETV107X_LPSC_IMCOP] = sys_dsp_clk,
|
||||
[TNETV107X_LPSC_SPARE] = sys_half_clk,
|
||||
[TNETV107X_LPSC_SDIO1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_USB1] = sys_half_clk,
|
||||
[TNETV107X_LPSC_USBSS] = sys_half_clk,
|
||||
[TNETV107X_LPSC_DDR2_EMIF1_VRST] = sys_ddr_clk,
|
||||
[TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST] = sys_ddr_clk,
|
||||
};
|
||||
|
||||
static const unsigned long pll_ext_freq[] = {
|
||||
[SYS_PLL] = CONFIG_PLL_SYS_EXT_FREQ,
|
||||
[ETH_PLL] = CONFIG_PLL_ETH_EXT_FREQ,
|
||||
[TDM_PLL] = CONFIG_PLL_TDM_EXT_FREQ,
|
||||
};
|
||||
|
||||
static unsigned long pll_freq_get(int pll)
|
||||
{
|
||||
unsigned long mult = 1, prediv = 1, postdiv = 1;
|
||||
unsigned long ref = CONFIG_SYS_INT_OSC_FREQ;
|
||||
unsigned long ret;
|
||||
u32 bypass;
|
||||
|
||||
bypass = __raw_readl((u32 *)(CLOCK_BASE));
|
||||
if (!(bypass & pll_bypass_mask[pll])) {
|
||||
mult = sspll_reg_read(pll, mult_factor);
|
||||
prediv = sspll_reg_read(pll, prediv) + 1;
|
||||
postdiv = sspll_reg_read(pll, postdiv) + 1;
|
||||
}
|
||||
|
||||
if (pllctl_reg_read(pll, ctl) & PLLCTL_CLKMODE)
|
||||
ref = pll_ext_freq[pll];
|
||||
|
||||
if (!(pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN))
|
||||
return ref;
|
||||
|
||||
ret = (unsigned long)(ref + ((unsigned long long)ref * mult) / 256);
|
||||
ret /= (prediv * postdiv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static unsigned long __pll_div_freq_get(int pll, unsigned int fpll,
|
||||
int div)
|
||||
{
|
||||
int divider = 1;
|
||||
unsigned long divreg;
|
||||
|
||||
divreg = __raw_readl((void *)pllctl_regs[pll] + pll_div_offset[div]);
|
||||
|
||||
if (divreg & PLLDIV_ENABLE)
|
||||
divider = (divreg & pll_div_mask[pll]) + 1;
|
||||
|
||||
return fpll / divider;
|
||||
}
|
||||
|
||||
static unsigned long pll_div_freq_get(int pll, int div)
|
||||
{
|
||||
unsigned int fpll = pll_freq_get(pll);
|
||||
|
||||
return __pll_div_freq_get(pll, fpll, div);
|
||||
}
|
||||
|
||||
static void __pll_div_freq_set(int pll, unsigned int fpll, int div,
|
||||
unsigned long hz)
|
||||
{
|
||||
int divider = (fpll / hz - 1);
|
||||
|
||||
divider &= pll_div_mask[pll];
|
||||
divider |= PLLDIV_ENABLE;
|
||||
|
||||
__raw_writel(divider, (void *)pllctl_regs[pll] + pll_div_offset[div]);
|
||||
pllctl_reg_setbits(pll, alnctl, (1 << div));
|
||||
pllctl_reg_setbits(pll, dchange, (1 << div));
|
||||
}
|
||||
|
||||
static unsigned long pll_div_freq_set(int pll, int div, unsigned long hz)
|
||||
{
|
||||
unsigned int fpll = pll_freq_get(pll);
|
||||
|
||||
__pll_div_freq_set(pll, fpll, div, hz);
|
||||
|
||||
pllctl_reg_write(pll, cmd, 1);
|
||||
|
||||
/* Wait until new divider takes effect */
|
||||
while (pllctl_reg_read(pll, stat) & 0x01);
|
||||
|
||||
return __pll_div_freq_get(pll, fpll, div);
|
||||
}
|
||||
|
||||
unsigned long clk_get_rate(unsigned int clk)
|
||||
{
|
||||
return pll_div_freq_get(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div);
|
||||
}
|
||||
|
||||
unsigned long clk_round_rate(unsigned int clk, unsigned long hz)
|
||||
{
|
||||
unsigned long fpll, divider, pll;
|
||||
|
||||
pll = lpsc_clk_map[clk].pll;
|
||||
fpll = pll_freq_get(pll);
|
||||
divider = (fpll / hz - 1);
|
||||
divider &= pll_div_mask[pll];
|
||||
|
||||
return fpll / (divider + 1);
|
||||
}
|
||||
|
||||
int clk_set_rate(unsigned int clk, unsigned long _hz)
|
||||
{
|
||||
unsigned long hz;
|
||||
|
||||
hz = clk_round_rate(clk, _hz);
|
||||
if (hz != _hz)
|
||||
return -EINVAL; /* Cannot set to target freq */
|
||||
|
||||
pll_div_freq_set(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div, hz);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void lpsc_control(int mod, unsigned long state, int lrstz)
|
||||
{
|
||||
u32 mdctl;
|
||||
|
||||
mdctl = psc_reg_read(PSC_MDCTL(mod));
|
||||
mdctl &= ~0x1f;
|
||||
mdctl |= state;
|
||||
|
||||
if (lrstz == 0)
|
||||
mdctl &= ~PSC_MDCTL_LRSTZ;
|
||||
else if (lrstz == 1)
|
||||
mdctl |= PSC_MDCTL_LRSTZ;
|
||||
|
||||
psc_reg_write(PSC_MDCTL(mod), mdctl);
|
||||
|
||||
psc_reg_write(PSC_PTCMD, 1);
|
||||
|
||||
/* wait for power domain transition to end */
|
||||
while (psc_reg_read(PSC_PTSTAT) & 1);
|
||||
|
||||
/* Wait for module state change */
|
||||
while ((psc_reg_read(PSC_MDSTAT(mod)) & 0x1f) != state);
|
||||
}
|
||||
|
||||
int lpsc_status(unsigned int id)
|
||||
{
|
||||
return psc_reg_read(PSC_MDSTAT(id)) & 0x1f;
|
||||
}
|
||||
|
||||
static void init_pll(const struct pll_init_data *data)
|
||||
{
|
||||
unsigned long fpll;
|
||||
unsigned long best_pre = 0, best_post = 0, best_mult = 0;
|
||||
unsigned long div, prediv, postdiv, mult;
|
||||
unsigned long delta, actual;
|
||||
long best_delta = -1;
|
||||
int i;
|
||||
u32 tmp;
|
||||
|
||||
if (data->pll == SYS_PLL)
|
||||
return; /* cannot reconfigure system pll on the fly */
|
||||
|
||||
tmp = pllctl_reg_read(data->pll, ctl);
|
||||
if (data->internal_osc) {
|
||||
tmp &= ~PLLCTL_CLKMODE;
|
||||
fpll = CONFIG_SYS_INT_OSC_FREQ;
|
||||
} else {
|
||||
tmp |= PLLCTL_CLKMODE;
|
||||
fpll = pll_ext_freq[data->pll];
|
||||
}
|
||||
pllctl_reg_write(data->pll, ctl, tmp);
|
||||
|
||||
mult = data->pll_freq / fpll;
|
||||
for (mult = MAX(mult, 1); mult <= MAX_MULT; mult++) {
|
||||
div = (fpll * mult) / data->pll_freq;
|
||||
if (div < 1 || div > MAX_DIV)
|
||||
continue;
|
||||
|
||||
for (postdiv = 1; postdiv <= min(div, MAX_POSTDIV); postdiv++) {
|
||||
prediv = div / postdiv;
|
||||
if (prediv < 1 || prediv > MAX_PREDIV)
|
||||
continue;
|
||||
|
||||
actual = (fpll / prediv) * (mult / postdiv);
|
||||
delta = (actual - data->pll_freq);
|
||||
if (delta < 0)
|
||||
delta = -delta;
|
||||
if ((delta < best_delta) || (best_delta == -1)) {
|
||||
best_delta = delta;
|
||||
best_mult = mult;
|
||||
best_pre = prediv;
|
||||
best_post = postdiv;
|
||||
if (delta == 0)
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
}
|
||||
done:
|
||||
|
||||
if (best_delta == -1) {
|
||||
printf("pll cannot derive %lu from %lu\n",
|
||||
data->pll_freq, fpll);
|
||||
return;
|
||||
}
|
||||
|
||||
fpll = fpll * best_mult;
|
||||
fpll /= best_pre * best_post;
|
||||
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLENSRC);
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLEN);
|
||||
|
||||
pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLRST);
|
||||
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLPWRDN);
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLDIS);
|
||||
|
||||
sspll_reg_write(data->pll, mult_factor, (best_mult - 1) << 8);
|
||||
sspll_reg_write(data->pll, prediv, best_pre - 1);
|
||||
sspll_reg_write(data->pll, postdiv, best_post - 1);
|
||||
|
||||
for (i = 0; i < 10; i++)
|
||||
if (data->div_freq[i])
|
||||
__pll_div_freq_set(data->pll, fpll, i,
|
||||
data->div_freq[i]);
|
||||
|
||||
pllctl_reg_write(data->pll, cmd, 1);
|
||||
|
||||
/* Wait until pll "go" operation completes */
|
||||
while (pllctl_reg_read(data->pll, stat) & 0x01);
|
||||
|
||||
pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLRST);
|
||||
pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLEN);
|
||||
}
|
||||
|
||||
void init_plls(int num_pll, struct pll_init_data *config)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < num_pll; i++)
|
||||
init_pll(&config[i]);
|
||||
}
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* TNETV107X: Architecture initialization
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
void chip_configuration_unlock(void)
|
||||
{
|
||||
__raw_writel(TNETV107X_KICK0_MAGIC, TNETV107X_KICK0);
|
||||
__raw_writel(TNETV107X_KICK1_MAGIC, TNETV107X_KICK1);
|
||||
}
|
||||
|
||||
int arch_cpu_init(void)
|
||||
{
|
||||
icache_enable();
|
||||
chip_configuration_unlock();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* TNETV107X: Low-level pre-relocation initialization
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* nothing for now, maybe needed for more exotic boot modes */
|
||||
mov pc, lr
|
||||
|
|
@ -0,0 +1,334 @@
|
|||
/*
|
||||
* TNETV107X: Pinmux configuration
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/mux.h>
|
||||
|
||||
#define MUX_MODE_1 0x00
|
||||
#define MUX_MODE_2 0x04
|
||||
#define MUX_MODE_3 0x0c
|
||||
#define MUX_MODE_4 0x1c
|
||||
|
||||
#define MUX_DEBUG 0
|
||||
|
||||
static const struct pin_config pin_table[] = {
|
||||
/* reg shift mode */
|
||||
TNETV107X_MUX_CFG(0, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(0, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(0, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(1, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(1, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(2, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(2, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(3, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(3, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(3, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(4, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(4, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(4, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(4, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 20, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(4, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(4, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(5, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(5, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(6, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(6, 25, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(7, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(7, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(7, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(7, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(8, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(8, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(8, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(8, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(8, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(8, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(8, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 0, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 5, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 10, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(9, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(9, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(9, 20, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(10, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(10, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(10, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(11, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(11, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(12, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(13, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(14, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(15, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(15, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(15, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(16, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(16, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(16, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(17, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(17, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(17, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(17, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(17, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(18, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(18, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(18, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(19, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(19, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(20, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(20, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(21, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(22, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 20, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(22, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(22, 25, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(23, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(23, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(23, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(23, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(23, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(23, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(24, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(24, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(24, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(24, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(24, 25, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 0, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 0, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 5, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 5, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 10, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_3),
|
||||
TNETV107X_MUX_CFG(25, 15, MUX_MODE_4),
|
||||
TNETV107X_MUX_CFG(26, 0, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 5, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 10, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 10, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(26, 15, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 15, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(26, 20, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 20, MUX_MODE_2),
|
||||
TNETV107X_MUX_CFG(26, 25, MUX_MODE_1),
|
||||
TNETV107X_MUX_CFG(26, 25, MUX_MODE_2),
|
||||
};
|
||||
|
||||
const int pin_table_size = sizeof(pin_table) / sizeof(pin_table[0]);
|
||||
|
||||
int mux_select_pin(short index)
|
||||
{
|
||||
const struct pin_config *cfg;
|
||||
unsigned long mask, mode, reg;
|
||||
|
||||
if (index >= pin_table_size)
|
||||
return 0;
|
||||
|
||||
cfg = &pin_table[index];
|
||||
|
||||
mask = 0x1f << cfg->mask_offset;
|
||||
mode = cfg->mode << cfg->mask_offset;
|
||||
|
||||
reg = __raw_readl(TNETV107X_PINMUX(cfg->reg_index));
|
||||
reg = (reg & ~mask) | mode;
|
||||
__raw_writel(reg, TNETV107X_PINMUX(cfg->reg_index));
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int mux_select_pins(const short *pins)
|
||||
{
|
||||
int i, ret = 1;
|
||||
|
||||
for (i = 0; pins[i] >= 0; i++)
|
||||
ret &= mux_select_pin(pins[i]);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,122 @@
|
|||
/*
|
||||
* TNETV107X: Timer implementation
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
struct timer_regs {
|
||||
u_int32_t pid12;
|
||||
u_int32_t pad[3];
|
||||
u_int32_t tim12;
|
||||
u_int32_t tim34;
|
||||
u_int32_t prd12;
|
||||
u_int32_t prd34;
|
||||
u_int32_t tcr;
|
||||
u_int32_t tgcr;
|
||||
u_int32_t wdtcr;
|
||||
};
|
||||
|
||||
#define regs ((struct timer_regs *)CONFIG_SYS_TIMERBASE)
|
||||
|
||||
#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
|
||||
#define TIM_CLK_DIV 16
|
||||
|
||||
static ulong timestamp;
|
||||
static ulong lastinc;
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
clk_enable(TNETV107X_LPSC_TIMER0);
|
||||
|
||||
lastinc = timestamp = 0;
|
||||
|
||||
/* We are using timer34 in unchained 32-bit mode, full speed */
|
||||
__raw_writel(0x0, ®s->tcr);
|
||||
__raw_writel(0x0, ®s->tgcr);
|
||||
__raw_writel(0x06 | ((TIM_CLK_DIV - 1) << 8), ®s->tgcr);
|
||||
__raw_writel(0x0, ®s->tim34);
|
||||
__raw_writel(TIMER_LOAD_VAL, ®s->prd34);
|
||||
__raw_writel(2 << 22, ®s->tcr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
lastinc = timestamp = 0;
|
||||
|
||||
__raw_writel(0, ®s->tcr);
|
||||
__raw_writel(0, ®s->tim34);
|
||||
__raw_writel(2 << 22, ®s->tcr);
|
||||
}
|
||||
|
||||
static ulong get_timer_raw(void)
|
||||
{
|
||||
ulong now = __raw_readl(®s->tim34);
|
||||
|
||||
if (now >= lastinc)
|
||||
timestamp += now - lastinc;
|
||||
else
|
||||
timestamp += now + TIMER_LOAD_VAL - lastinc;
|
||||
|
||||
lastinc = now;
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base;
|
||||
}
|
||||
|
||||
void set_timer(ulong t)
|
||||
{
|
||||
timestamp = t;
|
||||
}
|
||||
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
ulong tmo;
|
||||
ulong endtime;
|
||||
signed long diff;
|
||||
|
||||
tmo = CONFIG_SYS_HZ_CLOCK / 1000;
|
||||
tmo *= usec;
|
||||
tmo /= (1000 * TIM_CLK_DIV);
|
||||
|
||||
endtime = get_timer_raw() + tmo;
|
||||
|
||||
do {
|
||||
ulong now = get_timer_raw();
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
||||
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
||||
|
|
@ -0,0 +1,180 @@
|
|||
/*
|
||||
* TNETV107X: Watchdog timer implementation (for reset)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
#define MAX_DIV 0xFFFE0001
|
||||
|
||||
struct wdt_regs {
|
||||
u32 kick_lock;
|
||||
#define KICK_LOCK_1 0x5555
|
||||
#define KICK_LOCK_2 0xaaaa
|
||||
u32 kick;
|
||||
|
||||
u32 change_lock;
|
||||
#define CHANGE_LOCK_1 0x6666
|
||||
#define CHANGE_LOCK_2 0xbbbb
|
||||
u32 change;
|
||||
|
||||
u32 disable_lock;
|
||||
#define DISABLE_LOCK_1 0x7777
|
||||
#define DISABLE_LOCK_2 0xcccc
|
||||
#define DISABLE_LOCK_3 0xdddd
|
||||
u32 disable;
|
||||
|
||||
u32 prescale_lock;
|
||||
#define PRESCALE_LOCK_1 0x5a5a
|
||||
#define PRESCALE_LOCK_2 0xa5a5
|
||||
u32 prescale;
|
||||
};
|
||||
|
||||
static struct wdt_regs* regs = (struct wdt_regs *)TNETV107X_WDT0_ARM_BASE;
|
||||
|
||||
#define wdt_reg_read(reg) __raw_readl(®s->reg)
|
||||
#define wdt_reg_write(reg, val) __raw_writel((val), ®s->reg)
|
||||
|
||||
static int write_prescale_reg(unsigned long prescale_value)
|
||||
{
|
||||
wdt_reg_write(prescale_lock, PRESCALE_LOCK_1);
|
||||
if ((wdt_reg_read(prescale_lock) & 0x3) != 0x1)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(prescale_lock, PRESCALE_LOCK_2);
|
||||
if ((wdt_reg_read(prescale_lock) & 0x3) != 0x3)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(prescale, prescale_value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int write_change_reg(unsigned long initial_timer_value)
|
||||
{
|
||||
wdt_reg_write(change_lock, CHANGE_LOCK_1);
|
||||
if ((wdt_reg_read(change_lock) & 0x3) != 0x1)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(change_lock, CHANGE_LOCK_2);
|
||||
if ((wdt_reg_read(change_lock) & 0x3) != 0x3)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(change, initial_timer_value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wdt_control(unsigned long disable_value)
|
||||
{
|
||||
wdt_reg_write(disable_lock, DISABLE_LOCK_1);
|
||||
if ((wdt_reg_read(disable_lock) & 0x3) != 0x1)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(disable_lock, DISABLE_LOCK_2);
|
||||
if ((wdt_reg_read(disable_lock) & 0x3) != 0x2)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(disable_lock, DISABLE_LOCK_3);
|
||||
if ((wdt_reg_read(disable_lock) & 0x3) != 0x3)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(disable, disable_value);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wdt_set_period(unsigned long msec)
|
||||
{
|
||||
unsigned long change_value, count_value;
|
||||
unsigned long prescale_value = 1;
|
||||
unsigned long refclk_khz, maxdiv;
|
||||
int ret;
|
||||
|
||||
refclk_khz = clk_get_rate(TNETV107X_LPSC_WDT_ARM);
|
||||
maxdiv = (MAX_DIV / refclk_khz);
|
||||
|
||||
if ((!msec) || (msec > maxdiv))
|
||||
return -1;
|
||||
|
||||
count_value = refclk_khz * msec;
|
||||
if (count_value > 0xffff) {
|
||||
change_value = count_value / 0xffff + 1;
|
||||
prescale_value = count_value / change_value;
|
||||
} else {
|
||||
change_value = count_value;
|
||||
}
|
||||
|
||||
ret = write_prescale_reg(prescale_value - 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = write_change_reg(change_value);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned long last_wdt = -1;
|
||||
|
||||
int wdt_start(unsigned long msecs)
|
||||
{
|
||||
int ret;
|
||||
ret = wdt_control(0);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = wdt_set_period(msecs);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = wdt_control(1);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = wdt_kick();
|
||||
last_wdt = msecs;
|
||||
return ret;
|
||||
}
|
||||
|
||||
int wdt_stop(void)
|
||||
{
|
||||
last_wdt = -1;
|
||||
return wdt_control(0);
|
||||
}
|
||||
|
||||
int wdt_kick(void)
|
||||
{
|
||||
wdt_reg_write(kick_lock, KICK_LOCK_1);
|
||||
if ((wdt_reg_read(kick_lock) & 0x3) != 0x1)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(kick_lock, KICK_LOCK_2);
|
||||
if ((wdt_reg_read(kick_lock) & 0x3) != 0x3)
|
||||
return -1;
|
||||
|
||||
wdt_reg_write(kick, 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void reset_cpu(ulong addr)
|
||||
{
|
||||
clk_enable(TNETV107X_LPSC_WDT_ARM);
|
||||
wdt_start(1);
|
||||
wdt_kick();
|
||||
}
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* (C) Copyright 2002-2004
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
arch/arm/cpu/arm1176/start.o (.text)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
*(.data)
|
||||
}
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.rel.dyn : {
|
||||
__rel_dyn_start = .;
|
||||
*(.rel*)
|
||||
__rel_dyn_end = .;
|
||||
}
|
||||
|
||||
.dynsym : {
|
||||
__dynsym_start = .;
|
||||
*(.dynsym)
|
||||
}
|
||||
|
||||
_end = .;
|
||||
|
||||
.bss __rel_dyn_start (OVERLAY) : {
|
||||
__bss_start = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
}
|
||||
|
||||
/DISCARD/ : { *(.dynstr*) }
|
||||
/DISCARD/ : { *(.dynamic*) }
|
||||
/DISCARD/ : { *(.plt*) }
|
||||
/DISCARD/ : { *(.interp*) }
|
||||
/DISCARD/ : { *(.gnu*) }
|
||||
}
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
COBJS = interrupts.o cpu.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
# Marius Groeger <mgroeger@sysgo.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
|
||||
|
||||
PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* CPU specific code
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <clps7111.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
|
||||
static void cache_flush(void);
|
||||
#endif
|
||||
|
||||
int cleanup_before_linux (void)
|
||||
{
|
||||
/*
|
||||
* this function is called just before we call linux
|
||||
* it prepares the processor for linux
|
||||
*
|
||||
* we turn off caches etc ...
|
||||
* and we set the CPU-speed to 73 MHz - see start.S for details
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
|
||||
disable_interrupts ();
|
||||
|
||||
/* turn off I-cache */
|
||||
icache_disable();
|
||||
dcache_disable();
|
||||
|
||||
/* flush I-cache */
|
||||
cache_flush();
|
||||
#ifdef CONFIG_ARM7_REVD
|
||||
/* go to high speed */
|
||||
IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
|
||||
#endif
|
||||
#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
|
||||
disable_interrupts ();
|
||||
/* Nothing more needed */
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No cleanup before linux for IntegratorAP/CM720T as yet */
|
||||
#else
|
||||
#error No cleanup_before_linux() defined for this CPU type
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
|
||||
/* flush I/D-cache */
|
||||
static void cache_flush (void)
|
||||
{
|
||||
unsigned long i = 0;
|
||||
|
||||
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
|
||||
}
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No specific cache setup for IntegratorAP/CM720T as yet */
|
||||
void icache_enable (void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,316 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <clps7111.h>
|
||||
#include <asm/proc-armv/ptrace.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#ifndef CONFIG_NETARM
|
||||
/* we always count down the max. */
|
||||
#define TIMER_LOAD_VAL 0xffff
|
||||
/* macro to read the 16 bit timer */
|
||||
#define READ_TIMER (IO_TC1D & 0xffff)
|
||||
|
||||
#ifdef CONFIG_LPC2292
|
||||
#undef READ_TIMER
|
||||
#define READ_TIMER (0xFFFFFFFF - GET32(T0TC))
|
||||
#endif
|
||||
|
||||
#else
|
||||
#define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE))
|
||||
#define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL))
|
||||
#define TM2STAT (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_STATUS))
|
||||
#define TIMER_LOAD_VAL NETARM_GEN_TSTAT_CTC_MASK
|
||||
#define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S3C4510B
|
||||
/* require interrupts for the S3C4510B */
|
||||
# ifndef CONFIG_USE_IRQ
|
||||
# error CONFIG_USE_IRQ _must_ be defined when using CONFIG_S3C4510B
|
||||
# else
|
||||
static struct _irq_handler IRQ_HANDLER[N_IRQS];
|
||||
# endif
|
||||
#endif /* CONFIG_S3C4510B */
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
void do_irq (struct pt_regs *pt_regs)
|
||||
{
|
||||
#if defined(CONFIG_S3C4510B)
|
||||
unsigned int pending;
|
||||
|
||||
while ( (pending = GET_REG( REG_INTOFFSET)) != 0x54) { /* sentinal value for no pending interrutps */
|
||||
IRQ_HANDLER[pending>>2].m_func( IRQ_HANDLER[pending>>2].m_data);
|
||||
|
||||
/* clear pending interrupt */
|
||||
PUT_REG( REG_INTPEND, (1<<(pending>>2)));
|
||||
}
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No do_irq() for IntegratorAP/CM720T as yet */
|
||||
#elif defined(CONFIG_LPC2292)
|
||||
|
||||
void (*pfnct)(void);
|
||||
|
||||
pfnct = (void (*)(void))VICVectAddr;
|
||||
|
||||
(*pfnct)();
|
||||
#else
|
||||
#error do_irq() not defined for this CPU type
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S3C4510B
|
||||
static void default_isr( void *data) {
|
||||
printf ("default_isr(): called for IRQ %d\n", (int)data);
|
||||
}
|
||||
|
||||
static void timer_isr( void *data) {
|
||||
unsigned int *pTime = (unsigned int *)data;
|
||||
|
||||
(*pTime)++;
|
||||
if ( !(*pTime % (CONFIG_SYS_HZ/4))) {
|
||||
/* toggle LED 0 */
|
||||
PUT_REG( REG_IOPDATA, GET_REG(REG_IOPDATA) ^ 0x1);
|
||||
}
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* Use IntegratorAP routines in board/integratorap.c */
|
||||
#else
|
||||
|
||||
static ulong timestamp;
|
||||
static ulong lastdec;
|
||||
|
||||
#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B)
|
||||
int arch_interrupt_init (void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* install default interrupt handlers */
|
||||
for ( i = 0; i < N_IRQS; i++) {
|
||||
IRQ_HANDLER[i].m_data = (void *)i;
|
||||
IRQ_HANDLER[i].m_func = default_isr;
|
||||
}
|
||||
|
||||
/* configure interrupts for IRQ mode */
|
||||
PUT_REG( REG_INTMODE, 0x0);
|
||||
/* clear any pending interrupts */
|
||||
PUT_REG( REG_INTPEND, 0x1FFFFF);
|
||||
|
||||
lastdec = 0;
|
||||
|
||||
/* install interrupt handler for timer */
|
||||
IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp;
|
||||
IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
int timer_init (void)
|
||||
{
|
||||
#if defined(CONFIG_NETARM)
|
||||
/* disable all interrupts */
|
||||
IRQEN = 0;
|
||||
|
||||
/* operate timer 2 in non-prescale mode */
|
||||
TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CONFIG_SYS_HZ) |
|
||||
NETARM_GEN_TCTL_ENABLE |
|
||||
NETARM_GEN_TCTL_INIT_COUNT(TIMER_LOAD_VAL));
|
||||
|
||||
/* set timer 2 counter */
|
||||
lastdec = TIMER_LOAD_VAL;
|
||||
#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
|
||||
/* disable all interrupts */
|
||||
IO_INTMR1 = 0;
|
||||
|
||||
/* operate timer 1 in prescale mode */
|
||||
IO_SYSCON1 |= SYSCON1_TC1M;
|
||||
|
||||
/* select 2kHz clock source for timer 1 */
|
||||
IO_SYSCON1 &= ~SYSCON1_TC1S;
|
||||
|
||||
/* set timer 1 counter */
|
||||
lastdec = IO_TC1D = TIMER_LOAD_VAL;
|
||||
#elif defined(CONFIG_S3C4510B)
|
||||
/* configure free running timer 0 */
|
||||
PUT_REG( REG_TMOD, 0x0);
|
||||
/* Stop timer 0 */
|
||||
CLR_REG( REG_TMOD, TM0_RUN);
|
||||
|
||||
/* Configure for interval mode */
|
||||
CLR_REG( REG_TMOD, TM1_TOGGLE);
|
||||
|
||||
/*
|
||||
* Load Timer data register with count down value.
|
||||
* count_down_val = CONFIG_SYS_SYS_CLK_FREQ/CONFIG_SYS_HZ
|
||||
*/
|
||||
PUT_REG( REG_TDATA0, (CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ));
|
||||
|
||||
/*
|
||||
* Enable global interrupt
|
||||
* Enable timer0 interrupt
|
||||
*/
|
||||
CLR_REG( REG_INTMASK, ((1<<INT_GLOBAL) | (1<<INT_TIMER0)));
|
||||
|
||||
/* Start timer */
|
||||
SET_REG( REG_TMOD, TM0_RUN);
|
||||
#elif defined(CONFIG_LPC2292)
|
||||
PUT32(T0IR, 0); /* disable all timer0 interrupts */
|
||||
PUT32(T0TCR, 0); /* disable timer0 */
|
||||
PUT32(T0PR, CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ);
|
||||
PUT32(T0MCR, 0);
|
||||
PUT32(T0TC, 0);
|
||||
PUT32(T0TCR, 1); /* enable timer0 */
|
||||
|
||||
#else
|
||||
#error No timer_init() defined for this CPU type
|
||||
#endif
|
||||
timestamp = 0;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
#endif /* ! IntegratorAP */
|
||||
|
||||
/*
|
||||
* timer without interrupts
|
||||
*/
|
||||
|
||||
|
||||
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292)
|
||||
|
||||
void reset_timer (void)
|
||||
{
|
||||
reset_timer_masked ();
|
||||
}
|
||||
|
||||
ulong get_timer (ulong base)
|
||||
{
|
||||
return get_timer_masked () - base;
|
||||
}
|
||||
|
||||
void set_timer (ulong t)
|
||||
{
|
||||
timestamp = t;
|
||||
}
|
||||
|
||||
void __udelay (unsigned long usec)
|
||||
{
|
||||
ulong tmo;
|
||||
|
||||
tmo = usec / 1000;
|
||||
tmo *= CONFIG_SYS_HZ;
|
||||
tmo /= 1000;
|
||||
|
||||
tmo += get_timer (0);
|
||||
|
||||
while (get_timer_masked () < tmo)
|
||||
#ifdef CONFIG_LPC2292
|
||||
/* GJ - not sure whether this is really needed or a misunderstanding */
|
||||
__asm__ __volatile__(" nop");
|
||||
#else
|
||||
/*NOP*/;
|
||||
#endif
|
||||
}
|
||||
|
||||
void reset_timer_masked (void)
|
||||
{
|
||||
/* reset time */
|
||||
lastdec = READ_TIMER;
|
||||
timestamp = 0;
|
||||
}
|
||||
|
||||
ulong get_timer_masked (void)
|
||||
{
|
||||
ulong now = READ_TIMER;
|
||||
|
||||
if (lastdec >= now) {
|
||||
/* normal mode */
|
||||
timestamp += lastdec - now;
|
||||
} else {
|
||||
/* we have an overflow ... */
|
||||
timestamp += lastdec + TIMER_LOAD_VAL - now;
|
||||
}
|
||||
lastdec = now;
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
void udelay_masked (unsigned long usec)
|
||||
{
|
||||
ulong tmo;
|
||||
ulong endtime;
|
||||
signed long diff;
|
||||
|
||||
if (usec >= 1000) {
|
||||
tmo = usec / 1000;
|
||||
tmo *= CONFIG_SYS_HZ;
|
||||
tmo /= 1000;
|
||||
} else {
|
||||
tmo = usec * CONFIG_SYS_HZ;
|
||||
tmo /= (1000*1000);
|
||||
}
|
||||
|
||||
endtime = get_timer_masked () + tmo;
|
||||
|
||||
do {
|
||||
ulong now = get_timer_masked ();
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_S3C4510B)
|
||||
|
||||
ulong get_timer (ulong base)
|
||||
{
|
||||
return timestamp - base;
|
||||
}
|
||||
|
||||
void __udelay (unsigned long usec)
|
||||
{
|
||||
u32 ticks;
|
||||
|
||||
ticks = (usec * CONFIG_SYS_HZ) / 1000000;
|
||||
|
||||
ticks += get_timer (0);
|
||||
|
||||
while (get_timer (0) < ticks)
|
||||
/*NOP*/;
|
||||
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No timer routines for IntegratorAP/CM720T as yet */
|
||||
#else
|
||||
#error Timer routines not defined for this CPU type
|
||||
#endif
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
#
|
||||
# (C) Copyright 2000-2007
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS = flash.o mmc.o mmc_hw.o spi.o
|
||||
SOBJS = $(obj)iap_entry.o
|
||||
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
|
||||
|
||||
# this MUST be compiled as thumb code!
|
||||
$(SOBJS):
|
||||
$(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,249 @@
|
|||
/*
|
||||
* (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
|
||||
*
|
||||
* Modified to remove all but the IAP-command related code by
|
||||
* Gary Jennejohn <garyj@denx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
/* IAP commands use 32 bytes at the top of CPU internal sram, we
|
||||
use 512 bytes below that */
|
||||
#define COPY_BUFFER_LOCATION 0x40003de0
|
||||
|
||||
#define IAP_LOCATION 0x7ffffff1
|
||||
#define IAP_CMD_PREPARE 50
|
||||
#define IAP_CMD_COPY 51
|
||||
#define IAP_CMD_ERASE 52
|
||||
#define IAP_CMD_CHECK 53
|
||||
#define IAP_CMD_ID 54
|
||||
#define IAP_CMD_VERSION 55
|
||||
#define IAP_CMD_COMPARE 56
|
||||
|
||||
#define IAP_RET_CMD_SUCCESS 0
|
||||
|
||||
static unsigned long command[5];
|
||||
static unsigned long result[2];
|
||||
|
||||
extern void iap_entry(unsigned long * command, unsigned long * result);
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
static int get_flash_sector(flash_info_t * info, ulong flash_addr)
|
||||
{
|
||||
int i;
|
||||
|
||||
for(i = 1; i < (info->sector_count); i++) {
|
||||
if (flash_addr < (info->start[i]))
|
||||
break;
|
||||
}
|
||||
|
||||
return (i-1);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* This function assumes that flash_addr is aligned on 512 bytes boundary
|
||||
* in flash. This function also assumes that prepare have been called
|
||||
* for the sector in question.
|
||||
*/
|
||||
int lpc2292_copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
|
||||
{
|
||||
int first_sector;
|
||||
int last_sector;
|
||||
|
||||
first_sector = get_flash_sector(info, flash_addr);
|
||||
last_sector = get_flash_sector(info, flash_addr + 512 - 1);
|
||||
|
||||
/* prepare sectors for write */
|
||||
command[0] = IAP_CMD_PREPARE;
|
||||
command[1] = first_sector;
|
||||
command[2] = last_sector;
|
||||
iap_entry(command, result);
|
||||
if (result[0] != IAP_RET_CMD_SUCCESS) {
|
||||
printf("IAP prepare failed\n");
|
||||
return ERR_PROG_ERROR;
|
||||
}
|
||||
|
||||
command[0] = IAP_CMD_COPY;
|
||||
command[1] = flash_addr;
|
||||
command[2] = COPY_BUFFER_LOCATION;
|
||||
command[3] = 512;
|
||||
command[4] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
|
||||
iap_entry(command, result);
|
||||
if (result[0] != IAP_RET_CMD_SUCCESS) {
|
||||
printf("IAP copy failed\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
int lpc2292_flash_erase (flash_info_t * info, int s_first, int s_last)
|
||||
{
|
||||
int flag;
|
||||
int prot;
|
||||
int sect;
|
||||
|
||||
prot = 0;
|
||||
for (sect = s_first; sect <= s_last; ++sect) {
|
||||
if (info->protect[sect]) {
|
||||
prot++;
|
||||
}
|
||||
}
|
||||
if (prot)
|
||||
return ERR_PROTECTED;
|
||||
|
||||
|
||||
flag = disable_interrupts();
|
||||
|
||||
printf ("Erasing %d sectors starting at sector %2d.\n"
|
||||
"This make take some time ... ",
|
||||
s_last - s_first + 1, s_first);
|
||||
|
||||
command[0] = IAP_CMD_PREPARE;
|
||||
command[1] = s_first;
|
||||
command[2] = s_last;
|
||||
iap_entry(command, result);
|
||||
if (result[0] != IAP_RET_CMD_SUCCESS) {
|
||||
printf("IAP prepare failed\n");
|
||||
return ERR_PROTECTED;
|
||||
}
|
||||
|
||||
command[0] = IAP_CMD_ERASE;
|
||||
command[1] = s_first;
|
||||
command[2] = s_last;
|
||||
command[3] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
|
||||
iap_entry(command, result);
|
||||
if (result[0] != IAP_RET_CMD_SUCCESS) {
|
||||
printf("IAP erase failed\n");
|
||||
return ERR_PROTECTED;
|
||||
}
|
||||
|
||||
if (flag)
|
||||
enable_interrupts();
|
||||
|
||||
return ERR_OK;
|
||||
}
|
||||
|
||||
int lpc2292_write_buff (flash_info_t * info, uchar * src, ulong addr,
|
||||
ulong cnt)
|
||||
{
|
||||
int first_copy_size;
|
||||
int last_copy_size;
|
||||
int first_block;
|
||||
int last_block;
|
||||
int nbr_mid_blocks;
|
||||
uchar memmap_value;
|
||||
ulong i;
|
||||
uchar* src_org;
|
||||
uchar* dst_org;
|
||||
int ret = ERR_OK;
|
||||
|
||||
src_org = src;
|
||||
dst_org = (uchar*)addr;
|
||||
|
||||
first_block = addr / 512;
|
||||
last_block = (addr + cnt) / 512;
|
||||
nbr_mid_blocks = last_block - first_block - 1;
|
||||
|
||||
first_copy_size = 512 - (addr % 512);
|
||||
last_copy_size = (addr + cnt) % 512;
|
||||
|
||||
debug("\ncopy first block: (1) %lX -> %lX 0x200 bytes, "
|
||||
"(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n",
|
||||
(ulong)(first_block * 512),
|
||||
(ulong)COPY_BUFFER_LOCATION,
|
||||
(ulong)src,
|
||||
(ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
|
||||
first_copy_size,
|
||||
(ulong)COPY_BUFFER_LOCATION,
|
||||
(ulong)(first_block * 512));
|
||||
|
||||
/* copy first block */
|
||||
memcpy((void*)COPY_BUFFER_LOCATION,
|
||||
(void*)(first_block * 512), 512);
|
||||
memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
|
||||
src, first_copy_size);
|
||||
lpc2292_copy_buffer_to_flash(info, first_block * 512);
|
||||
src += first_copy_size;
|
||||
addr += first_copy_size;
|
||||
|
||||
/* copy middle blocks */
|
||||
for (i = 0; i < nbr_mid_blocks; i++) {
|
||||
debug("copy middle block: %lX -> %lX 512 bytes, "
|
||||
"%lX -> %lX 512 bytes\n",
|
||||
(ulong)src,
|
||||
(ulong)COPY_BUFFER_LOCATION,
|
||||
(ulong)COPY_BUFFER_LOCATION,
|
||||
(ulong)addr);
|
||||
|
||||
memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
|
||||
lpc2292_copy_buffer_to_flash(info, addr);
|
||||
src += 512;
|
||||
addr += 512;
|
||||
}
|
||||
|
||||
|
||||
if (last_copy_size > 0) {
|
||||
debug("copy last block: (1) %lX -> %lX 0x200 bytes, "
|
||||
"(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n",
|
||||
(ulong)(last_block * 512),
|
||||
(ulong)COPY_BUFFER_LOCATION,
|
||||
(ulong)src,
|
||||
(ulong)(COPY_BUFFER_LOCATION),
|
||||
last_copy_size,
|
||||
(ulong)COPY_BUFFER_LOCATION,
|
||||
(ulong)addr);
|
||||
|
||||
/* copy last block */
|
||||
memcpy((void*)COPY_BUFFER_LOCATION,
|
||||
(void*)(last_block * 512), 512);
|
||||
memcpy((void*)COPY_BUFFER_LOCATION,
|
||||
src, last_copy_size);
|
||||
lpc2292_copy_buffer_to_flash(info, addr);
|
||||
}
|
||||
|
||||
/* verify write */
|
||||
memmap_value = GET8(MEMMAP);
|
||||
|
||||
disable_interrupts();
|
||||
|
||||
PUT8(MEMMAP, 01); /* we must make sure that initial 64
|
||||
bytes are taken from flash when we
|
||||
do the compare */
|
||||
|
||||
for (i = 0; i < cnt; i++) {
|
||||
if (*dst_org != *src_org){
|
||||
printf("Write failed. Byte %lX differs\n", i);
|
||||
ret = ERR_PROG_ERROR;
|
||||
break;
|
||||
}
|
||||
dst_org++;
|
||||
src_org++;
|
||||
}
|
||||
|
||||
PUT8(MEMMAP, memmap_value);
|
||||
enable_interrupts();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
IAP_ADDRESS: .word 0x7FFFFFF1
|
||||
|
||||
.globl iap_entry
|
||||
iap_entry:
|
||||
ldr r2, IAP_ADDRESS
|
||||
bx r2
|
||||
mov pc, lr
|
||||
|
|
@ -0,0 +1,131 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <mmc.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <part.h>
|
||||
#include <fat.h>
|
||||
#include "mmc_hw.h"
|
||||
#include <asm/arch/spi.h>
|
||||
|
||||
#ifdef CONFIG_MMC
|
||||
|
||||
#undef MMC_DEBUG
|
||||
|
||||
static block_dev_desc_t mmc_dev;
|
||||
|
||||
/* these are filled out by a call to mmc_hw_get_parameters */
|
||||
static int hw_size; /* in kbytes */
|
||||
static int hw_nr_sects;
|
||||
static int hw_sect_size; /* in bytes */
|
||||
|
||||
block_dev_desc_t * mmc_get_dev(int dev)
|
||||
{
|
||||
return (block_dev_desc_t *)(&mmc_dev);
|
||||
}
|
||||
|
||||
unsigned long mmc_block_read(int dev,
|
||||
unsigned long start,
|
||||
lbaint_t blkcnt,
|
||||
void *buffer)
|
||||
{
|
||||
unsigned long rc = 0;
|
||||
unsigned char *p = (unsigned char *)buffer;
|
||||
unsigned long i;
|
||||
unsigned long addr = start;
|
||||
|
||||
#ifdef MMC_DEBUG
|
||||
printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
|
||||
(unsigned long)blkcnt);
|
||||
#endif
|
||||
|
||||
for(i = 0; i < (unsigned long)blkcnt; i++) {
|
||||
#ifdef MMC_DEBUG
|
||||
printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p);
|
||||
#endif
|
||||
(void)mmc_read_sector(addr, p);
|
||||
rc++;
|
||||
addr++;
|
||||
p += hw_sect_size;
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------
|
||||
* Read hardware paramterers (sector size, size, number of sectors)
|
||||
*/
|
||||
static int mmc_hw_get_parameters(void)
|
||||
{
|
||||
unsigned char csddata[16];
|
||||
unsigned int sizemult;
|
||||
unsigned int size;
|
||||
|
||||
mmc_read_csd(csddata);
|
||||
hw_sect_size = 1<<(csddata[5] & 0x0f);
|
||||
size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0);
|
||||
sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1);
|
||||
hw_nr_sects = (size+1)*(1<<(sizemult+2));
|
||||
hw_size = hw_nr_sects*hw_sect_size/1024;
|
||||
|
||||
#ifdef MMC_DEBUG
|
||||
printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, "
|
||||
"hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mmc_legacy_init(int verbose)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
|
||||
if (verbose)
|
||||
printf("mmc_legacy_init\n");
|
||||
|
||||
spi_init();
|
||||
/* this meeds to be done twice */
|
||||
mmc_hw_init();
|
||||
udelay(1000);
|
||||
mmc_hw_init();
|
||||
|
||||
mmc_hw_get_parameters();
|
||||
|
||||
mmc_dev.if_type = IF_TYPE_MMC;
|
||||
mmc_dev.part_type = PART_TYPE_DOS;
|
||||
mmc_dev.dev = 0;
|
||||
mmc_dev.lun = 0;
|
||||
mmc_dev.type = 0;
|
||||
mmc_dev.blksz = hw_sect_size;
|
||||
mmc_dev.lba = hw_nr_sects;
|
||||
sprintf((char*)mmc_dev.vendor, "Unknown vendor");
|
||||
sprintf((char*)mmc_dev.product, "Unknown product");
|
||||
sprintf((char*)mmc_dev.revision, "N/A");
|
||||
mmc_dev.removable = 0; /* should be true??? */
|
||||
mmc_dev.block_read = mmc_block_read;
|
||||
|
||||
fat_register_device(&mmc_dev, 1);
|
||||
|
||||
ret = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_MMC */
|
||||
|
|
@ -0,0 +1,233 @@
|
|||
/*
|
||||
This code was original written by Ulrich Radig and modified by
|
||||
Embedded Artists AB (www.embeddedartists.com).
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/spi.h>
|
||||
|
||||
#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
|
||||
#define MMC_Disable() PUT32(IO1SET, 1l << 22)
|
||||
#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
|
||||
|
||||
static unsigned char Write_Command_MMC (unsigned char *CMD);
|
||||
static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
|
||||
unsigned short int Bytes);
|
||||
|
||||
/* initialize the hardware */
|
||||
int mmc_hw_init(void)
|
||||
{
|
||||
unsigned long a;
|
||||
unsigned short int Timeout = 0;
|
||||
unsigned char b;
|
||||
unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95};
|
||||
|
||||
/* set-up GPIO and SPI */
|
||||
(*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */
|
||||
(*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */
|
||||
|
||||
MMC_Disable();
|
||||
|
||||
spi_lock();
|
||||
spi_set_clock(248);
|
||||
spi_set_cfg(0, 1, 0);
|
||||
MMC_Enable();
|
||||
|
||||
/* waste some time */
|
||||
for(a=0; a < 20000; a++)
|
||||
asm("nop");
|
||||
|
||||
/* Put the MMC/SD-card into SPI-mode */
|
||||
for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */
|
||||
spi_write(0xff);
|
||||
|
||||
/* Sends command CMD0 to MMC/SD-card */
|
||||
while (Write_Command_MMC(CMD) != 1) {
|
||||
if (Timeout++ > 200) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return(1); /* Abort with command 1 (return 1) */
|
||||
}
|
||||
}
|
||||
/* Sends Command CMD1 an MMC/SD-card */
|
||||
Timeout = 0;
|
||||
CMD[0] = 0x41;/* Command 1 */
|
||||
CMD[5] = 0xFF;
|
||||
|
||||
while (Write_Command_MMC(CMD) != 0) {
|
||||
if (Timeout++ > 200) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return (2); /* Abort with command 2 (return 2) */
|
||||
}
|
||||
}
|
||||
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Sends a command to the MMC/SD-card
|
||||
######################################################################### */
|
||||
static unsigned char Write_Command_MMC (unsigned char *CMD)
|
||||
{
|
||||
unsigned char a, tmp = 0xff;
|
||||
unsigned short int Timeout = 0;
|
||||
|
||||
MMC_Disable();
|
||||
spi_write(0xFF);
|
||||
MMC_Enable();
|
||||
|
||||
for (a = 0; a < 0x06; a++)
|
||||
spi_write(*CMD++);
|
||||
|
||||
while (tmp == 0xff) {
|
||||
tmp = spi_read();
|
||||
if (Timeout++ > 5000)
|
||||
break;
|
||||
}
|
||||
|
||||
return (tmp);
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Routine to read the CID register from the MMC/SD-card (16 bytes)
|
||||
######################################################################### */
|
||||
void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
|
||||
int Bytes)
|
||||
{
|
||||
unsigned short int a;
|
||||
|
||||
spi_lock();
|
||||
mmc_spi_cfg();
|
||||
MMC_Enable();
|
||||
|
||||
if (Write_Command_MMC(CMD) != 0) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return;
|
||||
}
|
||||
|
||||
while (spi_read() != 0xfe) {};
|
||||
for (a = 0; a < Bytes; a++)
|
||||
*Buffer++ = spi_read();
|
||||
|
||||
/* Read the CRC-byte */
|
||||
spi_read(); /* CRC - byte is discarded */
|
||||
spi_read(); /* CRC - byte is discarded */
|
||||
/* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Routine to read a block (512 bytes) from the MMC/SD-card
|
||||
######################################################################### */
|
||||
unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
|
||||
{
|
||||
/* Command 16 to read aBlocks from the MMC/SD - caed */
|
||||
unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
|
||||
|
||||
/* The addres on the MMC/SD-card is in bytes,
|
||||
addr is transformed from blocks to bytes and the result is
|
||||
placed into the command */
|
||||
|
||||
addr = addr << 9; /* addr = addr * 512 */
|
||||
|
||||
CMD[1] = ((addr & 0xFF000000) >> 24);
|
||||
CMD[2] = ((addr & 0x00FF0000) >> 16);
|
||||
CMD[3] = ((addr & 0x0000FF00) >> 8 );
|
||||
|
||||
MMC_Read_Block(CMD, Buffer, 512);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* ############################################################################
|
||||
Routine to write a block (512 byte) to the MMC/SD-card
|
||||
######################################################################### */
|
||||
unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
|
||||
{
|
||||
unsigned char tmp, a;
|
||||
unsigned short int b;
|
||||
/* Command 24 to write a block to the MMC/SD - card */
|
||||
unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
|
||||
|
||||
/* The addres on the MMC/SD-card is in bytes,
|
||||
addr is transformed from blocks to bytes and the result is
|
||||
placed into the command */
|
||||
|
||||
addr = addr << 9; /* addr = addr * 512 */
|
||||
|
||||
CMD[1] = ((addr & 0xFF000000) >> 24);
|
||||
CMD[2] = ((addr & 0x00FF0000) >> 16);
|
||||
CMD[3] = ((addr & 0x0000FF00) >> 8 );
|
||||
|
||||
spi_lock();
|
||||
mmc_spi_cfg();
|
||||
MMC_Enable();
|
||||
|
||||
/* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */
|
||||
tmp = Write_Command_MMC(CMD);
|
||||
if (tmp != 0) {
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return(tmp);
|
||||
}
|
||||
|
||||
/* Do a short delay and send a clock-pulse to the MMC/SD-card */
|
||||
for (a = 0; a < 100; a++)
|
||||
spi_read();
|
||||
|
||||
/* Send a start byte to the MMC/SD-card */
|
||||
spi_write(0xFE);
|
||||
|
||||
/* Write the block (512 bytes) to the MMC/SD-card */
|
||||
for (b = 0; b < 512; b++)
|
||||
spi_write(*Buffer++);
|
||||
|
||||
/* write the CRC-Byte */
|
||||
spi_write(0xFF); /* write a dummy CRC */
|
||||
spi_write(0xFF); /* CRC code is not used */
|
||||
|
||||
/* Wait for MMC/SD-card busy */
|
||||
while (spi_read() != 0xff) {};
|
||||
|
||||
/* set MMC_Chip_Select to high (MMC/SD-card inactive) */
|
||||
MMC_Disable();
|
||||
spi_unlock();
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* #########################################################################
|
||||
Routine to read the CSD register from the MMC/SD-card (16 bytes)
|
||||
######################################################################### */
|
||||
unsigned char mmc_read_csd (unsigned char *Buffer)
|
||||
{
|
||||
/* Command to read the CSD register */
|
||||
unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF};
|
||||
|
||||
MMC_Read_Block(CMD, Buffer, 16);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
/*
|
||||
This module implements a linux character device driver for the 24c256 chip.
|
||||
Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _MMC_HW_
|
||||
#define _MMC_HW_
|
||||
|
||||
unsigned char mmc_read_csd(unsigned char *Buffer);
|
||||
unsigned char mmc_read_sector (unsigned long addr,
|
||||
unsigned char *Buffer);
|
||||
unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer);
|
||||
int mmc_hw_init(void);
|
||||
|
||||
#endif /* _MMC_HW_ */
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
This module implements an interface to the SPI on the lpc22xx.
|
||||
Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/spi.h>
|
||||
|
||||
unsigned long spi_flags;
|
||||
unsigned char spi_idle = 0x00;
|
||||
|
||||
int spi_init(void)
|
||||
{
|
||||
unsigned long pinsel0_value;
|
||||
|
||||
/* activate spi pins */
|
||||
pinsel0_value = GET32(PINSEL0);
|
||||
pinsel0_value &= ~(0xFFl << 8);
|
||||
pinsel0_value |= (0x55l << 8);
|
||||
PUT32(PINSEL0, pinsel0_value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
#
|
||||
# (C) Copyright 2000-2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS-y += cache.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
void icache_enable (void)
|
||||
{
|
||||
s32 i;
|
||||
|
||||
/* disable all cache bits */
|
||||
CLR_REG( REG_SYSCFG, 0x3F);
|
||||
|
||||
/* 8KB cache, write enable */
|
||||
SET_REG( REG_SYSCFG, CACHE_WRITE_BUFF | CACHE_MODE_01);
|
||||
|
||||
/* clear TAG RAM bits */
|
||||
for ( i = 0; i < 256; i++)
|
||||
PUT_REG( CACHE_TAG_RAM + 4*i, 0x00000000);
|
||||
|
||||
/* clear SET0 RAM */
|
||||
for(i=0; i < 1024; i++)
|
||||
PUT_REG( CACHE_SET0_RAM + 4*i, 0x00000000);
|
||||
|
||||
/* clear SET1 RAM */
|
||||
for(i=0; i < 1024; i++)
|
||||
PUT_REG( CACHE_SET1_RAM + 4*i, 0x00000000);
|
||||
|
||||
/* enable cache */
|
||||
SET_REG( REG_SYSCFG, CACHE_ENABLE);
|
||||
|
||||
}
|
||||
|
||||
void icache_disable (void)
|
||||
{
|
||||
/* disable all cache bits */
|
||||
CLR_REG( REG_SYSCFG, 0x3F);
|
||||
}
|
||||
|
||||
int icache_status (void)
|
||||
{
|
||||
return GET_REG( REG_SYSCFG) & CACHE_ENABLE;
|
||||
}
|
||||
|
||||
void dcache_enable (void)
|
||||
{
|
||||
/* we don't have seperate instruction/data caches */
|
||||
icache_enable();
|
||||
}
|
||||
|
||||
void dcache_disable (void)
|
||||
{
|
||||
/* we don't have seperate instruction/data caches */
|
||||
icache_disable();
|
||||
}
|
||||
|
||||
int dcache_status (void)
|
||||
{
|
||||
/* we don't have seperate instruction/data caches */
|
||||
return icache_status();
|
||||
}
|
||||
|
|
@ -0,0 +1,681 @@
|
|||
/*
|
||||
* armboot - Startup Code for ARM720 CPU-core
|
||||
*
|
||||
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <asm-offsets.h>
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Jump vector table as in table 3.1 in [1]
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
.globl _start
|
||||
_start: b reset
|
||||
ldr pc, _undefined_instruction
|
||||
ldr pc, _software_interrupt
|
||||
ldr pc, _prefetch_abort
|
||||
ldr pc, _data_abort
|
||||
#ifdef CONFIG_LPC2292
|
||||
.word 0xB4405F76 /* 2's complement of the checksum of the vectors */
|
||||
#else
|
||||
ldr pc, _not_used
|
||||
#endif
|
||||
ldr pc, _irq
|
||||
ldr pc, _fiq
|
||||
|
||||
_undefined_instruction: .word undefined_instruction
|
||||
_software_interrupt: .word software_interrupt
|
||||
_prefetch_abort: .word prefetch_abort
|
||||
_data_abort: .word data_abort
|
||||
_not_used: .word not_used
|
||||
_irq: .word irq
|
||||
_fiq: .word fiq
|
||||
|
||||
.balignl 16,0xdeadbeef
|
||||
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Startup Code (reset vector)
|
||||
*
|
||||
* do important init only if we don't start from RAM!
|
||||
* relocate armboot to ram
|
||||
* setup stack
|
||||
* jump to second stage
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
.globl _TEXT_BASE
|
||||
_TEXT_BASE:
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
|
||||
/*
|
||||
* These are defined in the board-specific linker script.
|
||||
* Subtracting _start from them lets the linker put their
|
||||
* relative position in the executable instead of leaving
|
||||
* them null.
|
||||
*/
|
||||
.globl _bss_start_ofs
|
||||
_bss_start_ofs:
|
||||
.word __bss_start - _start
|
||||
|
||||
.globl _bss_end_ofs
|
||||
_bss_end_ofs:
|
||||
.word __bss_end__ - _start
|
||||
|
||||
.globl _end_ofs
|
||||
_end_ofs:
|
||||
.word _end - _start
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl IRQ_STACK_START
|
||||
IRQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) */
|
||||
.globl FIQ_STACK_START
|
||||
FIQ_STACK_START:
|
||||
.word 0x0badc0de
|
||||
#endif
|
||||
|
||||
/* IRQ stack memory (calculated at run-time) + 8 bytes */
|
||||
.globl IRQ_STACK_START_IN
|
||||
IRQ_STACK_START_IN:
|
||||
.word 0x0badc0de
|
||||
|
||||
/*
|
||||
* the actual reset code
|
||||
*/
|
||||
|
||||
reset:
|
||||
/*
|
||||
* set the cpu to SVC32 mode
|
||||
*/
|
||||
mrs r0,cpsr
|
||||
bic r0,r0,#0x1f
|
||||
orr r0,r0,#0xd3
|
||||
msr cpsr,r0
|
||||
|
||||
/*
|
||||
* we do sys-critical inits only at reboot,
|
||||
* not when booting from ram!
|
||||
*/
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
bl cpu_init_crit
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LPC2292
|
||||
bl lowlevel_init
|
||||
#endif
|
||||
|
||||
/* Set stackpointer in internal RAM to call board_init_f */
|
||||
call_board_init_f:
|
||||
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
|
||||
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
|
||||
ldr r0,=0x00000000
|
||||
bl board_init_f
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* void relocate_code (addr_sp, gd, addr_moni)
|
||||
*
|
||||
* This "function" does not return, instead it continues in RAM
|
||||
* after relocating the monitor code.
|
||||
*
|
||||
*/
|
||||
.globl relocate_code
|
||||
relocate_code:
|
||||
mov r4, r0 /* save addr_sp */
|
||||
mov r5, r1 /* save addr of gd */
|
||||
mov r6, r2 /* save addr of destination */
|
||||
|
||||
/* Set up the stack */
|
||||
stack_setup:
|
||||
mov sp, r4
|
||||
|
||||
adr r0, _start
|
||||
cmp r0, r6
|
||||
beq clear_bss /* skip relocation */
|
||||
mov r1, r6 /* r1 <- scratch for copy_loop */
|
||||
ldr r3, _bss_start_ofs
|
||||
add r2, r0, r3 /* r2 <- source end address */
|
||||
|
||||
copy_loop:
|
||||
ldmia r0!, {r9-r10} /* copy from source address [r0] */
|
||||
stmia r1!, {r9-r10} /* copy to target address [r1] */
|
||||
cmp r0, r2 /* until source end address [r2] */
|
||||
blo copy_loop
|
||||
|
||||
#ifndef CONFIG_PRELOADER
|
||||
/*
|
||||
* fix .rel.dyn relocations
|
||||
*/
|
||||
ldr r0, _TEXT_BASE /* r0 <- Text base */
|
||||
sub r9, r6, r0 /* r9 <- relocation offset */
|
||||
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
|
||||
add r10, r10, r0 /* r10 <- sym table in FLASH */
|
||||
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
|
||||
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
|
||||
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
|
||||
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
|
||||
fixloop:
|
||||
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
|
||||
add r0, r0, r9 /* r0 <- location to fix up in RAM */
|
||||
ldr r1, [r2, #4]
|
||||
and r7, r1, #0xff
|
||||
cmp r7, #23 /* relative fixup? */
|
||||
beq fixrel
|
||||
cmp r7, #2 /* absolute fixup? */
|
||||
beq fixabs
|
||||
/* ignore unknown type of fixup */
|
||||
b fixnext
|
||||
fixabs:
|
||||
/* absolute fix: set location to (offset) symbol value */
|
||||
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
|
||||
add r1, r10, r1 /* r1 <- address of symbol in table */
|
||||
ldr r1, [r1, #4] /* r1 <- symbol value */
|
||||
add r1, r1, r9 /* r1 <- relocated sym addr */
|
||||
b fixnext
|
||||
fixrel:
|
||||
/* relative fix: increase location by offset */
|
||||
ldr r1, [r0]
|
||||
add r1, r1, r9
|
||||
fixnext:
|
||||
str r1, [r0]
|
||||
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
|
||||
cmp r2, r3
|
||||
blo fixloop
|
||||
#endif
|
||||
|
||||
clear_bss:
|
||||
#ifndef CONFIG_PRELOADER
|
||||
ldr r0, _bss_start_ofs
|
||||
ldr r1, _bss_end_ofs
|
||||
mov r4, r6 /* reloc addr */
|
||||
add r0, r0, r4
|
||||
add r1, r1, r4
|
||||
mov r2, #0x00000000 /* clear */
|
||||
|
||||
clbss_l:str r2, [r0] /* clear loop... */
|
||||
add r0, r0, #4
|
||||
cmp r0, r1
|
||||
bne clbss_l
|
||||
|
||||
bl coloured_LED_init
|
||||
bl red_LED_on
|
||||
#endif
|
||||
|
||||
/*
|
||||
* We are done. Do not return, instead branch to second part of board
|
||||
* initialization, now running from RAM.
|
||||
*/
|
||||
ldr r0, _board_init_r_ofs
|
||||
adr r1, _start
|
||||
add lr, r0, r1
|
||||
add lr, lr, r9
|
||||
/* setup parameters for board_init_r */
|
||||
mov r0, r5 /* gd_t */
|
||||
mov r1, r6 /* dest_addr */
|
||||
/* jump to it ... */
|
||||
mov pc, lr
|
||||
|
||||
_board_init_r_ofs:
|
||||
.word board_init_r - _start
|
||||
|
||||
_rel_dyn_start_ofs:
|
||||
.word __rel_dyn_start - _start
|
||||
_rel_dyn_end_ofs:
|
||||
.word __rel_dyn_end - _start
|
||||
_dynsym_start_ofs:
|
||||
.word __dynsym_start - _start
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* CPU_init_critical registers
|
||||
*
|
||||
* setup important registers
|
||||
* setup memory timing
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
|
||||
|
||||
/* Interupt-Controller base addresses */
|
||||
INTMR1: .word 0x80000280 @ 32 bit size
|
||||
INTMR2: .word 0x80001280 @ 16 bit size
|
||||
INTMR3: .word 0x80002280 @ 8 bit size
|
||||
|
||||
/* SYSCONs */
|
||||
SYSCON1: .word 0x80000100
|
||||
SYSCON2: .word 0x80001100
|
||||
SYSCON3: .word 0x80002200
|
||||
|
||||
#define CLKCTL 0x6 /* mask */
|
||||
#define CLKCTL_18 0x0 /* 18.432 MHz */
|
||||
#define CLKCTL_36 0x2 /* 36.864 MHz */
|
||||
#define CLKCTL_49 0x4 /* 49.152 MHz */
|
||||
#define CLKCTL_73 0x6 /* 73.728 MHz */
|
||||
|
||||
#elif defined(CONFIG_LPC2292)
|
||||
PLLCFG_ADR: .word PLLCFG
|
||||
PLLFEED_ADR: .word PLLFEED
|
||||
PLLCON_ADR: .word PLLCON
|
||||
PLLSTAT_ADR: .word PLLSTAT
|
||||
VPBDIV_ADR: .word VPBDIV
|
||||
MEMMAP_ADR: .word MEMMAP
|
||||
|
||||
#endif
|
||||
|
||||
cpu_init_crit:
|
||||
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
|
||||
|
||||
/*
|
||||
* mask all IRQs by clearing all bits in the INTMRs
|
||||
*/
|
||||
mov r1, #0x00
|
||||
ldr r0, INTMR1
|
||||
str r1, [r0]
|
||||
ldr r0, INTMR2
|
||||
str r1, [r0]
|
||||
ldr r0, INTMR3
|
||||
str r1, [r0]
|
||||
|
||||
/*
|
||||
* flush v4 I/D caches
|
||||
*/
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
|
||||
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
|
||||
|
||||
/*
|
||||
* disable MMU stuff and caches
|
||||
*/
|
||||
mrc p15,0,r0,c1,c0
|
||||
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
|
||||
bic r0, r0, #0x0000008f @ clear bits 7, 3:0 (B--- WCAM)
|
||||
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
|
||||
mcr p15,0,r0,c1,c0
|
||||
#elif defined(CONFIG_NETARM)
|
||||
/*
|
||||
* prior to software reset : need to set pin PORTC4 to be *HRESET
|
||||
*/
|
||||
ldr r0, =NETARM_GEN_MODULE_BASE
|
||||
ldr r1, =(NETARM_GEN_PORT_MODE(0x10) | \
|
||||
NETARM_GEN_PORT_DIR(0x10))
|
||||
str r1, [r0, #+NETARM_GEN_PORTC]
|
||||
/*
|
||||
* software reset : see HW Ref. Guide 8.2.4 : Software Service register
|
||||
* for an explanation of this process
|
||||
*/
|
||||
ldr r0, =NETARM_GEN_MODULE_BASE
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETA
|
||||
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETB
|
||||
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETA
|
||||
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETB
|
||||
str r1, [r0, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
/*
|
||||
* setup PLL and System Config
|
||||
*/
|
||||
ldr r0, =NETARM_GEN_MODULE_BASE
|
||||
|
||||
ldr r1, =( NETARM_GEN_SYS_CFG_LENDIAN | \
|
||||
NETARM_GEN_SYS_CFG_BUSFULL | \
|
||||
NETARM_GEN_SYS_CFG_USER_EN | \
|
||||
NETARM_GEN_SYS_CFG_ALIGN_ABORT | \
|
||||
NETARM_GEN_SYS_CFG_BUSARB_INT | \
|
||||
NETARM_GEN_SYS_CFG_BUSMON_EN )
|
||||
|
||||
str r1, [r0, #+NETARM_GEN_SYSTEM_CONTROL]
|
||||
|
||||
#ifndef CONFIG_NETARM_PLL_BYPASS
|
||||
ldr r1, =( NETARM_GEN_PLL_CTL_PLLCNT(NETARM_PLL_COUNT_VAL) | \
|
||||
NETARM_GEN_PLL_CTL_POLTST_DEF | \
|
||||
NETARM_GEN_PLL_CTL_INDIV(1) | \
|
||||
NETARM_GEN_PLL_CTL_ICP_DEF | \
|
||||
NETARM_GEN_PLL_CTL_OUTDIV(2) )
|
||||
str r1, [r0, #+NETARM_GEN_PLL_CONTROL]
|
||||
#endif
|
||||
|
||||
/*
|
||||
* mask all IRQs by clearing all bits in the INTMRs
|
||||
*/
|
||||
mov r1, #0
|
||||
ldr r0, =NETARM_GEN_MODULE_BASE
|
||||
str r1, [r0, #+NETARM_GEN_INTR_ENABLE]
|
||||
|
||||
#elif defined(CONFIG_S3C4510B)
|
||||
|
||||
/*
|
||||
* Mask off all IRQ sources
|
||||
*/
|
||||
ldr r1, =REG_INTMASK
|
||||
ldr r0, =0x3FFFFF
|
||||
str r0, [r1]
|
||||
|
||||
/*
|
||||
* Disable Cache
|
||||
*/
|
||||
ldr r0, =REG_SYSCFG
|
||||
ldr r1, =0x83ffffa0 /* cache-disabled */
|
||||
str r1, [r0]
|
||||
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No specific initialisation for IntegratorAP/CM720T as yet */
|
||||
#elif defined(CONFIG_LPC2292)
|
||||
/* Set-up PLL */
|
||||
mov r3, #0xAA
|
||||
mov r4, #0x55
|
||||
/* First disconnect and disable the PLL */
|
||||
ldr r0, PLLCON_ADR
|
||||
mov r1, #0x00
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Set new M and P values */
|
||||
ldr r0, PLLCFG_ADR
|
||||
mov r1, #0x23 /* M=4 and P=2 */
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Then enable the PLL */
|
||||
ldr r0, PLLCON_ADR
|
||||
mov r1, #0x01 /* PLL enable bit */
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Wait for the lock */
|
||||
ldr r0, PLLSTAT_ADR
|
||||
mov r1, #0x400 /* lock bit */
|
||||
lock_loop:
|
||||
ldr r2, [r0]
|
||||
and r2, r1, r2
|
||||
cmp r2, #0
|
||||
beq lock_loop
|
||||
/* And finally connect the PLL */
|
||||
ldr r0, PLLCON_ADR
|
||||
mov r1, #0x03 /* PLL enable bit and connect bit */
|
||||
str r1, [r0]
|
||||
ldr r0, PLLFEED_ADR /* start feed sequence */
|
||||
str r3, [r0]
|
||||
str r4, [r0] /* feed sequence done */
|
||||
/* Set-up VPBDIV register */
|
||||
ldr r0, VPBDIV_ADR
|
||||
mov r1, #0x01 /* VPB clock is same as process clock */
|
||||
str r1, [r0]
|
||||
#else
|
||||
#error No cpu_init_crit() defined for current CPU type
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM7_REVD
|
||||
/* set clock speed */
|
||||
/* !!! we run @ 36 MHz due to a hardware flaw in Rev. D processors */
|
||||
/* !!! not doing DRAM refresh properly! */
|
||||
ldr r0, SYSCON3
|
||||
ldr r1, [r0]
|
||||
bic r1, r1, #CLKCTL
|
||||
orr r1, r1, #CLKCTL_36
|
||||
str r1, [r0]
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_LPC2292
|
||||
mov ip, lr
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependent, you will
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
bl lowlevel_init
|
||||
mov lr, ip
|
||||
#endif
|
||||
|
||||
mov pc, lr
|
||||
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
*
|
||||
* Interrupt handling
|
||||
*
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
@
|
||||
@ IRQ stack frame.
|
||||
@
|
||||
#define S_FRAME_SIZE 72
|
||||
|
||||
#define S_OLD_R0 68
|
||||
#define S_PSR 64
|
||||
#define S_PC 60
|
||||
#define S_LR 56
|
||||
#define S_SP 52
|
||||
|
||||
#define S_IP 48
|
||||
#define S_FP 44
|
||||
#define S_R10 40
|
||||
#define S_R9 36
|
||||
#define S_R8 32
|
||||
#define S_R7 28
|
||||
#define S_R6 24
|
||||
#define S_R5 20
|
||||
#define S_R4 16
|
||||
#define S_R3 12
|
||||
#define S_R2 8
|
||||
#define S_R1 4
|
||||
#define S_R0 0
|
||||
|
||||
#define MODE_SVC 0x13
|
||||
#define I_BIT 0x80
|
||||
|
||||
/*
|
||||
* use bad_save_user_regs for abort/prefetch/undef/swi ...
|
||||
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
|
||||
*/
|
||||
|
||||
.macro bad_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||
add r8, sp, #S_PC
|
||||
|
||||
ldr r2, IRQ_STACK_START_IN
|
||||
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
|
||||
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
|
||||
|
||||
add r5, sp, #S_SP
|
||||
mov r1, lr
|
||||
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro irq_save_user_regs
|
||||
sub sp, sp, #S_FRAME_SIZE
|
||||
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||
add r8, sp, #S_PC
|
||||
stmdb r8, {sp, lr}^ @ Calling SP, LR
|
||||
str lr, [r8, #0] @ Save calling PC
|
||||
mrs r6, spsr
|
||||
str r6, [r8, #4] @ Save CPSR
|
||||
str r0, [r8, #8] @ Save OLD_R0
|
||||
mov r0, sp
|
||||
.endm
|
||||
|
||||
.macro irq_restore_user_regs
|
||||
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
|
||||
mov r0, r0
|
||||
ldr lr, [sp, #S_PC] @ Get PC
|
||||
add sp, sp, #S_FRAME_SIZE
|
||||
subs pc, lr, #4 @ return & move spsr_svc into cpsr
|
||||
.endm
|
||||
|
||||
.macro get_bad_stack
|
||||
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
|
||||
|
||||
str lr, [r13] @ save caller lr / spsr
|
||||
mrs lr, spsr
|
||||
str lr, [r13, #4]
|
||||
|
||||
mov r13, #MODE_SVC @ prepare SVC-Mode
|
||||
msr spsr_c, r13
|
||||
mov lr, pc
|
||||
movs pc, lr
|
||||
.endm
|
||||
|
||||
.macro get_irq_stack @ setup IRQ stack
|
||||
ldr sp, IRQ_STACK_START
|
||||
.endm
|
||||
|
||||
.macro get_fiq_stack @ setup FIQ stack
|
||||
ldr sp, FIQ_STACK_START
|
||||
.endm
|
||||
|
||||
/*
|
||||
* exception handlers
|
||||
*/
|
||||
.align 5
|
||||
undefined_instruction:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_undefined_instruction
|
||||
|
||||
.align 5
|
||||
software_interrupt:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_software_interrupt
|
||||
|
||||
.align 5
|
||||
prefetch_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_prefetch_abort
|
||||
|
||||
.align 5
|
||||
data_abort:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_data_abort
|
||||
|
||||
.align 5
|
||||
not_used:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_not_used
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_irq_stack
|
||||
irq_save_user_regs
|
||||
bl do_irq
|
||||
irq_restore_user_regs
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_fiq_stack
|
||||
/* someone ought to write a more effiction fiq_save_user_regs */
|
||||
irq_save_user_regs
|
||||
bl do_fiq
|
||||
irq_restore_user_regs
|
||||
|
||||
#else
|
||||
|
||||
.align 5
|
||||
irq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_irq
|
||||
|
||||
.align 5
|
||||
fiq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_fiq
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
|
||||
.align 5
|
||||
.globl reset_cpu
|
||||
reset_cpu:
|
||||
mov ip, #0
|
||||
mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
|
||||
mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
|
||||
mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
|
||||
bic ip, ip, #0x000f @ ............wcam
|
||||
bic ip, ip, #0x2100 @ ..v....s........
|
||||
mcr p15, 0, ip, c1, c0, 0 @ ctrl register
|
||||
mov pc, r0
|
||||
#elif defined(CONFIG_NETARM)
|
||||
.align 5
|
||||
.globl reset_cpu
|
||||
reset_cpu:
|
||||
ldr r1, =NETARM_MEM_MODULE_BASE
|
||||
ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
|
||||
ldr r1, =0xFFFFF000
|
||||
and r0, r1, r0
|
||||
ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE)
|
||||
add r0, r1, r0
|
||||
ldr r4, =NETARM_GEN_MODULE_BASE
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETA
|
||||
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETB
|
||||
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETA
|
||||
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
ldr r1, =NETARM_GEN_SW_SVC_RESETB
|
||||
str r1, [r4, #+NETARM_GEN_SOFTWARE_SERVICE]
|
||||
mov pc, r0
|
||||
#elif defined(CONFIG_S3C4510B)
|
||||
/* Nothing done here as reseting the CPU is board specific, depending
|
||||
* on external peripherals such as watchdog timers, etc. */
|
||||
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
|
||||
/* No specific reset actions for IntegratorAP/CM720T as yet */
|
||||
#elif defined(CONFIG_LPC2292)
|
||||
.align 5
|
||||
.globl reset_cpu
|
||||
reset_cpu:
|
||||
mov pc, r0
|
||||
#else
|
||||
#error No reset_cpu() defined for current CPU type
|
||||
#endif
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
* (C) Copyright 2000-2004
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
arch/arm/cpu/arm720t/start.o (.text)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.rel.dyn : {
|
||||
__rel_dyn_start = .;
|
||||
*(.rel*)
|
||||
__rel_dyn_end = .;
|
||||
}
|
||||
|
||||
.dynsym : {
|
||||
__dynsym_start = .;
|
||||
*(.dynsym)
|
||||
}
|
||||
|
||||
_end = .;
|
||||
|
||||
.bss __rel_dyn_start (OVERLAY) : {
|
||||
__bss_start = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
}
|
||||
|
||||
/DISCARD/ : { *(.dynstr*) }
|
||||
/DISCARD/ : { *(.dynamic*) }
|
||||
/DISCARD/ : { *(.plt*) }
|
||||
/DISCARD/ : { *(.interp*) }
|
||||
/DISCARD/ : { *(.gnu*) }
|
||||
}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(CPU).o
|
||||
|
||||
START = start.o
|
||||
|
||||
COBJS-y += cpu.o
|
||||
COBJS-$(CONFIG_USE_IRQ) += interrupts.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS += reset.o
|
||||
COBJS += timer.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* (C) Copyright 2009 Faraday Technology
|
||||
* Po-Yu Chuang <ratbert@faraday-tech.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
.global reset_cpu
|
||||
reset_cpu:
|
||||
b reset_cpu
|
||||
|
|
@ -0,0 +1,176 @@
|
|||
/*
|
||||
* (C) Copyright 2009 Faraday Technology
|
||||
* Po-Yu Chuang <ratbert@faraday-tech.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <faraday/ftpmu010.h>
|
||||
#include <faraday/fttmr010.h>
|
||||
|
||||
static ulong timestamp;
|
||||
static ulong lastdec;
|
||||
|
||||
static struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
|
||||
|
||||
#define TIMER_CLOCK 32768
|
||||
#define TIMER_LOAD_VAL 0xffffffff
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
unsigned int cr;
|
||||
|
||||
debug("%s()\n", __func__);
|
||||
|
||||
/* disable timers */
|
||||
writel(0, &tmr->cr);
|
||||
|
||||
/* use 32768Hz oscillator for RTC, WDT, TIMER */
|
||||
ftpmu010_32768osc_enable();
|
||||
|
||||
/* setup timer */
|
||||
writel(TIMER_LOAD_VAL, &tmr->timer3_load);
|
||||
writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
|
||||
writel(0, &tmr->timer3_match1);
|
||||
writel(0, &tmr->timer3_match2);
|
||||
|
||||
/* we don't want timer to issue interrupts */
|
||||
writel(FTTMR010_TM3_MATCH1 |
|
||||
FTTMR010_TM3_MATCH2 |
|
||||
FTTMR010_TM3_OVERFLOW,
|
||||
&tmr->interrupt_mask);
|
||||
|
||||
cr = readl(&tmr->cr);
|
||||
cr |= FTTMR010_TM3_CLOCK; /* use external clock */
|
||||
cr |= FTTMR010_TM3_ENABLE;
|
||||
writel(cr, &tmr->cr);
|
||||
|
||||
/* init the timestamp and lastdec value */
|
||||
reset_timer_masked();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* timer without interrupts
|
||||
*/
|
||||
|
||||
/*
|
||||
* reset time
|
||||
*/
|
||||
void reset_timer_masked(void)
|
||||
{
|
||||
/* capure current decrementer value time */
|
||||
lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
|
||||
timestamp = 0; /* start "advancing" time stamp from 0 */
|
||||
|
||||
debug("%s(): lastdec = %lx\n", __func__, lastdec);
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
debug("%s()\n", __func__);
|
||||
reset_timer_masked();
|
||||
}
|
||||
|
||||
/*
|
||||
* return timer ticks
|
||||
*/
|
||||
ulong get_timer_masked(void)
|
||||
{
|
||||
/* current tick value */
|
||||
ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
|
||||
|
||||
debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
|
||||
|
||||
if (lastdec >= now) {
|
||||
/*
|
||||
* normal mode (non roll)
|
||||
* move stamp fordward with absoulte diff ticks
|
||||
*/
|
||||
timestamp += lastdec - now;
|
||||
} else {
|
||||
/*
|
||||
* we have overflow of the count down timer
|
||||
*
|
||||
* nts = ts + ld + (TLV - now)
|
||||
* ts=old stamp, ld=time that passed before passing through -1
|
||||
* (TLV-now) amount of time after passing though -1
|
||||
* nts = new "advancing time stamp"...it could also roll and
|
||||
* cause problems.
|
||||
*/
|
||||
timestamp += lastdec + TIMER_LOAD_VAL - now;
|
||||
}
|
||||
|
||||
lastdec = now;
|
||||
|
||||
debug("%s() returns %lx\n", __func__, timestamp);
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
/*
|
||||
* return difference between timer ticks and base
|
||||
*/
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
debug("%s(%lx)\n", __func__, base);
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
void set_timer(ulong t)
|
||||
{
|
||||
debug("%s(%lx)\n", __func__, t);
|
||||
timestamp = t;
|
||||
}
|
||||
|
||||
/* delay x useconds AND preserve advance timestamp value */
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
|
||||
unsigned long now, last = readl(&tmr->timer3_counter);
|
||||
|
||||
debug("%s(%lu)\n", __func__, usec);
|
||||
while (tmo > 0) {
|
||||
now = readl(&tmr->timer3_counter);
|
||||
if (now > last) /* count down timer overflow */
|
||||
tmo -= TIMER_LOAD_VAL + last - now;
|
||||
else
|
||||
tmo -= last - now;
|
||||
last = now;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (read timebase as long long).
|
||||
* On ARM it just returns the timer value.
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
debug("%s()\n", __func__);
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
debug("%s()\n", __func__);
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS += lowlevel_init.o
|
||||
COBJS += reset.o
|
||||
COBJS += timer.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,168 @@
|
|||
/*
|
||||
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
|
||||
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
|
||||
*
|
||||
* Modified for the at91rm9200dk board by
|
||||
* (C) Copyright 2004
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/at91_mc.h>
|
||||
#include <asm/arch/at91_pmc.h>
|
||||
#include <asm/arch/at91_pio.h>
|
||||
|
||||
#define ARM920T_CONTROL 0xC0000000 /* @ set bit 31 (iA) and 30 (nF) */
|
||||
|
||||
_MTEXT_BASE:
|
||||
#undef START_FROM_MEM
|
||||
#ifdef START_FROM_MEM
|
||||
.word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
|
||||
#else
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
#endif
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
ldr r1, =AT91_ASM_PMC_MOR
|
||||
/* Main oscillator Enable register */
|
||||
#ifdef CONFIG_SYS_USE_MAIN_OSCILLATOR
|
||||
ldr r0, =0x0000FF01 /* Enable main oscillator */
|
||||
#else
|
||||
ldr r0, =0x0000FF00 /* Disable main oscillator */
|
||||
#endif
|
||||
str r0, [r1] /*AT91C_CKGR_MOR] */
|
||||
/* Add loop to compensate Main Oscillator startup time */
|
||||
ldr r0, =0x00000010
|
||||
LoopOsc:
|
||||
subs r0, r0, #1
|
||||
bhi LoopOsc
|
||||
|
||||
/* memory control configuration */
|
||||
/* this isn't very elegant, but what the heck */
|
||||
ldr r0, =SMRDATA
|
||||
ldr r1, _MTEXT_BASE
|
||||
sub r0, r0, r1
|
||||
ldr r2, =SMRDATAE
|
||||
sub r2, r2, r1
|
||||
pllloop:
|
||||
/* the address */
|
||||
ldr r1, [r0], #4
|
||||
/* the value */
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1]
|
||||
cmp r2, r0
|
||||
bne pllloop
|
||||
/* delay - this is all done by guess */
|
||||
ldr r0, =0x00010000
|
||||
/* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
|
||||
lock:
|
||||
subs r0, r0, #1
|
||||
bhi lock
|
||||
ldr r0, =SMRDATA1
|
||||
ldr r1, _MTEXT_BASE
|
||||
sub r0, r0, r1
|
||||
ldr r2, =SMRDATA1E
|
||||
sub r2, r2, r1
|
||||
sdinit:
|
||||
/* the address */
|
||||
ldr r1, [r0], #4
|
||||
/* the value */
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1]
|
||||
cmp r2, r0
|
||||
bne sdinit
|
||||
|
||||
/* switch from FastBus to Asynchronous clock mode */
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #ARM920T_CONTROL
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
/* everything is fine now */
|
||||
mov pc, lr
|
||||
|
||||
.ltorg
|
||||
|
||||
SMRDATA:
|
||||
.word AT91_ASM_MC_EBI_CFG
|
||||
.word CONFIG_SYS_EBI_CFGR_VAL
|
||||
.word AT91_ASM_MC_SMC_CSR0
|
||||
.word CONFIG_SYS_SMC_CSR0_VAL
|
||||
.word AT91_ASM_PMC_PLLAR
|
||||
.word CONFIG_SYS_PLLAR_VAL
|
||||
.word AT91_ASM_PMC_PLLBR
|
||||
.word CONFIG_SYS_PLLBR_VAL
|
||||
.word AT91_ASM_PMC_MCKR
|
||||
.word CONFIG_SYS_MCKR_VAL
|
||||
SMRDATAE:
|
||||
/* here there's a delay */
|
||||
SMRDATA1:
|
||||
.word AT91_ASM_PIOC_ASR
|
||||
.word CONFIG_SYS_PIOC_ASR_VAL
|
||||
.word AT91_ASM_PIOC_BSR
|
||||
.word CONFIG_SYS_PIOC_BSR_VAL
|
||||
.word AT91_ASM_PIOC_PDR
|
||||
.word CONFIG_SYS_PIOC_PDR_VAL
|
||||
.word AT91_ASM_MC_EBI_CSA
|
||||
.word CONFIG_SYS_EBI_CSA_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_CR
|
||||
.word CONFIG_SYS_SDRC_CR_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL1
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL2
|
||||
.word CONFIG_SYS_SDRAM1
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_TR
|
||||
.word CONFIG_SYS_SDRC_TR_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91_ASM_MC_SDRAMC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL3
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
SMRDATA1E:
|
||||
/* SMRDATA1 is 176 bytes long */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Lineo, Inc. <www.lineo.com>
|
||||
* Bernhard Kuhn <bkuhn@lineo.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/at91_st.h>
|
||||
|
||||
void __attribute__((weak)) board_reset(void)
|
||||
{
|
||||
/* true empty function for defining weak symbol */
|
||||
}
|
||||
|
||||
void reset_cpu(ulong ignored)
|
||||
{
|
||||
at91_st_t *st = (at91_st_t *) AT91_ST_BASE;
|
||||
#if defined(CONFIG_AT91RM9200_USART)
|
||||
/*shutdown the console to avoid strange chars during reset */
|
||||
serial_exit();
|
||||
#endif
|
||||
|
||||
board_reset();
|
||||
|
||||
/* Reset the cpu by setting up the watchdog timer */
|
||||
writel(AT91_ST_WDMR_RSTEN | AT91_ST_WDMR_EXTEN | AT91_ST_WDMR_WDV(2),
|
||||
&st->wdmr);
|
||||
writel(AT91_ST_CR_WDRST, &st->cr);
|
||||
/* and let it timeout */
|
||||
while (1)
|
||||
;
|
||||
/* Never reached */
|
||||
}
|
||||
|
|
@ -0,0 +1,162 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Lineo, Inc. <www.lineo.com>
|
||||
* Bernhard Kuhn <bkuhn@lineo.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#include <asm/arch/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/at91_tc.h>
|
||||
#include <asm/arch/at91_pmc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* the number of clocks per CONFIG_SYS_HZ */
|
||||
#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
|
||||
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
|
||||
|
||||
/* enables TC1.0 clock */
|
||||
writel(1 << AT91_ID_TC0, &pmc->pcer); /* enable clock */
|
||||
|
||||
writel(0, &tc->bcr);
|
||||
writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
|
||||
AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
|
||||
|
||||
writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
|
||||
/* set to MCLK/2 and restart the timer
|
||||
when the value in TC_RC is reached */
|
||||
writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
|
||||
|
||||
writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */
|
||||
writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
|
||||
|
||||
writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
|
||||
gd->lastinc = 0;
|
||||
gd->tbl = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* timer without interrupts
|
||||
*/
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
reset_timer_masked();
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
void set_timer(ulong t)
|
||||
{
|
||||
gd->tbl = t;
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
udelay_masked(usec);
|
||||
}
|
||||
|
||||
void reset_timer_masked(void)
|
||||
{
|
||||
/* reset time */
|
||||
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
|
||||
gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
|
||||
gd->tbl = 0;
|
||||
}
|
||||
|
||||
ulong get_timer_raw(void)
|
||||
{
|
||||
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
|
||||
u32 now;
|
||||
|
||||
now = readl(&tc->tc[0].cv) & 0x0000ffff;
|
||||
|
||||
if (now >= gd->lastinc) {
|
||||
/* normal mode */
|
||||
gd->tbl += now - gd->lastinc;
|
||||
} else {
|
||||
/* we have an overflow ... */
|
||||
gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
|
||||
}
|
||||
gd->lastinc = now;
|
||||
|
||||
return gd->tbl;
|
||||
}
|
||||
|
||||
ulong get_timer_masked(void)
|
||||
{
|
||||
return get_timer_raw()/TIMER_LOAD_VAL;
|
||||
}
|
||||
|
||||
void udelay_masked(unsigned long usec)
|
||||
{
|
||||
u32 tmo;
|
||||
u32 endtime;
|
||||
signed long diff;
|
||||
|
||||
tmo = CONFIG_SYS_HZ_CLOCK / 1000;
|
||||
tmo *= usec;
|
||||
tmo /= 1000;
|
||||
|
||||
endtime = get_timer_raw() + tmo;
|
||||
|
||||
do {
|
||||
u32 now = get_timer_raw();
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (read timebase as long long).
|
||||
* On ARM it just returns the timer value.
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk(void)
|
||||
{
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
SOBJS += lowlevel_init.o
|
||||
|
||||
COBJS += bcm5221.o
|
||||
COBJS += dm9161.o
|
||||
COBJS += ether.o
|
||||
COBJS += i2c.o
|
||||
COBJS-$(CONFIG_KS8721_PHY) += ks8721.o
|
||||
COBJS += lxt972.o
|
||||
COBJS += reset.o
|
||||
COBJS += spi.o
|
||||
COBJS += timer.o
|
||||
COBJS += usb.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,232 @@
|
|||
/*
|
||||
* Broadcom BCM5221 Ethernet PHY
|
||||
*
|
||||
* (C) Copyright 2005 REA Elektronik GmbH <www.rea.de>
|
||||
* Anders Larsen <alarsen@rea.de>
|
||||
*
|
||||
* (C) Copyright 2003
|
||||
* Author : Hamid Ikdoumi (Atmel)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <at91rm9200_net.h>
|
||||
#include <net.h>
|
||||
#ifdef CONFIG_DRIVER_ETHER
|
||||
|
||||
#include <bcm5221.h>
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* bcm5221_IsPhyConnected
|
||||
* Description:
|
||||
* Reads the 2 PHY ID registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to AT91S_EMAC struct
|
||||
* Return value:
|
||||
* TRUE - if id read successfully
|
||||
* FALSE- if error
|
||||
*/
|
||||
unsigned int bcm5221_IsPhyConnected (AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short Id1, Id2;
|
||||
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
at91rm9200_EmacReadPhy (p_mac, BCM5221_PHYID1, &Id1);
|
||||
at91rm9200_EmacReadPhy (p_mac, BCM5221_PHYID2, &Id2);
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
|
||||
if ((Id1 == (BCM5221_PHYID1_OUI >> 6)) &&
|
||||
((Id2 >> 10) == (BCM5221_PHYID1_OUI & BCM5221_LSB_MASK)))
|
||||
return TRUE;
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* bcm5221_GetLinkSpeed
|
||||
* Description:
|
||||
* Link parallel detection status of MAC is checked and set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to MAC
|
||||
* Return value:
|
||||
* TRUE - if link status set succesfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
unsigned char bcm5221_GetLinkSpeed (AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short stat1, stat2;
|
||||
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMSR, &stat1))
|
||||
return FALSE;
|
||||
|
||||
if (!(stat1 & BCM5221_LINK_STATUS)) /* link status up? */
|
||||
return FALSE;
|
||||
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_ACSR, &stat2))
|
||||
return FALSE;
|
||||
|
||||
if ((stat1 & BCM5221_100BASE_TX_FD) && (stat2 & BCM5221_100) && (stat2 & BCM5221_FDX)) {
|
||||
/*set Emac for 100BaseTX and Full Duplex */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((stat1 & BCM5221_10BASE_T_FD) && !(stat2 & BCM5221_100) && (stat2 & BCM5221_FDX)) {
|
||||
/*set MII for 10BaseT and Full Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((stat1 & BCM5221_100BASE_TX_HD) && (stat2 & BCM5221_100) && !(stat2 & BCM5221_FDX)) {
|
||||
/*set MII for 100BaseTX and Half Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_SPD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((stat1 & BCM5221_10BASE_T_HD) && !(stat2 & BCM5221_100) && !(stat2 & BCM5221_FDX)) {
|
||||
/*set MII for 10BaseT and Half Duplex */
|
||||
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
|
||||
return TRUE;
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* bcm5221_InitPhy
|
||||
* Description:
|
||||
* MAC starts checking its link by using parallel detection and
|
||||
* Autonegotiation and the same is set in the MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to struct AT91S_EMAC
|
||||
* Return value:
|
||||
* TRUE - if link status set succesfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
unsigned char bcm5221_InitPhy (AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned char ret = TRUE;
|
||||
unsigned short IntValue;
|
||||
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
|
||||
if (!bcm5221_GetLinkSpeed (p_mac)) {
|
||||
/* Try another time */
|
||||
ret = bcm5221_GetLinkSpeed (p_mac);
|
||||
}
|
||||
|
||||
/* Disable PHY Interrupts */
|
||||
at91rm9200_EmacReadPhy (p_mac, BCM5221_INTR, &IntValue);
|
||||
/* clear FDX LED and INTR Enable */
|
||||
IntValue &= ~(BCM5221_FDX_LED | BCM5221_INTR_ENABLE);
|
||||
/* set FDX, SPD, Link, INTR masks */
|
||||
IntValue |= (BCM5221_FDX_MASK | BCM5221_SPD_MASK |
|
||||
BCM5221_LINK_MASK | BCM5221_INTR_MASK);
|
||||
at91rm9200_EmacWritePhy (p_mac, BCM5221_INTR, &IntValue);
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* bcm5221_AutoNegotiate
|
||||
* Description:
|
||||
* MAC Autonegotiates with the partner status of same is set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* dev - pointer to struct net_device
|
||||
* Return value:
|
||||
* TRUE - if link status set successfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
unsigned char bcm5221_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
|
||||
{
|
||||
unsigned short value;
|
||||
unsigned short PhyAnar;
|
||||
unsigned short PhyAnalpar;
|
||||
|
||||
/* Set bcm5221 control register */
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMCR, &value))
|
||||
return FALSE;
|
||||
value &= ~BCM5221_AUTONEG; /* remove autonegotiation enable */
|
||||
value |= BCM5221_ISOLATE; /* Electrically isolate PHY */
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
/* Set the Auto_negotiation Advertisement Register */
|
||||
/* MII advertising for 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */
|
||||
PhyAnar = BCM5221_TX_FDX | BCM5221_TX_HDX |
|
||||
BCM5221_10_FDX | BCM5221_10_HDX | BCM5221_AN_IEEE_802_3;
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_ANAR, &PhyAnar))
|
||||
return FALSE;
|
||||
|
||||
/* Read the Control Register */
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
value |= BCM5221_SPEED_SELECT | BCM5221_AUTONEG | BCM5221_DUPLEX_MODE;
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
|
||||
return FALSE;
|
||||
/* Restart Auto_negotiation */
|
||||
value |= BCM5221_RESTART_AUTONEG;
|
||||
value &= ~BCM5221_ISOLATE;
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
/*check AutoNegotiate complete */
|
||||
udelay (10000);
|
||||
at91rm9200_EmacReadPhy (p_mac, BCM5221_BMSR, &value);
|
||||
if (!(value & BCM5221_AUTONEG_COMP))
|
||||
return FALSE;
|
||||
|
||||
/* Get the AutoNeg Link partner base page */
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_ANLPAR, &PhyAnalpar))
|
||||
return FALSE;
|
||||
|
||||
if ((PhyAnar & BCM5221_TX_FDX) && (PhyAnalpar & BCM5221_TX_FDX)) {
|
||||
/*set MII for 100BaseTX and Full Duplex */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((PhyAnar & BCM5221_10_FDX) && (PhyAnalpar & BCM5221_10_FDX)) {
|
||||
/*set MII for 10BaseT and Full Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_DRIVER_ETHER */
|
||||
|
|
@ -0,0 +1,225 @@
|
|||
/*
|
||||
* (C) Copyright 2003
|
||||
* Author : Hamid Ikdoumi (Atmel)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <at91rm9200_net.h>
|
||||
#include <net.h>
|
||||
#ifdef CONFIG_DRIVER_ETHER
|
||||
#include <dm9161.h>
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* dm9161_IsPhyConnected
|
||||
* Description:
|
||||
* Reads the 2 PHY ID registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to AT91S_EMAC struct
|
||||
* Return value:
|
||||
* TRUE - if id read successfully
|
||||
* FALSE- if error
|
||||
*/
|
||||
unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short Id1, Id2;
|
||||
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID1, &Id1);
|
||||
at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID2, &Id2);
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
|
||||
if ((Id1 == (DM9161_PHYID1_OUI >> 6)) &&
|
||||
((Id2 >> 10) == (DM9161_PHYID1_OUI & DM9161_LSB_MASK)))
|
||||
return TRUE;
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* dm9161_GetLinkSpeed
|
||||
* Description:
|
||||
* Link parallel detection status of MAC is checked and set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to MAC
|
||||
* Return value:
|
||||
* TRUE - if link status set succesfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
UCHAR dm9161_GetLinkSpeed (AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short stat1, stat2;
|
||||
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &stat1))
|
||||
return FALSE;
|
||||
|
||||
if (!(stat1 & DM9161_LINK_STATUS)) /* link status up? */
|
||||
return FALSE;
|
||||
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_DSCSR, &stat2))
|
||||
return FALSE;
|
||||
|
||||
if ((stat1 & DM9161_100BASE_TX_FD) && (stat2 & DM9161_100FDX)) {
|
||||
/*set Emac for 100BaseTX and Full Duplex */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((stat1 & DM9161_10BASE_T_FD) && (stat2 & DM9161_10FDX)) {
|
||||
/*set MII for 10BaseT and Full Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((stat1 & DM9161_100BASE_TX_HD) && (stat2 & DM9161_100HDX)) {
|
||||
/*set MII for 100BaseTX and Half Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_SPD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((stat1 & DM9161_10BASE_T_HD) && (stat2 & DM9161_10HDX)) {
|
||||
/*set MII for 10BaseT and Half Duplex */
|
||||
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
|
||||
return TRUE;
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* dm9161_InitPhy
|
||||
* Description:
|
||||
* MAC starts checking its link by using parallel detection and
|
||||
* Autonegotiation and the same is set in the MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to struct AT91S_EMAC
|
||||
* Return value:
|
||||
* TRUE - if link status set succesfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac)
|
||||
{
|
||||
UCHAR ret = TRUE;
|
||||
unsigned short IntValue;
|
||||
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
|
||||
if (!dm9161_GetLinkSpeed (p_mac)) {
|
||||
/* Try another time */
|
||||
ret = dm9161_GetLinkSpeed (p_mac);
|
||||
}
|
||||
|
||||
/* Disable PHY Interrupts */
|
||||
at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue);
|
||||
/* set FDX, SPD, Link, INTR masks */
|
||||
IntValue |= (DM9161_FDX_MASK | DM9161_SPD_MASK |
|
||||
DM9161_LINK_MASK | DM9161_INTR_MASK);
|
||||
at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue);
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* dm9161_AutoNegotiate
|
||||
* Description:
|
||||
* MAC Autonegotiates with the partner status of same is set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* dev - pointer to struct net_device
|
||||
* Return value:
|
||||
* TRUE - if link status set successfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
UCHAR dm9161_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
|
||||
{
|
||||
unsigned short value;
|
||||
unsigned short PhyAnar;
|
||||
unsigned short PhyAnalpar;
|
||||
|
||||
/* Set dm9161 control register */
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value))
|
||||
return FALSE;
|
||||
value &= ~DM9161_AUTONEG; /* remove autonegotiation enable */
|
||||
value |= DM9161_ISOLATE; /* Electrically isolate PHY */
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
/* Set the Auto_negotiation Advertisement Register */
|
||||
/* MII advertising for Next page, 100BaseTxFD and HD, */
|
||||
/* 10BaseTFD and HD, IEEE 802.3 */
|
||||
PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX |
|
||||
DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3;
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_ANAR, &PhyAnar))
|
||||
return FALSE;
|
||||
|
||||
/* Read the Control Register */
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
value |= DM9161_SPEED_SELECT | DM9161_AUTONEG | DM9161_DUPLEX_MODE;
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
|
||||
return FALSE;
|
||||
/* Restart Auto_negotiation */
|
||||
value |= DM9161_RESTART_AUTONEG;
|
||||
value &= ~DM9161_ISOLATE;
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
/*check AutoNegotiate complete */
|
||||
udelay (10000);
|
||||
at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &value);
|
||||
if (!(value & DM9161_AUTONEG_COMP))
|
||||
return FALSE;
|
||||
|
||||
/* Get the AutoNeg Link partner base page */
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_ANLPAR, &PhyAnalpar))
|
||||
return FALSE;
|
||||
|
||||
if ((PhyAnar & DM9161_TX_FDX) && (PhyAnalpar & DM9161_TX_FDX)) {
|
||||
/*set MII for 100BaseTX and Full Duplex */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if ((PhyAnar & DM9161_10_FDX) && (PhyAnalpar & DM9161_10_FDX)) {
|
||||
/*set MII for 10BaseT and Full Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return TRUE;
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_DRIVER_ETHER */
|
||||
|
|
@ -0,0 +1,316 @@
|
|||
/*
|
||||
* (C) Copyright 2003
|
||||
* Author : Hamid Ikdoumi (Atmel)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <at91rm9200_net.h>
|
||||
#include <net.h>
|
||||
#include <miiphy.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
/* ----- Ethernet Buffer definitions ----- */
|
||||
|
||||
typedef struct {
|
||||
unsigned long addr, size;
|
||||
} rbf_t;
|
||||
|
||||
#define RBF_ADDR 0xfffffffc
|
||||
#define RBF_OWNER (1<<0)
|
||||
#define RBF_WRAP (1<<1)
|
||||
#define RBF_BROADCAST (1<<31)
|
||||
#define RBF_MULTICAST (1<<30)
|
||||
#define RBF_UNICAST (1<<29)
|
||||
#define RBF_EXTERNAL (1<<28)
|
||||
#define RBF_UNKNOWN (1<<27)
|
||||
#define RBF_SIZE 0x07ff
|
||||
#define RBF_LOCAL4 (1<<26)
|
||||
#define RBF_LOCAL3 (1<<25)
|
||||
#define RBF_LOCAL2 (1<<24)
|
||||
#define RBF_LOCAL1 (1<<23)
|
||||
|
||||
#define RBF_FRAMEMAX 64
|
||||
#define RBF_FRAMELEN 0x600
|
||||
|
||||
#ifdef CONFIG_DRIVER_ETHER
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/* alignment as per Errata #11 (64 bytes) is insufficient! */
|
||||
rbf_t rbfdt[RBF_FRAMEMAX] __attribute__((aligned(512)));
|
||||
rbf_t *rbfp;
|
||||
|
||||
unsigned char rbf_framebuf[RBF_FRAMEMAX][RBF_FRAMELEN]
|
||||
__attribute__((aligned(4)));
|
||||
|
||||
/* structure to interface the PHY */
|
||||
AT91S_PhyOps PhyOps;
|
||||
|
||||
AT91PS_EMAC p_mac;
|
||||
|
||||
/*********** EMAC Phy layer Management functions *************************/
|
||||
/*
|
||||
* Name:
|
||||
* at91rm9200_EmacEnableMDIO
|
||||
* Description:
|
||||
* Enables the MDIO bit in MAC control register
|
||||
* Arguments:
|
||||
* p_mac - pointer to struct AT91S_EMAC
|
||||
* Return value:
|
||||
* none
|
||||
*/
|
||||
void at91rm9200_EmacEnableMDIO (AT91PS_EMAC p_mac)
|
||||
{
|
||||
/* Mac CTRL reg set for MDIO enable */
|
||||
p_mac->EMAC_CTL |= AT91C_EMAC_MPE; /* Management port enable */
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* at91rm9200_EmacDisableMDIO
|
||||
* Description:
|
||||
* Disables the MDIO bit in MAC control register
|
||||
* Arguments:
|
||||
* p_mac - pointer to struct AT91S_EMAC
|
||||
* Return value:
|
||||
* none
|
||||
*/
|
||||
void at91rm9200_EmacDisableMDIO (AT91PS_EMAC p_mac)
|
||||
{
|
||||
/* Mac CTRL reg set for MDIO disable */
|
||||
p_mac->EMAC_CTL &= ~AT91C_EMAC_MPE; /* Management port disable */
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* at91rm9200_EmacReadPhy
|
||||
* Description:
|
||||
* Reads data from the PHY register
|
||||
* Arguments:
|
||||
* dev - pointer to struct net_device
|
||||
* RegisterAddress - unsigned char
|
||||
* pInput - pointer to value read from register
|
||||
* Return value:
|
||||
* TRUE - if data read successfully
|
||||
*/
|
||||
UCHAR at91rm9200_EmacReadPhy (AT91PS_EMAC p_mac,
|
||||
unsigned char RegisterAddress,
|
||||
unsigned short *pInput)
|
||||
{
|
||||
p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) |
|
||||
(AT91C_EMAC_RW_R) |
|
||||
(RegisterAddress << 18) |
|
||||
(AT91C_EMAC_CODE_802_3);
|
||||
|
||||
udelay (10000);
|
||||
|
||||
*pInput = (unsigned short) p_mac->EMAC_MAN;
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* at91rm9200_EmacWritePhy
|
||||
* Description:
|
||||
* Writes data to the PHY register
|
||||
* Arguments:
|
||||
* dev - pointer to struct net_device
|
||||
* RegisterAddress - unsigned char
|
||||
* pOutput - pointer to value to be written in the register
|
||||
* Return value:
|
||||
* TRUE - if data read successfully
|
||||
*/
|
||||
UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac,
|
||||
unsigned char RegisterAddress,
|
||||
unsigned short *pOutput)
|
||||
{
|
||||
p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) |
|
||||
AT91C_EMAC_CODE_802_3 | AT91C_EMAC_RW_W |
|
||||
(RegisterAddress << 18) | *pOutput;
|
||||
|
||||
udelay (10000);
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
int eth_init (bd_t * bd)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
uchar enetaddr[6];
|
||||
|
||||
p_mac = AT91C_BASE_EMAC;
|
||||
|
||||
/* PIO Disable Register */
|
||||
*AT91C_PIOA_PDR = AT91C_PA16_EMDIO | AT91C_PA15_EMDC | AT91C_PA14_ERXER |
|
||||
AT91C_PA13_ERX1 | AT91C_PA12_ERX0 | AT91C_PA11_ECRS_ECRSDV |
|
||||
AT91C_PA10_ETX1 | AT91C_PA9_ETX0 | AT91C_PA8_ETXEN |
|
||||
AT91C_PA7_ETXCK_EREFCK;
|
||||
|
||||
#ifdef CONFIG_AT91C_USE_RMII
|
||||
*AT91C_PIOB_PDR = AT91C_PB19_ERXCK;
|
||||
*AT91C_PIOB_BSR = AT91C_PB19_ERXCK;
|
||||
#else
|
||||
*AT91C_PIOB_PDR = AT91C_PB19_ERXCK | AT91C_PB18_ECOL | AT91C_PB17_ERXDV |
|
||||
AT91C_PB16_ERX3 | AT91C_PB15_ERX2 | AT91C_PB14_ETXER |
|
||||
AT91C_PB13_ETX3 | AT91C_PB12_ETX2;
|
||||
|
||||
/* Select B Register */
|
||||
*AT91C_PIOB_BSR = AT91C_PB19_ERXCK | AT91C_PB18_ECOL |
|
||||
AT91C_PB17_ERXDV | AT91C_PB16_ERX3 | AT91C_PB15_ERX2 |
|
||||
AT91C_PB14_ETXER | AT91C_PB13_ETX3 | AT91C_PB12_ETX2;
|
||||
#endif
|
||||
|
||||
*AT91C_PMC_PCER = 1 << AT91C_ID_EMAC; /* Peripheral Clock Enable Register */
|
||||
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_CSR; /* Clear statistics */
|
||||
|
||||
/* Init Ethernet buffers */
|
||||
for (i = 0; i < RBF_FRAMEMAX; i++) {
|
||||
rbfdt[i].addr = (unsigned long)rbf_framebuf[i];
|
||||
rbfdt[i].size = 0;
|
||||
}
|
||||
rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
|
||||
rbfp = &rbfdt[0];
|
||||
|
||||
eth_getenv_enetaddr("ethaddr", enetaddr);
|
||||
|
||||
/* The CSB337 originally used a version of the MicroMonitor bootloader
|
||||
* which saved Ethernet addresses in the "wrong" order. Operating
|
||||
* systems (like Linux) know this, and apply a workaround. Replicate
|
||||
* that MicroMonitor behavior so we avoid needing to make such OS code
|
||||
* care about which bootloader was used.
|
||||
*/
|
||||
if (machine_is_csb337()) {
|
||||
p_mac->EMAC_SA2H = (enetaddr[0] << 8) | (enetaddr[1]);
|
||||
p_mac->EMAC_SA2L = (enetaddr[2] << 24) | (enetaddr[3] << 16)
|
||||
| (enetaddr[4] << 8) | (enetaddr[5]);
|
||||
} else {
|
||||
p_mac->EMAC_SA2L = (enetaddr[3] << 24) | (enetaddr[2] << 16)
|
||||
| (enetaddr[1] << 8) | (enetaddr[0]);
|
||||
p_mac->EMAC_SA2H = (enetaddr[5] << 8) | (enetaddr[4]);
|
||||
}
|
||||
|
||||
p_mac->EMAC_RBQP = (long) (&rbfdt[0]);
|
||||
p_mac->EMAC_RSR &= ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC | AT91C_EMAC_BNA);
|
||||
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG | AT91C_EMAC_CAF | AT91C_EMAC_NBC)
|
||||
& ~AT91C_EMAC_CLK;
|
||||
|
||||
#ifdef CONFIG_AT91C_USE_RMII
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_RMII;
|
||||
#endif
|
||||
|
||||
#if (AT91C_MASTER_CLOCK > 40000000)
|
||||
/* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_CLK_HCLK_64;
|
||||
#endif
|
||||
|
||||
p_mac->EMAC_CTL |= AT91C_EMAC_TE | AT91C_EMAC_RE;
|
||||
|
||||
at91rm9200_GetPhyInterface (& PhyOps);
|
||||
|
||||
if (!PhyOps.IsPhyConnected (p_mac))
|
||||
printf ("PHY not connected!!\n\r");
|
||||
|
||||
/* MII management start from here */
|
||||
if (!(p_mac->EMAC_SR & AT91C_EMAC_LINK)) {
|
||||
if (!(ret = PhyOps.Init (p_mac))) {
|
||||
printf ("MAC: error during MII initialization\n");
|
||||
return 0;
|
||||
}
|
||||
} else {
|
||||
printf ("No link\n\r");
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int eth_send (volatile void *packet, int length)
|
||||
{
|
||||
while (!(p_mac->EMAC_TSR & AT91C_EMAC_BNQ));
|
||||
p_mac->EMAC_TAR = (long) packet;
|
||||
p_mac->EMAC_TCR = length;
|
||||
while (p_mac->EMAC_TCR & 0x7ff);
|
||||
p_mac->EMAC_TSR |= AT91C_EMAC_COMP;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int eth_rx (void)
|
||||
{
|
||||
int size;
|
||||
|
||||
if (!(rbfp->addr & RBF_OWNER))
|
||||
return 0;
|
||||
|
||||
size = rbfp->size & RBF_SIZE;
|
||||
NetReceive ((volatile uchar *) (rbfp->addr & RBF_ADDR), size);
|
||||
|
||||
rbfp->addr &= ~RBF_OWNER;
|
||||
if (rbfp->addr & RBF_WRAP)
|
||||
rbfp = &rbfdt[0];
|
||||
else
|
||||
rbfp++;
|
||||
|
||||
p_mac->EMAC_RSR |= AT91C_EMAC_REC;
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
void eth_halt (void)
|
||||
{
|
||||
};
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short * value)
|
||||
{
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
at91rm9200_EmacReadPhy (p_mac, reg, value);
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short value)
|
||||
{
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
at91rm9200_EmacWritePhy (p_mac, reg, &value);
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
int at91rm9200_miiphy_initialize(bd_t *bis)
|
||||
{
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register("at91rm9200phy", at91rm9200_miiphy_read, at91rm9200_miiphy_write);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_DRIVER_ETHER */
|
||||
|
|
@ -0,0 +1,192 @@
|
|||
/*
|
||||
* i2c Support for Atmel's AT91RM9200 Two-Wire Interface
|
||||
*
|
||||
* (c) Rick Bronson
|
||||
*
|
||||
* Borrowed heavily from original work by:
|
||||
* Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
|
||||
*
|
||||
* Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
#include <common.h>
|
||||
|
||||
#ifdef CONFIG_HARD_I2C
|
||||
|
||||
#include <i2c.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
#include <at91rm9200_i2c.h>
|
||||
|
||||
/* define DEBUG */
|
||||
|
||||
/*
|
||||
* Poll the i2c status register until the specified bit is set.
|
||||
* Returns 0 if timed out (100 msec)
|
||||
*/
|
||||
static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) {
|
||||
int loop_cntr = 10000;
|
||||
do {
|
||||
udelay(10);
|
||||
} while (!(twi->TWI_SR & bit) && (--loop_cntr > 0));
|
||||
|
||||
return (loop_cntr > 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Generic i2c master transfer entrypoint
|
||||
*
|
||||
* rw == 1 means that this is a read
|
||||
*/
|
||||
static int
|
||||
at91_xfer(unsigned char chip, unsigned int addr, int alen,
|
||||
unsigned char *buffer, int len, int rw)
|
||||
{
|
||||
AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
|
||||
int length;
|
||||
unsigned char *buf;
|
||||
/* Set the TWI Master Mode Register */
|
||||
twi->TWI_MMR = (chip << 16) | (alen << 8)
|
||||
| ((rw == 1) ? AT91C_TWI_MREAD : 0);
|
||||
|
||||
/* Set TWI Internal Address Register with first messages data field */
|
||||
if (alen > 0)
|
||||
twi->TWI_IADR = addr;
|
||||
|
||||
length = len;
|
||||
buf = buffer;
|
||||
if (length && buf) { /* sanity check */
|
||||
if (rw) {
|
||||
twi->TWI_CR = AT91C_TWI_START;
|
||||
while (length--) {
|
||||
if (!length)
|
||||
twi->TWI_CR = AT91C_TWI_STOP;
|
||||
/* Wait until transfer is finished */
|
||||
if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) {
|
||||
debug ("at91_i2c: timeout 1\n");
|
||||
return 1;
|
||||
}
|
||||
*buf++ = twi->TWI_RHR;
|
||||
}
|
||||
if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
|
||||
debug ("at91_i2c: timeout 2\n");
|
||||
return 1;
|
||||
}
|
||||
} else {
|
||||
twi->TWI_CR = AT91C_TWI_START;
|
||||
while (length--) {
|
||||
twi->TWI_THR = *buf++;
|
||||
if (!length)
|
||||
twi->TWI_CR = AT91C_TWI_STOP;
|
||||
if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) {
|
||||
debug ("at91_i2c: timeout 3\n");
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
/* Wait until transfer is finished */
|
||||
if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
|
||||
debug ("at91_i2c: timeout 4\n");
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
i2c_probe(unsigned char chip)
|
||||
{
|
||||
unsigned char buffer[1];
|
||||
|
||||
return at91_xfer(chip, 0, 0, buffer, 1, 1);
|
||||
}
|
||||
|
||||
int
|
||||
i2c_read (unsigned char chip, unsigned int addr, int alen,
|
||||
unsigned char *buffer, int len)
|
||||
{
|
||||
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||||
/* we only allow one address byte */
|
||||
if (alen > 1)
|
||||
return 1;
|
||||
/* XXX assume an ATMEL AT24C16 */
|
||||
if (alen == 1) {
|
||||
#if 0 /* EEPROM code already sets this correctly */
|
||||
chip |= (addr >> 8) & 0xff;
|
||||
#endif
|
||||
addr = addr & 0xff;
|
||||
}
|
||||
#endif
|
||||
return at91_xfer(chip, addr, alen, buffer, len, 1);
|
||||
}
|
||||
|
||||
int
|
||||
i2c_write(unsigned char chip, unsigned int addr, int alen,
|
||||
unsigned char *buffer, int len)
|
||||
{
|
||||
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||||
int i;
|
||||
unsigned char *buf;
|
||||
|
||||
/* we only allow one address byte */
|
||||
if (alen > 1)
|
||||
return 1;
|
||||
/* XXX assume an ATMEL AT24C16 */
|
||||
if (alen == 1) {
|
||||
buf = buffer;
|
||||
/* do single byte writes */
|
||||
for (i = 0; i < len; i++) {
|
||||
#if 0 /* EEPROM code already sets this correctly */
|
||||
chip |= (addr >> 8) & 0xff;
|
||||
#endif
|
||||
addr = addr & 0xff;
|
||||
if (at91_xfer(chip, addr, alen, buf++, 1, 0))
|
||||
return 1;
|
||||
addr++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
return at91_xfer(chip, addr, alen, buffer, len, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Main initialization routine
|
||||
*/
|
||||
void
|
||||
i2c_init(int speed, int slaveaddr)
|
||||
{
|
||||
AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
|
||||
|
||||
*AT91C_PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
|
||||
*AT91C_PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
|
||||
*AT91C_PIOA_MDER = AT91C_PA25_TWD | AT91C_PA26_TWCK;
|
||||
*AT91C_PMC_PCER = 1 << AT91C_ID_TWI; /* enable peripheral clock */
|
||||
|
||||
twi->TWI_IDR = 0x3ff; /* Disable all interrupts */
|
||||
twi->TWI_CR = AT91C_TWI_SWRST; /* Reset peripheral */
|
||||
twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; /* Set Master mode */
|
||||
|
||||
/* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
|
||||
twi->TWI_CWGR = AT91C_TWI_CKDIV1 | AT91C_TWI_CLDIV3 | (AT91C_TWI_CLDIV3 << 8);
|
||||
|
||||
debug ("Found AT91 i2c\n");
|
||||
return;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_HARD_I2C */
|
||||
|
|
@ -0,0 +1,249 @@
|
|||
/*
|
||||
* (C) Copyright 2006
|
||||
* Author : Eric Benard (Eukrea Electromatique)
|
||||
* based on dm9161.c which is :
|
||||
* (C) Copyright 2003
|
||||
* Author : Hamid Ikdoumi (Atmel)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <at91rm9200_net.h>
|
||||
#include <net.h>
|
||||
#include <ks8721.h>
|
||||
|
||||
#ifdef CONFIG_DRIVER_ETHER
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_isphyconnected
|
||||
* Description:
|
||||
* Reads the 2 PHY ID registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to AT91S_EMAC struct
|
||||
* Return value:
|
||||
* 1 - if id read successfully
|
||||
* 0 - if error
|
||||
*/
|
||||
unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short id1, id2;
|
||||
|
||||
at91rm9200_EmacEnableMDIO(p_mac);
|
||||
at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_PHYID1, &id1);
|
||||
at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_PHYID2, &id2);
|
||||
at91rm9200_EmacDisableMDIO(p_mac);
|
||||
|
||||
if ((id1 == (KS8721_PHYID_OUI >> 6)) &&
|
||||
((id2 >> 10) == (KS8721_PHYID_OUI & KS8721_LSB_MASK))) {
|
||||
if ((id2 & KS8721_MODELMASK) == KS8721BL_MODEL)
|
||||
printf("Micrel KS8721bL PHY detected : ");
|
||||
else
|
||||
printf("Unknown Micrel PHY detected : ");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_getlinkspeed
|
||||
* Description:
|
||||
* Link parallel detection status of MAC is checked and set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to MAC
|
||||
* Return value:
|
||||
* 1 - if link status set succesfully
|
||||
* 0 - if link status not set
|
||||
*/
|
||||
unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short stat1;
|
||||
|
||||
if (!at91rm9200_EmacReadPhy(p_mac, KS8721_BMSR, &stat1))
|
||||
return 0;
|
||||
|
||||
if (!(stat1 & KS8721_LINK_STATUS)) {
|
||||
/* link status up? */
|
||||
printf("Link Down !\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_100BASE_TX_FD) {
|
||||
/* set Emac for 100BaseTX and Full Duplex */
|
||||
printf("100BT FD\n");
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_10BASE_T_FD) {
|
||||
/* set MII for 10BaseT and Full Duplex */
|
||||
printf("10BT FD\n");
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_100BASE_T4_HD) {
|
||||
/* set MII for 100BaseTX and Half Duplex */
|
||||
printf("100BT HD\n");
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_SPD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_10BASE_T_HD) {
|
||||
/* set MII for 10BaseT and Half Duplex */
|
||||
printf("10BT HD\n");
|
||||
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_initphy
|
||||
* Description:
|
||||
* MAC starts checking its link by using parallel detection and
|
||||
* Autonegotiation and the same is set in the MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to struct AT91S_EMAC
|
||||
* Return value:
|
||||
* 1 - if link status set succesfully
|
||||
* 0 - if link status not set
|
||||
*/
|
||||
unsigned char ks8721_initphy(AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned char ret = 1;
|
||||
unsigned short intvalue;
|
||||
|
||||
at91rm9200_EmacEnableMDIO(p_mac);
|
||||
|
||||
/* Try another time */
|
||||
if (!ks8721_getlinkspeed(p_mac))
|
||||
ret = ks8721_getlinkspeed(p_mac);
|
||||
|
||||
/* Disable PHY Interrupts */
|
||||
intvalue = 0;
|
||||
at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_MDINTR, &intvalue);
|
||||
at91rm9200_EmacDisableMDIO(p_mac);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_autonegotiate
|
||||
* Description:
|
||||
* MAC Autonegotiates with the partner status of same is set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* dev - pointer to struct net_device
|
||||
* Return value:
|
||||
* 1 - if link status set successfully
|
||||
* 0 - if link status not set
|
||||
*/
|
||||
unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status)
|
||||
{
|
||||
unsigned short value;
|
||||
unsigned short phyanar;
|
||||
unsigned short phyanalpar;
|
||||
|
||||
/* Set ks8721 control register */
|
||||
if (!at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value))
|
||||
return 0;
|
||||
|
||||
/* remove autonegotiation enable */
|
||||
value &= ~KS8721_AUTONEG;
|
||||
/* Electrically isolate PHY */
|
||||
value |= KS8721_ISOLATE;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
/*
|
||||
* Set the Auto_negotiation Advertisement Register
|
||||
* MII advertising for Next page, 100BaseTxFD and HD,
|
||||
* 10BaseTFD and HD, IEEE 802.3
|
||||
*/
|
||||
phyanar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX |
|
||||
KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_ANAR, &phyanar)) {
|
||||
return 0;
|
||||
}
|
||||
/* Read the Control Register */
|
||||
if (!at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
/* Restart Auto_negotiation */
|
||||
value |= KS8721_RESTART_AUTONEG;
|
||||
value &= ~KS8721_ISOLATE;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
/* Check AutoNegotiate complete */
|
||||
udelay(10000);
|
||||
at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMSR, &value);
|
||||
if (!(value & KS8721_AUTONEG_COMP))
|
||||
return 0;
|
||||
|
||||
/* Get the AutoNeg Link partner base page */
|
||||
if (!at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_ANLPAR, &phyanalpar)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((phyanar & KS8721_TX_FDX) && (phyanalpar & KS8721_TX_FDX)) {
|
||||
/* Set MII for 100BaseTX and Full Duplex */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ((phyanar & KS8721_10_FDX) && (phyanalpar & KS8721_10_FDX)) {
|
||||
/* Set MII for 10BaseT and Full Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_CMD_NET */
|
||||
|
||||
#endif /* CONFIG_DRIVER_ETHER */
|
||||
|
|
@ -0,0 +1,169 @@
|
|||
/*
|
||||
* Memory Setup stuff - taken from blob memsetup.S
|
||||
*
|
||||
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
|
||||
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
|
||||
*
|
||||
* Modified for the at91rm9200dk board by
|
||||
* (C) Copyright 2004
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
/*
|
||||
* some parameters for the board
|
||||
*
|
||||
* This is based on rm9200dk.cfg for the BDI2000 from ABATRON which in
|
||||
* turn is based on the boot.bin code from ATMEL
|
||||
*
|
||||
*/
|
||||
#include <asm/arch/AT91RM9200.h>
|
||||
|
||||
_MTEXT_BASE:
|
||||
#undef START_FROM_MEM
|
||||
#ifdef START_FROM_MEM
|
||||
.word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
|
||||
#else
|
||||
.word CONFIG_SYS_TEXT_BASE
|
||||
#endif
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* Get the CKGR Base Address */
|
||||
ldr r1, =AT91C_BASE_CKGR
|
||||
/* Main oscillator Enable register */
|
||||
#ifdef CONFIG_SYS_USE_MAIN_OSCILLATOR
|
||||
ldr r0, =0x0000FF01 /* Enable main oscillator, OSCOUNT = 0xFF */
|
||||
#else
|
||||
ldr r0, =0x0000FF00 /* Disable main oscillator, OSCOUNT = 0xFF */
|
||||
#endif
|
||||
str r0, [r1, #AT91C_CKGR_MOR]
|
||||
/* Add loop to compensate Main Oscillator startup time */
|
||||
ldr r0, =0x00000010
|
||||
LoopOsc:
|
||||
subs r0, r0, #1
|
||||
bhi LoopOsc
|
||||
|
||||
/* memory control configuration */
|
||||
/* this isn't very elegant, but what the heck */
|
||||
ldr r0, =SMRDATA
|
||||
ldr r1, _MTEXT_BASE
|
||||
sub r0, r0, r1
|
||||
add r2, r0, #80
|
||||
0:
|
||||
/* the address */
|
||||
ldr r1, [r0], #4
|
||||
/* the value */
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1]
|
||||
cmp r2, r0
|
||||
bne 0b
|
||||
/* delay - this is all done by guess */
|
||||
ldr r0, =0x00010000
|
||||
/* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
|
||||
1:
|
||||
subs r0, r0, #1
|
||||
bhi 1b
|
||||
ldr r0, =SMRDATA1
|
||||
ldr r1, _MTEXT_BASE
|
||||
sub r0, r0, r1
|
||||
add r2, r0, #176
|
||||
2:
|
||||
/* the address */
|
||||
ldr r1, [r0], #4
|
||||
/* the value */
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1]
|
||||
cmp r2, r0
|
||||
bne 2b
|
||||
|
||||
/* switch from FastBus to Asynchronous clock mode */
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #0xC0000000 @ set bit 31 (iA) and 30 (nF)
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
/* everything is fine now */
|
||||
mov pc, lr
|
||||
|
||||
.ltorg
|
||||
|
||||
SMRDATA:
|
||||
.word AT91C_EBI_CFGR
|
||||
.word CONFIG_SYS_EBI_CFGR_VAL
|
||||
.word AT91C_SMC_CSR0
|
||||
.word CONFIG_SYS_SMC_CSR0_VAL
|
||||
.word AT91C_PLLAR
|
||||
.word CONFIG_SYS_PLLAR_VAL
|
||||
.word AT91C_PLLBR
|
||||
.word CONFIG_SYS_PLLBR_VAL
|
||||
.word AT91C_MCKR
|
||||
.word CONFIG_SYS_MCKR_VAL
|
||||
/* here there's a delay */
|
||||
SMRDATA1:
|
||||
.word AT91C_PIOC_ASR
|
||||
.word CONFIG_SYS_PIOC_ASR_VAL
|
||||
.word AT91C_PIOC_BSR
|
||||
.word CONFIG_SYS_PIOC_BSR_VAL
|
||||
.word AT91C_PIOC_PDR
|
||||
.word CONFIG_SYS_PIOC_PDR_VAL
|
||||
.word AT91C_EBI_CSA
|
||||
.word CONFIG_SYS_EBI_CSA_VAL
|
||||
.word AT91C_SDRC_CR
|
||||
.word CONFIG_SYS_SDRC_CR_VAL
|
||||
.word AT91C_SDRC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91C_SDRC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL1
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91C_SDRC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL2
|
||||
.word CONFIG_SYS_SDRAM1
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91C_SDRC_TR
|
||||
.word CONFIG_SYS_SDRC_TR_VAL
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
.word AT91C_SDRC_MR
|
||||
.word CONFIG_SYS_SDRC_MR_VAL3
|
||||
.word CONFIG_SYS_SDRAM
|
||||
.word CONFIG_SYS_SDRAM_VAL
|
||||
/* SMRDATA1 is 176 bytes long */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
|
@ -0,0 +1,192 @@
|
|||
/*
|
||||
*
|
||||
* (C) Copyright 2003
|
||||
* Author : Hamid Ikdoumi (Atmel)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* Adapted for KwikByte KB920x board: 22APR2005
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <at91rm9200_net.h>
|
||||
#include <net.h>
|
||||
#include <miiphy.h>
|
||||
#include <lxt971a.h>
|
||||
|
||||
#ifdef CONFIG_DRIVER_ETHER
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* lxt972_IsPhyConnected
|
||||
* Description:
|
||||
* Reads the 2 PHY ID registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to AT91S_EMAC struct
|
||||
* Return value:
|
||||
* TRUE - if id read successfully
|
||||
* FALSE- if error
|
||||
*/
|
||||
unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short Id1, Id2;
|
||||
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
at91rm9200_EmacReadPhy(p_mac, MII_PHYSID1, &Id1);
|
||||
at91rm9200_EmacReadPhy(p_mac, MII_PHYSID2, &Id2);
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
|
||||
if ((Id1 == (0x0013)) && ((Id2 & 0xFFF0) == 0x78E0))
|
||||
return TRUE;
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* lxt972_GetLinkSpeed
|
||||
* Description:
|
||||
* Link parallel detection status of MAC is checked and set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to MAC
|
||||
* Return value:
|
||||
* TRUE - if link status set succesfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
UCHAR lxt972_GetLinkSpeed (AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short stat1;
|
||||
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, PHY_LXT971_STAT2, &stat1))
|
||||
return FALSE;
|
||||
|
||||
if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link status up? */
|
||||
return FALSE;
|
||||
|
||||
if (stat1 & PHY_LXT971_STAT2_100BTX) {
|
||||
|
||||
if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
|
||||
|
||||
/*set Emac for 100BaseTX and Full Duplex */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
} else {
|
||||
|
||||
/*set Emac for 100BaseTX and Half Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_SPD;
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
|
||||
} else {
|
||||
|
||||
if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
|
||||
|
||||
/*set MII for 10BaseT and Full Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
} else {
|
||||
|
||||
/*set MII for 10BaseT and Half Duplex */
|
||||
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* lxt972_InitPhy
|
||||
* Description:
|
||||
* MAC starts checking its link by using parallel detection and
|
||||
* Autonegotiation and the same is set in the MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to struct AT91S_EMAC
|
||||
* Return value:
|
||||
* TRUE - if link status set succesfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
UCHAR lxt972_InitPhy (AT91PS_EMAC p_mac)
|
||||
{
|
||||
UCHAR ret = TRUE;
|
||||
|
||||
at91rm9200_EmacEnableMDIO (p_mac);
|
||||
|
||||
if (!lxt972_GetLinkSpeed (p_mac)) {
|
||||
/* Try another time */
|
||||
ret = lxt972_GetLinkSpeed (p_mac);
|
||||
}
|
||||
|
||||
/* Disable PHY Interrupts */
|
||||
at91rm9200_EmacWritePhy (p_mac, PHY_LXT971_INT_ENABLE, 0);
|
||||
|
||||
at91rm9200_EmacDisableMDIO (p_mac);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* lxt972_AutoNegotiate
|
||||
* Description:
|
||||
* MAC Autonegotiates with the partner status of same is set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* dev - pointer to struct net_device
|
||||
* Return value:
|
||||
* TRUE - if link status set successfully
|
||||
* FALSE - if link status not set
|
||||
*/
|
||||
UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
|
||||
{
|
||||
unsigned short value;
|
||||
|
||||
/* Set lxt972 control register */
|
||||
if (!at91rm9200_EmacReadPhy (p_mac, MII_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
/* Restart Auto_negotiation */
|
||||
value |= BMCR_ANRESTART;
|
||||
if (!at91rm9200_EmacWritePhy (p_mac, MII_BMCR, &value))
|
||||
return FALSE;
|
||||
|
||||
/*check AutoNegotiate complete */
|
||||
udelay (10000);
|
||||
at91rm9200_EmacReadPhy(p_mac, MII_BMSR, &value);
|
||||
if (!(value & BMSR_ANEGCOMPLETE))
|
||||
return FALSE;
|
||||
|
||||
return (lxt972_GetLinkSpeed (p_mac));
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_DRIVER_ETHER */
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Lineo, Inc. <www.lineo.com>
|
||||
* Bernhard Kuhn <bkuhn@lineo.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
void board_reset(void) __attribute__((__weak__));
|
||||
|
||||
/*
|
||||
* Reset the cpu by setting up the watchdog timer and let him time out
|
||||
* or toggle a GPIO pin on the AT91RM9200DK board
|
||||
*/
|
||||
void reset_cpu (ulong ignored)
|
||||
{
|
||||
|
||||
#if defined(CONFIG_AT91RM9200_USART)
|
||||
/*shutdown the console to avoid strange chars during reset */
|
||||
serial_exit();
|
||||
#endif
|
||||
|
||||
if (board_reset)
|
||||
board_reset();
|
||||
|
||||
/* this is the way Linux does it */
|
||||
|
||||
/* FIXME:
|
||||
* These defines should be moved into
|
||||
* include/asm-arm/arch-at91rm9200/AT91RM9200.h
|
||||
* as soon as the whitespace fix gets applied.
|
||||
*/
|
||||
#define AT91C_ST_RSTEN (0x1 << 16)
|
||||
#define AT91C_ST_EXTEN (0x1 << 17)
|
||||
#define AT91C_ST_WDRST (0x1 << 0)
|
||||
#define ST_WDMR *((unsigned long *)0xfffffd08) /* watchdog mode register */
|
||||
#define ST_CR *((unsigned long *)0xfffffd00) /* system clock control register */
|
||||
|
||||
ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ;
|
||||
ST_CR = AT91C_ST_WDRST;
|
||||
|
||||
while (1);
|
||||
/* Never reached */
|
||||
}
|
||||
|
|
@ -0,0 +1,151 @@
|
|||
/* Driver for ATMEL DataFlash support
|
||||
* Author : Hamid Ikdoumi (Atmel)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#ifdef CONFIG_HAS_DATAFLASH
|
||||
#include <dataflash.h>
|
||||
|
||||
#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
|
||||
the Continuous Array Read function */
|
||||
|
||||
/* AC Characteristics */
|
||||
/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
|
||||
#define DATAFLASH_TCSS (0xC << 16)
|
||||
#define DATAFLASH_TCHS (0x1 << 24)
|
||||
|
||||
#define AT91C_TIMEOUT_WRDY 200000
|
||||
#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0: NPCS0%1110 */
|
||||
#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */
|
||||
|
||||
/*-------------------------------------------------------------------*/
|
||||
/* SPI DataFlash Init */
|
||||
/*-------------------------------------------------------------------*/
|
||||
void AT91F_SpiInit(void)
|
||||
{
|
||||
/* Configure PIOs */
|
||||
AT91C_BASE_PIOA->PIO_ASR =
|
||||
AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI |
|
||||
AT91C_PA5_NPCS2 | AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
|
||||
AT91C_PA2_SPCK;
|
||||
AT91C_BASE_PIOA->PIO_PDR =
|
||||
AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI |
|
||||
AT91C_PA5_NPCS2 | AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
|
||||
AT91C_PA2_SPCK;
|
||||
/* Enable CLock */
|
||||
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
|
||||
|
||||
/* Reset the SPI */
|
||||
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
|
||||
|
||||
/* Configure SPI in Master Mode with No CS selected !!! */
|
||||
AT91C_BASE_SPI->SPI_MR =
|
||||
AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
|
||||
|
||||
/* Configure CS0 and CS3 */
|
||||
*(AT91C_SPI_CSR + 0) =
|
||||
AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
|
||||
(AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
|
||||
((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
|
||||
|
||||
*(AT91C_SPI_CSR + 3) =
|
||||
AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
|
||||
(AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
|
||||
((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
|
||||
}
|
||||
|
||||
void AT91F_SpiEnable(int cs)
|
||||
{
|
||||
switch(cs) {
|
||||
case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
|
||||
AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
|
||||
AT91C_BASE_SPI->SPI_MR |=
|
||||
((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) &
|
||||
AT91C_SPI_PCS);
|
||||
break;
|
||||
case 3: /* Configure SPI CS3 for Serial DataFlash Card */
|
||||
/* Set up PIO SDC_TYPE to switch on DataFlash Card */
|
||||
/* and not MMC/SDCard */
|
||||
AT91C_BASE_PIOB->PIO_PER =
|
||||
AT91C_PIO_PB7; /* Set in PIO mode */
|
||||
AT91C_BASE_PIOB->PIO_OER =
|
||||
AT91C_PIO_PB7; /* Configure in output */
|
||||
/* Clear Output */
|
||||
AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
|
||||
/* Configure PCS */
|
||||
AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
|
||||
AT91C_BASE_SPI->SPI_MR |=
|
||||
((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
|
||||
break;
|
||||
}
|
||||
|
||||
/* SPI_Enable */
|
||||
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN; }
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/* \fn AT91F_SpiWrite */
|
||||
/* \brief Set the PDC registers for a transfert */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
|
||||
{
|
||||
unsigned int timeout;
|
||||
|
||||
pDesc->state = BUSY;
|
||||
|
||||
AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
|
||||
|
||||
/* Initialize the Transmit and Receive Pointer */
|
||||
AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
|
||||
AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
|
||||
|
||||
/* Intialize the Transmit and Receive Counters */
|
||||
AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
|
||||
AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
|
||||
|
||||
if ( pDesc->tx_data_size != 0 ) {
|
||||
/* Initialize the Next Transmit and Next Receive Pointer */
|
||||
AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
|
||||
AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
|
||||
|
||||
/* Intialize the Next Transmit and Next Receive Counters */
|
||||
AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
|
||||
AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
|
||||
}
|
||||
|
||||
/* arm simple, non interrupt dependent timer */
|
||||
reset_timer_masked();
|
||||
timeout = 0;
|
||||
|
||||
AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
|
||||
while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) &&
|
||||
((timeout = get_timer_masked() ) < CONFIG_SYS_SPI_WRITE_TOUT));
|
||||
AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
|
||||
pDesc->state = IDLE;
|
||||
|
||||
if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT){
|
||||
printf("Error Timeout\n\r");
|
||||
return DATAFLASH_ERROR;
|
||||
}
|
||||
|
||||
return DATAFLASH_OK;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,160 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Lineo, Inc. <www.lineo.com>
|
||||
* Bernhard Kuhn <bkuhn@lineo.com>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
/*#include <asm/io.h>*/
|
||||
#include <asm/arch/hardware.h>
|
||||
/*#include <asm/proc/ptrace.h>*/
|
||||
|
||||
/* the number of clocks per CONFIG_SYS_HZ */
|
||||
#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
|
||||
|
||||
/* macro to read the 16 bit timer */
|
||||
#define READ_TIMER (tmr->TC_CV & 0x0000ffff)
|
||||
AT91PS_TC tmr;
|
||||
|
||||
static ulong timestamp;
|
||||
static ulong lastinc;
|
||||
|
||||
int timer_init (void)
|
||||
{
|
||||
tmr = AT91C_BASE_TC0;
|
||||
|
||||
/* enables TC1.0 clock */
|
||||
*AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */
|
||||
|
||||
*AT91C_TCB0_BCR = 0;
|
||||
*AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
|
||||
tmr->TC_CCR = AT91C_TC_CLKDIS;
|
||||
#define AT91C_TC_CMR_CPCTRG (1 << 14)
|
||||
/* set to MCLK/2 and restart the timer when the vlaue in TC_RC is reached */
|
||||
tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK | AT91C_TC_CMR_CPCTRG;
|
||||
|
||||
tmr->TC_IDR = ~0ul;
|
||||
tmr->TC_RC = TIMER_LOAD_VAL;
|
||||
lastinc = 0;
|
||||
tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
|
||||
timestamp = 0;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* timer without interrupts
|
||||
*/
|
||||
|
||||
void reset_timer (void)
|
||||
{
|
||||
reset_timer_masked ();
|
||||
}
|
||||
|
||||
ulong get_timer (ulong base)
|
||||
{
|
||||
return get_timer_masked () - base;
|
||||
}
|
||||
|
||||
void set_timer (ulong t)
|
||||
{
|
||||
timestamp = t;
|
||||
}
|
||||
|
||||
void __udelay (unsigned long usec)
|
||||
{
|
||||
udelay_masked(usec);
|
||||
}
|
||||
|
||||
void reset_timer_masked (void)
|
||||
{
|
||||
/* reset time */
|
||||
lastinc = READ_TIMER;
|
||||
timestamp = 0;
|
||||
}
|
||||
|
||||
ulong get_timer_raw (void)
|
||||
{
|
||||
ulong now = READ_TIMER;
|
||||
|
||||
if (now >= lastinc) {
|
||||
/* normal mode */
|
||||
timestamp += now - lastinc;
|
||||
} else {
|
||||
/* we have an overflow ... */
|
||||
timestamp += now + TIMER_LOAD_VAL - lastinc;
|
||||
}
|
||||
lastinc = now;
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
ulong get_timer_masked (void)
|
||||
{
|
||||
return get_timer_raw()/TIMER_LOAD_VAL;
|
||||
}
|
||||
|
||||
void udelay_masked (unsigned long usec)
|
||||
{
|
||||
ulong tmo;
|
||||
ulong endtime;
|
||||
signed long diff;
|
||||
|
||||
tmo = CONFIG_SYS_HZ_CLOCK / 1000;
|
||||
tmo *= usec;
|
||||
tmo /= 1000;
|
||||
|
||||
endtime = get_timer_raw () + tmo;
|
||||
|
||||
do {
|
||||
ulong now = get_timer_raw ();
|
||||
diff = endtime - now;
|
||||
} while (diff >= 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (read timebase as long long).
|
||||
* On ARM it just returns the timer value.
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk (void)
|
||||
{
|
||||
ulong tbclk;
|
||||
|
||||
tbclk = CONFIG_SYS_HZ;
|
||||
return tbclk;
|
||||
}
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* (C) Copyright 2006
|
||||
* DENX Software Engineering <mk@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
|
||||
# ifdef CONFIG_AT91RM9200
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
int usb_cpu_init(void)
|
||||
{
|
||||
/* Enable USB host clock. */
|
||||
*AT91C_PMC_SCER = AT91C_PMC_UHP; /* 48MHz clock enabled for UHP */
|
||||
*AT91C_PMC_PCER = 1 << AT91C_ID_UHP; /* Peripheral Clock Enable Register */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_stop(void)
|
||||
{
|
||||
/* Initialization failed */
|
||||
*AT91C_PMC_PCDR = 1 << AT91C_ID_UHP; /* Peripheral Clock Disable Register */
|
||||
*AT91C_PMC_SCDR = AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_init_fail(void)
|
||||
{
|
||||
return usb_cpu_stop();
|
||||
}
|
||||
|
||||
# endif /* CONFIG_AT91RM9200 */
|
||||
#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
#
|
||||
# (C) Copyright 2002
|
||||
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
|
||||
|
||||
PLATFORM_CPPFLAGS += -march=armv4
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
#
|
||||
# =========================================================================
|
||||
PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* CPU specific code
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#ifdef CONFIG_AT91_LEGACY
|
||||
#warning Your board is using legacy AT91RM9200 SoC access. Please update!
|
||||
#endif
|
||||
|
||||
static void cache_flush(void);
|
||||
|
||||
int cleanup_before_linux (void)
|
||||
{
|
||||
/*
|
||||
* this function is called just before we call linux
|
||||
* it prepares the processor for linux
|
||||
*
|
||||
* we turn off caches etc ...
|
||||
*/
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
/* turn off I/D-cache */
|
||||
icache_disable();
|
||||
dcache_disable();
|
||||
/* flush I/D-cache */
|
||||
cache_flush();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* flush I/D-cache */
|
||||
static void cache_flush (void)
|
||||
{
|
||||
unsigned long i = 0;
|
||||
|
||||
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
|
||||
}
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
#
|
||||
# Cirrus Logic EP93xx CPU-specific Makefile
|
||||
#
|
||||
# Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
#
|
||||
# Copyright (C) 2004, 2005
|
||||
# Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
|
||||
#
|
||||
# Copyright (C) 2006
|
||||
# Dominic Rath <Dominic.Rath@gmx.de>
|
||||
#
|
||||
# Based on an original Makefile, which is
|
||||
#
|
||||
# (C) Copyright 2000, 2001, 2002
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful, but
|
||||
# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
# for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License along
|
||||
# with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
# 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
#
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS = cpu.o led.o speed.o timer.o
|
||||
SOBJS = lowlevel_init.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* Cirrus Logic EP93xx CPU-specific support.
|
||||
*
|
||||
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* Copyright (C) 2004, 2005
|
||||
* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
/* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */
|
||||
extern void reset_cpu(ulong addr)
|
||||
{
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
uint32_t value;
|
||||
|
||||
/* Unlock DeviceCfg and set SWRST */
|
||||
writel(0xAA, &syscon->sysswlock);
|
||||
value = readl(&syscon->devicecfg);
|
||||
value |= SYSCON_DEVICECFG_SWRST;
|
||||
writel(value, &syscon->devicecfg);
|
||||
|
||||
/* Unlock DeviceCfg and clear SWRST */
|
||||
writel(0xAA, &syscon->sysswlock);
|
||||
value = readl(&syscon->devicecfg);
|
||||
value &= ~SYSCON_DEVICECFG_SWRST;
|
||||
writel(value, &syscon->devicecfg);
|
||||
|
||||
/* Dying... */
|
||||
while (1)
|
||||
; /* noop */
|
||||
}
|
||||
|
|
@ -0,0 +1,101 @@
|
|||
/*
|
||||
* Copyright (C) 2010, 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <config.h>
|
||||
#include <status_led.h>
|
||||
|
||||
static uint8_t saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF};
|
||||
static uint32_t gpio_pin[2] = {1 << STATUS_LED_GREEN,
|
||||
1 << STATUS_LED_RED};
|
||||
|
||||
inline void switch_LED_on(uint8_t led)
|
||||
{
|
||||
register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
|
||||
|
||||
writel(readl(&gpio->pedr) | gpio_pin[led], &gpio->pedr);
|
||||
saved_state[led] = STATUS_LED_ON;
|
||||
}
|
||||
|
||||
inline void switch_LED_off(uint8_t led)
|
||||
{
|
||||
register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
|
||||
|
||||
writel(readl(&gpio->pedr) & ~gpio_pin[led], &gpio->pedr);
|
||||
saved_state[led] = STATUS_LED_OFF;
|
||||
}
|
||||
|
||||
void red_LED_on(void)
|
||||
{
|
||||
switch_LED_on(STATUS_LED_RED);
|
||||
}
|
||||
|
||||
void red_LED_off(void)
|
||||
{
|
||||
switch_LED_off(STATUS_LED_RED);
|
||||
}
|
||||
|
||||
void green_LED_on(void)
|
||||
{
|
||||
switch_LED_on(STATUS_LED_GREEN);
|
||||
}
|
||||
|
||||
void green_LED_off(void)
|
||||
{
|
||||
switch_LED_off(STATUS_LED_GREEN);
|
||||
}
|
||||
|
||||
void __led_init(led_id_t mask, int state)
|
||||
{
|
||||
__led_set(mask, state);
|
||||
}
|
||||
|
||||
void __led_toggle(led_id_t mask)
|
||||
{
|
||||
if (STATUS_LED_RED == mask) {
|
||||
if (STATUS_LED_ON == saved_state[STATUS_LED_RED])
|
||||
red_LED_off();
|
||||
else
|
||||
red_LED_on();
|
||||
} else if (STATUS_LED_GREEN == mask) {
|
||||
if (STATUS_LED_ON == saved_state[STATUS_LED_GREEN])
|
||||
green_LED_off();
|
||||
else
|
||||
green_LED_on();
|
||||
}
|
||||
}
|
||||
|
||||
void __led_set(led_id_t mask, int state)
|
||||
{
|
||||
if (STATUS_LED_RED == mask) {
|
||||
if (STATUS_LED_ON == state)
|
||||
red_LED_on();
|
||||
else
|
||||
red_LED_off();
|
||||
} else if (STATUS_LED_GREEN == mask) {
|
||||
if (STATUS_LED_ON == state)
|
||||
green_LED_on();
|
||||
else
|
||||
green_LED_off();
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/*
|
||||
* Low-level initialization for EP93xx
|
||||
*
|
||||
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* Copyright (C) 2006 Dominic Rath <Dominic.Rath@gmx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <version.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* backup return address */
|
||||
ldr r1, =SYSCON_SCRATCH0
|
||||
str lr, [r1]
|
||||
|
||||
/* Turn on both LEDs */
|
||||
bl red_LED_on
|
||||
bl green_LED_on
|
||||
|
||||
/* Configure flash wait states before we switch to the PLL */
|
||||
bl flash_cfg
|
||||
|
||||
/* Set up PLL */
|
||||
bl pll_cfg
|
||||
|
||||
/* Turn off the Green LED and leave the Red LED on */
|
||||
bl green_LED_off
|
||||
|
||||
/* Setup SDRAM */
|
||||
bl sdram_cfg
|
||||
|
||||
/* Turn on Green LED, Turn off the Red LED */
|
||||
bl green_LED_on
|
||||
bl red_LED_off
|
||||
|
||||
/* FIXME: we use async mode for now */
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #0xc0000000
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
|
||||
/* restore return address */
|
||||
ldr r1, =SYSCON_SCRATCH0
|
||||
ldr lr, [r1]
|
||||
|
||||
mov pc, lr
|
||||
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
* Cirrus Logic EP93xx PLL support.
|
||||
*
|
||||
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <asm/io.h>
|
||||
#include <div64.h>
|
||||
|
||||
/*
|
||||
* CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
|
||||
*
|
||||
* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
|
||||
* the specified bus in HZ.
|
||||
*/
|
||||
|
||||
/*
|
||||
* return the PLL output frequency
|
||||
*
|
||||
* PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1)
|
||||
* / (X2IPD + 1) / 2^PS
|
||||
*/
|
||||
static ulong get_PLLCLK(uint32_t *pllreg)
|
||||
{
|
||||
uint8_t i;
|
||||
const uint32_t clkset = readl(pllreg);
|
||||
uint64_t rate = CONFIG_SYS_CLK_FREQ;
|
||||
rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1;
|
||||
rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1;
|
||||
do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */
|
||||
for (i = 0; i < ((clkset >> SYSCON_CLKSET_PLL_PS_SHIFT) & 3); i++)
|
||||
rate >>= 1;
|
||||
|
||||
return (ulong)rate;
|
||||
}
|
||||
|
||||
/* return FCLK frequency */
|
||||
ulong get_FCLK()
|
||||
{
|
||||
const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
|
||||
const uint32_t clkset1 = readl(&syscon->clkset1);
|
||||
const uint8_t fclk_div =
|
||||
fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7];
|
||||
const ulong fclk_rate = get_PLLCLK(&syscon->clkset1) / fclk_div;
|
||||
|
||||
return fclk_rate;
|
||||
}
|
||||
|
||||
/* return HCLK frequency */
|
||||
ulong get_HCLK(void)
|
||||
{
|
||||
const uint8_t hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
|
||||
const uint32_t clkset1 = readl(&syscon->clkset1);
|
||||
const uint8_t hclk_div =
|
||||
hclk_divisors[(clkset1 >> SYSCON_CLKSET1_HCLK_DIV_SHIFT) & 7];
|
||||
const ulong hclk_rate = get_PLLCLK(&syscon->clkset1) / hclk_div;
|
||||
|
||||
return hclk_rate;
|
||||
}
|
||||
|
||||
/* return PCLK frequency */
|
||||
ulong get_PCLK(void)
|
||||
{
|
||||
const uint8_t pclk_divisors[] = { 1, 2, 4, 8 };
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
|
||||
const uint32_t clkset1 = readl(&syscon->clkset1);
|
||||
const uint8_t pclk_div =
|
||||
pclk_divisors[(clkset1 >> SYSCON_CLKSET1_PCLK_DIV_SHIFT) & 3];
|
||||
const ulong pclk_rate = get_HCLK() / pclk_div;
|
||||
|
||||
return pclk_rate;
|
||||
}
|
||||
|
||||
/* return UCLK frequency */
|
||||
ulong get_UCLK(void)
|
||||
{
|
||||
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
|
||||
ulong uclk_rate;
|
||||
|
||||
const uint32_t value = readl(&syscon->pwrcnt);
|
||||
if (value & SYSCON_PWRCNT_UART_BAUD)
|
||||
uclk_rate = CONFIG_SYS_CLK_FREQ;
|
||||
else
|
||||
uclk_rate = CONFIG_SYS_CLK_FREQ / 2;
|
||||
|
||||
return uclk_rate;
|
||||
}
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/*
|
||||
* Cirrus Logic EP93xx timer support.
|
||||
*
|
||||
* Copyright (C) 2009, 2010 Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
*
|
||||
* Copyright (C) 2004, 2005
|
||||
* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
|
||||
*
|
||||
* Based on the original intr.c Cirrus Logic EP93xx Rev D. interrupt support,
|
||||
* author unknown.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <linux/types.h>
|
||||
#include <asm/arch/ep93xx.h>
|
||||
#include <asm/io.h>
|
||||
#include <div64.h>
|
||||
|
||||
#define TIMER_CLKSEL (1 << 3)
|
||||
#define TIMER_ENABLE (1 << 7)
|
||||
|
||||
#define TIMER_FREQ 508469 /* ticks / second */
|
||||
#define TIMER_MAX_VAL 0xFFFFFFFF
|
||||
|
||||
static struct ep93xx_timer
|
||||
{
|
||||
unsigned long long ticks;
|
||||
unsigned long last_read;
|
||||
} timer;
|
||||
|
||||
static inline unsigned long long usecs_to_ticks(unsigned long usecs)
|
||||
{
|
||||
unsigned long long ticks = (unsigned long long)usecs * TIMER_FREQ;
|
||||
do_div(ticks, 1000 * 1000);
|
||||
|
||||
return ticks;
|
||||
}
|
||||
|
||||
static inline void read_timer(void)
|
||||
{
|
||||
struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
|
||||
const unsigned long now = TIMER_MAX_VAL - readl(&timer_regs->timer3.value);
|
||||
|
||||
if (now >= timer.last_read)
|
||||
timer.ticks += now - timer.last_read;
|
||||
else
|
||||
/* an overflow occurred */
|
||||
timer.ticks += TIMER_MAX_VAL - timer.last_read + now;
|
||||
|
||||
timer.last_read = now;
|
||||
}
|
||||
|
||||
/*
|
||||
* Get the number of ticks (in CONFIG_SYS_HZ resolution)
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
unsigned long long sys_ticks;
|
||||
|
||||
read_timer();
|
||||
|
||||
sys_ticks = timer.ticks * CONFIG_SYS_HZ;
|
||||
do_div(sys_ticks, TIMER_FREQ);
|
||||
|
||||
return sys_ticks;
|
||||
}
|
||||
|
||||
unsigned long get_timer_masked(void)
|
||||
{
|
||||
return get_ticks();
|
||||
}
|
||||
|
||||
unsigned long get_timer(unsigned long base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
void reset_timer_masked(void)
|
||||
{
|
||||
read_timer();
|
||||
timer.ticks = 0;
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
reset_timer_masked();
|
||||
}
|
||||
|
||||
void __udelay(unsigned long usec)
|
||||
{
|
||||
unsigned long long target;
|
||||
|
||||
read_timer();
|
||||
|
||||
target = timer.ticks + usecs_to_ticks(usec);
|
||||
|
||||
while (timer.ticks < target)
|
||||
read_timer();
|
||||
}
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
|
||||
|
||||
/* use timer 3 with 508KHz and free running, not enabled now */
|
||||
writel(TIMER_CLKSEL, &timer_regs->timer3.control);
|
||||
|
||||
/* set initial timer value */
|
||||
writel(TIMER_MAX_VAL, &timer_regs->timer3.load);
|
||||
|
||||
/* Enable the timer */
|
||||
writel(TIMER_ENABLE | TIMER_CLKSEL,
|
||||
&timer_regs->timer3.control);
|
||||
|
||||
reset_timer_masked();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
unsigned long get_tbclk(void)
|
||||
{
|
||||
return CONFIG_SYS_HZ;
|
||||
}
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
arch/arm/cpu/arm920t/start.o (.text)
|
||||
/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
|
||||
. = 0x1000;
|
||||
LONG(0x53555243)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(.rodata) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
.bss : { *(.bss) }
|
||||
__bss_end__ = .;
|
||||
|
||||
_end = .;
|
||||
}
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(SOC).o
|
||||
|
||||
COBJS += generic.o
|
||||
COBJS += speed.o
|
||||
COBJS += timer.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue