/* * Copyright (C) 2012 Holger Hans Peter Freyther * Copyright (C) 2009 Lyrtech RD Inc. * * Based on dvevm/dvevm.c, original copyright follows: * Copyright (C) 2007 Sergey Kubushyn * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ #ifndef __CONFIG_H #define __CONFIG_H #include /*=======*/ /* Board */ /*=======*/ #define SYSMOBTS_V2 /*===================*/ /* SoC Configuration */ /*===================*/ #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM644X /*====================*/ /* EEPROM definitions */ /*====================*/ #define CONFIG_SYS_EEPROM_DYNAMIC_SIZE 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 24xx02: 8 bytes / page */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 /*=============*/ /* Memory Info */ /*=============*/ #define CONFIG_SYS_MALLOC_LEN (0x10000 + 2048*1024) /* malloc() len */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ /*====================*/ /* Serial Driver info */ /*====================*/ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /*===================*/ /* I2C Configuration */ /*===================*/ #define CONFIG_HARD_I2C #define CONFIG_DRIVER_DAVINCI_I2C #define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ /*==================================*/ /* Network & Ethernet Configuration */ /*==================================*/ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_NET_MULTI /*=====================*/ /* Flash & Environment */ /*=====================*/ #define CONFIG_NAND_DAVINCI #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NAND_CS 2 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ #define CONFIG_ENV_SIZE SZ_16K #define MTDIDS_DEFAULT \ "nand0=davinci_nand.0" #define MTDPARTS_DEFAULT \ "mtdparts=davinci_nand.0:" \ "128k(U-Boot-Environment)ro," \ "384k(UBL)ro," \ "512k(U-Boot)ro," \ "-(RootFs)" #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ #define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define DEF_BOOTM "" /*==============================*/ /* U-Boot general configuration */ /*==============================*/ #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R #define CONFIG_BOOTDELAY 8 #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_DELAY_STR "bts-delay" #define CONFIG_AUTOBOOT_STOP_STR "bts-stop" #define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ #define CONFIG_SYS_PROMPT "sysmoBTSv2 > " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ #define CONFIG_SYS_LOAD_ADDR 0x87000000 /* default Linux kernel load address */ #define CONFIG_VERSION_VARIABLE #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC #undef CONFIG_MUSB_HCD #undef CONFIG_USB_DAVINCI /*===================*/ /* Linux Information */ /*===================*/ #define LINUX_BOOT_PARAM_ADDR 0x80000100 #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS "console=ttyS0,115200n8 root=ubi0:sysmobts-v2-rootfs ubi.mtd=3 rootfstype=ubifs rw noinitrd" #define CONFIG_BOOTCOMMAND "mtdpart default;setenv bootargs ${bootargs} ${mtdparts};ubi part RootFs;ubifsmount sysmobts-v2-rootfs;ubifsload 85000000 /boot/uImage;bootm 85000000" /*=================*/ /* U-Boot commands */ /*=================*/ #include #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS #define CONFIG_CMD_NAND /*=======================*/ /* KGDB support (if any) */ /*=======================*/ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ #endif #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) /*=======================*/ /* File system */ /*=======================*/ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_RBTREE #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_MTD_PARTITIONS #define CONFIG_CMD_MTDPARTS #define CONFIG_LZO /*=======================*/ /* LED handling */ /*=======================*/ #define CONFIG_STATUS_LED #define CONFIG_GPIO_LED #define CONFIG_BOARD_SPECIFIC_LED #define STATUS_LED_BIT 29 #define STATUS_LED_STATE STATUS_LED_OFF #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4) /* not really wanted */ #define CONFIG_CMD_LED #define CONFIG_DM644X_GPIO #define CONFIG_CMD_GPIO /*=======================*/ /* Recovery handling */ /*=======================*/ #define CONFIG_PREBOOT #define CONFIG_CMD_RECOVERY #define CONFIG_NETCONSOLE #define CONFIG_BOARD_LATE_INIT /* bdinfo should show the clocks */ #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS #endif #endif /* __CONFIG_H */