8ca79b2ff4
Pad config registers exist in APB_MISC_GP space, and control slew rate, drive strengh, schmidt, high-speed, and low-power modes for all of the pingroups in Tegra30. This builds off of the pinmux way of constructing init tables to configure select pads (SDIOCFG, for instance) during pinmux_init(). Currently, only SDIO1CFG is changed as per the TRM to work with the SD-card slot on Cardhu. Thanks to StephenW for the suggestion/original idea. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
||
|---|---|---|
| .. | ||
| clock-tables.h | ||
| clock.h | ||
| flow.h | ||
| funcmux.h | ||
| gp_padctrl.h | ||
| gpio.h | ||
| hardware.h | ||
| pinmux.h | ||
| pmu.h | ||
| spl.h | ||
| tegra.h | ||