u-boot/arch/arm/lib
Marek Vasut a592e6fb7f arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7
The arch/arm/lib/cache-cp15.c checks for CONFIG_ARMV7 and if this macro is
set, it configures TTBR0 register. This register must be configured for the
cache on ARMv7 to operate correctly.

The problem is that noone actually sets the CONFIG_ARMV7 macro and thus the
TTBR0 is not configured at all. On SoCFPGA, this produces all sorts of minor
issues which are hard to replicate, for example certain USB sticks are not
detected or QSPI NOR sometimes fails to write pages completely.

The solution is to replace CONFIG_ARMV7 test with CONFIG_CPU_V7 one. This is
correct because the code which added the test(s) for CONFIG_ARMV7 was added
shortly after CONFIG_ARMV7 was replaced by CONFIG_CPU_V7 and this code was
not adjusted correctly to reflect that change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Simon Glass <sjg@chromium.org>
2016-01-31 16:32:56 +01:00
..
_ashldi3.S arm: Add ENTRY/ENDPROC to private libgcc functions 2015-07-07 11:39:22 +02:00
_ashrdi3.S arm: Add ENTRY/ENDPROC to private libgcc functions 2015-07-07 11:39:22 +02:00
_divsi3.S arm: Add ENTRY/ENDPROC to private libgcc functions 2015-07-07 11:39:22 +02:00
_lshrdi3.S arm: Add ENTRY/ENDPROC to private libgcc functions 2015-07-07 11:39:22 +02:00
_modsi3.S arm: Add ENTRY/ENDPROC to private libgcc functions 2015-07-07 11:39:22 +02:00
_udivsi3.S arm: Add ENTRY/ENDPROC to private libgcc functions 2015-07-07 11:39:22 +02:00
_umodsi3.S arm: Add ENTRY/ENDPROC to private libgcc functions 2015-07-07 11:39:22 +02:00
asm-offsets.c ARM: remove jadecpu board support 2015-02-24 17:06:51 -05:00
bootm-fdt.c arch/arm/lib/bootm-fdt.c: Guard the include of <asm/armv7.h> 2015-05-14 11:07:03 -04:00
bootm.c ARM: bootm: Try to use relocated ramdisk 2016-01-21 20:03:59 -07:00
cache-cp15.c arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7 2016-01-31 16:32:56 +01:00
cache-pl310.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
cache.c arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD 2015-11-10 15:03:48 +01:00
ccn504.S armv8: Add framework for CCN-504 interconnect configuration 2015-09-01 21:37:49 -05:00
cmd_boot.c common/cmd_boot: keep ARM v7M in thumb mode during do_go_exec() 2015-05-28 08:18:23 -04:00
crt0.S arm: move gd handling outside of C code 2016-01-13 21:05:18 -05:00
crt0_64.S arm: initialize gd for AArch64 2016-01-14 16:27:13 -05:00
debug.S arm: debug: adjust for U-Boot 2014-10-26 22:23:40 +01:00
div0.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
eabi_compat.c eabi_compat: add __aeabi_memcpy __aeabi_memset 2014-09-09 13:51:11 +02:00
gic_64.S armv8/gic: Fix GIC v2 initialization 2015-10-15 14:47:03 +02:00
interrupts.c spl, common, serial: build SPL without serial support 2015-08-12 20:47:13 -04:00
interrupts_64.c arm64: core support 2014-01-09 16:08:44 +01:00
interrupts_m.c Change e-mail address of Kamil Lulko 2015-12-05 18:22:32 -05:00
Makefile arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD 2015-11-10 15:03:48 +01:00
memcpy.S arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD 2015-11-10 15:03:48 +01:00
memset.S arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD 2015-11-10 15:03:48 +01:00
relocate.S ARM: Add ARMv7-M support 2015-04-22 12:14:55 -04:00
relocate_64.S armv8/cache: Flush D-cache, invalidate I-cache for relocation 2014-04-07 17:43:36 +02:00
reset.c arm:reset: call the reset_misc() before the cpu reset 2014-09-05 13:58:49 +09:00
sections.c ARM: HYP/non-sec: add separate section for secure code 2014-07-28 17:07:23 +02:00
semihosting.c arm: fix compile warnings when semihosting is enabled on ARMv7M target. 2015-11-10 09:45:36 +01:00
spl.c ARM: SPL: Use CONFIG_SPL_DM not CONFIG_DM 2015-08-12 20:48:07 -04:00
stack.c common/board_f: factor out reserve_stacks 2015-02-17 22:52:42 +01:00
vectors.S arm: make .vectors section allocatable 2014-10-29 09:02:17 -04:00
vectors_m.S Change e-mail address of Kamil Lulko 2015-12-05 18:22:32 -05:00