3d1957f0ea
Add a new I2C_MUX uclass. Devices in this class can multiplex between several I2C buses, selecting them one at a time for use by the system. The multiplexing mechanism is left to the driver to decide - it may be controlled by GPIOs, for example. The uclass supports only two methods: select() and deselect(). The current mux state is expected to be stored in the mux itself since it is the only thing that knows how to make things work. The mux can record the current state and then avoid switching unless it is necessary. So select() can be skipped if the mux is already in the correct state. Also deselect() can be made a nop if required. Signed-off-by: Simon Glass <sjg@chromium.org>
66 lines
2.1 KiB
C
66 lines
2.1 KiB
C
/*
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* Copyright (c) 2013 Google, Inc
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*
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* (C) Copyright 2012
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* Pavel Herrmann <morpheus.ibis@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _DM_UCLASS_ID_H
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#define _DM_UCLASS_ID_H
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/* TODO(sjg@chromium.org): this could be compile-time generated */
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enum uclass_id {
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/* These are used internally by driver model */
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UCLASS_ROOT = 0,
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UCLASS_DEMO,
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UCLASS_TEST,
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UCLASS_TEST_FDT,
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UCLASS_TEST_BUS,
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UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
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UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
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UCLASS_PCI_EMUL, /* sandbox PCI device emulator */
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UCLASS_USB_EMUL, /* sandbox USB bus device emulator */
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UCLASS_SIMPLE_BUS, /* bus with child devices */
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/* U-Boot uclasses start here - in alphabetical order */
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UCLASS_CLK, /* Clock source, e.g. used by peripherals */
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UCLASS_CPU, /* CPU, typically part of an SoC */
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UCLASS_CROS_EC, /* Chrome OS EC */
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UCLASS_DISPLAY_PORT, /* Display port video */
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UCLASS_RAM, /* RAM controller */
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UCLASS_ETH, /* Ethernet device */
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UCLASS_GPIO, /* Bank of general-purpose I/O pins */
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UCLASS_I2C, /* I2C bus */
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UCLASS_I2C_EEPROM, /* I2C EEPROM device */
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UCLASS_I2C_GENERIC, /* Generic I2C device */
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UCLASS_I2C_MUX, /* I2C multiplexer */
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UCLASS_LED, /* Light-emitting diode (LED) */
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UCLASS_LPC, /* x86 'low pin count' interface */
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UCLASS_MASS_STORAGE, /* Mass storage device */
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UCLASS_MMC, /* SD / MMC card or chip */
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UCLASS_MOD_EXP, /* RSA Mod Exp device */
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UCLASS_PCH, /* x86 platform controller hub */
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UCLASS_PCI, /* PCI bus */
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UCLASS_PCI_GENERIC, /* Generic PCI bus device */
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UCLASS_PMIC, /* PMIC I/O device */
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UCLASS_REGULATOR, /* Regulator device */
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UCLASS_RESET, /* Reset device */
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UCLASS_RTC, /* Real time clock device */
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UCLASS_SERIAL, /* Serial UART */
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UCLASS_SPI, /* SPI bus */
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UCLASS_SPI_FLASH, /* SPI flash */
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UCLASS_SPI_GENERIC, /* Generic SPI flash target */
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UCLASS_SYSCON, /* System configuration device */
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UCLASS_THERMAL, /* Thermal sensor */
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UCLASS_USB, /* USB bus */
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UCLASS_USB_DEV_GENERIC, /* USB generic device */
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UCLASS_USB_HUB, /* USB hub */
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UCLASS_COUNT,
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UCLASS_INVALID = -1,
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};
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#endif
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