u-boot/arch/arc
Alexey Brodkin db6ce2312d arc: cache - utilize IO coherency (AKA IOC) engine
With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-02-20 11:20:05 +03:00
..
cpu arc: make sure _start is in the beginning of .text section 2015-04-10 18:45:34 +03:00
dts axs103: add support of generic OHCI USB 1.1 controller 2015-12-21 23:29:04 +03:00
include/asm arc: cache - utilize IO coherency (AKA IOC) engine 2016-02-20 11:20:05 +03:00
lib arc: cache - utilize IO coherency (AKA IOC) engine 2016-02-20 11:20:05 +03:00
config.mk arc: use more universal prefix for default CROSS_COMPILE 2015-05-13 13:44:25 +03:00
Kconfig arc: cache - accommodate different L1 cache line lengths 2016-02-20 11:19:53 +03:00
Makefile arc: introduce separate section for interrupt vector table 2015-01-15 22:38:42 +03:00