5c55572ff7
The MSATA feature is a board-specific feature on Gateworks Ventana boards. In most cases a 2:1 mux will steer either PCIe or SATA to a miniPCIe socket through an MSATA_EN gpio. In these such cases assign the gpio in the board specific struct and use its presence to determine if we default the GPIO to PCIe and if we later steer it according to hwconfig. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
96 lines
2.5 KiB
C
96 lines
2.5 KiB
C
/*
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* Copyright (C) 2013 Gateworks Corporation
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*
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* Author: Tim Harvey <tharvey@gateworks.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _GWVENTANA_COMMON_H_
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#define _GWVENTANA_COMMON_H_
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#include "ventana_eeprom.h"
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/* GPIO's common to all baseboards */
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#define GP_PHY_RST IMX_GPIO_NR(1, 30)
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#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
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#define GP_SD3_CD IMX_GPIO_NR(7, 0)
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#define GP_RS232_EN IMX_GPIO_NR(2, 11)
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#define GP_MSATA_SEL IMX_GPIO_NR(2, 8)
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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#define SPI_PAD_CTRL (PAD_CTL_HYS | \
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PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_ODE | PAD_CTL_SRE_FAST)
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#define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
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#define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION)
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#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
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/*
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* each baseboard has 4 user configurable Digital IO lines which can
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* be pinmuxed as a GPIO or in some cases a PWM
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*/
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struct dio_cfg {
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iomux_v3_cfg_t gpio_padmux[2];
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unsigned gpio_param;
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iomux_v3_cfg_t pwm_padmux[2];
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unsigned pwm_param;
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};
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struct ventana {
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/* pinmux */
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iomux_v3_cfg_t const *gpio_pads;
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int num_pads;
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/* DIO pinmux/val */
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struct dio_cfg dio_cfg[4];
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int num_gpios;
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/* various gpios (0 if non-existent) */
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int leds[3];
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int pcie_rst;
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int mezz_pwren;
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int mezz_irq;
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int rs485en;
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int gps_shdn;
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int vidin_en;
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int dioi2c_en;
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int pcie_sson;
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int usb_sel;
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int wdis;
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int msata_en;
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};
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extern struct ventana gpio_cfg[GW_UNKNOWN];
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/* configure i2c iomux */
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void setup_ventana_i2c(void);
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/* configure uart iomux */
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void setup_iomux_uart(void);
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/* conifgure PMIC */
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void setup_pmic(void);
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/* configure gpio iomux/defaults */
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void setup_iomux_gpio(int board, struct ventana_board_info *);
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/* late setup of GPIO (configuration per baseboard and env) */
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void setup_board_gpio(int board, struct ventana_board_info *);
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#endif /* #ifndef _GWVENTANA_COMMON_H_ */
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