Franck Jullien c346cf1350 openrisc: update SPR registers definition ... The OpenRISC architecture specification v1.0 defines new SPR registers. This patch adds registers definition for group 0 and update bit definitions for the CPU configuration register. Signed-off-by: Franck Jullien <franck.jullien@gmail.com>		2014-06-05 14:44:56 -04:00
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asm	openrisc: update SPR registers definition	2014-06-05 14:44:56 -04:00