u-boot/doc/device-tree-bindings/misc
Stefan Roese 9b5dbe1358 x86: baytrail: Add documentation for FSP memory-down values
This patch adds the documentation for the memory-down parameters
of the Intel FSP. To configure a board without SPD DDR DIMM but
with onboard DDR chips. The values are taken from the coreboot
header:

	src/soc/intel/fsp_baytrail/chip.h

(git ID da1a70ea from 2016-01-16 as reference).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Andrew Bradford <andrew.bradford@kodakalaris.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-28 13:53:29 +08:00
..
altera_sysid.txt nios2: convert altera sysid to driver model 2015-10-23 07:37:03 +08:00
cros-ec.txt cros: add cros_ec driver 2013-06-26 10:07:11 -04:00
intel,baytrail-fsp.txt x86: baytrail: Add documentation for FSP memory-down values 2016-01-28 13:53:29 +08:00
intel,irq-router.txt x86: dts: Fix typo in intel,irq-router.txt 2015-08-05 08:42:42 -06:00
intel-lpc.txt x86: ivybridge: Add additional LPC init 2014-11-25 06:34:01 -07:00