u-boot/arch/mips
Daniel Schwierzeck ab2a98b117 MIPS: make cache operation mode configurable
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.

This patch makes the cache operation mode configurable via board config.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
..
cpu/mips32 MIPS: make cache operation mode configurable 2011-07-31 23:26:41 +09:00
include/asm MIPS: Purple: Remove Purple support 2011-04-02 22:07:12 +09:00
lib unify version_string 2011-07-28 17:22:53 +02:00
config.mk MIPS: Introduce --gc-sections for MIPS 2011-05-10 00:08:10 +09:00