rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
18 lines
432 B
Makefile
18 lines
432 B
Makefile
#
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# Copyright (c) 2014 Google, Inc
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
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obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
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else
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obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
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endif
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obj-y += rk_timer.o
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obj-y += rk_early_print.o
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obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o
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obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
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obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
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