u-boot/arch/x86/include/asm/arch-queensbay
Bin Meng 9c7dea602e x86: Refactor PIRQ routing support
PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-06-04 02:39:39 -06:00
..
fsp x86: Adjust the FSP types slightly 2015-02-05 22:16:43 -07:00
device.h x86: queensbay: Implement PIRQ routing 2015-04-29 18:51:49 -06:00
gpio.h x86: ich6-gpio: Add Intel Tunnel Creek GPIO support 2014-12-18 17:26:06 -07:00
tnc.h x86: queensbay: Implement PIRQ routing 2015-04-29 18:51:49 -06:00