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u-boot/cpu/arm_cortexa8/omap3
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Nishanth Menon d414aae552 OMAP3: Fix SDRC init 
Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits

Signed-off-by: Nishanth Menon <nm@ti.com>
2009-11-27 16:26:17 -06:00
..
board.c OMAP3 Move cache routine to cache.S 2009-10-13 06:17:33 -05:00
cache.S OMAP3 Move cache routine to cache.S 2009-10-13 06:17:33 -05:00
clock.c omap3: remove typedefs for configuration structs 2009-08-08 11:33:23 +02:00
gpio.c OMAP3 Port kernel omap gpio interface. 2009-06-12 20:39:50 +02:00
lowlevel_init.S omap3: bug fix for NOR boot support 2009-08-08 11:59:40 +02:00
Makefile OMAP3 Move cache routine to cache.S 2009-10-13 06:17:33 -05:00
mem.c OMAP3: Fix SDRC init 2009-11-27 16:26:17 -06:00
reset.S ARM Cortex A8: Move OMAP3 specific reset handler 2009-07-22 23:39:42 +02:00
sys_info.c OMAP3:SDRC: Cleanup references to SDP 2009-11-27 16:26:16 -06:00
syslib.c OMAP3: Add common clock, memory and low level code 2009-01-24 17:51:21 +01:00
timer.c omap3: remove typedefs for configuration structs 2009-08-08 11:33:23 +02:00