u-boot/arch/x86/include/asm/arch-quark
Bin Meng c6d4705f41 x86: quark: Configure MTRR to enable cache
Quark SoC does not support MSR MTRRs. Fixed and variable range MTRRs
are accessed indirectly via the message port and not the traditional
MSR mechanism. Only UC, WT and WB cache types are supported.

We configure all the fixed range MTRRs with common values (VGA RAM
as UC, others as WB) and 3 variable range MTRRs for ROM/eSRAM/RAM as
WB, which significantly improves the boot time performance.

With this commit, it takes only 2 seconds for U-Boot to boot to shell
on Intel Galileo board. Previously it took about 6 seconds.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2015-09-16 19:53:53 -06:00
..
device.h x86: quark: Implement PIRQ routing 2015-06-04 02:39:39 -06:00
gpio.h x86: Add basic Intel Quark processor support 2015-02-06 12:07:41 -07:00
mrc.h x86: quark: Add Memory Reference Code (MRC) main routines 2015-02-06 12:07:42 -07:00
msg_port.h x86: quark: Add clrbits, setbits, clrsetbits macros for message port access 2015-09-16 19:53:52 -06:00
quark.h x86: quark: Configure MTRR to enable cache 2015-09-16 19:53:53 -06:00