Moved the SRIO init out of corenet_ds and into common code for 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe controllers for SRIO. We utilize the fact that SRIO is over serdes to determine if its configured or not and thus can setup the LAWs needed for it dynamically. We additionally update the device tree (to remove the SRIO nodes) if the board doesn't have SRIO enabled. Introduced the following standard defines for board config.h: CONFIG_SYS_SRIO - Chip has SRIO or not CONFIG_SRIO1 - Board has SRIO 1 port available CONFIG_SRIO2 - Board has SRIO 2 port available (where 'n' is the port #) CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup) CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup) [ These mimic what we have for PCI and PCIe controllers ] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
263 lines
7.6 KiB
C
263 lines
7.6 KiB
C
/*
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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* This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
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* arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
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* cpu specific common code for 85xx/86xx processors.
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <asm/mp.h>
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#include <asm/fsl_enet.h>
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#include <asm/fsl_serdes.h>
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#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
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static int ft_del_cpuhandle(void *blob, int cpuhandle)
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{
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int off, ret = -FDT_ERR_NOTFOUND;
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/* if we find a match, we'll delete at it which point the offsets are
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* invalid so we start over from the beginning
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*/
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off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
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&cpuhandle, 4);
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while (off != -FDT_ERR_NOTFOUND) {
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fdt_delprop(blob, off, "cpu-handle");
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ret = 1;
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off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
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&cpuhandle, 4);
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}
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return ret;
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}
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void ft_fixup_num_cores(void *blob) {
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int off, num_cores, del_cores;
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del_cores = 0;
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num_cores = cpu_numcores();
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off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
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while (off != -FDT_ERR_NOTFOUND) {
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u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
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if ((*reg > num_cores-1) || (is_core_disabled(*reg))) {
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int ph = fdt_get_phandle(blob, off);
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/* Delete the cpu node once there are no cpu handles */
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if (-FDT_ERR_NOTFOUND == ft_del_cpuhandle(blob, ph)) {
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fdt_del_node(blob, off);
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del_cores++;
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}
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/* either we deleted some cpu handles or the cpu node
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* so we reset the offset back to the start since we
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* can't trust the offsets anymore
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*/
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off = -1;
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}
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off = fdt_node_offset_by_prop_value(blob, off,
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"device_type", "cpu", 4);
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}
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debug ("%x core system found\n", num_cores);
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debug ("deleted %d extra core entry entries from device tree\n",
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del_cores);
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}
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#endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */
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#ifdef CONFIG_HAS_FSL_DR_USB
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void fdt_fixup_dr_usb(void *blob, bd_t *bd)
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{
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char *mode;
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char *type;
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const char *compat = "fsl-usb2-dr";
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const char *prop_mode = "dr_mode";
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const char *prop_type = "phy_type";
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int node_offset;
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int err;
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mode = getenv("usb_dr_mode");
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type = getenv("usb_phy_type");
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if (!mode && !type)
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return;
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node_offset = fdt_node_offset_by_compatible(blob, 0, compat);
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if (node_offset < 0) {
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printf("WARNING: could not find compatible node %s: %s.\n",
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compat, fdt_strerror(node_offset));
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return;
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}
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if (mode) {
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err = fdt_setprop(blob, node_offset, prop_mode, mode,
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strlen(mode) + 1);
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if (err < 0)
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printf("WARNING: could not set %s for %s: %s.\n",
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prop_mode, compat, fdt_strerror(err));
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}
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if (type) {
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err = fdt_setprop(blob, node_offset, prop_type, type,
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strlen(type) + 1);
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if (err < 0)
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printf("WARNING: could not set %s for %s: %s.\n",
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prop_type, compat, fdt_strerror(err));
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}
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}
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#endif /* CONFIG_HAS_FSL_DR_USB */
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/*
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* update crypto node properties to a specified revision of the SEC
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* called with sec_rev == 0 if not on an E processor
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*/
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#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
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void fdt_fixup_crypto_node(void *blob, int sec_rev)
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{
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const struct sec_rev_prop {
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u32 sec_rev;
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u32 num_channels;
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u32 channel_fifo_len;
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u32 exec_units_mask;
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u32 descriptor_types_mask;
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} sec_rev_prop_list [] = {
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{ 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
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{ 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
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{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
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{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
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{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
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{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
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{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
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};
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char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
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sizeof("fsl,secX.Y")];
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int crypto_node, sec_idx, err;
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char *p;
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u32 val;
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/* locate crypto node based on lowest common compatible */
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crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
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if (crypto_node == -FDT_ERR_NOTFOUND)
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return;
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/* delete it if not on an E-processor */
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if (crypto_node > 0 && !sec_rev) {
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fdt_del_node(blob, crypto_node);
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return;
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}
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/* else we got called for possible uprev */
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for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
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if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
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break;
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if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
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puts("warning: unknown SEC revision number\n");
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return;
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}
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
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err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
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err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
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err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
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err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = 0;
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while (sec_idx >= 0) {
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p = compat_strlist + val;
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val += sprintf(p, "fsl,sec%d.%d",
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(sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
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sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
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sec_idx--;
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}
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err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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}
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#elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */
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void fdt_fixup_crypto_node(void *blob, int sec_rev)
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{
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if (!sec_rev)
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fdt_del_node_and_alias(blob, "crypto");
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}
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#endif
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int fdt_fixup_phy_connection(void *blob, int offset, enum fsl_phy_enet_if phyc)
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{
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static const char *fsl_phy_enet_if_str[] = {
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[MII] = "mii",
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[RMII] = "rmii",
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[GMII] = "gmii",
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[RGMII] = "rgmii",
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[RGMII_ID] = "rgmii-id",
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[RGMII_RXID] = "rgmii-rxid",
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[SGMII] = "sgmii",
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[TBI] = "tbi",
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[RTBI] = "rtbi",
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[XAUI] = "xgmii",
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[FSL_ETH_IF_NONE] = "",
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};
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if (phyc > ARRAY_SIZE(fsl_phy_enet_if_str))
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return fdt_setprop_string(blob, offset, "phy-connection-type", "");
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return fdt_setprop_string(blob, offset, "phy-connection-type",
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fsl_phy_enet_if_str[phyc]);
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}
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#ifdef CONFIG_SYS_SRIO
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void ft_srio_setup(void *blob)
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{
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#ifdef CONFIG_SRIO1
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if (!is_serdes_configured(SRIO1)) {
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fdt_del_node_and_alias(blob, "rio0");
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}
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#else
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fdt_del_node_and_alias(blob, "rio0");
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#endif
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#ifdef CONFIG_SRIO2
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if (!is_serdes_configured(SRIO2)) {
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fdt_del_node_and_alias(blob, "rio1");
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}
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#else
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fdt_del_node_and_alias(blob, "rio1");
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#endif
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}
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#endif
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