u-boot/board/freescale/imx/ddr
Fabio Estevam 7a56f1791d imx: mx6q_4x_mt41j128.cfg: Setup CCM_CCOSR register
Setup CCM_CCOSR register to provide a CKO1 clock frequency of 16.5 MHz.

CKO1 drives sgtl5000 codec clock on mx6qsabrelite and doing this setup in the
bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c
from the mainline kernel.

mx6q_4x_mt41j128.cfg is also used by mx6qsabresd, and it is safe to use it for
this board as well.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-25 21:14:19 +02:00
..
mx6q_4x_mt41j128.cfg imx: mx6q_4x_mt41j128.cfg: Setup CCM_CCOSR register 2013-04-25 21:14:19 +02:00