u-boot/lib_nios2/cache.S
wdenk 5c952cf024 Patches by Scott McNutt, 24 Aug 2004:
- Add support for Altera Nios-II processors.
- Add support for Psyent PCI-5441 board.
- Add support for Psyent PK1C20 board.
2004-10-10 21:27:30 +00:00

75 lines
1.6 KiB
ArmAsm

/*
* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
* Scott McNutt <smcnutt@psyent.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
.text
.global flush_dcache
flush_dcache:
add r5, r5, r4
movhi r8, %hi(CFG_DCACHELINE_SIZE)
ori r8, r8, %lo(CFG_DCACHELINE_SIZE)
0: flushd 0(r4)
add r4, r4, r8
bltu r4, r5, 0b
ret
.global flush_icache
flush_icache:
add r5, r5, r4
movhi r8, %hi(CFG_ICACHELINE_SIZE)
ori r8, r8, %lo(CFG_ICACHELINE_SIZE)
1: flushi r4
add r4, r4, r8
bltu r4, r5, 1b
ret
.global flush_cache
flush_cache:
add r5, r5, r4
mov r9, r4
mov r10, r5
movhi r8, %hi(CFG_DCACHELINE_SIZE)
ori r8, r8, %lo(CFG_DCACHELINE_SIZE)
0: flushd 0(r4)
add r4, r4, r8
bltu r4, r5, 0b
mov r4, r9
mov r5, r10
movhi r8, %hi(CFG_ICACHELINE_SIZE)
ori r8, r8, %lo(CFG_ICACHELINE_SIZE)
1: flushi r4
add r4, r4, r8
bltu r4, r5, 1b
sync
flushp
ret