sysmobts: Be able to toggle the nWP on the flash through a GPIO
Starting from revision F we can toggle a GPIO to control nWP of the NAND chip. This means that during power-on or other mode of operation no changes can be done to the flash. Remove the nWP before we try to write to the flash in the UART mode. Leave it enabled for further operations.master
parent
92b4a3a288
commit
0974846c2d
1
board.h
1
board.h
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@ -40,6 +40,7 @@
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#if defined(board_sysmobts_v2)
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# define PINMUX0_DEFAULT 0x0000000F
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# define PINMUX1_DEFAULT PINMUX1_UART0 | PINMUX1_UART1
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# define NAND_nWP_GPIO 33
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#endif
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#endif /* _BOARD_H_ */
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10
davinci.c
10
davinci.c
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@ -566,13 +566,15 @@ psc_init(void)
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}
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int
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davinci_platform_init(char *version)
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davinci_platform_init(char *version, int *nwp_nand)
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{
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int pllCfg;
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int ddrCfg;
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int status = E_PASS;
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unsigned *gpio01 = (unsigned *)(DAVINCI_GPIO_BASE + 0x20);
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*nwp_nand = 0;
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psc_init();
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/* Disable ARM interrupts */
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@ -609,6 +611,12 @@ davinci_platform_init(char *version)
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char boardCfg;
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boardCfg = (*gpio01 >> 10) & 0x001F;
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boardVer = (*gpio01 >> 15) & 0x0007;
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if (boardVer == 5)
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{
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uart_send_str_lf("Board needs GPIO for nWP");
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*nwp_nand = 1;
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}
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if ( boardVer > 1 )
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{
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/* Davinci @ 405/810 MHz */
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@ -454,7 +454,7 @@ struct gpio_controller {
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#define GPIOC ((volatile struct gpio_controller *) DAVINCI_GPIO_BASE)
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int davinci_platform_init(char *version);
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int davinci_platform_init(char *version, int *nwp_nand);
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void ddr_vtp_calibration(void);
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void timer0_start(uint32_t period);
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13
nand.c
13
nand.c
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@ -25,6 +25,7 @@
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#include "davinci.h"
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#include "util.h"
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#include "uart.h"
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#include "gpio.h"
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#include "nand.h"
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/* BUS width defines */
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@ -1083,3 +1084,15 @@ nand_get_bytes_per_block(void)
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{
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return nand_info.pages_per_block * nand_info.bytes_per_page;
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}
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int
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nand_remove_nwp(int need_gpio)
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{
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#ifdef NAND_nWP_GPIO
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if (need_gpio) {
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gpio_direction_out(NAND_nWP_GPIO, 1);
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waitloop(50);
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}
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#endif
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return 0;
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}
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2
nand.h
2
nand.h
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@ -68,4 +68,6 @@ int nand_get_bytes_per_page(void);
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int nand_get_bytes_per_block(void);
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int nand_remove_nwp(int need_nwp_nand);
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#endif /* _NAND_H_ */
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2
uart.h
2
uart.h
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@ -34,7 +34,7 @@ struct uart_ack_header_t {
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uint8_t *inflate_dstbuf;
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};
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void uart_boot(uint32_t *jump_entry_point);
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void uart_boot(uint32_t *jump_entry_point, int need_npw_gpio);
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void uart_send_lf(void);
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void uart_send_str(char *string);
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@ -83,7 +83,7 @@ error:
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}
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void
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uart_boot(uint32_t *jump_entry_point)
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uart_boot(uint32_t *jump_entry_point, int need_nwp_nand)
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{
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#if defined(FLASH_TYPE_NAND)
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int wrote_copies = 0;
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@ -131,6 +131,7 @@ uart_boot(uint32_t *jump_entry_point)
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NOR_WriteBytes(nor_get_flashbase(), uart_ack_header.size,
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(uint32_t) uart_ack_header.recv_buffer);
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#elif defined(FLASH_TYPE_NAND)
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nand_remove_nwp(need_nwp_nand);
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wrote_copies = 0;
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for (block_num = START_UBL_BLOCK_NUM; block_num <= END_UBL_BLOCK_NUM; block_num++) {
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im_desc.magic = uart_ack_header.magic;
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@ -199,6 +200,7 @@ uart_boot(uint32_t *jump_entry_point)
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goto uartboot_error;
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#elif defined(FLASH_TYPE_NAND)
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/* Write multiple copy of U-Boot (depending on the defines in NAND.h) */
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nand_remove_nwp(need_nwp_nand);
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prog_ok = 0;
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wrote_copies = 0;
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for (block_num = START_UBOOT_BLOCK_NUM; (block_num+MAX_BLOCK_PER_UBOOT-1) <= END_UBOOT_BLOCK_NUM; block_num += MAX_BLOCK_PER_UBOOT) {
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@ -256,6 +258,7 @@ uart_boot(uint32_t *jump_entry_point)
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goto uartboot_error;
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}
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#elif defined(FLASH_TYPE_NAND)
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nand_remove_nwp(need_nwp_nand);
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if (nand_erase_all() != E_PASS) {
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log_info("Erase failed");
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goto uartboot_error;
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7
ubl.c
7
ubl.c
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@ -34,6 +34,7 @@
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#define C1_IC (1 << 12) /* icache off/on */
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static uint32_t jump_entry_point;
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static int need_nwp_nand;
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enum bootmode_t bootmode;
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@ -101,7 +102,7 @@ interrupt_me(void)
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return;
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log_info("Boot interrupted");
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uart_boot(&jump_entry_point);
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uart_boot(&jump_entry_point, need_nwp_nand);
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}
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#else
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static void
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@ -122,7 +123,7 @@ ubl_main(void)
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if (bootmode == NON_SECURE_UART)
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while ((UART0->LSR & 0x40) == 0);
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status = davinci_platform_init(UBL_VERSION_STR);
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status = davinci_platform_init(UBL_VERSION_STR, &need_nwp_nand);
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if (status != E_PASS)
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goto error;
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@ -169,7 +170,7 @@ ubl_main(void)
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break;
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default:
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UARTBOOT:
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uart_boot(&jump_entry_point);
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uart_boot(&jump_entry_point, need_nwp_nand);
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break;
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}
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