ARM: 6700/1: SPEAr: Correct SOC config base address for spear320

SPEAR320_SOC_CONFIG_BASE was wrong, causing the wrong registers to be
accessed.

Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
master
viresh kumar 12 years ago committed by Russell King
parent b8272a61c1
commit 167879ae89
  1. 2
      arch/arm/mach-spear3xx/include/mach/spear320.h

@ -62,7 +62,7 @@
#define SPEAR320_SMII1_BASE 0xAB000000
#define SPEAR320_SMII1_SIZE 0x01000000
#define SPEAR320_SOC_CONFIG_BASE 0xB4000000
#define SPEAR320_SOC_CONFIG_BASE 0xB3000000
#define SPEAR320_SOC_CONFIG_SIZE 0x00000070
/* Interrupt registers offsets and masks */
#define INT_STS_MASK_REG 0x04

Loading…
Cancel
Save