198 lines
7.5 KiB
C
198 lines
7.5 KiB
C
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/*
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* Copyright (c) 2015 Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @page misra_violations MISRA-C:2012 violations
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*
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* @section [global]
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* Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block
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* scope if its identifier only appears in a single function.
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* An object with static storage duration declared at block scope cannot be
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* accessed directly from outside the block.
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*
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* @section [global]
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* Violates MISRA 2012 Advisory Rule 11.4, A conversion should not be performed
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* between a pointer to object and an integer type.
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* The cast is required to initialize a pointer with an unsigned int define,
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* representing an address.
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*
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* @section [global]
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* Violates MISRA 2012 Required Rule 11.6, A cast shall not be performed
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* between pointer to void and an arithmetic type.
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* The cast is required to initialize a pointer with an unsigned int define,
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* representing an address.
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*
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* @section [global]
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* Violates MISRA 2012 Advisory Rule 8.7, External could be made static.
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* Function is defined for usage by application code.
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*
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*/
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#include "device_registers.h"
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#include "system_S32K144.h"
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#include "stdbool.h"
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/* ----------------------------------------------------------------------------
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-- Core clock
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---------------------------------------------------------------------------- */
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uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
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/*FUNCTION**********************************************************************
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*
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* Function Name : SystemInit
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* Description : This function disables the watchdog, enables FPU
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* and the power mode protection if the corresponding feature macro
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* is enabled. SystemInit is called from startup_device file.
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*
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* Implements : SystemInit_Activity
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*END**************************************************************************/
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void SystemInit(void)
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{
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/**************************************************************************/
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/* FPU ENABLE*/
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/**************************************************************************/
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#ifdef ENABLE_FPU
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/* Enable CP10 and CP11 coprocessors */
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S32_SCB->CPACR |= (S32_SCB_CPACR_CP10_MASK | S32_SCB_CPACR_CP11_MASK);
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#ifdef ERRATA_E6940
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/* Disable lazy context save of floating point state by clearing LSPEN bit
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* Workaround for errata e6940 */
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S32_SCB->FPCCR &= ~(S32_SCB_FPCCR_LSPEN_MASK);
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#endif
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#endif /* ENABLE_FPU */
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/**************************************************************************/
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/* WDOG DISABLE*/
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/**************************************************************************/
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#if (DISABLE_WDOG)
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/* Write of the WDOG unlock key to CNT register, must be done in order to allow any modifications*/
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WDOG->CNT = (uint32_t ) FEATURE_WDOG_UNLOCK_VALUE;
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/* The dummy read is used in order to make sure that the WDOG registers will be configured only
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* after the write of the unlock value was completed. */
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(void)WDOG->CNT;
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/* Initial write of WDOG configuration register:
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* enables support for 32-bit refresh/unlock command write words,
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* clock select from LPO, update enable, watchdog disabled */
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WDOG->CS = (uint32_t ) ( (1UL << WDOG_CS_CMD32EN_SHIFT) |
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(FEATURE_WDOG_CLK_FROM_LPO << WDOG_CS_CLK_SHIFT) |
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(0U << WDOG_CS_EN_SHIFT) |
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(1U << WDOG_CS_UPDATE_SHIFT) );
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/* Configure timeout */
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WDOG->TOVAL = (uint32_t )0xFFFF;
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#endif /* (DISABLE_WDOG) */
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/**************************************************************************/
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/* ENABLE CACHE */
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/**************************************************************************/
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#if defined(I_CACHE) && (ICACHE_ENABLE == 1)
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/* Invalidate and enable code cache */
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LMEM->PCCCR = LMEM_PCCCR_INVW0(1) | LMEM_PCCCR_INVW1(1) | LMEM_PCCCR_GO(1) | LMEM_PCCCR_ENCACHE(1);
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#endif /* defined(I_CACHE) && (ICACHE_ENABLE == 1) */
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : SystemCoreClockUpdate
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* Description : This function must be called whenever the core clock is changed
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* during program execution. It evaluates the clock register settings and calculates
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* the current core clock.
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*
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* Implements : SystemCoreClockUpdate_Activity
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*END**************************************************************************/
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void SystemCoreClockUpdate(void)
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{
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uint32_t SCGOUTClock = 0U; /* Variable to store output clock frequency of the SCG module */
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uint32_t regValue; /* Temporary variable */
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uint32_t divider, prediv, multi;
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bool validSystemClockSource = true;
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static const uint32_t fircFreq[] = {
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FEATURE_SCG_FIRC_FREQ0,
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};
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divider = ((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U;
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switch ((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT) {
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case 0x1:
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/* System OSC */
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SCGOUTClock = CPU_XTAL_CLK_HZ;
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break;
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case 0x2:
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/* Slow IRC */
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regValue = (SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT;
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if (regValue != 0U)
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{
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SCGOUTClock = FEATURE_SCG_SIRC_HIGH_RANGE_FREQ;
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}
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break;
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case 0x3:
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/* Fast IRC */
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regValue = (SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT;
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SCGOUTClock= fircFreq[regValue];
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break;
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case 0x6:
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/* System PLL */
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SCGOUTClock = CPU_XTAL_CLK_HZ;
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prediv = ((SCG->SPLLCFG & SCG_SPLLCFG_PREDIV_MASK) >> SCG_SPLLCFG_PREDIV_SHIFT) + 1U;
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multi = ((SCG->SPLLCFG & SCG_SPLLCFG_MULT_MASK) >> SCG_SPLLCFG_MULT_SHIFT) + 16U;
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SCGOUTClock = SCGOUTClock * multi / (prediv * 2U);
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break;
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default:
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validSystemClockSource = false;
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break;
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}
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if (validSystemClockSource == true) {
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SystemCoreClock = (SCGOUTClock / divider);
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}
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : SystemSoftwareReset
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* Description : This function is used to initiate a system reset
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*
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* Implements : SystemSoftwareReset_Activity
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*END**************************************************************************/
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void SystemSoftwareReset(void)
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{
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uint32_t regValue;
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/* Read Application Interrupt and Reset Control Register */
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regValue = S32_SCB->AIRCR;
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/* Clear register key */
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regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
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/* Configure System reset request bit and Register Key */
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regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
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regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
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/* Write computed register value */
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S32_SCB->AIRCR = regValue;
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}
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/*******************************************************************************
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* EOF
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******************************************************************************/
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