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- added support for CAN1 and CAN2 on the STM32CM4 target. 

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@57 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2013-08-15 14:20:46 +00:00
parent 4b214120a8
commit 02be6fef95
41 changed files with 3999 additions and 2827 deletions
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2
Host/openblt_uart.ini
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@ -1,5 +1,5 @@
[sci]
port=7
port=3
baudrate=8
[xcp]
seedkey=

BIN
Target/Demo/ARMCM3_STM32_Olimex_STM32P103_IAR/Boot/bin/openbtl_olimex_stm32p103.out
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Binary file not shown.

6
Target/Demo/ARMCM3_STM32_Olimex_STM32P103_IAR/Boot/bin/openbtl_olimex_stm32p103.srec
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@ -706,7 +706,7 @@ S31508002BF009480068401C08490860704780B5FFF717
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@ -785,8 +785,8 @@ S315080030E0A41C200000F047F90500AE19A41C200016
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S31508003150002802D15FF0FF309BE0FFB2002F03D0BA
S31508003160022F5AD028D392E0AD1C280000F003F9AC

10
Target/Demo/ARMCM3_STM32_Olimex_STM32P103_IAR/Boot/ide/settings/stm32f103.wsdt
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@ -12,12 +12,12 @@
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1604
Target/Demo/ARMCM3_STM32_Olimex_STM32P103_IAR/Boot/ide/stm32f103.dep
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File diff suppressed because it is too large Load Diff

BIN
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/bin/openbtl_olimex_stm32e407.elf
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Binary file not shown.

405
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/bin/openbtl_olimex_stm32e407.map
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@ -1633,6 +1633,18 @@ Discarded input sections
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.data 0x00000000 0x0 THUMB Debug/../../obj/uart.o
.bss 0x00000000 0x0 THUMB Debug/../../obj/uart.o
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.data 0x00000000 0x0 THUMB Debug/../../obj/can.o
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.debug_info 0x00000000 0x64 THUMB Debug/../../obj/can.o
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.debug_aranges
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.comment 0x00000000 0x4f THUMB Debug/../../obj/can.o
.ARM.attributes
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.data 0x00000000 0x0 THUMB Debug/../../obj/assert.o
.bss 0x00000000 0x0 THUMB Debug/../../obj/assert.o
@ -2449,7 +2461,7 @@ CM3_System_Control_Space 0xe000e000 0x00001000 xw
Linker script and memory map
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0x08006648 __do_debug_operation = __do_debug_operation_mempoll
0x08000000 __FLASH_segment_start__ = 0x8000000
0x08008000 __FLASH_segment_end__ = 0x8008000
0x10000000 __DATA_SRAM_segment_start__ = 0x10000000
@ -2534,7 +2546,7 @@ Linker script and memory map
0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= __FLASH_segment_end__)), error: .init is too large to fit in FLASH memory segment)
0x08000328 __text_load_start__ = ALIGN (__init_end__, 0x4)
.text 0x08000328 0x6340
.text 0x08000328 0x6364
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*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table .ARM.extab* .gnu.linkonce.armextab.*)
.glue_7 0x00000000 0x0 linker stubs
@ -2932,43 +2944,50 @@ Linker script and memory map
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.text.libc.__debug_io_unlock
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@ -2979,87 +2998,87 @@ Linker script and memory map
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0x14 (size before relaxing)
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.rodata.str1.4
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0x220 (size before relaxing)
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.rel.dyn 0x08000000 0x0
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0x08006fd4 __ARM.exidx_load_start__ = ALIGN (__rodata_end__, 0x4)
0x08006ff8 __ARM.exidx_load_start__ = ALIGN (__rodata_end__, 0x4)
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0x08006fd4 __ARM.exidx_start__ = .
0x08006fd4 __exidx_start = __ARM.exidx_start__
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0x08006ff8 __ARM.exidx_start__ = .
0x08006ff8 __exidx_start = __ARM.exidx_start__
*(.ARM.exidx .ARM.exidx.*)
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0x08006ff8 __exidx_end = __ARM.exidx_end__
0x08006ff8 __ARM.exidx_load_end__ = __ARM.exidx_end__
0x00000001 . = ASSERT (((__ARM.exidx_end__ >= __FLASH_segment_start__) && (__ARM.exidx_end__ <= __FLASH_segment_end__)), error: .ARM.exidx is too large to fit in FLASH memory segment)
0x08006fd4 __fast_load_start__ = ALIGN (__ARM.exidx_end__, 0x4)
0x08006ff8 __fast_load_start__ = ALIGN (__ARM.exidx_end__, 0x4)
.fast 0x20000000 0x0 load address 0x08006fd4
.fast 0x20000000 0x0 load address 0x08006ff8
0x20000000 __fast_start__ = .
*(.fast .fast.*)
0x20000000 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
0x08006fd4 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
0x08006ff8 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
0x00000001 . = ASSERT (((__fast_load_end__ >= __FLASH_segment_start__) && (__fast_load_end__ <= __FLASH_segment_end__)), error: .fast is too large to fit in FLASH memory segment)
.fast_run 0x20000000 0x0
@ -3068,9 +3087,9 @@ Linker script and memory map
0x20000000 __fast_run_end__ = (__fast_run_start__ + SIZEOF (.fast_run))
0x20000000 __fast_run_load_end__ = __fast_run_end__
0x00000001 . = ASSERT (((__fast_run_end__ >= __RAM_segment_start__) && (__fast_run_end__ <= __RAM_segment_end__)), error: .fast_run is too large to fit in RAM memory segment)
0x08006fd4 __data_load_start__ = ALIGN ((__fast_load_start__ + SIZEOF (.fast)), 0x4)
0x08006ff8 __data_load_start__ = ALIGN ((__fast_load_start__ + SIZEOF (.fast)), 0x4)
.data 0x20000000 0x18 load address 0x08006fd4
.data 0x20000000 0x18 load address 0x08006ff8
0x20000000 __data_start__ = .
*(.data .data.* .gnu.linkonce.d.*)
.data.DMAEndOfTransfer
@ -3080,13 +3099,13 @@ Linker script and memory map
.data.APBAHBPrescTable
0x20000008 0x10 THUMB Debug/../../obj/stm32f4xx_rcc.o
0x20000018 __data_end__ = (__data_start__ + SIZEOF (.data))
0x08006fec __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
0x08007010 __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
.igot.plt 0x00000000 0x0
.igot.plt 0x00000000 0x0 THUMB Debug/../../obj/mmc.o
0x00000001 . = ASSERT (((__data_load_end__ >= __FLASH_segment_start__) && (__data_load_end__ <= __FLASH_segment_end__)), error: .data is too large to fit in FLASH memory segment)
.data_run 0x20000000 0x18 load address 0x08006fd4
.data_run 0x20000000 0x18 load address 0x08006ff8
0x20000000 __data_run_start__ = .
0x20000018 . = MAX ((__data_run_start__ + SIZEOF (.data)), .)
*fill* 0x20000000 0x18 00
@ -3095,7 +3114,7 @@ Linker script and memory map
0x00000001 . = ASSERT (((__data_run_end__ >= __RAM_segment_start__) && (__data_run_end__ <= __RAM_segment_end__)), error: .data_run is too large to fit in RAM memory segment)
0x20000018 __bss_load_start__ = ALIGN (__data_run_end__, 0x4)
.bss 0x20000018 0x1028
.bss 0x20000018 0x1024
0x20000018 __bss_start__ = .
*(.bss .bss.* .gnu.linkonce.b.*)
.bss.TransferError
@ -3124,115 +3143,114 @@ Linker script and memory map
0x20000514 0x204 THUMB Debug/../../obj/flash.o
.bss.millisecond_counter
0x20000718 0x4 THUMB Debug/../../obj/timer.o
.bss.xcpCtoRxInProgress.7303
0x2000071c 0x1 THUMB Debug/../../obj/uart.o
*fill* 0x2000071d 0x3 00
.bss.xcpCtoReqPacket.7301
0x20000720 0x44 THUMB Debug/../../obj/uart.o
.bss.xcpCtoRxLength.7302
0x20000764 0x1 THUMB Debug/../../obj/uart.o
*fill* 0x20000765 0x3 00
.bss.xcpCtoReqPacket.7320
0x2000071c 0x44 THUMB Debug/../../obj/uart.o
.bss.xcpCtoRxLength.7321
0x20000760 0x1 THUMB Debug/../../obj/uart.o
.bss.xcpCtoRxInProgress.7322
0x20000761 0x1 THUMB Debug/../../obj/uart.o
*fill* 0x20000762 0x2 00
.bss.assert_failure_file
0x20000768 0x4 THUMB Debug/../../obj/assert.o
0x20000764 0x4 THUMB Debug/../../obj/assert.o
.bss.assert_failure_line
0x2000076c 0x4 THUMB Debug/../../obj/assert.o
0x20000768 0x4 THUMB Debug/../../obj/assert.o
.bss.backdoorOpen
0x20000770 0x1 THUMB Debug/../../obj/backdoor.o
*fill* 0x20000771 0x3 00
0x2000076c 0x1 THUMB Debug/../../obj/backdoor.o
*fill* 0x2000076d 0x3 00
.bss.backdoorOpenTime
0x20000774 0x4 THUMB Debug/../../obj/backdoor.o
0x20000770 0x4 THUMB Debug/../../obj/backdoor.o
.bss.comEntryStateConnect
0x20000778 0x1 THUMB Debug/../../obj/com.o
*fill* 0x20000779 0x3 00
.bss.xcpCtoReqPacket.3915
0x2000077c 0x40 THUMB Debug/../../obj/com.o
.bss.xcpInfo 0x200007bc 0x4c THUMB Debug/../../obj/xcp.o
.bss.LfnBuf 0x20000808 0x200 THUMB Debug/../../obj/ff.o
.bss.Fsid 0x20000a08 0x2 THUMB Debug/../../obj/ff.o
*fill* 0x20000a0a 0x2 00
.bss.FatFs 0x20000a0c 0x4 THUMB Debug/../../obj/ff.o
0x20000774 0x1 THUMB Debug/../../obj/com.o
*fill* 0x20000775 0x3 00
.bss.xcpCtoReqPacket.3934
0x20000778 0x40 THUMB Debug/../../obj/com.o
.bss.xcpInfo 0x200007b8 0x4c THUMB Debug/../../obj/xcp.o
.bss.LfnBuf 0x20000804 0x200 THUMB Debug/../../obj/ff.o
.bss.Fsid 0x20000a04 0x2 THUMB Debug/../../obj/ff.o
*fill* 0x20000a06 0x2 00
.bss.FatFs 0x20000a08 0x4 THUMB Debug/../../obj/ff.o
.bss.loggingStr
0x20000a10 0x40 THUMB Debug/../../obj/file.o
0x20000a0c 0x40 THUMB Debug/../../obj/file.o
.bss.firmwareUpdateState
0x20000a50 0x1 THUMB Debug/../../obj/file.o
*fill* 0x20000a51 0x3 00
0x20000a4c 0x1 THUMB Debug/../../obj/file.o
*fill* 0x20000a4d 0x3 00
.bss.eraseInfo
0x20000a54 0x8 THUMB Debug/../../obj/file.o
0x20000a50 0x8 THUMB Debug/../../obj/file.o
.bss.fatFsObjects
0x20000a5c 0x458 THUMB Debug/../../obj/file.o
0x20000a58 0x458 THUMB Debug/../../obj/file.o
.bss.lineParseObject
0x20000eb4 0x184 THUMB Debug/../../obj/file.o
0x20000eb0 0x184 THUMB Debug/../../obj/file.o
.bss.libdebugio.dbgCommWord
0x20001038 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
0x20001038 dbgCommWord
0x20001034 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
0x20001034 dbgCommWord
.bss.libdebugio.dbgCntrlWord_mempoll
0x2000103c 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
0x2000103c dbgCntrlWord_mempoll
0x20001038 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
0x20001038 dbgCntrlWord_mempoll
*(COMMON)
0x20001040 __bss_end__ = (__bss_start__ + SIZEOF (.bss))
0x20001040 __bss_load_end__ = __bss_end__
0x2000103c __bss_end__ = (__bss_start__ + SIZEOF (.bss))
0x2000103c __bss_load_end__ = __bss_end__
0x00000001 . = ASSERT (((__bss_end__ >= __RAM_segment_start__) && (__bss_end__ <= __RAM_segment_end__)), error: .bss is too large to fit in RAM memory segment)
0x20001040 __non_init_load_start__ = ALIGN (__bss_end__, 0x4)
0x2000103c __non_init_load_start__ = ALIGN (__bss_end__, 0x4)
.non_init 0x20001040 0x0
0x20001040 __non_init_start__ = .
.non_init 0x2000103c 0x0
0x2000103c __non_init_start__ = .
*(.non_init .non_init.*)
0x20001040 __non_init_end__ = (__non_init_start__ + SIZEOF (.non_init))
0x20001040 __non_init_load_end__ = __non_init_end__
0x2000103c __non_init_end__ = (__non_init_start__ + SIZEOF (.non_init))
0x2000103c __non_init_load_end__ = __non_init_end__
0x00000001 . = ASSERT (((__non_init_end__ >= __RAM_segment_start__) && (__non_init_end__ <= __RAM_segment_end__)), error: .non_init is too large to fit in RAM memory segment)
0x20001040 __heap_load_start__ = ALIGN (__non_init_end__, 0x4)
0x2000103c __heap_load_start__ = ALIGN (__non_init_end__, 0x4)
.heap 0x20001040 0x800
0x20001040 __heap_start__ = .
.heap 0x2000103c 0x800
0x2000103c __heap_start__ = .
*(.heap .heap.*)
0x20001840 . = ALIGN (MAX ((__heap_start__ + __HEAPSIZE__), .), 0x4)
*fill* 0x20001040 0x800 00
0x20001840 __heap_end__ = (__heap_start__ + SIZEOF (.heap))
0x20001840 __heap_load_end__ = __heap_end__
0x2000183c . = ALIGN (MAX ((__heap_start__ + __HEAPSIZE__), .), 0x4)
*fill* 0x2000103c 0x800 00
0x2000183c __heap_end__ = (__heap_start__ + SIZEOF (.heap))
0x2000183c __heap_load_end__ = __heap_end__
0x00000001 . = ASSERT (((__heap_end__ >= __RAM_segment_start__) && (__heap_end__ <= __RAM_segment_end__)), error: .heap is too large to fit in RAM memory segment)
0x20001840 __stack_load_start__ = ALIGN (__heap_end__, 0x4)
0x2000183c __stack_load_start__ = ALIGN (__heap_end__, 0x4)
.stack 0x20001840 0x800
0x20001840 __stack_start__ = .
.stack 0x2000183c 0x800
0x2000183c __stack_start__ = .
*(.stack .stack.*)
0x20002040 . = ALIGN (MAX ((__stack_start__ + __STACKSIZE__), .), 0x4)
*fill* 0x20001840 0x800 00
0x20002040 __stack_end__ = (__stack_start__ + SIZEOF (.stack))
0x20002040 __stack_load_end__ = __stack_end__
0x2000203c . = ALIGN (MAX ((__stack_start__ + __STACKSIZE__), .), 0x4)
*fill* 0x2000183c 0x800 00
0x2000203c __stack_end__ = (__stack_start__ + SIZEOF (.stack))
0x2000203c __stack_load_end__ = __stack_end__
0x00000001 . = ASSERT (((__stack_end__ >= __RAM_segment_start__) && (__stack_end__ <= __RAM_segment_end__)), error: .stack is too large to fit in RAM memory segment)
0x20002040 __stack_process_load_start__ = ALIGN (__stack_end__, 0x4)
0x2000203c __stack_process_load_start__ = ALIGN (__stack_end__, 0x4)
.stack_process 0x20002040 0x0
0x20002040 __stack_process_start__ = .
.stack_process 0x2000203c 0x0
0x2000203c __stack_process_start__ = .
*(.stack_process .stack_process.*)
0x20002040 . = ALIGN (MAX ((__stack_process_start__ + __STACKSIZE_PROCESS__), .), 0x4)
0x20002040 __stack_process_end__ = (__stack_process_start__ + SIZEOF (.stack_process))
0x20002040 __stack_process_load_end__ = __stack_process_end__
0x2000203c . = ALIGN (MAX ((__stack_process_start__ + __STACKSIZE_PROCESS__), .), 0x4)
0x2000203c __stack_process_end__ = (__stack_process_start__ + SIZEOF (.stack_process))
0x2000203c __stack_process_load_end__ = __stack_process_end__
0x00000001 . = ASSERT (((__stack_process_end__ >= __RAM_segment_start__) && (__stack_process_end__ <= __RAM_segment_end__)), error: .stack_process is too large to fit in RAM memory segment)
0x20002040 __tbss_load_start__ = ALIGN (__stack_process_end__, 0x4)
0x2000203c __tbss_load_start__ = ALIGN (__stack_process_end__, 0x4)
.tbss 0x20002040 0x0
0x20002040 __tbss_start__ = .
.tbss 0x2000203c 0x0
0x2000203c __tbss_start__ = .
*(.tbss .tbss.*)
0x20002040 __tbss_end__ = (__tbss_start__ + SIZEOF (.tbss))
0x20002040 __tbss_load_end__ = __tbss_end__
0x2000203c __tbss_end__ = (__tbss_start__ + SIZEOF (.tbss))
0x2000203c __tbss_load_end__ = __tbss_end__
0x00000001 . = ASSERT (((__tbss_end__ >= __RAM_segment_start__) && (__tbss_end__ <= __RAM_segment_end__)), error: .tbss is too large to fit in RAM memory segment)
0x08006fec __tdata_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
0x08007010 __tdata_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
.tdata 0x20002040 0x0 load address 0x08006fec
0x20002040 __tdata_start__ = .
.tdata 0x2000203c 0x0 load address 0x08007010
0x2000203c __tdata_start__ = .
*(.tdata .tdata.*)
0x20002040 __tdata_end__ = (__tdata_start__ + SIZEOF (.tdata))
0x08006fec __tdata_load_end__ = (__tdata_load_start__ + SIZEOF (.tdata))
0x08006fec __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.tdata))
0x2000203c __tdata_end__ = (__tdata_start__ + SIZEOF (.tdata))
0x08007010 __tdata_load_end__ = (__tdata_load_start__ + SIZEOF (.tdata))
0x08007010 __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.tdata))
0x00000001 . = ASSERT (((__tdata_load_end__ >= __FLASH_segment_start__) && (__tdata_load_end__ <= __FLASH_segment_end__)), error: .tdata is too large to fit in FLASH memory segment)
.tdata_run 0x20002040 0x0
0x20002040 __tdata_run_start__ = .
0x20002040 . = MAX ((__tdata_run_start__ + SIZEOF (.tdata)), .)
0x20002040 __tdata_run_end__ = (__tdata_run_start__ + SIZEOF (.tdata_run))
0x20002040 __tdata_run_load_end__ = __tdata_run_end__
0x20002040 __RAM_segment_used_end__ = (ALIGN (__tbss_end__, 0x4) + SIZEOF (.tdata_run))
.tdata_run 0x2000203c 0x0
0x2000203c __tdata_run_start__ = .
0x2000203c . = MAX ((__tdata_run_start__ + SIZEOF (.tdata)), .)
0x2000203c __tdata_run_end__ = (__tdata_run_start__ + SIZEOF (.tdata_run))
0x2000203c __tdata_run_load_end__ = __tdata_run_end__
0x2000203c __RAM_segment_used_end__ = (ALIGN (__tbss_end__, 0x4) + SIZEOF (.tdata_run))
0x00000001 . = ASSERT (((__tdata_run_end__ >= __RAM_segment_start__) && (__tdata_run_end__ <= __RAM_segment_end__)), error: .tdata_run is too large to fit in RAM memory segment)
START GROUP
LOAD THUMB Debug/../../obj/mmc.o
@ -3277,6 +3295,7 @@ LOAD THUMB Debug/../../obj/flash.o
LOAD THUMB Debug/../../obj/nvm.o
LOAD THUMB Debug/../../obj/timer.o
LOAD THUMB Debug/../../obj/uart.o
LOAD THUMB Debug/../../obj/can.o
LOAD THUMB Debug/../../obj/assert.o
LOAD THUMB Debug/../../obj/backdoor.o
LOAD THUMB Debug/../../obj/boot.o
@ -3296,7 +3315,7 @@ LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib
END GROUP
OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/ide/../bin/openbtl_olimex_stm32e407.elf elf32-littlearm)
.debug_frame 0x00000000 0x3b20
.debug_frame 0x00000000 0x3b54
.debug_frame 0x00000000 0x4e0 THUMB Debug/../../obj/mmc.o
.debug_frame 0x000004e0 0x38 THUMB Debug/../../obj/system_stm32f4xx.o
.debug_frame 0x00000518 0x2c8 THUMB Debug/../../obj/stm32f4xx_flash.o
@ -3320,13 +3339,13 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
.debug_frame 0x00001698 0x80 THUMB Debug/../../obj/xcp.o
.debug_frame 0x00001718 0x688 THUMB Debug/../../obj/ff.o
.debug_frame 0x00001da0 0x30 THUMB Debug/../../obj/unicode.o
.debug_frame 0x00001dd0 0x120 THUMB Debug/../../obj/file.o
.debug_frame 0x00001ef0 0x12e0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_frame 0x000031d0 0x120 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2_asm.o)
.debug_frame 0x000032f0 0x790 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_frame 0x00003a80 0xa0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_frame 0x00001dd0 0x154 THUMB Debug/../../obj/file.o
.debug_frame 0x00001f24 0x12e0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_frame 0x00003204 0x120 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2_asm.o)
.debug_frame 0x00003324 0x790 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_frame 0x00003ab4 0xa0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_info 0x00000000 0x1000f
.debug_info 0x00000000 0x10008
.debug_info 0x00000000 0x35cb THUMB Debug/../../obj/mmc.o
.debug_info 0x000035cb 0x61d THUMB Debug/../../obj/system_stm32f4xx.o
.debug_info 0x00003be8 0x8a0 THUMB Debug/../../obj/stm32f4xx_flash.o
@ -3351,12 +3370,12 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
.debug_info 0x00009ba6 0x83a THUMB Debug/../../obj/xcp.o
.debug_info 0x0000a3e0 0x3562 THUMB Debug/../../obj/ff.o
.debug_info 0x0000d942 0x169 THUMB Debug/../../obj/unicode.o
.debug_info 0x0000daab 0x122d THUMB Debug/../../obj/file.o
.debug_info 0x0000ecd8 0xd02 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_info 0x0000f9da 0x55f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_info 0x0000ff39 0xd6 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_info 0x0000daab 0x1226 THUMB Debug/../../obj/file.o
.debug_info 0x0000ecd1 0xd02 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_info 0x0000f9d3 0x55f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_info 0x0000ff32 0xd6 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_abbrev 0x00000000 0x27e3
.debug_abbrev 0x00000000 0x2799
.debug_abbrev 0x00000000 0x370 THUMB Debug/../../obj/mmc.o
.debug_abbrev 0x00000370 0x158 THUMB Debug/../../obj/system_stm32f4xx.o
.debug_abbrev 0x000004c8 0x1a9 THUMB Debug/../../obj/stm32f4xx_flash.o
@ -3381,12 +3400,12 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
.debug_abbrev 0x00001e2a 0x24d THUMB Debug/../../obj/xcp.o
.debug_abbrev 0x00002077 0x337 THUMB Debug/../../obj/ff.o
.debug_abbrev 0x000023ae 0xa8 THUMB Debug/../../obj/unicode.o
.debug_abbrev 0x00002456 0x25c THUMB Debug/../../obj/file.o
.debug_abbrev 0x000026b2 0xcb C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_abbrev 0x0000277d 0x3e C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_abbrev 0x000027bb 0x28 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_abbrev 0x00002456 0x212 THUMB Debug/../../obj/file.o
.debug_abbrev 0x00002668 0xcb C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_abbrev 0x00002733 0x3e C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_abbrev 0x00002771 0x28 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_loc 0x00000000 0xeb2d
.debug_loc 0x00000000 0xeb43
.debug_loc 0x00000000 0x2289 THUMB Debug/../../obj/mmc.o
.debug_loc 0x00002289 0x1a7 THUMB Debug/../../obj/system_stm32f4xx.o
.debug_loc 0x00002430 0x83a THUMB Debug/../../obj/stm32f4xx_flash.o
@ -3409,11 +3428,11 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
.debug_loc 0x00005c84 0x248 THUMB Debug/../../obj/xcp.o
.debug_loc 0x00005ecc 0x68fe THUMB Debug/../../obj/ff.o
.debug_loc 0x0000c7ca 0x179 THUMB Debug/../../obj/unicode.o
.debug_loc 0x0000c943 0x964 THUMB Debug/../../obj/file.o
.debug_loc 0x0000d2a7 0x1092 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_loc 0x0000e339 0x7f4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_loc 0x0000c943 0x97a THUMB Debug/../../obj/file.o
.debug_loc 0x0000d2bd 0x1092 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_loc 0x0000e34f 0x7f4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_aranges 0x00000000 0x1360
.debug_aranges 0x00000000 0x1370
.debug_aranges
0x00000000 0x140 THUMB Debug/../../obj/mmc.o
.debug_aranges
@ -3463,15 +3482,15 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
.debug_aranges
0x00000b58 0x28 THUMB Debug/../../obj/unicode.o
.debug_aranges
0x00000b80 0x60 THUMB Debug/../../obj/file.o
0x00000b80 0x70 THUMB Debug/../../obj/file.o
.debug_aranges
0x00000be0 0x508 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
0x00000bf0 0x508 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_aranges
0x000010e8 0x218 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
0x000010f8 0x218 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_aranges
0x00001300 0x60 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
0x00001310 0x60 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_ranges 0x00000000 0x1468
.debug_ranges 0x00000000 0x1420
.debug_ranges 0x00000000 0x1f0 THUMB Debug/../../obj/mmc.o
.debug_ranges 0x000001f0 0x18 THUMB Debug/../../obj/system_stm32f4xx.o
.debug_ranges 0x00000208 0x108 THUMB Debug/../../obj/stm32f4xx_flash.o
@ -3495,12 +3514,12 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
.debug_ranges 0x00000910 0x80 THUMB Debug/../../obj/xcp.o
.debug_ranges 0x00000990 0x2c8 THUMB Debug/../../obj/ff.o
.debug_ranges 0x00000c58 0x18 THUMB Debug/../../obj/unicode.o
.debug_ranges 0x00000c70 0xa8 THUMB Debug/../../obj/file.o
.debug_ranges 0x00000d18 0x4f8 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_ranges 0x00001210 0x208 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_ranges 0x00001418 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_ranges 0x00000c70 0x60 THUMB Debug/../../obj/file.o
.debug_ranges 0x00000cd0 0x4f8 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_ranges 0x000011c8 0x208 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_ranges 0x000013d0 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_line 0x00000000 0x5e02
.debug_line 0x00000000 0x5e4c
.debug_line 0x00000000 0xb4f THUMB Debug/../../obj/mmc.o
.debug_line 0x00000b4f 0x21c THUMB Debug/../../obj/system_stm32f4xx.o
.debug_line 0x00000d6b 0x49f THUMB Debug/../../obj/stm32f4xx_flash.o
@ -3525,12 +3544,12 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
.debug_line 0x00003bcf 0x1fd THUMB Debug/../../obj/xcp.o
.debug_line 0x00003dcc 0xfb9 THUMB Debug/../../obj/ff.o
.debug_line 0x00004d85 0x185 THUMB Debug/../../obj/unicode.o
.debug_line 0x00004f0a 0x381 THUMB Debug/../../obj/file.o
.debug_line 0x0000528b 0x5b3 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_line 0x0000583e 0x550 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_line 0x00005d8e 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_line 0x00004f0a 0x3cb THUMB Debug/../../obj/file.o
.debug_line 0x000052d5 0x5b3 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_line 0x00005888 0x550 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_line 0x00005dd8 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_str 0x00000000 0x4a49
.debug_str 0x00000000 0x4a55
.debug_str 0x00000000 0x1460 THUMB Debug/../../obj/mmc.o
0x1526 (size before relaxing)
.debug_str 0x00001460 0x276 THUMB Debug/../../obj/system_stm32f4xx.o
@ -3577,13 +3596,13 @@ OUTPUT(C:/Work/software/OpenBLT/Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossw
0x74c (size before relaxing)
.debug_str 0x00003cc4 0x99 THUMB Debug/../../obj/unicode.o
0x165 (size before relaxing)
.debug_str 0x00003d5d 0x2f8 THUMB Debug/../../obj/file.o
0x7dd (size before relaxing)
.debug_str 0x00004055 0x56f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
.debug_str 0x00003d5d 0x304 THUMB Debug/../../obj/file.o
0x7e9 (size before relaxing)
.debug_str 0x00004061 0x56f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_v7em_t_le_eabi.a(libc2.o)
0x655 (size before relaxing)
.debug_str 0x000045c4 0x3b3 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
.debug_str 0x000045d0 0x3b3 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7em_t_le_eabi.a(libdebugio.o)
0x3fc (size before relaxing)
.debug_str 0x00004977 0xd2 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
.debug_str 0x00004983 0xd2 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7em_t_le_eabi.a(user_libc.o)
0x11b (size before relaxing)
.comment 0x00000000 0x4e

743
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/bin/openbtl_olimex_stm32e407.srec
View File

@ -1,5 +1,5 @@
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@ -556,7 +556,7 @@ S315080022882BFD4FF000038DF806304FF001008DF84E
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@ -694,10 +694,10 @@ S31508002B280000ADF80400ADF80600ADF80800ADF8E9
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27
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/blt_conf.h
View File

@ -61,6 +61,33 @@
/****************************************************************************************
* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
****************************************************************************************/
/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
* in bits/second. Two CAN messages are reserved for communication with the host. The
* message identifier for sending data from the target to the host is configured with
* BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
* BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data
* transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
* BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
* than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
* CAN controller channel.
*
*/
/** \brief Enable/disable CAN transport layer. */
#define BOOT_COM_CAN_ENABLE (0)
/** \brief Configure the desired CAN baudrate. */
#define BOOT_COM_CAN_BAUDRATE (500000)
/** \brief Configure CAN message ID target->host. */
#define BOOT_COM_CAN_TX_MSG_ID (0x7E1)
/** \brief Configure number of bytes in the target->host CAN message. */
#define BOOT_COM_CAN_TX_MAX_DATA (8)
/** \brief Configure CAN message ID host->target. */
#define BOOT_COM_CAN_RX_MSG_ID (0x667)
/** \brief Configure number of bytes in the host->target CAN message. */
#define BOOT_COM_CAN_RX_MAX_DATA (8)
/** \brief Select the desired CAN peripheral as a zero based index. */
#define BOOT_COM_CAN_CHANNEL_INDEX (1)
/* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE
* configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed
* in bits/second. The maximum amount of data bytes in a message for data transmission

2
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/ide/stm32f407_crossworks.hzp
View File

@ -102,6 +102,8 @@
<file file_name="../../../../Source/ARMCM4_STM32/types.h"/>
<file file_name="../../../../Source/ARMCM4_STM32/uart.c"/>
<file file_name="../../../../Source/ARMCM4_STM32/uart.h"/>
<file file_name="../../../../Source/ARMCM4_STM32/can.c"/>
<file file_name="../../../../Source/ARMCM4_STM32/can.h"/>
</folder>
<file file_name="../../../../Source/assert.c"/>
<file file_name="../../../../Source/assert.h"/>

5
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/ide/stm32f407_crossworks.hzs
View File

@ -63,7 +63,8 @@
<Watches active="0" update="Never" />
</Watch4>
<Files>
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Boot\main.c" y="54" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Boot\main.c" left="18" selected="1" name="unnamed" top="35" />
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</Files>
<ARMCrossStudioWindow activeProject="openbtl_olimex_stm32e407" autoConnectTarget="SEGGER J-Link" debugSearchFileMap="" fileDialogInitialDirectory="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Boot" fileDialogDefaultFilter="" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
<ARMCrossStudioWindow activeProject="openbtl_olimex_stm32e407" autoConnectTarget="SEGGER J-Link" debugSearchFileMap="" fileDialogInitialDirectory="C:\Work\software\OpenBLT\Target\Source\ARMCM4_STM32" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
</session>

20
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Boot/main.c
View File

@ -79,6 +79,8 @@ static void Init(void)
#elif (BOOT_FILE_SYS_ENABLE > 0)
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
#elif (BOOT_COM_CAN_ENABLE > 0)
GPIO_InitTypeDef GPIO_InitStructure;
#endif
/* disable all interrupts to prevent possible jump back to the user program */
@ -134,6 +136,24 @@ static void Init(void)
/* enable UART */
USART_Cmd(USART6, ENABLE);
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* enable clocks for CAN2 transmitter and receiver pins */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
/* select alternate function for the CAN2 pins */
GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_CAN2);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_CAN2);
/* configure CAN2 RX and TX pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* enable CAN clock. Note that CAN2 shares reception filters with CAN1 so for CAN2
* the CAN1 peripheral also needs to be enabled.
*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN2 | RCC_APB1Periph_CAN1, ENABLE);
#endif
} /*** end of Init ***/

180
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Prog/boot.c
View File

@ -182,4 +182,184 @@ static unsigned char UartReceiveByte(unsigned char *data)
#endif /* BOOT_COM_UART_ENABLE > 0 */
#if (BOOT_COM_CAN_ENABLE > 0)
/****************************************************************************************
* C O N T R O L L E R A R E A N E T W O R K I N T E R F A C E
****************************************************************************************/
/****************************************************************************************
* Type definitions
****************************************************************************************/
/** \brief Structure type for grouping CAN bus timing related information. */
typedef struct t_can_bus_timing
{
unsigned char tseg1; /**< CAN time segment 1 */
unsigned char tseg2; /**< CAN time segment 2 */
} tCanBusTiming;
/****************************************************************************************
* Local constant declarations
****************************************************************************************/
/** \brief CAN bittiming table for dynamically calculating the bittiming settings.
* \details According to the CAN protocol 1 bit-time can be made up of between 8..25
* time quanta (TQ). The total TQ in a bit is SYNC + TSEG1 + TSEG2 with SYNC
* always being 1. The sample point is (SYNC + TSEG1) / (SYNC + TSEG1 + SEG2) *
* 100%. This array contains possible and valid time quanta configurations with
* a sample point between 68..78%.
*/
static const tCanBusTiming canTiming[] =
{ /* TQ | TSEG1 | TSEG2 | SP */
/* ------------------------- */
{ 5, 2 }, /* 8 | 5 | 2 | 75% */
{ 6, 2 }, /* 9 | 6 | 2 | 78% */
{ 6, 3 }, /* 10 | 6 | 3 | 70% */
{ 7, 3 }, /* 11 | 7 | 3 | 73% */
{ 8, 3 }, /* 12 | 8 | 3 | 75% */
{ 9, 3 }, /* 13 | 9 | 3 | 77% */
{ 9, 4 }, /* 14 | 9 | 4 | 71% */
{ 10, 4 }, /* 15 | 10 | 4 | 73% */
{ 11, 4 }, /* 16 | 11 | 4 | 75% */
{ 12, 4 }, /* 17 | 12 | 4 | 76% */
{ 12, 5 }, /* 18 | 12 | 5 | 72% */
{ 13, 5 }, /* 19 | 13 | 5 | 74% */
{ 14, 5 }, /* 20 | 14 | 5 | 75% */
{ 15, 5 }, /* 21 | 15 | 5 | 76% */
{ 15, 6 }, /* 22 | 15 | 6 | 73% */
{ 16, 6 }, /* 23 | 16 | 6 | 74% */
{ 16, 7 }, /* 24 | 16 | 7 | 71% */
{ 16, 8 } /* 25 | 16 | 8 | 68% */
};
/************************************************************************************//**
** \brief Search algorithm to match the desired baudrate to a possible bus
** timing configuration.
** \param baud The desired baudrate in kbps. Valid values are 10..1000.
** \param prescaler Pointer to where the value for the prescaler will be stored.
** \param tseg1 Pointer to where the value for TSEG2 will be stored.
** \param tseg2 Pointer to where the value for TSEG2 will be stored.
** \return 1 if the CAN bustiming register values were found, 0 otherwise.
**
****************************************************************************************/
static unsigned char CanGetSpeedConfig(unsigned short baud, unsigned short *prescaler,
unsigned char *tseg1, unsigned char *tseg2)
{
unsigned char cnt;
/* loop through all possible time quanta configurations to find a match */
for (cnt=0; cnt < sizeof(canTiming)/sizeof(canTiming[0]); cnt++)
{
if (((BOOT_CPU_SYSTEM_SPEED_KHZ/4) % (baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))) == 0)
{
/* compute the prescaler that goes with this TQ configuration */
*prescaler = (BOOT_CPU_SYSTEM_SPEED_KHZ/4)/(baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1));
/* make sure the prescaler is valid */
if ( (*prescaler > 0) && (*prescaler <= 1024) )
{
/* store the bustiming configuration */
*tseg1 = canTiming[cnt].tseg1;
*tseg2 = canTiming[cnt].tseg2;
/* found a good bus timing configuration */
return 1;
}
}
}
/* could not find a good bus timing configuration */
return 0;
} /*** end of CanGetSpeedConfig ***/
/************************************************************************************//**
** \brief Initializes the CAN communication interface.
** \return none.
**
****************************************************************************************/
void BootComInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
CAN_InitTypeDef CAN_InitStructure;
CAN_FilterInitTypeDef CAN_FilterInitStructure;
unsigned short prescaler;
unsigned char tseg1, tseg2;
/* enable clocks for CAN2 transmitter and receiver pins */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
/* select alternate function for the CAN2 pins */
GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_CAN2);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_CAN2);
/* configure CAN2 RX and TX pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* enable CAN clock. Note that CAN2 shares reception filters with CAN1 so for CAN2
* the CAN1 peripheral also needs to be enabled.
*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN2 | RCC_APB1Periph_CAN1, ENABLE);
/* CAN register init */
CAN_DeInit(CAN2);
CAN_StructInit(&CAN_InitStructure);
/* obtain the bittiming configuration for this baudrate */
CanGetSpeedConfig(BOOT_COM_CAN_BAUDRATE/1000, &prescaler, &tseg1, &tseg2);
/* CAN controller init */
CAN_InitStructure.CAN_TTCM = DISABLE;
CAN_InitStructure.CAN_ABOM = DISABLE;
CAN_InitStructure.CAN_AWUM = DISABLE;
CAN_InitStructure.CAN_NART = DISABLE;
CAN_InitStructure.CAN_RFLM = DISABLE;
CAN_InitStructure.CAN_TXFP = DISABLE;
CAN_InitStructure.CAN_Mode = CAN_Mode_Normal;
/* CAN Baudrate init */
CAN_InitStructure.CAN_SJW = CAN_SJW_1tq;
CAN_InitStructure.CAN_BS1 = tseg1 - 1;
CAN_InitStructure.CAN_BS2 = tseg2 - 1;
CAN_InitStructure.CAN_Prescaler = prescaler;
CAN_Init(CAN2, &CAN_InitStructure);
/* CAN filter init - receive all messages */
CAN_FilterInitStructure.CAN_FilterNumber = 14;
CAN_FilterInitStructure.CAN_FilterMode = CAN_FilterMode_IdMask;
CAN_FilterInitStructure.CAN_FilterScale = CAN_FilterScale_32bit;
CAN_FilterInitStructure.CAN_FilterIdHigh = 0x0000;
CAN_FilterInitStructure.CAN_FilterIdLow = 0x0000;
CAN_FilterInitStructure.CAN_FilterMaskIdHigh = 0x0000;
CAN_FilterInitStructure.CAN_FilterMaskIdLow = 0x0000;
CAN_FilterInitStructure.CAN_FilterFIFOAssignment = 0;
CAN_FilterInitStructure.CAN_FilterActivation = ENABLE;
CAN_FilterInit(&CAN_FilterInitStructure);
} /*** end of BootComInit ***/
/************************************************************************************//**
** \brief Receives the CONNECT request from the host, which indicates that the
** bootloader should be activated and, if so, activates it.
** \return none.
**
****************************************************************************************/
void BootComCheckActivationRequest(void)
{
CanRxMsg RxMessage;
/* check if a new message was received */
if (CAN_MessagePending(CAN2, CAN_FIFO0) > 0)
{
/* receive the message */
CAN_Receive(CAN2, CAN_FIFO0, &RxMessage);
if (RxMessage.StdId == BOOT_COM_CAN_RX_MSG_ID)
{
/* check if this was an XCP CONNECT command */
if ((RxMessage.Data[0] == 0xff) && (RxMessage.Data[1] == 0x00))
{
/* connection request received so start the bootloader */
BootActivate();
}
}
}
} /*** end of BootComCheckActivationRequest ***/
#endif /* BOOT_COM_CAN_ENABLE > 0 */
/*********************************** end of boot.c *************************************/

8
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_Crossworks/Prog/ide/stm32f407_crossworks.hzs
View File

@ -50,9 +50,9 @@
</TraceWindow>
<Watch1>
<Watches active="1" update="Never" >
<Watchpoint linenumber="124" radix="-1" name="free_running_counter_now" expression="free_running_counter_now" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
<Watchpoint linenumber="152" radix="-1" name="free_running_counter_accumulative" expression="free_running_counter_accumulative" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
<Watchpoint linenumber="121" radix="-1" name="free_running_counter_last" expression="free_running_counter_last" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
<Watchpoint linenumber="152" radix="-1" name="free_running_counter_accumulative" expression="free_running_counter_accumulative" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
<Watchpoint linenumber="124" radix="-1" name="free_running_counter_now" expression="free_running_counter_now" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
</Watches>
</Watch1>
<Watch2>
@ -65,8 +65,8 @@
<Watches active="0" update="Never" />
</Watch4>
<Files>
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<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Prog\led.c" y="40" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Prog\led.c" left="0" selected="1" name="unnamed" top="40" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Prog\main.c" y="68" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Prog\main.c" left="0" selected="0" name="unnamed" top="39" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Prog\boot.c" y="21" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Prog\boot.c" left="0" selected="1" name="unnamed" top="21" />
</Files>
<ARMCrossStudioWindow activeProject="demoprog_olimex_stm32e407" autoConnectTarget="SEGGER J-Link" debugSearchFileMap="" fileDialogInitialDirectory="C:\Work\software\OpenBLT\Target\Demo\ARMCM4_STM32_Olimex_STM32E407_Crossworks\Prog\lib\stdperiphlib" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
</session>

BIN
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Boot/bin/openbtl_olimex_stm32e407.elf
View File

Binary file not shown.

142
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Boot/bin/openbtl_olimex_stm32e407.map
View File

@ -7,38 +7,40 @@ start address 0x08000000
Program Header:
LOAD off 0x00008000 vaddr 0x08000000 paddr 0x08000000 align 2**15
filesz 0x00005d40 memsz 0x00005d40 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08005d40 align 2**15
filesz 0x0000001c memsz 0x0000183c flags rw-
filesz 0x00005d6c memsz 0x00005d6c flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08005d6c align 2**15
filesz 0x0000001c memsz 0x0000001c flags rw-
LOAD off 0x00010020 vaddr 0x20000020 paddr 0x08005d90 align 2**15
filesz 0x00000000 memsz 0x0000181c flags rw-
private flags = 5000002: [Version5 EABI] [has entry point]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00005d40 08000000 08000000 00008000 2**2
0 .text 00005d6c 08000000 08000000 00008000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 0000001c 20000000 08005d40 00010000 2**2
1 .data 0000001c 20000000 08005d6c 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
2 .bss 0000181c 20000020 08005d60 0001001c 2**3
2 .bss 0000181c 20000020 08005d90 00010020 2**3
ALLOC
3 .debug_info 0000e4c2 00000000 00000000 0001001c 2**0
3 .debug_info 0000e4fb 00000000 00000000 0001001c 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000027f8 00000000 00000000 0001e4de 2**0
4 .debug_abbrev 000027b8 00000000 00000000 0001e517 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_loc 0000ac20 00000000 00000000 00020cd6 2**0
5 .debug_loc 0000ad42 00000000 00000000 00020ccf 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_aranges 00000be8 00000000 00000000 0002b8f6 2**0
6 .debug_aranges 00000bf8 00000000 00000000 0002ba11 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_ranges 00000cb0 00000000 00000000 0002c4de 2**0
7 .debug_ranges 00000c58 00000000 00000000 0002c609 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_line 00004696 00000000 00000000 0002d18e 2**0
8 .debug_line 000046cc 00000000 00000000 0002d261 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_str 0000380f 00000000 00000000 00031824 2**0
9 .debug_str 0000381b 00000000 00000000 0003192d 2**0
CONTENTS, READONLY, DEBUGGING
10 .comment 00000030 00000000 00000000 00035033 2**0
10 .comment 00000030 00000000 00000000 00035148 2**0
CONTENTS, READONLY
11 .ARM.attributes 00000033 00000000 00000000 00035063 2**0
11 .ARM.attributes 00000033 00000000 00000000 00035178 2**0
CONTENTS, READONLY
12 .debug_frame 00001f1c 00000000 00000000 00035098 2**2
12 .debug_frame 00001f40 00000000 00000000 000351ac 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
08000000 l d .text 00000000 .text
@ -57,9 +59,9 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 vectors.c
00000000 l df *ABS* 00000000 cstart.c
080001ca l F .text 00000000 zero_loop2
08005248 l F .text 00000000 zero_loop
08005274 l F .text 00000000 zero_loop
00000000 l df *ABS* 00000000 hooks.c
080053e8 l O .text 00000020 firmwareFilename
08005414 l O .text 00000020 firmwareFilename
20000020 l O .bss 00000228 logfile
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 mmc.c
@ -111,21 +113,21 @@ SYMBOL TABLE:
080032b4 l F .text 00000258 dir_register
20000318 l O .bss 00000200 LfnBuf
20000518 l O .bss 00000002 Fsid
0800542c l O .text 00000080 ExCvt
080054ac l O .text 0000000d LfnOfs
08005458 l O .text 00000080 ExCvt
080054d8 l O .text 0000000d LfnOfs
2000051c l O .bss 00000004 FatFs
00000000 l df *ABS* 00000000 unicode.c
080054bc l O .text 000001e0 tbl_lower.4261
0800569c l O .text 00000100 Tbl
0800579c l O .text 000001e0 tbl_upper.4262
080054e8 l O .text 000001e0 tbl_lower.4261
080056c8 l O .text 00000100 Tbl
080057c8 l O .text 000001e0 tbl_upper.4262
00000000 l df *ABS* 00000000 boot.c
00000000 l df *ABS* 00000000 com.c
20000520 l O .bss 00000001 comEntryStateConnect
20000524 l O .bss 00000040 xcpCtoReqPacket.4367
20000524 l O .bss 00000040 xcpCtoReqPacket.4386
00000000 l df *ABS* 00000000 xcp.c
08004038 l F .text 00000010 XcpProtectResources
08004048 l F .text 00000018 XcpSetCtoError
0800597c l O .text 00000008 xcpStationId
080059a8 l O .text 00000008 xcpStationId
20000564 l O .bss 0000004c xcpInfo
00000000 l df *ABS* 00000000 backdoor.c
200005b0 l O .bss 00000001 backdoorOpen
@ -136,7 +138,6 @@ SYMBOL TABLE:
08004480 l F .text 00000024 FileLibByteToHexString
080044a4 l F .text 00000048 FileLibLongToIntString
080044ec l F .text 00000064 FileLibHexStringToByte
08004550 l F .text 0000020c SrecParseLine
200005b8 l O .bss 00000040 loggingStr
200005f8 l O .bss 00000001 firmwareUpdateState
200005fc l O .bss 00000008 eraseInfo
@ -147,21 +148,21 @@ SYMBOL TABLE:
20000be4 l O .bss 00000004 assert_failure_line
00000000 l df *ABS* 00000000 cpu.c
00000000 l df *ABS* 00000000 flash.c
08004c08 l F .text 00000044 FlashGetSector
08004c4c l F .text 0000007c FlashWriteBlock
08004cc8 l F .text 00000030 FlashInitBlock
08004cf8 l F .text 00000044 FlashSwitchBlock
08004d3c l F .text 00000092 FlashAddToBlock
08005b44 l O .text 00000030 flashSectorNumToMask
08005b74 l O .text 00000078 flashLayout
08004c34 l F .text 00000044 FlashGetSector
08004c78 l F .text 0000007c FlashWriteBlock
08004cf4 l F .text 00000030 FlashInitBlock
08004d24 l F .text 00000044 FlashSwitchBlock
08004d68 l F .text 00000092 FlashAddToBlock
08005b70 l O .text 00000030 flashSectorNumToMask
08005ba0 l O .text 00000078 flashLayout
20000be8 l O .bss 00000204 bootBlockInfo
20000dec l O .bss 00000204 blockInfo
00000000 l df *ABS* 00000000 uart.c
08004fc8 l F .text 0000002c UartReceiveByte
08004ff4 l F .text 0000003c UartTransmitByte
20000ff0 l O .bss 00000001 xcpCtoRxLength.7754
20000ff1 l O .bss 00000001 xcpCtoRxInProgress.7755
20000ff4 l O .bss 00000041 xcpCtoReqPacket.7753
08004ff4 l F .text 0000002c UartReceiveByte
08005020 l F .text 0000003c UartTransmitByte
20000ff0 l O .bss 00000041 xcpCtoReqPacket.7772
20001034 l O .bss 00000001 xcpCtoRxLength.7773
20001035 l O .bss 00000001 xcpCtoRxInProgress.7774
00000000 l df *ABS* 00000000 nvm.c
00000000 l df *ABS* 00000000 timer.c
20001038 l O .bss 00000004 millisecond_counter
@ -170,14 +171,14 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000
00000800 l *ABS* 00000000 __STACKSIZE__
08003fc0 g F .text 00000034 ComInit
08004de8 g F .text 00000054 FlashWrite
08004e14 g F .text 00000054 FlashWrite
08003e40 g F .text 0000005e f_gets
080016fc g F .text 00000020 FLASH_Unlock
08004b9c g F .text 00000018 AssertFailure
08004bc8 g F .text 00000018 AssertFailure
0800260c g F .text 0000010a get_fat
08005210 g F .text 0000005c reset_handler
0800523c g F .text 0000005c reset_handler
08001910 g F .text 00000038 GPIO_PinAFConfig
080051cc g F .text 00000020 TimerUpdate
080051f8 g F .text 00000020 TimerUpdate
0800408c g F .text 00000010 XcpPacketTransmitted
08003ff4 g F .text 00000018 ComTask
08001b70 g F .text 0000000c SDIO_ClearFlag
@ -186,48 +187,50 @@ SYMBOL TABLE:
08004020 g F .text 00000010 ComSetConnectEntryState
08001aa8 g F .text 0000000c SDIO_SetPowerState
08003f8c g F .text 0000001c BootInit
08004618 g F .text 00000042 FileSrecVerifyChecksum
0800442c g F .text 00000020 BackDoorInit
08001ca8 g F .text 0000000c USART_GetFlagStatus
08004450 g F .text 00000002 CopService
08005d40 g .text 00000000 _etext
08005d6c g .text 00000000 _etext
080012e0 g F .text 000001b8 SD_WriteBlock
08003f5c g F .text 00000030 ff_wtoupper
08005274 g F .text 00000174 memcpy
080047d0 g F .text 000003cc FileTask
08005190 g F .text 00000010 TimerReset
080052a0 g F .text 00000174 memcpy
080047fc g F .text 000003cc FileTask
080051bc g F .text 00000010 TimerReset
08001534 g F .text 00000034 disk_initialize
08000c1c g F .text 000002e0 SD_GetCardInfo
08001b5c g F .text 00000014 SDIO_GetFlagStatus
08001c9c g F .text 0000000c USART_ReceiveData
08003fa8 g F .text 00000018 BootTask
080014e8 g F .text 0000002e SD_GetState
08004ee0 g F .text 00000050 FlashWriteChecksum
08004f0c g F .text 00000050 FlashWriteChecksum
08000efc g F .text 00000084 SD_EnableWideBusOperation
08001a18 g F .text 0000001c RCC_APB2PeriphClockCmd
08001af0 g F .text 0000000c SDIO_GetCommandResponse
08004010 g F .text 0000000e ComTransmitPacket
08001860 g F .text 000000a2 GPIO_Init
08001568 g F .text 00000028 disk_status
0800465c g F .text 000001a0 FileSrecParseLine
08001c70 g F .text 00000020 USART_Cmd
08001680 g F .text 00000074 disk_ioctl
0800479c g F .text 00000034 FileHandleFirmwareUpdateRequest
08004590 g F .text 00000034 FileHandleFirmwareUpdateRequest
08003204 g F .text 000000b0 gen_numname
08000280 g F .text 00000038 FileFirmwareUpdateCompletedHook
0800407c g F .text 00000010 XcpIsConnected
08003d70 g F .text 000000d0 f_unlink
0800515c g F .text 00000008 NvmInit
08004dd0 g F .text 00000018 FlashInit
08005188 g F .text 00000008 NvmInit
08004dfc g F .text 00000018 FlashInit
0800171c g F .text 00000010 FLASH_Lock
2000103c g .bss 00000000 _ebss
08003ea0 g F .text 00000038 f_putc
08003ed8 g F .text 00000036 f_puts
080051fc g F .text 00000014 UnusedISR
08005228 g F .text 00000014 UnusedISR
08001a9c g F .text 0000000c SDIO_ClockCmd
0800400c g F .text 00000002 ComFree
08001b18 g F .text 0000002c SDIO_DataConfig
08005030 g F .text 00000044 UartInit
0800505c g F .text 00000044 UartInit
08001948 g F .text 000000b4 RCC_GetClocksFreq
0800516c g F .text 00000008 NvmErase
08005198 g F .text 00000008 NvmErase
08001b7c g F .text 000000f4 USART_Init
20000020 g .bss 00000000 _bss
08003b50 g F .text 00000016 f_close
@ -236,46 +239,47 @@ SYMBOL TABLE:
0800172c g F .text 0000000c FLASH_ClearFlag
08001780 g F .text 00000034 FLASH_WaitForLastOperation
080036d8 g F .text 000001c4 f_read
08004f88 g F .text 00000040 FlashDone
08004fb4 g F .text 00000040 FlashDone
08000fb0 g F .text 00000174 SD_Init
08000188 g F .text 00000068 EntryFromProg
08000f80 g F .text 00000030 SD_SelectDeselect
08001ac4 g F .text 0000002c SDIO_SendCommand
080016f4 g F .text 00000008 get_fattime
08004060 g F .text 0000001c XcpInit
0800475c g F .text 0000002c FileInit
08004550 g F .text 0000002c FileInit
08001b44 g F .text 0000000c SDIO_ReadData
08004e3c g F .text 000000a4 FlashErase
08004e68 g F .text 000000a4 FlashErase
080002b8 g F .text 00000018 FileFirmwareUpdateErrorHook
08000324 g F .text 0000008c main
080017f0 g F .text 00000070 FLASH_EraseSector
08003a9c g F .text 000000b4 f_sync
08001498 g F .text 00000050 SD_SendStatus
0800517c g F .text 00000014 NvmDone
080045c4 g F .text 00000054 FileSrecGetLineType
080051a8 g F .text 00000014 NvmDone
0800350c g F .text 0000002c f_mount
08005074 g F .text 00000064 UartTransmitPacket
08005174 g F .text 00000008 NvmVerifyChecksum
08004bdc g F .text 00000024 CpuMemCopy
080050a0 g F .text 00000064 UartTransmitPacket
080051a0 g F .text 00000008 NvmVerifyChecksum
08004c08 g F .text 00000024 CpuMemCopy
08001afc g F .text 0000001c SDIO_GetResponse
08001cb4 g F .text 000000f8 SystemInit
080027c4 g F .text 0000012e put_fat
08003b68 g F .text 000001bc f_lseek
080050d8 g F .text 00000084 UartReceivePacket
08005104 g F .text 00000084 UartReceivePacket
0800024c g F .text 00000008 FileGetFirmwareFilenameHook
08001124 g F .text 000001bc SD_ReadBlock
20000000 g .data 00000000 _data
08003d24 g F .text 0000004c f_stat
0800444c g F .text 00000002 CopInit
08004c00 g F .text 00000008 CpuReset
08004c2c g F .text 00000008 CpuReset
080007d0 g F .text 0000002c SD_Detect
08005164 g F .text 00000008 NvmWrite
08004bb4 g F .text 00000028 CpuStartUserProgram
08005190 g F .text 00000008 NvmWrite
08004be0 g F .text 00000028 CpuStartUserProgram
080025ec g F .text 0000001e clust2sect
2000183c g .bss 00000000 _estack
08001c90 g F .text 0000000c USART_SendData
08004f30 g F .text 00000058 FlashVerifyChecksum
08004f5c g F .text 00000058 FlashVerifyChecksum
2000001c g .data 00000000 _edata
08004788 g F .text 00000014 FileIsIdle
0800457c g F .text 00000014 FileIsIdle
0800389c g F .text 00000200 f_write
08000000 g O .text 00000188 _vectab
08003538 g F .text 000001a0 f_open
@ -283,7 +287,7 @@ SYMBOL TABLE:
080002d0 g F .text 00000054 FileFirmwareUpdateLogHook
20000018 g O .data 00000004 __ctype_ptr__
08004030 g F .text 00000008 ComIsConnected
08005c3c g O .text 00000101 _ctype_
08005c68 g O .text 00000101 _ctype_
08001a6c g F .text 00000030 SDIO_Init
08000204 g F .text 00000048 FileIsFirmwareUpdateRequestedHook
080007fc g F .text 00000270 SD_PowerON
@ -293,11 +297,11 @@ SYMBOL TABLE:
2000103c g .bss 00000000 _stack
08001a34 g F .text 0000001c RCC_APB2PeriphResetCmd
08003f10 g F .text 0000004c ff_convert
080051ec g F .text 00000010 TimerGet
08005218 g F .text 00000010 TimerGet
08001ab4 g F .text 00000010 SDIO_GetPowerState
08000a6c g F .text 000001b0 SD_InitializeCards
08001904 g F .text 0000000c GPIO_ReadInputDataBit
080051a0 g F .text 0000002c TimerInit
080051cc g F .text 0000002c TimerInit
08001b50 g F .text 0000000c SDIO_WriteData
08000254 g F .text 0000002c FileFirmwareUpdateStartedHook
08001a50 g F .text 0000001c SDIO_DeInit

879
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Boot/bin/openbtl_olimex_stm32e407.srec
View File

@ -1,48 +1,48 @@
S024000062696E2F6F70656E62746C5F6F6C696D65785F73746D3332653430372E737265639F
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@ -347,13 +347,13 @@ S31508001580FE021A70014B187808BD00BF040000203F
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@ -714,7 +714,7 @@ S31508002C70D04620465946FFF7A1FE074600283FF4EE
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27
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Boot/blt_conf.h
View File

@ -61,6 +61,33 @@
/****************************************************************************************
* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
****************************************************************************************/
/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
* in bits/second. Two CAN messages are reserved for communication with the host. The
* message identifier for sending data from the target to the host is configured with
* BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
* BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data
* transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
* BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
* than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
* CAN controller channel.
*
*/
/** \brief Enable/disable CAN transport layer. */
#define BOOT_COM_CAN_ENABLE (0)
/** \brief Configure the desired CAN baudrate. */
#define BOOT_COM_CAN_BAUDRATE (500000)
/** \brief Configure CAN message ID target->host. */
#define BOOT_COM_CAN_TX_MSG_ID (0x7E1)
/** \brief Configure number of bytes in the target->host CAN message. */
#define BOOT_COM_CAN_TX_MAX_DATA (8)
/** \brief Configure CAN message ID host->target. */
#define BOOT_COM_CAN_RX_MSG_ID (0x667)
/** \brief Configure number of bytes in the host->target CAN message. */
#define BOOT_COM_CAN_RX_MAX_DATA (8)
/** \brief Select the desired CAN peripheral as a zero based index. */
#define BOOT_COM_CAN_CHANNEL_INDEX (1)
/* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE
* configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed
* in bits/second. The maximum amount of data bytes in a message for data transmission

10
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Boot/ide/DemoBoot.project
View File

@ -229,6 +229,16 @@ continue
<File Name="../../../../Source/ARMCM4_STM32/GCC/cstart.c"/>
<File Name="../../../../Source/ARMCM4_STM32/GCC/vectors.c"/>
</VirtualDirectory>
<VirtualDirectory Name="Crossworks">
<File Name="../../../../Source/ARMCM4_STM32/Crossworks/cstart.s"/>
<File Name="../../../../Source/ARMCM4_STM32/Crossworks/vectors.c"/>
</VirtualDirectory>
<VirtualDirectory Name="IAR">
<File Name="../../../../Source/ARMCM4_STM32/IAR/cstart.s"/>
<File Name="../../../../Source/ARMCM4_STM32/IAR/vectors.c"/>
</VirtualDirectory>
<File Name="../../../../Source/ARMCM4_STM32/can.c"/>
<File Name="../../../../Source/ARMCM4_STM32/can.h"/>
</VirtualDirectory>
</VirtualDirectory>
</CodeLite_Project>

20
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Boot/main.c
View File

@ -79,6 +79,8 @@ static void Init(void)
#elif (BOOT_FILE_SYS_ENABLE > 0)
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
#elif (BOOT_COM_CAN_ENABLE > 0)
GPIO_InitTypeDef GPIO_InitStructure;
#endif
/* disable all interrupts to prevent possible jump back to the user program */
@ -134,6 +136,24 @@ static void Init(void)
/* enable UART */
USART_Cmd(USART6, ENABLE);
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* enable clocks for CAN2 transmitter and receiver pins */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
/* select alternate function for the CAN2 pins */
GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_CAN2);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_CAN2);
/* configure CAN2 RX and TX pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* enable CAN clock. Note that CAN2 shares reception filters with CAN1 so for CAN2
* the CAN1 peripheral also needs to be enabled.
*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN2 | RCC_APB1Periph_CAN1, ENABLE);
#endif
} /*** end of Init ***/

2
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Boot/makefile
View File

@ -126,6 +126,8 @@ main.c \
../../../Source/assert.h \
../../../Source/plausibility.h \
../../../Source/ARMCM4_STM32/types.h \
../../../Source/ARMCM4_STM32/can.c \
../../../Source/ARMCM4_STM32/can.h \
../../../Source/ARMCM4_STM32/cpu.c \
../../../Source/ARMCM4_STM32/cpu.h \
../../../Source/ARMCM4_STM32/flash.c \

180
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_GCC/Prog/boot.c
View File

@ -182,4 +182,184 @@ static unsigned char UartReceiveByte(unsigned char *data)
#endif /* BOOT_COM_UART_ENABLE > 0 */
#if (BOOT_COM_CAN_ENABLE > 0)
/****************************************************************************************
* C O N T R O L L E R A R E A N E T W O R K I N T E R F A C E
****************************************************************************************/
/****************************************************************************************
* Type definitions
****************************************************************************************/
/** \brief Structure type for grouping CAN bus timing related information. */
typedef struct t_can_bus_timing
{
unsigned char tseg1; /**< CAN time segment 1 */
unsigned char tseg2; /**< CAN time segment 2 */
} tCanBusTiming;
/****************************************************************************************
* Local constant declarations
****************************************************************************************/
/** \brief CAN bittiming table for dynamically calculating the bittiming settings.
* \details According to the CAN protocol 1 bit-time can be made up of between 8..25
* time quanta (TQ). The total TQ in a bit is SYNC + TSEG1 + TSEG2 with SYNC
* always being 1. The sample point is (SYNC + TSEG1) / (SYNC + TSEG1 + SEG2) *
* 100%. This array contains possible and valid time quanta configurations with
* a sample point between 68..78%.
*/
static const tCanBusTiming canTiming[] =
{ /* TQ | TSEG1 | TSEG2 | SP */
/* ------------------------- */
{ 5, 2 }, /* 8 | 5 | 2 | 75% */
{ 6, 2 }, /* 9 | 6 | 2 | 78% */
{ 6, 3 }, /* 10 | 6 | 3 | 70% */
{ 7, 3 }, /* 11 | 7 | 3 | 73% */
{ 8, 3 }, /* 12 | 8 | 3 | 75% */
{ 9, 3 }, /* 13 | 9 | 3 | 77% */
{ 9, 4 }, /* 14 | 9 | 4 | 71% */
{ 10, 4 }, /* 15 | 10 | 4 | 73% */
{ 11, 4 }, /* 16 | 11 | 4 | 75% */
{ 12, 4 }, /* 17 | 12 | 4 | 76% */
{ 12, 5 }, /* 18 | 12 | 5 | 72% */
{ 13, 5 }, /* 19 | 13 | 5 | 74% */
{ 14, 5 }, /* 20 | 14 | 5 | 75% */
{ 15, 5 }, /* 21 | 15 | 5 | 76% */
{ 15, 6 }, /* 22 | 15 | 6 | 73% */
{ 16, 6 }, /* 23 | 16 | 6 | 74% */
{ 16, 7 }, /* 24 | 16 | 7 | 71% */
{ 16, 8 } /* 25 | 16 | 8 | 68% */
};
/************************************************************************************//**
** \brief Search algorithm to match the desired baudrate to a possible bus
** timing configuration.
** \param baud The desired baudrate in kbps. Valid values are 10..1000.
** \param prescaler Pointer to where the value for the prescaler will be stored.
** \param tseg1 Pointer to where the value for TSEG2 will be stored.
** \param tseg2 Pointer to where the value for TSEG2 will be stored.
** \return 1 if the CAN bustiming register values were found, 0 otherwise.
**
****************************************************************************************/
static unsigned char CanGetSpeedConfig(unsigned short baud, unsigned short *prescaler,
unsigned char *tseg1, unsigned char *tseg2)
{
unsigned char cnt;
/* loop through all possible time quanta configurations to find a match */
for (cnt=0; cnt < sizeof(canTiming)/sizeof(canTiming[0]); cnt++)
{
if (((BOOT_CPU_SYSTEM_SPEED_KHZ/4) % (baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))) == 0)
{
/* compute the prescaler that goes with this TQ configuration */
*prescaler = (BOOT_CPU_SYSTEM_SPEED_KHZ/4)/(baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1));
/* make sure the prescaler is valid */
if ( (*prescaler > 0) && (*prescaler <= 1024) )
{
/* store the bustiming configuration */
*tseg1 = canTiming[cnt].tseg1;
*tseg2 = canTiming[cnt].tseg2;
/* found a good bus timing configuration */
return 1;
}
}
}
/* could not find a good bus timing configuration */
return 0;
} /*** end of CanGetSpeedConfig ***/
/************************************************************************************//**
** \brief Initializes the CAN communication interface.
** \return none.
**
****************************************************************************************/
void BootComInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
CAN_InitTypeDef CAN_InitStructure;
CAN_FilterInitTypeDef CAN_FilterInitStructure;
unsigned short prescaler;
unsigned char tseg1, tseg2;
/* enable clocks for CAN2 transmitter and receiver pins */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
/* select alternate function for the CAN2 pins */
GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_CAN2);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_CAN2);
/* configure CAN2 RX and TX pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* enable CAN clock. Note that CAN2 shares reception filters with CAN1 so for CAN2
* the CAN1 peripheral also needs to be enabled.
*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN2 | RCC_APB1Periph_CAN1, ENABLE);
/* CAN register init */
CAN_DeInit(CAN2);
CAN_StructInit(&CAN_InitStructure);
/* obtain the bittiming configuration for this baudrate */
CanGetSpeedConfig(BOOT_COM_CAN_BAUDRATE/1000, &prescaler, &tseg1, &tseg2);
/* CAN controller init */
CAN_InitStructure.CAN_TTCM = DISABLE;
CAN_InitStructure.CAN_ABOM = DISABLE;
CAN_InitStructure.CAN_AWUM = DISABLE;
CAN_InitStructure.CAN_NART = DISABLE;
CAN_InitStructure.CAN_RFLM = DISABLE;
CAN_InitStructure.CAN_TXFP = DISABLE;
CAN_InitStructure.CAN_Mode = CAN_Mode_Normal;
/* CAN Baudrate init */
CAN_InitStructure.CAN_SJW = CAN_SJW_1tq;
CAN_InitStructure.CAN_BS1 = tseg1 - 1;
CAN_InitStructure.CAN_BS2 = tseg2 - 1;
CAN_InitStructure.CAN_Prescaler = prescaler;
CAN_Init(CAN2, &CAN_InitStructure);
/* CAN filter init - receive all messages */
CAN_FilterInitStructure.CAN_FilterNumber = 14;
CAN_FilterInitStructure.CAN_FilterMode = CAN_FilterMode_IdMask;
CAN_FilterInitStructure.CAN_FilterScale = CAN_FilterScale_32bit;
CAN_FilterInitStructure.CAN_FilterIdHigh = 0x0000;
CAN_FilterInitStructure.CAN_FilterIdLow = 0x0000;
CAN_FilterInitStructure.CAN_FilterMaskIdHigh = 0x0000;
CAN_FilterInitStructure.CAN_FilterMaskIdLow = 0x0000;
CAN_FilterInitStructure.CAN_FilterFIFOAssignment = 0;
CAN_FilterInitStructure.CAN_FilterActivation = ENABLE;
CAN_FilterInit(&CAN_FilterInitStructure);
} /*** end of BootComInit ***/
/************************************************************************************//**
** \brief Receives the CONNECT request from the host, which indicates that the
** bootloader should be activated and, if so, activates it.
** \return none.
**
****************************************************************************************/
void BootComCheckActivationRequest(void)
{
CanRxMsg RxMessage;
/* check if a new message was received */
if (CAN_MessagePending(CAN2, CAN_FIFO0) > 0)
{
/* receive the message */
CAN_Receive(CAN2, CAN_FIFO0, &RxMessage);
if (RxMessage.StdId == BOOT_COM_CAN_RX_MSG_ID)
{
/* check if this was an XCP CONNECT command */
if ((RxMessage.Data[0] == 0xff) && (RxMessage.Data[1] == 0x00))
{
/* connection request received so start the bootloader */
BootActivate();
}
}
}
} /*** end of BootComCheckActivationRequest ***/
#endif /* BOOT_COM_CAN_ENABLE > 0 */
/*********************************** end of boot.c *************************************/

BIN
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/bin/openbtl_olimex_stm32e407.out
View File

Binary file not shown.

4
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/bin/openbtl_olimex_stm32e407.srec
View File

@ -1055,7 +1055,7 @@ S315080041B8022B44BF0B7803707047083A07D3B1E857
S315080041C80810083A40F8043B40F804CBF7D25307DE
S315080041D8E4E7FF0010B5DFF8D00600210170DFF824
S315080041E8CC160020FDF7DEFB0400E4B2002C04D050
S315080041F89E21DFF8BC0600F0F7FB10BDDFF8A8061D
S315080041F87C21DFF8BC0600F0F7FB10BDDFF8A8063F
S315080042080078002801D1012000E00020704780B519
S3150800421800F02EFC012801D1002011E0DFF88806FD
S315080042280078002801D000200AE000F025FC0128C3
@ -1135,7 +1135,7 @@ S315080046B800F070F90500AE19A41C200000F06AF98C
S315080046C8801906006D1EA41CADB2022DF5DAF6B2E5
S315080046D8F643200000F05EF9F6B2864201D00020C3
S315080046E800E0012070BD2DE9F84F82460C00150040
S315080046F80027002C02D0BAF1000F04D14FF4167126
S315080046F80027002C02D0BAF1000F04D140F2362167
S315080047086B4800F071F95046FFF7AEFF0600F6B29F
S31508004718032E01D10020C4E05046FFF7C4FF002845
S3150800472802D15FF0FF30BCE0F6B2002E03D0022EAD

27
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/blt_conf.h
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@ -63,6 +63,33 @@
/****************************************************************************************
* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
****************************************************************************************/
/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
* in bits/second. Two CAN messages are reserved for communication with the host. The
* message identifier for sending data from the target to the host is configured with
* BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
* BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data
* transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
* BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
* than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
* CAN controller channel.
*
*/
/** \brief Enable/disable CAN transport layer. */
#define BOOT_COM_CAN_ENABLE (0)
/** \brief Configure the desired CAN baudrate. */
#define BOOT_COM_CAN_BAUDRATE (500000)
/** \brief Configure CAN message ID target->host. */
#define BOOT_COM_CAN_TX_MSG_ID (0x7E1)
/** \brief Configure number of bytes in the target->host CAN message. */
#define BOOT_COM_CAN_TX_MAX_DATA (8)
/** \brief Configure CAN message ID host->target. */
#define BOOT_COM_CAN_RX_MSG_ID (0x667)
/** \brief Configure number of bytes in the host->target CAN message. */
#define BOOT_COM_CAN_RX_MAX_DATA (8)
/** \brief Select the desired CAN peripheral as a zero based index. */
#define BOOT_COM_CAN_CHANNEL_INDEX (1)
/* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE
* configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed
* in bits/second. The maximum amount of data bytes in a message for data transmission

4
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/ide/settings/stm32f407.dbgdt
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2
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/ide/settings/stm32f407.dni
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@ -9,7 +9,7 @@ TriggerName=main
LimitSize=0
ByteLimit=50
[DebugChecksum]
Checksum=-471197012
Checksum=1695986847
[Exceptions]
StopOnUncaught=_ 0
StopOnThrow=_ 0

28
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/ide/settings/stm32f407.wsdt
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907
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/ide/stm32f407.dep
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File diff suppressed because it is too large Load Diff

6
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/ide/stm32f407.ewp
View File

@ -2079,6 +2079,12 @@
<name>$PROJ_DIR$\..\..\..\..\Source\ARMCM4_STM32\IAR\vectors.c</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\..\..\..\..\Source\ARMCM4_STM32\can.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\Source\ARMCM4_STM32\can.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\Source\ARMCM4_STM32\cpu.c</name>
</file>

20
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Boot/main.c
View File

@ -79,6 +79,8 @@ static void Init(void)
#elif (BOOT_FILE_SYS_ENABLE > 0)
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
#elif (BOOT_COM_CAN_ENABLE > 0)
GPIO_InitTypeDef GPIO_InitStructure;
#endif
/* disable all interrupts to prevent possible jump back to the user program */
@ -134,6 +136,24 @@ static void Init(void)
/* enable UART */
USART_Cmd(USART6, ENABLE);
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* enable clocks for CAN2 transmitter and receiver pins */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
/* select alternate function for the CAN2 pins */
GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_CAN2);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_CAN2);
/* configure CAN2 RX and TX pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* enable CAN clock. Note that CAN2 shares reception filters with CAN1 so for CAN2
* the CAN1 peripheral also needs to be enabled.
*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN2 | RCC_APB1Periph_CAN1, ENABLE);
#endif
} /*** end of Init ***/

BIN
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Prog/bin/demoprog_olimex_stm32e407.out
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Binary file not shown.

180
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Prog/boot.c
View File

@ -182,4 +182,184 @@ static unsigned char UartReceiveByte(unsigned char *data)
#endif /* BOOT_COM_UART_ENABLE > 0 */
#if (BOOT_COM_CAN_ENABLE > 0)
/****************************************************************************************
* C O N T R O L L E R A R E A N E T W O R K I N T E R F A C E
****************************************************************************************/
/****************************************************************************************
* Type definitions
****************************************************************************************/
/** \brief Structure type for grouping CAN bus timing related information. */
typedef struct t_can_bus_timing
{
unsigned char tseg1; /**< CAN time segment 1 */
unsigned char tseg2; /**< CAN time segment 2 */
} tCanBusTiming;
/****************************************************************************************
* Local constant declarations
****************************************************************************************/
/** \brief CAN bittiming table for dynamically calculating the bittiming settings.
* \details According to the CAN protocol 1 bit-time can be made up of between 8..25
* time quanta (TQ). The total TQ in a bit is SYNC + TSEG1 + TSEG2 with SYNC
* always being 1. The sample point is (SYNC + TSEG1) / (SYNC + TSEG1 + SEG2) *
* 100%. This array contains possible and valid time quanta configurations with
* a sample point between 68..78%.
*/
static const tCanBusTiming canTiming[] =
{ /* TQ | TSEG1 | TSEG2 | SP */
/* ------------------------- */
{ 5, 2 }, /* 8 | 5 | 2 | 75% */
{ 6, 2 }, /* 9 | 6 | 2 | 78% */
{ 6, 3 }, /* 10 | 6 | 3 | 70% */
{ 7, 3 }, /* 11 | 7 | 3 | 73% */
{ 8, 3 }, /* 12 | 8 | 3 | 75% */
{ 9, 3 }, /* 13 | 9 | 3 | 77% */
{ 9, 4 }, /* 14 | 9 | 4 | 71% */
{ 10, 4 }, /* 15 | 10 | 4 | 73% */
{ 11, 4 }, /* 16 | 11 | 4 | 75% */
{ 12, 4 }, /* 17 | 12 | 4 | 76% */
{ 12, 5 }, /* 18 | 12 | 5 | 72% */
{ 13, 5 }, /* 19 | 13 | 5 | 74% */
{ 14, 5 }, /* 20 | 14 | 5 | 75% */
{ 15, 5 }, /* 21 | 15 | 5 | 76% */
{ 15, 6 }, /* 22 | 15 | 6 | 73% */
{ 16, 6 }, /* 23 | 16 | 6 | 74% */
{ 16, 7 }, /* 24 | 16 | 7 | 71% */
{ 16, 8 } /* 25 | 16 | 8 | 68% */
};
/************************************************************************************//**
** \brief Search algorithm to match the desired baudrate to a possible bus
** timing configuration.
** \param baud The desired baudrate in kbps. Valid values are 10..1000.
** \param prescaler Pointer to where the value for the prescaler will be stored.
** \param tseg1 Pointer to where the value for TSEG2 will be stored.
** \param tseg2 Pointer to where the value for TSEG2 will be stored.
** \return 1 if the CAN bustiming register values were found, 0 otherwise.
**
****************************************************************************************/
static unsigned char CanGetSpeedConfig(unsigned short baud, unsigned short *prescaler,
unsigned char *tseg1, unsigned char *tseg2)
{
unsigned char cnt;
/* loop through all possible time quanta configurations to find a match */
for (cnt=0; cnt < sizeof(canTiming)/sizeof(canTiming[0]); cnt++)
{
if (((BOOT_CPU_SYSTEM_SPEED_KHZ/4) % (baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))) == 0)
{
/* compute the prescaler that goes with this TQ configuration */
*prescaler = (BOOT_CPU_SYSTEM_SPEED_KHZ/4)/(baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1));
/* make sure the prescaler is valid */
if ( (*prescaler > 0) && (*prescaler <= 1024) )
{
/* store the bustiming configuration */
*tseg1 = canTiming[cnt].tseg1;
*tseg2 = canTiming[cnt].tseg2;
/* found a good bus timing configuration */
return 1;
}
}
}
/* could not find a good bus timing configuration */
return 0;
} /*** end of CanGetSpeedConfig ***/
/************************************************************************************//**
** \brief Initializes the CAN communication interface.
** \return none.
**
****************************************************************************************/
void BootComInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
CAN_InitTypeDef CAN_InitStructure;
CAN_FilterInitTypeDef CAN_FilterInitStructure;
unsigned short prescaler;
unsigned char tseg1, tseg2;
/* enable clocks for CAN2 transmitter and receiver pins */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
/* select alternate function for the CAN2 pins */
GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_CAN2);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_CAN2);
/* configure CAN2 RX and TX pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* enable CAN clock. Note that CAN2 shares reception filters with CAN1 so for CAN2
* the CAN1 peripheral also needs to be enabled.
*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN2 | RCC_APB1Periph_CAN1, ENABLE);
/* CAN register init */
CAN_DeInit(CAN2);
CAN_StructInit(&CAN_InitStructure);
/* obtain the bittiming configuration for this baudrate */
CanGetSpeedConfig(BOOT_COM_CAN_BAUDRATE/1000, &prescaler, &tseg1, &tseg2);
/* CAN controller init */
CAN_InitStructure.CAN_TTCM = DISABLE;
CAN_InitStructure.CAN_ABOM = DISABLE;
CAN_InitStructure.CAN_AWUM = DISABLE;
CAN_InitStructure.CAN_NART = DISABLE;
CAN_InitStructure.CAN_RFLM = DISABLE;
CAN_InitStructure.CAN_TXFP = DISABLE;
CAN_InitStructure.CAN_Mode = CAN_Mode_Normal;
/* CAN Baudrate init */
CAN_InitStructure.CAN_SJW = CAN_SJW_1tq;
CAN_InitStructure.CAN_BS1 = tseg1 - 1;
CAN_InitStructure.CAN_BS2 = tseg2 - 1;
CAN_InitStructure.CAN_Prescaler = prescaler;
CAN_Init(CAN2, &CAN_InitStructure);
/* CAN filter init - receive all messages */
CAN_FilterInitStructure.CAN_FilterNumber = 14;
CAN_FilterInitStructure.CAN_FilterMode = CAN_FilterMode_IdMask;
CAN_FilterInitStructure.CAN_FilterScale = CAN_FilterScale_32bit;
CAN_FilterInitStructure.CAN_FilterIdHigh = 0x0000;
CAN_FilterInitStructure.CAN_FilterIdLow = 0x0000;
CAN_FilterInitStructure.CAN_FilterMaskIdHigh = 0x0000;
CAN_FilterInitStructure.CAN_FilterMaskIdLow = 0x0000;
CAN_FilterInitStructure.CAN_FilterFIFOAssignment = 0;
CAN_FilterInitStructure.CAN_FilterActivation = ENABLE;
CAN_FilterInit(&CAN_FilterInitStructure);
} /*** end of BootComInit ***/
/************************************************************************************//**
** \brief Receives the CONNECT request from the host, which indicates that the
** bootloader should be activated and, if so, activates it.
** \return none.
**
****************************************************************************************/
void BootComCheckActivationRequest(void)
{
CanRxMsg RxMessage;
/* check if a new message was received */
if (CAN_MessagePending(CAN2, CAN_FIFO0) > 0)
{
/* receive the message */
CAN_Receive(CAN2, CAN_FIFO0, &RxMessage);
if (RxMessage.StdId == BOOT_COM_CAN_RX_MSG_ID)
{
/* check if this was an XCP CONNECT command */
if ((RxMessage.Data[0] == 0xff) && (RxMessage.Data[1] == 0x00))
{
/* connection request received so start the bootloader */
BootActivate();
}
}
}
} /*** end of BootComCheckActivationRequest ***/
#endif /* BOOT_COM_CAN_ENABLE > 0 */
/*********************************** end of boot.c *************************************/

10
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Prog/ide/settings/stm32f407.wsdt
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@ -12,12 +12,12 @@
<Column0>181</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
<Column0>305</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
</Workspace>
<Build><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1395</ColumnWidth1><ColumnWidth2>372</ColumnWidth2><ColumnWidth3>93</ColumnWidth3></Build><TerminalIO/></Static>
<Windows>
<Wnd0>
<Wnd2>
<Tabs>
<Tab>
<Identity>TabID-29163-19963</Identity>
@ -29,20 +29,20 @@
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-19063-20767</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1></Windows>
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829
Target/Demo/ARMCM4_STM32_Olimex_STM32E407_IAR/Prog/ide/stm32f407.dep
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File diff suppressed because it is too large Load Diff

4
Target/Source/ARMCM3_STM32/can.c
View File

@ -289,9 +289,6 @@ void CanInit(void)
****************************************************************************************/
void CanTransmitPacket(blt_int8u *data, blt_int8u len)
{
blt_int8u byte_count;
blt_int8u mailbox;
/* make sure that transmit mailbox 0 is available */
ASSERT_RT((CANx->TSR&CAN_BIT_TME0) == CAN_BIT_TME0);
/* store the 11-bit message identifier */
@ -327,7 +324,6 @@ void CanTransmitPacket(blt_int8u *data, blt_int8u len)
****************************************************************************************/
blt_bool CanReceivePacket(blt_int8u *data)
{
blt_int8u byte_count;
blt_int32u rxMsgId;
blt_bool result = BLT_FALSE;

388
Target/Source/ARMCM4_STM32/can.c Normal file
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@ -0,0 +1,388 @@
/************************************************************************************//**
* \file Source\ARMCM4_STM32\can.c
* \brief Bootloader CAN communication interface source file.
* \ingroup Target_ARMCM4_STM32
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2013 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with OpenBLT.
* If not, see <http://www.gnu.org/licenses/>.
*
* A special exception to the GPL is included to allow you to distribute a combined work
* that includes OpenBLT without being obliged to provide the source code for any
* proprietary components. The exception text is included at the bottom of the license
* file <license.html>.
*
* \endinternal
****************************************************************************************/
/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#if (BOOT_COM_CAN_ENABLE > 0)
/****************************************************************************************
* Type definitions
****************************************************************************************/
/** \brief CAN transmission mailbox layout. */
typedef struct
{
volatile blt_int32u TIR;
volatile blt_int32u TDTR;
volatile blt_int32u TDLR;
volatile blt_int32u TDHR;
} tCanTxMailBox;
/** \brief CAN reception FIFO mailbox layout. */
typedef struct
{
volatile blt_int32u RIR;
volatile blt_int32u RDTR;
volatile blt_int32u RDLR;
volatile blt_int32u RDHR;
} tCanRxFIFOMailBox;
/** \brief CAN filter register layout. */
typedef struct
{
volatile blt_int32u FR1;
volatile blt_int32u FR2;
} tCanFilter;
/** \brief CAN controller register layout. */
typedef struct
{
volatile blt_int32u MCR;
volatile blt_int32u MSR;
volatile blt_int32u TSR;
volatile blt_int32u RF0R;
volatile blt_int32u RF1R;
volatile blt_int32u IER;
volatile blt_int32u ESR;
volatile blt_int32u BTR;
blt_int32u RESERVED0[88];
tCanTxMailBox sTxMailBox[3];
tCanRxFIFOMailBox sFIFOMailBox[2];
blt_int32u RESERVED1[12];
volatile blt_int32u FMR;
volatile blt_int32u FM1R;
blt_int32u RESERVED2;
volatile blt_int32u FS1R;
blt_int32u RESERVED3;
volatile blt_int32u FFA1R;
blt_int32u RESERVED4;
volatile blt_int32u FA1R;
blt_int32u RESERVED5[8];
tCanFilter sFilterRegister[28];
} tCanRegs;
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Reset request bit. */
#define CAN_BIT_RESET ((blt_int32u)0x00008000)
/** \brief Initialization request bit. */
#define CAN_BIT_INRQ ((blt_int32u)0x00000001)
/** \brief Initialization acknowledge bit. */
#define CAN_BIT_INAK ((blt_int32u)0x00000001)
/** \brief Sleep mode request bit. */
#define CAN_BIT_SLEEP ((blt_int32u)0x00000002)
/** \brief Filter 0 selection bit. */
#define CAN_BIT_FILTER0 ((blt_int32u)0x00000001)
/** \brief Filter 14 selection bit. */
#define CAN_BIT_FILTER14 ((blt_int32u)0x00004000)
/** \brief Filter init mode bit. */
#define CAN_BIT_FINIT ((blt_int32u)0x00000001)
/** \brief Transmit mailbox 0 empty bit. */
#define CAN_BIT_TME0 ((blt_int32u)0x04000000)
/** \brief Transmit mailbox request bit. */
#define CAN_BIT_TXRQ ((blt_int32u)0x00000001)
/** \brief Release FIFO 0 mailbox bit. */
#define CAN_BIT_RFOM0 ((blt_int32u)0x00000020)
/****************************************************************************************
* Register definitions
****************************************************************************************/
#if (BOOT_COM_CAN_CHANNEL_INDEX == 0)
/** \brief Macro for accessing CAN1 controller registers. */
#define CANx ((tCanRegs *) (blt_int32u)0x40006400)
#else
/** \brief Macro for accessing CAN2 controller registers. */
#define CANx ((tCanRegs *) (blt_int32u)0x40006800)
#endif
/** \brief Macro for accessing CAN1 controller registers. */
#define CAN1 ((tCanRegs *) (blt_int32u)0x40006400)
/****************************************************************************************
* Type definitions
****************************************************************************************/
/** \brief Structure type for grouping CAN bus timing related information. */
typedef struct t_can_bus_timing
{
blt_int8u tseg1; /**< CAN time segment 1 */
blt_int8u tseg2; /**< CAN time segment 2 */
} tCanBusTiming;
/****************************************************************************************
* Local constant declarations
****************************************************************************************/
/** \brief CAN bittiming table for dynamically calculating the bittiming settings.
* \details According to the CAN protocol 1 bit-time can be made up of between 8..25
* time quanta (TQ). The total TQ in a bit is SYNC + TSEG1 + TSEG2 with SYNC
* always being 1. The sample point is (SYNC + TSEG1) / (SYNC + TSEG1 + SEG2) *
* 100%. This array contains possible and valid time quanta configurations with
* a sample point between 68..78%.
*/
static const tCanBusTiming canTiming[] =
{ /* TQ | TSEG1 | TSEG2 | SP */
/* ------------------------- */
{ 5, 2 }, /* 8 | 5 | 2 | 75% */
{ 6, 2 }, /* 9 | 6 | 2 | 78% */
{ 6, 3 }, /* 10 | 6 | 3 | 70% */
{ 7, 3 }, /* 11 | 7 | 3 | 73% */
{ 8, 3 }, /* 12 | 8 | 3 | 75% */
{ 9, 3 }, /* 13 | 9 | 3 | 77% */
{ 9, 4 }, /* 14 | 9 | 4 | 71% */
{ 10, 4 }, /* 15 | 10 | 4 | 73% */
{ 11, 4 }, /* 16 | 11 | 4 | 75% */
{ 12, 4 }, /* 17 | 12 | 4 | 76% */
{ 12, 5 }, /* 18 | 12 | 5 | 72% */
{ 13, 5 }, /* 19 | 13 | 5 | 74% */
{ 14, 5 }, /* 20 | 14 | 5 | 75% */
{ 15, 5 }, /* 21 | 15 | 5 | 76% */
{ 15, 6 }, /* 22 | 15 | 6 | 73% */
{ 16, 6 }, /* 23 | 16 | 6 | 74% */
{ 16, 7 }, /* 24 | 16 | 7 | 71% */
{ 16, 8 } /* 25 | 16 | 8 | 68% */
};
/************************************************************************************//**
** \brief Search algorithm to match the desired baudrate to a possible bus
** timing configuration.
** \param baud The desired baudrate in kbps. Valid values are 10..1000.
** \param prescaler Pointer to where the value for the prescaler will be stored.
** \param tseg1 Pointer to where the value for TSEG2 will be stored.
** \param tseg2 Pointer to where the value for TSEG2 will be stored.
** \return BLT_TRUE if the CAN bustiming register values were found, BLT_FALSE
** otherwise.
**
****************************************************************************************/
static blt_bool CanGetSpeedConfig(blt_int16u baud, blt_int16u *prescaler,
blt_int8u *tseg1, blt_int8u *tseg2)
{
blt_int8u cnt;
/* loop through all possible time quanta configurations to find a match */
for (cnt=0; cnt < sizeof(canTiming)/sizeof(canTiming[0]); cnt++)
{
if (((BOOT_CPU_SYSTEM_SPEED_KHZ/4) % (baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))) == 0)
{
/* compute the prescaler that goes with this TQ configuration */
*prescaler = (BOOT_CPU_SYSTEM_SPEED_KHZ/4)/(baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1));
/* make sure the prescaler is valid */
if ( (*prescaler > 0) && (*prescaler <= 1024) )
{
/* store the bustiming configuration */
*tseg1 = canTiming[cnt].tseg1;
*tseg2 = canTiming[cnt].tseg2;
/* found a good bus timing configuration */
return BLT_TRUE;
}
}
}
/* could not find a good bus timing configuration */
return BLT_FALSE;
} /*** end of CanGetSpeedConfig ***/
/************************************************************************************//**
** \brief Initializes the CAN controller and synchronizes it to the CAN bus.
** \return none.
**
****************************************************************************************/
void CanInit(void)
{
blt_int16u prescaler;
blt_int8u tseg1, tseg2;
blt_bool result;
/* the current implementation supports CAN1 and 2. throw an assertion error in case a
* different CAN channel is configured.
*/
ASSERT_CT((BOOT_COM_CAN_CHANNEL_INDEX == 0 || BOOT_COM_CAN_CHANNEL_INDEX == 1));
/* obtain bittiming configuration information */
result = CanGetSpeedConfig(BOOT_COM_CAN_BAUDRATE/1000, &prescaler, &tseg1, &tseg2);
ASSERT_RT(result == BLT_TRUE);
/* disable all can interrupt. this driver works in polling mode */
CANx->IER = (blt_int32u)0;
/* set request to reset the can controller */
CANx->MCR |= CAN_BIT_RESET ;
/* wait for acknowledge that the can controller was reset */
while ((CANx->MCR & CAN_BIT_RESET) != 0)
{
/* keep the watchdog happy */
CopService();
}
/* exit from sleep mode, which is the default mode after reset */
CANx->MCR &= ~CAN_BIT_SLEEP;
/* set request to enter initialisation mode */
CANx->MCR |= CAN_BIT_INRQ ;
/* wait for acknowledge that initialization mode was entered */
while ((CANx->MSR & CAN_BIT_INAK) == 0)
{
/* keep the watchdog happy */
CopService();
}
/* configure the bittming */
CANx->BTR = (blt_int32u)((blt_int32u)(tseg1 - 1) << 16) | \
(blt_int32u)((blt_int32u)(tseg2 - 1) << 20) | \
(blt_int32u)(prescaler - 1);
/* set request to leave initialisation mode */
CANx->MCR &= ~CAN_BIT_INRQ;
/* wait for acknowledge that initialization mode was exited */
while ((CANx->MSR & CAN_BIT_INAK) != 0)
{
/* keep the watchdog happy */
CopService();
}
#if (BOOT_COM_CAN_CHANNEL_INDEX == 0)
/* enter initialisation mode for the acceptance filter */
CAN1->FMR |= CAN_BIT_FINIT;
/* deactivate filter 0 */
CAN1->FA1R &= ~CAN_BIT_FILTER0;
/* 32-bit scale for the filter */
CAN1->FS1R |= CAN_BIT_FILTER0;
/* open up the acceptance filter to receive all messages */
CAN1->sFilterRegister[0].FR1 = 0;
CAN1->sFilterRegister[0].FR2 = 0;
/* select id/mask mode for the filter */
CAN1->FM1R &= ~CAN_BIT_FILTER0;
/* FIFO 0 assignation for the filter */
CAN1->FFA1R &= ~CAN_BIT_FILTER0;
/* filter activation */
CAN1->FA1R |= CAN_BIT_FILTER0;
/* leave initialisation mode for the acceptance filter */
CAN1->FMR &= ~CAN_BIT_FINIT;
#else
/* enter initialisation mode for the acceptance filter */
CAN1->FMR |= CAN_BIT_FINIT;
/* deactivate filter 14 */
CAN1->FA1R &= ~CAN_BIT_FILTER14;
/* 32-bit scale for the filter */
CAN1->FS1R |= CAN_BIT_FILTER14;
/* open up the acceptance filter to receive all messages */
CAN1->sFilterRegister[14].FR1 = 0;
CAN1->sFilterRegister[14].FR2 = 0;
/* select id/mask mode for the filter */
CAN1->FM1R &= ~CAN_BIT_FILTER14;
/* FIFO 0 assignation for the filter */
CAN1->FFA1R &= ~CAN_BIT_FILTER14;
/* filter activation */
CAN1->FA1R |= CAN_BIT_FILTER14;
/* leave initialisation mode for the acceptance filter */
CAN1->FMR &= ~CAN_BIT_FINIT;
#endif
} /*** end of CanInit ***/
/************************************************************************************//**
** \brief Transmits a packet formatted for the communication interface.
** \param data Pointer to byte array with data that it to be transmitted.
** \param len Number of bytes that are to be transmitted.
** \return none.
**
****************************************************************************************/
void CanTransmitPacket(blt_int8u *data, blt_int8u len)
{
/* make sure that transmit mailbox 0 is available */
ASSERT_RT((CANx->TSR&CAN_BIT_TME0) == CAN_BIT_TME0);
/* store the 11-bit message identifier */
CANx->sTxMailBox[0].TIR &= CAN_BIT_TXRQ;
CANx->sTxMailBox[0].TIR |= ((blt_int32u)BOOT_COM_CAN_TX_MSG_ID << 21);
/* store the message date length code (DLC) */
CANx->sTxMailBox[0].TDTR = len;
/* store the message data bytes */
CANx->sTxMailBox[0].TDLR = (((blt_int32u)data[3] << 24) | \
((blt_int32u)data[2] << 16) | \
((blt_int32u)data[1] << 8) | \
((blt_int32u)data[0]));
CANx->sTxMailBox[0].TDHR = (((blt_int32u)data[7] << 24) | \
((blt_int32u)data[6] << 16) | \
((blt_int32u)data[5] << 8) | \
((blt_int32u)data[4]));
/* request the start of message transmission */
CANx->sTxMailBox[0].TIR |= CAN_BIT_TXRQ;
/* wait for transmit completion */
while ((CANx->TSR&CAN_BIT_TME0) == 0)
{
/* keep the watchdog happy */
CopService();
}
} /*** end of CanTransmitPacket ***/
/************************************************************************************//**
** \brief Receives a communication interface packet if one is present.
** \param data Pointer to byte array where the data is to be stored.
** \return BLT_TRUE is a packet was received, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool CanReceivePacket(blt_int8u *data)
{
blt_int32u rxMsgId;
blt_bool result = BLT_FALSE;
/* check if a new message was received */
if ((CANx->RF0R&(blt_int32u)0x00000003) > 0)
{
/* read out the message identifier */
rxMsgId = (blt_int32u)0x000007FF & (CANx->sFIFOMailBox[0].RIR >> 21);
/* is this the packet identifier */
if (rxMsgId == BOOT_COM_CAN_RX_MSG_ID)
{
result = BLT_TRUE;
/* store the received packet data */
data[0] = (blt_int8u)0xFF & CANx->sFIFOMailBox[0].RDLR;
data[1] = (blt_int8u)0xFF & (CANx->sFIFOMailBox[0].RDLR >> 8);
data[2] = (blt_int8u)0xFF & (CANx->sFIFOMailBox[0].RDLR >> 16);
data[3] = (blt_int8u)0xFF & (CANx->sFIFOMailBox[0].RDLR >> 24);
data[4] = (blt_int8u)0xFF & CANx->sFIFOMailBox[0].RDHR;
data[5] = (blt_int8u)0xFF & (CANx->sFIFOMailBox[0].RDHR >> 8);
data[6] = (blt_int8u)0xFF & (CANx->sFIFOMailBox[0].RDHR >> 16);
data[7] = (blt_int8u)0xFF & (CANx->sFIFOMailBox[0].RDHR >> 24);
}
/* release FIFO0 */
CANx->RF0R |= CAN_BIT_RFOM0;
}
return result;
} /*** end of CanReceivePacket ***/
#endif /* BOOT_COM_CAN_ENABLE > 0 */
/*********************************** end of can.c **************************************/

47
Target/Source/ARMCM4_STM32/can.h Normal file
View File

@ -0,0 +1,47 @@
/************************************************************************************//**
* \file Source\ARMCM4_STM32\can.h
* \brief Bootloader CAN communication interface header file.
* \ingroup Target_ARMCM4_STM32
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2013 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with OpenBLT.
* If not, see <http://www.gnu.org/licenses/>.
*
* A special exception to the GPL is included to allow you to distribute a combined work
* that includes OpenBLT without being obliged to provide the source code for any
* proprietary components. The exception text is included at the bottom of the license
* file <license.html>.
*
* \endinternal
****************************************************************************************/
#ifndef CAN_H
#define CAN_H
#if (BOOT_COM_CAN_ENABLE > 0)
/****************************************************************************************
* Function prototypes
****************************************************************************************/
void CanInit(void);
void CanTransmitPacket(blt_int8u *data, blt_int8u len);
blt_bool CanReceivePacket(blt_int8u *data);
#endif /* BOOT_COM_CAN_ENABLE > 0 */
#endif /* CAN_H */
/*********************************** end of can.h **************************************/

2
Target/Source/boot.h
View File

@ -41,7 +41,7 @@
/** \brief Minor version of the bootloader core. */
#define BOOT_VERSION_CORE_MINOR (96u)
/** \brief Bufgix version of the bootloader core. */
#define BOOT_VERSION_CORE_BUGFIX (0u)
#define BOOT_VERSION_CORE_BUGFIX (1u)
/****************************************************************************************

54
Target/Source/file.c
View File

@ -40,19 +40,6 @@
#if (BOOT_FILE_SYS_ENABLE > 0)
/****************************************************************************************
* Defines
****************************************************************************************/
/** \brief Maximum number of characters that can be on a line in the firmware file. */
#define MAX_CHARS_PER_LINE (256)
/** \brief Maximum number of data bytes that can be on a line in the firmware file
* (S-record).
*/
#define MAX_DATA_BYTES_PER_LINE (MAX_CHARS_PER_LINE/2)
/** \brief Return code in case an invalid checksum was detected on an S-record line. */
#define ERROR_SREC_INVALID_CHECKSUM (-1)
/****************************************************************************************
* Type definitions
****************************************************************************************/
@ -65,15 +52,6 @@ typedef enum
FIRMWARE_UPDATE_STATE_PROGRAMMING /**< programming state */
} tFirmwareUpdateState;
/** \brief Enumeration for the different S-record line types. */
typedef enum
{
LINE_TYPE_S1, /**< 16-bit address line */
LINE_TYPE_S2, /**< 24-bit address line */
LINE_TYPE_S3, /**< 32-bit address line */
LINE_TYPE_UNSUPPORTED /**< unsupported line */
} tSrecLineType;
/** \brief Structure type with information for the memory erase opeartion. */
typedef struct
{
@ -88,21 +66,9 @@ typedef struct
FIL file; /**< file object for firmware file */
} tFatFsObjects;
/** \brief Structure type for grouping the parsing results of an S-record line. */
typedef struct
{
blt_char line[MAX_CHARS_PER_LINE]; /**< string buffer for the line chars */
blt_int8u data[MAX_DATA_BYTES_PER_LINE]; /**< array for S1, S2 or S3 data bytes*/
blt_addr address; /**< address on S1, S2 or S3 line */
} tSrecLineParseObject;
/****************************************************************************************
* Function prototypes
****************************************************************************************/
static tSrecLineType SrecGetLineType(const blt_char *line);
static blt_bool SrecVerifyChecksum(const blt_char *line);
static blt_int16s SrecParseLine(const blt_char *line, blt_addr *address, blt_int8u *data);
#if (BOOT_FILE_LOGGING_ENABLE > 0)
static blt_char FileLibByteNibbleToChar(blt_int8u nibble);
static blt_char *FileLibByteToHexString(blt_int8u byte_val, blt_char *destination);
@ -284,7 +250,7 @@ void FileTask(void)
/* parse the S-Record line without copying the data values if the line is not empty */
if (read_line_ptr != BLT_NULL)
{
parse_result = SrecParseLine(lineParseObject.line, &lineParseObject.address, BLT_NULL);
parse_result = FileSrecParseLine(lineParseObject.line, &lineParseObject.address, BLT_NULL);
/* check parsing result */
if (parse_result == ERROR_SREC_INVALID_CHECKSUM)
{
@ -399,7 +365,7 @@ void FileTask(void)
/* parse the S-Record line if the line is not empty */
if (read_line_ptr != BLT_NULL)
{
parse_result = SrecParseLine(lineParseObject.line, &lineParseObject.address, lineParseObject.data);
parse_result = FileSrecParseLine(lineParseObject.line, &lineParseObject.address, lineParseObject.data);
/* check parsing result */
if (parse_result == ERROR_SREC_INVALID_CHECKSUM)
{
@ -505,7 +471,7 @@ void FileTask(void)
** \return the S-Record line type.
**
****************************************************************************************/
static tSrecLineType SrecGetLineType(const blt_char *line)
tSrecLineType FileSrecGetLineType(const blt_char *line)
{
/* check if the line starts with the 'S' character, followed by a digit */
if ( (toupper(line[0]) != 'S') || (isdigit(line[1]) == 0) )
@ -528,7 +494,7 @@ static tSrecLineType SrecGetLineType(const blt_char *line)
}
/* still here so not a supported line type found */
return LINE_TYPE_UNSUPPORTED;
} /*** end of SrecGetLineType ***/
} /*** end of FileSrecGetLineType ***/
/************************************************************************************//**
@ -538,7 +504,7 @@ static tSrecLineType SrecGetLineType(const blt_char *line)
** \return BLT_TRUE if the checksum is correct, BLT_FALSE otherwise.
**
****************************************************************************************/
static blt_bool SrecVerifyChecksum(const blt_char *line)
blt_bool FileSrecVerifyChecksum(const blt_char *line)
{
blt_int16u bytes_on_line;
blt_int8u checksum = 0;
@ -573,7 +539,7 @@ static blt_bool SrecVerifyChecksum(const blt_char *line)
}
/* still here so the checksum was correct */
return BLT_TRUE;
} /*** end of SrecVerifyChecksum ***/
} /*** end of FileSrecVerifyChecksum ***/
/************************************************************************************//**
@ -589,7 +555,7 @@ static blt_bool SrecVerifyChecksum(const blt_char *line)
** in case the checksum validation failed.
**
****************************************************************************************/
static blt_int16s SrecParseLine(const blt_char *line, blt_addr *address, blt_int8u *data)
blt_int16s FileSrecParseLine(const blt_char *line, blt_addr *address, blt_int8u *data)
{
tSrecLineType lineType;
blt_int16s data_byte_count = 0;
@ -599,7 +565,7 @@ static blt_int16s SrecParseLine(const blt_char *line, blt_addr *address, blt_int
/* check pointers and not that data can be a null pointer */
ASSERT_RT((address != BLT_NULL) && (line != BLT_NULL));
/* figure out what type of line we are dealing with */
lineType = SrecGetLineType(line);
lineType = FileSrecGetLineType(line);
/* make sure it is one that we can parse */
if (lineType == LINE_TYPE_UNSUPPORTED)
{
@ -607,7 +573,7 @@ static blt_int16s SrecParseLine(const blt_char *line, blt_addr *address, blt_int
return 0;
}
/* verify the checksum */
if (SrecVerifyChecksum(line) == BLT_FALSE)
if (FileSrecVerifyChecksum(line) == BLT_FALSE)
{
/* error on data line encountered */
return ERROR_SREC_INVALID_CHECKSUM;
@ -704,7 +670,7 @@ static blt_int16s SrecParseLine(const blt_char *line, blt_addr *address, blt_int
}
return data_byte_count;
} /*** end of SrecParseLine ***/
} /*** end of FileSrecParseLine ***/
#if (BOOT_FILE_LOGGING_ENABLE > 0)

42
Target/Source/file.h
View File

@ -58,14 +58,48 @@
/** \brief Error code because the program's checksum could not be written to memory. */
#define FILE_ERROR_CANNOT_WRITE_CHECKSUM (7)
/** \brief Maximum number of characters that can be on a line in the firmware file. */
#define MAX_CHARS_PER_LINE (256)
/** \brief Maximum number of data bytes that can be on a line in the firmware file
* (S-record).
*/
#define MAX_DATA_BYTES_PER_LINE (MAX_CHARS_PER_LINE/2)
/** \brief Return code in case an invalid checksum was detected on an S-record line. */
#define ERROR_SREC_INVALID_CHECKSUM (-1)
/****************************************************************************************
* Type definitions
****************************************************************************************/
/** \brief Enumeration for the different S-record line types. */
typedef enum
{
LINE_TYPE_S1, /**< 16-bit address line */
LINE_TYPE_S2, /**< 24-bit address line */
LINE_TYPE_S3, /**< 32-bit address line */
LINE_TYPE_UNSUPPORTED /**< unsupported line */
} tSrecLineType;
/** \brief Structure type for grouping the parsing results of an S-record line. */
typedef struct
{
blt_char line[MAX_CHARS_PER_LINE]; /**< string buffer for the line chars */
blt_int8u data[MAX_DATA_BYTES_PER_LINE]; /**< array for S1, S2 or S3 data bytes*/
blt_addr address; /**< address on S1, S2 or S3 line */
} tSrecLineParseObject;
/****************************************************************************************
* Function prototypes
****************************************************************************************/
void FileInit(void);
void FileTask(void);
blt_bool FileIsIdle(void);
blt_bool FileHandleFirmwareUpdateRequest(void);
void FileInit(void);
void FileTask(void);
blt_bool FileIsIdle(void);
blt_bool FileHandleFirmwareUpdateRequest(void);
/* functions for reading data from a Motorola S-record file. */
tSrecLineType FileSrecGetLineType(const blt_char *line);
blt_bool FileSrecVerifyChecksum(const blt_char *line);
blt_int16s FileSrecParseLine(const blt_char *line, blt_addr *address, blt_int8u *data);
#endif /* BOOT_FILE_SYS_ENABLE > 0 */