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- Improved XCP packet reception for UART by adding a timeout monitor. 

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@122 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2015-11-27 15:41:22 +00:00
parent a2f8c31a55
commit 390280d39d
7 changed files with 158 additions and 23 deletions
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28
Target/Source/ARM7_LPC2000/uart.c
View File

@ -42,6 +42,12 @@
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Timeout time for the reception of a CTO packet. The timer is started upon
* reception of the first packet byte.
*/
#define UART_CTO_RX_PACKET_TIMEOUT_MS (100u)
/** \brief Divisor latch access bit. */
#define UART_DLAB (0x80)
/** \brief 8 data and 1 stop bit, no parity. */
@ -169,9 +175,10 @@ void UartTransmitPacket(blt_int8u *data, blt_int8u len)
****************************************************************************************/
blt_bool UartReceivePacket(blt_int8u *data)
{
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_TX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
@ -181,10 +188,12 @@ blt_bool UartReceivePacket(blt_int8u *data)
{
if (xcpCtoReqPacket[0] > 0)
{
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
@ -203,13 +212,22 @@ blt_bool UartReceivePacket(blt_int8u *data)
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + UART_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;
} /*** end of UartReceivePacket ***/

28
Target/Source/ARMCM3_EFM32/uart.c
View File

@ -42,6 +42,15 @@
#if (BOOT_COM_UART_ENABLE > 0)
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Timeout time for the reception of a CTO packet. The timer is started upon
* reception of the first packet byte.
*/
#define UART_CTO_RX_PACKET_TIMEOUT_MS (100u)
/****************************************************************************************
* Function prototypes
****************************************************************************************/
@ -130,6 +139,7 @@ blt_bool UartReceivePacket(blt_int8u *data)
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
@ -139,10 +149,12 @@ blt_bool UartReceivePacket(blt_int8u *data)
{
if (xcpCtoReqPacket[0] > 0)
{
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
@ -161,11 +173,21 @@ blt_bool UartReceivePacket(blt_int8u *data)
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + UART_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;

28
Target/Source/ARMCM3_LM3S/uart.c
View File

@ -44,6 +44,15 @@
#if (BOOT_COM_UART_ENABLE > 0)
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Timeout time for the reception of a CTO packet. The timer is started upon
* reception of the first packet byte.
*/
#define UART_CTO_RX_PACKET_TIMEOUT_MS (100u)
/****************************************************************************************
* Function prototypes
****************************************************************************************/
@ -113,6 +122,7 @@ blt_bool UartReceivePacket(blt_int8u *data)
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
@ -122,10 +132,12 @@ blt_bool UartReceivePacket(blt_int8u *data)
{
if (xcpCtoReqPacket[0] > 0)
{
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
@ -144,11 +156,21 @@ blt_bool UartReceivePacket(blt_int8u *data)
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + UART_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;

23
Target/Source/ARMCM3_STM32/uart.c
View File

@ -64,6 +64,10 @@ typedef struct
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Timeout time for the reception of a CTO packet. The timer is started upon
* reception of the first packet byte.
*/
#define UART_CTO_RX_PACKET_TIMEOUT_MS (100u)
/** \brief USART enable bit. */
#define UART_BIT_UE ((blt_int16u)0x2000)
/** \brief Transmitter enable bit. */
@ -168,6 +172,7 @@ blt_bool UartReceivePacket(blt_int8u *data)
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
@ -177,10 +182,12 @@ blt_bool UartReceivePacket(blt_int8u *data)
{
if (xcpCtoReqPacket[0] > 0)
{
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
@ -199,11 +206,21 @@ blt_bool UartReceivePacket(blt_int8u *data)
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + UART_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;

23
Target/Source/ARMCM4_STM32/uart.c
View File

@ -43,6 +43,10 @@
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Timeout time for the reception of a CTO packet. The timer is started upon
* reception of the first packet byte.
*/
#define UART_CTO_RX_PACKET_TIMEOUT_MS (100u)
/* map the configured UART channel index to the STM32's USART peripheral */
#if (BOOT_COM_UART_CHANNEL_INDEX == 0)
/** \brief Set UART base address to USART1. */
@ -145,6 +149,7 @@ blt_bool UartReceivePacket(blt_int8u *data)
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
@ -154,10 +159,12 @@ blt_bool UartReceivePacket(blt_int8u *data)
{
if (xcpCtoReqPacket[0] > 0)
{
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
@ -176,11 +183,21 @@ blt_bool UartReceivePacket(blt_int8u *data)
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + UART_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;

28
Target/Source/ARMCM4_TM4C/uart.c
View File

@ -46,6 +46,15 @@
#if (BOOT_COM_UART_ENABLE > 0)
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Timeout time for the reception of a CTO packet. The timer is started upon
* reception of the first packet byte.
*/
#define UART_CTO_RX_PACKET_TIMEOUT_MS (100u)
/****************************************************************************************
* Function prototypes
****************************************************************************************/
@ -115,6 +124,7 @@ blt_bool UartReceivePacket(blt_int8u *data)
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
@ -124,10 +134,12 @@ blt_bool UartReceivePacket(blt_int8u *data)
{
if (xcpCtoReqPacket[0] > 0)
{
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
@ -146,11 +158,21 @@ blt_bool UartReceivePacket(blt_int8u *data)
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + UART_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;

23
Target/Source/HCS12/uart.c
View File

@ -58,6 +58,10 @@ typedef volatile struct
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Timeout time for the reception of a CTO packet. The timer is started upon
* reception of the first packet byte.
*/
#define UART_CTO_RX_PACKET_TIMEOUT_MS (100u)
#if (BOOT_COM_UART_CHANNEL_INDEX == 0)
/** \brief Set UART base address to SCI0. */
#define UART_REGS_BASE_ADDRESS (0x00c8)
@ -163,6 +167,7 @@ blt_bool UartReceivePacket(blt_int8u *data)
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */
static blt_int8u xcpCtoRxLength;
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
static blt_int32u xcpCtoRxStartTime = 0;
/* start of cto packet received? */
if (xcpCtoRxInProgress == BLT_FALSE)
@ -172,10 +177,12 @@ blt_bool UartReceivePacket(blt_int8u *data)
{
if (xcpCtoReqPacket[0] > 0)
{
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
/* store the start time */
xcpCtoRxStartTime = TimerGet();
/* reset packet data count */
xcpCtoRxLength = 0;
/* indicate that a cto packet is being received */
xcpCtoRxInProgress = BLT_TRUE;
}
}
}
@ -194,11 +201,21 @@ blt_bool UartReceivePacket(blt_int8u *data)
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
/* done with cto packet reception */
xcpCtoRxInProgress = BLT_FALSE;
/* packet reception complete */
return BLT_TRUE;
}
}
else
{
/* check packet reception timeout */
if (TimerGet() > (xcpCtoRxStartTime + UART_CTO_RX_PACKET_TIMEOUT_MS))
{
/* cancel cto packet reception due to timeout. note that that automaticaly
* discards the already received packet bytes, allowing the host to retry.
*/
xcpCtoRxInProgress = BLT_FALSE;
}
}
}
/* packet reception not yet complete */
return BLT_FALSE;