Refs #285. Removed FatFS from STM32F103 Nucleo demo bootloader.

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@210 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2017-03-06 10:35:37 +00:00
parent f3c3dcbdc9
commit 4cdb84a622
7 changed files with 310 additions and 1227 deletions

View File

@ -7,38 +7,38 @@ start address 0x08000000
Program Header:
LOAD off 0x00008000 vaddr 0x08000000 paddr 0x08000000 align 2**15
filesz 0x00001158 memsz 0x00001158 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08001158 align 2**15
filesz 0x00000001 memsz 0x000006f4 flags rw-
filesz 0x00001164 memsz 0x00001164 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08001164 align 2**15
filesz 0x00000001 memsz 0x000006f0 flags rw-
private flags = 5000202: [Version5 EABI] [soft-float ABI] [has entry point]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00001158 08000000 08000000 00008000 2**2
0 .text 00001164 08000000 08000000 00008000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000001 20000000 08001158 00010000 2**0
1 .data 00000001 20000000 08001164 00010000 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 000006f0 20000004 0800115c 00010001 2**2
2 .bss 000006ec 20000004 08001168 00010001 2**2
ALLOC
3 .debug_info 000025d6 00000000 00000000 00010001 2**0
3 .debug_info 0000261e 00000000 00000000 00010001 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 00000fe9 00000000 00000000 000125d7 2**0
4 .debug_abbrev 00000fe9 00000000 00000000 0001261f 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_aranges 00000318 00000000 00000000 000135c0 2**0
5 .debug_aranges 00000328 00000000 00000000 00013608 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_ranges 00000240 00000000 00000000 000138d8 2**0
6 .debug_ranges 00000250 00000000 00000000 00013930 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_line 00000d8d 00000000 00000000 00013b18 2**0
7 .debug_line 00000dba 00000000 00000000 00013b80 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000b8e 00000000 00000000 000148a5 2**0
8 .debug_str 00000b97 00000000 00000000 0001493a 2**0
CONTENTS, READONLY, DEBUGGING
9 .comment 00000030 00000000 00000000 00015433 2**0
9 .comment 00000030 00000000 00000000 000154d1 2**0
CONTENTS, READONLY
10 .ARM.attributes 00000033 00000000 00000000 00015463 2**0
10 .ARM.attributes 00000033 00000000 00000000 00015501 2**0
CONTENTS, READONLY
11 .debug_frame 00000648 00000000 00000000 00015498 2**2
11 .debug_frame 00000674 00000000 00000000 00015534 2**2
CONTENTS, READONLY, DEBUGGING
12 .debug_loc 00000f9b 00000000 00000000 00015ae0 2**0
12 .debug_loc 00000f9b 00000000 00000000 00015ba8 2**0
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
08000000 l d .text 00000000 .text
@ -58,11 +58,11 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 boot.c
00000000 l df *ABS* 00000000 com.c
20000004 l O .bss 00000040 xcpCtoReqPacket.4160
20000004 l O .bss 00000040 xcpCtoReqPacket.4162
20000000 l O .data 00000001 comActiveInterface
00000000 l df *ABS* 00000000 xcp.c
080003a0 l F .text 00000016 XcpSetCtoError
0800105c l O .text 00000008 xcpStationId
08001068 l O .text 00000008 xcpStationId
20000044 l O .bss 0000004c xcpInfo
00000000 l df *ABS* 00000000 backdoor.c
20000090 l O .bss 00000001 backdoorOpen
@ -71,81 +71,81 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 assert.c
00000000 l df *ABS* 00000000 cpu.c
00000000 l df *ABS* 00000000 uart.c
08000840 l F .text 0000004e UartTransmitByte
20000098 l O .bss 00000004 xcpCtoRxStartTime.4186
2000009c l O .bss 00000001 xcpCtoRxLength.4184
200000a0 l O .bss 00000041 xcpCtoReqPacket.4183
200000e4 l O .bss 00000001 xcpCtoRxInProgress.4185
08000844 l F .text 0000004e UartTransmitByte
20000098 l O .bss 00000004 xcpCtoRxStartTime.4188
2000009c l O .bss 00000041 xcpCtoReqPacket.4185
200000e0 l O .bss 00000001 xcpCtoRxLength.4186
200000e1 l O .bss 00000001 xcpCtoRxInProgress.4187
00000000 l df *ABS* 00000000 nvm.c
00000000 l df *ABS* 00000000 timer.c
200000e8 l O .bss 00000004 millisecond_counter
200000e4 l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 flash.c
08000ac8 l F .text 00000012 FlashLock
08000adc l F .text 00000044 FlashGetSector
08000b20 l F .text 000000d0 FlashWriteBlock
08000bf0 l F .text 00000062 FlashSwitchBlock
08000c54 l F .text 00000084 FlashAddToBlock
0800108c l O .text 0000009c flashLayout
200000ec l O .bss 00000204 bootBlockInfo
200002f0 l O .bss 00000204 blockInfo
08000acc l F .text 00000012 FlashLock
08000ae0 l F .text 00000044 FlashGetSector
08000b24 l F .text 000000d0 FlashWriteBlock
08000bf4 l F .text 00000062 FlashSwitchBlock
08000c58 l F .text 00000084 FlashAddToBlock
08001098 l O .text 0000009c flashLayout
200000e8 l O .bss 00000204 bootBlockInfo
200002ec l O .bss 00000204 blockInfo
00000000 l df *ABS* 00000000 cpu_comp.c
00000000 l df *ABS* 00000000 cstart.c
08001038 l F .text 00000000 zero_loop
08001040 l F .text 00000000 zero_loop
00000000 l df *ABS* 00000000
00000200 l *ABS* 00000000 __STACKSIZE__
080002ec g F .text 00000018 ComInit
08000cf4 g F .text 00000050 FlashWrite
080007dc g F .text 00000008 AssertFailure
08000ff8 g F .text 00000054 reset_handler
08000a90 g F .text 00000022 TimerUpdate
08000cf8 g F .text 00000050 FlashWrite
080007e0 g F .text 00000008 AssertFailure
08000ffc g F .text 00000058 reset_handler
08000a94 g F .text 00000022 TimerUpdate
080003e8 g F .text 00000010 XcpPacketTransmitted
08000304 g F .text 0000002c ComTask
080002bc g F .text 0000001c BootInit
080007b0 g F .text 00000022 BackDoorInit
080007d8 g F .text 00000002 CopService
08001158 g .text 00000000 _etext
08000ff0 g F .text 00000004 CpuIrqDisable
08000fd0 g F .text 0000000a FlashGetUserProgBaseAddress
08000a80 g F .text 0000000e TimerReset
080007b4 g F .text 00000022 BackDoorInit
080007dc g F .text 00000002 CopService
08001164 g .text 00000000 _etext
08000ff4 g F .text 00000004 CpuIrqDisable
08000fd4 g F .text 0000000a FlashGetUserProgBaseAddress
08000a84 g F .text 0000000e TimerReset
080002d8 g F .text 00000014 BootTask
08000ec4 g F .text 00000058 FlashWriteChecksum
08000ec8 g F .text 00000058 FlashWriteChecksum
08000334 g F .text 0000001a ComTransmitPacket
080003d4 g F .text 00000012 XcpIsConnected
08000a1c g F .text 00000008 NvmInit
08000cd8 g F .text 0000001a FlashInit
08000a3c g F .text 00000008 NvmGetUserProgBaseAddress
200004f4 g .bss 00000000 _ebss
08000fdc g F .text 00000012 UnusedISR
08000a20 g F .text 00000008 NvmInit
08000cdc g F .text 0000001a FlashInit
08000a40 g F .text 00000008 NvmGetUserProgBaseAddress
200004f0 g .bss 00000000 _ebss
08000fe0 g F .text 00000012 UnusedISR
08000330 g F .text 00000002 ComFree
08000890 g F .text 0000002a UartInit
08000a2c g F .text 00000008 NvmErase
08000894 g F .text 0000002a UartInit
08000a30 g F .text 00000008 NvmErase
20000004 g .bss 00000000 _bss
080003f8 g F .text 00000376 XcpPacketReceived
080007e4 g F .text 00000008 CpuInit
08000f84 g F .text 0000004c FlashDone
080003f8 g F .text 0000037a XcpPacketReceived
080007e8 g F .text 00000008 CpuInit
08000f88 g F .text 0000004c FlashDone
080003b8 g F .text 0000001c XcpInit
08000d44 g F .text 0000017e FlashErase
08000d48 g F .text 0000017e FlashErase
08000150 g F .text 0000016a main
08000a44 g F .text 00000012 NvmDone
080008bc g F .text 00000066 UartTransmitPacket
08000a34 g F .text 00000008 NvmVerifyChecksum
08000820 g F .text 0000001e CpuMemCopy
08000a48 g F .text 00000012 NvmDone
080008c0 g F .text 00000066 UartTransmitPacket
08000a38 g F .text 00000008 NvmVerifyChecksum
08000824 g F .text 0000001e CpuMemCopy
08000374 g F .text 00000024 ComGetActiveInterfaceMaxTxLen
08000924 g F .text 000000f8 UartReceivePacket
08000ff4 g F .text 00000004 CpuIrqEnable
08000928 g F .text 000000f8 UartReceivePacket
08000ff8 g F .text 00000004 CpuIrqEnable
20000000 g .data 00000000 _data
080007d4 g F .text 00000002 CopInit
08000a24 g F .text 00000008 NvmWrite
080007ec g F .text 00000034 CpuStartUserProgram
200006f4 g .bss 00000000 _estack
08000f1c g F .text 00000068 FlashVerifyChecksum
080007d8 g F .text 00000002 CopInit
08000a28 g F .text 00000008 NvmWrite
080007f0 g F .text 00000034 CpuStartUserProgram
200006f0 g .bss 00000000 _estack
08000f20 g F .text 00000068 FlashVerifyChecksum
20000001 g .data 00000000 _edata
08000000 g O .text 00000150 _vectab
08000398 g F .text 00000008 ComIsConnected
08000350 g F .text 00000024 ComGetActiveInterfaceMaxRxLen
08000770 g F .text 00000040 BackDoorCheck
200004f4 g .bss 00000000 _stack
08000ab4 g F .text 00000012 TimerGet
08000a58 g F .text 00000028 TimerInit
08000774 g F .text 00000040 BackDoorCheck
200004f0 g .bss 00000000 _stack
08000ab8 g F .text 00000012 TimerGet
08000a5c g F .text 00000028 TimerInit

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@ -1,25 +1,25 @@
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@ -103,42 +103,6 @@
#define BOOT_COM_UART_CHANNEL_INDEX (1)
/****************************************************************************************
* F I L E S Y S T E M I N T E R F A C E C O N F I G U R A T I O N
****************************************************************************************/
/* The file system interface is selected by setting the BOOT_FILE_SYS_ENABLE configurable
* to 1. This enables support for firmware updates from a file stored on a locally
* attached file system such as an SD-card. Note that this interface can be enabled
* together with one of the remote communication interfaces such as UART, CAN or USB.
*
* Set BOOT_FILE_LOGGING_ENABLE to 1 if you would like log messages to be created during
* a firmware update. The hook function FileFirmwareUpdateLogHook() will be called each
* time a new string formatted log entry is available. This could be used during testing
* by outputting the string on UART or to create a log file on the file system itself.
*
* Set BOOT_FILE_ERROR_HOOK_ENABLE to 1 if you would like to be informed in case an error
* occurs during the firmware update. This could for example be used to turn on an error
* LED to inform the user that something went wrong. Inspecting the log messages provides
* additional information on the error cause.
*
* Set BOOT_FILE_STARTED_HOOK_ENABLE to 1 if you would like to be informed when a new
* firmware update is started by the bootloader.
*
* Set BOOT_FILE_COMPLETED_HOOK_ENABLE to 1 if you would like to be informed when a
* firmware update is completed by the bootloader.
*/
/** \brief Enable/disable support for firmware updates from a locally attached storage.*/
#define BOOT_FILE_SYS_ENABLE (0)
/** \brief Enable/disable logging messages during firmware updates. */
#define BOOT_FILE_LOGGING_ENABLE (0)
/** \brief Enable/disable a hook function that is called upon detection of an error. */
#define BOOT_FILE_ERROR_HOOK_ENABLE (0)
/** \brief Enable/disable a hook function that is called at the start of the update. */
#define BOOT_FILE_STARTED_HOOK_ENABLE (0)
/** \brief Enable/disable a hook function that is called at the end of the update. */
#define BOOT_FILE_COMPLETED_HOOK_ENABLE (0)
/****************************************************************************************
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
****************************************************************************************/

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/*---------------------------------------------------------------------------/
/ FatFs - FAT file system module configuration file R0.09b (C)ChaN, 2013
/----------------------------------------------------------------------------/
/
/ CAUTION! Do not forget to make clean the project after any changes to
/ the configuration options.
/
/----------------------------------------------------------------------------*/
#ifndef _FFCONF
#define _FFCONF 82786 /* Revision ID */
/*---------------------------------------------------------------------------/
/ Functions and Buffer Configurations
/----------------------------------------------------------------------------*/
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
/ object instead of the sector buffer in the individual file object for file
/ data transfer. This reduces memory consumption 512 bytes each file object. */
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
/ f_truncate and useless f_getfree. */
#define _FS_MINIMIZE 0 /* 0 to 3 */
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
/
/ 0: Full function.
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
/ are removed.
/ 2: f_opendir and f_readdir are removed in addition to 1.
/ 3: f_lseek is removed in addition to 2. */
#define _USE_STRFUNC 2 /* 0:Disable or 1-2:Enable */
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
#define _USE_MKFS 0 /* 0:Disable or 1:Enable */
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
#define _USE_LABEL 0 /* 0:Disable or 1:Enable */
/* To enable volume label functions, set _USE_LAVEL to 1 */
#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
/*---------------------------------------------------------------------------/
/ Locale and Namespace Configurations
/----------------------------------------------------------------------------*/
#define _CODE_PAGE 437
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure.
/
/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows)
/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows)
/ 949 - Korean (DBCS, OEM, Windows)
/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows)
/ 1250 - Central Europe (Windows)
/ 1251 - Cyrillic (Windows)
/ 1252 - Latin 1 (Windows)
/ 1253 - Greek (Windows)
/ 1254 - Turkish (Windows)
/ 1255 - Hebrew (Windows)
/ 1256 - Arabic (Windows)
/ 1257 - Baltic (Windows)
/ 1258 - Vietnam (OEM, Windows)
/ 437 - U.S. (OEM)
/ 720 - Arabic (OEM)
/ 737 - Greek (OEM)
/ 775 - Baltic (OEM)
/ 850 - Multilingual Latin 1 (OEM)
/ 858 - Multilingual Latin 1 + Euro (OEM)
/ 852 - Latin 2 (OEM)
/ 855 - Cyrillic (OEM)
/ 866 - Russian (OEM)
/ 857 - Turkish (OEM)
/ 862 - Hebrew (OEM)
/ 874 - Thai (OEM, Windows)
/ 1 - ASCII only (Valid for non LFN cfg.)
*/
#define _USE_LFN 1 /* 0 to 3 */
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
/* The _USE_LFN option switches the LFN support.
/
/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect.
/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant.
/ 2: Enable LFN with dynamic working buffer on the STACK.
/ 3: Enable LFN with dynamic working buffer on the HEAP.
/
/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN,
/ Unicode handling functions ff_convert() and ff_wtoupper() must be added
/ to the project. When enable to use heap, memory control functions
/ ff_memalloc() and ff_memfree() must be added to the project. */
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
/* To switch the character code set on FatFs API to Unicode,
/ enable LFN feature and set _LFN_UNICODE to 1. */
#define _FS_RPATH 0 /* 0 to 2 */
/* The _FS_RPATH option configures relative path feature.
/
/ 0: Disable relative path feature and remove related functions.
/ 1: Enable relative path. f_chdrive() and f_chdir() are available.
/ 2: f_getcwd() is available in addition to 1.
/
/ Note that output of the f_readdir fnction is affected by this option. */
/*---------------------------------------------------------------------------/
/ Physical Drive Configurations
/----------------------------------------------------------------------------*/
#define _VOLUMES 1
/* Number of volumes (logical drives) to be used. */
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
/* Maximum sector size to be handled.
/ Always set 512 for memory card and hard disk but a larger value may be
/ required for on-board flash memory, floppy disk and optical disk.
/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size
/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */
#define _MULTI_PARTITION 0 /* 0:Single partition, 1:Enable multiple partition */
/* When set to 0, each volume is bound to the same physical drive number and
/ it can mount only first primaly partition. When it is set to 1, each volume
/ is tied to the partitions listed in VolToPart[]. */
#define _USE_ERASE 0 /* 0:Disable or 1:Enable */
/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command
/ should be added to the disk_ioctl functio. */
/*---------------------------------------------------------------------------/
/ System Configurations
/----------------------------------------------------------------------------*/
#define _WORD_ACCESS 0 /* 0 or 1 */
/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS
/ option defines which access method is used to the word data on the FAT volume.
/
/ 0: Byte-by-byte access.
/ 1: Word access. Do not choose this unless following condition is met.
/
/ When the byte order on the memory is big-endian or address miss-aligned word
/ access results incorrect behavior, the _WORD_ACCESS must be set to 0.
/ If it is not the case, the value can also be set to 1 to improve the
/ performance and code size.
*/
/* A header file that defines sync object types on the O/S, such as
/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
#define _SYNC_t HANDLE /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */
/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module.
/
/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect.
/ 1: Enable reentrancy. Also user provided synchronization handlers,
/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj
/ function must be added to the project. */
#define _FS_LOCK 0 /* 0:Disable or >=1:Enable */
/* To enable file lock control feature, set _FS_LOCK to 1 or greater.
The value defines how many files can be opened simultaneously. */
#endif /* _FFCONFIG */

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/*------------------------------------------------------------------------/
/ MMCv3/SDv1/SDv2 (in SPI mode) control module
/-------------------------------------------------------------------------/
/
/ Copyright (C) 2013, ChaN, all right reserved.
/
/ * This software is a free software and there is NO WARRANTY.
/ * No restriction on use. You can use, modify and redistribute it for
/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
/ * Redistributions of source code must retain the above copyright notice.
/
/-------------------------------------------------------------------------*/
/*
* This file was modified from a sample available from the FatFs
* web site. It was modified to work with a Olimex STM32-P103
* evaluation board.
*
*/
#include "diskio.h"
#include "stm32f10x.h" /* STM32 registers */
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
#include "boot.h"
/*--------------------------------------------------------------------------
Module Private Functions
---------------------------------------------------------------------------*/
/* Definitions for MMC/SDC command */
#define CMD0 (0) /* GO_IDLE_STATE */
#define CMD1 (1) /* SEND_OP_COND */
#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */
#define CMD8 (8) /* SEND_IF_COND */
#define CMD9 (9) /* SEND_CSD */
#define CMD10 (10) /* SEND_CID */
#define CMD12 (12) /* STOP_TRANSMISSION */
#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */
#define CMD16 (16) /* SET_BLOCKLEN */
#define CMD17 (17) /* READ_SINGLE_BLOCK */
#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
#define CMD23 (23) /* SET_BLOCK_COUNT */
#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */
#define CMD24 (24) /* WRITE_BLOCK */
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
#define CMD41 (41) /* SEND_OP_COND (ACMD) */
#define CMD55 (55) /* APP_CMD */
#define CMD58 (58) /* READ_OCR */
/* Control signals (Platform dependent) */
#define CS_LOW() GPIO_ResetBits(GPIOB, GPIO_Pin_12) /* MMC CS = L */
#define CS_HIGH() GPIO_SetBits(GPIOB, GPIO_Pin_12) /* MMC CS = H */
#define FCLK_SLOW() /* Set slow clock (100k-400k) */
#define FCLK_FAST() set_max_speed() /* Set fast clock (depends on the CSD) */
static volatile
DSTATUS Stat = STA_NOINIT; /* Disk status */
static
UINT CardType;
/*-----------------------------------------------------------------------*/
/* Send 80 or so clock transitions with CS and DI held high. This is */
/* required after card power up to get it into SPI mode */
/*-----------------------------------------------------------------------*/
static
void send_initial_clock_train(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
unsigned int i;
/* Ensure CS is held high. */
CS_HIGH();
/* Switch the SSI TX line to a GPIO and drive it high too. */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_SetBits(GPIOB, GPIO_Pin_15);
/* Send 10 bytes over the SSI. This causes the clock to wiggle the */
/* required number of times. */
for(i = 0 ; i < 10 ; i++)
{
/* Loop while DR register in not empty */
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE) == RESET) { ; }
/* Send byte through the SPI peripheral */
SPI_I2S_SendData(SPI2, 0xff);
/* Wait to receive a byte */
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
}
/* Revert to hardware control of the SSI TX line. */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
}
/*-----------------------------------------------------------------------*/
/* Power Control (Platform dependent) */
/*-----------------------------------------------------------------------*/
/* When the target system does not support socket power control, there */
/* is nothing to do in these functions. */
static
void power_on (void)
{
SPI_InitTypeDef SPI_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
/*
* This doesn't really turn the power on, but initializes the
* SSI port and pins needed to talk to the card.
*/
/* Enable GPIO clock for CS */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
/* Enable SPI clock, SPI2: APB1 */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
/* Configure I/O for Flash Chip select (PB12) */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* De-select the Card: Chip Select high */
GPIO_SetBits(GPIOB, GPIO_Pin_12);
/* Configure SPI pins: SCK (PB13) and MOSI (PB15) with default alternate function (not re-mapped) push-pull */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* Configure MISO (PB14) as Input with internal pull-up */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* SPI configuration */
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256; // 72000kHz/256=281kHz < 400kHz
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
SPI_CalculateCRC(SPI2, DISABLE);
SPI_Cmd(SPI2, ENABLE);
/* Set DI and CS high and apply more than 74 pulses to SCLK for the card */
/* to be able to accept a native command. */
send_initial_clock_train();
}
// set the SSI speed to the max setting
static
void set_max_speed(void)
{
SPI_InitTypeDef SPI_InitStructure;
/* Disable the SPI system */
SPI_Cmd(SPI2, DISABLE);
/* MMC/SDC can work at the clock frequency up to 20/25MHz so pick a speed close to
* this but not higher
*/
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; // 72MHz/4=18MHz < 20MHz
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
SPI_CalculateCRC(SPI2, DISABLE);
/* Enable the SPI system */
SPI_Cmd(SPI2, ENABLE);
}
static
void power_off (void)
{
Stat |= STA_NOINIT; /* Force uninitialized */
}
/*-----------------------------------------------------------------------*/
/* Transmit/Receive data to/from MMC via SPI (Platform dependent) */
/*-----------------------------------------------------------------------*/
static
BYTE xchg_spi (BYTE dat)
{
/* Send byte through the SPI peripheral */
SPI_I2S_SendData(SPI2, dat);
/* Wait to receive a byte */
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
/* Return the byte read from the SPI bus */
return (BYTE)SPI_I2S_ReceiveData(SPI2);
}
static
void rcvr_spi_m (BYTE *dst)
{
*dst = xchg_spi(0xFF);
}
/*-----------------------------------------------------------------------*/
/* Wait for card ready */
/*-----------------------------------------------------------------------*/
static
int wait_ready (void)
{
BYTE d;
ULONG timeOutTime;
/* set timeout for 500 ms from now */
timeOutTime = TimerGet() + 500;
do {
d = xchg_spi(0xFF);
} while ((d != 0xFF) && (TimerGet() < timeOutTime));
return (d == 0xFF) ? 1 : 0;
}
/*-----------------------------------------------------------------------*/
/* Deselect the card and release SPI bus */
/*-----------------------------------------------------------------------*/
static
void deselect (void)
{
CS_HIGH();
xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
}
/*-----------------------------------------------------------------------*/
/* Select the card and wait ready */
/*-----------------------------------------------------------------------*/
static
int select (void) /* 1:Successful, 0:Timeout */
{
CS_LOW();
xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
if (wait_ready()) return 1; /* OK */
deselect();
return 0; /* Timeout */
}
/*-----------------------------------------------------------------------*/
/* Receive a data packet from MMC */
/*-----------------------------------------------------------------------*/
static
int rcvr_datablock ( /* 1:OK, 0:Failed */
BYTE *buff, /* Data buffer to store received data */
UINT btr /* Byte count (must be multiple of 4) */
)
{
BYTE token;
ULONG timeOutTime;
/* set timeout for 100 ms from now */
timeOutTime = TimerGet() + 100;
do { /* Wait for data packet in timeout of 100ms */
token = xchg_spi(0xFF);
} while ((token == 0xFF) && (TimerGet() < timeOutTime));
if(token != 0xFE) return 0; /* If not valid data token, retutn with error */
do { /* Receive the data block into buffer */
rcvr_spi_m(buff++);
rcvr_spi_m(buff++);
} while (btr -= 2);
xchg_spi(0xFF); /* Discard CRC */
xchg_spi(0xFF);
return 1; /* Return with success */
}
/*-----------------------------------------------------------------------*/
/* Send a data packet to MMC */
/*-----------------------------------------------------------------------*/
#if _USE_WRITE
static
int xmit_datablock ( /* 1:OK, 0:Failed */
const BYTE *buff, /* 512 byte data block to be transmitted */
BYTE token /* Data token */
)
{
BYTE resp;
UINT wc;
if (!wait_ready()) return 0;
xchg_spi(token); /* Xmit a token */
if (token != 0xFD) { /* Not StopTran token */
wc = 512;
do { /* Xmit the 512 byte data block to MMC */
xchg_spi(*buff++);
xchg_spi(*buff++);
} while (wc -= 2);
xchg_spi(0xFF); /* CRC (Dummy) */
xchg_spi(0xFF);
resp = xchg_spi(0xFF); /* Receive a data response */
if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
return 0;
}
return 1;
}
#endif
/*-----------------------------------------------------------------------*/
/* Send a command packet to MMC */
/*-----------------------------------------------------------------------*/
static
BYTE send_cmd (
BYTE cmd, /* Command byte */
DWORD arg /* Argument */
)
{
BYTE n, res;
if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
cmd &= 0x7F;
res = send_cmd(CMD55, 0);
if (res > 1) return res;
}
/* Select the card and wait for ready */
deselect();
if (!select()) return 0xFF;
/* Send command packet */
xchg_spi(0x40 | cmd); /* Start + Command index */
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
xchg_spi((BYTE)arg); /* Argument[7..0] */
n = 0x01; /* Dummy CRC + Stop */
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) + Stop */
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) + Stop */
xchg_spi(n);
/* Receive command response */
if (cmd == CMD12) xchg_spi(0xFF); /* Skip a stuff byte on stop to read */
n = 10; /* Wait for a valid response in timeout of 10 attempts */
do
res = xchg_spi(0xFF);
while ((res & 0x80) && --n);
return res; /* Return with the response value */
}
/*--------------------------------------------------------------------------
Public Functions
---------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------*/
/* Initialize Disk Drive */
/*-----------------------------------------------------------------------*/
DSTATUS disk_initialize (
BYTE pdrv /* Physical drive nmuber (0) */
)
{
BYTE n, cmd, ty, ocr[4];
ULONG timeOutTime;
if (pdrv) return STA_NOINIT; /* Supports only single drive */
if (Stat & STA_NODISK) return Stat; /* No card in the socket */
power_on(); /* Force socket power on */
CS_LOW(); /* CS = L */
ty = 0;
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
timeOutTime = TimerGet() + 1000; /* Initialization timeout of 1000 msec */
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
while ((TimerGet() < timeOutTime) && send_cmd(ACMD41, 0x40000000)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
if ((TimerGet() < timeOutTime) && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
ty = (ocr[0] & 0x40) ? CT_SD2|CT_BLOCK : CT_SD2; /* SDv2 */
}
}
} else { /* SDv1 or MMCv3 */
if (send_cmd(ACMD41, 0) <= 1) {
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
} else {
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
}
while ((TimerGet() < timeOutTime) && send_cmd(cmd, 0)); /* Wait for leaving idle state */
if (!(TimerGet() < timeOutTime) || send_cmd(CMD16, 512) != 0) /* Set read/write block length to 512 */
ty = 0;
}
}
CardType = ty;
deselect();
if (ty) { /* Initialization succeded */
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
FCLK_FAST();
} else { /* Initialization failed */
power_off();
}
return Stat;
}
/*-----------------------------------------------------------------------*/
/* Get Disk Status */
/*-----------------------------------------------------------------------*/
DSTATUS disk_status (
BYTE pdrv /* Physical drive nmuber (0) */
)
{
if (pdrv) return STA_NOINIT; /* Supports only single drive */
return Stat;
}
/*-----------------------------------------------------------------------*/
/* Read Sector(s) */
/*-----------------------------------------------------------------------*/
DRESULT disk_read (
BYTE pdrv, /* Physical drive number (0) */
BYTE *buff, /* Pointer to the data buffer to store read data */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
{
if (pdrv || !count) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
if (count == 1) { /* Single block read */
if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
&& rcvr_datablock(buff, 512))
count = 0;
}
else { /* Multiple block read */
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
do {
if (!rcvr_datablock(buff, 512)) break;
buff += 512;
} while (--count);
send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
}
}
deselect();
return count ? RES_ERROR : RES_OK;
}
/*-----------------------------------------------------------------------*/
/* Write Sector(s) */
/*-----------------------------------------------------------------------*/
#if _USE_WRITE
DRESULT disk_write (
BYTE pdrv, /* Physical drive nmuber (0) */
const BYTE *buff, /* Pointer to the data to be written */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
{
if (pdrv || !count) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
if (Stat & STA_PROTECT) return RES_WRPRT;
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
if (count == 1) { /* Single block write */
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
&& xmit_datablock(buff, 0xFE))
count = 0;
}
else { /* Multiple block write */
if (CardType & CT_SDC) send_cmd(ACMD23, count);
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
do {
if (!xmit_datablock(buff, 0xFC)) break;
buff += 512;
} while (--count);
if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
count = 1;
}
}
deselect();
return count ? RES_ERROR : RES_OK;
}
#endif
/*-----------------------------------------------------------------------*/
/* Miscellaneous Functions */
/*-----------------------------------------------------------------------*/
#if _USE_IOCTL
DRESULT disk_ioctl (
BYTE pdrv, /* Physical drive nmuber (0) */
BYTE cmd, /* Control code */
void *buff /* Buffer to send/receive data block */
)
{
DRESULT res;
BYTE n, csd[16], *ptr = buff;
DWORD csz;
if (pdrv) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
res = RES_ERROR;
switch (cmd) {
case CTRL_SYNC : /* Flush write-back cache, Wait for end of internal process */
if (select()) res = RES_OK;
break;
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (WORD) */
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
if ((csd[0] >> 6) == 1) { /* SDv2? */
csz = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
*(DWORD*)buff = csz << 10;
} else { /* SDv1 or MMCv3 */
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
csz = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
*(DWORD*)buff = csz << (n - 9);
}
res = RES_OK;
}
break;
case GET_BLOCK_SIZE : /* Get erase block size in unit of sectors (DWORD) */
if (CardType & CT_SD2) { /* SDv2? */
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
xchg_spi(0xFF);
if (rcvr_datablock(csd, 16)) { /* Read partial block */
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
*(DWORD*)buff = 16UL << (csd[10] >> 4);
res = RES_OK;
}
}
} else { /* SDv1 or MMCv3 */
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
if (CardType & CT_SD1) { /* SDv1 */
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
} else { /* MMCv3 */
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
}
res = RES_OK;
}
}
break;
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
*ptr = CardType;
res = RES_OK;
break;
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
if ((send_cmd(CMD9, 0) == 0) /* READ_CSD */
&& rcvr_datablock(buff, 16))
res = RES_OK;
break;
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
if ((send_cmd(CMD10, 0) == 0) /* READ_CID */
&& rcvr_datablock(buff, 16))
res = RES_OK;
break;
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
for (n = 0; n < 4; n++)
*((BYTE*)buff+n) = xchg_spi(0xFF);
res = RES_OK;
}
break;
case MMC_GET_SDSTAT : /* Receive SD status as a data block (64 bytes) */
if ((CardType & CT_SD2) && send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
xchg_spi(0xFF);
if (rcvr_datablock(buff, 64))
res = RES_OK;
}
break;
default:
res = RES_PARERR;
}
deselect();
return res;
}
#endif
/*---------------------------------------------------------*/
/* User Provided Timer Function for FatFs module */
/*---------------------------------------------------------*/
/* This is a real time clock service to be called from */
/* FatFs module. Any valid time must be returned even if */
/* the system does not support a real time clock. */
/* This is not required in read-only configuration. */
DWORD get_fattime (void)
{
/* No RTC supprt. Return a fixed value 2013/5/10 0:00:00 */
return ((DWORD)(2013 - 1980) << 25) /* Y */
| ((DWORD)5 << 21) /* M */
| ((DWORD)10 << 16) /* D */
| ((DWORD)0 << 11) /* H */
| ((DWORD)0 << 5) /* M */
| ((DWORD)0 >> 1); /* S */
}

View File

@ -38,8 +38,6 @@ PROJ_FILES= \
blt_conf.h \
hooks.c \
main.c \
./lib/fatfs/ffconf.h \
./lib/fatfs/mmc.c \
./lib/CMSIS/CM3/CoreSupport/core_cm3.c \
./lib/CMSIS/CM3/CoreSupport/core_cm3.h \
./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h \
@ -54,11 +52,6 @@ main.c \
./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c \
./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c \
./lib/STM32F10x_StdPeriph_Driver/stm32f10x_conf.h \
../../../Source/third_party/fatfs/src/diskio.h \
../../../Source/third_party/fatfs/src/ff.c \
../../../Source/third_party/fatfs/src/ff.h \
../../../Source/third_party/fatfs/src/integer.h \
../../../Source/third_party/fatfs/src/option/unicode.c \
../../../Source/boot.c \
../../../Source/boot.h \
../../../Source/com.c \