Refs #311. Reworked compiler specific parts in the LPC2000 port.

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@340 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2017-08-16 14:45:26 +00:00
parent dd8874cfde
commit 511b2eb4de
14 changed files with 416 additions and 2089 deletions

View File

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:1015F0001EFF2FE100300FE18030C3E303F029E14B
:101600001EFF2FE1000051E34300000A01C020E06B
:1016100000106142012051E22700000A0030B0E1D1
@ -385,13 +385,11 @@
:1018000000400300002000000C0000000060030006
:10181000002000000D0000000080030000200000F8
:101820000E00000000A00300002000000F000000D8
:1018300000C0030000200000100000002E2E2F2EFC
:101840002E2F2E2E2F536F757263652F41524D37F9
:101850005F4C5043323030302F63616E2E63000096
:101860002E2E2F2E2E2F2E2E2F536F757263652F37
:1018700041524D375F4C5043323030302F756172DA
:10188000742E63002E2E2F2E2E2F2E2E2F536F757B
:101890007263652F41524D375F4C504332303030C8
:1018A0002F4743432F766563746F72732E63000076
:0118B0000433
:1018300000C0030000200000100000007665637403
:101840006F72732E630000002E2E2F2E2E2F2E2E41
:101850002F536F757263652F41524D375F4C504364
:10186000323030302F63616E2E6300002E2E2F2E0B
:101870002E2F2E2E2F536F757263652F41524D37C9
:101880005F4C5043323030302F756172742E6300DC
:011890000453
:00000001FF

View File

@ -7,20 +7,20 @@ start address 0x00000000
Program Header:
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
filesz 0x000018b0 memsz 0x000018b0 flags r-x
LOAD off 0x00010200 vaddr 0x40000200 paddr 0x000018b0 align 2**15
filesz 0x00001890 memsz 0x00001890 flags r-x
LOAD off 0x00010200 vaddr 0x40000200 paddr 0x00001890 align 2**15
filesz 0x00000001 memsz 0x00000001 flags rw-
LOAD off 0x00010204 vaddr 0x40000204 paddr 0x000018b1 align 2**15
LOAD off 0x00010204 vaddr 0x40000204 paddr 0x00001891 align 2**15
filesz 0x00000000 memsz 0x000004f4 flags rw-
private flags = 5000200: [Version5 EABI] [soft-float ABI]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000018b0 00000000 00000000 00008000 2**2
0 .text 00001890 00000000 00000000 00008000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000001 40000200 000018b0 00010200 2**0
1 .data 00000001 40000200 00001890 00010200 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 000004f4 40000204 000018b1 00010204 2**2
2 .bss 000004f4 40000204 00001891 00010204 2**2
ALLOC
3 .ARM.attributes 0000002e 00000000 00000000 00010201 2**0
CONTENTS, READONLY
@ -32,15 +32,15 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
7 .debug_aranges 00000210 00000000 00000000 000138cc 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_line 00000ba7 00000000 00000000 00013adc 2**0
8 .debug_line 00000b44 00000000 00000000 00013adc 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_str 00000aad 00000000 00000000 00014683 2**0
9 .debug_str 00000a88 00000000 00000000 00014620 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_frame 000006f8 00000000 00000000 00015130 2**2
10 .debug_frame 000006f8 00000000 00000000 000150a8 2**2
CONTENTS, READONLY, DEBUGGING
11 .debug_loc 00000e69 00000000 00000000 00015828 2**0
11 .debug_loc 00000e69 00000000 00000000 000157a0 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 00000038 00000000 00000000 00016691 2**0
12 .debug_ranges 00000038 00000000 00000000 00016609 2**0
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l d .text 00000000 .text
@ -82,12 +82,13 @@ e01fc040 l *ABS* 00000000 MEMMAP
00000000 l df *ABS* 00000000 hooks.c
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 extflash.c
00000000 l df *ABS* 00000000 vectors.c
00000000 l df *ABS* 00000000 boot.c
00000000 l df *ABS* 00000000 com.c
40000200 l O .data 00000001 comActiveInterface
40000204 l O .bss 00000040 xcpCtoReqPacket.4167
00000000 l df *ABS* 00000000 xcp.c
00000320 l F .text 00000020 XcpSetCtoError
00000370 l F .text 00000020 XcpSetCtoError
00001750 l O .text 00000008 xcpStationId
40000244 l O .bss 0000004c xcpInfo
00000000 l df *ABS* 00000000 backdoor.c
@ -99,7 +100,7 @@ e01fc040 l *ABS* 00000000 MEMMAP
00000000 l df *ABS* 00000000 can.c
00001758 l O .text 00000024 canTiming
00000000 l df *ABS* 00000000 uart.c
00000c64 l F .text 0000005c UartTransmitByte
00000cb4 l F .text 0000005c UartTransmitByte
40000298 l O .bss 00000001 xcpCtoRxInProgress.4174
4000029c l O .bss 00000041 xcpCtoReqPacket.4172
400002e0 l O .bss 00000004 xcpCtoRxStartTime.4175
@ -109,85 +110,84 @@ e01fc040 l *ABS* 00000000 MEMMAP
400002e8 l O .bss 00000004 free_running_counter_last
400002ec l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 flash.c
00000fbc l F .text 0000006c FlashGetSector
00001028 l F .text 00000114 FlashWriteBlock
0000113c l F .text 00000088 FlashSwitchBlock
000011c4 l F .text 000000cc FlashAddToBlock
0000100c l F .text 0000006c FlashGetSector
00001078 l F .text 00000114 FlashWriteBlock
0000118c l F .text 00000088 FlashSwitchBlock
00001214 l F .text 000000cc FlashAddToBlock
0000177c l O .text 000000c0 flashLayout
400002f0 l O .bss 00000204 blockInfo
400004f4 l O .bss 00000204 bootBlockInfo
00000000 l df *ABS* 00000000 vectors.c
00000000 l df *ABS* 00000000 cpu_comp.c
00000000 l df *ABS* 00000000 _divsi3.o
0000160c l .text 00000000 .divsi3_skip_div0_test
00000000 l df *ABS* 00000000 _dvmd_tls.o
00000000 l df *ABS* 00000000
000001c0 g F .text 00000030 ComInit
000012c0 g F .text 0000006c FlashWrite
00000954 g F .text 0000000c AssertFailure
00000bbc g F .text 000000a8 CanReceivePacket
000015b0 g F .text 0000001c IRQ_ISR
00000f70 g F .text 00000030 TimerUpdate
00000380 g F .text 00000014 XcpPacketTransmitted
000001f0 g F .text 0000005c ComTask
00000180 g F .text 00000024 BootInit
00000924 g F .text 00000028 BackDoorInit
00000950 g F .text 00000004 CopService
000018b0 g .text 00000000 _etext
00000210 g F .text 00000030 ComInit
00001310 g F .text 0000006c FlashWrite
000009a4 g F .text 0000000c AssertFailure
00000c0c g F .text 000000a8 CanReceivePacket
0000019c g F .text 0000001c IRQ_ISR
00000fc0 g F .text 00000030 TimerUpdate
000003d0 g F .text 00000014 XcpPacketTransmitted
00000240 g F .text 0000005c ComTask
000001d0 g F .text 00000024 BootInit
00000974 g F .text 00000028 BackDoorInit
000009a0 g F .text 00000004 CopService
00001890 g .text 00000000 _etext
000015e4 g F .text 00000010 CpuIrqDisable
0000158c g F .text 00000008 FlashGetUserProgBaseAddress
000012a8 g F .text 00000018 FlashReinit
00000f50 g F .text 00000020 TimerReset
000001a4 g F .text 0000001c BootTask
00001460 g F .text 00000084 FlashWriteChecksum
000015dc g F .text 00000008 FlashGetUserProgBaseAddress
000012f8 g F .text 00000018 FlashReinit
00000fa0 g F .text 00000020 TimerReset
000001f4 g F .text 0000001c BootTask
000014b0 g F .text 00000084 FlashWriteChecksum
40000204 g .bss 00000000 _bss_start
00000250 g F .text 00000048 ComTransmitPacket
000002a0 g F .text 00000048 ComTransmitPacket
00000000 g .text 00000000 _startup
00000368 g F .text 00000018 XcpIsConnected
00000e8c g F .text 00000010 NvmInit
00001290 g F .text 00000018 FlashInit
00000edc g F .text 00000010 NvmGetUserProgBaseAddress
000003b8 g F .text 00000018 XcpIsConnected
00000edc g F .text 00000010 NvmInit
000012e0 g F .text 00000018 FlashInit
00000f2c g F .text 00000010 NvmGetUserProgBaseAddress
400006f8 g .bss 00000000 _bss_end
0000003c g .text 00000000 Reset_Handler
00000e9c g F .text 00000010 NvmReinit
0000024c g F .text 00000004 ComFree
00000eec g F .text 00000010 NvmReinit
0000029c g F .text 00000004 ComFree
00001604 g F .text 00000000 .hidden __aeabi_idiv
00000cc0 g F .text 00000040 UartInit
00000ebc g F .text 00000010 NvmErase
00000394 g F .text 00000540 XcpPacketReceived
00000960 g F .text 00000010 CpuInit
0000152c g F .text 00000060 FlashDone
00000b00 g F .text 000000bc CanTransmitPacket
00000d10 g F .text 00000040 UartInit
00000f0c g F .text 00000010 NvmErase
000003e4 g F .text 00000540 XcpPacketReceived
000009b0 g F .text 00000010 CpuInit
0000157c g F .text 00000060 FlashDone
00000b50 g F .text 000000bc CanTransmitPacket
0000174c w F .text 00000004 .hidden __aeabi_ldiv0
00000340 g F .text 00000028 XcpInit
0000132c g F .text 00000134 FlashErase
00000390 g F .text 00000028 XcpInit
0000137c g F .text 00000134 FlashErase
000000dc g F .text 000000a4 main
00000eec g F .text 00000024 NvmDone
00000d00 g F .text 00000084 UartTransmitPacket
00000ecc g F .text 00000010 NvmVerifyChecksum
00000970 g F .text 00000040 CpuMemCopy
00000f3c g F .text 00000024 NvmDone
00000d50 g F .text 00000084 UartTransmitPacket
00000f1c g F .text 00000010 NvmVerifyChecksum
000009c0 g F .text 00000040 CpuMemCopy
40001edc g *ABS* 00000000 _stack_end
00001604 g F .text 00000128 .hidden __divsi3
00001594 g F .text 0000001c FIQ_ISR
000002d4 g F .text 0000003c ComGetActiveInterfaceMaxTxLen
00000d84 g F .text 00000108 UartReceivePacket
00000180 g F .text 0000001c FIQ_ISR
00000324 g F .text 0000003c ComGetActiveInterfaceMaxTxLen
00000dd4 g F .text 00000108 UartReceivePacket
000015f4 g F .text 00000010 CpuIrqEnable
40000200 g .data 00000000 _data
0000094c g F .text 00000004 CopInit
0000099c g F .text 00000004 CopInit
0000008c g .text 00000000 SetupRAM
00000a00 g F .text 00000100 CanInit
00000eac g F .text 00000010 NvmWrite
000009b0 g F .text 00000050 CpuStartUserProgram
000014e4 g F .text 00000048 FlashVerifyChecksum
00000a50 g F .text 00000100 CanInit
00000efc g F .text 00000010 NvmWrite
00000a00 g F .text 00000050 CpuStartUserProgram
00001534 g F .text 00000048 FlashVerifyChecksum
40000201 g .data 00000000 _edata
400006f8 g .bss 00000000 _end
000015cc g F .text 00000018 UNDEF_ISR
00000310 g F .text 00000010 ComIsConnected
000001b8 g F .text 00000018 UNDEF_ISR
00000360 g F .text 00000010 ComIsConnected
0000174c w F .text 00000004 .hidden __aeabi_idiv0
00000298 g F .text 0000003c ComGetActiveInterfaceMaxRxLen
000008d4 g F .text 00000050 BackDoorCheck
00000fa0 g F .text 0000001c TimerGet
000002e8 g F .text 0000003c ComGetActiveInterfaceMaxRxLen
00000924 g F .text 00000050 BackDoorCheck
00000ff0 g F .text 0000001c TimerGet
0000172c g F .text 00000020 .hidden __aeabi_idivmod
00000f10 g F .text 00000040 TimerInit
00000f60 g F .text 00000040 TimerInit

View File

@ -1,7 +1,7 @@
/************************************************************************************//**
* \file ARM7_LPC2000\GCC\cstart.s
* \file Demo\ARM7_LPC2000_Olimex_LPC_L2294_GCC\Boot\cstart.s
* \brief Bootloader C-startup assembly file.
* \ingroup Target_ARM7_LPC2000
* \ingroup Boot_ARM7_LPC2000_Olimex_LPC_L2294_GCC
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T

View File

@ -41,6 +41,8 @@ main.c \
extflash.c \
extflash.h \
lpc2294.h \
vectors.c \
cstart.s \
../../../Source/boot.c \
../../../Source/boot.h \
../../../Source/com.c \
@ -65,11 +67,9 @@ lpc2294.h \
../../../Source/ARM7_LPC2000/uart.c \
../../../Source/ARM7_LPC2000/nvm.c \
../../../Source/ARM7_LPC2000/timer.c \
../../../Source/ARM7_LPC2000/GCC/flash.c \
../../../Source/ARM7_LPC2000/GCC/flash.h \
../../../Source/ARM7_LPC2000/GCC/vectors.c \
../../../Source/ARM7_LPC2000/GCC/cpu_comp.c \
../../../Source/ARM7_LPC2000/GCC/cstart.s
../../../Source/ARM7_LPC2000/flash.c \
../../../Source/ARM7_LPC2000/flash.h \
../../../Source/ARM7_LPC2000/GCC/cpu_comp.c
#|---------------------------------------------------------------------------------------|
@ -101,7 +101,7 @@ OBJ_PATH = ./obj
BIN_PATH = ./bin
INC_PATH = $(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file)))))
INC_PATH += -I.
LIB_PATH = -L../../../Source/ARM7_LPC2000/GCC/
LIB_PATH = -L./
#|---------------------------------------------------------------------------------------|

View File

@ -1,7 +1,7 @@
/************************************************************************************//**
* \file Source\ARM7_LPC2000\GCC\vectors.c
* \file Demo\ARM7_LPC2000_Olimex_LPC_L2294_GCC\Boot\vectors.c
* \brief Bootloader interrupt vectors source file.
* \ingroup Target_ARM7_LPC2000
* \ingroup Boot_ARM7_LPC2000_Olimex_LPC_L2294_GCC
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T

View File

@ -1,91 +0,0 @@
/************************************************************************************//**
* \file Source\ARM7_LPC2000\Crossworks\cpu_comp.c
* \brief Bootloader cpu module source file.
* \ingroup Target_ARM7_LPC2000
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2016 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
/************************************************************************************//**
** \brief Obtains current value of CPSR CPU register. Derived from a sample by R O
** Software that is Copyright 2004, R O SoftWare, and can be used for hobby
** or commercial purposes.
** \return CPSR value.
**
****************************************************************************************/
static blt_int32u IrqGetCPSR(void)
{
blt_int32u retval;
__asm__ volatile (" mrs %0, cpsr" : "=r" (retval) : /* no inputs */ );
return retval;
} /*** end of IrqGetCPSR ***/
/************************************************************************************//**
** \brief Update value of CPSR CPU register. Derived from a sample by R O
** Software that is Copyright 2004, R O SoftWare, and can be used for hobby
** or commercial purposes.
** \param val CPSR value.
** \return none.
**
****************************************************************************************/
static void IrqSetCPSR(blt_int32u val)
{
__asm__ volatile (" msr cpsr, %0" : /* no outputs */ : "r" (val) );
} /*** end of IrqSetCPSR ***/
/************************************************************************************//**
** \brief Disable global interrupts.
** \return none.
**
****************************************************************************************/
void CpuIrqDisable(void)
{
blt_int32u _cpsr;
_cpsr = IrqGetCPSR();
IrqSetCPSR(_cpsr | 0x00000080);
} /*** end of CpuIrqDisable ***/
/************************************************************************************//**
** \brief Enable global interrupts.
** \return none.
**
****************************************************************************************/
void CpuIrqEnable(void)
{
blt_int32u _cpsr;
_cpsr = IrqGetCPSR();
IrqSetCPSR(_cpsr & ~0x00000080);
} /*** end of CpuIrqEnable ***/
/*********************************** end of cpu_comp.c *********************************/

View File

@ -1,419 +0,0 @@
/*****************************************************************************
* Copyright (c) 2001, 2002 Rowley Associates Limited. *
* *
* This file may be distributed under the terms of the License Agreement *
* provided with this software. *
* *
* THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE *
* WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
*****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions
* ------------------------
* APP_ENTRY_POINT
*
* Defines the application entry point function, if undefined this setting
* defaults to "main".
*
* INITIALIZE_STACKS
*
* If defined, the contents of the stacks will be initialized to a the
* value 0xCC.
*
* INITIALIZE_SECONDARY_SECTIONS
*
* If defined, the .text2, .data2 and .bss2 sections will be initialized.
*
* SUPERVISOR_START
*
* If defined, the application will start up in supervisor mode. If
* undefined the application will start up in system mode.
*
* FULL_LIBRARY
*
* If defined then
* - argc, argv are setup by the debug_getargs.
* - the exit symbol is defined and executes on return from main.
* - the exit symbol calls destructors, atexit functions and then debug_exit.
*
* If not defined then
* - argc and argv are zero.
* - the exit symbol is defined, executes on return from main and loops
*
*****************************************************************************/
.section .vectors, "ax"
.code 32
.align 0
.global _vectors
.global reset_handler
/*****************************************************************************
* Exception Vectors *
*****************************************************************************/
_vectors:
ldr pc, [pc, #reset_handler_address - . - 8] /* reset */
ldr pc, [pc, #undef_handler_address - . - 8] /* undefined instruction */
ldr pc, [pc, #undef_handler_address - . - 8] /* swi handler */
ldr pc, [pc, #pabort_handler_address - . - 8] /* abort prefetch */
ldr pc, [pc, #dabort_handler_address - . - 8] /* abort data */
.word 0xB9205F88 /* boot loader checksum */
ldr pc, [pc, #-0xFF0] /* irq handler */
ldr pc, [pc, #fiq_handler_address - . - 8] /* fiq handler */
reset_handler_address:
.word Reset_Handler
undef_handler_address:
.word undef_handler
pabort_handler_address:
.word pabort_handler
dabort_handler_address:
.word dabort_handler
fiq_handler_address:
.word fiq_handler
.section .init, "ax"
.code 32
.align 4
#ifndef APP_ENTRY_POINT
#define APP_ENTRY_POINT main
#endif
#ifndef ARGSSPACE
#define ARGSSPACE 128
#endif
.weak Reset_Handler
.global __start
.global __gccmain
.extern APP_ENTRY_POINT
.global exit
/************************************************************************************//**
** \brief Reset interrupt service routine. Configures the stack for each mode,
** disables the IRQ and FIQ interrupts, initializes RAM and jumps to
** function main.
** \return none.
**
****************************************************************************************/
Reset_Handler:
__start:
mrs r0, cpsr
bic r0, r0, #0x1F
/* Setup stacks */
orr r1, r0, #0x1B /* Undefined mode */
msr cpsr_cxsf, r1
ldr sp, =__stack_und_end__
#ifdef __ARM_EABI__
bic sp, sp, #0x7
#endif
orr r1, r0, #0x17 /* Abort mode */
msr cpsr_cxsf, r1
ldr sp, =__stack_abt_end__
#ifdef __ARM_EABI__
bic sp, sp, #0x7
#endif
orr r1, r0, #0x12 /* IRQ mode */
msr cpsr_cxsf, r1
ldr sp, =__stack_irq_end__
#ifdef __ARM_EABI__
bic sp, sp, #0x7
#endif
orr r1, r0, #0x11 /* FIQ mode */
msr cpsr_cxsf, r1
ldr sp, =__stack_fiq_end__
#ifdef __ARM_EABI__
bic sp, sp, #0x7
#endif
orr r1, r0, #0x13 /* Supervisor mode */
msr cpsr_cxsf, r1
ldr sp, =__stack_svc_end__
#ifdef __ARM_EABI__
bic sp, sp, #0x7
#endif
#ifdef SUPERVISOR_START
/* Start application in supervisor mode */
ldr r1, =__stack_end__ /* Setup user/system mode stack */
#ifdef __ARM_EABI__
bic r1, r1, #0x7
#endif
mov r2, sp
stmfd r2!, {r1}
ldmfd r2, {sp}^
#else
/* Start application in system mode */
orr r1, r0, #0x1F /* System mode */
msr cpsr_cxsf, r1
ldr sp, =__stack_end__
#ifdef __ARM_EABI__
bic sp, sp, #0x7
#endif
#endif
#ifdef INITIALIZE_STACKS
mov r2, #0xCC
ldr r0, =__stack_und_start__
ldr r1, =__stack_und_end__
bl memory_set
ldr r0, =__stack_abt_start__
ldr r1, =__stack_abt_end__
bl memory_set
ldr r0, =__stack_irq_start__
ldr r1, =__stack_irq_end__
bl memory_set
ldr r0, =__stack_fiq_start__
ldr r1, =__stack_fiq_end__
bl memory_set
ldr r0, =__stack_svc_start__
ldr r1, =__stack_svc_end__
bl memory_set
ldr r0, =__stack_start__
ldr r1, =__stack_end__
bl memory_set
#endif
/* Copy initialised memory sections into RAM (if necessary). */
ldr r0, =__data_load_start__
ldr r1, =__data_start__
ldr r2, =__data_end__
bl memory_copy
ldr r0, =__text_load_start__
ldr r1, =__text_start__
ldr r2, =__text_end__
bl memory_copy
ldr r0, =__fast_load_start__
ldr r1, =__fast_start__
ldr r2, =__fast_end__
bl memory_copy
ldr r0, =__ctors_load_start__
ldr r1, =__ctors_start__
ldr r2, =__ctors_end__
bl memory_copy
ldr r0, =__dtors_load_start__
ldr r1, =__dtors_start__
ldr r2, =__dtors_end__
bl memory_copy
ldr r0, =__rodata_load_start__
ldr r1, =__rodata_start__
ldr r2, =__rodata_end__
bl memory_copy
#ifdef INITIALIZE_SECONDARY_SECTIONS
ldr r0, =__data2_load_start__
ldr r1, =__data2_start__
ldr r2, =__data2_end__
bl memory_copy
ldr r0, =__text2_load_start__
ldr r1, =__text2_start__
ldr r2, =__text2_end__
bl memory_copy
ldr r0, =__rodata2_load_start__
ldr r1, =__rodata2_start__
ldr r2, =__rodata2_end__
bl memory_copy
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
/* Zero the bss. */
ldr r0, =__bss_start__
ldr r1, =__bss_end__
mov r2, #0
bl memory_set
#ifdef INITIALIZE_SECONDARY_SECTIONS
ldr r0, =__bss2_start__
ldr r1, =__bss2_end__
mov r2, #0
bl memory_set
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
/* Initialise the heap */
ldr r0, = __heap_start__
ldr r1, = __heap_end__
sub r1, r1, r0
cmp r1, #8
movge r2, #0
strge r2, [r0], #+4
strge r1, [r0]
/* Call constructors */
ldr r0, =__ctors_start__
ldr r1, =__ctors_end__
ctor_loop:
cmp r0, r1
beq ctor_end
ldr r2, [r0], #+4
stmfd sp!, {r0-r1}
mov lr, pc
#ifdef __ARM_ARCH_3__
mov pc, r2
#else
bx r2
#endif
ldmfd sp!, {r0-r1}
b ctor_loop
ctor_end:
.type start, function
start:
/* Jump to application entry point */
#ifdef FULL_LIBRARY
mov r0, #ARGSSPACE
ldr r1, =args
ldr r2, =debug_getargs
mov lr, pc
#ifdef __ARM_ARCH_3__
mov pc, r2
#else
bx r2
#endif
ldr r1, =args
#else
mov r0, #0
mov r1, #0
#endif
ldr r2, =APP_ENTRY_POINT
mov lr, pc
#ifdef __ARM_ARCH_3__
mov pc, r2
#else
bx r2
#endif
exit:
#ifdef FULL_LIBRARY
mov r5, r0 // save the exit parameter/return result
/* Call destructors */
ldr r0, =__dtors_start__
ldr r1, =__dtors_end__
dtor_loop:
cmp r0, r1
beq dtor_end
ldr r2, [r0], #+4
stmfd sp!, {r0-r1}
mov lr, pc
#ifdef __ARM_ARCH_3__
mov pc, r2
#else
bx r2
#endif
ldmfd sp!, {r0-r1}
b dtor_loop
dtor_end:
/* Call atexit functions */
ldr r2, =_execute_at_exit_fns
mov lr, pc
#ifdef __ARM_ARCH_3__
mov pc, r2
#else
bx r2
#endif
/* Call debug_exit with return result/exit parameter */
mov r0, r5
ldr r2, =debug_exit
mov lr, pc
#ifdef __ARM_ARCH_3__
mov pc, r2
#else
bx r2
#endif
#endif
/* Returned from application entry point/debug_exit, loop forever. */
exit_loop:
b exit_loop
memory_copy:
cmp r0, r1
moveq pc, lr
subs r2, r2, r1
moveq pc, lr
/* if either pointer or length is not word aligned then byte copy */
orr r3, r0, r1
orr r3, r3, r2
tst r3, #0x3
bne 2f
/* word copy */
1:
ldr r3, [r0], #+4
str r3, [r1], #+4
subs r2, r2, #4
bne 1b
mov pc, lr
/* byte copy */
2:
ldrb r3, [r0], #+1
strb r3, [r1], #+1
subs r2, r2, #1
bne 2b
mov pc, lr
memory_set:
cmp r0, r1
moveq pc, lr
strb r2, [r0], #1
b memory_set
.section .init, "ax"
.code 32
.align 0
/******************************************************************************
* *
* Default exception handlers *
* *
******************************************************************************/
/******************************************************************************
* *
* Default exception handlers *
* These are declared weak symbols so they can be redefined in user code. *
* *
******************************************************************************/
undef_handler:
b undef_handler
pabort_handler:
b pabort_handler
dabort_handler:
b dabort_handler
fiq_handler:
b fiq_handler
irq_handler:
b irq_handler
.weak undef_handler, pabort_handler, dabort_handler, fiq_handler, irq_handler
#ifdef FULL_LIBRARY
.bss
args:
.space ARGSSPACE
#endif
/* Setup attibutes of stack and heap sections so they don't take up unnecessary room in the elf file */
.section .stack, "wa", %nobits
.section .stack_abt, "wa", %nobits
.section .stack_irq, "wa", %nobits
.section .stack_fiq, "wa", %nobits
.section .stack_svc, "wa", %nobits
.section .stack_und, "wa", %nobits
.section .heap, "wa", %nobits

View File

@ -1,760 +0,0 @@
/************************************************************************************//**
* \file Source\ARM7_LPC2000\Crossworks\flash.c
* \brief Bootloader flash driver source file.
* \ingroup Target_ARM7_LPC2000
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
/****************************************************************************************
* Macro definitions
****************************************************************************************/
/** \brief Value for an invalid flash sector. */
#define FLASH_INVALID_SECTOR (0xff)
/** \brief Value for an invalid flash address. */
#define FLASH_INVALID_ADDRESS (0xffffffff)
/** \brief Standard size of a flash block for writing. */
#define FLASH_WRITE_BLOCK_SIZE (512)
/** \brief Total numbers of sectors in array flashLayout[]. */
#define FLASH_TOTAL_SECTORS (sizeof(flashLayout)/sizeof(flashLayout[0]))
/** \brief Entry address for the IAP algorithms, enabling a switch to thumb mode. */
#define IAP_ENTRY_ADDRESS (0x7ffffff1)
/** \brief IAP prepare sectos command code. */
#define IAP_CMD_PREPARE_SECTORS (50)
/** \brief IAP copy ram to flash command code. */
#define IAP_CMD_COPY_RAM_TO_FLASH (51)
/** \brief IAP erase sectors command code. */
#define IAP_CMD_ERASE_SECTORS (52)
/** \brief IAP black check sectors command code. */
#define IAP_CMD_BLANK_CHECK_SECTORS (53)
/** \brief IAP compare command code. */
#define IAP_CMD_COMPARE (56)
/** \brief IAP result code for success. */
#define IAP_CMD_SUCCESS (0)
/****************************************************************************************
* Plausibility checks
****************************************************************************************/
#ifndef BOOT_FLASH_CUSTOM_LAYOUT_ENABLE
#define BOOT_FLASH_CUSTOM_LAYOUT_ENABLE (0u)
#endif
/****************************************************************************************
* Type definitions
****************************************************************************************/
/** \brief Function pointer type that is needed to call IAP functions of the
* NXP LPC2xxx.
*/
typedef void (*pIapHandler)(blt_int32u command[], blt_int32u result[]);
/** \brief Flash sector descriptor type. */
typedef struct
{
blt_addr sector_start; /**< sector start address */
blt_int32u sector_size; /**< sector size in bytes */
blt_int8u sector_num; /**< sector number */
} tFlashSector;
/** \brief Structure type for grouping flash block information.
* \details Programming is done per block of max FLASH_WRITE_BLOCK_SIZE. for this a
* flash block manager is implemented in this driver. this flash block manager
* depends on this flash block info structure. It holds the base address of
* the flash block and the data that should be programmed into the flash
* block. Note that the .data member must be 32-bit aligned by the linker.
* the .base_addr must be a multiple of FLASH_WRITE_BLOCK_SIZE.
*/
typedef struct
{
blt_addr base_addr; /**< Base address for the flash operation.*/
blt_int8u data[FLASH_WRITE_BLOCK_SIZE] __attribute__((aligned(4))); /**< Data array. */
} tFlashBlockInfo;
/****************************************************************************************
* Function prototypes
****************************************************************************************/
static blt_bool FlashInitBlock(tFlashBlockInfo *block, blt_addr address);
static tFlashBlockInfo *FlashSwitchBlock(tFlashBlockInfo *block, blt_addr base_addr);
static blt_bool FlashAddToBlock(tFlashBlockInfo *block, blt_addr address,
blt_int8u *data, blt_int32u len);
static blt_bool FlashWriteBlock(tFlashBlockInfo *block);
static blt_bool FlashEraseSectors(blt_int8u first_sector, blt_int8u last_sector);
static blt_int8u FlashGetSector(blt_addr address);
/****************************************************************************************
* Local constant declarations
****************************************************************************************/
/** \brief If desired, it is possible to set BOOT_FLASH_CUSTOM_LAYOUT_ENABLE to > 0
* in blt_conf.h and then implement your own version of the flashLayout[] table
* in a source-file with the name flash_layout.c. This way you customize the
* flash memory size reserved for the bootloader, without having to modify
* the flashLayout[] table in this file directly. This file will then include
* flash_layout.c so there is no need to compile it additionally with your
* project.
*/
#if (BOOT_FLASH_CUSTOM_LAYOUT_ENABLE == 0)
/** \brief Array wit the layout of the flash memory.
* \details Also controls what part of the flash memory is reserved for the bootloader.
* If the bootloader size changes, the reserved sectors for the bootloader
* might need adjustment to make sure the bootloader doesn't get overwritten.
* The current flash layout supports the NXP LPC21xx and LPC22xx targets.
* LPC23xx has a slightly different layout. To support the LPC23xx, simply
* update this flash layout.
*/
static const tFlashSector flashLayout[] =
{
#if (BOOT_NVM_SIZE_KB == 64)
/* { 0x00000000, 0x02000, 0}, flash sector 0 - reserved for bootloader */
{ 0x00002000, 0x02000, 1}, /* flash sector 1 */
{ 0x00004000, 0x02000, 2}, /* flash sector 2 */
{ 0x00006000, 0x02000, 3}, /* flash sector 3 */
{ 0x00008000, 0x02000, 4}, /* flash sector 4 */
{ 0x0000A000, 0x02000, 5}, /* flash sector 5 */
{ 0x0000C000, 0x02000, 6}, /* flash sector 6 */
/* { 0x0000E000, 0x02000, 7}, flash sector 7 - used by NXP bootcode */
#endif
#if (BOOT_NVM_SIZE_KB == 128)
/* { 0x00000000, 0x02000, 0}, flash sector 0 - reserved for bootloader */
{ 0x00002000, 0x02000, 1}, /* flash sector 1 */
{ 0x00004000, 0x02000, 2}, /* flash sector 2 */
{ 0x00006000, 0x02000, 3}, /* flash sector 3 */
{ 0x00008000, 0x02000, 4}, /* flash sector 4 */
{ 0x0000A000, 0x02000, 5}, /* flash sector 5 */
{ 0x0000C000, 0x02000, 6}, /* flash sector 6 */
{ 0x0000E000, 0x02000, 7}, /* flash sector 7 */
{ 0x00010000, 0x02000, 8}, /* flash sector 8 */
{ 0x00012000, 0x02000, 9}, /* flash sector 9 */
{ 0x00014000, 0x02000, 10}, /* flash sector 10 */
{ 0x00016000, 0x02000, 11}, /* flash sector 11 */
{ 0x00018000, 0x02000, 12}, /* flash sector 12 */
{ 0x0001A000, 0x02000, 13}, /* flash sector 13 */
{ 0x0001C000, 0x02000, 14}, /* flash sector 14 */
/* { 0x0001E000, 0x02000, 15}, flash sector 15 - used by NXP bootcode */
#endif
#if (BOOT_NVM_SIZE_KB == 256)
/* { 0x00000000, 0x02000, 0}, flash sector 0 - reserved for bootloader */
{ 0x00002000, 0x02000, 1}, /* flash sector 1 */
{ 0x00004000, 0x02000, 2}, /* flash sector 2 */
{ 0x00006000, 0x02000, 3}, /* flash sector 3 */
{ 0x00008000, 0x02000, 4}, /* flash sector 4 */
{ 0x0000A000, 0x02000, 5}, /* flash sector 5 */
{ 0x0000C000, 0x02000, 6}, /* flash sector 6 */
{ 0x0000E000, 0x02000, 7}, /* flash sector 7 */
{ 0x00010000, 0x10000, 8}, /* flash sector 8 */
{ 0x00020000, 0x10000, 9}, /* flash sector 9 */
{ 0x00030000, 0x02000, 10}, /* flash sector 10 */
{ 0x00032000, 0x02000, 11}, /* flash sector 11 */
{ 0x00034000, 0x02000, 12}, /* flash sector 12 */
{ 0x00036000, 0x02000, 13}, /* flash sector 13 */
{ 0x00038000, 0x02000, 14}, /* flash sector 14 */
{ 0x0003A000, 0x02000, 15}, /* flash sector 15 */
{ 0x0003C000, 0x02000, 16}, /* flash sector 16 */
/* { 0x0003E000, 0x02000, 17}, flash sector 17 - used by NXP bootcode */
#endif
};
#else
#include "flash_layout.c"
#endif /* BOOT_FLASH_CUSTOM_LAYOUT_ENABLE == 0 */
/****************************************************************************************
* Local data declarations
****************************************************************************************/
/** \brief Local variable with information about the flash block that is currently
* being operated on.
* \details The smallest amount of flash that can be programmed is
* FLASH_WRITE_BLOCK_SIZE. A flash block manager is implemented in this driver
* and stores info in this variable. Whenever new data should be flashed, it
* is first added to a RAM buffer, which is part of this variable. Whenever
* the RAM buffer, which has the size of a flash block, is full or data needs
* to be written to a different block, the contents of the RAM buffer are
* programmed to flash. The flash block manager requires some software
* overhead, yet results is faster flash programming because data is first
* harvested, ideally until there is enough to program an entire flash block,
* before the flash device is actually operated on.
*/
static tFlashBlockInfo blockInfo;
/** \brief Local variable with information about the flash boot block.
* \details The first block of the user program holds the vector table, which on the
* LPC2000 is also the where the checksum is written to. Is it likely that the
* vector table is first flashed and then, at the end of the programming
* sequence, the checksum. This means that this flash block need to be written
* to twice. Normally this is not a problem with flash memory, as long as you
* write the same values to those bytes that are not supposed to be changed and
* the locations where you do write to are still in the erased 0xFF state.
* Unfortunately, writing twice to flash this way, does not work reliably on
* the LPC2000. This is why we need to have an extra block, the bootblock,
* placed under the management of the block manager. This way is it possible
* to implement functionality so that the bootblock is only written to once at
* the end of the programming sequency.
*/
static tFlashBlockInfo bootBlockInfo;
/************************************************************************************//**
** \brief Initializes the flash driver.
** \return none.
**
****************************************************************************************/
void FlashInit(void)
{
/* check the flash block data buffer alignments */
if ((((blt_addr)blockInfo.data % 4) != 0) || (((blt_addr)bootBlockInfo.data % 4) != 0))
{
/* incorrect alignment */
ASSERT_RT(BLT_FALSE);
}
/* init the flash block info structs by setting the address to an invalid address */
blockInfo.base_addr = FLASH_INVALID_ADDRESS;
bootBlockInfo.base_addr = FLASH_INVALID_ADDRESS;
} /*** end of FlashInit ***/
/************************************************************************************//**
** \brief Reinitializes the flash driver.
** \return none.
**
****************************************************************************************/
void FlashReinit(void)
{
/* init the flash block info structs by setting the address to an invalid address */
blockInfo.base_addr = FLASH_INVALID_ADDRESS;
bootBlockInfo.base_addr = FLASH_INVALID_ADDRESS;
} /*** end of FlashReinit ***/
/************************************************************************************//**
** \brief Writes the data to flash through a flash block manager. Note that this
** function also checks that no data is programmed outside the flash
** memory region, so the bootloader can never be overwritten.
** \param addr Start address.
** \param len Length in bytes.
** \param data Pointer to the data buffer.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool FlashWrite(blt_addr addr, blt_int32u len, blt_int8u *data)
{
blt_addr base_addr;
/* make sure the addresses are within the flash device */
if ((FlashGetSector(addr) == FLASH_INVALID_SECTOR) || \
(FlashGetSector(addr+len-1) == FLASH_INVALID_SECTOR))
{
return BLT_FALSE;
}
/* if this is the bootblock, then let the boot block manager handle it */
base_addr = (addr/FLASH_WRITE_BLOCK_SIZE)*FLASH_WRITE_BLOCK_SIZE;
if (base_addr == flashLayout[0].sector_start)
{
/* let the boot block manager handle it */
return FlashAddToBlock(&bootBlockInfo, addr, data, len);
}
/* let the block manager handle it */
return FlashAddToBlock(&blockInfo, addr, data, len);
} /*** end of FlashWrite ***/
/************************************************************************************//**
** \brief Erases the flash memory. Note that this function also checks that no
** data is erased outside the flash memory region, so the bootloader can
** never be erased.
** \param addr Start address.
** \param len Length in bytes.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool FlashErase(blt_addr addr, blt_int32u len)
{
blt_int8u first_sector;
blt_int8u last_sector;
/* obtain the first and last sector number */
first_sector = FlashGetSector(addr);
last_sector = FlashGetSector(addr+len-1);
/* check them */
if ((first_sector == FLASH_INVALID_SECTOR) || (last_sector == FLASH_INVALID_SECTOR))
{
return BLT_FALSE;
}
/* erase the sectors */
return FlashEraseSectors(first_sector, last_sector);
} /*** end of FlashErase ***/
/************************************************************************************//**
** \brief Writes a checksum of the user program to non-volatile memory. This is
** performed once the entire user program has been programmed. Through
** the checksum, the bootloader can check if the programming session
** was completed, which indicates that a valid user programming is
** present and can be started.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool FlashWriteChecksum(void)
{
blt_int32u signature_checksum = 0;
/* The ARM7 core already has a spot reserved for a checksum that the bootloader can
* store at the end of a programming session.
*
* Layout of the vector table (* = don't care)
* 0x******00 Reset Exception
* 0x******04 Undefined Instruction Exception
* 0x******08 Software Interrupt Exception
* 0x******0C Prefetch Exception
* 0x******10 Abort Exception
* 0x******14 [reserved for signature checksum]
* 0x******18 IRQ Exception
* 0x******1C FIQ Exception
*
* signature_checksum = Two's complement of (SUM(exception address values))
*/
/* first check that the bootblock contains valid data. if not, this means the
* bootblock is not part of the reprogramming this time and therefore no
* new checksum needs to be written
*/
if (bootBlockInfo.base_addr == FLASH_INVALID_ADDRESS)
{
return BLT_TRUE;
}
/* compute the checksum. note that the user program's vectors are not yet written
* to flash but are present in the bootblock data structure at this point.
*/
signature_checksum += *((blt_int32u *)(&bootBlockInfo.data[0+0x00]));
signature_checksum += *((blt_int32u *)(&bootBlockInfo.data[0+0x04]));
signature_checksum += *((blt_int32u *)(&bootBlockInfo.data[0+0x08]));
signature_checksum += *((blt_int32u *)(&bootBlockInfo.data[0+0x0C]));
signature_checksum += *((blt_int32u *)(&bootBlockInfo.data[0+0x10]));
signature_checksum += *((blt_int32u *)(&bootBlockInfo.data[0+0x18]));
signature_checksum += *((blt_int32u *)(&bootBlockInfo.data[0+0x1C]));
signature_checksum = ~signature_checksum; /* one's complement */
signature_checksum += 1; /* two's complement */
/* write the checksum */
return FlashWrite(flashLayout[0].sector_start+0x14, sizeof(blt_addr),
(blt_int8u *)&signature_checksum);
} /*** end of FlashWriteChecksum ***/
/************************************************************************************//**
** \brief Verifies the checksum, which indicates that a valid user program is
** present and can be started.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool FlashVerifyChecksum(void)
{
blt_int32u signature_checksum = 0;
/* verify the checksum based on how it was written by CpuWriteChecksum() */
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start));
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start+0x04));
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start+0x08));
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start+0x0C));
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start+0x10));
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start+0x14));
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start+0x18));
signature_checksum += *((blt_int32u *)(flashLayout[0].sector_start+0x1C));
/* sum should add up to an unsigned 32-bit value of 0 */
if (signature_checksum == 0)
{
/* checksum okay */
return BLT_TRUE;
}
/* checksum incorrect */
return BLT_FALSE;
} /*** end of FlashVerifyChecksum ***/
/************************************************************************************//**
** \brief Finalizes the flash driver operations. There could still be data in
** the currently active block that needs to be flashed.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool FlashDone(void)
{
/* check if there is still data waiting to be programmed in the boot block */
if (bootBlockInfo.base_addr != FLASH_INVALID_ADDRESS)
{
if (FlashWriteBlock(&bootBlockInfo) == BLT_FALSE)
{
return BLT_FALSE;
}
}
/* check if there is still data waiting to be programmed */
if (blockInfo.base_addr != FLASH_INVALID_ADDRESS)
{
if (FlashWriteBlock(&blockInfo) == BLT_FALSE)
{
return BLT_FALSE;
}
}
/* still here so all is okay */
return BLT_TRUE;
} /*** end of FlashDone ***/
/************************************************************************************//**
** \brief Obtains the base address of the flash memory available to the user program.
** This is basically the first address in the flashLayout table.
** \return Base address.
**
****************************************************************************************/
blt_addr FlashGetUserProgBaseAddress(void)
{
return flashLayout[0].sector_start;
} /*** end of FlashGetUserProgBaseAddress ***/
/************************************************************************************//**
** \brief Copies data currently in flash to the block->data and sets the
** base address.
** \param block Pointer to flash block info structure to operate on.
** \param address Base address of the block data.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
static blt_bool FlashInitBlock(tFlashBlockInfo *block, blt_addr address)
{
/* check address alignment */
if ((address % FLASH_WRITE_BLOCK_SIZE) != 0)
{
return BLT_FALSE;
}
/* make sure that we are initializing a new block and not the same one */
if (block->base_addr == address)
{
/* block already initialized, so nothing to do */
return BLT_TRUE;
}
/* set the base address and copies the current data from flash */
block->base_addr = address;
CpuMemCopy((blt_addr)block->data, address, FLASH_WRITE_BLOCK_SIZE);
return BLT_TRUE;
} /*** end of FlashInitBlock ***/
/************************************************************************************//**
** \brief Switches blocks by programming the current one and initializing the
** next.
** \param block Pointer to flash block info structure to operate on.
** \param base_addr Base address of the next block.
** \return The pointer of the block info struct that is no being used, or a NULL
** pointer in case of error.
**
****************************************************************************************/
static tFlashBlockInfo *FlashSwitchBlock(tFlashBlockInfo *block, blt_addr base_addr)
{
/* check if a switch needs to be made away from the boot block. in this case the boot
* block shouldn't be written yet, because this is done at the end of the programming
* session by FlashDone(), this is right after the checksum was written.
*/
if (block == &bootBlockInfo)
{
/* switch from the boot block to the generic block info structure */
block = &blockInfo;
}
/* check if a switch back into the bootblock is needed. in this case the generic block
* doesn't need to be written here yet.
*/
else if (base_addr == flashLayout[0].sector_start)
{
/* switch from the generic block to the boot block info structure */
block = &bootBlockInfo;
base_addr = flashLayout[0].sector_start;
}
else
{
/* need to switch to a new block, so program the current one and init the next */
if (FlashWriteBlock(block) == BLT_FALSE)
{
return BLT_NULL;
}
}
/* initialize tne new block when necessary */
if (FlashInitBlock(block, base_addr) == BLT_FALSE)
{
return BLT_NULL;
}
/* still here to all is okay */
return block;
} /*** end of FlashSwitchBlock ***/
/************************************************************************************//**
** \brief Programming is done per block. This function adds data to the block
** that is currently collecting data to be written to flash. If the
** address is outside of the current block, the current block is written
** to flash an a new block is initialized.
** \param block Pointer to flash block info structure to operate on.
** \param address Flash destination address.
** \param data Pointer to the byte array with data.
** \param len Number of bytes to add to the block.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
static blt_bool FlashAddToBlock(tFlashBlockInfo *block, blt_addr address,
blt_int8u *data, blt_int32u len)
{
blt_addr current_base_addr;
blt_int8u *dst;
blt_int8u *src;
/* determine the current base address */
current_base_addr = (address/FLASH_WRITE_BLOCK_SIZE)*FLASH_WRITE_BLOCK_SIZE;
/* make sure the blockInfo is not uninitialized */
if (block->base_addr == FLASH_INVALID_ADDRESS)
{
/* initialize the blockInfo struct for the current block */
if (FlashInitBlock(block, current_base_addr) == BLT_FALSE)
{
return BLT_FALSE;
}
}
/* check if the new data fits in the current block */
if (block->base_addr != current_base_addr)
{
/* need to switch to a new block, so program the current one and init the next */
block = FlashSwitchBlock(block, current_base_addr);
if (block == BLT_NULL)
{
return BLT_FALSE;
}
}
/* add the data to the current block, but check for block overflow */
dst = &(block->data[address - block->base_addr]);
src = data;
do
{
/* keep the watchdog happy */
CopService();
/* buffer overflow? */
if ((blt_addr)(dst-&(block->data[0])) >= FLASH_WRITE_BLOCK_SIZE)
{
/* need to switch to a new block, so program the current one and init the next */
block = FlashSwitchBlock(block, current_base_addr+FLASH_WRITE_BLOCK_SIZE);
if (block == BLT_NULL)
{
return BLT_FALSE;
}
/* reset destination pointer */
dst = &(block->data[0]);
}
/* write the data to the buffer */
*dst = *src;
/* update pointers */
dst++;
src++;
/* decrement byte counter */
len--;
}
while (len > 0);
/* still here so all is good */
return BLT_TRUE;
} /*** end of FlashAddToBlock ***/
/************************************************************************************//**
** \brief Programs FLASH_WRITE_BLOCK_SIZE bytes to flash from the block->data
** array.
** \param block Pointer to flash block info structure to operate on.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
static blt_bool FlashWriteBlock(tFlashBlockInfo *block)
{
blt_int32u iap_command[5];
blt_int32u iap_result[3];
blt_int8u sector_num;
pIapHandler iapHandler = (void *)IAP_ENTRY_ADDRESS;
/* check that address is actually within flash */
sector_num = FlashGetSector(block->base_addr);
if (sector_num == FLASH_INVALID_SECTOR)
{
return BLT_FALSE;
}
/* send the prepare sector command for just this one sector */
iap_command[0] = IAP_CMD_PREPARE_SECTORS;
iap_command[1] = sector_num;
iap_command[2] = sector_num;
iap_result[0] = !IAP_CMD_SUCCESS;
/* service the watchdog before calling the IAP handler */
CopService();
iapHandler(iap_command, iap_result);
if (iap_result[0] != IAP_CMD_SUCCESS)
{
return BLT_FALSE;
}
/* send the erase sector command */
iap_command[0] = IAP_CMD_COPY_RAM_TO_FLASH;
iap_command[1] = (blt_int32u)block->base_addr;
iap_command[2] = (blt_int32u)block->data;
iap_command[3] = FLASH_WRITE_BLOCK_SIZE;
iap_command[4] = BOOT_CPU_SYSTEM_SPEED_KHZ;
iap_result[0] = !IAP_CMD_SUCCESS;
/* service the watchdog before calling the IAP handler */
CopService();
iapHandler(iap_command, iap_result);
if (iap_result[0] != IAP_CMD_SUCCESS)
{
return BLT_FALSE;
}
/* perform a comparison for verification purposes */
iap_command[0] = IAP_CMD_COMPARE;
iap_command[1] = (blt_int32u)block->base_addr;
iap_command[2] = (blt_int32u)block->data;
iap_command[3] = FLASH_WRITE_BLOCK_SIZE;
iap_result[0] = !IAP_CMD_SUCCESS;
/* service the watchdog before calling the IAP handler */
CopService();
iapHandler(iap_command, iap_result);
if (iap_result[0] != IAP_CMD_SUCCESS)
{
return BLT_FALSE;
}
/* still here so all is okay */
return BLT_TRUE;
} /*** end of FlashWriteBlock ***/
/************************************************************************************//**
** \brief Erases the flash sectors from first_sector up until last_sector.
** \param first_sector First flash sector number.
** \param last_sector Last flash sector number.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
static blt_bool FlashEraseSectors(blt_int8u first_sector, blt_int8u last_sector)
{
blt_int32u iap_command[5];
blt_int32u iap_result[3];
pIapHandler iapHandler = (void *)IAP_ENTRY_ADDRESS;
/* validate the sector numbers */
if (first_sector > last_sector)
{
return BLT_FALSE;
}
if ((first_sector < flashLayout[0].sector_num) || \
(last_sector > flashLayout[FLASH_TOTAL_SECTORS-1].sector_num))
{
return BLT_FALSE;
}
/* send the prepare sector command for just this one sector */
iap_command[0] = IAP_CMD_PREPARE_SECTORS;
iap_command[1] = first_sector;
iap_command[2] = last_sector;
iap_result[0] = !IAP_CMD_SUCCESS;
/* service the watchdog before calling the IAP handler */
CopService();
iapHandler(iap_command, iap_result);
if (iap_result[0] != IAP_CMD_SUCCESS)
{
return BLT_FALSE;
}
/* send the erase sector command */
iap_command[0] = IAP_CMD_ERASE_SECTORS;
iap_command[1] = first_sector;
iap_command[2] = last_sector;
iap_command[3] = BOOT_CPU_SYSTEM_SPEED_KHZ;
iap_result[0] = !IAP_CMD_SUCCESS;
/* service the watchdog before calling the IAP handler */
CopService();
iapHandler(iap_command, iap_result);
if (iap_result[0] != IAP_CMD_SUCCESS)
{
return BLT_FALSE;
}
/* perform a blank check for verification purposes */
iap_command[0] = IAP_CMD_BLANK_CHECK_SECTORS ;
iap_command[1] = first_sector;
iap_command[2] = last_sector;
iap_result[0] = !IAP_CMD_SUCCESS;
/* service the watchdog before calling the IAP handler */
CopService();
iapHandler(iap_command, iap_result);
if (iap_result[0] != IAP_CMD_SUCCESS)
{
return BLT_FALSE;
}
/* still here so all went okay */
return BLT_TRUE;
} /*** end of FlashEraseSectors ***/
/************************************************************************************//**
** \brief Determines the flash sector the address is in.
** \param address Address in the flash sector.
** \return Flash sector number or FLASH_INVALID_SECTOR.
**
****************************************************************************************/
static blt_int8u FlashGetSector(blt_addr address)
{
blt_int8u sectorIdx;
/* search through the sectors to find the right one */
for (sectorIdx = 0; sectorIdx < FLASH_TOTAL_SECTORS; sectorIdx++)
{
/* keep the watchdog happy */
CopService();
/* is the address in this sector? */
if ((address >= flashLayout[sectorIdx].sector_start) && \
(address < (flashLayout[sectorIdx].sector_start + \
flashLayout[sectorIdx].sector_size)))
{
/* return the sector number */
return flashLayout[sectorIdx].sector_num;
}
}
/* still here so no valid sector found */
return FLASH_INVALID_SECTOR;
} /*** end of FlashGetSector ***/
/*********************************** end of flash.c ************************************/

View File

@ -1,45 +0,0 @@
/************************************************************************************//**
* \file Source\ARM7_LPC2000\Crossworks\flash.h
* \brief Bootloader flash driver header file.
* \ingroup Target_ARM7_LPC2000
* \internal
*----------------------------------------------------------------------------------------
* C O P Y R I G H T
*----------------------------------------------------------------------------------------
* Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
*
*----------------------------------------------------------------------------------------
* L I C E N S E
*----------------------------------------------------------------------------------------
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published by the Free
* Software Foundation, either version 3 of the License, or (at your option) any later
* version.
*
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You have received a copy of the GNU General Public License along with OpenBLT. It
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
*
* \endinternal
****************************************************************************************/
#ifndef FLASH_H
#define FLASH_H
/****************************************************************************************
* Function prototypes
****************************************************************************************/
void FlashInit(void);
void FlashReinit(void);
blt_bool FlashWrite(blt_addr addr, blt_int32u len, blt_int8u *data);
blt_bool FlashErase(blt_addr addr, blt_int32u len);
blt_bool FlashWriteChecksum(void);
blt_bool FlashVerifyChecksum(void);
blt_bool FlashDone(void);
blt_addr FlashGetUserProgBaseAddress(void);
#endif /* FLASH_H */
/*********************************** end of flash.h ************************************/

View File

@ -1,356 +0,0 @@
MEMORY
{
UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
AHB_Peripherals (wx) : ORIGIN = 0xffe00000, LENGTH = 0x00200000
VPB_Peripherals (wx) : ORIGIN = 0xe0000000, LENGTH = 0x00200000
BANK3 (wx) : ORIGIN = 0x83000000, LENGTH = 0x01000000
BANK2 (wx) : ORIGIN = 0x82000000, LENGTH = 0x01000000
External_SRAM (wx) : ORIGIN = 0x81000000, LENGTH = 0x00100000
External_FLASH (rx) : ORIGIN = 0x80000000, LENGTH = 0x00400000
SRAM (wx) : ORIGIN = 0x40000200, LENGTH = 0x00001CE0
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00002000
}
SECTIONS
{
__AHB_Peripherals_segment_start__ = 0xffe00000;
__AHB_Peripherals_segment_end__ = 0x00000000;
__VPB_Peripherals_segment_start__ = 0xe0000000;
__VPB_Peripherals_segment_end__ = 0xe0200000;
__BANK3_segment_start__ = 0x83000000;
__BANK3_segment_end__ = 0x84000000;
__BANK2_segment_start__ = 0x82000000;
__BANK2_segment_end__ = 0x83000000;
__External_SRAM_segment_start__ = 0x81000000;
__External_SRAM_segment_end__ = 0x81100000;
__External_FLASH_segment_start__ = 0x80000000;
__External_FLASH_segment_end__ = 0x80400000;
__SRAM_segment_start__ = 0x40000200;
__SRAM_segment_end__ = 0x40001EE0;
__FLASH_segment_start__ = 0x00000000;
__FLASH_segment_end__ = 0x00002000;
__STACKSIZE__ = 1024;
__STACKSIZE_IRQ__ = 256;
__STACKSIZE_FIQ__ = 256;
__STACKSIZE_SVC__ = 0;
__STACKSIZE_ABT__ = 0;
__STACKSIZE_UND__ = 0;
__HEAPSIZE__ = 1024;
__text2_load_start__ = ALIGN(__External_FLASH_segment_start__ , 4);
.text2 ALIGN(__External_FLASH_segment_start__ , 4) : AT(ALIGN(__External_FLASH_segment_start__ , 4))
{
__text2_start__ = .;
*(.text2 .text2.*)
}
__text2_end__ = __text2_start__ + SIZEOF(.text2);
__text2_load_end__ = __text2_end__;
. = ASSERT(__text2_end__ >= __External_FLASH_segment_start__ && __text2_end__ <= (__External_FLASH_segment_start__ + 0x00400000) , "error: .text2 is too large to fit in External_FLASH memory segment");
__rodata2_load_start__ = ALIGN(__text2_end__ , 4);
.rodata2 ALIGN(__text2_end__ , 4) : AT(ALIGN(__text2_end__ , 4))
{
__rodata2_start__ = .;
*(.rodata2 .rodata2.*)
}
__rodata2_end__ = __rodata2_start__ + SIZEOF(.rodata2);
__rodata2_load_end__ = __rodata2_end__;
. = ASSERT(__rodata2_end__ >= __External_FLASH_segment_start__ && __rodata2_end__ <= (__External_FLASH_segment_start__ + 0x00400000) , "error: .rodata2 is too large to fit in External_FLASH memory segment");
__data2_load_start__ = ALIGN(__rodata2_end__ , 4);
.data2 ALIGN(__External_SRAM_segment_start__ , 4) : AT(ALIGN(__rodata2_end__ , 4))
{
__data2_start__ = .;
*(.data2 .data2.*)
}
__data2_end__ = __data2_start__ + SIZEOF(.data2);
__data2_load_end__ = __data2_load_start__ + SIZEOF(.data2);
__External_FLASH_segment_used_end__ = ALIGN(__rodata2_end__ , 4) + SIZEOF(.data2);
. = ASSERT((__data2_load_start__ + SIZEOF(.data2)) >= __External_FLASH_segment_start__ && (__data2_load_start__ + SIZEOF(.data2)) <= (__External_FLASH_segment_start__ + 0x00400000) , "error: .data2 is too large to fit in External_FLASH memory segment");
.data2_run ALIGN(__External_SRAM_segment_start__ , 4) (NOLOAD) :
{
__data2_run_start__ = .;
. = MAX(__data2_run_start__ + SIZEOF(.data2), .);
}
__data2_run_end__ = __data2_run_start__ + SIZEOF(.data2_run);
__data2_run_load_end__ = __data2_run_end__;
. = ASSERT(__data2_run_end__ >= __External_SRAM_segment_start__ && __data2_run_end__ <= (__External_SRAM_segment_start__ + 0x00100000) , "error: .data2_run is too large to fit in External_SRAM memory segment");
__bss2_load_start__ = ALIGN(__data2_run_end__ , 4);
.bss2 ALIGN(__data2_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data2_run_end__ , 4))
{
__bss2_start__ = .;
*(.bss2 .bss2.*)
}
__bss2_end__ = __bss2_start__ + SIZEOF(.bss2);
__bss2_load_end__ = __bss2_end__;
__External_SRAM_segment_used_end__ = ALIGN(__data2_run_end__ , 4) + SIZEOF(.bss2);
. = ASSERT(__bss2_end__ >= __External_SRAM_segment_start__ && __bss2_end__ <= (__External_SRAM_segment_start__ + 0x00100000) , "error: .bss2 is too large to fit in External_SRAM memory segment");
__vectors_ram_load_start__ = __SRAM_segment_start__;
.vectors_ram __SRAM_segment_start__ (NOLOAD) : AT(__SRAM_segment_start__)
{
__vectors_ram_start__ = .;
*(.vectors_ram .vectors_ram.*)
. = MAX(__vectors_ram_start__ + 0x0000003C , .);
}
__vectors_ram_end__ = __vectors_ram_start__ + SIZEOF(.vectors_ram);
__vectors_ram_load_end__ = __vectors_ram_end__;
. = ASSERT(__vectors_ram_end__ >= __SRAM_segment_start__ && __vectors_ram_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .vectors_ram is too large to fit in SRAM memory segment");
__vectors_load_start__ = __FLASH_segment_start__;
.vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
{
__vectors_start__ = .;
*(.vectors .vectors.*)
}
__vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
__vectors_load_end__ = __vectors_end__;
. = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00040000) , "error: .vectors is too large to fit in FLASH memory segment");
__init_load_start__ = ALIGN(__vectors_end__ , 4);
.init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
{
__init_start__ = .;
*(.init .init.*)
}
__init_end__ = __init_start__ + SIZEOF(.init);
__init_load_end__ = __init_end__;
. = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00040000) , "error: .init is too large to fit in FLASH memory segment");
__text_load_start__ = ALIGN(__init_end__ , 4);
.text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
{
__text_start__ = .;
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
}
__text_end__ = __text_start__ + SIZEOF(.text);
__text_load_end__ = __text_end__;
. = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00040000) , "error: .text is too large to fit in FLASH memory segment");
__dtors_load_start__ = ALIGN(__text_end__ , 4);
.dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
{
__dtors_start__ = .;
KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
}
__dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
__dtors_load_end__ = __dtors_end__;
. = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00040000) , "error: .dtors is too large to fit in FLASH memory segment");
__ctors_load_start__ = ALIGN(__dtors_end__ , 4);
.ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
{
__ctors_start__ = .;
KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
}
__ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
__ctors_load_end__ = __ctors_end__;
. = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00040000) , "error: .ctors is too large to fit in FLASH memory segment");
__rodata_load_start__ = ALIGN(__ctors_end__ , 4);
.rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
{
__rodata_start__ = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
}
__rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
__rodata_load_end__ = __rodata_end__;
. = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00040000) , "error: .rodata is too large to fit in FLASH memory segment");
__data_load_start__ = ALIGN(__rodata_end__ , 4);
.data ALIGN(__vectors_ram_end__ , 4) : AT(ALIGN(__rodata_end__ , 4))
{
__data_start__ = .;
*(.data .data.* .gnu.linkonce.d.*)
}
__data_end__ = __data_start__ + SIZEOF(.data);
__data_load_end__ = __data_load_start__ + SIZEOF(.data);
. = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00040000) , "error: .data is too large to fit in FLASH memory segment");
.data_run ALIGN(__vectors_ram_end__ , 4) (NOLOAD) :
{
__data_run_start__ = .;
. = MAX(__data_run_start__ + SIZEOF(.data), .);
}
__data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
__data_run_load_end__ = __data_run_end__;
. = ASSERT(__data_run_end__ >= __SRAM_segment_start__ && __data_run_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .data_run is too large to fit in SRAM memory segment");
__bss_load_start__ = ALIGN(__data_run_end__ , 4);
.bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
{
__bss_start__ = .;
*(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
}
__bss_end__ = __bss_start__ + SIZEOF(.bss);
__bss_load_end__ = __bss_end__;
. = ASSERT(__bss_end__ >= __SRAM_segment_start__ && __bss_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .bss is too large to fit in SRAM memory segment");
__non_init_load_start__ = ALIGN(__bss_end__ , 4);
.non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
{
__non_init_start__ = .;
*(.non_init .non_init.*)
}
__non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
__non_init_load_end__ = __non_init_end__;
. = ASSERT(__non_init_end__ >= __SRAM_segment_start__ && __non_init_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .non_init is too large to fit in SRAM memory segment");
__heap_load_start__ = ALIGN(__non_init_end__ , 4);
.heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
{
__heap_start__ = .;
*(.heap .heap.*)
. = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
}
__heap_end__ = __heap_start__ + SIZEOF(.heap);
__heap_load_end__ = __heap_end__;
. = ASSERT(__heap_end__ >= __SRAM_segment_start__ && __heap_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .heap is too large to fit in SRAM memory segment");
__stack_load_start__ = ALIGN(__heap_end__ , 4);
.stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
{
__stack_start__ = .;
*(.stack .stack.*)
. = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
}
__stack_end__ = __stack_start__ + SIZEOF(.stack);
__stack_load_end__ = __stack_end__;
. = ASSERT(__stack_end__ >= __SRAM_segment_start__ && __stack_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .stack is too large to fit in SRAM memory segment");
__stack_irq_load_start__ = ALIGN(__stack_end__ , 4);
.stack_irq ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
{
__stack_irq_start__ = .;
*(.stack_irq .stack_irq.*)
. = ALIGN(MAX(__stack_irq_start__ + __STACKSIZE_IRQ__ , .), 4);
}
__stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);
__stack_irq_load_end__ = __stack_irq_end__;
. = ASSERT(__stack_irq_end__ >= __SRAM_segment_start__ && __stack_irq_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .stack_irq is too large to fit in SRAM memory segment");
__stack_fiq_load_start__ = ALIGN(__stack_irq_end__ , 4);
.stack_fiq ALIGN(__stack_irq_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_irq_end__ , 4))
{
__stack_fiq_start__ = .;
*(.stack_fiq .stack_fiq.*)
. = ALIGN(MAX(__stack_fiq_start__ + __STACKSIZE_FIQ__ , .), 4);
}
__stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);
__stack_fiq_load_end__ = __stack_fiq_end__;
. = ASSERT(__stack_fiq_end__ >= __SRAM_segment_start__ && __stack_fiq_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .stack_fiq is too large to fit in SRAM memory segment");
__stack_svc_load_start__ = ALIGN(__stack_fiq_end__ , 4);
.stack_svc ALIGN(__stack_fiq_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_fiq_end__ , 4))
{
__stack_svc_start__ = .;
*(.stack_svc .stack_svc.*)
. = ALIGN(MAX(__stack_svc_start__ + __STACKSIZE_SVC__ , .), 4);
}
__stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);
__stack_svc_load_end__ = __stack_svc_end__;
. = ASSERT(__stack_svc_end__ >= __SRAM_segment_start__ && __stack_svc_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .stack_svc is too large to fit in SRAM memory segment");
__stack_abt_load_start__ = ALIGN(__stack_svc_end__ , 4);
.stack_abt ALIGN(__stack_svc_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_svc_end__ , 4))
{
__stack_abt_start__ = .;
*(.stack_abt .stack_abt.*)
. = ALIGN(MAX(__stack_abt_start__ + __STACKSIZE_ABT__ , .), 4);
}
__stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);
__stack_abt_load_end__ = __stack_abt_end__;
. = ASSERT(__stack_abt_end__ >= __SRAM_segment_start__ && __stack_abt_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .stack_abt is too large to fit in SRAM memory segment");
__stack_und_load_start__ = ALIGN(__stack_abt_end__ , 4);
.stack_und ALIGN(__stack_abt_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_abt_end__ , 4))
{
__stack_und_start__ = .;
*(.stack_und .stack_und.*)
. = ALIGN(MAX(__stack_und_start__ + __STACKSIZE_UND__ , .), 4);
}
__stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);
__stack_und_load_end__ = __stack_und_end__;
. = ASSERT(__stack_und_end__ >= __SRAM_segment_start__ && __stack_und_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .stack_und is too large to fit in SRAM memory segment");
__fast_load_start__ = ALIGN(__data_load_start__ + SIZEOF(.data) , 4);
.fast ALIGN(__stack_und_end__ , 4) : AT(ALIGN(__data_load_start__ + SIZEOF(.data) , 4))
{
__fast_start__ = .;
*(.fast .fast.*)
}
__fast_end__ = __fast_start__ + SIZEOF(.fast);
__fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
__FLASH_segment_used_end__ = ALIGN(__data_load_start__ + SIZEOF(.data) , 4) + SIZEOF(.fast);
. = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00040000) , "error: .fast is too large to fit in FLASH memory segment");
.fast_run ALIGN(__stack_und_end__ , 4) (NOLOAD) :
{
__fast_run_start__ = .;
. = MAX(__fast_run_start__ + SIZEOF(.fast), .);
}
__fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
__fast_run_load_end__ = __fast_run_end__;
__SRAM_segment_used_end__ = ALIGN(__stack_und_end__ , 4) + SIZEOF(.fast_run);
. = ASSERT(__fast_run_end__ >= __SRAM_segment_start__ && __fast_run_end__ <= (__SRAM_segment_start__ + 0x00004000) , "error: .fast_run is too large to fit in SRAM memory segment");
}