- Supported firmware updates from SD-card for Olimex STM32-P103 demo
git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@43 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg
parent
f6830b5864
commit
722b691530
File diff suppressed because it is too large
Load Diff
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@ -17,7 +17,7 @@
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<Build><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Find-in-Files</Factory></Window></Windows></PreferedWindows><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1155</ColumnWidth1><ColumnWidth2>308</ColumnWidth2><ColumnWidth3>77</ColumnWidth3></Build><Find-in-Files><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ColumnWidth0>552</ColumnWidth0><ColumnWidth1>78</ColumnWidth1><ColumnWidth2>946</ColumnWidth2></Find-in-Files><TerminalIO/><PROJECT_GUI_CALL_GRAPH><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><col-names><item>File</item><item>Function</item><item>Line</item></col-names><col-widths><item>200</item><item>700</item><item>100</item></col-widths></PROJECT_GUI_CALL_GRAPH><Select-Ambiguous-Definitions><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Build</Factory></Window><Window><Factory>Find-in-Files</Factory></Window><Window><Factory>Find-All-References</Factory></Window></Windows></PreferedWindows><ColumnWidth0>664</ColumnWidth0><ColumnWidth1>94</ColumnWidth1><ColumnWidth2>1138</ColumnWidth2></Select-Ambiguous-Definitions><Find-All-References><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Build</Factory></Window><Window><Factory>Find-in-Files</Factory></Window></Windows></PreferedWindows><ColumnWidth0>664</ColumnWidth0><ColumnWidth1>94</ColumnWidth1><ColumnWidth2>1138</ColumnWidth2></Find-All-References></Static>
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<Windows>
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<Wnd0>
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<Wnd1>
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<Tabs>
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<Tab>
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<Identity>TabID-31649-22318</Identity>
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@ -29,7 +29,7 @@
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</Tab>
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</Tabs>
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<SelectedTab>0</SelectedTab></Wnd0><Wnd3><Tabs><Tab><Identity>TabID-25743-19564</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
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<SelectedTab>0</SelectedTab></Wnd1><Wnd2><Tabs><Tab><Identity>TabID-25743-19564</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd2></Windows>
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<Editor>
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@ -42,7 +42,7 @@
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<Top><Row0><Sizes><Toolbar-027dd6d8><key>iaridepm.enu1</key></Toolbar-027dd6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>963</Bottom><Right>406</Right><x>-2</x><y>-2</y><xscreen>288</xscreen><yscreen>296</yscreen><sizeHorzCX>150000</sizeHorzCX><sizeHorzCY>293651</sizeHorzCY><sizeVertCX>212500</sizeVertCX><sizeVertCY>957341</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>963</Bottom><Right>506</Right><x>-2</x><y>-2</y><xscreen>2309</xscreen><yscreen>243</yscreen><sizeHorzCX>1202604</sizeHorzCX><sizeHorzCY>241071</sizeHorzCY><sizeVertCX>264583</sizeVertCX><sizeVertCY>957341</sizeVertCY></Rect></Wnd3></Sizes></Row0></Right><Bottom><Row0><Sizes/></Row0></Bottom><Float><Sizes/></Float></Positions>
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<Top><Row0><Sizes><Toolbar-0289d6d8><key>iaridepm.enu1</key></Toolbar-0289d6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>963</Bottom><Right>406</Right><x>-2</x><y>-2</y><xscreen>288</xscreen><yscreen>296</yscreen><sizeHorzCX>150000</sizeHorzCX><sizeHorzCY>293651</sizeHorzCY><sizeVertCX>212500</sizeVertCX><sizeVertCY>957341</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>963</Bottom><Right>506</Right><x>-2</x><y>-2</y><xscreen>2309</xscreen><yscreen>243</yscreen><sizeHorzCX>1202604</sizeHorzCX><sizeHorzCY>241071</sizeHorzCY><sizeVertCX>264583</sizeVertCX><sizeVertCY>957341</sizeVertCY></Rect></Wnd2></Sizes></Row0></Right><Bottom><Row0><Sizes/></Row0></Bottom><Float><Sizes/></Float></Positions>
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</Desktop>
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</Workspace>
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@ -659,7 +659,7 @@ DRESULT disk_ioctl (
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DWORD get_fattime (void)
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{
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/* No RTC supprt. Return a fixed value 2010/4/26 0:00:00 */
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/* No RTC supprt. Return a fixed value 2013/5/10 0:00:00 */
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return ((DWORD)(2013 - 1980) << 25) /* Y */
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| ((DWORD)5 << 21) /* M */
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| ((DWORD)10 << 16) /* D */
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Binary file not shown.
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@ -19,6 +19,6 @@
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@REM
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"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armgdbserv.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "--semihosting" "--drv_communication=TCPIP:localhost,3333"
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"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --flash_loader "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\config\flashloader\ST\FlashSTM32F10xx6.board" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "--drv_verify_download" "--semihosting" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
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@ -18,7 +18,7 @@ ActionState=1
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Enabled=0
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ShowSource=1
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[DebugChecksum]
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Checksum=-699265745
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Checksum=959193746
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[DisAssemblyWindow]
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NumStates=_ 1
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State 1=_ 1
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@ -39,20 +39,6 @@ UseTrigger=1
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TriggerName=main
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LimitSize=0
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ByteLimit=50
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[CallStackLog]
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Enabled=0
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[DriverProfiling]
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Enabled=0
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Mode=1852121147
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Graph=0
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Symbiont=0
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[Log file]
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LoggingEnabled=_ 0
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LogFile=_ ""
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Category=_ 0
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[TermIOLog]
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LoggingEnabled=_ 0
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LogFile=_ ""
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[Stack]
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FillEnabled=0
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OverflowWarningsEnabled=1
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@ -63,11 +49,34 @@ UseTrigger=1
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TriggerName=main
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LimitSize=0
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ByteLimit=50
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[Disassemble mode]
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mode=0
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[Breakpoints]
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Bp0=_ "STD_CODE" "0x08000874" 0 0 0 0 "" 0 "" 0
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Count=1
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[Disassemble mode]
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mode=0
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[Breakpoints2]
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Count=0
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[Log file]
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LoggingEnabled=_ 0
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LogFile=_ ""
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Category=_ 0
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[TermIOLog]
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LoggingEnabled=_ 0
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LogFile=_ ""
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[Aliases]
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Count=0
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SuppressDialog=0
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[CallStack]
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ShowArgs=0
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[Disassembly]
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MixedMode=1
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[JLinkDriver]
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CStepIntDis=_ 0
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[CallStackLog]
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Enabled=0
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[DriverProfiling]
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Enabled=0
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Mode=0
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Graph=0
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Symbiont=0
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Exclusions=
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@ -29,20 +29,20 @@
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</Tab>
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</Tabs>
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<SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-12497-1878</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-2690-2881</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1></Windows>
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<SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-12497-1878</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-2690-2881</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>1</SelectedTab></Wnd1></Windows>
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<Editor>
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<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\usb_desc.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><ActiveTab>1</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
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<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\usb_desc.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>1300</SelStart2><SelEnd2>1300</SelEnd2></Tab><ActiveTab>1</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
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<Positions>
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<Top><Row0><Sizes><Toolbar-0289d6d8><key>iaridepm.enu1</key></Toolbar-0289d6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>727</Bottom><Right>453</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>236979</sizeVertCX><sizeVertCY>723214</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>236</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>238</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>236111</sizeHorzCY><sizeVertCX>135938</sizeVertCX><sizeVertCY>202381</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
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||||
<Top><Row0><Sizes><Toolbar-0297d6d8><key>iaridepm.enu1</key></Toolbar-0297d6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>727</Bottom><Right>453</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>236979</sizeVertCX><sizeVertCY>723214</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>236</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>238</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>236111</sizeHorzCY><sizeVertCX>135938</sizeVertCX><sizeVertCY>202381</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
</Desktop>
|
||||
</Workspace>
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||||
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File diff suppressed because it is too large
Load Diff
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@ -77,7 +77,7 @@
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</option>
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<option>
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<name>OCDownloadVerifyAll</name>
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<state>0</state>
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<state>1</state>
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</option>
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<option>
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<name>OCProductVersion</name>
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@ -85,7 +85,7 @@
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</option>
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<option>
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<name>OCDynDriverList</name>
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<state>GDBSERVER_ID</state>
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<state>JLINK_ID</state>
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</option>
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<option>
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<name>OCLastSavedByProductVersion</name>
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@ -97,7 +97,7 @@
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</option>
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<option>
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<name>UseFlashLoader</name>
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<state>0</state>
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<state>1</state>
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</option>
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||||
<option>
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<name>CLowLevel</name>
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@ -783,7 +783,7 @@
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<option>
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<name>CCJLinkResetList</name>
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<version>6</version>
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<state>5</state>
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<state>7</state>
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||||
</option>
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||||
<option>
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<name>CCJLinkInterfaceCmdLine</name>
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Binary file not shown.
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -90,6 +90,37 @@
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#define BOOT_COM_UART_CHANNEL_INDEX (1)
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/****************************************************************************************
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* F I L E S Y S T E M I N T E R F A C E C O N F I G U R A T I O N
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****************************************************************************************/
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/* The file system interface is selected by setting the BOOT_FILE_SYS_ENABLE configurable
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* to 1. This enables support for firmware updates from a file stored on a locally
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* attached file system such as an SD-card. Note that this interface can be enabled
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* together with one of the remote communication interfaces such as UART, CAN or USB.
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*
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* Set BOOT_FILE_LOGGING_ENABLE to 1 if you would like log messages to be created during
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* a firmware update. The hook function FileFirmwareUpdateLogHook() will be called each
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* time a new string formatted log entry is available. This could be used during testing
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* by outputting the string on UART or to create a log file on the file system itself.
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*
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* Set BOOT_FILE_ERROR_HOOK_ENABLE to 1 if you would like to be informed in case an error
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* occurs during the firmware update. This could for example be used to turn on an error
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* LED to inform the user that something went wrong. Inspecting the log messages provides
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* additional information on the error cause.
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*
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* Set BOOT_FILE_STARTED_HOOK_ENABLE to 1 if you would like to be informed when a new
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* firmware update is started by the bootloader.
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*
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* Set BOOT_FILE_COMPLETED_HOOK_ENABLE to 1 if you would like to be informed when a
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* firmware update is completed by the bootloader.
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*/
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#define BOOT_FILE_SYS_ENABLE (1)
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#define BOOT_FILE_LOGGING_ENABLE (1)
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#define BOOT_FILE_ERROR_HOOK_ENABLE (1)
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#define BOOT_FILE_STARTED_HOOK_ENABLE (1)
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#define BOOT_FILE_COMPLETED_HOOK_ENABLE (1)
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/****************************************************************************************
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* B A C K D O O R E N T R Y C O N F I G U R A T I O N
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****************************************************************************************/
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* Include files
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****************************************************************************************/
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#include "boot.h" /* bootloader generic header */
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#if (BOOT_FILE_LOGGING_ENABLE > 0)
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#include "stm32f10x.h" /* STM32 registers */
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#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
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#endif
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/****************************************************************************************
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@ -200,4 +204,187 @@ void CopServiceHook(void)
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#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
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/****************************************************************************************
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* F I L E S Y S T E M I N T E R F A C E H O O K F U N C T I O N S
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****************************************************************************************/
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#if (BOOT_FILE_SYS_ENABLE > 0)
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/****************************************************************************************
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* Constant data declarations
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****************************************************************************************/
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static const blt_char firmwareFilename[] = "/demoprog_olimex_stm32p103.srec";
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/****************************************************************************************
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* Local data declarations
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****************************************************************************************/
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#if (BOOT_FILE_LOGGING_ENABLE > 0)
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static struct
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{
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FIL handle;
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blt_bool canUse;
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} logfile;
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#endif
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/****************************************************************************************
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** NAME: FileIsFirmwareUpdateRequestedHook
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** PARAMETER: none
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** RETURN VALUE: BLT_TRUE if a firmware update is requested, BLT_FALSE otherwise.
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** DESCRIPTION: Callback that gets called continuously when the bootloader is idle to
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** check whether a firmware update from local file storage should be
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** started. This could for example be when a switch is pressed, when a
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** certain file is found on the local file storage, etc.
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**
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****************************************************************************************/
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blt_bool FileIsFirmwareUpdateRequestedHook(void)
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{
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FILINFO fileInfoObject = { 0 }; /* needs to be zeroed according to f_stat docs */;
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/* Current example implementation looks for a predetermined firmware file on the
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* SD-card. If the SD-card is accessible and the firmware file was found the firmware
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* update is started. When successfully completed, the firmware file is deleted.
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* During the firmware update, progress information is written to a file called
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* bootlog.txt and additionally outputted on UART @57600 bps for debugging purposes.
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*/
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/* check if firmware file is present and SD-card is accessible */
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if (f_stat(firmwareFilename, &fileInfoObject) == FR_OK)
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{
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/* check if the filesize is valid and that it is not a directory */
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if ( (fileInfoObject.fsize > 0) && (!(fileInfoObject.fattrib & AM_DIR)) )
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{
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/* all conditions are met to start a firmware update from local file storage */
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return BLT_TRUE;
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}
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}
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/* still here so no firmware update request is pending */
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return BLT_FALSE;
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} /*** end of FileIsFirmwareUpdateRequestedHook ***/
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/****************************************************************************************
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** NAME: FileGetFirmwareFilenameHook
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** PARAMETER: none
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** RETURN VALUE: valid firmware filename with full path or BLT_NULL.
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** DESCRIPTION: Callback to obtain the filename of the firmware file that should be
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** used during the firmware update from the local file storage. This
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** hook function is called at the beginning of the firmware update from
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** local storage sequence.
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**
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****************************************************************************************/
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const blt_char *FileGetFirmwareFilenameHook(void)
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{
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return firmwareFilename;
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} /*** end of FileGetFirmwareFilenameHook ***/
|
||||
|
||||
|
||||
#if (BOOT_FILE_STARTED_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateStartedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called to inform the application that a firmware
|
||||
** update from local storage just started.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateStartedHook(void)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* create/overwrite the logfile */
|
||||
logfile.canUse = BLT_FALSE;
|
||||
if (f_open(&logfile.handle, "/bootlog.txt", FA_CREATE_ALWAYS | FA_WRITE) == FR_OK)
|
||||
{
|
||||
logfile.canUse = BLT_TRUE;
|
||||
}
|
||||
#endif
|
||||
} /*** end of FileFirmwareUpdateStartedHook ***/
|
||||
#endif /* BOOT_FILE_STARTED_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_COMPLETED_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateCompletedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called to inform the application that a firmware
|
||||
** update was successfully completed.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateCompletedHook(void)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* close the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
/* wait for all logging related transmission to complete */
|
||||
while(USART_GetFlagStatus(USART2, USART_FLAG_TC) == RESET);
|
||||
#endif
|
||||
/* now delete the firmware file from the disk since the update was successful */
|
||||
f_unlink(firmwareFilename);
|
||||
} /*** end of FileFirmwareUpdateCompletedHook ***/
|
||||
#endif /* BOOT_FILE_COMPLETED_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_ERROR_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateErrorHook
|
||||
** PARAMETER: error_code additional information on the error that occurred.
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called in case an error occurred during a firmware
|
||||
** update. Refer to <file.h> for a list of available error codes.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateErrorHook(blt_int8u error_code)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* error detected which stops the firmware update, so close the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
#endif
|
||||
} /*** end of FileFirmwareUpdateErrorHook ***/
|
||||
#endif /* BOOT_FILE_ERROR_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateLogHook
|
||||
** PARAMETER: info_string pointer to a character array with the log entry info.
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called each time new log information becomes
|
||||
** available during a firmware update.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateLogHook(blt_char *info_string)
|
||||
{
|
||||
/* write the string to the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
if (f_puts(info_string, &logfile.handle) < 0)
|
||||
{
|
||||
logfile.canUse = BLT_FALSE;
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
}
|
||||
/* echo all characters in the string on UART */
|
||||
while(*info_string != '\0')
|
||||
{
|
||||
/* write character to transmit holding register */
|
||||
USART_SendData(USART2, *info_string);
|
||||
/* wait for tx holding register to be empty */
|
||||
while(USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);
|
||||
/* point to the next character in the string */
|
||||
info_string++;
|
||||
}
|
||||
} /*** end of FileFirmwareUpdateLogHook ***/
|
||||
#endif /* BOOT_FILE_LOGGING_ENABLE > 0 */
|
||||
|
||||
|
||||
#endif /* BOOT_FILE_SYS_ENABLE > 0 */
|
||||
|
||||
|
||||
/*********************************** end of hooks.c ************************************/
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
<!DOCTYPE CrossStudio_Project_File>
|
||||
<solution Name="stm32f103_crossworks" target="8" version="2">
|
||||
<project Name="openbtl_olimex_stm32p103">
|
||||
<configuration Name="Common" Placement="Flash" Target="STM32F103RB" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_jtag_pad_pre_dr="1" arm_linker_jtag_pad_pre_ir="5" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/STM32/STM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="STM32F103RB;0x20000;0x5000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_target_loader_parameter="8000000" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_only_additional_options="-I./..;-I./../lib/CMSIS/CM3/CoreSupport;-I./../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x;-I./../../../../Source;-I./../../../../Source/ARMCM3_STM32;-I./../../../../Source/ARMCM3_STM32/Crossworks" c_user_include_directories="$(TargetsDir)/STM32/include" gcc_optimization_level="Level 1" link_include_standard_libraries="Yes" linker_keep_symbols="_vectors;EntryFromProg" linker_memory_map_file="$(TargetsDir)/STM32/STM32F103RB_MemoryMap.xml" linker_output_format="srec" linker_printf_enabled="No" linker_printf_width_precision_supported="No" linker_scanf_enabled="No" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" oscillator_frequency="8MHz" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/STM32/propertyGroups.xml" target_get_partname_script="GetPartName()" target_match_partname_script="MatchPartName("$(Target)")" target_reset_script="Reset()"/>
|
||||
<configuration Name="Common" Placement="Flash" Target="STM32F103RB" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_jtag_pad_pre_dr="1" arm_linker_jtag_pad_pre_ir="5" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/STM32/STM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="STM32F103RB;0x20000;0x5000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_target_loader_parameter="8000000" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_only_additional_options="-I./..;-I./../lib/fatfs;-I./../lib/STM32F10x_StdPeriph_Driver;-I./../lib/STM32F10x_StdPeriph_Driver/inc;-I./../lib/CMSIS/CM3/CoreSupport;-I./../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x;-I./../../../../Source;-I./../../../../Source/fatfs/src;-I./../../../../Source/ARMCM3_STM32;-I./../../../../Source/ARMCM3_STM32/Crossworks" c_preprocessor_definitions="USE_STDPERIPH_DRIVER ;VECT_TAB_FLASH;GCC_ARMCM3" c_user_include_directories="$(TargetsDir)/STM32/include" gcc_optimization_level="Level 1" link_include_standard_libraries="Yes" linker_keep_symbols="_vectors;EntryFromProg" linker_memory_map_file="$(TargetsDir)/STM32/STM32F103RB_MemoryMap.xml" linker_output_format="srec" linker_printf_enabled="No" linker_printf_width_precision_supported="No" linker_scanf_enabled="No" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" oscillator_frequency="8MHz" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/STM32/propertyGroups.xml" target_get_partname_script="GetPartName()" target_match_partname_script="MatchPartName("$(Target)")" target_reset_script="Reset()"/>
|
||||
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/STM32/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" arm_target_loader_can_lock_all="No" arm_target_loader_can_lock_range="No" arm_target_loader_can_unlock_all="No" arm_target_loader_can_unlock_range="No" target_reset_script="FLASHReset()"/>
|
||||
<folder Name="Source Files">
|
||||
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
||||
|
|
@ -12,19 +12,32 @@
|
|||
<file file_name="../main.c"/>
|
||||
<file file_name="../stm32f10x.h"/>
|
||||
<folder Name="lib">
|
||||
<folder Name="CoreSupport">
|
||||
<folder Name="cmsis" file_name="">
|
||||
<file file_name="../lib/CMSIS/CM3/CoreSupport/core_cm3.c"/>
|
||||
<file file_name="../lib/CMSIS/CM3/CoreSupport/core_cm3.h"/>
|
||||
</folder>
|
||||
<folder Name="DeviceSupport">
|
||||
<file file_name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"/>
|
||||
<file file_name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c"/>
|
||||
<file file_name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h"/>
|
||||
</folder>
|
||||
<folder Name="fatfs" file_name="">
|
||||
<file file_name="../lib/fatfs/ffconf.h"/>
|
||||
<file file_name="../lib/fatfs/mmc.c"/>
|
||||
</folder>
|
||||
<folder Name="stdperiphlib" file_name="">
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/stm32f10x_conf.h"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_gpio.h"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_spi.h"/>
|
||||
<file file_name="../lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_usart.h"/>
|
||||
</folder>
|
||||
</folder>
|
||||
</folder>
|
||||
</folder>
|
||||
<folder Name="Source">
|
||||
<folder Name="Source" file_name="">
|
||||
<folder Name="ARMCM3_STM32">
|
||||
<folder Name="Crossworks">
|
||||
<file file_name="../../../../Source/ARMCM3_STM32/Crossworks/cstart.s"/>
|
||||
|
|
@ -57,6 +70,15 @@
|
|||
<file file_name="../../../../Source/plausibility.h"/>
|
||||
<file file_name="../../../../Source/xcp.c"/>
|
||||
<file file_name="../../../../Source/xcp.h"/>
|
||||
<folder Name="fatfs" file_name="">
|
||||
<file file_name="../../../../Source/fatfs/src/diskio.h"/>
|
||||
<file file_name="../../../../Source/fatfs/src/ff.c"/>
|
||||
<file file_name="../../../../Source/fatfs/src/ff.h"/>
|
||||
<file file_name="../../../../Source/fatfs/src/integer.h"/>
|
||||
<file file_name="../../../../Source/fatfs/src/option/unicode.c"/>
|
||||
</folder>
|
||||
<file file_name="../../../../Source/file.c"/>
|
||||
<file file_name="../../../../Source/file.h"/>
|
||||
</folder>
|
||||
</folder>
|
||||
<folder Name="System Files">
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
<ProjectSessionItem path="stm32f103_crossworks;openbtl_olimex_stm32p103;Source Files" name="unnamed" />
|
||||
<ProjectSessionItem path="stm32f103_crossworks;openbtl_olimex_stm32p103;Source Files;Demo" name="unnamed" />
|
||||
<ProjectSessionItem path="stm32f103_crossworks;openbtl_olimex_stm32p103;Source Files;Demo;Boot" name="unnamed" />
|
||||
<ProjectSessionItem path="stm32f103_crossworks;openbtl_olimex_stm32p103;Source Files;Source" name="unnamed" />
|
||||
</Project>
|
||||
<Register1>
|
||||
<RegisterWindow openNodes="CPU" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="CPU" decimalNodes="" octalNodes="" asciiNodes="" name="openbtl_olimex_stm32p103" />
|
||||
|
|
@ -55,7 +56,7 @@
|
|||
<Watches active="0" update="Never" />
|
||||
</Watch4>
|
||||
<Files>
|
||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" y="53" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" left="0" selected="1" name="unnamed" top="31" />
|
||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="2" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" y="108" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" left="0" selected="1" name="unnamed" top="59" />
|
||||
</Files>
|
||||
<ARMCrossStudioWindow activeProject="openbtl_olimex_stm32p103" autoConnectTarget="SEGGER J-Link" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||
<ARMCrossStudioWindow activeProject="openbtl_olimex_stm32p103" autoConnectTarget="SEGGER J-Link" debugSearchFileMap="" fileDialogInitialDirectory="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\lib\STM32F10x_StdPeriph_Driver\inc" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||
</session>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,342 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<link rel="File-List" href="Library_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F10x Standard Peripherals Library Drivers</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
||||
|
||||
|
||||
<style>
|
||||
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|
||||
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|
||||
p.MsoNormal, li.MsoNormal, div.MsoNormal
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||||
{mso-style-parent:"";
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||||
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|
||||
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|
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|
||||
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|
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|
||||
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|
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|
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|
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|
||||
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|
||||
<div class="Section1">
|
||||
<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||
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|
||||
<div align="center">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
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|
||||
<tr style="">
|
||||
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|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../Release_Notes.html">Back to Release page</a></span></td>
|
||||
</tr>
|
||||
<tr style="">
|
||||
<td style="padding: 1.5pt;">
|
||||
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||
Notes for STM32F10x Standard Peripherals Library Drivers
|
||||
(StdPeriph_Driver)</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F10x Standard Peripherals Library
|
||||
Drivers update History</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<span style="font-family: "Times New Roman";">
|
||||
</span>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F10x Standard
|
||||
Peripherals Library Drivers update History</span></h2><br>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V3.5.0 / 11-March-2011<o:p></o:p></span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 5 new functions</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">3
|
||||
new functions controlling the counter errors: CAN_GetLastErrorCode(),
|
||||
CAN_GetReceiveErrorCounter() and CAN_GetLSBTransmitErrorCounter().</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to select the CAN operating mode: CAN_OperatingModeRequest().</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to support CAN TT mode: CAN_TTComModeCmd().</span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">CAN_TransmitStatus() function updated to support all CAN transmit intermediate states<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 1 new function:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">I2C_NACKPositionConfig():
|
||||
This function configures the same bit (POS) as I2C_PECPositionConfig()
|
||||
but is intended to be used in I2C mode while I2C_PECPositionConfig() is
|
||||
intended to used in SMBUS mode.</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change the <span style="font-style: italic;">TIM_DMABurstLength_xBytes</span> definitions to <span style="font-style: italic;">TIM_DMABurstLength_xTansfers</span><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
|
||||
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.4.0
|
||||
- 10/15/2010</span></h3>
|
||||
|
||||
<ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||
</ol>
|
||||
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x High-density value line </span>devices.</span></li>
|
||||
</ul>
|
||||
|
||||
<ol style="margin-top: 0in;" start="2" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||
</ol>
|
||||
|
||||
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_bkp.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete BKP registers definition from stm32f10x_bkp.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CAN registers definition from stm32f10x_can.c and use defines within stm32f10x.h file.<br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Update the wording of some defines and Asserts macro. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetFlagStatus()
|
||||
and CAN_ClearFlag() functions: updated to support new flags (were not
|
||||
supported in previous version). These flags are: CAN_FLAG_RQCP0,
|
||||
CAN_FLAG_RQCP1, CAN_FLAG_RQCP2, CAN_FLAG_FMP1, CAN_FLAG_FF1,
|
||||
CAN_FLAG_FOV1, CAN_FLAG_FMP0, CAN_FLAG_FF0, CAN_FLAG_FOV0,
|
||||
CAN_FLAG_WKU, CAN_FLAG_SLAK and CAN_FLAG_LEC. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetITStatus()
|
||||
function: add a check of the interrupt enable bit before getting the
|
||||
status of corresponding interrupt pending bit. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_ClearITPendingBit() function: correct the procedure to clear the interrupt pending bit. <br>
|
||||
</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_crc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CRC registers definition from stm32f10x_crc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dac.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DAC registers definition from stm32f10x_dac.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DBGMCU registers definition from stm32f10x_dbgmcu.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dma.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DMA registers definition from stm32f10x_dma.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new function "void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber);"<br>
|
||||
</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">FLASH functions (Erase and Program) updated to always clear the "PG", "MER" and "PER" bits even in case of TimeOut Error.</span><span style="font-style: italic;"></span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_fsmc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new member "FSMC_AsynchronousWait" in "FSMC_NORSRAMInitTypeDef" structure.</span><span style="font-style: italic;"></span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for TIM6, TIM7 and DAC DMA requests, TIM12 and DAC Triggers / DMA2_Channel5 Interrupt mapping.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_pwr.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete PWR registers definition from stm32f10x_pwr.c and use defines within stm32f10x.h and core_cm3.h files.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rtc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete RTC registers definition from stm32f10x_rtc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_spi.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for I2S Audio Clock frequencies "I2S_AudioFreq_192k".</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c</span></li>
|
||||
<ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for TIM Input Capture Polarity "TIM_ICPolarity_BothEdge".</span></span></li></ul>
|
||||
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.3.0
|
||||
- 04/16/2010</span></h3>
|
||||
|
||||
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
|
||||
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x XL-density </span>devices.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C driver: events description and management enhancement.</span></li></ul>
|
||||
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
|
||||
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">DBGMCU_Config()</span> function: add new values <span style="font-style: italic;">DBGMCU_TIMx_STOP</span> (x: 9..14) for <span style="font-style: italic;">DBGMCU_Periph</span> parameter.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c:
|
||||
updated to support Bank2 of XL-density devices (up to 1MByte of Flash
|
||||
memory). For more details, refer to the description provided within
|
||||
stm32f10x_flash.c file.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for FSMC_NADV pin and TIM9..11,13,14.</span></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c: I2C events description and management enhancement. <br></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">I2C_CheckEvent()</span>
|
||||
function: updated to check whether the last event contains the
|
||||
I2C_EVENT (instead of check whether the last event is equal to
|
||||
I2C_EVENT)<br></span></li></ul><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add
|
||||
detailed description of I2C events and how to manage them using the
|
||||
functions provided by this driver. For more information, refer to
|
||||
stm32f10x_i2c.h and stm32f10x_i2c.c files.</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rcc.h/.c: updated to support TIM9..TIM14 APB clock and reset configuration</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c: updated to support new Timers TIM9..TIM14.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_sdio.h: </span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SDIO_SetSDIOReadWaitMode() function: correct values of SDIO_ReadWaitMode parameter<br>change <br>
|
||||
#define
|
||||
SDIO_ReadWaitMode_CLK
|
||||
((uint32_t)0x00000000)<br> #define
|
||||
SDIO_ReadWaitMode_DATA2
|
||||
((uint32_t)0x00000001)<br>by<br> #define
|
||||
SDIO_ReadWaitMode_CLK
|
||||
((uint32_t)0x00000001)<br> #define
|
||||
SDIO_ReadWaitMode_DATA2
|
||||
((uint32_t)0x00000000)</span></li></ul></ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.2.0
|
||||
- 03/01/2010</span></h3>
|
||||
<ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||
for <b>STM32 Low-density Value line (STM32F100x4/6) and
|
||||
Medium-density Value line (STM32F100x8/B) devices</b>.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Almost
|
||||
peripherals drivers were updated to support Value
|
||||
line devices features</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Drivers limitations fix and enhancements. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||
|
||||
</ul>
|
||||
<ol style="margin-top: 0in;" start="2" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new
|
||||
firmware driver for CEC peripheral: stm32f10x_cec.h and stm32f10x_cec.c</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Timers drivers stm32f10x_tim.h/.c: add support for new General Purpose Timers: TIM15, TIM16 and TIM17.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC driver: add support for new Value peripherals: HDMI-CEC, TIM15, TIM16 and TIM17.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GPIO driver: add new remap parameters for TIM1, TIM15, TIM16, TIM17 and HDMI-CEC: </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM1_DMA, </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM15, GPIO_Remap_TIM16, GPIO_Remap_TIM17, GPIO_Remap_CEC.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">USART
|
||||
driver: add support for Oversampling by 8 mode and onebit method. 2
|
||||
functions has been added: USART_OverSampling8Cmd() and
|
||||
USART_OneBitMethodCmd().<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DAC
|
||||
driver: add new functions handling the DAC under run feature:
|
||||
DAC_ITConfig(), DAC_GetFlagStatus(), DAC_ClearFlag(), DAC_GetITStatus()
|
||||
and DAC_ClearITPendingBit().</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DBGMCU driver: add new parameters for TIM15, TIM16 and TIM17: DBGMCU_TIM15_STOP, DBGMCU_TIM16_STOP, DBGMCU_TIM17_STOP.<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">FLASH
|
||||
driver: the FLASH_EraseOptionBytes() function updated. This is now just
|
||||
erasing the option bytes without modifying the RDP status either
|
||||
enabled or disabled.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">PWR
|
||||
driver: the PWR_EnterSTOPMode() function updated. When woken up from
|
||||
STOP mode, this function resets again the SLEEPDEEP bit in the
|
||||
Cortex-M3 System Control register to allow Sleep mode entering.</span></li>
|
||||
|
||||
|
||||
</ul>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||
enclosed firmware and all the related documentation are not covered by
|
||||
a License Agreement, if you need such License you can contact your
|
||||
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||
<hr align="center" size="2" width="100%"></span></div>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32(<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<p class="MsoNormal"><o:p> </o:p></p>
|
||||
</div>
|
||||
</body></html>
|
||||
|
|
@ -0,0 +1,385 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_GPIO_H
|
||||
#define __STM32F10x_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
|
||||
((PERIPH) == GPIOB) || \
|
||||
((PERIPH) == GPIOC) || \
|
||||
((PERIPH) == GPIOD) || \
|
||||
((PERIPH) == GPIOE) || \
|
||||
((PERIPH) == GPIOF) || \
|
||||
((PERIPH) == GPIOG))
|
||||
|
||||
/**
|
||||
* @brief Output Maximum frequency selection
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Speed_10MHz = 1,
|
||||
GPIO_Speed_2MHz,
|
||||
GPIO_Speed_50MHz
|
||||
}GPIOSpeed_TypeDef;
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
|
||||
((SPEED) == GPIO_Speed_50MHz))
|
||||
|
||||
/**
|
||||
* @brief Configuration Mode enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{ GPIO_Mode_AIN = 0x0,
|
||||
GPIO_Mode_IN_FLOATING = 0x04,
|
||||
GPIO_Mode_IPD = 0x28,
|
||||
GPIO_Mode_IPU = 0x48,
|
||||
GPIO_Mode_Out_OD = 0x14,
|
||||
GPIO_Mode_Out_PP = 0x10,
|
||||
GPIO_Mode_AF_OD = 0x1C,
|
||||
GPIO_Mode_AF_PP = 0x18
|
||||
}GPIOMode_TypeDef;
|
||||
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
|
||||
((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
|
||||
((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
|
||||
((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
|
||||
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_pins_define */
|
||||
|
||||
GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIOSpeed_TypeDef */
|
||||
|
||||
GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIOMode_TypeDef */
|
||||
}GPIO_InitTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Bit_SET and Bit_RESET enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{ Bit_RESET = 0,
|
||||
Bit_SET
|
||||
}BitAction;
|
||||
|
||||
#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pins_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||
#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||
#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||
#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||
#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||
#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||
#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||
#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||
#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||
#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||
#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||
#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||
#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||
#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||
#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||
#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||
#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
||||
|
||||
#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
|
||||
|
||||
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
|
||||
((PIN) == GPIO_Pin_1) || \
|
||||
((PIN) == GPIO_Pin_2) || \
|
||||
((PIN) == GPIO_Pin_3) || \
|
||||
((PIN) == GPIO_Pin_4) || \
|
||||
((PIN) == GPIO_Pin_5) || \
|
||||
((PIN) == GPIO_Pin_6) || \
|
||||
((PIN) == GPIO_Pin_7) || \
|
||||
((PIN) == GPIO_Pin_8) || \
|
||||
((PIN) == GPIO_Pin_9) || \
|
||||
((PIN) == GPIO_Pin_10) || \
|
||||
((PIN) == GPIO_Pin_11) || \
|
||||
((PIN) == GPIO_Pin_12) || \
|
||||
((PIN) == GPIO_Pin_13) || \
|
||||
((PIN) == GPIO_Pin_14) || \
|
||||
((PIN) == GPIO_Pin_15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Remap_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
|
||||
#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
|
||||
#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
|
||||
#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
|
||||
#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
|
||||
#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
|
||||
#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
|
||||
#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
|
||||
#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
|
||||
#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
|
||||
#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
|
||||
#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
|
||||
#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
|
||||
#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
|
||||
#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
|
||||
#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
|
||||
#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
|
||||
#define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
||||
to TIM2 Internal Trigger 1 for calibration
|
||||
(only for Connectivity line devices) */
|
||||
#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
|
||||
|
||||
#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */
|
||||
|
||||
#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
#define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
|
||||
#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */
|
||||
#define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */
|
||||
#define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
||||
only for High density Value line devices) */
|
||||
|
||||
#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
|
||||
((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
|
||||
((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
|
||||
((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
|
||||
((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
|
||||
((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
|
||||
((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
|
||||
((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
|
||||
((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
|
||||
((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
|
||||
((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
|
||||
((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
|
||||
((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
|
||||
((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
|
||||
((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \
|
||||
((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \
|
||||
((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \
|
||||
((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \
|
||||
((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \
|
||||
((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \
|
||||
((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \
|
||||
((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Port_Sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_PortSourceGPIOA ((uint8_t)0x00)
|
||||
#define GPIO_PortSourceGPIOB ((uint8_t)0x01)
|
||||
#define GPIO_PortSourceGPIOC ((uint8_t)0x02)
|
||||
#define GPIO_PortSourceGPIOD ((uint8_t)0x03)
|
||||
#define GPIO_PortSourceGPIOE ((uint8_t)0x04)
|
||||
#define GPIO_PortSourceGPIOF ((uint8_t)0x05)
|
||||
#define GPIO_PortSourceGPIOG ((uint8_t)0x06)
|
||||
#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOE))
|
||||
|
||||
#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOG))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Pin_sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||
|
||||
#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
|
||||
((PINSOURCE) == GPIO_PinSource1) || \
|
||||
((PINSOURCE) == GPIO_PinSource2) || \
|
||||
((PINSOURCE) == GPIO_PinSource3) || \
|
||||
((PINSOURCE) == GPIO_PinSource4) || \
|
||||
((PINSOURCE) == GPIO_PinSource5) || \
|
||||
((PINSOURCE) == GPIO_PinSource6) || \
|
||||
((PINSOURCE) == GPIO_PinSource7) || \
|
||||
((PINSOURCE) == GPIO_PinSource8) || \
|
||||
((PINSOURCE) == GPIO_PinSource9) || \
|
||||
((PINSOURCE) == GPIO_PinSource10) || \
|
||||
((PINSOURCE) == GPIO_PinSource11) || \
|
||||
((PINSOURCE) == GPIO_PinSource12) || \
|
||||
((PINSOURCE) == GPIO_PinSource13) || \
|
||||
((PINSOURCE) == GPIO_PinSource14) || \
|
||||
((PINSOURCE) == GPIO_PinSource15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Ethernet_Media_Interface
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000)
|
||||
#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)
|
||||
|
||||
#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
|
||||
((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_AFIODeInit(void);
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||
void GPIO_EventOutputCmd(FunctionalState NewState);
|
||||
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
|
||||
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_GPIO_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,727 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_rcc.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the RCC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_RCC_H
|
||||
#define __STM32F10x_RCC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RCC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
|
||||
uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
|
||||
uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
|
||||
uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
|
||||
uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
|
||||
}RCC_ClocksTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HSE_configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HSE_OFF ((uint32_t)0x00000000)
|
||||
#define RCC_HSE_ON ((uint32_t)0x00010000)
|
||||
#define RCC_HSE_Bypass ((uint32_t)0x00040000)
|
||||
#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
|
||||
((HSE) == RCC_HSE_Bypass))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_entry_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)
|
||||
|
||||
#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL)
|
||||
#define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)
|
||||
#define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)
|
||||
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||
((SOURCE) == RCC_PLLSource_HSE_Div1) || \
|
||||
((SOURCE) == RCC_PLLSource_HSE_Div2))
|
||||
#else
|
||||
#define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000)
|
||||
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||
((SOURCE) == RCC_PLLSource_PREDIV1))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
#ifndef STM32F10X_CL
|
||||
#define RCC_PLLMul_2 ((uint32_t)0x00000000)
|
||||
#define RCC_PLLMul_3 ((uint32_t)0x00040000)
|
||||
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||
#define RCC_PLLMul_10 ((uint32_t)0x00200000)
|
||||
#define RCC_PLLMul_11 ((uint32_t)0x00240000)
|
||||
#define RCC_PLLMul_12 ((uint32_t)0x00280000)
|
||||
#define RCC_PLLMul_13 ((uint32_t)0x002C0000)
|
||||
#define RCC_PLLMul_14 ((uint32_t)0x00300000)
|
||||
#define RCC_PLLMul_15 ((uint32_t)0x00340000)
|
||||
#define RCC_PLLMul_16 ((uint32_t)0x00380000)
|
||||
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \
|
||||
((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||
((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
|
||||
((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
|
||||
((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
|
||||
((MUL) == RCC_PLLMul_16))
|
||||
|
||||
#else
|
||||
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||
#define RCC_PLLMul_6_5 ((uint32_t)0x00340000)
|
||||
|
||||
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||
((MUL) == RCC_PLLMul_6_5))
|
||||
#endif /* STM32F10X_CL */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PREDIV1_division_factor
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||
#define RCC_PREDIV1_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV1_Div2 ((uint32_t)0x00000001)
|
||||
#define RCC_PREDIV1_Div3 ((uint32_t)0x00000002)
|
||||
#define RCC_PREDIV1_Div4 ((uint32_t)0x00000003)
|
||||
#define RCC_PREDIV1_Div5 ((uint32_t)0x00000004)
|
||||
#define RCC_PREDIV1_Div6 ((uint32_t)0x00000005)
|
||||
#define RCC_PREDIV1_Div7 ((uint32_t)0x00000006)
|
||||
#define RCC_PREDIV1_Div8 ((uint32_t)0x00000007)
|
||||
#define RCC_PREDIV1_Div9 ((uint32_t)0x00000008)
|
||||
#define RCC_PREDIV1_Div10 ((uint32_t)0x00000009)
|
||||
#define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A)
|
||||
#define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B)
|
||||
#define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C)
|
||||
#define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D)
|
||||
#define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E)
|
||||
#define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F)
|
||||
|
||||
#define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16))
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PREDIV1_clock_source
|
||||
* @{
|
||||
*/
|
||||
#ifdef STM32F10X_CL
|
||||
/* PREDIV1 clock source (for STM32 connectivity line devices) */
|
||||
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000)
|
||||
|
||||
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \
|
||||
((SOURCE) == RCC_PREDIV1_Source_PLL2))
|
||||
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
||||
/* PREDIV1 clock source (for STM32 Value line devices) */
|
||||
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||
|
||||
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE))
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
/** @defgroup PREDIV2_division_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PREDIV2_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV2_Div2 ((uint32_t)0x00000010)
|
||||
#define RCC_PREDIV2_Div3 ((uint32_t)0x00000020)
|
||||
#define RCC_PREDIV2_Div4 ((uint32_t)0x00000030)
|
||||
#define RCC_PREDIV2_Div5 ((uint32_t)0x00000040)
|
||||
#define RCC_PREDIV2_Div6 ((uint32_t)0x00000050)
|
||||
#define RCC_PREDIV2_Div7 ((uint32_t)0x00000060)
|
||||
#define RCC_PREDIV2_Div8 ((uint32_t)0x00000070)
|
||||
#define RCC_PREDIV2_Div9 ((uint32_t)0x00000080)
|
||||
#define RCC_PREDIV2_Div10 ((uint32_t)0x00000090)
|
||||
#define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0)
|
||||
#define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0)
|
||||
#define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0)
|
||||
#define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0)
|
||||
#define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0)
|
||||
#define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0)
|
||||
|
||||
#define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PLL2_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLL2Mul_8 ((uint32_t)0x00000600)
|
||||
#define RCC_PLL2Mul_9 ((uint32_t)0x00000700)
|
||||
#define RCC_PLL2Mul_10 ((uint32_t)0x00000800)
|
||||
#define RCC_PLL2Mul_11 ((uint32_t)0x00000900)
|
||||
#define RCC_PLL2Mul_12 ((uint32_t)0x00000A00)
|
||||
#define RCC_PLL2Mul_13 ((uint32_t)0x00000B00)
|
||||
#define RCC_PLL2Mul_14 ((uint32_t)0x00000C00)
|
||||
#define RCC_PLL2Mul_16 ((uint32_t)0x00000E00)
|
||||
#define RCC_PLL2Mul_20 ((uint32_t)0x00000F00)
|
||||
|
||||
#define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \
|
||||
((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \
|
||||
((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \
|
||||
((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \
|
||||
((MUL) == RCC_PLL2Mul_20))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PLL3_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLL3Mul_8 ((uint32_t)0x00006000)
|
||||
#define RCC_PLL3Mul_9 ((uint32_t)0x00007000)
|
||||
#define RCC_PLL3Mul_10 ((uint32_t)0x00008000)
|
||||
#define RCC_PLL3Mul_11 ((uint32_t)0x00009000)
|
||||
#define RCC_PLL3Mul_12 ((uint32_t)0x0000A000)
|
||||
#define RCC_PLL3Mul_13 ((uint32_t)0x0000B000)
|
||||
#define RCC_PLL3Mul_14 ((uint32_t)0x0000C000)
|
||||
#define RCC_PLL3Mul_16 ((uint32_t)0x0000E000)
|
||||
#define RCC_PLL3Mul_20 ((uint32_t)0x0000F000)
|
||||
|
||||
#define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \
|
||||
((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \
|
||||
((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \
|
||||
((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \
|
||||
((MUL) == RCC_PLL3Mul_20))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/** @defgroup System_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
|
||||
#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
|
||||
#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
|
||||
#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_HSE) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_PLLCLK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
|
||||
#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
|
||||
#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
|
||||
#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
|
||||
#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
|
||||
#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
|
||||
#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
|
||||
#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
|
||||
#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
|
||||
((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
|
||||
((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
|
||||
((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
|
||||
((HCLK) == RCC_SYSCLK_Div512))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_APB2_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HCLK_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_HCLK_Div2 ((uint32_t)0x00000400)
|
||||
#define RCC_HCLK_Div4 ((uint32_t)0x00000500)
|
||||
#define RCC_HCLK_Div8 ((uint32_t)0x00000600)
|
||||
#define RCC_HCLK_Div16 ((uint32_t)0x00000700)
|
||||
#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
|
||||
((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
|
||||
((PCLK) == RCC_HCLK_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Interrupt_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_IT_LSIRDY ((uint8_t)0x01)
|
||||
#define RCC_IT_LSERDY ((uint8_t)0x02)
|
||||
#define RCC_IT_HSIRDY ((uint8_t)0x04)
|
||||
#define RCC_IT_HSERDY ((uint8_t)0x08)
|
||||
#define RCC_IT_PLLRDY ((uint8_t)0x10)
|
||||
#define RCC_IT_CSS ((uint8_t)0x80)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))
|
||||
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))
|
||||
#else
|
||||
#define RCC_IT_PLL2RDY ((uint8_t)0x20)
|
||||
#define RCC_IT_PLL3RDY ((uint8_t)0x40)
|
||||
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
|
||||
((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY))
|
||||
#define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00)
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
/** @defgroup USB_Device_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)
|
||||
#define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \
|
||||
((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#else
|
||||
/** @defgroup USB_OTG_FS_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00)
|
||||
#define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \
|
||||
((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
/** @defgroup I2S2_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00)
|
||||
#define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \
|
||||
((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S3_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00)
|
||||
#define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \
|
||||
((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/** @defgroup ADC_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PCLK2_Div2 ((uint32_t)0x00000000)
|
||||
#define RCC_PCLK2_Div4 ((uint32_t)0x00004000)
|
||||
#define RCC_PCLK2_Div6 ((uint32_t)0x00008000)
|
||||
#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
|
||||
#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \
|
||||
((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup LSE_configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_LSE_OFF ((uint8_t)0x00)
|
||||
#define RCC_LSE_ON ((uint8_t)0x01)
|
||||
#define RCC_LSE_Bypass ((uint8_t)0x04)
|
||||
#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
|
||||
((LSE) == RCC_LSE_Bypass))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RTC_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
|
||||
#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
|
||||
#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)
|
||||
#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_LSI) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_HSE_Div128))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
|
||||
#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
|
||||
#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
|
||||
#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
|
||||
#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
|
||||
#define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
|
||||
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))
|
||||
#else
|
||||
#define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
|
||||
#define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
|
||||
#define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
|
||||
#define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
|
||||
|
||||
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00))
|
||||
#define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00))
|
||||
#endif /* STM32F10X_CL */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB2_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
|
||||
#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
|
||||
#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
|
||||
#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
|
||||
#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
|
||||
#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
|
||||
#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
|
||||
#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
|
||||
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
|
||||
#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
|
||||
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
|
||||
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
|
||||
#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
|
||||
#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
|
||||
#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
|
||||
#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000)
|
||||
#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000)
|
||||
#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000)
|
||||
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)
|
||||
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)
|
||||
#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000)
|
||||
|
||||
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
|
||||
#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
|
||||
#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
|
||||
#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
|
||||
#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
|
||||
#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
|
||||
#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
|
||||
#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
|
||||
#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
|
||||
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
|
||||
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
|
||||
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
|
||||
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
|
||||
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
|
||||
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
|
||||
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
|
||||
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
|
||||
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
|
||||
#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
|
||||
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
|
||||
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
|
||||
#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
|
||||
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
|
||||
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
|
||||
#define RCC_APB1Periph_CEC ((uint32_t)0x40000000)
|
||||
|
||||
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Clock_source_to_output_on_MCO_pin
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_MCO_NoClock ((uint8_t)0x00)
|
||||
#define RCC_MCO_SYSCLK ((uint8_t)0x04)
|
||||
#define RCC_MCO_HSI ((uint8_t)0x05)
|
||||
#define RCC_MCO_HSE ((uint8_t)0x06)
|
||||
#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||
((MCO) == RCC_MCO_PLLCLK_Div2))
|
||||
#else
|
||||
#define RCC_MCO_PLL2CLK ((uint8_t)0x08)
|
||||
#define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09)
|
||||
#define RCC_MCO_XT1 ((uint8_t)0x0A)
|
||||
#define RCC_MCO_PLL3CLK ((uint8_t)0x0B)
|
||||
|
||||
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||
((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \
|
||||
((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \
|
||||
((MCO) == RCC_MCO_PLL3CLK))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
|
||||
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
|
||||
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
|
||||
#define RCC_FLAG_LSERDY ((uint8_t)0x41)
|
||||
#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
|
||||
#define RCC_FLAG_PINRST ((uint8_t)0x7A)
|
||||
#define RCC_FLAG_PORRST ((uint8_t)0x7B)
|
||||
#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
|
||||
#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
|
||||
#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
|
||||
#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_LPWRRST))
|
||||
#else
|
||||
#define RCC_FLAG_PLL2RDY ((uint8_t)0x3B)
|
||||
#define RCC_FLAG_PLL3RDY ((uint8_t)0x3D)
|
||||
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \
|
||||
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_LPWRRST))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void RCC_DeInit(void);
|
||||
void RCC_HSEConfig(uint32_t RCC_HSE);
|
||||
ErrorStatus RCC_WaitForHSEStartUp(void);
|
||||
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
|
||||
void RCC_HSICmd(FunctionalState NewState);
|
||||
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
|
||||
void RCC_PLLCmd(FunctionalState NewState);
|
||||
|
||||
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||
void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div);
|
||||
#endif
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div);
|
||||
void RCC_PLL2Config(uint32_t RCC_PLL2Mul);
|
||||
void RCC_PLL2Cmd(FunctionalState NewState);
|
||||
void RCC_PLL3Config(uint32_t RCC_PLL3Mul);
|
||||
void RCC_PLL3Cmd(FunctionalState NewState);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
|
||||
uint8_t RCC_GetSYSCLKSource(void);
|
||||
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
|
||||
void RCC_PCLK1Config(uint32_t RCC_HCLK);
|
||||
void RCC_PCLK2Config(uint32_t RCC_HCLK);
|
||||
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
|
||||
#else
|
||||
void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource);
|
||||
void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_LSEConfig(uint8_t RCC_LSE);
|
||||
void RCC_LSICmd(FunctionalState NewState);
|
||||
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
|
||||
void RCC_RTCCLKCmd(FunctionalState NewState);
|
||||
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
|
||||
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_BackupResetCmd(FunctionalState NewState);
|
||||
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
|
||||
void RCC_MCOConfig(uint8_t RCC_MCO);
|
||||
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
|
||||
void RCC_ClearFlag(void);
|
||||
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
|
||||
void RCC_ClearITPendingBit(uint8_t RCC_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_RCC_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,487 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the SPI firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_SPI_H
|
||||
#define __STM32F10x_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
||||
This parameter can be a value of @ref SPI_data_direction */
|
||||
|
||||
uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_mode */
|
||||
|
||||
uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
|
||||
uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
|
||||
}SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2S Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
|
||||
This parameter can be a value of @ref I2S_Mode */
|
||||
|
||||
uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Standard */
|
||||
|
||||
uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Data_Format */
|
||||
|
||||
uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
||||
This parameter can be a value of @ref I2S_MCLK_Output */
|
||||
|
||||
uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Audio_Frequency */
|
||||
|
||||
uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
|
||||
This parameter can be a value of @ref I2S_Clock_Polarity */
|
||||
}I2S_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
|
||||
((PERIPH) == SPI2) || \
|
||||
((PERIPH) == SPI3))
|
||||
|
||||
#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
|
||||
((PERIPH) == SPI3))
|
||||
|
||||
/** @defgroup SPI_data_direction
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
|
||||
#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
|
||||
#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
|
||||
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
|
||||
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
||||
((MODE) == SPI_Direction_2Lines_RxOnly) || \
|
||||
((MODE) == SPI_Direction_1Line_Rx) || \
|
||||
((MODE) == SPI_Direction_1Line_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Mode_Master ((uint16_t)0x0104)
|
||||
#define SPI_Mode_Slave ((uint16_t)0x0000)
|
||||
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
||||
((MODE) == SPI_Mode_Slave))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_data_size
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_DataSize_16b ((uint16_t)0x0800)
|
||||
#define SPI_DataSize_8b ((uint16_t)0x0000)
|
||||
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
||||
((DATASIZE) == SPI_DataSize_8b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPOL_Low ((uint16_t)0x0000)
|
||||
#define SPI_CPOL_High ((uint16_t)0x0002)
|
||||
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
||||
((CPOL) == SPI_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define SPI_CPHA_2Edge ((uint16_t)0x0001)
|
||||
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
||||
((CPHA) == SPI_CPHA_2Edge))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSS_Soft ((uint16_t)0x0200)
|
||||
#define SPI_NSS_Hard ((uint16_t)0x0000)
|
||||
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
|
||||
((NSS) == SPI_NSS_Hard))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
|
||||
#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
|
||||
#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
|
||||
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
|
||||
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
|
||||
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
|
||||
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
|
||||
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_256))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_FirstBit_MSB ((uint16_t)0x0000)
|
||||
#define SPI_FirstBit_LSB ((uint16_t)0x0080)
|
||||
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
|
||||
((BIT) == SPI_FirstBit_LSB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_Mode_SlaveTx ((uint16_t)0x0000)
|
||||
#define I2S_Mode_SlaveRx ((uint16_t)0x0100)
|
||||
#define I2S_Mode_MasterTx ((uint16_t)0x0200)
|
||||
#define I2S_Mode_MasterRx ((uint16_t)0x0300)
|
||||
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
|
||||
((MODE) == I2S_Mode_SlaveRx) || \
|
||||
((MODE) == I2S_Mode_MasterTx) || \
|
||||
((MODE) == I2S_Mode_MasterRx) )
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Standard
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_Standard_Phillips ((uint16_t)0x0000)
|
||||
#define I2S_Standard_MSB ((uint16_t)0x0010)
|
||||
#define I2S_Standard_LSB ((uint16_t)0x0020)
|
||||
#define I2S_Standard_PCMShort ((uint16_t)0x0030)
|
||||
#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
|
||||
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
|
||||
((STANDARD) == I2S_Standard_MSB) || \
|
||||
((STANDARD) == I2S_Standard_LSB) || \
|
||||
((STANDARD) == I2S_Standard_PCMShort) || \
|
||||
((STANDARD) == I2S_Standard_PCMLong))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Data_Format
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_DataFormat_16b ((uint16_t)0x0000)
|
||||
#define I2S_DataFormat_16bextended ((uint16_t)0x0001)
|
||||
#define I2S_DataFormat_24b ((uint16_t)0x0003)
|
||||
#define I2S_DataFormat_32b ((uint16_t)0x0005)
|
||||
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
|
||||
((FORMAT) == I2S_DataFormat_16bextended) || \
|
||||
((FORMAT) == I2S_DataFormat_24b) || \
|
||||
((FORMAT) == I2S_DataFormat_32b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_MCLK_Output
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
|
||||
#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
|
||||
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
|
||||
((OUTPUT) == I2S_MCLKOutput_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Audio_Frequency
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_AudioFreq_192k ((uint32_t)192000)
|
||||
#define I2S_AudioFreq_96k ((uint32_t)96000)
|
||||
#define I2S_AudioFreq_48k ((uint32_t)48000)
|
||||
#define I2S_AudioFreq_44k ((uint32_t)44100)
|
||||
#define I2S_AudioFreq_32k ((uint32_t)32000)
|
||||
#define I2S_AudioFreq_22k ((uint32_t)22050)
|
||||
#define I2S_AudioFreq_16k ((uint32_t)16000)
|
||||
#define I2S_AudioFreq_11k ((uint32_t)11025)
|
||||
#define I2S_AudioFreq_8k ((uint32_t)8000)
|
||||
#define I2S_AudioFreq_Default ((uint32_t)2)
|
||||
|
||||
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
|
||||
((FREQ) <= I2S_AudioFreq_192k)) || \
|
||||
((FREQ) == I2S_AudioFreq_Default))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_CPOL_Low ((uint16_t)0x0000)
|
||||
#define I2S_CPOL_High ((uint16_t)0x0008)
|
||||
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
|
||||
((CPOL) == I2S_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_DMA_transfer_requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
|
||||
#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
|
||||
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_NSS_internal_software_management
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
|
||||
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
|
||||
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
|
||||
((INTERNAL) == SPI_NSSInternalSoft_Reset))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Transmit_Receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CRC_Tx ((uint8_t)0x00)
|
||||
#define SPI_CRC_Rx ((uint8_t)0x01)
|
||||
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_direction_transmit_receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
|
||||
#define SPI_Direction_Tx ((uint16_t)0x4000)
|
||||
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
|
||||
((DIRECTION) == SPI_Direction_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_IT_TXE ((uint8_t)0x71)
|
||||
#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
|
||||
#define SPI_I2S_IT_ERR ((uint8_t)0x50)
|
||||
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
|
||||
((IT) == SPI_I2S_IT_RXNE) || \
|
||||
((IT) == SPI_I2S_IT_ERR))
|
||||
#define SPI_I2S_IT_OVR ((uint8_t)0x56)
|
||||
#define SPI_IT_MODF ((uint8_t)0x55)
|
||||
#define SPI_IT_CRCERR ((uint8_t)0x54)
|
||||
#define I2S_IT_UDR ((uint8_t)0x53)
|
||||
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
|
||||
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
|
||||
((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
|
||||
((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
|
||||
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
|
||||
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
|
||||
#define I2S_FLAG_UDR ((uint16_t)0x0008)
|
||||
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
|
||||
#define SPI_FLAG_MODF ((uint16_t)0x0020)
|
||||
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
|
||||
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
|
||||
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
|
||||
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
|
||||
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
|
||||
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
|
||||
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_polynomial
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
||||
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
||||
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
|
||||
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
|
||||
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
||||
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
||||
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32F10x_SPI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,412 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_usart.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the USART
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_USART_H
|
||||
#define __STM32F10x_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief USART Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
- IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
|
||||
- FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
|
||||
|
||||
uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USART_Word_Length */
|
||||
|
||||
uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref USART_Stop_Bits */
|
||||
|
||||
uint16_t USART_Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref USART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Mode */
|
||||
|
||||
uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
|
||||
or disabled.
|
||||
This parameter can be a value of @ref USART_Hardware_Flow_Control */
|
||||
} USART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USART Clock Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Clock */
|
||||
|
||||
uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
|
||||
This parameter can be a value of @ref USART_Clock_Polarity */
|
||||
|
||||
uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
|
||||
This parameter can be a value of @ref USART_Clock_Phase */
|
||||
|
||||
uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||
This parameter can be a value of @ref USART_Last_Bit */
|
||||
} USART_ClockInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3) || \
|
||||
((PERIPH) == UART4) || \
|
||||
((PERIPH) == UART5))
|
||||
|
||||
#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3))
|
||||
|
||||
#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3) || \
|
||||
((PERIPH) == UART4))
|
||||
/** @defgroup USART_Word_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WordLength_8b ((uint16_t)0x0000)
|
||||
#define USART_WordLength_9b ((uint16_t)0x1000)
|
||||
|
||||
#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
|
||||
((LENGTH) == USART_WordLength_9b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Stop_Bits
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_StopBits_1 ((uint16_t)0x0000)
|
||||
#define USART_StopBits_0_5 ((uint16_t)0x1000)
|
||||
#define USART_StopBits_2 ((uint16_t)0x2000)
|
||||
#define USART_StopBits_1_5 ((uint16_t)0x3000)
|
||||
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
|
||||
((STOPBITS) == USART_StopBits_0_5) || \
|
||||
((STOPBITS) == USART_StopBits_2) || \
|
||||
((STOPBITS) == USART_StopBits_1_5))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Parity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Parity_No ((uint16_t)0x0000)
|
||||
#define USART_Parity_Even ((uint16_t)0x0400)
|
||||
#define USART_Parity_Odd ((uint16_t)0x0600)
|
||||
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
|
||||
((PARITY) == USART_Parity_Even) || \
|
||||
((PARITY) == USART_Parity_Odd))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Mode_Rx ((uint16_t)0x0004)
|
||||
#define USART_Mode_Tx ((uint16_t)0x0008)
|
||||
#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Hardware_Flow_Control
|
||||
* @{
|
||||
*/
|
||||
#define USART_HardwareFlowControl_None ((uint16_t)0x0000)
|
||||
#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
|
||||
#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
|
||||
#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
|
||||
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||
(((CONTROL) == USART_HardwareFlowControl_None) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_CTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock
|
||||
* @{
|
||||
*/
|
||||
#define USART_Clock_Disable ((uint16_t)0x0000)
|
||||
#define USART_Clock_Enable ((uint16_t)0x0800)
|
||||
#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
|
||||
((CLOCK) == USART_Clock_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPOL_Low ((uint16_t)0x0000)
|
||||
#define USART_CPOL_High ((uint16_t)0x0400)
|
||||
#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define USART_CPHA_2Edge ((uint16_t)0x0200)
|
||||
#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Last_Bit
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LastBit_Disable ((uint16_t)0x0000)
|
||||
#define USART_LastBit_Enable ((uint16_t)0x0100)
|
||||
#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
|
||||
((LASTBIT) == USART_LastBit_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Interrupt_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IT_PE ((uint16_t)0x0028)
|
||||
#define USART_IT_TXE ((uint16_t)0x0727)
|
||||
#define USART_IT_TC ((uint16_t)0x0626)
|
||||
#define USART_IT_RXNE ((uint16_t)0x0525)
|
||||
#define USART_IT_IDLE ((uint16_t)0x0424)
|
||||
#define USART_IT_LBD ((uint16_t)0x0846)
|
||||
#define USART_IT_CTS ((uint16_t)0x096A)
|
||||
#define USART_IT_ERR ((uint16_t)0x0060)
|
||||
#define USART_IT_ORE ((uint16_t)0x0360)
|
||||
#define USART_IT_NE ((uint16_t)0x0260)
|
||||
#define USART_IT_FE ((uint16_t)0x0160)
|
||||
#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
|
||||
#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
|
||||
((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
|
||||
#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_DMA_Requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_DMAReq_Tx ((uint16_t)0x0080)
|
||||
#define USART_DMAReq_Rx ((uint16_t)0x0040)
|
||||
#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_WakeUp_methods
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WakeUp_IdleLine ((uint16_t)0x0000)
|
||||
#define USART_WakeUp_AddressMark ((uint16_t)0x0800)
|
||||
#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
|
||||
((WAKEUP) == USART_WakeUp_AddressMark))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LIN_Break_Detection_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
|
||||
#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
|
||||
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
|
||||
(((LENGTH) == USART_LINBreakDetectLength_10b) || \
|
||||
((LENGTH) == USART_LINBreakDetectLength_11b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_IrDA_Low_Power
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IrDAMode_LowPower ((uint16_t)0x0004)
|
||||
#define USART_IrDAMode_Normal ((uint16_t)0x0000)
|
||||
#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
|
||||
((MODE) == USART_IrDAMode_Normal))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Flags
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_FLAG_CTS ((uint16_t)0x0200)
|
||||
#define USART_FLAG_LBD ((uint16_t)0x0100)
|
||||
#define USART_FLAG_TXE ((uint16_t)0x0080)
|
||||
#define USART_FLAG_TC ((uint16_t)0x0040)
|
||||
#define USART_FLAG_RXNE ((uint16_t)0x0020)
|
||||
#define USART_FLAG_IDLE ((uint16_t)0x0010)
|
||||
#define USART_FLAG_ORE ((uint16_t)0x0008)
|
||||
#define USART_FLAG_NE ((uint16_t)0x0004)
|
||||
#define USART_FLAG_FE ((uint16_t)0x0002)
|
||||
#define USART_FLAG_PE ((uint16_t)0x0001)
|
||||
#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
|
||||
((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
|
||||
((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
|
||||
((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
|
||||
((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
|
||||
|
||||
#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
||||
#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
|
||||
((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
|
||||
|| ((USART_FLAG) != USART_FLAG_CTS))
|
||||
#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
|
||||
#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
|
||||
#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void USART_DeInit(USART_TypeDef* USARTx);
|
||||
void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
|
||||
void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
|
||||
void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
|
||||
void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
|
||||
void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
|
||||
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
|
||||
uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
|
||||
void USART_SendBreak(USART_TypeDef* USARTx);
|
||||
void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
|
||||
void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
|
||||
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
|
||||
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_USART_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,650 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file provides all the GPIO firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_gpio.h"
|
||||
#include "stm32f10x_rcc.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO
|
||||
* @brief GPIO driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* ------------ RCC registers bit address in the alias region ----------------*/
|
||||
#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
|
||||
|
||||
/* --- EVENTCR Register -----*/
|
||||
|
||||
/* Alias word address of EVOE bit */
|
||||
#define EVCR_OFFSET (AFIO_OFFSET + 0x00)
|
||||
#define EVOE_BitNumber ((uint8_t)0x07)
|
||||
#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
|
||||
|
||||
|
||||
/* --- MAPR Register ---*/
|
||||
/* Alias word address of MII_RMII_SEL bit */
|
||||
#define MAPR_OFFSET (AFIO_OFFSET + 0x04)
|
||||
#define MII_RMII_SEL_BitNumber ((u8)0x17)
|
||||
#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
|
||||
|
||||
|
||||
#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
|
||||
#define LSB_MASK ((uint16_t)0xFFFF)
|
||||
#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
|
||||
#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
|
||||
#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
|
||||
#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the GPIOx peripheral registers to their default reset values.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
if (GPIOx == GPIOA)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOB)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOC)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOD)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOE)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOF)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (GPIOx == GPIOG)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the Alternate Functions (remap, event control
|
||||
* and EXTI configuration) registers to their default reset values.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_AFIODeInit(void)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the GPIOx peripheral according to the specified
|
||||
* parameters in the GPIO_InitStruct.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
|
||||
* contains the configuration information for the specified GPIO peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
|
||||
uint32_t tmpreg = 0x00, pinmask = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
|
||||
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
|
||||
|
||||
/*---------------------------- GPIO Mode Configuration -----------------------*/
|
||||
currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
|
||||
if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
|
||||
/* Output mode */
|
||||
currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
|
||||
}
|
||||
/*---------------------------- GPIO CRL Configuration ------------------------*/
|
||||
/* Configure the eight low port pins */
|
||||
if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
|
||||
{
|
||||
tmpreg = GPIOx->CRL;
|
||||
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
||||
{
|
||||
pos = ((uint32_t)0x01) << pinpos;
|
||||
/* Get the port pins position */
|
||||
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
|
||||
if (currentpin == pos)
|
||||
{
|
||||
pos = pinpos << 2;
|
||||
/* Clear the corresponding low control register bits */
|
||||
pinmask = ((uint32_t)0x0F) << pos;
|
||||
tmpreg &= ~pinmask;
|
||||
/* Write the mode configuration in the corresponding bits */
|
||||
tmpreg |= (currentmode << pos);
|
||||
/* Reset the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
||||
{
|
||||
GPIOx->BRR = (((uint32_t)0x01) << pinpos);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
||||
{
|
||||
GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
GPIOx->CRL = tmpreg;
|
||||
}
|
||||
/*---------------------------- GPIO CRH Configuration ------------------------*/
|
||||
/* Configure the eight high port pins */
|
||||
if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
|
||||
{
|
||||
tmpreg = GPIOx->CRH;
|
||||
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
||||
{
|
||||
pos = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
/* Get the port pins position */
|
||||
currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
|
||||
if (currentpin == pos)
|
||||
{
|
||||
pos = pinpos << 2;
|
||||
/* Clear the corresponding high control register bits */
|
||||
pinmask = ((uint32_t)0x0F) << pos;
|
||||
tmpreg &= ~pinmask;
|
||||
/* Write the mode configuration in the corresponding bits */
|
||||
tmpreg |= (currentmode << pos);
|
||||
/* Reset the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
||||
{
|
||||
GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
}
|
||||
/* Set the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
||||
{
|
||||
GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
}
|
||||
}
|
||||
}
|
||||
GPIOx->CRH = tmpreg;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each GPIO_InitStruct member with its default value.
|
||||
* @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
|
||||
* be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
/* Reset GPIO init structure parameters values */
|
||||
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
|
||||
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified input port pin.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The input port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO input data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval GPIO input data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->IDR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified output data port bit.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The output port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO output data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval GPIO output data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->ODR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BRR = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets or clears the selected data port bit.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be one of GPIO_Pin_x where x can be (0..15).
|
||||
* @param BitVal: specifies the value to be written to the selected bit.
|
||||
* This parameter can be one of the BitAction enum values:
|
||||
* @arg Bit_RESET: to clear the port pin
|
||||
* @arg Bit_SET: to set the port pin
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
assert_param(IS_GPIO_BIT_ACTION(BitVal));
|
||||
|
||||
if (BitVal != Bit_RESET)
|
||||
{
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOx->BRR = GPIO_Pin;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes data to the specified GPIO data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param PortVal: specifies the value to be written to the port output data register.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
GPIOx->ODR = PortVal;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Locks GPIO Pins configuration registers.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint32_t tmp = 0x00010000;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
tmp |= GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Reset LCKK bit */
|
||||
GPIOx->LCKR = GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the GPIO pin used as Event output.
|
||||
* @param GPIO_PortSource: selects the GPIO port to be used as source
|
||||
* for Event output.
|
||||
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
|
||||
* @param GPIO_PinSource: specifies the pin for the Event output.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
||||
{
|
||||
uint32_t tmpreg = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
|
||||
tmpreg = AFIO->EVCR;
|
||||
/* Clear the PORT[6:4] and PIN[3:0] bits */
|
||||
tmpreg &= EVCR_PORTPINCONFIG_MASK;
|
||||
tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
|
||||
tmpreg |= GPIO_PinSource;
|
||||
AFIO->EVCR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Event Output.
|
||||
* @param NewState: new state of the Event output.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EventOutputCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
*(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Changes the mapping of the specified pin.
|
||||
* @param GPIO_Remap: selects the pin to remap.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping
|
||||
* @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping
|
||||
* @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping
|
||||
* @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping
|
||||
* @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration
|
||||
* @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping
|
||||
* @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping
|
||||
* @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping
|
||||
* @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping
|
||||
* @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
|
||||
* @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled
|
||||
* @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)
|
||||
* @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
|
||||
* When the SPI3/I2S3 is remapped using this function, the SWJ is configured
|
||||
* to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST.
|
||||
* @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
||||
* to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
|
||||
* If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to
|
||||
* Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
|
||||
* @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
|
||||
* @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices)
|
||||
* @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
||||
* only for High density Value line devices)
|
||||
* @param NewState: new state of the port pin remapping.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
|
||||
{
|
||||
uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_REMAP(GPIO_Remap));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
||||
{
|
||||
tmpreg = AFIO->MAPR2;
|
||||
}
|
||||
else
|
||||
{
|
||||
tmpreg = AFIO->MAPR;
|
||||
}
|
||||
|
||||
tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
|
||||
tmp = GPIO_Remap & LSB_MASK;
|
||||
|
||||
if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
|
||||
{
|
||||
tmpreg &= DBGAFR_SWJCFG_MASK;
|
||||
AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
|
||||
{
|
||||
tmp1 = ((uint32_t)0x03) << tmpmask;
|
||||
tmpreg &= ~tmp1;
|
||||
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
|
||||
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
|
||||
}
|
||||
|
||||
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
||||
{
|
||||
AFIO->MAPR2 = tmpreg;
|
||||
}
|
||||
else
|
||||
{
|
||||
AFIO->MAPR = tmpreg;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the GPIO pin used as EXTI Line.
|
||||
* @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
|
||||
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
|
||||
* @param GPIO_PinSource: specifies the EXTI line to be configured.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
||||
{
|
||||
uint32_t tmp = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
|
||||
tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
|
||||
AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
|
||||
AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the Ethernet media interface.
|
||||
* @note This function applies only to STM32 Connectivity line devices.
|
||||
* @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPIO_ETH_MediaInterface_MII: MII mode
|
||||
* @arg GPIO_ETH_MediaInterface_RMII: RMII mode
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
|
||||
{
|
||||
assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
|
||||
|
||||
/* Configure MII_RMII selection bit */
|
||||
*(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,908 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_spi.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file provides all the SPI firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_spi.h"
|
||||
#include "stm32f10x_rcc.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI
|
||||
* @brief SPI driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SPI_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* SPI SPE mask */
|
||||
#define CR1_SPE_Set ((uint16_t)0x0040)
|
||||
#define CR1_SPE_Reset ((uint16_t)0xFFBF)
|
||||
|
||||
/* I2S I2SE mask */
|
||||
#define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
|
||||
#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
|
||||
|
||||
/* SPI CRCNext mask */
|
||||
#define CR1_CRCNext_Set ((uint16_t)0x1000)
|
||||
|
||||
/* SPI CRCEN mask */
|
||||
#define CR1_CRCEN_Set ((uint16_t)0x2000)
|
||||
#define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
|
||||
|
||||
/* SPI SSOE mask */
|
||||
#define CR2_SSOE_Set ((uint16_t)0x0004)
|
||||
#define CR2_SSOE_Reset ((uint16_t)0xFFFB)
|
||||
|
||||
/* SPI registers Masks */
|
||||
#define CR1_CLEAR_Mask ((uint16_t)0x3040)
|
||||
#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
|
||||
|
||||
/* SPI or I2S mode selection masks */
|
||||
#define SPI_Mode_Select ((uint16_t)0xF7FF)
|
||||
#define I2S_Mode_Select ((uint16_t)0x0800)
|
||||
|
||||
/* I2S clock source selection masks */
|
||||
#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
|
||||
#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
|
||||
#define I2S_MUL_MASK ((uint32_t)(0x0000F000))
|
||||
#define I2S_DIV_MASK ((uint32_t)(0x000000F0))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the SPIx peripheral registers to their default
|
||||
* reset values (Affects also the I2Ss).
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
if (SPIx == SPI1)
|
||||
{
|
||||
/* Enable SPI1 reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
|
||||
/* Release SPI1 from reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
|
||||
}
|
||||
else if (SPIx == SPI2)
|
||||
{
|
||||
/* Enable SPI2 reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
/* Release SPI2 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (SPIx == SPI3)
|
||||
{
|
||||
/* Enable SPI3 reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
|
||||
/* Release SPI3 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPIx peripheral according to the specified
|
||||
* parameters in the SPI_InitStruct.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
uint16_t tmpreg = 0;
|
||||
|
||||
/* check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Check the SPI parameters */
|
||||
assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
|
||||
assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
|
||||
assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
|
||||
assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
|
||||
assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
|
||||
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
|
||||
assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
|
||||
assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
|
||||
|
||||
/*---------------------------- SPIx CR1 Configuration ------------------------*/
|
||||
/* Get the SPIx CR1 value */
|
||||
tmpreg = SPIx->CR1;
|
||||
/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
|
||||
tmpreg &= CR1_CLEAR_Mask;
|
||||
/* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
|
||||
master/salve mode, CPOL and CPHA */
|
||||
/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
|
||||
/* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
|
||||
/* Set LSBFirst bit according to SPI_FirstBit value */
|
||||
/* Set BR bits according to SPI_BaudRatePrescaler value */
|
||||
/* Set CPOL bit according to SPI_CPOL value */
|
||||
/* Set CPHA bit according to SPI_CPHA value */
|
||||
tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
|
||||
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
|
||||
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
|
||||
/* Write to SPIx CR1 */
|
||||
SPIx->CR1 = tmpreg;
|
||||
|
||||
/* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
|
||||
SPIx->I2SCFGR &= SPI_Mode_Select;
|
||||
|
||||
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
|
||||
/* Write to SPIx CRCPOLY */
|
||||
SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPIx peripheral according to the specified
|
||||
* parameters in the I2S_InitStruct.
|
||||
* @param SPIx: where x can be 2 or 3 to select the SPI peripheral
|
||||
* (configured in I2S mode).
|
||||
* @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SPI peripheral
|
||||
* configured in I2S mode.
|
||||
* @note
|
||||
* The function calculates the optimal prescaler needed to obtain the most
|
||||
* accurate audio frequency (depending on the I2S clock source, the PLL values
|
||||
* and the product configuration). But in case the prescaler value is greater
|
||||
* than 511, the default value (0x02) will be configured instead. *
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
|
||||
{
|
||||
uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
|
||||
uint32_t tmp = 0;
|
||||
RCC_ClocksTypeDef RCC_Clocks;
|
||||
uint32_t sourceclock = 0;
|
||||
|
||||
/* Check the I2S parameters */
|
||||
assert_param(IS_SPI_23_PERIPH(SPIx));
|
||||
assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
|
||||
assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
|
||||
assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
|
||||
assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
|
||||
assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
|
||||
assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
|
||||
|
||||
/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
|
||||
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
||||
SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
|
||||
SPIx->I2SPR = 0x0002;
|
||||
|
||||
/* Get the I2SCFGR register value */
|
||||
tmpreg = SPIx->I2SCFGR;
|
||||
|
||||
/* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
|
||||
if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
|
||||
{
|
||||
i2sodd = (uint16_t)0;
|
||||
i2sdiv = (uint16_t)2;
|
||||
}
|
||||
/* If the requested audio frequency is not the default, compute the prescaler */
|
||||
else
|
||||
{
|
||||
/* Check the frame length (For the Prescaler computing) */
|
||||
if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
|
||||
{
|
||||
/* Packet length is 16 bits */
|
||||
packetlength = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Packet length is 32 bits */
|
||||
packetlength = 2;
|
||||
}
|
||||
|
||||
/* Get the I2S clock source mask depending on the peripheral number */
|
||||
if(((uint32_t)SPIx) == SPI2_BASE)
|
||||
{
|
||||
/* The mask is relative to I2S2 */
|
||||
tmp = I2S2_CLOCK_SRC;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The mask is relative to I2S3 */
|
||||
tmp = I2S3_CLOCK_SRC;
|
||||
}
|
||||
|
||||
/* Check the I2S clock source configuration depending on the Device:
|
||||
Only Connectivity line devices have the PLL3 VCO clock */
|
||||
#ifdef STM32F10X_CL
|
||||
if((RCC->CFGR2 & tmp) != 0)
|
||||
{
|
||||
/* Get the configuration bits of RCC PLL3 multiplier */
|
||||
tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12);
|
||||
|
||||
/* Get the value of the PLL3 multiplier */
|
||||
if((tmp > 5) && (tmp < 15))
|
||||
{
|
||||
/* Multiplier is between 8 and 14 (value 15 is forbidden) */
|
||||
tmp += 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (tmp == 15)
|
||||
{
|
||||
/* Multiplier is 20 */
|
||||
tmp = 20;
|
||||
}
|
||||
}
|
||||
/* Get the PREDIV2 value */
|
||||
sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1);
|
||||
|
||||
/* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */
|
||||
sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* I2S Clock source is System clock: Get System Clock frequency */
|
||||
RCC_GetClocksFreq(&RCC_Clocks);
|
||||
|
||||
/* Get the source clock value: based on System Clock value */
|
||||
sourceclock = RCC_Clocks.SYSCLK_Frequency;
|
||||
}
|
||||
#else /* STM32F10X_HD */
|
||||
/* I2S Clock source is System clock: Get System Clock frequency */
|
||||
RCC_GetClocksFreq(&RCC_Clocks);
|
||||
|
||||
/* Get the source clock value: based on System Clock value */
|
||||
sourceclock = RCC_Clocks.SYSCLK_Frequency;
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/* Compute the Real divider depending on the MCLK output state with a floating point */
|
||||
if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
|
||||
{
|
||||
/* MCLK output is enabled */
|
||||
tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* MCLK output is disabled */
|
||||
tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
|
||||
}
|
||||
|
||||
/* Remove the floating point */
|
||||
tmp = tmp / 10;
|
||||
|
||||
/* Check the parity of the divider */
|
||||
i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
|
||||
|
||||
/* Compute the i2sdiv prescaler */
|
||||
i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
|
||||
|
||||
/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
|
||||
i2sodd = (uint16_t) (i2sodd << 8);
|
||||
}
|
||||
|
||||
/* Test if the divider is 1 or 0 or greater than 0xFF */
|
||||
if ((i2sdiv < 2) || (i2sdiv > 0xFF))
|
||||
{
|
||||
/* Set the default values */
|
||||
i2sdiv = 2;
|
||||
i2sodd = 0;
|
||||
}
|
||||
|
||||
/* Write to SPIx I2SPR register the computed value */
|
||||
SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
|
||||
|
||||
/* Configure the I2S with the SPI_InitStruct values */
|
||||
tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \
|
||||
(uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
|
||||
(uint16_t)I2S_InitStruct->I2S_CPOL))));
|
||||
|
||||
/* Write to SPIx I2SCFGR */
|
||||
SPIx->I2SCFGR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each SPI_InitStruct member with its default value.
|
||||
* @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
/*--------------- Reset SPI init structure parameters values -----------------*/
|
||||
/* Initialize the SPI_Direction member */
|
||||
SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
/* initialize the SPI_Mode member */
|
||||
SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
|
||||
/* initialize the SPI_DataSize member */
|
||||
SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
|
||||
/* Initialize the SPI_CPOL member */
|
||||
SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
|
||||
/* Initialize the SPI_CPHA member */
|
||||
SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
|
||||
/* Initialize the SPI_NSS member */
|
||||
SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
|
||||
/* Initialize the SPI_BaudRatePrescaler member */
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
|
||||
/* Initialize the SPI_FirstBit member */
|
||||
SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
/* Initialize the SPI_CRCPolynomial member */
|
||||
SPI_InitStruct->SPI_CRCPolynomial = 7;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each I2S_InitStruct member with its default value.
|
||||
* @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
|
||||
{
|
||||
/*--------------- Reset I2S init structure parameters values -----------------*/
|
||||
/* Initialize the I2S_Mode member */
|
||||
I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
|
||||
|
||||
/* Initialize the I2S_Standard member */
|
||||
I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
|
||||
|
||||
/* Initialize the I2S_DataFormat member */
|
||||
I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
|
||||
|
||||
/* Initialize the I2S_MCLKOutput member */
|
||||
I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
|
||||
|
||||
/* Initialize the I2S_AudioFreq member */
|
||||
I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
|
||||
|
||||
/* Initialize the I2S_CPOL member */
|
||||
I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI peripheral.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI peripheral */
|
||||
SPIx->CR1 |= CR1_SPE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI peripheral */
|
||||
SPIx->CR1 &= CR1_SPE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI peripheral (in I2S mode).
|
||||
* @param SPIx: where x can be 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_23_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI peripheral (in I2S mode) */
|
||||
SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI peripheral (in I2S mode) */
|
||||
SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI/I2S interrupts.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
|
||||
* @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
|
||||
* @arg SPI_I2S_IT_ERR: Error interrupt mask
|
||||
* @param NewState: new state of the specified SPI/I2S interrupt.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
|
||||
{
|
||||
uint16_t itpos = 0, itmask = 0 ;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI/I2S IT index */
|
||||
itpos = SPI_I2S_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = (uint16_t)1 << (uint16_t)itpos;
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI/I2S interrupt */
|
||||
SPIx->CR2 |= itmask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI/I2S interrupt */
|
||||
SPIx->CR2 &= (uint16_t)~itmask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SPIx/I2Sx DMA interface.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
|
||||
* @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
|
||||
* @param NewState: new state of the selected SPI/I2S DMA transfer request.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI/I2S DMA requests */
|
||||
SPIx->CR2 |= SPI_I2S_DMAReq;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI/I2S DMA requests */
|
||||
SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmits a Data through the SPIx/I2Sx peripheral.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param Data : Data to be transmitted.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Write in the DR register the data to be sent */
|
||||
SPIx->DR = Data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @retval The value of the received data.
|
||||
*/
|
||||
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the data in the DR register */
|
||||
return SPIx->DR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures internally by software the NSS pin for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
|
||||
* @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
|
||||
if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
|
||||
{
|
||||
/* Set NSS pin internally by software */
|
||||
SPIx->CR1 |= SPI_NSSInternalSoft_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset NSS pin internally by software */
|
||||
SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SS output for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx SS output.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI SS output */
|
||||
SPIx->CR2 |= CR2_SSOE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI SS output */
|
||||
SPIx->CR2 &= CR2_SSOE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the data size for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_DataSize: specifies the SPI data size.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_DataSize_16b: Set data frame format to 16bit
|
||||
* @arg SPI_DataSize_8b: Set data frame format to 8bit
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_DataSize));
|
||||
/* Clear DFF bit */
|
||||
SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
|
||||
/* Set new DFF bit value */
|
||||
SPIx->CR1 |= SPI_DataSize;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmit the SPIx CRC value.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Enable the selected SPI CRC transmission */
|
||||
SPIx->CR1 |= CR1_CRCNext_Set;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the CRC value calculation of the transferred bytes.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx CRC value calculation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI CRC calculation */
|
||||
SPIx->CR1 |= CR1_CRCEN_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI CRC calculation */
|
||||
SPIx->CR1 &= CR1_CRCEN_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the transmit or the receive CRC register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_CRC: specifies the CRC register to be read.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_CRC_Tx: Selects Tx CRC register
|
||||
* @arg SPI_CRC_Rx: Selects Rx CRC register
|
||||
* @retval The selected CRC register value..
|
||||
*/
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
|
||||
{
|
||||
uint16_t crcreg = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_CRC(SPI_CRC));
|
||||
if (SPI_CRC != SPI_CRC_Rx)
|
||||
{
|
||||
/* Get the Tx CRC register */
|
||||
crcreg = SPIx->TXCRCR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Get the Rx CRC register */
|
||||
crcreg = SPIx->RXCRCR;
|
||||
}
|
||||
/* Return the selected CRC register */
|
||||
return crcreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the CRC Polynomial register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval The CRC Polynomial register value.
|
||||
*/
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the CRC polynomial register */
|
||||
return SPIx->CRCPR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the data transfer direction in bi-directional mode for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_Direction: specifies the data transfer direction in bi-directional mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_Direction_Tx: Selects Tx transmission direction
|
||||
* @arg SPI_Direction_Rx: Selects Rx receive direction
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DIRECTION(SPI_Direction));
|
||||
if (SPI_Direction == SPI_Direction_Tx)
|
||||
{
|
||||
/* Set the Tx only mode */
|
||||
SPIx->CR1 |= SPI_Direction_Tx;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the Rx only mode */
|
||||
SPIx->CR1 &= SPI_Direction_Rx;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI/I2S flag is set or not.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
|
||||
* @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
|
||||
* @arg SPI_I2S_FLAG_BSY: Busy flag.
|
||||
* @arg SPI_I2S_FLAG_OVR: Overrun flag.
|
||||
* @arg SPI_FLAG_MODF: Mode Fault flag.
|
||||
* @arg SPI_FLAG_CRCERR: CRC Error flag.
|
||||
* @arg I2S_FLAG_UDR: Underrun Error flag.
|
||||
* @arg I2S_FLAG_CHSIDE: Channel Side flag.
|
||||
* @retval The new state of SPI_I2S_FLAG (SET or RESET).
|
||||
*/
|
||||
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
|
||||
{
|
||||
FlagStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
|
||||
/* Check the status of the specified SPI/I2S flag */
|
||||
if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
|
||||
{
|
||||
/* SPI_I2S_FLAG is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_I2S_FLAG is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_I2S_FLAG status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) flag.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* @param SPI_I2S_FLAG: specifies the SPI flag to clear.
|
||||
* This function clears only CRCERR flag.
|
||||
* @note
|
||||
* - OVR (OverRun error) flag is cleared by software sequence: a read
|
||||
* operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
|
||||
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
|
||||
* - UDR (UnderRun error) flag is cleared by a read operation to
|
||||
* SPI_SR register (SPI_I2S_GetFlagStatus()).
|
||||
* - MODF (Mode Fault) flag is cleared by software sequence: a read/write
|
||||
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
|
||||
* write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) flag */
|
||||
SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
|
||||
* @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
|
||||
* @arg SPI_I2S_IT_OVR: Overrun interrupt.
|
||||
* @arg SPI_IT_MODF: Mode Fault interrupt.
|
||||
* @arg SPI_IT_CRCERR: CRC Error interrupt.
|
||||
* @arg I2S_IT_UDR: Underrun Error interrupt.
|
||||
* @retval The new state of SPI_I2S_IT (SET or RESET).
|
||||
*/
|
||||
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
|
||||
{
|
||||
ITStatus bitstatus = RESET;
|
||||
uint16_t itpos = 0, itmask = 0, enablestatus = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI/I2S IT index */
|
||||
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
||||
|
||||
/* Get the SPI/I2S IT mask */
|
||||
itmask = SPI_I2S_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = 0x01 << itmask;
|
||||
|
||||
/* Get the SPI_I2S_IT enable bit status */
|
||||
enablestatus = (SPIx->CR2 & itmask) ;
|
||||
|
||||
/* Check the status of the specified SPI/I2S interrupt */
|
||||
if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
|
||||
{
|
||||
/* SPI_I2S_IT is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_I2S_IT is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_I2S_IT status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
|
||||
* This function clears only CRCERR interrupt pending bit.
|
||||
* @note
|
||||
* - OVR (OverRun Error) interrupt pending bit is cleared by software
|
||||
* sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
|
||||
* followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
|
||||
* - UDR (UnderRun Error) interrupt pending bit is cleared by a read
|
||||
* operation to SPI_SR register (SPI_I2S_GetITStatus()).
|
||||
* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
|
||||
* a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
|
||||
* followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
|
||||
* the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
|
||||
{
|
||||
uint16_t itpos = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI IT index */
|
||||
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
|
||||
SPIx->SR = (uint16_t)~itpos;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,77 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 08-April-2011
|
||||
* @brief Library configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_CONF_H
|
||||
#define __STM32F10x_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
|
||||
/*#include "stm32f10x_adc.h"*/
|
||||
/*#include "stm32f10x_bkp.h"*/
|
||||
/*#include "stm32f10x_can.h"*/
|
||||
/*#include "stm32f10x_cec.h"*/
|
||||
/*#include "stm32f10x_crc.h"*/
|
||||
/*#include "stm32f10x_dac.h"*/
|
||||
/*#include "stm32f10x_dbgmcu.h"*/
|
||||
/*#include "stm32f10x_dma.h"*/
|
||||
/*#include "stm32f10x_exti.h"*/
|
||||
/*#include "stm32f10x_flash.h"*/
|
||||
/*#include "stm32f10x_fsmc.h"*/
|
||||
#include "stm32f10x_gpio.h" /* needed for configuring the SPI and UART pins */
|
||||
/*#include "stm32f10x_i2c.h"*/
|
||||
/*#include "stm32f10x_iwdg.h"*/
|
||||
/*#include "stm32f10x_pwr.h"*/
|
||||
#include "stm32f10x_rcc.h" /* needed for enabling the SPI and UART peripherals */
|
||||
/*#include "stm32f10x_rtc.h"*/
|
||||
/*#include "stm32f10x_sdio.h"*/
|
||||
#include "stm32f10x_spi.h" /* needed for low-level interfacing with SD-card */
|
||||
/*#include "stm32f10x_tim.h"*/
|
||||
#include "stm32f10x_usart.h" /* needed for UART logging during firmware updates from SD-card */
|
||||
/*#include "stm32f10x_wwdg.h"*/
|
||||
/*#include "misc.h"*/ /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function which reports
|
||||
* the name of the source file and the source line number of the call
|
||||
* that failed. If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#endif /* __STM32F10x_CONF_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,192 @@
|
|||
/*---------------------------------------------------------------------------/
|
||||
/ FatFs - FAT file system module configuration file R0.09b (C)ChaN, 2013
|
||||
/----------------------------------------------------------------------------/
|
||||
/
|
||||
/ CAUTION! Do not forget to make clean the project after any changes to
|
||||
/ the configuration options.
|
||||
/
|
||||
/----------------------------------------------------------------------------*/
|
||||
#ifndef _FFCONF
|
||||
#define _FFCONF 82786 /* Revision ID */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Functions and Buffer Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
|
||||
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
|
||||
/ object instead of the sector buffer in the individual file object for file
|
||||
/ data transfer. This reduces memory consumption 512 bytes each file object. */
|
||||
|
||||
|
||||
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
|
||||
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
|
||||
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
|
||||
/ f_truncate and useless f_getfree. */
|
||||
|
||||
|
||||
#define _FS_MINIMIZE 0 /* 0 to 3 */
|
||||
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
|
||||
/
|
||||
/ 0: Full function.
|
||||
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
|
||||
/ are removed.
|
||||
/ 2: f_opendir and f_readdir are removed in addition to 1.
|
||||
/ 3: f_lseek is removed in addition to 2. */
|
||||
|
||||
|
||||
#define _USE_STRFUNC 2 /* 0:Disable or 1-2:Enable */
|
||||
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
|
||||
|
||||
|
||||
#define _USE_MKFS 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
|
||||
|
||||
|
||||
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
|
||||
|
||||
|
||||
#define _USE_LABEL 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable volume label functions, set _USE_LAVEL to 1 */
|
||||
|
||||
|
||||
#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Locale and Namespace Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _CODE_PAGE 437
|
||||
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
|
||||
/ Incorrect setting of the code page can cause a file open failure.
|
||||
/
|
||||
/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows)
|
||||
/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows)
|
||||
/ 949 - Korean (DBCS, OEM, Windows)
|
||||
/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows)
|
||||
/ 1250 - Central Europe (Windows)
|
||||
/ 1251 - Cyrillic (Windows)
|
||||
/ 1252 - Latin 1 (Windows)
|
||||
/ 1253 - Greek (Windows)
|
||||
/ 1254 - Turkish (Windows)
|
||||
/ 1255 - Hebrew (Windows)
|
||||
/ 1256 - Arabic (Windows)
|
||||
/ 1257 - Baltic (Windows)
|
||||
/ 1258 - Vietnam (OEM, Windows)
|
||||
/ 437 - U.S. (OEM)
|
||||
/ 720 - Arabic (OEM)
|
||||
/ 737 - Greek (OEM)
|
||||
/ 775 - Baltic (OEM)
|
||||
/ 850 - Multilingual Latin 1 (OEM)
|
||||
/ 858 - Multilingual Latin 1 + Euro (OEM)
|
||||
/ 852 - Latin 2 (OEM)
|
||||
/ 855 - Cyrillic (OEM)
|
||||
/ 866 - Russian (OEM)
|
||||
/ 857 - Turkish (OEM)
|
||||
/ 862 - Hebrew (OEM)
|
||||
/ 874 - Thai (OEM, Windows)
|
||||
/ 1 - ASCII only (Valid for non LFN cfg.)
|
||||
*/
|
||||
|
||||
|
||||
#define _USE_LFN 1 /* 0 to 3 */
|
||||
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
|
||||
/* The _USE_LFN option switches the LFN support.
|
||||
/
|
||||
/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect.
|
||||
/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant.
|
||||
/ 2: Enable LFN with dynamic working buffer on the STACK.
|
||||
/ 3: Enable LFN with dynamic working buffer on the HEAP.
|
||||
/
|
||||
/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN,
|
||||
/ Unicode handling functions ff_convert() and ff_wtoupper() must be added
|
||||
/ to the project. When enable to use heap, memory control functions
|
||||
/ ff_memalloc() and ff_memfree() must be added to the project. */
|
||||
|
||||
|
||||
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
|
||||
/* To switch the character code set on FatFs API to Unicode,
|
||||
/ enable LFN feature and set _LFN_UNICODE to 1. */
|
||||
|
||||
|
||||
#define _FS_RPATH 0 /* 0 to 2 */
|
||||
/* The _FS_RPATH option configures relative path feature.
|
||||
/
|
||||
/ 0: Disable relative path feature and remove related functions.
|
||||
/ 1: Enable relative path. f_chdrive() and f_chdir() are available.
|
||||
/ 2: f_getcwd() is available in addition to 1.
|
||||
/
|
||||
/ Note that output of the f_readdir fnction is affected by this option. */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Physical Drive Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _VOLUMES 1
|
||||
/* Number of volumes (logical drives) to be used. */
|
||||
|
||||
|
||||
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
|
||||
/* Maximum sector size to be handled.
|
||||
/ Always set 512 for memory card and hard disk but a larger value may be
|
||||
/ required for on-board flash memory, floppy disk and optical disk.
|
||||
/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size
|
||||
/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */
|
||||
|
||||
|
||||
#define _MULTI_PARTITION 0 /* 0:Single partition, 1:Enable multiple partition */
|
||||
/* When set to 0, each volume is bound to the same physical drive number and
|
||||
/ it can mount only first primaly partition. When it is set to 1, each volume
|
||||
/ is tied to the partitions listed in VolToPart[]. */
|
||||
|
||||
|
||||
#define _USE_ERASE 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command
|
||||
/ should be added to the disk_ioctl functio. */
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ System Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _WORD_ACCESS 0 /* 0 or 1 */
|
||||
/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS
|
||||
/ option defines which access method is used to the word data on the FAT volume.
|
||||
/
|
||||
/ 0: Byte-by-byte access.
|
||||
/ 1: Word access. Do not choose this unless following condition is met.
|
||||
/
|
||||
/ When the byte order on the memory is big-endian or address miss-aligned word
|
||||
/ access results incorrect behavior, the _WORD_ACCESS must be set to 0.
|
||||
/ If it is not the case, the value can also be set to 1 to improve the
|
||||
/ performance and code size.
|
||||
*/
|
||||
|
||||
|
||||
/* A header file that defines sync object types on the O/S, such as
|
||||
/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */
|
||||
|
||||
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
|
||||
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
|
||||
#define _SYNC_t HANDLE /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */
|
||||
|
||||
/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module.
|
||||
/
|
||||
/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect.
|
||||
/ 1: Enable reentrancy. Also user provided synchronization handlers,
|
||||
/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj
|
||||
/ function must be added to the project. */
|
||||
|
||||
|
||||
#define _FS_LOCK 0 /* 0:Disable or >=1:Enable */
|
||||
/* To enable file lock control feature, set _FS_LOCK to 1 or greater.
|
||||
The value defines how many files can be opened simultaneously. */
|
||||
|
||||
|
||||
#endif /* _FFCONFIG */
|
||||
|
|
@ -0,0 +1,683 @@
|
|||
/*------------------------------------------------------------------------/
|
||||
/ MMCv3/SDv1/SDv2 (in SPI mode) control module
|
||||
/-------------------------------------------------------------------------/
|
||||
/
|
||||
/ Copyright (C) 2013, ChaN, all right reserved.
|
||||
/
|
||||
/ * This software is a free software and there is NO WARRANTY.
|
||||
/ * No restriction on use. You can use, modify and redistribute it for
|
||||
/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
|
||||
/ * Redistributions of source code must retain the above copyright notice.
|
||||
/
|
||||
/-------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* This file was modified from a sample available from the FatFs
|
||||
* web site. It was modified to work with a Olimex STM32-P103
|
||||
* evaluation board.
|
||||
*
|
||||
*/
|
||||
#include "diskio.h"
|
||||
#include "stm32f10x.h" /* STM32 registers */
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#include "boot.h"
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Module Private Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
/* Definitions for MMC/SDC command */
|
||||
#define CMD0 (0) /* GO_IDLE_STATE */
|
||||
#define CMD1 (1) /* SEND_OP_COND */
|
||||
#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */
|
||||
#define CMD8 (8) /* SEND_IF_COND */
|
||||
#define CMD9 (9) /* SEND_CSD */
|
||||
#define CMD10 (10) /* SEND_CID */
|
||||
#define CMD12 (12) /* STOP_TRANSMISSION */
|
||||
#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */
|
||||
#define CMD16 (16) /* SET_BLOCKLEN */
|
||||
#define CMD17 (17) /* READ_SINGLE_BLOCK */
|
||||
#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
|
||||
#define CMD23 (23) /* SET_BLOCK_COUNT */
|
||||
#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */
|
||||
#define CMD24 (24) /* WRITE_BLOCK */
|
||||
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
|
||||
#define CMD41 (41) /* SEND_OP_COND (ACMD) */
|
||||
#define CMD55 (55) /* APP_CMD */
|
||||
#define CMD58 (58) /* READ_OCR */
|
||||
|
||||
|
||||
/* Control signals (Platform dependent) */
|
||||
#define CS_LOW() GPIO_ResetBits(GPIOB, GPIO_Pin_12) /* MMC CS = L */
|
||||
#define CS_HIGH() GPIO_SetBits(GPIOB, GPIO_Pin_12) /* MMC CS = H */
|
||||
|
||||
|
||||
|
||||
#define FCLK_SLOW() /* Set slow clock (100k-400k) */
|
||||
#define FCLK_FAST() set_max_speed() /* Set fast clock (depends on the CSD) */
|
||||
|
||||
static volatile
|
||||
DSTATUS Stat = STA_NOINIT; /* Disk status */
|
||||
|
||||
static
|
||||
UINT CardType;
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send 80 or so clock transitions with CS and DI held high. This is */
|
||||
/* required after card power up to get it into SPI mode */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
static
|
||||
void send_initial_clock_train(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
unsigned int i;
|
||||
|
||||
/* Ensure CS is held high. */
|
||||
CS_HIGH();
|
||||
|
||||
/* Switch the SSI TX line to a GPIO and drive it high too. */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
GPIO_SetBits(GPIOB, GPIO_Pin_15);
|
||||
|
||||
/* Send 10 bytes over the SSI. This causes the clock to wiggle the */
|
||||
/* required number of times. */
|
||||
for(i = 0 ; i < 10 ; i++)
|
||||
{
|
||||
/* Loop while DR register in not empty */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE) == RESET) { ; }
|
||||
|
||||
/* Send byte through the SPI peripheral */
|
||||
SPI_I2S_SendData(SPI2, 0xff);
|
||||
|
||||
/* Wait to receive a byte */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
|
||||
}
|
||||
|
||||
/* Revert to hardware control of the SSI TX line. */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Power Control (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* When the target system does not support socket power control, there */
|
||||
/* is nothing to do in these functions. */
|
||||
|
||||
static
|
||||
void power_on (void)
|
||||
{
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/*
|
||||
* This doesn't really turn the power on, but initializes the
|
||||
* SSI port and pins needed to talk to the card.
|
||||
*/
|
||||
|
||||
/* Enable GPIO clock for CS */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
/* Enable SPI clock, SPI2: APB1 */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
/* Configure I/O for Flash Chip select (PB12) */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* De-select the Card: Chip Select high */
|
||||
GPIO_SetBits(GPIOB, GPIO_Pin_12);
|
||||
|
||||
/* Configure SPI pins: SCK (PB13) and MOSI (PB15) with default alternate function (not re-mapped) push-pull */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
/* Configure MISO (PB14) as Input with internal pull-up */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* SPI configuration */
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256; // 72000kHz/256=281kHz < 400kHz
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
|
||||
SPI_Init(SPI2, &SPI_InitStructure);
|
||||
SPI_CalculateCRC(SPI2, DISABLE);
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
|
||||
/* Set DI and CS high and apply more than 74 pulses to SCLK for the card */
|
||||
/* to be able to accept a native command. */
|
||||
send_initial_clock_train();
|
||||
|
||||
}
|
||||
// set the SSI speed to the max setting
|
||||
static
|
||||
void set_max_speed(void)
|
||||
{
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
|
||||
/* Disable the SPI system */
|
||||
SPI_Cmd(SPI2, DISABLE);
|
||||
|
||||
/* MMC/SDC can work at the clock frequency up to 20/25MHz so pick a speed close to
|
||||
* this but not higher
|
||||
*/
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; // 72MHz/4=18MHz < 20MHz
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
SPI_Init(SPI2, &SPI_InitStructure);
|
||||
SPI_CalculateCRC(SPI2, DISABLE);
|
||||
|
||||
/* Enable the SPI system */
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
}
|
||||
|
||||
static
|
||||
void power_off (void)
|
||||
{
|
||||
Stat |= STA_NOINIT; /* Force uninitialized */
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Transmit/Receive data to/from MMC via SPI (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE xchg_spi (BYTE dat)
|
||||
{
|
||||
/* Send byte through the SPI peripheral */
|
||||
SPI_I2S_SendData(SPI2, dat);
|
||||
|
||||
/* Wait to receive a byte */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
|
||||
|
||||
/* Return the byte read from the SPI bus */
|
||||
return (BYTE)SPI_I2S_ReceiveData(SPI2);
|
||||
}
|
||||
|
||||
static
|
||||
void rcvr_spi_m (BYTE *dst)
|
||||
{
|
||||
*dst = xchg_spi(0xFF);
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Wait for card ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int wait_ready (void)
|
||||
{
|
||||
BYTE d;
|
||||
ULONG timeOutTime;
|
||||
|
||||
/* set timeout for 500 ms from now */
|
||||
timeOutTime = TimerGet() + 500;
|
||||
|
||||
do {
|
||||
d = xchg_spi(0xFF);
|
||||
} while ((d != 0xFF) && (TimerGet() < timeOutTime));
|
||||
|
||||
return (d == 0xFF) ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Deselect the card and release SPI bus */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
void deselect (void)
|
||||
{
|
||||
CS_HIGH();
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Select the card and wait ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int select (void) /* 1:Successful, 0:Timeout */
|
||||
{
|
||||
CS_LOW();
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
|
||||
|
||||
if (wait_ready()) return 1; /* OK */
|
||||
deselect();
|
||||
return 0; /* Timeout */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Receive a data packet from MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int rcvr_datablock ( /* 1:OK, 0:Failed */
|
||||
BYTE *buff, /* Data buffer to store received data */
|
||||
UINT btr /* Byte count (must be multiple of 4) */
|
||||
)
|
||||
{
|
||||
BYTE token;
|
||||
ULONG timeOutTime;
|
||||
|
||||
/* set timeout for 100 ms from now */
|
||||
timeOutTime = TimerGet() + 100;
|
||||
|
||||
do { /* Wait for data packet in timeout of 100ms */
|
||||
token = xchg_spi(0xFF);
|
||||
} while ((token == 0xFF) && (TimerGet() < timeOutTime));
|
||||
|
||||
if(token != 0xFE) return 0; /* If not valid data token, retutn with error */
|
||||
|
||||
do { /* Receive the data block into buffer */
|
||||
rcvr_spi_m(buff++);
|
||||
rcvr_spi_m(buff++);
|
||||
} while (btr -= 2);
|
||||
xchg_spi(0xFF); /* Discard CRC */
|
||||
xchg_spi(0xFF);
|
||||
|
||||
return 1; /* Return with success */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a data packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
static
|
||||
int xmit_datablock ( /* 1:OK, 0:Failed */
|
||||
const BYTE *buff, /* 512 byte data block to be transmitted */
|
||||
BYTE token /* Data token */
|
||||
)
|
||||
{
|
||||
BYTE resp;
|
||||
UINT wc;
|
||||
|
||||
|
||||
if (!wait_ready()) return 0;
|
||||
|
||||
xchg_spi(token); /* Xmit a token */
|
||||
if (token != 0xFD) { /* Not StopTran token */
|
||||
wc = 512;
|
||||
do { /* Xmit the 512 byte data block to MMC */
|
||||
xchg_spi(*buff++);
|
||||
xchg_spi(*buff++);
|
||||
} while (wc -= 2);
|
||||
xchg_spi(0xFF); /* CRC (Dummy) */
|
||||
xchg_spi(0xFF);
|
||||
resp = xchg_spi(0xFF); /* Receive a data response */
|
||||
if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a command packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE send_cmd (
|
||||
BYTE cmd, /* Command byte */
|
||||
DWORD arg /* Argument */
|
||||
)
|
||||
{
|
||||
BYTE n, res;
|
||||
|
||||
|
||||
if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
|
||||
cmd &= 0x7F;
|
||||
res = send_cmd(CMD55, 0);
|
||||
if (res > 1) return res;
|
||||
}
|
||||
|
||||
/* Select the card and wait for ready */
|
||||
deselect();
|
||||
if (!select()) return 0xFF;
|
||||
|
||||
/* Send command packet */
|
||||
xchg_spi(0x40 | cmd); /* Start + Command index */
|
||||
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
|
||||
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
|
||||
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
|
||||
xchg_spi((BYTE)arg); /* Argument[7..0] */
|
||||
n = 0x01; /* Dummy CRC + Stop */
|
||||
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) + Stop */
|
||||
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) + Stop */
|
||||
xchg_spi(n);
|
||||
|
||||
/* Receive command response */
|
||||
if (cmd == CMD12) xchg_spi(0xFF); /* Skip a stuff byte on stop to read */
|
||||
n = 10; /* Wait for a valid response in timeout of 10 attempts */
|
||||
do
|
||||
res = xchg_spi(0xFF);
|
||||
while ((res & 0x80) && --n);
|
||||
|
||||
return res; /* Return with the response value */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Public Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize Disk Drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_initialize (
|
||||
BYTE pdrv /* Physical drive nmuber (0) */
|
||||
)
|
||||
{
|
||||
BYTE n, cmd, ty, ocr[4];
|
||||
ULONG timeOutTime;
|
||||
|
||||
|
||||
if (pdrv) return STA_NOINIT; /* Supports only single drive */
|
||||
if (Stat & STA_NODISK) return Stat; /* No card in the socket */
|
||||
|
||||
power_on(); /* Force socket power on */
|
||||
|
||||
CS_LOW(); /* CS = L */
|
||||
|
||||
ty = 0;
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
|
||||
timeOutTime = TimerGet() + 1000; /* Initialization timeout of 1000 msec */
|
||||
|
||||
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
|
||||
while ((TimerGet() < timeOutTime) && send_cmd(ACMD41, 0x40000000)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
|
||||
if ((TimerGet() < timeOutTime) && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
|
||||
ty = (ocr[0] & 0x40) ? CT_SD2|CT_BLOCK : CT_SD2; /* SDv2 */
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if (send_cmd(ACMD41, 0) <= 1) {
|
||||
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
|
||||
} else {
|
||||
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
|
||||
}
|
||||
while ((TimerGet() < timeOutTime) && send_cmd(cmd, 0)); /* Wait for leaving idle state */
|
||||
if (!(TimerGet() < timeOutTime) || send_cmd(CMD16, 512) != 0) /* Set read/write block length to 512 */
|
||||
ty = 0;
|
||||
}
|
||||
}
|
||||
CardType = ty;
|
||||
deselect();
|
||||
|
||||
if (ty) { /* Initialization succeded */
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
|
||||
FCLK_FAST();
|
||||
} else { /* Initialization failed */
|
||||
power_off();
|
||||
}
|
||||
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Get Disk Status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_status (
|
||||
BYTE pdrv /* Physical drive nmuber (0) */
|
||||
)
|
||||
{
|
||||
if (pdrv) return STA_NOINIT; /* Supports only single drive */
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT disk_read (
|
||||
BYTE pdrv, /* Physical drive number (0) */
|
||||
BYTE *buff, /* Pointer to the data buffer to store read data */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..255) */
|
||||
)
|
||||
{
|
||||
if (pdrv || !count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
if (count == 1) { /* Single block read */
|
||||
if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
|
||||
&& rcvr_datablock(buff, 512))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block read */
|
||||
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!rcvr_datablock(buff, 512)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
DRESULT disk_write (
|
||||
BYTE pdrv, /* Physical drive nmuber (0) */
|
||||
const BYTE *buff, /* Pointer to the data to be written */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..255) */
|
||||
)
|
||||
{
|
||||
if (pdrv || !count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
if (Stat & STA_PROTECT) return RES_WRPRT;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
if (count == 1) { /* Single block write */
|
||||
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
|
||||
&& xmit_datablock(buff, 0xFE))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block write */
|
||||
if (CardType & CT_SDC) send_cmd(ACMD23, count);
|
||||
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!xmit_datablock(buff, 0xFC)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
|
||||
count = 1;
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous Functions */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_IOCTL
|
||||
DRESULT disk_ioctl (
|
||||
BYTE pdrv, /* Physical drive nmuber (0) */
|
||||
BYTE cmd, /* Control code */
|
||||
void *buff /* Buffer to send/receive data block */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
BYTE n, csd[16], *ptr = buff;
|
||||
DWORD csz;
|
||||
|
||||
|
||||
if (pdrv) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
res = RES_ERROR;
|
||||
switch (cmd) {
|
||||
case CTRL_SYNC : /* Flush write-back cache, Wait for end of internal process */
|
||||
if (select()) res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (WORD) */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||||
if ((csd[0] >> 6) == 1) { /* SDv2? */
|
||||
csz = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
|
||||
*(DWORD*)buff = csz << 10;
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||||
csz = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||||
*(DWORD*)buff = csz << (n - 9);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sectors (DWORD) */
|
||||
if (CardType & CT_SD2) { /* SDv2? */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
||||
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
|
||||
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
||||
if (CardType & CT_SD1) { /* SDv1 */
|
||||
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
||||
} else { /* MMCv3 */
|
||||
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
|
||||
*ptr = CardType;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
|
||||
if ((send_cmd(CMD9, 0) == 0) /* READ_CSD */
|
||||
&& rcvr_datablock(buff, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
|
||||
if ((send_cmd(CMD10, 0) == 0) /* READ_CID */
|
||||
&& rcvr_datablock(buff, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
|
||||
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
||||
for (n = 0; n < 4; n++)
|
||||
*((BYTE*)buff+n) = xchg_spi(0xFF);
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_SDSTAT : /* Receive SD status as a data block (64 bytes) */
|
||||
if ((CardType & CT_SD2) && send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(buff, 64))
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
}
|
||||
|
||||
deselect();
|
||||
|
||||
return res;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*---------------------------------------------------------*/
|
||||
/* User Provided Timer Function for FatFs module */
|
||||
/*---------------------------------------------------------*/
|
||||
/* This is a real time clock service to be called from */
|
||||
/* FatFs module. Any valid time must be returned even if */
|
||||
/* the system does not support a real time clock. */
|
||||
/* This is not required in read-only configuration. */
|
||||
|
||||
DWORD get_fattime (void)
|
||||
{
|
||||
/* No RTC supprt. Return a fixed value 2013/5/10 0:00:00 */
|
||||
return ((DWORD)(2013 - 1980) << 25) /* Y */
|
||||
| ((DWORD)5 << 21) /* M */
|
||||
| ((DWORD)10 << 16) /* D */
|
||||
| ((DWORD)0 << 11) /* H */
|
||||
| ((DWORD)0 << 5) /* M */
|
||||
| ((DWORD)0 >> 1); /* S */
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -34,6 +34,9 @@
|
|||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "stm32f10x.h" /* microcontroller registers */
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
|
|
@ -81,6 +84,10 @@ static void Init(void)
|
|||
{
|
||||
volatile blt_int32u StartUpCounter = 0, HSEStatus = 0;
|
||||
blt_int32u pll_multiplier;
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
USART_InitTypeDef USART_InitStruct;
|
||||
#endif
|
||||
|
||||
/* reset the RCC clock configuration to the default reset state (for debug purpose) */
|
||||
/* set HSION bit */
|
||||
|
|
@ -152,22 +159,6 @@ static void Init(void)
|
|||
while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
|
||||
{
|
||||
}
|
||||
#if (BOOT_COM_UART_ENABLE > 0)
|
||||
/* enable clock for USART2 peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x00020000;
|
||||
/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
|
||||
/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
|
||||
/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
|
||||
/* configure USART2 Rx (GPIOA3) as alternate function input floating */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
|
||||
/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
|
||||
#endif
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* enable clocks for CAN transmitter and receiver pins (GPIOB and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000008 | 0x00000001);
|
||||
|
|
@ -187,6 +178,46 @@ static void Init(void)
|
|||
/* enable clocks for CAN controller peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x02000000;
|
||||
#endif
|
||||
#if (BOOT_COM_UART_ENABLE > 0)
|
||||
/* enable clock for USART2 peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x00020000;
|
||||
/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
|
||||
/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
|
||||
/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
|
||||
/* configure USART2 Rx (GPIOA3) as alternate function input floating */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
|
||||
/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
|
||||
#elif (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* enable UART peripheral clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
|
||||
/* enable GPIO peripheral clock for transmitter and receiver pins */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
|
||||
/* configure USART Tx as alternate function push-pull */
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2;
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
/* Configure USART Rx as alternate function input floating */
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_3;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
/* configure UART communcation parameters */
|
||||
USART_InitStruct.USART_BaudRate = BOOT_COM_UART_BAUDRATE;
|
||||
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStruct.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStruct.USART_Parity = USART_Parity_No;
|
||||
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART2, &USART_InitStruct);
|
||||
/* enable UART */
|
||||
USART_Cmd(USART2, ENABLE);
|
||||
#endif
|
||||
} /*** end of Init ***/
|
||||
|
||||
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -1248,15 +1248,15 @@ Memory Configuration
|
|||
Name Origin Length Attributes
|
||||
UNPLACED_SECTIONS 0xffffffff 0x00000000 xw
|
||||
SRAM 0x20000000 0x00005000 xw
|
||||
FLASH 0x08002000 0x0001e000 xr
|
||||
FLASH 0x08006000 0x0001a000 xr
|
||||
*default* 0x00000000 0xffffffff
|
||||
|
||||
Linker script and memory map
|
||||
|
||||
0x08003030 __do_debug_operation = __do_debug_operation_mempoll
|
||||
0x08007030 __do_debug_operation = __do_debug_operation_mempoll
|
||||
0x20000000 __SRAM_segment_start__ = 0x20000000
|
||||
0x20005000 __SRAM_segment_end__ = 0x20005000
|
||||
0x08002000 __FLASH_segment_start__ = 0x8002000
|
||||
0x08006000 __FLASH_segment_start__ = 0x8006000
|
||||
0x08020000 __FLASH_segment_end__ = 0x8020000
|
||||
0x00000100 __STACKSIZE__ = 0x100
|
||||
0x00000000 __STACKSIZE_PROCESS__ = 0x0
|
||||
|
|
@ -1274,121 +1274,121 @@ Linker script and memory map
|
|||
0x20000000 __vectors_ram_end__ = (__vectors_ram_start__ + SIZEOF (.vectors_ram))
|
||||
0x20000000 __vectors_ram_load_end__ = __vectors_ram_end__
|
||||
0x00000001 . = ASSERT (((__vectors_ram_end__ >= __SRAM_segment_start__) && (__vectors_ram_end__ <= __SRAM_segment_end__)), error: .vectors_ram is too large to fit in SRAM memory segment)
|
||||
0x08002000 __vectors_load_start__ = ALIGN (__FLASH_segment_start__, 0x100)
|
||||
0x08006000 __vectors_load_start__ = ALIGN (__FLASH_segment_start__, 0x100)
|
||||
|
||||
.vectors 0x08002000 0x154
|
||||
0x08002000 __vectors_start__ = .
|
||||
.vectors 0x08006000 0x154
|
||||
0x08006000 __vectors_start__ = .
|
||||
*(.vectors .vectors.*)
|
||||
.vectors 0x08002000 0x154 THUMB Debug/../../obj/vectors.o
|
||||
0x08002000 _vectors
|
||||
0x08002154 __vectors_end__ = (__vectors_start__ + SIZEOF (.vectors))
|
||||
0x08002154 __vectors_load_end__ = __vectors_end__
|
||||
.vectors 0x08006000 0x154 THUMB Debug/../../obj/vectors.o
|
||||
0x08006000 _vectors
|
||||
0x08006154 __vectors_end__ = (__vectors_start__ + SIZEOF (.vectors))
|
||||
0x08006154 __vectors_load_end__ = __vectors_end__
|
||||
0x00000001 . = ASSERT (((__vectors_end__ >= __FLASH_segment_start__) && (__vectors_end__ <= __FLASH_segment_end__)), error: .vectors is too large to fit in FLASH memory segment)
|
||||
0x08002154 __init_load_start__ = ALIGN (__vectors_end__, 0x4)
|
||||
0x08006154 __init_load_start__ = ALIGN (__vectors_end__, 0x4)
|
||||
|
||||
.init 0x08002154 0x114
|
||||
0x08002154 __init_start__ = .
|
||||
.init 0x08006154 0x114
|
||||
0x08006154 __init_start__ = .
|
||||
*(.init .init.*)
|
||||
.init 0x08002154 0x114 THUMB Debug/../../obj/cstart.o
|
||||
0x08002154 _start
|
||||
0x080021d2 exit
|
||||
0x080021f6 reset_handler
|
||||
0x08002268 __init_end__ = (__init_start__ + SIZEOF (.init))
|
||||
0x08002268 __init_load_end__ = __init_end__
|
||||
.init 0x08006154 0x114 THUMB Debug/../../obj/cstart.o
|
||||
0x08006154 _start
|
||||
0x080061d2 exit
|
||||
0x080061f6 reset_handler
|
||||
0x08006268 __init_end__ = (__init_start__ + SIZEOF (.init))
|
||||
0x08006268 __init_load_end__ = __init_end__
|
||||
0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= __FLASH_segment_end__)), error: .init is too large to fit in FLASH memory segment)
|
||||
0x08002268 __text_load_start__ = ALIGN (__init_end__, 0x4)
|
||||
0x08006268 __text_load_start__ = ALIGN (__init_end__, 0x4)
|
||||
|
||||
.text 0x08002268 0xe08
|
||||
0x08002268 __text_start__ = .
|
||||
.text 0x08006268 0xe08
|
||||
0x08006268 __text_start__ = .
|
||||
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table .ARM.extab* .gnu.linkonce.armextab.*)
|
||||
.glue_7 0x00000000 0x0 linker stubs
|
||||
.glue_7t 0x00000000 0x0 linker stubs
|
||||
.text.LedInit 0x08002268 0x48 THUMB Debug/../../obj/led.o
|
||||
0x08002268 LedInit
|
||||
.text.LedInit 0x08006268 0x48 THUMB Debug/../../obj/led.o
|
||||
0x08006268 LedInit
|
||||
.text.LedToggle
|
||||
0x080022b0 0x9c THUMB Debug/../../obj/led.o
|
||||
0x080022b0 LedToggle
|
||||
.text.main 0x0800234c 0x30 THUMB Debug/../../obj/main.o
|
||||
0x0800234c main
|
||||
.text.Init 0x0800237c 0x260 THUMB Debug/../../obj/main.o
|
||||
0x080062b0 0x9c THUMB Debug/../../obj/led.o
|
||||
0x080062b0 LedToggle
|
||||
.text.main 0x0800634c 0x30 THUMB Debug/../../obj/main.o
|
||||
0x0800634c main
|
||||
.text.Init 0x0800637c 0x260 THUMB Debug/../../obj/main.o
|
||||
.text.NVIC_SetPriority
|
||||
0x080025dc 0x58 THUMB Debug/../../obj/timer.o
|
||||
0x080065dc 0x58 THUMB Debug/../../obj/timer.o
|
||||
.text.SysTick_Config
|
||||
0x08002634 0x68 THUMB Debug/../../obj/timer.o
|
||||
0x08006634 0x68 THUMB Debug/../../obj/timer.o
|
||||
.text.TimerInit
|
||||
0x0800269c 0x28 THUMB Debug/../../obj/timer.o
|
||||
0x0800269c TimerInit
|
||||
0x0800669c 0x28 THUMB Debug/../../obj/timer.o
|
||||
0x0800669c TimerInit
|
||||
.text.TimerDeinit
|
||||
0x080026c4 0x18 THUMB Debug/../../obj/timer.o
|
||||
0x080026c4 TimerDeinit
|
||||
0x080066c4 0x18 THUMB Debug/../../obj/timer.o
|
||||
0x080066c4 TimerDeinit
|
||||
.text.TimerSet
|
||||
0x080026dc 0x20 THUMB Debug/../../obj/timer.o
|
||||
0x080026dc TimerSet
|
||||
0x080066dc 0x20 THUMB Debug/../../obj/timer.o
|
||||
0x080066dc TimerSet
|
||||
.text.TimerGet
|
||||
0x080026fc 0x18 THUMB Debug/../../obj/timer.o
|
||||
0x080026fc TimerGet
|
||||
0x080066fc 0x18 THUMB Debug/../../obj/timer.o
|
||||
0x080066fc TimerGet
|
||||
.text.TimerISRHandler
|
||||
0x08002714 0x24 THUMB Debug/../../obj/timer.o
|
||||
0x08002714 TimerISRHandler
|
||||
0x08006714 0x24 THUMB Debug/../../obj/timer.o
|
||||
0x08006714 TimerISRHandler
|
||||
.text.UnusedISR
|
||||
0x08002738 0x8 THUMB Debug/../../obj/vectors.o
|
||||
0x08002738 UnusedISR
|
||||
0x08006738 0x8 THUMB Debug/../../obj/vectors.o
|
||||
0x08006738 UnusedISR
|
||||
.text.__enable_irq
|
||||
0x08002740 0xc THUMB Debug/../../obj/irq.o
|
||||
0x08006740 0xc THUMB Debug/../../obj/irq.o
|
||||
.text.IrqInterruptEnable
|
||||
0x0800274c 0x10 THUMB Debug/../../obj/irq.o
|
||||
0x0800274c IrqInterruptEnable
|
||||
0x0800674c 0x10 THUMB Debug/../../obj/irq.o
|
||||
0x0800674c IrqInterruptEnable
|
||||
.text.BootActivate
|
||||
0x0800275c 0x28 THUMB Debug/../../obj/boot.o
|
||||
0x0800675c 0x28 THUMB Debug/../../obj/boot.o
|
||||
.text.BootComInit
|
||||
0x08002784 0xd0 THUMB Debug/../../obj/boot.o
|
||||
0x08002784 BootComInit
|
||||
0x08006784 0xd0 THUMB Debug/../../obj/boot.o
|
||||
0x08006784 BootComInit
|
||||
.text.BootComCheckActivationRequest
|
||||
0x08002854 0xdc THUMB Debug/../../obj/boot.o
|
||||
0x08002854 BootComCheckActivationRequest
|
||||
0x08006854 0xdc THUMB Debug/../../obj/boot.o
|
||||
0x08006854 BootComCheckActivationRequest
|
||||
.text.UartReceiveByte
|
||||
0x08002930 0x54 THUMB Debug/../../obj/boot.o
|
||||
0x08006930 0x54 THUMB Debug/../../obj/boot.o
|
||||
.text.GPIO_Init
|
||||
0x08002984 0x1b0 THUMB Debug/../../obj/stm32f10x_gpio.o
|
||||
0x08002984 GPIO_Init
|
||||
0x08006984 0x1b0 THUMB Debug/../../obj/stm32f10x_gpio.o
|
||||
0x08006984 GPIO_Init
|
||||
.text.GPIO_SetBits
|
||||
0x08002b34 0x1c THUMB Debug/../../obj/stm32f10x_gpio.o
|
||||
0x08002b34 GPIO_SetBits
|
||||
0x08006b34 0x1c THUMB Debug/../../obj/stm32f10x_gpio.o
|
||||
0x08006b34 GPIO_SetBits
|
||||
.text.GPIO_ResetBits
|
||||
0x08002b50 0x1c THUMB Debug/../../obj/stm32f10x_gpio.o
|
||||
0x08002b50 GPIO_ResetBits
|
||||
0x08006b50 0x1c THUMB Debug/../../obj/stm32f10x_gpio.o
|
||||
0x08006b50 GPIO_ResetBits
|
||||
.text.RCC_GetClocksFreq
|
||||
0x08002b6c 0x1d4 THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||
0x08002b6c RCC_GetClocksFreq
|
||||
0x08006b6c 0x1d4 THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||
0x08006b6c RCC_GetClocksFreq
|
||||
.text.RCC_APB2PeriphClockCmd
|
||||
0x08002d40 0x50 THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||
0x08002d40 RCC_APB2PeriphClockCmd
|
||||
0x08006d40 0x50 THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||
0x08006d40 RCC_APB2PeriphClockCmd
|
||||
.text.RCC_APB1PeriphClockCmd
|
||||
0x08002d90 0x50 THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||
0x08002d90 RCC_APB1PeriphClockCmd
|
||||
0x08006d90 0x50 THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||
0x08006d90 RCC_APB1PeriphClockCmd
|
||||
.text.USART_Init
|
||||
0x08002de0 0x1b0 THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08002de0 USART_Init
|
||||
0x08006de0 0x1b0 THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08006de0 USART_Init
|
||||
.text.USART_Cmd
|
||||
0x08002f90 0x3c THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08002f90 USART_Cmd
|
||||
0x08006f90 0x3c THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08006f90 USART_Cmd
|
||||
.text.USART_ReceiveData
|
||||
0x08002fcc 0x24 THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08002fcc USART_ReceiveData
|
||||
0x08006fcc 0x24 THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08006fcc USART_ReceiveData
|
||||
.text.USART_GetFlagStatus
|
||||
0x08002ff0 0x40 THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08002ff0 USART_GetFlagStatus
|
||||
0x08006ff0 0x40 THUMB Debug/../../obj/stm32f10x_usart.o
|
||||
0x08006ff0 USART_GetFlagStatus
|
||||
.text.libdebugio.__do_debug_operation_mempoll
|
||||
0x08003030 0x38 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7m_t_le.a(libdebugio.o)
|
||||
0x08003030 __do_debug_operation_mempoll
|
||||
0x08007030 0x38 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libdebugio_v7m_t_le.a(libdebugio.o)
|
||||
0x08007030 __do_debug_operation_mempoll
|
||||
.text.libc.__debug_io_lock
|
||||
0x08003068 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||
0x08003068 __debug_io_lock
|
||||
0x08007068 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||
0x08007068 __debug_io_lock
|
||||
.text.libc.__debug_io_unlock
|
||||
0x0800306c 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||
0x0800306c __debug_io_unlock
|
||||
0x08003070 __text_end__ = (__text_start__ + SIZEOF (.text))
|
||||
0x08003070 __text_load_end__ = __text_end__
|
||||
0x0800706c 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.3/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||
0x0800706c __debug_io_unlock
|
||||
0x08007070 __text_end__ = (__text_start__ + SIZEOF (.text))
|
||||
0x08007070 __text_load_end__ = __text_end__
|
||||
|
||||
.vfp11_veneer 0x00000000 0x0
|
||||
.vfp11_veneer 0x00000000 0x0 linker stubs
|
||||
|
|
@ -1396,51 +1396,51 @@ Linker script and memory map
|
|||
.v4_bx 0x00000000 0x0
|
||||
.v4_bx 0x00000000 0x0 linker stubs
|
||||
0x00000001 . = ASSERT (((__text_end__ >= __FLASH_segment_start__) && (__text_end__ <= __FLASH_segment_end__)), error: .text is too large to fit in FLASH memory segment)
|
||||
0x08003070 __dtors_load_start__ = ALIGN (__text_end__, 0x4)
|
||||
0x08007070 __dtors_load_start__ = ALIGN (__text_end__, 0x4)
|
||||
|
||||
.dtors 0x08003070 0x0
|
||||
0x08003070 __dtors_start__ = .
|
||||
.dtors 0x08007070 0x0
|
||||
0x08007070 __dtors_start__ = .
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
*(.fini_array .fini_array.*)
|
||||
0x08003070 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
|
||||
0x08003070 __dtors_load_end__ = __dtors_end__
|
||||
0x08007070 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
|
||||
0x08007070 __dtors_load_end__ = __dtors_end__
|
||||
0x00000001 . = ASSERT (((__dtors_end__ >= __FLASH_segment_start__) && (__dtors_end__ <= __FLASH_segment_end__)), error: .dtors is too large to fit in FLASH memory segment)
|
||||
0x08003070 __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
|
||||
0x08007070 __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
|
||||
|
||||
.ctors 0x08003070 0x0
|
||||
0x08003070 __ctors_start__ = .
|
||||
.ctors 0x08007070 0x0
|
||||
0x08007070 __ctors_start__ = .
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
*(.init_array .init_array.*)
|
||||
0x08003070 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
|
||||
0x08003070 __ctors_load_end__ = __ctors_end__
|
||||
0x08007070 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
|
||||
0x08007070 __ctors_load_end__ = __ctors_end__
|
||||
0x00000001 . = ASSERT (((__ctors_end__ >= __FLASH_segment_start__) && (__ctors_end__ <= __FLASH_segment_end__)), error: .ctors is too large to fit in FLASH memory segment)
|
||||
0x08003070 __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
|
||||
0x08007070 __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
|
||||
|
||||
.rodata 0x08003070 0x0
|
||||
0x08003070 __rodata_start__ = .
|
||||
.rodata 0x08007070 0x0
|
||||
0x08007070 __rodata_start__ = .
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
0x08003070 __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
|
||||
0x08003070 __rodata_load_end__ = __rodata_end__
|
||||
0x08007070 __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
|
||||
0x08007070 __rodata_load_end__ = __rodata_end__
|
||||
0x00000001 . = ASSERT (((__rodata_end__ >= __FLASH_segment_start__) && (__rodata_end__ <= __FLASH_segment_end__)), error: .rodata is too large to fit in FLASH memory segment)
|
||||
0x08003070 __ARM.exidx_load_start__ = ALIGN (__rodata_end__, 0x4)
|
||||
0x08007070 __ARM.exidx_load_start__ = ALIGN (__rodata_end__, 0x4)
|
||||
|
||||
.ARM.exidx 0x08003070 0x0
|
||||
0x08003070 __ARM.exidx_start__ = .
|
||||
0x08003070 __exidx_start = __ARM.exidx_start__
|
||||
.ARM.exidx 0x08007070 0x0
|
||||
0x08007070 __ARM.exidx_start__ = .
|
||||
0x08007070 __exidx_start = __ARM.exidx_start__
|
||||
*(.ARM.exidx .ARM.exidx.*)
|
||||
0x08003070 __ARM.exidx_end__ = (__ARM.exidx_start__ + SIZEOF (.ARM.exidx))
|
||||
0x08003070 __exidx_end = __ARM.exidx_end__
|
||||
0x08003070 __ARM.exidx_load_end__ = __ARM.exidx_end__
|
||||
0x08007070 __ARM.exidx_end__ = (__ARM.exidx_start__ + SIZEOF (.ARM.exidx))
|
||||
0x08007070 __exidx_end = __ARM.exidx_end__
|
||||
0x08007070 __ARM.exidx_load_end__ = __ARM.exidx_end__
|
||||
0x00000001 . = ASSERT (((__ARM.exidx_end__ >= __FLASH_segment_start__) && (__ARM.exidx_end__ <= __FLASH_segment_end__)), error: .ARM.exidx is too large to fit in FLASH memory segment)
|
||||
0x08003070 __fast_load_start__ = ALIGN (__ARM.exidx_end__, 0x4)
|
||||
0x08007070 __fast_load_start__ = ALIGN (__ARM.exidx_end__, 0x4)
|
||||
|
||||
.fast 0x20000000 0x0 load address 0x08003070
|
||||
.fast 0x20000000 0x0 load address 0x08007070
|
||||
0x20000000 __fast_start__ = .
|
||||
*(.fast .fast.*)
|
||||
0x20000000 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
|
||||
0x08003070 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
|
||||
0x08007070 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
|
||||
0x00000001 . = ASSERT (((__fast_load_end__ >= __FLASH_segment_start__) && (__fast_load_end__ <= __FLASH_segment_end__)), error: .fast is too large to fit in FLASH memory segment)
|
||||
|
||||
.fast_run 0x20000000 0x0
|
||||
|
|
@ -1449,9 +1449,9 @@ Linker script and memory map
|
|||
0x20000000 __fast_run_end__ = (__fast_run_start__ + SIZEOF (.fast_run))
|
||||
0x20000000 __fast_run_load_end__ = __fast_run_end__
|
||||
0x00000001 . = ASSERT (((__fast_run_end__ >= __SRAM_segment_start__) && (__fast_run_end__ <= __SRAM_segment_end__)), error: .fast_run is too large to fit in SRAM memory segment)
|
||||
0x08003070 __data_load_start__ = ALIGN ((__fast_load_start__ + SIZEOF (.fast)), 0x4)
|
||||
0x08007070 __data_load_start__ = ALIGN ((__fast_load_start__ + SIZEOF (.fast)), 0x4)
|
||||
|
||||
.data 0x20000000 0x14 load address 0x08003070
|
||||
.data 0x20000000 0x14 load address 0x08007070
|
||||
0x20000000 __data_start__ = .
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
.data.APBAHBPrescTable
|
||||
|
|
@ -1459,10 +1459,10 @@ Linker script and memory map
|
|||
.data.ADCPrescTable
|
||||
0x20000010 0x4 THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||
0x20000014 __data_end__ = (__data_start__ + SIZEOF (.data))
|
||||
0x08003084 __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
|
||||
0x08007084 __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
|
||||
0x00000001 . = ASSERT (((__data_load_end__ >= __FLASH_segment_start__) && (__data_load_end__ <= __FLASH_segment_end__)), error: .data is too large to fit in FLASH memory segment)
|
||||
|
||||
.data_run 0x20000000 0x14 load address 0x08003070
|
||||
.data_run 0x20000000 0x14 load address 0x08007070
|
||||
0x20000000 __data_run_start__ = .
|
||||
0x20000014 . = MAX ((__data_run_start__ + SIZEOF (.data)), .)
|
||||
*fill* 0x20000000 0x14 00
|
||||
|
|
@ -1544,14 +1544,14 @@ Linker script and memory map
|
|||
0x200001f4 __tbss_end__ = (__tbss_start__ + SIZEOF (.tbss))
|
||||
0x200001f4 __tbss_load_end__ = __tbss_end__
|
||||
0x00000001 . = ASSERT (((__tbss_end__ >= __SRAM_segment_start__) && (__tbss_end__ <= __SRAM_segment_end__)), error: .tbss is too large to fit in SRAM memory segment)
|
||||
0x08003084 __tdata_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
|
||||
0x08007084 __tdata_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
|
||||
|
||||
.tdata 0x200001f4 0x0 load address 0x08003084
|
||||
.tdata 0x200001f4 0x0 load address 0x08007084
|
||||
0x200001f4 __tdata_start__ = .
|
||||
*(.tdata .tdata.*)
|
||||
0x200001f4 __tdata_end__ = (__tdata_start__ + SIZEOF (.tdata))
|
||||
0x08003084 __tdata_load_end__ = (__tdata_load_start__ + SIZEOF (.tdata))
|
||||
0x08003084 __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.tdata))
|
||||
0x08007084 __tdata_load_end__ = (__tdata_load_start__ + SIZEOF (.tdata))
|
||||
0x08007084 __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.tdata))
|
||||
0x00000001 . = ASSERT (((__tdata_load_end__ >= __FLASH_segment_start__) && (__tdata_load_end__ <= __FLASH_segment_end__)), error: .tdata is too large to fit in FLASH memory segment)
|
||||
|
||||
.tdata_run 0x200001f4 0x0
|
||||
|
|
|
|||
|
|
@ -1,269 +1,269 @@
|
|||
S02B0000433A2F576F726B2F736F6674776172652F4F70656E424C542F5461726765742F44656D6F2F41524DEF
|
||||
S31508002000F4010020F72100083927000839270008BD
|
||||
S315080020103927000839270008392700083927000812
|
||||
S315080020203927000839270008392700083927000802
|
||||
S315080020303927000839270008392700081527000816
|
||||
S3150800204039270008392700083927000839270008E2
|
||||
S3150800205039270008392700083927000839270008D2
|
||||
S3150800206039270008392700083927000839270008C2
|
||||
S3150800207039270008392700083927000839270008B2
|
||||
S3150800208039270008392700083927000839270008A2
|
||||
S315080020903927000839270008392700083927000892
|
||||
S315080020A03927000839270008392700083927000882
|
||||
S315080020B03927000839270008392700083927000872
|
||||
S315080020C03927000839270008392700083927000862
|
||||
S315080020D03927000839270008392700083927000852
|
||||
S315080020E03927000839270008392700083927000842
|
||||
S315080020F03927000839270008392700083927000832
|
||||
S315080021003927000839270008392700083927000821
|
||||
S315080021103927000839270008392700083927000811
|
||||
S315080021203927000839270008392700083927000801
|
||||
S3150800213039270008392700083927000839270008F1
|
||||
S3150800214039270008392700083927000839270008E1
|
||||
S30908002150EE11AA557F
|
||||
S315080021542A498D462A482B492B4A00F039F82B4838
|
||||
S315080021642B492C4A00F034F82B482C492C4A00F009
|
||||
S315080021742FF82C482C492D4A00F02AF82C482D49CA
|
||||
S315080021842D4A00F025F82D482D492E4A00F020F84E
|
||||
S315080021942D482E49002200F026F82D482D49091A03
|
||||
S315080021A4082903DB00220260043001601E481F4927
|
||||
S315080021B4884205D00268043003B4904703BCF7E7A5
|
||||
S315080021C400208646EC4600200021234A9047FEE775
|
||||
S315080021D4884207D0521A05D0037801300B700131B2
|
||||
S315080021E4013AF9D17047884202D002700130FAE701
|
||||
S315080021F470471A481A490160AAE70000F40100204A
|
||||
S31508002204703000080000002014000020682200082E
|
||||
S3150800221468220008703000087030000800000020AA
|
||||
S315080022240000002070300008703000087030000884
|
||||
S3150800223470300008703000087030000870300008EC
|
||||
S315080022447030000870300008140000207400002064
|
||||
S3150800225474000020F40000204D23000808ED00E077
|
||||
S309080022640020000840
|
||||
S3150800226880B583B000AF4FF010004FF0010142F679
|
||||
S315080022784153C0F6000398474FF480533B804FF00C
|
||||
S3150800228803037B604FF01003BB603B464FF4805056
|
||||
S31508002298C4F20100194642F68513C0F600039847AA
|
||||
S315080022A807F10C07BD4680BD80B581B000AF42F284
|
||||
S315080022B8FD63C0F60003984703463B6040F21403E3
|
||||
S315080022C8C2F200031B683A68D21A40F2F3139A421C
|
||||
S315080022D832D940F21803C2F200031B78002B12D138
|
||||
S315080022E840F21803C2F200034FF001021A704FF4C5
|
||||
S315080022F88050C4F201004FF4805142F65133C0F6BB
|
||||
S315080023080003984711E040F21803C2F200034FF0A1
|
||||
S3150800231800021A704FF48050C4F201004FF480513D
|
||||
S3150800232842F63533C0F60003984740F21403C2F262
|
||||
S3150800233800033A681A6000E000BF07F10407BD46C3
|
||||
S3150800234880BD00BF80B500AF42F27D33C0F60003FA
|
||||
S31508002358984742F28573C0F60003984742F2B123BC
|
||||
S31508002368C0F60003984742F65503C0F60003984797
|
||||
S31508002378F4E700BF80B583B000AF4FF000037B6079
|
||||
S315080023884FF000033B604FF48053C4F202034FF446
|
||||
S315080023988052C4F20202126842F001021A604FF42F
|
||||
S315080023A88052C4F202024FF48053C4F202035968F9
|
||||
S315080023B84FF00003CFF6FF030B4053604FF48053EA
|
||||
S315080023C8C4F202034FF48052C4F20202126822F0E1
|
||||
S315080023D8847222F480321A604FF48053C4F20203DE
|
||||
S315080023E84FF48052C4F20202126822F480221A605C
|
||||
S315080023F84FF48053C4F202034FF48052C4F2020227
|
||||
S31508002408526822F4FE025A604FF48053C4F202035B
|
||||
S315080024184FF41F029A604FF48053C4F202034FF434
|
||||
S315080024288052C4F20202126842F480321A604FF4EB
|
||||
S315080024388053C4F202031B6803F400333B607B68CD
|
||||
S3150800244803F101037B603B68002B04D17A6840F2EC
|
||||
S31508002458DC539A42EBD14FF48053C4F202031B684B
|
||||
S3150800246803F40033002B00D1FEE74FF40053C4F2FF
|
||||
S3150800247802034FF40052C4F20202126842F0100234
|
||||
S315080024881A604FF40053C4F202034FF40052C4F220
|
||||
S315080024980202126822F003021A604FF40053C4F2CB
|
||||
S315080024A802034FF40052C4F20202126842F0020212
|
||||
S315080024B81A604FF48053C4F202034FF48052C4F2F0
|
||||
S315080024C8020252685A604FF48053C4F202034FF46A
|
||||
S315080024D88052C4F20202526842F400525A604FF41B
|
||||
S315080024E88053C4F202034FF48052C4F202025268BF
|
||||
S315080024F842F480625A604FF48053C4F202034FF4E0
|
||||
S315080025088052C4F20202526822F47C125A604FF0D2
|
||||
S315080025180903BB60BB68A3F102034FEA8343BB60A8
|
||||
S315080025284FF48053C4F202034FF48052C4F20202F5
|
||||
S315080025385168BA680A4342F480325A604FF48053A5
|
||||
S31508002548C4F202034FF48052C4F20202126842F03F
|
||||
S3150800255880721A6000BF4FF48053C4F202031B68E6
|
||||
S3150800256803F00073002BF6D04FF48053C4F202032D
|
||||
S315080025784FF48052C4F20202526822F003025A60EB
|
||||
S315080025884FF48053C4F202034FF48052C4F2020295
|
||||
S31508002598526842F002025A6000BF4FF48053C4F2F0
|
||||
S315080025A802035B6803F00C03082BF6D142F2692391
|
||||
S315080025B8C0F60003984742F29D63C0F600039847A1
|
||||
S315080025C842F24D73C0F60003984707F10C07BD465B
|
||||
S315080025D880BD00BF80B482B000AF786039607B6880
|
||||
S315080025E8002B10DA4FF46D43CEF200037A6802F036
|
||||
S315080025F80F02A2F104013A68D2B24FEA0212D2B225
|
||||
S315080026085B181A760CE04FF46143CEF2000379683A
|
||||
S315080026183A68D2B24FEA0212D2B25B1883F800239C
|
||||
S3150800262807F10807BD4680BC704700BF80B581B072
|
||||
S3150800263800AF38603A686FF07F439A4202D94FF084
|
||||
S31508002648010322E04EF21003CEF200033A6822F0A4
|
||||
S315080026587F4202F1FF325A604FF0FF304FF00F0108
|
||||
S3150800266842F2DD53C0F6000398474EF21003CEF245
|
||||
S3150800267800034FF000029A604EF21003CEF20003F0
|
||||
S315080026884FF007021A604FF00003184607F10407CF
|
||||
S31508002698BD4680BD80B500AF4FF4CA50C0F20100F0
|
||||
S315080026A842F23563C0F6000398474FF0000042F23D
|
||||
S315080026B8DD63C0F60003984780BD00BF80B400AF4D
|
||||
S315080026C84EF21003CEF200034FF000021A60BD4620
|
||||
S315080026D880BC704780B481B000AF386040F21C03F4
|
||||
S315080026E8C2F200033A681A6007F10407BD4680BCBF
|
||||
S315080026F8704700BF80B400AF40F21C03C2F2000363
|
||||
S315080027081B681846BD4680BC704700BF80B400AF3A
|
||||
S3150800271840F21C03C2F200031B6803F1010240F2EF
|
||||
S315080027281C03C2F200031A60BD4680BC704700BF8E
|
||||
S3150800273880B400AFFEE700BF80B400AF62B6BD46FE
|
||||
S3150800274880BC704780B500AF42F24173C0F60003FB
|
||||
S31508002758984780BD80B581B000AF42F2C563C0F620
|
||||
S315080027680003984740F25113C0F600033B603B68E4
|
||||
S31508002778984707F10407BD4680BD00BF80B587B0F6
|
||||
S3150800278800AF4FF400304FF0010142F69153C0F6FE
|
||||
S31508002798000398474FF005004FF0010142F64153F0
|
||||
S315080027A8C0F6000398474FF01803BB614FF00403BF
|
||||
S315080027B83B824FF003037B6107F110034FF4006077
|
||||
S315080027C8C4F20100194642F68513C0F60003984775
|
||||
S315080027D84FF00403BB614FF008033B8207F110036F
|
||||
S315080027E84FF40060C4F20100194642F68513C0F694
|
||||
S315080027F8000398474FF461433B604FF00003BB80E2
|
||||
S315080028084FF00003FB804FF000033B814FF00003B5
|
||||
S31508002818BB814FF00C037B813B464FF48840C4F2DA
|
||||
S315080028280000194642F6E153C0F6000398474FF4EC
|
||||
S315080028388840C4F200004FF0010142F69173C0F6D1
|
||||
S315080028480003984707F11C07BD4680BD80B500AF51
|
||||
S3150800285840F22003C2F200031B78002B1AD140F27B
|
||||
S315080028682400C2F2000042F63113C0F60003984766
|
||||
S315080028780346012B56D140F22003C2F200034FF05B
|
||||
S3150800288801021A7040F26803C2F200034FF0000210
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|
||||
S315080067D84FF00403BB614FF008033B8207F110032F
|
||||
S315080067E84FF40060C4F20100194646F68513C0F650
|
||||
S315080067F8000398474FF461433B604FF00003BB80A2
|
||||
S315080068084FF00003FB804FF000033B814FF0000375
|
||||
S31508006818BB814FF00C037B813B464FF48840C4F29A
|
||||
S315080068280000194646F6E153C0F6000398474FF4A8
|
||||
S315080068388840C4F200004FF0010146F69173C0F68D
|
||||
S315080068480003984707F11C07BD4680BD80B500AF11
|
||||
S3150800685840F22003C2F200031B78002B1AD140F23B
|
||||
S315080068682400C2F2000046F63113C0F60003984722
|
||||
S315080068780346012B56D140F22003C2F200034FF01B
|
||||
S3150800688801021A7040F26803C2F200034FF00002D0
|
||||
S315080068981A7047E040F26803C2F200031B7803F156
|
||||
S315080068A8010240F22403C2F20003D318184646F63A
|
||||
S315080068B83113C0F6000398470346012B32D140F23C
|
||||
S315080068C86803C2F200031B7803F10103DAB240F247
|
||||
S315080068D86803C2F200031A7040F22403C2F20003E6
|
||||
S315080068E81A7840F26803C2F200031B789A4219D153
|
||||
S315080068F840F22003C2F200034FF000021A7040F279
|
||||
S315080069082403C2F200035B78FF2B0BD140F2240361
|
||||
S31508006918C2F200039B78002B04D146F25D73C0F6D9
|
||||
S315080069280003984780BD00BF80B581B000AF3860C6
|
||||
S315080069384FF48840C4F200004FF0200146F6F17380
|
||||
S31508006948C0F6000398470346012B0FD14FF4884039
|
||||
S31508006958C4F2000046F6CD73C0F60003984703460E
|
||||
S31508006968DAB23B681A704FF0010301E04FF00003F2
|
||||
S31508006978184607F10407BD4680BD00BF80B488B035
|
||||
S3150800698800AF786039604FF00003FB614FF00003F1
|
||||
S315080069983B614FF00003BB614FF00003FB604FF00B
|
||||
S315080069A800037B614FF00003BB603B689B6803F0FC
|
||||
S315080069B80F03FB613B689B6803F01003002B04D0A8
|
||||
S315080069C83B685B68FA691343FB613B681B88DBB263
|
||||
S315080069D8002B4ED07B681B687B614FF00003BB61B8
|
||||
S315080069E841E0BB694FF0010202FA03F3FB603B681A
|
||||
S315080069F81B881A46FB6813403B613A69FB689A424A
|
||||
S31508006A082DD1BB694FEA8303FB60FB684FF00F0281
|
||||
S31508006A1802FA03F3BB60BB686FEA03037A6913409B
|
||||
S31508006A287B61FB68FA6902FA03F37A6913437B61A7
|
||||
S31508006A383B689B68282B07D1BB694FF0010202FA0D
|
||||
S31508006A4803F27B685A610AE03B689B68482B06D1C3
|
||||
S31508006A58BB694FF0010202FA03F27B681A61BB6947
|
||||
S31508006A6803F10103BB61BB69072BBAD97B687A694D
|
||||
S31508006A781A603B681B88FF2B53D97B685B687B6168
|
||||
S31508006A884FF00003BB6146E0BB6903F108034FF00A
|
||||
S31508006A98010202FA03F3FB603B681B881A46FB6887
|
||||
S31508006AA813403B613A69FB689A4230D1BB694FEAA1
|
||||
S31508006AB88303FB60FB684FF00F0202FA03F3BB601F
|
||||
S31508006AC8BB686FEA03037A6913407B61FB68FA6956
|
||||
S31508006AD802FA03F37A6913437B613B689B68282BA0
|
||||
S31508006AE808D1BB6903F108034FF0010202FA03F261
|
||||
S31508006AF87B685A613B689B68482B08D1BB6903F1D8
|
||||
S31508006B0808034FF0010202FA03F27B681A61BB69AF
|
||||
S31508006B1803F10103BB61BB69072BB5D97B687A69A1
|
||||
S31508006B285A6007F12007BD4680BC704780B482B01A
|
||||
S31508006B3800AF78600B463B803A887B681A6107F194
|
||||
S31508006B480807BD4680BC704780B482B000AF78603D
|
||||
S31508006B580B463B803A887B685A6107F10807BD46A9
|
||||
S31508006B6880BC704780B485B000AF38604FF000032A
|
||||
S31508006B783B614FF00003FB604FF00003BB604FF02A
|
||||
S31508006B8800037B604FF48053C4F202035B6803F08A
|
||||
S31508006B980C033B613B69042B0AD0082B0FD0002B4A
|
||||
S31508006BA84DD13A684FF49053C0F27A0313604DE01A
|
||||
S31508006BB83A684FF49053C0F27A03136046E04FF4EC
|
||||
S31508006BC88053C4F202035B6803F47013FB604FF446
|
||||
S31508006BD88053C4F202035B6803F48033BB60FB6826
|
||||
S31508006BE84FEA934303F10203FB60BB68002B09D104
|
||||
S31508006BF8FA684FF41063C0F23D0303FB02F23B68E0
|
||||
S31508006C081A6023E04FF48053C4F202035B6803F466
|
||||
S31508006C180033002B09D0FA684FF41063C0F23D031D
|
||||
S31508006C2803FB02F23B681A6010E0FA684FF49053C7
|
||||
S31508006C38C0F27A0303FB02F23B681A6006E03A6878
|
||||
S31508006C484FF49053C0F27A03136000BF4FF4805391
|
||||
S31508006C58C4F202035B6803F0F0033B613B694FEA41
|
||||
S31508006C6813133B6140F20003C2F200033A699B180A
|
||||
S31508006C781B78DBB27B603B681A687B6822FA03F2EA
|
||||
S31508006C883B685A604FF48053C4F202035B6803F406
|
||||
S31508006C98E0633B613B694FEA13233B6140F200031B
|
||||
S31508006CA8C2F200033A699B181B78DBB27B603B6823
|
||||
S31508006CB85A687B6822FA03F23B689A604FF4805355
|
||||
S31508006CC8C4F202035B6803F460533B613B694FEA0D
|
||||
S31508006CD8D3233B6140F20003C2F200033A699B18CA
|
||||
S31508006CE81B78DBB27B603B685A687B6822FA03F23A
|
||||
S31508006CF83B68DA604FF48053C4F202035B6803F416
|
||||
S31508006D0840433B613B694FEA93333B6140F21003CA
|
||||
S31508006D18C2F200033A699B181B78DBB27B603B68B2
|
||||
S31508006D28DA687B68B2FBF3F23B681A6107F1140765
|
||||
S31508006D38BD4680BC704700BF80B482B000AF78609B
|
||||
S31508006D4839603B68002B0CD04FF48053C4F2020319
|
||||
S31508006D584FF48052C4F2020291697A680A439A612A
|
||||
S31508006D680DE04FF48053C4F202034FF48052C4F284
|
||||
S31508006D78020291697A686FEA02020A409A6107F183
|
||||
S31508006D880807BD4680BC704780B482B000AF7860FB
|
||||
S31508006D9839603B68002B0CD04FF48053C4F20203C9
|
||||
S31508006DA84FF48052C4F20202D1697A680A43DA615A
|
||||
S31508006DB80DE04FF48053C4F202034FF48052C4F234
|
||||
S31508006DC80202D1697A686FEA02020A40DA6107F1B3
|
||||
S31508006DD80807BD4680BC704780B58CB000AF7860A0
|
||||
S31508006DE839604FF00003FB624FF00003BB624FF0B7
|
||||
S31508006DF800037B624FF000033B624FF00003FB6120
|
||||
S31508006E087B68FB617B681B8A9BB2FB62FA6A4CF655
|
||||
S31508006E18FF731340FB623B68DB88FA6A1343FB621D
|
||||
S31508006E28FB6A9AB27B681A827B689B899BB2FB626B
|
||||
S31508006E38FA6A4EF6F3131340FB623B689A883B6876
|
||||
S31508006E481B8913439AB23B685B8913439BB2FA6A58
|
||||
S31508006E581343FB62FB6A9AB27B689A817B689B8AB2
|
||||
S31508006E689BB2FB62FA6A4FF6FF431340FB623B6824
|
||||
S31508006E789B89FA6A1343FB62FB6A9AB27B689A8211
|
||||
S31508006E8807F10803184646F66D33C0F60003984717
|
||||
S31508006E98FA694FF46053C4F201039A4202D17B6936
|
||||
S31508006EA8BB6201E03B69BB627B689B899BB29BB26C
|
||||
S31508006EB81BB2002B0FDABA6A13464FEA83039B18EC
|
||||
S31508006EC84FEA83029A183B681B684FEA4303B2FBEA
|
||||
S31508006ED8F3F37B620EE0BA6A13464FEA83039B18FC
|
||||
S31508006EE84FEA83029A183B681B684FEA8303B2FB8A
|
||||
S31508006EF8F3F37B627A6A48F21F53C5F2EB13A3FBD6
|
||||
S31508006F0802134FEA53134FEA0313FB62FB6A4FEA6D
|
||||
S31508006F1813134FF0640202FB03F37A6AD31A3B622F
|
||||
S31508006F287B689B899BB29BB21BB2002B12DA3B6A21
|
||||
S31508006F384FEAC30303F1320248F21F53C5F2EB13B3
|
||||
S31508006F48A3FB02134FEA531303F00703FA6A134322
|
||||
S31508006F58FB6211E03B6A4FEA031303F1320248F277
|
||||
S31508006F681F53C5F2EB13A3FB02134FEA531303F09F
|
||||
S31508006F780F03FA6A1343FB62FB6A9AB27B681A81A3
|
||||
S31508006F8807F13007BD4680BD80B482B000AF78608F
|
||||
S31508006F9839603B68002B08D07B689B899BB243F411
|
||||
S31508006FA800539AB27B689A8107E07B689B899BB2F3
|
||||
S31508006FB823F400539AB27B689A8107F10807BD46FD
|
||||
S31508006FC880BC704780B481B000AF38603B689B8846
|
||||
S31508006FD89BB24FEAC3534FEAD3539BB2184607F1FD
|
||||
S31508006FE80407BD4680BC704780B483B000AF78609C
|
||||
S31508006FF80B463B804FF00003BB607B681B889AB240
|
||||
S315080070083B8813409BB2002B03D04FF00103BB60AB
|
||||
S3150800701802E04FF00003BB60BB68184607F10C078F
|
||||
S31508007028BD4680BC704700BF30B504460D4600F023
|
||||
S3150800703817F840F26C03C2F200031D6040F27003B1
|
||||
S31508007048C2F200031C601A461368002BFCD100F034
|
||||
S3150800705809F840F26C03C2F20003186830BD00BF95
|
||||
S30D08007068704700BF704700BF26
|
||||
S3150800707000000000010203040102030406070809D0
|
||||
S3090800708002040608EA
|
||||
S705080061F79A
|
||||
|
|
|
|||
|
|
@ -51,7 +51,8 @@
|
|||
<Watches active="0" update="Never" />
|
||||
</Watch4>
|
||||
<Files>
|
||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" y="28" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" left="18" selected="1" name="unnamed" top="28" />
|
||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" y="28" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" left="18" selected="0" name="unnamed" top="28" />
|
||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="25" debugPath="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\led.c" y="40" path="C:\Work\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\led.c" left="0" selected="1" name="unnamed" top="0" />
|
||||
</Files>
|
||||
<ARMCrossStudioWindow activeProject="demoprog_olimex_stm32p103" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||
</session>
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@ MEMORY
|
|||
{
|
||||
UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
|
||||
SRAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
|
||||
FLASH (rx) : ORIGIN = 0x08002000, LENGTH = 0x00020000-0x2000
|
||||
FLASH (rx) : ORIGIN = 0x08006000, LENGTH = 0x00020000-0x6000
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -10,7 +10,7 @@ SECTIONS
|
|||
{
|
||||
__SRAM_segment_start__ = 0x20000000;
|
||||
__SRAM_segment_end__ = 0x20005000;
|
||||
__FLASH_segment_start__ = 0x08002000;
|
||||
__FLASH_segment_start__ = 0x08006000;
|
||||
__FLASH_segment_end__ = 0x08020000;
|
||||
|
||||
__STACKSIZE__ = 256;
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -7,40 +7,43 @@ start address 0x08000000
|
|||
|
||||
Program Header:
|
||||
LOAD off 0x00008000 vaddr 0x08000000 paddr 0x08000000 align 2**15
|
||||
filesz 0x0000109c memsz 0x0000109c flags r-x
|
||||
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x20000000 align 2**15
|
||||
filesz 0x00000000 memsz 0x000005f0 flags rw-
|
||||
filesz 0x00004e80 memsz 0x00004e80 flags r-x
|
||||
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08004e80 align 2**15
|
||||
filesz 0x00000008 memsz 0x00001154 flags rw-
|
||||
private flags = 5000002: [Version5 EABI] [has entry point]
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .text 0000109c 08000000 08000000 00008000 2**2
|
||||
0 .text 00004e80 08000000 08000000 00008000 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
1 .bss 000005f0 20000000 20000000 00010000 2**2
|
||||
1 .data 00000008 20000000 08004e80 00010000 2**2
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
2 .bss 0000114c 20000008 08004e88 00010008 2**2
|
||||
ALLOC
|
||||
2 .debug_info 00002641 00000000 00000000 0000909c 2**0
|
||||
3 .debug_info 0000af77 00000000 00000000 00010008 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
3 .debug_abbrev 00000f98 00000000 00000000 0000b6dd 2**0
|
||||
4 .debug_abbrev 0000238c 00000000 00000000 0001af7f 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
4 .debug_loc 000012aa 00000000 00000000 0000c675 2**0
|
||||
5 .debug_loc 0000942b 00000000 00000000 0001d30b 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
5 .debug_aranges 00000310 00000000 00000000 0000d91f 2**0
|
||||
6 .debug_aranges 00000980 00000000 00000000 00026736 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
6 .debug_ranges 000002a8 00000000 00000000 0000dc2f 2**0
|
||||
7 .debug_ranges 00000a98 00000000 00000000 000270b6 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
7 .debug_line 00000d65 00000000 00000000 0000ded7 2**0
|
||||
8 .debug_line 00003605 00000000 00000000 00027b4e 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
8 .debug_str 00000aa1 00000000 00000000 0000ec3c 2**0
|
||||
9 .debug_str 000023fe 00000000 00000000 0002b153 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
9 .comment 00000030 00000000 00000000 0000f6dd 2**0
|
||||
10 .comment 00000030 00000000 00000000 0002d551 2**0
|
||||
CONTENTS, READONLY
|
||||
10 .ARM.attributes 00000033 00000000 00000000 0000f70d 2**0
|
||||
11 .ARM.attributes 00000033 00000000 00000000 0002d581 2**0
|
||||
CONTENTS, READONLY
|
||||
11 .debug_frame 00000674 00000000 00000000 0000f740 2**2
|
||||
12 .debug_frame 0000180c 00000000 00000000 0002d5b4 2**2
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
SYMBOL TABLE:
|
||||
08000000 l d .text 00000000 .text
|
||||
20000000 l d .bss 00000000 .bss
|
||||
20000000 l d .data 00000000 .data
|
||||
20000008 l d .bss 00000000 .bss
|
||||
00000000 l d .debug_info 00000000 .debug_info
|
||||
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
||||
00000000 l d .debug_loc 00000000 .debug_loc
|
||||
|
|
@ -54,97 +57,207 @@ SYMBOL TABLE:
|
|||
00000000 l df *ABS* 00000000 vectors.c
|
||||
00000000 l df *ABS* 00000000 cstart.c
|
||||
08000192 l F .text 00000000 zero_loop2
|
||||
08000f5c l F .text 00000000 zero_loop
|
||||
08004514 l F .text 00000000 zero_loop
|
||||
00000000 l df *ABS* 00000000 hooks.c
|
||||
08004540 l O .text 00000020 firmwareFilename
|
||||
20000008 l O .bss 00000228 logfile
|
||||
00000000 l df *ABS* 00000000 main.c
|
||||
00000000 l df *ABS* 00000000 mmc.c
|
||||
08000428 l F .text 0000002c xchg_spi
|
||||
08000454 l F .text 0000002c wait_ready
|
||||
08000480 l F .text 00000010 rcvr_spi_m
|
||||
08000490 l F .text 00000062 rcvr_datablock
|
||||
080004f4 l F .text 00000068 xmit_datablock
|
||||
0800055c l F .text 0000001c deselect
|
||||
08000578 l F .text 00000030 select
|
||||
080005a8 l F .text 000000a6 send_cmd
|
||||
20000230 l O .bss 00000004 CardType
|
||||
20000000 l O .data 00000001 Stat
|
||||
00000000 l df *ABS* 00000000 stm32f10x_gpio.c
|
||||
00000000 l df *ABS* 00000000 stm32f10x_rcc.c
|
||||
00000000 l df *ABS* 00000000 stm32f10x_spi.c
|
||||
00000000 l df *ABS* 00000000 stm32f10x_usart.c
|
||||
00000000 l df *ABS* 00000000 ff.c
|
||||
08000fa8 l F .text 00000016 mem_cpy
|
||||
08000fc0 l F .text 0000000e mem_set
|
||||
08000fd0 l F .text 00000016 chk_chr
|
||||
08000fe8 l F .text 0000001e ld_clust
|
||||
08001008 l F .text 00000016 st_clust
|
||||
08001020 l F .text 00000022 sum_sfn
|
||||
08001044 l F .text 00000040 validate
|
||||
08001084 l F .text 00000098 check_fs
|
||||
0800111c l F .text 000003ee chk_mounted
|
||||
0800150c l F .text 00000142 get_fileinfo
|
||||
08001650 l F .text 00000086 sync_window
|
||||
080016d8 l F .text 0000003a move_window
|
||||
08001714 l F .text 000000d2 sync_fs
|
||||
08001914 l F .text 000000ac dir_sdi
|
||||
08001af0 l F .text 000000c8 create_chain
|
||||
08001bb8 l F .text 0000014e dir_next
|
||||
08001d08 l F .text 000001a8 dir_find
|
||||
08001eb0 l F .text 00000334 follow_path
|
||||
080021e4 l F .text 0000005c dir_remove
|
||||
08002240 l F .text 00000144 dir_read
|
||||
08002384 l F .text 0000007c remove_chain
|
||||
080024b0 l F .text 00000258 dir_register
|
||||
20000234 l O .bss 00000200 LfnBuf
|
||||
20000434 l O .bss 00000002 Fsid
|
||||
0800458c l O .text 00000080 ExCvt
|
||||
0800460c l O .text 0000000d LfnOfs
|
||||
20000438 l O .bss 00000004 FatFs
|
||||
00000000 l df *ABS* 00000000 unicode.c
|
||||
0800461c l O .text 000001e0 tbl_lower.4261
|
||||
080047fc l O .text 00000100 Tbl
|
||||
080048fc l O .text 000001e0 tbl_upper.4262
|
||||
00000000 l df *ABS* 00000000 boot.c
|
||||
00000000 l df *ABS* 00000000 com.c
|
||||
20000000 l O .bss 00000001 comEntryStateConnect
|
||||
20000004 l O .bss 00000040 xcpCtoReqPacket.4167
|
||||
2000043c l O .bss 00000001 comEntryStateConnect
|
||||
20000440 l O .bss 00000040 xcpCtoReqPacket.4365
|
||||
00000000 l df *ABS* 00000000 xcp.c
|
||||
080003ac l F .text 00000010 XcpProtectResources
|
||||
080003bc l F .text 00000018 XcpSetCtoError
|
||||
08000f90 l O .text 00000008 xcpStationId
|
||||
20000044 l O .bss 0000004c xcpInfo
|
||||
08003234 l F .text 00000010 XcpProtectResources
|
||||
08003244 l F .text 00000018 XcpSetCtoError
|
||||
08004adc l O .text 00000008 xcpStationId
|
||||
20000480 l O .bss 0000004c xcpInfo
|
||||
00000000 l df *ABS* 00000000 backdoor.c
|
||||
20000090 l O .bss 00000001 backdoorOpen
|
||||
20000094 l O .bss 00000004 backdoorOpenTime
|
||||
200004cc l O .bss 00000001 backdoorOpen
|
||||
200004d0 l O .bss 00000004 backdoorOpenTime
|
||||
00000000 l df *ABS* 00000000 cop.c
|
||||
00000000 l df *ABS* 00000000 file.c
|
||||
0800364c l F .text 0000002c FileLibByteNibbleToChar
|
||||
08003678 l F .text 00000024 FileLibByteToHexString
|
||||
0800369c l F .text 00000048 FileLibLongToIntString
|
||||
080036e4 l F .text 00000064 FileLibHexStringToByte
|
||||
08003748 l F .text 0000020c SrecParseLine
|
||||
200004d4 l O .bss 00000040 loggingStr
|
||||
20000514 l O .bss 00000001 firmwareUpdateState
|
||||
20000518 l O .bss 00000008 eraseInfo
|
||||
20000520 l O .bss 00000458 fatFsObjects
|
||||
20000978 l O .bss 00000184 lineParseObject
|
||||
00000000 l df *ABS* 00000000 assert.c
|
||||
20000098 l O .bss 00000004 assert_failure_file
|
||||
2000009c l O .bss 00000004 assert_failure_line
|
||||
20000afc l O .bss 00000004 assert_failure_file
|
||||
20000b00 l O .bss 00000004 assert_failure_line
|
||||
00000000 l df *ABS* 00000000 cpu.c
|
||||
00000000 l df *ABS* 00000000 uart.c
|
||||
08000818 l F .text 00000024 UartReceiveByte
|
||||
0800083c l F .text 00000044 UartTransmitByte
|
||||
200000a0 l O .bss 00000041 xcpCtoReqPacket.4188
|
||||
200000e4 l O .bss 00000001 xcpCtoRxInProgress.4190
|
||||
200000e5 l O .bss 00000001 xcpCtoRxLength.4189
|
||||
08003dd0 l F .text 00000024 UartReceiveByte
|
||||
08003df4 l F .text 00000044 UartTransmitByte
|
||||
20000b04 l O .bss 00000041 xcpCtoReqPacket.4386
|
||||
20000b48 l O .bss 00000001 xcpCtoRxLength.4387
|
||||
20000b49 l O .bss 00000001 xcpCtoRxInProgress.4388
|
||||
00000000 l df *ABS* 00000000 nvm.c
|
||||
00000000 l df *ABS* 00000000 timer.c
|
||||
200000e6 l O .bss 00000002 millisecond_counter
|
||||
20000b4a l O .bss 00000002 millisecond_counter
|
||||
00000000 l df *ABS* 00000000 flash.c
|
||||
08000a30 l F .text 0000001c FlashUnlock
|
||||
08000a4c l F .text 00000010 FlashLock
|
||||
08000a5c l F .text 00000044 FlashGetSector
|
||||
08000aa0 l F .text 000000b0 FlashWriteBlock
|
||||
08000b50 l F .text 00000038 FlashGetSectorBaseAddr
|
||||
08000b88 l F .text 00000030 FlashInitBlock
|
||||
08000bb8 l F .text 00000044 FlashSwitchBlock
|
||||
08000bfc l F .text 000000a0 FlashAddToBlock
|
||||
08000fbc l O .text 000000b4 flashLayout
|
||||
200000e8 l O .bss 00000204 bootBlockInfo
|
||||
200002ec l O .bss 00000204 blockInfo
|
||||
08003fe8 l F .text 0000001c FlashUnlock
|
||||
08004004 l F .text 00000010 FlashLock
|
||||
08004014 l F .text 00000044 FlashGetSector
|
||||
08004058 l F .text 000000b0 FlashWriteBlock
|
||||
08004108 l F .text 00000038 FlashGetSectorBaseAddr
|
||||
08004140 l F .text 00000030 FlashInitBlock
|
||||
08004170 l F .text 00000044 FlashSwitchBlock
|
||||
080041b4 l F .text 000000a0 FlashAddToBlock
|
||||
08004cb4 l O .text 0000009c flashLayout
|
||||
20000b4c l O .bss 00000204 bootBlockInfo
|
||||
20000d50 l O .bss 00000204 blockInfo
|
||||
00000000 l df *ABS* 00000000 ctype_.c
|
||||
00000000 l df *ABS* 00000000
|
||||
00000100 l *ABS* 00000000 __STACKSIZE__
|
||||
08000334 g F .text 00000034 ComInit
|
||||
08000cb4 g F .text 00000054 FlashWrite
|
||||
080007ac g F .text 00000018 AssertFailure
|
||||
08000f24 g F .text 0000005c reset_handler
|
||||
08000a00 g F .text 00000020 TimerUpdate
|
||||
08000400 g F .text 00000010 XcpPacketTransmitted
|
||||
08000368 g F .text 00000018 ComTask
|
||||
08000394 g F .text 00000010 ComSetConnectEntryState
|
||||
08000308 g F .text 00000018 BootInit
|
||||
08000784 g F .text 00000020 BackDoorInit
|
||||
080007a8 g F .text 00000002 CopService
|
||||
0800109c g .text 00000000 _etext
|
||||
080009c4 g F .text 00000010 TimerReset
|
||||
08000320 g F .text 00000014 BootTask
|
||||
08000e28 g F .text 00000050 FlashWriteChecksum
|
||||
08000384 g F .text 0000000e ComTransmitPacket
|
||||
080003f0 g F .text 00000010 XcpIsConnected
|
||||
08000990 g F .text 00000008 NvmInit
|
||||
08000c9c g F .text 00000018 FlashInit
|
||||
200004f0 g .bss 00000000 _ebss
|
||||
08000f10 g F .text 00000014 UnusedISR
|
||||
08000380 g F .text 00000002 ComFree
|
||||
08000880 g F .text 0000002c UartInit
|
||||
080009a0 g F .text 00000008 NvmErase
|
||||
20000000 g .bss 00000000 _bss
|
||||
08000410 g F .text 0000033c XcpPacketReceived
|
||||
08000ed0 g F .text 00000040 FlashDone
|
||||
00000200 l *ABS* 00000000 __STACKSIZE__
|
||||
080031bc g F .text 00000034 ComInit
|
||||
0800426c g F .text 00000054 FlashWrite
|
||||
0800303c g F .text 0000005e f_gets
|
||||
08003d64 g F .text 00000018 AssertFailure
|
||||
08001808 g F .text 0000010a get_fat
|
||||
080044dc g F .text 0000005c reset_handler
|
||||
08003fb8 g F .text 00000020 TimerUpdate
|
||||
08003288 g F .text 00000010 XcpPacketTransmitted
|
||||
08000f58 g F .text 00000004 SPI_I2S_SendData
|
||||
080031f0 g F .text 00000018 ComTask
|
||||
0800321c g F .text 00000010 ComSetConnectEntryState
|
||||
08003188 g F .text 0000001c BootInit
|
||||
08000f5c g F .text 00000006 SPI_I2S_ReceiveData
|
||||
08003624 g F .text 00000020 BackDoorInit
|
||||
08000f9c g F .text 0000000c USART_GetFlagStatus
|
||||
08003648 g F .text 00000002 CopService
|
||||
08004e80 g .text 00000000 _etext
|
||||
08003158 g F .text 00000030 ff_wtoupper
|
||||
08003994 g F .text 000003d0 FileTask
|
||||
08003f7c g F .text 00000010 TimerReset
|
||||
08000650 g F .text 00000326 disk_initialize
|
||||
080031a4 g F .text 00000018 BootTask
|
||||
080043e0 g F .text 00000050 FlashWriteChecksum
|
||||
08000f64 g F .text 00000020 SPI_CalculateCRC
|
||||
08000ebc g F .text 0000001c RCC_APB2PeriphClockCmd
|
||||
0800320c g F .text 0000000e ComTransmitPacket
|
||||
08000e00 g F .text 000000b4 GPIO_Init
|
||||
08000978 g F .text 00000014 disk_status
|
||||
08000b00 g F .text 000002f8 disk_ioctl
|
||||
08000ed8 g F .text 0000001c RCC_APB1PeriphClockCmd
|
||||
08002400 g F .text 000000ae gen_numname
|
||||
08000f84 g F .text 0000000c SPI_I2S_GetFlagStatus
|
||||
08000248 g F .text 00000038 FileFirmwareUpdateCompletedHook
|
||||
08003278 g F .text 00000010 XcpIsConnected
|
||||
08002f6c g F .text 000000d0 f_unlink
|
||||
08003f48 g F .text 00000008 NvmInit
|
||||
08004254 g F .text 00000018 FlashInit
|
||||
20000f54 g .bss 00000000 _ebss
|
||||
0800309c g F .text 00000038 f_putc
|
||||
080030d4 g F .text 00000036 f_puts
|
||||
080044c8 g F .text 00000014 UnusedISR
|
||||
08003208 g F .text 00000002 ComFree
|
||||
08000eb4 g F .text 00000004 GPIO_SetBits
|
||||
08003e38 g F .text 0000002c UartInit
|
||||
08003f58 g F .text 00000008 NvmErase
|
||||
20000008 g .bss 00000000 _bss
|
||||
08002d4c g F .text 00000016 f_close
|
||||
08003298 g F .text 0000034c XcpPacketReceived
|
||||
080028d4 g F .text 000001c4 f_read
|
||||
08004488 g F .text 00000040 FlashDone
|
||||
08000150 g F .text 00000068 EntryFromProg
|
||||
080003d4 g F .text 0000001c XcpInit
|
||||
08000d08 g F .text 00000120 FlashErase
|
||||
080001cc g F .text 0000013c main
|
||||
080009b0 g F .text 00000014 NvmDone
|
||||
080008ac g F .text 00000064 UartTransmitPacket
|
||||
080009a8 g F .text 00000008 NvmVerifyChecksum
|
||||
080007ec g F .text 00000024 CpuMemCopy
|
||||
08000910 g F .text 00000080 UartReceivePacket
|
||||
20000000 g .text 00000000 _data
|
||||
080007a4 g F .text 00000002 CopInit
|
||||
08000810 g F .text 00000008 CpuReset
|
||||
08000998 g F .text 00000008 NvmWrite
|
||||
080007c4 g F .text 00000028 CpuStartUserProgram
|
||||
200005f0 g .bss 00000000 _estack
|
||||
08000e78 g F .text 00000058 FlashVerifyChecksum
|
||||
20000000 g .text 00000000 _edata
|
||||
08000eb8 g F .text 00000004 GPIO_ResetBits
|
||||
08000df8 g F .text 00000008 get_fattime
|
||||
0800325c g F .text 0000001c XcpInit
|
||||
08003954 g F .text 0000002c FileInit
|
||||
080042c0 g F .text 00000120 FlashErase
|
||||
08000280 g F .text 00000018 FileFirmwareUpdateErrorHook
|
||||
080002ec g F .text 0000013c main
|
||||
08002c98 g F .text 000000b4 f_sync
|
||||
08003f68 g F .text 00000014 NvmDone
|
||||
08002708 g F .text 0000002c f_mount
|
||||
08003e64 g F .text 00000064 UartTransmitPacket
|
||||
08003f60 g F .text 00000008 NvmVerifyChecksum
|
||||
08003da4 g F .text 00000024 CpuMemCopy
|
||||
08000f38 g F .text 00000020 SPI_Cmd
|
||||
080019c0 g F .text 0000012e put_fat
|
||||
08002d64 g F .text 000001bc f_lseek
|
||||
08003ec8 g F .text 00000080 UartReceivePacket
|
||||
08000214 g F .text 00000008 FileGetFirmwareFilenameHook
|
||||
20000000 g .data 00000000 _data
|
||||
08002f20 g F .text 0000004c f_stat
|
||||
08003644 g F .text 00000002 CopInit
|
||||
08003dc8 g F .text 00000008 CpuReset
|
||||
08003f50 g F .text 00000008 NvmWrite
|
||||
08003d7c g F .text 00000028 CpuStartUserProgram
|
||||
080017e8 g F .text 0000001e clust2sect
|
||||
20001154 g .bss 00000000 _estack
|
||||
08000f90 g F .text 0000000c USART_SendData
|
||||
08004430 g F .text 00000058 FlashVerifyChecksum
|
||||
20000008 g .data 00000000 _edata
|
||||
08003980 g F .text 00000014 FileIsIdle
|
||||
08002a98 g F .text 00000200 f_write
|
||||
08000000 g O .text 00000150 _vectab
|
||||
080003a4 g F .text 00000008 ComIsConnected
|
||||
0800074c g F .text 00000038 BackDoorCheck
|
||||
200004f0 g .bss 00000000 _stack
|
||||
08000a20 g F .text 00000010 TimerGet
|
||||
080009d4 g F .text 0000002c TimerInit
|
||||
08002734 g F .text 000001a0 f_open
|
||||
08000a30 g F .text 000000d0 disk_write
|
||||
08000298 g F .text 00000054 FileFirmwareUpdateLogHook
|
||||
20000004 g O .data 00000004 __ctype_ptr__
|
||||
0800322c g F .text 00000008 ComIsConnected
|
||||
08004d7c g O .text 00000101 _ctype_
|
||||
080001cc g F .text 00000048 FileIsFirmwareUpdateRequestedHook
|
||||
0800098c g F .text 000000a4 disk_read
|
||||
080035e4 g F .text 00000040 BackDoorCheck
|
||||
20000f54 g .bss 00000000 _stack
|
||||
08000ef4 g F .text 00000044 SPI_Init
|
||||
0800310c g F .text 0000004c ff_convert
|
||||
08003fd8 g F .text 00000010 TimerGet
|
||||
08003f8c g F .text 0000002c TimerInit
|
||||
0800021c g F .text 0000002c FileFirmwareUpdateStartedHook
|
||||
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -90,6 +90,37 @@
|
|||
#define BOOT_COM_UART_CHANNEL_INDEX (1)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* F I L E S Y S T E M I N T E R F A C E C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/* The file system interface is selected by setting the BOOT_FILE_SYS_ENABLE configurable
|
||||
* to 1. This enables support for firmware updates from a file stored on a locally
|
||||
* attached file system such as an SD-card. Note that this interface can be enabled
|
||||
* together with one of the remote communication interfaces such as UART, CAN or USB.
|
||||
*
|
||||
* Set BOOT_FILE_LOGGING_ENABLE to 1 if you would like log messages to be created during
|
||||
* a firmware update. The hook function FileFirmwareUpdateLogHook() will be called each
|
||||
* time a new string formatted log entry is available. This could be used during testing
|
||||
* by outputting the string on UART or to create a log file on the file system itself.
|
||||
*
|
||||
* Set BOOT_FILE_ERROR_HOOK_ENABLE to 1 if you would like to be informed in case an error
|
||||
* occurs during the firmware update. This could for example be used to turn on an error
|
||||
* LED to inform the user that something went wrong. Inspecting the log messages provides
|
||||
* additional information on the error cause.
|
||||
*
|
||||
* Set BOOT_FILE_STARTED_HOOK_ENABLE to 1 if you would like to be informed when a new
|
||||
* firmware update is started by the bootloader.
|
||||
*
|
||||
* Set BOOT_FILE_COMPLETED_HOOK_ENABLE to 1 if you would like to be informed when a
|
||||
* firmware update is completed by the bootloader.
|
||||
*/
|
||||
#define BOOT_FILE_SYS_ENABLE (1)
|
||||
#define BOOT_FILE_LOGGING_ENABLE (1)
|
||||
#define BOOT_FILE_ERROR_HOOK_ENABLE (1)
|
||||
#define BOOT_FILE_STARTED_HOOK_ENABLE (1)
|
||||
#define BOOT_FILE_COMPLETED_HOOK_ENABLE (1)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
|
|
|
|||
|
|
@ -33,6 +33,10 @@
|
|||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
#include "stm32f10x.h" /* STM32 registers */
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
|
|
@ -200,4 +204,187 @@ void CopServiceHook(void)
|
|||
#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* F I L E S Y S T E M I N T E R F A C E H O O K F U N C T I O N S
|
||||
****************************************************************************************/
|
||||
|
||||
#if (BOOT_FILE_SYS_ENABLE > 0)
|
||||
|
||||
/****************************************************************************************
|
||||
* Constant data declarations
|
||||
****************************************************************************************/
|
||||
static const blt_char firmwareFilename[] = "/demoprog_olimex_stm32p103.srec";
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Local data declarations
|
||||
****************************************************************************************/
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
static struct
|
||||
{
|
||||
FIL handle;
|
||||
blt_bool canUse;
|
||||
} logfile;
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
** NAME: FileIsFirmwareUpdateRequestedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: BLT_TRUE if a firmware update is requested, BLT_FALSE otherwise.
|
||||
** DESCRIPTION: Callback that gets called continuously when the bootloader is idle to
|
||||
** check whether a firmware update from local file storage should be
|
||||
** started. This could for example be when a switch is pressed, when a
|
||||
** certain file is found on the local file storage, etc.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_bool FileIsFirmwareUpdateRequestedHook(void)
|
||||
{
|
||||
FILINFO fileInfoObject = { 0 }; /* needs to be zeroed according to f_stat docs */;
|
||||
|
||||
/* Current example implementation looks for a predetermined firmware file on the
|
||||
* SD-card. If the SD-card is accessible and the firmware file was found the firmware
|
||||
* update is started. When successfully completed, the firmware file is deleted.
|
||||
* During the firmware update, progress information is written to a file called
|
||||
* bootlog.txt and additionally outputted on UART @57600 bps for debugging purposes.
|
||||
*/
|
||||
/* check if firmware file is present and SD-card is accessible */
|
||||
if (f_stat(firmwareFilename, &fileInfoObject) == FR_OK)
|
||||
{
|
||||
/* check if the filesize is valid and that it is not a directory */
|
||||
if ( (fileInfoObject.fsize > 0) && (!(fileInfoObject.fattrib & AM_DIR)) )
|
||||
{
|
||||
/* all conditions are met to start a firmware update from local file storage */
|
||||
return BLT_TRUE;
|
||||
}
|
||||
}
|
||||
/* still here so no firmware update request is pending */
|
||||
return BLT_FALSE;
|
||||
} /*** end of FileIsFirmwareUpdateRequestedHook ***/
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
** NAME: FileGetFirmwareFilenameHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: valid firmware filename with full path or BLT_NULL.
|
||||
** DESCRIPTION: Callback to obtain the filename of the firmware file that should be
|
||||
** used during the firmware update from the local file storage. This
|
||||
** hook function is called at the beginning of the firmware update from
|
||||
** local storage sequence.
|
||||
**
|
||||
****************************************************************************************/
|
||||
const blt_char *FileGetFirmwareFilenameHook(void)
|
||||
{
|
||||
return firmwareFilename;
|
||||
} /*** end of FileGetFirmwareFilenameHook ***/
|
||||
|
||||
|
||||
#if (BOOT_FILE_STARTED_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateStartedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called to inform the application that a firmware
|
||||
** update from local storage just started.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateStartedHook(void)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* create/overwrite the logfile */
|
||||
logfile.canUse = BLT_FALSE;
|
||||
if (f_open(&logfile.handle, "/bootlog.txt", FA_CREATE_ALWAYS | FA_WRITE) == FR_OK)
|
||||
{
|
||||
logfile.canUse = BLT_TRUE;
|
||||
}
|
||||
#endif
|
||||
} /*** end of FileFirmwareUpdateStartedHook ***/
|
||||
#endif /* BOOT_FILE_STARTED_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_COMPLETED_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateCompletedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called to inform the application that a firmware
|
||||
** update was successfully completed.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateCompletedHook(void)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* close the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
/* wait for all logging related transmission to complete */
|
||||
while(USART_GetFlagStatus(USART2, USART_FLAG_TC) == RESET);
|
||||
#endif
|
||||
/* now delete the firmware file from the disk since the update was successful */
|
||||
f_unlink(firmwareFilename);
|
||||
} /*** end of FileFirmwareUpdateCompletedHook ***/
|
||||
#endif /* BOOT_FILE_COMPLETED_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_ERROR_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateErrorHook
|
||||
** PARAMETER: error_code additional information on the error that occurred.
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called in case an error occurred during a firmware
|
||||
** update. Refer to <file.h> for a list of available error codes.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateErrorHook(blt_int8u error_code)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* error detected which stops the firmware update, so close the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
#endif
|
||||
} /*** end of FileFirmwareUpdateErrorHook ***/
|
||||
#endif /* BOOT_FILE_ERROR_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateLogHook
|
||||
** PARAMETER: info_string pointer to a character array with the log entry info.
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called each time new log information becomes
|
||||
** available during a firmware update.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateLogHook(blt_char *info_string)
|
||||
{
|
||||
/* write the string to the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
if (f_puts(info_string, &logfile.handle) < 0)
|
||||
{
|
||||
logfile.canUse = BLT_FALSE;
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
}
|
||||
/* echo all characters in the string on UART */
|
||||
while(*info_string != '\0')
|
||||
{
|
||||
/* write character to transmit holding register */
|
||||
USART_SendData(USART2, *info_string);
|
||||
/* wait for tx holding register to be empty */
|
||||
while(USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);
|
||||
/* point to the next character in the string */
|
||||
info_string++;
|
||||
}
|
||||
} /*** end of FileFirmwareUpdateLogHook ***/
|
||||
#endif /* BOOT_FILE_LOGGING_ENABLE > 0 */
|
||||
|
||||
|
||||
#endif /* BOOT_FILE_SYS_ENABLE > 0 */
|
||||
|
||||
|
||||
/*********************************** end of hooks.c ************************************/
|
||||
|
|
|
|||
|
|
@ -0,0 +1,342 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<link rel="File-List" href="Library_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F10x Standard Peripherals Library Drivers</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
||||
|
||||
|
||||
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|
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|
||||
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|
||||
p.MsoNormal, li.MsoNormal, div.MsoNormal
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
mso-fareast-font-family:"Times New Roman";}
|
||||
@page Section1
|
||||
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|
||||
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|
||||
mso-header-margin:.5in;
|
||||
mso-footer-margin:.5in;
|
||||
mso-paper-source:0;}
|
||||
div.Section1
|
||||
{page:Section1;}
|
||||
-->
|
||||
</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]--></head>
|
||||
<body lang="EN-US" link="blue" vlink="blue">
|
||||
<div class="Section1">
|
||||
<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||
</o:p></span></p>
|
||||
<div align="center">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr style="">
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../Release_Notes.html">Back to Release page</a></span></td>
|
||||
</tr>
|
||||
<tr style="">
|
||||
<td style="padding: 1.5pt;">
|
||||
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||
Notes for STM32F10x Standard Peripherals Library Drivers
|
||||
(StdPeriph_Driver)</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F10x Standard Peripherals Library
|
||||
Drivers update History</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<span style="font-family: "Times New Roman";">
|
||||
</span>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F10x Standard
|
||||
Peripherals Library Drivers update History</span></h2><br>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V3.5.0 / 11-March-2011<o:p></o:p></span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 5 new functions</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">3
|
||||
new functions controlling the counter errors: CAN_GetLastErrorCode(),
|
||||
CAN_GetReceiveErrorCounter() and CAN_GetLSBTransmitErrorCounter().</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to select the CAN operating mode: CAN_OperatingModeRequest().</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to support CAN TT mode: CAN_TTComModeCmd().</span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">CAN_TransmitStatus() function updated to support all CAN transmit intermediate states<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 1 new function:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">I2C_NACKPositionConfig():
|
||||
This function configures the same bit (POS) as I2C_PECPositionConfig()
|
||||
but is intended to be used in I2C mode while I2C_PECPositionConfig() is
|
||||
intended to used in SMBUS mode.</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change the <span style="font-style: italic;">TIM_DMABurstLength_xBytes</span> definitions to <span style="font-style: italic;">TIM_DMABurstLength_xTansfers</span><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
|
||||
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.4.0
|
||||
- 10/15/2010</span></h3>
|
||||
|
||||
<ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||
</ol>
|
||||
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x High-density value line </span>devices.</span></li>
|
||||
</ul>
|
||||
|
||||
<ol style="margin-top: 0in;" start="2" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||
</ol>
|
||||
|
||||
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_bkp.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete BKP registers definition from stm32f10x_bkp.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CAN registers definition from stm32f10x_can.c and use defines within stm32f10x.h file.<br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Update the wording of some defines and Asserts macro. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetFlagStatus()
|
||||
and CAN_ClearFlag() functions: updated to support new flags (were not
|
||||
supported in previous version). These flags are: CAN_FLAG_RQCP0,
|
||||
CAN_FLAG_RQCP1, CAN_FLAG_RQCP2, CAN_FLAG_FMP1, CAN_FLAG_FF1,
|
||||
CAN_FLAG_FOV1, CAN_FLAG_FMP0, CAN_FLAG_FF0, CAN_FLAG_FOV0,
|
||||
CAN_FLAG_WKU, CAN_FLAG_SLAK and CAN_FLAG_LEC. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetITStatus()
|
||||
function: add a check of the interrupt enable bit before getting the
|
||||
status of corresponding interrupt pending bit. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_ClearITPendingBit() function: correct the procedure to clear the interrupt pending bit. <br>
|
||||
</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_crc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CRC registers definition from stm32f10x_crc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dac.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DAC registers definition from stm32f10x_dac.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DBGMCU registers definition from stm32f10x_dbgmcu.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dma.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DMA registers definition from stm32f10x_dma.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new function "void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber);"<br>
|
||||
</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">FLASH functions (Erase and Program) updated to always clear the "PG", "MER" and "PER" bits even in case of TimeOut Error.</span><span style="font-style: italic;"></span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_fsmc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new member "FSMC_AsynchronousWait" in "FSMC_NORSRAMInitTypeDef" structure.</span><span style="font-style: italic;"></span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for TIM6, TIM7 and DAC DMA requests, TIM12 and DAC Triggers / DMA2_Channel5 Interrupt mapping.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_pwr.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete PWR registers definition from stm32f10x_pwr.c and use defines within stm32f10x.h and core_cm3.h files.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rtc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete RTC registers definition from stm32f10x_rtc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_spi.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for I2S Audio Clock frequencies "I2S_AudioFreq_192k".</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c</span></li>
|
||||
<ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for TIM Input Capture Polarity "TIM_ICPolarity_BothEdge".</span></span></li></ul>
|
||||
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.3.0
|
||||
- 04/16/2010</span></h3>
|
||||
|
||||
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
|
||||
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x XL-density </span>devices.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C driver: events description and management enhancement.</span></li></ul>
|
||||
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
|
||||
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">DBGMCU_Config()</span> function: add new values <span style="font-style: italic;">DBGMCU_TIMx_STOP</span> (x: 9..14) for <span style="font-style: italic;">DBGMCU_Periph</span> parameter.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c:
|
||||
updated to support Bank2 of XL-density devices (up to 1MByte of Flash
|
||||
memory). For more details, refer to the description provided within
|
||||
stm32f10x_flash.c file.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for FSMC_NADV pin and TIM9..11,13,14.</span></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c: I2C events description and management enhancement. <br></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">I2C_CheckEvent()</span>
|
||||
function: updated to check whether the last event contains the
|
||||
I2C_EVENT (instead of check whether the last event is equal to
|
||||
I2C_EVENT)<br></span></li></ul><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add
|
||||
detailed description of I2C events and how to manage them using the
|
||||
functions provided by this driver. For more information, refer to
|
||||
stm32f10x_i2c.h and stm32f10x_i2c.c files.</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rcc.h/.c: updated to support TIM9..TIM14 APB clock and reset configuration</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c: updated to support new Timers TIM9..TIM14.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_sdio.h: </span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SDIO_SetSDIOReadWaitMode() function: correct values of SDIO_ReadWaitMode parameter<br>change <br>
|
||||
#define
|
||||
SDIO_ReadWaitMode_CLK
|
||||
((uint32_t)0x00000000)<br> #define
|
||||
SDIO_ReadWaitMode_DATA2
|
||||
((uint32_t)0x00000001)<br>by<br> #define
|
||||
SDIO_ReadWaitMode_CLK
|
||||
((uint32_t)0x00000001)<br> #define
|
||||
SDIO_ReadWaitMode_DATA2
|
||||
((uint32_t)0x00000000)</span></li></ul></ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.2.0
|
||||
- 03/01/2010</span></h3>
|
||||
<ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||
for <b>STM32 Low-density Value line (STM32F100x4/6) and
|
||||
Medium-density Value line (STM32F100x8/B) devices</b>.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Almost
|
||||
peripherals drivers were updated to support Value
|
||||
line devices features</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Drivers limitations fix and enhancements. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||
|
||||
</ul>
|
||||
<ol style="margin-top: 0in;" start="2" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new
|
||||
firmware driver for CEC peripheral: stm32f10x_cec.h and stm32f10x_cec.c</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Timers drivers stm32f10x_tim.h/.c: add support for new General Purpose Timers: TIM15, TIM16 and TIM17.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC driver: add support for new Value peripherals: HDMI-CEC, TIM15, TIM16 and TIM17.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GPIO driver: add new remap parameters for TIM1, TIM15, TIM16, TIM17 and HDMI-CEC: </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM1_DMA, </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM15, GPIO_Remap_TIM16, GPIO_Remap_TIM17, GPIO_Remap_CEC.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">USART
|
||||
driver: add support for Oversampling by 8 mode and onebit method. 2
|
||||
functions has been added: USART_OverSampling8Cmd() and
|
||||
USART_OneBitMethodCmd().<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DAC
|
||||
driver: add new functions handling the DAC under run feature:
|
||||
DAC_ITConfig(), DAC_GetFlagStatus(), DAC_ClearFlag(), DAC_GetITStatus()
|
||||
and DAC_ClearITPendingBit().</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DBGMCU driver: add new parameters for TIM15, TIM16 and TIM17: DBGMCU_TIM15_STOP, DBGMCU_TIM16_STOP, DBGMCU_TIM17_STOP.<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">FLASH
|
||||
driver: the FLASH_EraseOptionBytes() function updated. This is now just
|
||||
erasing the option bytes without modifying the RDP status either
|
||||
enabled or disabled.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">PWR
|
||||
driver: the PWR_EnterSTOPMode() function updated. When woken up from
|
||||
STOP mode, this function resets again the SLEEPDEEP bit in the
|
||||
Cortex-M3 System Control register to allow Sleep mode entering.</span></li>
|
||||
|
||||
|
||||
</ul>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||
enclosed firmware and all the related documentation are not covered by
|
||||
a License Agreement, if you need such License you can contact your
|
||||
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||
<hr align="center" size="2" width="100%"></span></div>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32(<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<p class="MsoNormal"><o:p> </o:p></p>
|
||||
</div>
|
||||
</body></html>
|
||||
|
|
@ -0,0 +1,385 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_GPIO_H
|
||||
#define __STM32F10x_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
|
||||
((PERIPH) == GPIOB) || \
|
||||
((PERIPH) == GPIOC) || \
|
||||
((PERIPH) == GPIOD) || \
|
||||
((PERIPH) == GPIOE) || \
|
||||
((PERIPH) == GPIOF) || \
|
||||
((PERIPH) == GPIOG))
|
||||
|
||||
/**
|
||||
* @brief Output Maximum frequency selection
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Speed_10MHz = 1,
|
||||
GPIO_Speed_2MHz,
|
||||
GPIO_Speed_50MHz
|
||||
}GPIOSpeed_TypeDef;
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
|
||||
((SPEED) == GPIO_Speed_50MHz))
|
||||
|
||||
/**
|
||||
* @brief Configuration Mode enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{ GPIO_Mode_AIN = 0x0,
|
||||
GPIO_Mode_IN_FLOATING = 0x04,
|
||||
GPIO_Mode_IPD = 0x28,
|
||||
GPIO_Mode_IPU = 0x48,
|
||||
GPIO_Mode_Out_OD = 0x14,
|
||||
GPIO_Mode_Out_PP = 0x10,
|
||||
GPIO_Mode_AF_OD = 0x1C,
|
||||
GPIO_Mode_AF_PP = 0x18
|
||||
}GPIOMode_TypeDef;
|
||||
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
|
||||
((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
|
||||
((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
|
||||
((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
|
||||
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_pins_define */
|
||||
|
||||
GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIOSpeed_TypeDef */
|
||||
|
||||
GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIOMode_TypeDef */
|
||||
}GPIO_InitTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Bit_SET and Bit_RESET enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{ Bit_RESET = 0,
|
||||
Bit_SET
|
||||
}BitAction;
|
||||
|
||||
#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pins_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||
#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||
#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||
#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||
#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||
#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||
#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||
#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||
#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||
#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||
#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||
#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||
#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||
#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||
#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||
#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||
#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
||||
|
||||
#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
|
||||
|
||||
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
|
||||
((PIN) == GPIO_Pin_1) || \
|
||||
((PIN) == GPIO_Pin_2) || \
|
||||
((PIN) == GPIO_Pin_3) || \
|
||||
((PIN) == GPIO_Pin_4) || \
|
||||
((PIN) == GPIO_Pin_5) || \
|
||||
((PIN) == GPIO_Pin_6) || \
|
||||
((PIN) == GPIO_Pin_7) || \
|
||||
((PIN) == GPIO_Pin_8) || \
|
||||
((PIN) == GPIO_Pin_9) || \
|
||||
((PIN) == GPIO_Pin_10) || \
|
||||
((PIN) == GPIO_Pin_11) || \
|
||||
((PIN) == GPIO_Pin_12) || \
|
||||
((PIN) == GPIO_Pin_13) || \
|
||||
((PIN) == GPIO_Pin_14) || \
|
||||
((PIN) == GPIO_Pin_15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Remap_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
|
||||
#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
|
||||
#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
|
||||
#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
|
||||
#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
|
||||
#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
|
||||
#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
|
||||
#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
|
||||
#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
|
||||
#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
|
||||
#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
|
||||
#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
|
||||
#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
|
||||
#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
|
||||
#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
|
||||
#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
|
||||
#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
|
||||
#define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
||||
to TIM2 Internal Trigger 1 for calibration
|
||||
(only for Connectivity line devices) */
|
||||
#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
|
||||
|
||||
#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */
|
||||
|
||||
#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
#define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
|
||||
#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */
|
||||
#define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */
|
||||
#define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
||||
only for High density Value line devices) */
|
||||
|
||||
#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
|
||||
((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
|
||||
((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
|
||||
((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
|
||||
((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
|
||||
((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
|
||||
((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
|
||||
((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
|
||||
((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
|
||||
((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
|
||||
((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
|
||||
((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
|
||||
((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
|
||||
((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
|
||||
((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \
|
||||
((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \
|
||||
((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \
|
||||
((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \
|
||||
((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \
|
||||
((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \
|
||||
((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \
|
||||
((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Port_Sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_PortSourceGPIOA ((uint8_t)0x00)
|
||||
#define GPIO_PortSourceGPIOB ((uint8_t)0x01)
|
||||
#define GPIO_PortSourceGPIOC ((uint8_t)0x02)
|
||||
#define GPIO_PortSourceGPIOD ((uint8_t)0x03)
|
||||
#define GPIO_PortSourceGPIOE ((uint8_t)0x04)
|
||||
#define GPIO_PortSourceGPIOF ((uint8_t)0x05)
|
||||
#define GPIO_PortSourceGPIOG ((uint8_t)0x06)
|
||||
#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOE))
|
||||
|
||||
#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOG))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Pin_sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||
|
||||
#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
|
||||
((PINSOURCE) == GPIO_PinSource1) || \
|
||||
((PINSOURCE) == GPIO_PinSource2) || \
|
||||
((PINSOURCE) == GPIO_PinSource3) || \
|
||||
((PINSOURCE) == GPIO_PinSource4) || \
|
||||
((PINSOURCE) == GPIO_PinSource5) || \
|
||||
((PINSOURCE) == GPIO_PinSource6) || \
|
||||
((PINSOURCE) == GPIO_PinSource7) || \
|
||||
((PINSOURCE) == GPIO_PinSource8) || \
|
||||
((PINSOURCE) == GPIO_PinSource9) || \
|
||||
((PINSOURCE) == GPIO_PinSource10) || \
|
||||
((PINSOURCE) == GPIO_PinSource11) || \
|
||||
((PINSOURCE) == GPIO_PinSource12) || \
|
||||
((PINSOURCE) == GPIO_PinSource13) || \
|
||||
((PINSOURCE) == GPIO_PinSource14) || \
|
||||
((PINSOURCE) == GPIO_PinSource15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Ethernet_Media_Interface
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000)
|
||||
#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)
|
||||
|
||||
#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
|
||||
((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_AFIODeInit(void);
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||
void GPIO_EventOutputCmd(FunctionalState NewState);
|
||||
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
|
||||
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_GPIO_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,727 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_rcc.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the RCC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_RCC_H
|
||||
#define __STM32F10x_RCC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RCC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
|
||||
uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
|
||||
uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
|
||||
uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
|
||||
uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
|
||||
}RCC_ClocksTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HSE_configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HSE_OFF ((uint32_t)0x00000000)
|
||||
#define RCC_HSE_ON ((uint32_t)0x00010000)
|
||||
#define RCC_HSE_Bypass ((uint32_t)0x00040000)
|
||||
#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
|
||||
((HSE) == RCC_HSE_Bypass))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_entry_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)
|
||||
|
||||
#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL)
|
||||
#define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)
|
||||
#define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)
|
||||
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||
((SOURCE) == RCC_PLLSource_HSE_Div1) || \
|
||||
((SOURCE) == RCC_PLLSource_HSE_Div2))
|
||||
#else
|
||||
#define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000)
|
||||
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||
((SOURCE) == RCC_PLLSource_PREDIV1))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
#ifndef STM32F10X_CL
|
||||
#define RCC_PLLMul_2 ((uint32_t)0x00000000)
|
||||
#define RCC_PLLMul_3 ((uint32_t)0x00040000)
|
||||
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||
#define RCC_PLLMul_10 ((uint32_t)0x00200000)
|
||||
#define RCC_PLLMul_11 ((uint32_t)0x00240000)
|
||||
#define RCC_PLLMul_12 ((uint32_t)0x00280000)
|
||||
#define RCC_PLLMul_13 ((uint32_t)0x002C0000)
|
||||
#define RCC_PLLMul_14 ((uint32_t)0x00300000)
|
||||
#define RCC_PLLMul_15 ((uint32_t)0x00340000)
|
||||
#define RCC_PLLMul_16 ((uint32_t)0x00380000)
|
||||
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \
|
||||
((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||
((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
|
||||
((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
|
||||
((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
|
||||
((MUL) == RCC_PLLMul_16))
|
||||
|
||||
#else
|
||||
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||
#define RCC_PLLMul_6_5 ((uint32_t)0x00340000)
|
||||
|
||||
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||
((MUL) == RCC_PLLMul_6_5))
|
||||
#endif /* STM32F10X_CL */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PREDIV1_division_factor
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||
#define RCC_PREDIV1_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV1_Div2 ((uint32_t)0x00000001)
|
||||
#define RCC_PREDIV1_Div3 ((uint32_t)0x00000002)
|
||||
#define RCC_PREDIV1_Div4 ((uint32_t)0x00000003)
|
||||
#define RCC_PREDIV1_Div5 ((uint32_t)0x00000004)
|
||||
#define RCC_PREDIV1_Div6 ((uint32_t)0x00000005)
|
||||
#define RCC_PREDIV1_Div7 ((uint32_t)0x00000006)
|
||||
#define RCC_PREDIV1_Div8 ((uint32_t)0x00000007)
|
||||
#define RCC_PREDIV1_Div9 ((uint32_t)0x00000008)
|
||||
#define RCC_PREDIV1_Div10 ((uint32_t)0x00000009)
|
||||
#define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A)
|
||||
#define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B)
|
||||
#define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C)
|
||||
#define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D)
|
||||
#define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E)
|
||||
#define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F)
|
||||
|
||||
#define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16))
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PREDIV1_clock_source
|
||||
* @{
|
||||
*/
|
||||
#ifdef STM32F10X_CL
|
||||
/* PREDIV1 clock source (for STM32 connectivity line devices) */
|
||||
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000)
|
||||
|
||||
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \
|
||||
((SOURCE) == RCC_PREDIV1_Source_PLL2))
|
||||
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
||||
/* PREDIV1 clock source (for STM32 Value line devices) */
|
||||
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||
|
||||
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE))
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
/** @defgroup PREDIV2_division_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PREDIV2_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV2_Div2 ((uint32_t)0x00000010)
|
||||
#define RCC_PREDIV2_Div3 ((uint32_t)0x00000020)
|
||||
#define RCC_PREDIV2_Div4 ((uint32_t)0x00000030)
|
||||
#define RCC_PREDIV2_Div5 ((uint32_t)0x00000040)
|
||||
#define RCC_PREDIV2_Div6 ((uint32_t)0x00000050)
|
||||
#define RCC_PREDIV2_Div7 ((uint32_t)0x00000060)
|
||||
#define RCC_PREDIV2_Div8 ((uint32_t)0x00000070)
|
||||
#define RCC_PREDIV2_Div9 ((uint32_t)0x00000080)
|
||||
#define RCC_PREDIV2_Div10 ((uint32_t)0x00000090)
|
||||
#define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0)
|
||||
#define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0)
|
||||
#define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0)
|
||||
#define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0)
|
||||
#define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0)
|
||||
#define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0)
|
||||
|
||||
#define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PLL2_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLL2Mul_8 ((uint32_t)0x00000600)
|
||||
#define RCC_PLL2Mul_9 ((uint32_t)0x00000700)
|
||||
#define RCC_PLL2Mul_10 ((uint32_t)0x00000800)
|
||||
#define RCC_PLL2Mul_11 ((uint32_t)0x00000900)
|
||||
#define RCC_PLL2Mul_12 ((uint32_t)0x00000A00)
|
||||
#define RCC_PLL2Mul_13 ((uint32_t)0x00000B00)
|
||||
#define RCC_PLL2Mul_14 ((uint32_t)0x00000C00)
|
||||
#define RCC_PLL2Mul_16 ((uint32_t)0x00000E00)
|
||||
#define RCC_PLL2Mul_20 ((uint32_t)0x00000F00)
|
||||
|
||||
#define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \
|
||||
((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \
|
||||
((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \
|
||||
((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \
|
||||
((MUL) == RCC_PLL2Mul_20))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PLL3_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLL3Mul_8 ((uint32_t)0x00006000)
|
||||
#define RCC_PLL3Mul_9 ((uint32_t)0x00007000)
|
||||
#define RCC_PLL3Mul_10 ((uint32_t)0x00008000)
|
||||
#define RCC_PLL3Mul_11 ((uint32_t)0x00009000)
|
||||
#define RCC_PLL3Mul_12 ((uint32_t)0x0000A000)
|
||||
#define RCC_PLL3Mul_13 ((uint32_t)0x0000B000)
|
||||
#define RCC_PLL3Mul_14 ((uint32_t)0x0000C000)
|
||||
#define RCC_PLL3Mul_16 ((uint32_t)0x0000E000)
|
||||
#define RCC_PLL3Mul_20 ((uint32_t)0x0000F000)
|
||||
|
||||
#define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \
|
||||
((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \
|
||||
((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \
|
||||
((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \
|
||||
((MUL) == RCC_PLL3Mul_20))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/** @defgroup System_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
|
||||
#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
|
||||
#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
|
||||
#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_HSE) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_PLLCLK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
|
||||
#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
|
||||
#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
|
||||
#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
|
||||
#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
|
||||
#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
|
||||
#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
|
||||
#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
|
||||
#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
|
||||
((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
|
||||
((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
|
||||
((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
|
||||
((HCLK) == RCC_SYSCLK_Div512))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_APB2_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HCLK_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_HCLK_Div2 ((uint32_t)0x00000400)
|
||||
#define RCC_HCLK_Div4 ((uint32_t)0x00000500)
|
||||
#define RCC_HCLK_Div8 ((uint32_t)0x00000600)
|
||||
#define RCC_HCLK_Div16 ((uint32_t)0x00000700)
|
||||
#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
|
||||
((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
|
||||
((PCLK) == RCC_HCLK_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Interrupt_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_IT_LSIRDY ((uint8_t)0x01)
|
||||
#define RCC_IT_LSERDY ((uint8_t)0x02)
|
||||
#define RCC_IT_HSIRDY ((uint8_t)0x04)
|
||||
#define RCC_IT_HSERDY ((uint8_t)0x08)
|
||||
#define RCC_IT_PLLRDY ((uint8_t)0x10)
|
||||
#define RCC_IT_CSS ((uint8_t)0x80)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))
|
||||
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))
|
||||
#else
|
||||
#define RCC_IT_PLL2RDY ((uint8_t)0x20)
|
||||
#define RCC_IT_PLL3RDY ((uint8_t)0x40)
|
||||
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
|
||||
((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY))
|
||||
#define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00)
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
/** @defgroup USB_Device_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)
|
||||
#define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \
|
||||
((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#else
|
||||
/** @defgroup USB_OTG_FS_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00)
|
||||
#define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \
|
||||
((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
/** @defgroup I2S2_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00)
|
||||
#define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \
|
||||
((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S3_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00)
|
||||
#define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \
|
||||
((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/** @defgroup ADC_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PCLK2_Div2 ((uint32_t)0x00000000)
|
||||
#define RCC_PCLK2_Div4 ((uint32_t)0x00004000)
|
||||
#define RCC_PCLK2_Div6 ((uint32_t)0x00008000)
|
||||
#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
|
||||
#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \
|
||||
((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup LSE_configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_LSE_OFF ((uint8_t)0x00)
|
||||
#define RCC_LSE_ON ((uint8_t)0x01)
|
||||
#define RCC_LSE_Bypass ((uint8_t)0x04)
|
||||
#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
|
||||
((LSE) == RCC_LSE_Bypass))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RTC_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
|
||||
#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
|
||||
#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)
|
||||
#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_LSI) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_HSE_Div128))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
|
||||
#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
|
||||
#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
|
||||
#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
|
||||
#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
|
||||
#define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
|
||||
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))
|
||||
#else
|
||||
#define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
|
||||
#define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
|
||||
#define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
|
||||
#define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
|
||||
|
||||
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00))
|
||||
#define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00))
|
||||
#endif /* STM32F10X_CL */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB2_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
|
||||
#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
|
||||
#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
|
||||
#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
|
||||
#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
|
||||
#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
|
||||
#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
|
||||
#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
|
||||
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
|
||||
#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
|
||||
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
|
||||
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
|
||||
#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
|
||||
#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
|
||||
#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
|
||||
#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000)
|
||||
#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000)
|
||||
#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000)
|
||||
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)
|
||||
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)
|
||||
#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000)
|
||||
|
||||
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
|
||||
#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
|
||||
#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
|
||||
#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
|
||||
#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
|
||||
#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
|
||||
#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
|
||||
#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
|
||||
#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
|
||||
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
|
||||
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
|
||||
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
|
||||
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
|
||||
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
|
||||
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
|
||||
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
|
||||
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
|
||||
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
|
||||
#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
|
||||
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
|
||||
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
|
||||
#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
|
||||
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
|
||||
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
|
||||
#define RCC_APB1Periph_CEC ((uint32_t)0x40000000)
|
||||
|
||||
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Clock_source_to_output_on_MCO_pin
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_MCO_NoClock ((uint8_t)0x00)
|
||||
#define RCC_MCO_SYSCLK ((uint8_t)0x04)
|
||||
#define RCC_MCO_HSI ((uint8_t)0x05)
|
||||
#define RCC_MCO_HSE ((uint8_t)0x06)
|
||||
#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||
((MCO) == RCC_MCO_PLLCLK_Div2))
|
||||
#else
|
||||
#define RCC_MCO_PLL2CLK ((uint8_t)0x08)
|
||||
#define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09)
|
||||
#define RCC_MCO_XT1 ((uint8_t)0x0A)
|
||||
#define RCC_MCO_PLL3CLK ((uint8_t)0x0B)
|
||||
|
||||
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||
((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \
|
||||
((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \
|
||||
((MCO) == RCC_MCO_PLL3CLK))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
|
||||
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
|
||||
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
|
||||
#define RCC_FLAG_LSERDY ((uint8_t)0x41)
|
||||
#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
|
||||
#define RCC_FLAG_PINRST ((uint8_t)0x7A)
|
||||
#define RCC_FLAG_PORRST ((uint8_t)0x7B)
|
||||
#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
|
||||
#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
|
||||
#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
|
||||
#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_LPWRRST))
|
||||
#else
|
||||
#define RCC_FLAG_PLL2RDY ((uint8_t)0x3B)
|
||||
#define RCC_FLAG_PLL3RDY ((uint8_t)0x3D)
|
||||
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \
|
||||
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_LPWRRST))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void RCC_DeInit(void);
|
||||
void RCC_HSEConfig(uint32_t RCC_HSE);
|
||||
ErrorStatus RCC_WaitForHSEStartUp(void);
|
||||
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
|
||||
void RCC_HSICmd(FunctionalState NewState);
|
||||
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
|
||||
void RCC_PLLCmd(FunctionalState NewState);
|
||||
|
||||
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||
void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div);
|
||||
#endif
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div);
|
||||
void RCC_PLL2Config(uint32_t RCC_PLL2Mul);
|
||||
void RCC_PLL2Cmd(FunctionalState NewState);
|
||||
void RCC_PLL3Config(uint32_t RCC_PLL3Mul);
|
||||
void RCC_PLL3Cmd(FunctionalState NewState);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
|
||||
uint8_t RCC_GetSYSCLKSource(void);
|
||||
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
|
||||
void RCC_PCLK1Config(uint32_t RCC_HCLK);
|
||||
void RCC_PCLK2Config(uint32_t RCC_HCLK);
|
||||
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
|
||||
#else
|
||||
void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource);
|
||||
void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_LSEConfig(uint8_t RCC_LSE);
|
||||
void RCC_LSICmd(FunctionalState NewState);
|
||||
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
|
||||
void RCC_RTCCLKCmd(FunctionalState NewState);
|
||||
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
|
||||
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_BackupResetCmd(FunctionalState NewState);
|
||||
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
|
||||
void RCC_MCOConfig(uint8_t RCC_MCO);
|
||||
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
|
||||
void RCC_ClearFlag(void);
|
||||
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
|
||||
void RCC_ClearITPendingBit(uint8_t RCC_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_RCC_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,487 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the SPI firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_SPI_H
|
||||
#define __STM32F10x_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
||||
This parameter can be a value of @ref SPI_data_direction */
|
||||
|
||||
uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_mode */
|
||||
|
||||
uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
|
||||
uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
|
||||
}SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2S Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
|
||||
This parameter can be a value of @ref I2S_Mode */
|
||||
|
||||
uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Standard */
|
||||
|
||||
uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Data_Format */
|
||||
|
||||
uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
||||
This parameter can be a value of @ref I2S_MCLK_Output */
|
||||
|
||||
uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Audio_Frequency */
|
||||
|
||||
uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
|
||||
This parameter can be a value of @ref I2S_Clock_Polarity */
|
||||
}I2S_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
|
||||
((PERIPH) == SPI2) || \
|
||||
((PERIPH) == SPI3))
|
||||
|
||||
#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
|
||||
((PERIPH) == SPI3))
|
||||
|
||||
/** @defgroup SPI_data_direction
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
|
||||
#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
|
||||
#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
|
||||
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
|
||||
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
||||
((MODE) == SPI_Direction_2Lines_RxOnly) || \
|
||||
((MODE) == SPI_Direction_1Line_Rx) || \
|
||||
((MODE) == SPI_Direction_1Line_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Mode_Master ((uint16_t)0x0104)
|
||||
#define SPI_Mode_Slave ((uint16_t)0x0000)
|
||||
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
||||
((MODE) == SPI_Mode_Slave))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_data_size
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_DataSize_16b ((uint16_t)0x0800)
|
||||
#define SPI_DataSize_8b ((uint16_t)0x0000)
|
||||
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
||||
((DATASIZE) == SPI_DataSize_8b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPOL_Low ((uint16_t)0x0000)
|
||||
#define SPI_CPOL_High ((uint16_t)0x0002)
|
||||
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
||||
((CPOL) == SPI_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define SPI_CPHA_2Edge ((uint16_t)0x0001)
|
||||
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
||||
((CPHA) == SPI_CPHA_2Edge))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSS_Soft ((uint16_t)0x0200)
|
||||
#define SPI_NSS_Hard ((uint16_t)0x0000)
|
||||
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
|
||||
((NSS) == SPI_NSS_Hard))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
|
||||
#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
|
||||
#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
|
||||
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
|
||||
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
|
||||
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
|
||||
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
|
||||
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_256))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_FirstBit_MSB ((uint16_t)0x0000)
|
||||
#define SPI_FirstBit_LSB ((uint16_t)0x0080)
|
||||
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
|
||||
((BIT) == SPI_FirstBit_LSB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_Mode_SlaveTx ((uint16_t)0x0000)
|
||||
#define I2S_Mode_SlaveRx ((uint16_t)0x0100)
|
||||
#define I2S_Mode_MasterTx ((uint16_t)0x0200)
|
||||
#define I2S_Mode_MasterRx ((uint16_t)0x0300)
|
||||
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
|
||||
((MODE) == I2S_Mode_SlaveRx) || \
|
||||
((MODE) == I2S_Mode_MasterTx) || \
|
||||
((MODE) == I2S_Mode_MasterRx) )
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Standard
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_Standard_Phillips ((uint16_t)0x0000)
|
||||
#define I2S_Standard_MSB ((uint16_t)0x0010)
|
||||
#define I2S_Standard_LSB ((uint16_t)0x0020)
|
||||
#define I2S_Standard_PCMShort ((uint16_t)0x0030)
|
||||
#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
|
||||
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
|
||||
((STANDARD) == I2S_Standard_MSB) || \
|
||||
((STANDARD) == I2S_Standard_LSB) || \
|
||||
((STANDARD) == I2S_Standard_PCMShort) || \
|
||||
((STANDARD) == I2S_Standard_PCMLong))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Data_Format
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_DataFormat_16b ((uint16_t)0x0000)
|
||||
#define I2S_DataFormat_16bextended ((uint16_t)0x0001)
|
||||
#define I2S_DataFormat_24b ((uint16_t)0x0003)
|
||||
#define I2S_DataFormat_32b ((uint16_t)0x0005)
|
||||
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
|
||||
((FORMAT) == I2S_DataFormat_16bextended) || \
|
||||
((FORMAT) == I2S_DataFormat_24b) || \
|
||||
((FORMAT) == I2S_DataFormat_32b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_MCLK_Output
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
|
||||
#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
|
||||
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
|
||||
((OUTPUT) == I2S_MCLKOutput_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Audio_Frequency
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_AudioFreq_192k ((uint32_t)192000)
|
||||
#define I2S_AudioFreq_96k ((uint32_t)96000)
|
||||
#define I2S_AudioFreq_48k ((uint32_t)48000)
|
||||
#define I2S_AudioFreq_44k ((uint32_t)44100)
|
||||
#define I2S_AudioFreq_32k ((uint32_t)32000)
|
||||
#define I2S_AudioFreq_22k ((uint32_t)22050)
|
||||
#define I2S_AudioFreq_16k ((uint32_t)16000)
|
||||
#define I2S_AudioFreq_11k ((uint32_t)11025)
|
||||
#define I2S_AudioFreq_8k ((uint32_t)8000)
|
||||
#define I2S_AudioFreq_Default ((uint32_t)2)
|
||||
|
||||
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
|
||||
((FREQ) <= I2S_AudioFreq_192k)) || \
|
||||
((FREQ) == I2S_AudioFreq_Default))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_CPOL_Low ((uint16_t)0x0000)
|
||||
#define I2S_CPOL_High ((uint16_t)0x0008)
|
||||
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
|
||||
((CPOL) == I2S_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_DMA_transfer_requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
|
||||
#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
|
||||
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_NSS_internal_software_management
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
|
||||
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
|
||||
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
|
||||
((INTERNAL) == SPI_NSSInternalSoft_Reset))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Transmit_Receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CRC_Tx ((uint8_t)0x00)
|
||||
#define SPI_CRC_Rx ((uint8_t)0x01)
|
||||
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_direction_transmit_receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
|
||||
#define SPI_Direction_Tx ((uint16_t)0x4000)
|
||||
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
|
||||
((DIRECTION) == SPI_Direction_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_IT_TXE ((uint8_t)0x71)
|
||||
#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
|
||||
#define SPI_I2S_IT_ERR ((uint8_t)0x50)
|
||||
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
|
||||
((IT) == SPI_I2S_IT_RXNE) || \
|
||||
((IT) == SPI_I2S_IT_ERR))
|
||||
#define SPI_I2S_IT_OVR ((uint8_t)0x56)
|
||||
#define SPI_IT_MODF ((uint8_t)0x55)
|
||||
#define SPI_IT_CRCERR ((uint8_t)0x54)
|
||||
#define I2S_IT_UDR ((uint8_t)0x53)
|
||||
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
|
||||
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
|
||||
((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
|
||||
((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
|
||||
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
|
||||
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
|
||||
#define I2S_FLAG_UDR ((uint16_t)0x0008)
|
||||
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
|
||||
#define SPI_FLAG_MODF ((uint16_t)0x0020)
|
||||
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
|
||||
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
|
||||
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
|
||||
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
|
||||
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
|
||||
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
|
||||
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_polynomial
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
||||
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
||||
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
|
||||
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
|
||||
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
||||
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
||||
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32F10x_SPI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,412 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_usart.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the USART
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_USART_H
|
||||
#define __STM32F10x_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief USART Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
- IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
|
||||
- FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
|
||||
|
||||
uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USART_Word_Length */
|
||||
|
||||
uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref USART_Stop_Bits */
|
||||
|
||||
uint16_t USART_Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref USART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Mode */
|
||||
|
||||
uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
|
||||
or disabled.
|
||||
This parameter can be a value of @ref USART_Hardware_Flow_Control */
|
||||
} USART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USART Clock Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Clock */
|
||||
|
||||
uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
|
||||
This parameter can be a value of @ref USART_Clock_Polarity */
|
||||
|
||||
uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
|
||||
This parameter can be a value of @ref USART_Clock_Phase */
|
||||
|
||||
uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||
This parameter can be a value of @ref USART_Last_Bit */
|
||||
} USART_ClockInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3) || \
|
||||
((PERIPH) == UART4) || \
|
||||
((PERIPH) == UART5))
|
||||
|
||||
#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3))
|
||||
|
||||
#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3) || \
|
||||
((PERIPH) == UART4))
|
||||
/** @defgroup USART_Word_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WordLength_8b ((uint16_t)0x0000)
|
||||
#define USART_WordLength_9b ((uint16_t)0x1000)
|
||||
|
||||
#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
|
||||
((LENGTH) == USART_WordLength_9b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Stop_Bits
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_StopBits_1 ((uint16_t)0x0000)
|
||||
#define USART_StopBits_0_5 ((uint16_t)0x1000)
|
||||
#define USART_StopBits_2 ((uint16_t)0x2000)
|
||||
#define USART_StopBits_1_5 ((uint16_t)0x3000)
|
||||
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
|
||||
((STOPBITS) == USART_StopBits_0_5) || \
|
||||
((STOPBITS) == USART_StopBits_2) || \
|
||||
((STOPBITS) == USART_StopBits_1_5))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Parity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Parity_No ((uint16_t)0x0000)
|
||||
#define USART_Parity_Even ((uint16_t)0x0400)
|
||||
#define USART_Parity_Odd ((uint16_t)0x0600)
|
||||
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
|
||||
((PARITY) == USART_Parity_Even) || \
|
||||
((PARITY) == USART_Parity_Odd))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Mode_Rx ((uint16_t)0x0004)
|
||||
#define USART_Mode_Tx ((uint16_t)0x0008)
|
||||
#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Hardware_Flow_Control
|
||||
* @{
|
||||
*/
|
||||
#define USART_HardwareFlowControl_None ((uint16_t)0x0000)
|
||||
#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
|
||||
#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
|
||||
#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
|
||||
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||
(((CONTROL) == USART_HardwareFlowControl_None) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_CTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock
|
||||
* @{
|
||||
*/
|
||||
#define USART_Clock_Disable ((uint16_t)0x0000)
|
||||
#define USART_Clock_Enable ((uint16_t)0x0800)
|
||||
#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
|
||||
((CLOCK) == USART_Clock_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPOL_Low ((uint16_t)0x0000)
|
||||
#define USART_CPOL_High ((uint16_t)0x0400)
|
||||
#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define USART_CPHA_2Edge ((uint16_t)0x0200)
|
||||
#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Last_Bit
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LastBit_Disable ((uint16_t)0x0000)
|
||||
#define USART_LastBit_Enable ((uint16_t)0x0100)
|
||||
#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
|
||||
((LASTBIT) == USART_LastBit_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Interrupt_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IT_PE ((uint16_t)0x0028)
|
||||
#define USART_IT_TXE ((uint16_t)0x0727)
|
||||
#define USART_IT_TC ((uint16_t)0x0626)
|
||||
#define USART_IT_RXNE ((uint16_t)0x0525)
|
||||
#define USART_IT_IDLE ((uint16_t)0x0424)
|
||||
#define USART_IT_LBD ((uint16_t)0x0846)
|
||||
#define USART_IT_CTS ((uint16_t)0x096A)
|
||||
#define USART_IT_ERR ((uint16_t)0x0060)
|
||||
#define USART_IT_ORE ((uint16_t)0x0360)
|
||||
#define USART_IT_NE ((uint16_t)0x0260)
|
||||
#define USART_IT_FE ((uint16_t)0x0160)
|
||||
#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
|
||||
#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
|
||||
((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
|
||||
#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_DMA_Requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_DMAReq_Tx ((uint16_t)0x0080)
|
||||
#define USART_DMAReq_Rx ((uint16_t)0x0040)
|
||||
#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_WakeUp_methods
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WakeUp_IdleLine ((uint16_t)0x0000)
|
||||
#define USART_WakeUp_AddressMark ((uint16_t)0x0800)
|
||||
#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
|
||||
((WAKEUP) == USART_WakeUp_AddressMark))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LIN_Break_Detection_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
|
||||
#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
|
||||
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
|
||||
(((LENGTH) == USART_LINBreakDetectLength_10b) || \
|
||||
((LENGTH) == USART_LINBreakDetectLength_11b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_IrDA_Low_Power
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IrDAMode_LowPower ((uint16_t)0x0004)
|
||||
#define USART_IrDAMode_Normal ((uint16_t)0x0000)
|
||||
#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
|
||||
((MODE) == USART_IrDAMode_Normal))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Flags
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_FLAG_CTS ((uint16_t)0x0200)
|
||||
#define USART_FLAG_LBD ((uint16_t)0x0100)
|
||||
#define USART_FLAG_TXE ((uint16_t)0x0080)
|
||||
#define USART_FLAG_TC ((uint16_t)0x0040)
|
||||
#define USART_FLAG_RXNE ((uint16_t)0x0020)
|
||||
#define USART_FLAG_IDLE ((uint16_t)0x0010)
|
||||
#define USART_FLAG_ORE ((uint16_t)0x0008)
|
||||
#define USART_FLAG_NE ((uint16_t)0x0004)
|
||||
#define USART_FLAG_FE ((uint16_t)0x0002)
|
||||
#define USART_FLAG_PE ((uint16_t)0x0001)
|
||||
#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
|
||||
((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
|
||||
((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
|
||||
((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
|
||||
((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
|
||||
|
||||
#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
||||
#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
|
||||
((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
|
||||
|| ((USART_FLAG) != USART_FLAG_CTS))
|
||||
#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
|
||||
#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
|
||||
#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void USART_DeInit(USART_TypeDef* USARTx);
|
||||
void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
|
||||
void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
|
||||
void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
|
||||
void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
|
||||
void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
|
||||
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
|
||||
uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
|
||||
void USART_SendBreak(USART_TypeDef* USARTx);
|
||||
void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
|
||||
void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
|
||||
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
|
||||
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_USART_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,650 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file provides all the GPIO firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_gpio.h"
|
||||
#include "stm32f10x_rcc.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO
|
||||
* @brief GPIO driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* ------------ RCC registers bit address in the alias region ----------------*/
|
||||
#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
|
||||
|
||||
/* --- EVENTCR Register -----*/
|
||||
|
||||
/* Alias word address of EVOE bit */
|
||||
#define EVCR_OFFSET (AFIO_OFFSET + 0x00)
|
||||
#define EVOE_BitNumber ((uint8_t)0x07)
|
||||
#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
|
||||
|
||||
|
||||
/* --- MAPR Register ---*/
|
||||
/* Alias word address of MII_RMII_SEL bit */
|
||||
#define MAPR_OFFSET (AFIO_OFFSET + 0x04)
|
||||
#define MII_RMII_SEL_BitNumber ((u8)0x17)
|
||||
#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
|
||||
|
||||
|
||||
#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
|
||||
#define LSB_MASK ((uint16_t)0xFFFF)
|
||||
#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
|
||||
#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
|
||||
#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
|
||||
#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the GPIOx peripheral registers to their default reset values.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
if (GPIOx == GPIOA)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOB)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOC)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOD)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOE)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOF)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (GPIOx == GPIOG)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the Alternate Functions (remap, event control
|
||||
* and EXTI configuration) registers to their default reset values.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_AFIODeInit(void)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the GPIOx peripheral according to the specified
|
||||
* parameters in the GPIO_InitStruct.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
|
||||
* contains the configuration information for the specified GPIO peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
|
||||
uint32_t tmpreg = 0x00, pinmask = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
|
||||
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
|
||||
|
||||
/*---------------------------- GPIO Mode Configuration -----------------------*/
|
||||
currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
|
||||
if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
|
||||
/* Output mode */
|
||||
currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
|
||||
}
|
||||
/*---------------------------- GPIO CRL Configuration ------------------------*/
|
||||
/* Configure the eight low port pins */
|
||||
if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
|
||||
{
|
||||
tmpreg = GPIOx->CRL;
|
||||
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
||||
{
|
||||
pos = ((uint32_t)0x01) << pinpos;
|
||||
/* Get the port pins position */
|
||||
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
|
||||
if (currentpin == pos)
|
||||
{
|
||||
pos = pinpos << 2;
|
||||
/* Clear the corresponding low control register bits */
|
||||
pinmask = ((uint32_t)0x0F) << pos;
|
||||
tmpreg &= ~pinmask;
|
||||
/* Write the mode configuration in the corresponding bits */
|
||||
tmpreg |= (currentmode << pos);
|
||||
/* Reset the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
||||
{
|
||||
GPIOx->BRR = (((uint32_t)0x01) << pinpos);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
||||
{
|
||||
GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
GPIOx->CRL = tmpreg;
|
||||
}
|
||||
/*---------------------------- GPIO CRH Configuration ------------------------*/
|
||||
/* Configure the eight high port pins */
|
||||
if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
|
||||
{
|
||||
tmpreg = GPIOx->CRH;
|
||||
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
||||
{
|
||||
pos = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
/* Get the port pins position */
|
||||
currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
|
||||
if (currentpin == pos)
|
||||
{
|
||||
pos = pinpos << 2;
|
||||
/* Clear the corresponding high control register bits */
|
||||
pinmask = ((uint32_t)0x0F) << pos;
|
||||
tmpreg &= ~pinmask;
|
||||
/* Write the mode configuration in the corresponding bits */
|
||||
tmpreg |= (currentmode << pos);
|
||||
/* Reset the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
||||
{
|
||||
GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
}
|
||||
/* Set the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
||||
{
|
||||
GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
}
|
||||
}
|
||||
}
|
||||
GPIOx->CRH = tmpreg;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each GPIO_InitStruct member with its default value.
|
||||
* @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
|
||||
* be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
/* Reset GPIO init structure parameters values */
|
||||
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
|
||||
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified input port pin.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The input port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO input data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval GPIO input data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->IDR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified output data port bit.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The output port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO output data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval GPIO output data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->ODR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BRR = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets or clears the selected data port bit.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be one of GPIO_Pin_x where x can be (0..15).
|
||||
* @param BitVal: specifies the value to be written to the selected bit.
|
||||
* This parameter can be one of the BitAction enum values:
|
||||
* @arg Bit_RESET: to clear the port pin
|
||||
* @arg Bit_SET: to set the port pin
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
assert_param(IS_GPIO_BIT_ACTION(BitVal));
|
||||
|
||||
if (BitVal != Bit_RESET)
|
||||
{
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOx->BRR = GPIO_Pin;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes data to the specified GPIO data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param PortVal: specifies the value to be written to the port output data register.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
GPIOx->ODR = PortVal;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Locks GPIO Pins configuration registers.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint32_t tmp = 0x00010000;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
tmp |= GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Reset LCKK bit */
|
||||
GPIOx->LCKR = GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the GPIO pin used as Event output.
|
||||
* @param GPIO_PortSource: selects the GPIO port to be used as source
|
||||
* for Event output.
|
||||
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
|
||||
* @param GPIO_PinSource: specifies the pin for the Event output.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
||||
{
|
||||
uint32_t tmpreg = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
|
||||
tmpreg = AFIO->EVCR;
|
||||
/* Clear the PORT[6:4] and PIN[3:0] bits */
|
||||
tmpreg &= EVCR_PORTPINCONFIG_MASK;
|
||||
tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
|
||||
tmpreg |= GPIO_PinSource;
|
||||
AFIO->EVCR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Event Output.
|
||||
* @param NewState: new state of the Event output.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EventOutputCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
*(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Changes the mapping of the specified pin.
|
||||
* @param GPIO_Remap: selects the pin to remap.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping
|
||||
* @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping
|
||||
* @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping
|
||||
* @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping
|
||||
* @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration
|
||||
* @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping
|
||||
* @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping
|
||||
* @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping
|
||||
* @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping
|
||||
* @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
|
||||
* @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled
|
||||
* @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)
|
||||
* @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
|
||||
* When the SPI3/I2S3 is remapped using this function, the SWJ is configured
|
||||
* to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST.
|
||||
* @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
||||
* to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
|
||||
* If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to
|
||||
* Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
|
||||
* @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
|
||||
* @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices)
|
||||
* @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
||||
* only for High density Value line devices)
|
||||
* @param NewState: new state of the port pin remapping.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
|
||||
{
|
||||
uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_REMAP(GPIO_Remap));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
||||
{
|
||||
tmpreg = AFIO->MAPR2;
|
||||
}
|
||||
else
|
||||
{
|
||||
tmpreg = AFIO->MAPR;
|
||||
}
|
||||
|
||||
tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
|
||||
tmp = GPIO_Remap & LSB_MASK;
|
||||
|
||||
if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
|
||||
{
|
||||
tmpreg &= DBGAFR_SWJCFG_MASK;
|
||||
AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
|
||||
{
|
||||
tmp1 = ((uint32_t)0x03) << tmpmask;
|
||||
tmpreg &= ~tmp1;
|
||||
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
|
||||
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
|
||||
}
|
||||
|
||||
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
||||
{
|
||||
AFIO->MAPR2 = tmpreg;
|
||||
}
|
||||
else
|
||||
{
|
||||
AFIO->MAPR = tmpreg;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the GPIO pin used as EXTI Line.
|
||||
* @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
|
||||
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
|
||||
* @param GPIO_PinSource: specifies the EXTI line to be configured.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
||||
{
|
||||
uint32_t tmp = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
|
||||
tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
|
||||
AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
|
||||
AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the Ethernet media interface.
|
||||
* @note This function applies only to STM32 Connectivity line devices.
|
||||
* @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPIO_ETH_MediaInterface_MII: MII mode
|
||||
* @arg GPIO_ETH_MediaInterface_RMII: RMII mode
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
|
||||
{
|
||||
assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
|
||||
|
||||
/* Configure MII_RMII selection bit */
|
||||
*(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,908 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_spi.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file provides all the SPI firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_spi.h"
|
||||
#include "stm32f10x_rcc.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI
|
||||
* @brief SPI driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SPI_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* SPI SPE mask */
|
||||
#define CR1_SPE_Set ((uint16_t)0x0040)
|
||||
#define CR1_SPE_Reset ((uint16_t)0xFFBF)
|
||||
|
||||
/* I2S I2SE mask */
|
||||
#define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
|
||||
#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
|
||||
|
||||
/* SPI CRCNext mask */
|
||||
#define CR1_CRCNext_Set ((uint16_t)0x1000)
|
||||
|
||||
/* SPI CRCEN mask */
|
||||
#define CR1_CRCEN_Set ((uint16_t)0x2000)
|
||||
#define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
|
||||
|
||||
/* SPI SSOE mask */
|
||||
#define CR2_SSOE_Set ((uint16_t)0x0004)
|
||||
#define CR2_SSOE_Reset ((uint16_t)0xFFFB)
|
||||
|
||||
/* SPI registers Masks */
|
||||
#define CR1_CLEAR_Mask ((uint16_t)0x3040)
|
||||
#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
|
||||
|
||||
/* SPI or I2S mode selection masks */
|
||||
#define SPI_Mode_Select ((uint16_t)0xF7FF)
|
||||
#define I2S_Mode_Select ((uint16_t)0x0800)
|
||||
|
||||
/* I2S clock source selection masks */
|
||||
#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
|
||||
#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
|
||||
#define I2S_MUL_MASK ((uint32_t)(0x0000F000))
|
||||
#define I2S_DIV_MASK ((uint32_t)(0x000000F0))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the SPIx peripheral registers to their default
|
||||
* reset values (Affects also the I2Ss).
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
if (SPIx == SPI1)
|
||||
{
|
||||
/* Enable SPI1 reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
|
||||
/* Release SPI1 from reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
|
||||
}
|
||||
else if (SPIx == SPI2)
|
||||
{
|
||||
/* Enable SPI2 reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
/* Release SPI2 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (SPIx == SPI3)
|
||||
{
|
||||
/* Enable SPI3 reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
|
||||
/* Release SPI3 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPIx peripheral according to the specified
|
||||
* parameters in the SPI_InitStruct.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
uint16_t tmpreg = 0;
|
||||
|
||||
/* check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Check the SPI parameters */
|
||||
assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
|
||||
assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
|
||||
assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
|
||||
assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
|
||||
assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
|
||||
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
|
||||
assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
|
||||
assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
|
||||
|
||||
/*---------------------------- SPIx CR1 Configuration ------------------------*/
|
||||
/* Get the SPIx CR1 value */
|
||||
tmpreg = SPIx->CR1;
|
||||
/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
|
||||
tmpreg &= CR1_CLEAR_Mask;
|
||||
/* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
|
||||
master/salve mode, CPOL and CPHA */
|
||||
/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
|
||||
/* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
|
||||
/* Set LSBFirst bit according to SPI_FirstBit value */
|
||||
/* Set BR bits according to SPI_BaudRatePrescaler value */
|
||||
/* Set CPOL bit according to SPI_CPOL value */
|
||||
/* Set CPHA bit according to SPI_CPHA value */
|
||||
tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
|
||||
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
|
||||
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
|
||||
/* Write to SPIx CR1 */
|
||||
SPIx->CR1 = tmpreg;
|
||||
|
||||
/* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
|
||||
SPIx->I2SCFGR &= SPI_Mode_Select;
|
||||
|
||||
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
|
||||
/* Write to SPIx CRCPOLY */
|
||||
SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPIx peripheral according to the specified
|
||||
* parameters in the I2S_InitStruct.
|
||||
* @param SPIx: where x can be 2 or 3 to select the SPI peripheral
|
||||
* (configured in I2S mode).
|
||||
* @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SPI peripheral
|
||||
* configured in I2S mode.
|
||||
* @note
|
||||
* The function calculates the optimal prescaler needed to obtain the most
|
||||
* accurate audio frequency (depending on the I2S clock source, the PLL values
|
||||
* and the product configuration). But in case the prescaler value is greater
|
||||
* than 511, the default value (0x02) will be configured instead. *
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
|
||||
{
|
||||
uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
|
||||
uint32_t tmp = 0;
|
||||
RCC_ClocksTypeDef RCC_Clocks;
|
||||
uint32_t sourceclock = 0;
|
||||
|
||||
/* Check the I2S parameters */
|
||||
assert_param(IS_SPI_23_PERIPH(SPIx));
|
||||
assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
|
||||
assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
|
||||
assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
|
||||
assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
|
||||
assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
|
||||
assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
|
||||
|
||||
/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
|
||||
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
||||
SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
|
||||
SPIx->I2SPR = 0x0002;
|
||||
|
||||
/* Get the I2SCFGR register value */
|
||||
tmpreg = SPIx->I2SCFGR;
|
||||
|
||||
/* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
|
||||
if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
|
||||
{
|
||||
i2sodd = (uint16_t)0;
|
||||
i2sdiv = (uint16_t)2;
|
||||
}
|
||||
/* If the requested audio frequency is not the default, compute the prescaler */
|
||||
else
|
||||
{
|
||||
/* Check the frame length (For the Prescaler computing) */
|
||||
if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
|
||||
{
|
||||
/* Packet length is 16 bits */
|
||||
packetlength = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Packet length is 32 bits */
|
||||
packetlength = 2;
|
||||
}
|
||||
|
||||
/* Get the I2S clock source mask depending on the peripheral number */
|
||||
if(((uint32_t)SPIx) == SPI2_BASE)
|
||||
{
|
||||
/* The mask is relative to I2S2 */
|
||||
tmp = I2S2_CLOCK_SRC;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The mask is relative to I2S3 */
|
||||
tmp = I2S3_CLOCK_SRC;
|
||||
}
|
||||
|
||||
/* Check the I2S clock source configuration depending on the Device:
|
||||
Only Connectivity line devices have the PLL3 VCO clock */
|
||||
#ifdef STM32F10X_CL
|
||||
if((RCC->CFGR2 & tmp) != 0)
|
||||
{
|
||||
/* Get the configuration bits of RCC PLL3 multiplier */
|
||||
tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12);
|
||||
|
||||
/* Get the value of the PLL3 multiplier */
|
||||
if((tmp > 5) && (tmp < 15))
|
||||
{
|
||||
/* Multiplier is between 8 and 14 (value 15 is forbidden) */
|
||||
tmp += 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (tmp == 15)
|
||||
{
|
||||
/* Multiplier is 20 */
|
||||
tmp = 20;
|
||||
}
|
||||
}
|
||||
/* Get the PREDIV2 value */
|
||||
sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1);
|
||||
|
||||
/* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */
|
||||
sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* I2S Clock source is System clock: Get System Clock frequency */
|
||||
RCC_GetClocksFreq(&RCC_Clocks);
|
||||
|
||||
/* Get the source clock value: based on System Clock value */
|
||||
sourceclock = RCC_Clocks.SYSCLK_Frequency;
|
||||
}
|
||||
#else /* STM32F10X_HD */
|
||||
/* I2S Clock source is System clock: Get System Clock frequency */
|
||||
RCC_GetClocksFreq(&RCC_Clocks);
|
||||
|
||||
/* Get the source clock value: based on System Clock value */
|
||||
sourceclock = RCC_Clocks.SYSCLK_Frequency;
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/* Compute the Real divider depending on the MCLK output state with a floating point */
|
||||
if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
|
||||
{
|
||||
/* MCLK output is enabled */
|
||||
tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* MCLK output is disabled */
|
||||
tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
|
||||
}
|
||||
|
||||
/* Remove the floating point */
|
||||
tmp = tmp / 10;
|
||||
|
||||
/* Check the parity of the divider */
|
||||
i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
|
||||
|
||||
/* Compute the i2sdiv prescaler */
|
||||
i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
|
||||
|
||||
/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
|
||||
i2sodd = (uint16_t) (i2sodd << 8);
|
||||
}
|
||||
|
||||
/* Test if the divider is 1 or 0 or greater than 0xFF */
|
||||
if ((i2sdiv < 2) || (i2sdiv > 0xFF))
|
||||
{
|
||||
/* Set the default values */
|
||||
i2sdiv = 2;
|
||||
i2sodd = 0;
|
||||
}
|
||||
|
||||
/* Write to SPIx I2SPR register the computed value */
|
||||
SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
|
||||
|
||||
/* Configure the I2S with the SPI_InitStruct values */
|
||||
tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \
|
||||
(uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
|
||||
(uint16_t)I2S_InitStruct->I2S_CPOL))));
|
||||
|
||||
/* Write to SPIx I2SCFGR */
|
||||
SPIx->I2SCFGR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each SPI_InitStruct member with its default value.
|
||||
* @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
/*--------------- Reset SPI init structure parameters values -----------------*/
|
||||
/* Initialize the SPI_Direction member */
|
||||
SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
/* initialize the SPI_Mode member */
|
||||
SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
|
||||
/* initialize the SPI_DataSize member */
|
||||
SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
|
||||
/* Initialize the SPI_CPOL member */
|
||||
SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
|
||||
/* Initialize the SPI_CPHA member */
|
||||
SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
|
||||
/* Initialize the SPI_NSS member */
|
||||
SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
|
||||
/* Initialize the SPI_BaudRatePrescaler member */
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
|
||||
/* Initialize the SPI_FirstBit member */
|
||||
SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
/* Initialize the SPI_CRCPolynomial member */
|
||||
SPI_InitStruct->SPI_CRCPolynomial = 7;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each I2S_InitStruct member with its default value.
|
||||
* @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
|
||||
{
|
||||
/*--------------- Reset I2S init structure parameters values -----------------*/
|
||||
/* Initialize the I2S_Mode member */
|
||||
I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
|
||||
|
||||
/* Initialize the I2S_Standard member */
|
||||
I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
|
||||
|
||||
/* Initialize the I2S_DataFormat member */
|
||||
I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
|
||||
|
||||
/* Initialize the I2S_MCLKOutput member */
|
||||
I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
|
||||
|
||||
/* Initialize the I2S_AudioFreq member */
|
||||
I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
|
||||
|
||||
/* Initialize the I2S_CPOL member */
|
||||
I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI peripheral.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI peripheral */
|
||||
SPIx->CR1 |= CR1_SPE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI peripheral */
|
||||
SPIx->CR1 &= CR1_SPE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI peripheral (in I2S mode).
|
||||
* @param SPIx: where x can be 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_23_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI peripheral (in I2S mode) */
|
||||
SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI peripheral (in I2S mode) */
|
||||
SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI/I2S interrupts.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
|
||||
* @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
|
||||
* @arg SPI_I2S_IT_ERR: Error interrupt mask
|
||||
* @param NewState: new state of the specified SPI/I2S interrupt.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
|
||||
{
|
||||
uint16_t itpos = 0, itmask = 0 ;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI/I2S IT index */
|
||||
itpos = SPI_I2S_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = (uint16_t)1 << (uint16_t)itpos;
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI/I2S interrupt */
|
||||
SPIx->CR2 |= itmask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI/I2S interrupt */
|
||||
SPIx->CR2 &= (uint16_t)~itmask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SPIx/I2Sx DMA interface.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
|
||||
* @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
|
||||
* @param NewState: new state of the selected SPI/I2S DMA transfer request.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI/I2S DMA requests */
|
||||
SPIx->CR2 |= SPI_I2S_DMAReq;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI/I2S DMA requests */
|
||||
SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmits a Data through the SPIx/I2Sx peripheral.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param Data : Data to be transmitted.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Write in the DR register the data to be sent */
|
||||
SPIx->DR = Data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @retval The value of the received data.
|
||||
*/
|
||||
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the data in the DR register */
|
||||
return SPIx->DR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures internally by software the NSS pin for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
|
||||
* @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
|
||||
if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
|
||||
{
|
||||
/* Set NSS pin internally by software */
|
||||
SPIx->CR1 |= SPI_NSSInternalSoft_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset NSS pin internally by software */
|
||||
SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SS output for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx SS output.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI SS output */
|
||||
SPIx->CR2 |= CR2_SSOE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI SS output */
|
||||
SPIx->CR2 &= CR2_SSOE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the data size for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_DataSize: specifies the SPI data size.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_DataSize_16b: Set data frame format to 16bit
|
||||
* @arg SPI_DataSize_8b: Set data frame format to 8bit
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_DataSize));
|
||||
/* Clear DFF bit */
|
||||
SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
|
||||
/* Set new DFF bit value */
|
||||
SPIx->CR1 |= SPI_DataSize;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmit the SPIx CRC value.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Enable the selected SPI CRC transmission */
|
||||
SPIx->CR1 |= CR1_CRCNext_Set;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the CRC value calculation of the transferred bytes.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx CRC value calculation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI CRC calculation */
|
||||
SPIx->CR1 |= CR1_CRCEN_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI CRC calculation */
|
||||
SPIx->CR1 &= CR1_CRCEN_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the transmit or the receive CRC register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_CRC: specifies the CRC register to be read.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_CRC_Tx: Selects Tx CRC register
|
||||
* @arg SPI_CRC_Rx: Selects Rx CRC register
|
||||
* @retval The selected CRC register value..
|
||||
*/
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
|
||||
{
|
||||
uint16_t crcreg = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_CRC(SPI_CRC));
|
||||
if (SPI_CRC != SPI_CRC_Rx)
|
||||
{
|
||||
/* Get the Tx CRC register */
|
||||
crcreg = SPIx->TXCRCR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Get the Rx CRC register */
|
||||
crcreg = SPIx->RXCRCR;
|
||||
}
|
||||
/* Return the selected CRC register */
|
||||
return crcreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the CRC Polynomial register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval The CRC Polynomial register value.
|
||||
*/
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the CRC polynomial register */
|
||||
return SPIx->CRCPR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the data transfer direction in bi-directional mode for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_Direction: specifies the data transfer direction in bi-directional mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_Direction_Tx: Selects Tx transmission direction
|
||||
* @arg SPI_Direction_Rx: Selects Rx receive direction
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DIRECTION(SPI_Direction));
|
||||
if (SPI_Direction == SPI_Direction_Tx)
|
||||
{
|
||||
/* Set the Tx only mode */
|
||||
SPIx->CR1 |= SPI_Direction_Tx;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the Rx only mode */
|
||||
SPIx->CR1 &= SPI_Direction_Rx;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI/I2S flag is set or not.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
|
||||
* @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
|
||||
* @arg SPI_I2S_FLAG_BSY: Busy flag.
|
||||
* @arg SPI_I2S_FLAG_OVR: Overrun flag.
|
||||
* @arg SPI_FLAG_MODF: Mode Fault flag.
|
||||
* @arg SPI_FLAG_CRCERR: CRC Error flag.
|
||||
* @arg I2S_FLAG_UDR: Underrun Error flag.
|
||||
* @arg I2S_FLAG_CHSIDE: Channel Side flag.
|
||||
* @retval The new state of SPI_I2S_FLAG (SET or RESET).
|
||||
*/
|
||||
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
|
||||
{
|
||||
FlagStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
|
||||
/* Check the status of the specified SPI/I2S flag */
|
||||
if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
|
||||
{
|
||||
/* SPI_I2S_FLAG is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_I2S_FLAG is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_I2S_FLAG status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) flag.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* @param SPI_I2S_FLAG: specifies the SPI flag to clear.
|
||||
* This function clears only CRCERR flag.
|
||||
* @note
|
||||
* - OVR (OverRun error) flag is cleared by software sequence: a read
|
||||
* operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
|
||||
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
|
||||
* - UDR (UnderRun error) flag is cleared by a read operation to
|
||||
* SPI_SR register (SPI_I2S_GetFlagStatus()).
|
||||
* - MODF (Mode Fault) flag is cleared by software sequence: a read/write
|
||||
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
|
||||
* write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) flag */
|
||||
SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
|
||||
* @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
|
||||
* @arg SPI_I2S_IT_OVR: Overrun interrupt.
|
||||
* @arg SPI_IT_MODF: Mode Fault interrupt.
|
||||
* @arg SPI_IT_CRCERR: CRC Error interrupt.
|
||||
* @arg I2S_IT_UDR: Underrun Error interrupt.
|
||||
* @retval The new state of SPI_I2S_IT (SET or RESET).
|
||||
*/
|
||||
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
|
||||
{
|
||||
ITStatus bitstatus = RESET;
|
||||
uint16_t itpos = 0, itmask = 0, enablestatus = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI/I2S IT index */
|
||||
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
||||
|
||||
/* Get the SPI/I2S IT mask */
|
||||
itmask = SPI_I2S_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = 0x01 << itmask;
|
||||
|
||||
/* Get the SPI_I2S_IT enable bit status */
|
||||
enablestatus = (SPIx->CR2 & itmask) ;
|
||||
|
||||
/* Check the status of the specified SPI/I2S interrupt */
|
||||
if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
|
||||
{
|
||||
/* SPI_I2S_IT is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_I2S_IT is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_I2S_IT status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
|
||||
* This function clears only CRCERR interrupt pending bit.
|
||||
* @note
|
||||
* - OVR (OverRun Error) interrupt pending bit is cleared by software
|
||||
* sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
|
||||
* followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
|
||||
* - UDR (UnderRun Error) interrupt pending bit is cleared by a read
|
||||
* operation to SPI_SR register (SPI_I2S_GetITStatus()).
|
||||
* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
|
||||
* a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
|
||||
* followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
|
||||
* the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
|
||||
{
|
||||
uint16_t itpos = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI IT index */
|
||||
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
|
||||
SPIx->SR = (uint16_t)~itpos;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,77 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 08-April-2011
|
||||
* @brief Library configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_CONF_H
|
||||
#define __STM32F10x_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
|
||||
/*#include "stm32f10x_adc.h"*/
|
||||
/*#include "stm32f10x_bkp.h"*/
|
||||
/*#include "stm32f10x_can.h"*/
|
||||
/*#include "stm32f10x_cec.h"*/
|
||||
/*#include "stm32f10x_crc.h"*/
|
||||
/*#include "stm32f10x_dac.h"*/
|
||||
/*#include "stm32f10x_dbgmcu.h"*/
|
||||
/*#include "stm32f10x_dma.h"*/
|
||||
/*#include "stm32f10x_exti.h"*/
|
||||
/*#include "stm32f10x_flash.h"*/
|
||||
/*#include "stm32f10x_fsmc.h"*/
|
||||
#include "stm32f10x_gpio.h" /* needed for configuring the SPI and UART pins */
|
||||
/*#include "stm32f10x_i2c.h"*/
|
||||
/*#include "stm32f10x_iwdg.h"*/
|
||||
/*#include "stm32f10x_pwr.h"*/
|
||||
#include "stm32f10x_rcc.h" /* needed for enabling the SPI and UART peripherals */
|
||||
/*#include "stm32f10x_rtc.h"*/
|
||||
/*#include "stm32f10x_sdio.h"*/
|
||||
#include "stm32f10x_spi.h" /* needed for low-level interfacing with SD-card */
|
||||
/*#include "stm32f10x_tim.h"*/
|
||||
#include "stm32f10x_usart.h" /* needed for UART logging during firmware updates from SD-card */
|
||||
/*#include "stm32f10x_wwdg.h"*/
|
||||
/*#include "misc.h"*/ /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function which reports
|
||||
* the name of the source file and the source line number of the call
|
||||
* that failed. If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#endif /* __STM32F10x_CONF_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,192 @@
|
|||
/*---------------------------------------------------------------------------/
|
||||
/ FatFs - FAT file system module configuration file R0.09b (C)ChaN, 2013
|
||||
/----------------------------------------------------------------------------/
|
||||
/
|
||||
/ CAUTION! Do not forget to make clean the project after any changes to
|
||||
/ the configuration options.
|
||||
/
|
||||
/----------------------------------------------------------------------------*/
|
||||
#ifndef _FFCONF
|
||||
#define _FFCONF 82786 /* Revision ID */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Functions and Buffer Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
|
||||
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
|
||||
/ object instead of the sector buffer in the individual file object for file
|
||||
/ data transfer. This reduces memory consumption 512 bytes each file object. */
|
||||
|
||||
|
||||
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
|
||||
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
|
||||
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
|
||||
/ f_truncate and useless f_getfree. */
|
||||
|
||||
|
||||
#define _FS_MINIMIZE 0 /* 0 to 3 */
|
||||
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
|
||||
/
|
||||
/ 0: Full function.
|
||||
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
|
||||
/ are removed.
|
||||
/ 2: f_opendir and f_readdir are removed in addition to 1.
|
||||
/ 3: f_lseek is removed in addition to 2. */
|
||||
|
||||
|
||||
#define _USE_STRFUNC 2 /* 0:Disable or 1-2:Enable */
|
||||
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
|
||||
|
||||
|
||||
#define _USE_MKFS 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
|
||||
|
||||
|
||||
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
|
||||
|
||||
|
||||
#define _USE_LABEL 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable volume label functions, set _USE_LAVEL to 1 */
|
||||
|
||||
|
||||
#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Locale and Namespace Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _CODE_PAGE 437
|
||||
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
|
||||
/ Incorrect setting of the code page can cause a file open failure.
|
||||
/
|
||||
/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows)
|
||||
/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows)
|
||||
/ 949 - Korean (DBCS, OEM, Windows)
|
||||
/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows)
|
||||
/ 1250 - Central Europe (Windows)
|
||||
/ 1251 - Cyrillic (Windows)
|
||||
/ 1252 - Latin 1 (Windows)
|
||||
/ 1253 - Greek (Windows)
|
||||
/ 1254 - Turkish (Windows)
|
||||
/ 1255 - Hebrew (Windows)
|
||||
/ 1256 - Arabic (Windows)
|
||||
/ 1257 - Baltic (Windows)
|
||||
/ 1258 - Vietnam (OEM, Windows)
|
||||
/ 437 - U.S. (OEM)
|
||||
/ 720 - Arabic (OEM)
|
||||
/ 737 - Greek (OEM)
|
||||
/ 775 - Baltic (OEM)
|
||||
/ 850 - Multilingual Latin 1 (OEM)
|
||||
/ 858 - Multilingual Latin 1 + Euro (OEM)
|
||||
/ 852 - Latin 2 (OEM)
|
||||
/ 855 - Cyrillic (OEM)
|
||||
/ 866 - Russian (OEM)
|
||||
/ 857 - Turkish (OEM)
|
||||
/ 862 - Hebrew (OEM)
|
||||
/ 874 - Thai (OEM, Windows)
|
||||
/ 1 - ASCII only (Valid for non LFN cfg.)
|
||||
*/
|
||||
|
||||
|
||||
#define _USE_LFN 1 /* 0 to 3 */
|
||||
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
|
||||
/* The _USE_LFN option switches the LFN support.
|
||||
/
|
||||
/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect.
|
||||
/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant.
|
||||
/ 2: Enable LFN with dynamic working buffer on the STACK.
|
||||
/ 3: Enable LFN with dynamic working buffer on the HEAP.
|
||||
/
|
||||
/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN,
|
||||
/ Unicode handling functions ff_convert() and ff_wtoupper() must be added
|
||||
/ to the project. When enable to use heap, memory control functions
|
||||
/ ff_memalloc() and ff_memfree() must be added to the project. */
|
||||
|
||||
|
||||
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
|
||||
/* To switch the character code set on FatFs API to Unicode,
|
||||
/ enable LFN feature and set _LFN_UNICODE to 1. */
|
||||
|
||||
|
||||
#define _FS_RPATH 0 /* 0 to 2 */
|
||||
/* The _FS_RPATH option configures relative path feature.
|
||||
/
|
||||
/ 0: Disable relative path feature and remove related functions.
|
||||
/ 1: Enable relative path. f_chdrive() and f_chdir() are available.
|
||||
/ 2: f_getcwd() is available in addition to 1.
|
||||
/
|
||||
/ Note that output of the f_readdir fnction is affected by this option. */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Physical Drive Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _VOLUMES 1
|
||||
/* Number of volumes (logical drives) to be used. */
|
||||
|
||||
|
||||
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
|
||||
/* Maximum sector size to be handled.
|
||||
/ Always set 512 for memory card and hard disk but a larger value may be
|
||||
/ required for on-board flash memory, floppy disk and optical disk.
|
||||
/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size
|
||||
/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */
|
||||
|
||||
|
||||
#define _MULTI_PARTITION 0 /* 0:Single partition, 1:Enable multiple partition */
|
||||
/* When set to 0, each volume is bound to the same physical drive number and
|
||||
/ it can mount only first primaly partition. When it is set to 1, each volume
|
||||
/ is tied to the partitions listed in VolToPart[]. */
|
||||
|
||||
|
||||
#define _USE_ERASE 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command
|
||||
/ should be added to the disk_ioctl functio. */
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ System Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _WORD_ACCESS 0 /* 0 or 1 */
|
||||
/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS
|
||||
/ option defines which access method is used to the word data on the FAT volume.
|
||||
/
|
||||
/ 0: Byte-by-byte access.
|
||||
/ 1: Word access. Do not choose this unless following condition is met.
|
||||
/
|
||||
/ When the byte order on the memory is big-endian or address miss-aligned word
|
||||
/ access results incorrect behavior, the _WORD_ACCESS must be set to 0.
|
||||
/ If it is not the case, the value can also be set to 1 to improve the
|
||||
/ performance and code size.
|
||||
*/
|
||||
|
||||
|
||||
/* A header file that defines sync object types on the O/S, such as
|
||||
/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */
|
||||
|
||||
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
|
||||
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
|
||||
#define _SYNC_t HANDLE /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */
|
||||
|
||||
/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module.
|
||||
/
|
||||
/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect.
|
||||
/ 1: Enable reentrancy. Also user provided synchronization handlers,
|
||||
/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj
|
||||
/ function must be added to the project. */
|
||||
|
||||
|
||||
#define _FS_LOCK 0 /* 0:Disable or >=1:Enable */
|
||||
/* To enable file lock control feature, set _FS_LOCK to 1 or greater.
|
||||
The value defines how many files can be opened simultaneously. */
|
||||
|
||||
|
||||
#endif /* _FFCONFIG */
|
||||
|
|
@ -0,0 +1,683 @@
|
|||
/*------------------------------------------------------------------------/
|
||||
/ MMCv3/SDv1/SDv2 (in SPI mode) control module
|
||||
/-------------------------------------------------------------------------/
|
||||
/
|
||||
/ Copyright (C) 2013, ChaN, all right reserved.
|
||||
/
|
||||
/ * This software is a free software and there is NO WARRANTY.
|
||||
/ * No restriction on use. You can use, modify and redistribute it for
|
||||
/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
|
||||
/ * Redistributions of source code must retain the above copyright notice.
|
||||
/
|
||||
/-------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* This file was modified from a sample available from the FatFs
|
||||
* web site. It was modified to work with a Olimex STM32-P103
|
||||
* evaluation board.
|
||||
*
|
||||
*/
|
||||
#include "diskio.h"
|
||||
#include "stm32f10x.h" /* STM32 registers */
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#include "boot.h"
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Module Private Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
/* Definitions for MMC/SDC command */
|
||||
#define CMD0 (0) /* GO_IDLE_STATE */
|
||||
#define CMD1 (1) /* SEND_OP_COND */
|
||||
#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */
|
||||
#define CMD8 (8) /* SEND_IF_COND */
|
||||
#define CMD9 (9) /* SEND_CSD */
|
||||
#define CMD10 (10) /* SEND_CID */
|
||||
#define CMD12 (12) /* STOP_TRANSMISSION */
|
||||
#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */
|
||||
#define CMD16 (16) /* SET_BLOCKLEN */
|
||||
#define CMD17 (17) /* READ_SINGLE_BLOCK */
|
||||
#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
|
||||
#define CMD23 (23) /* SET_BLOCK_COUNT */
|
||||
#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */
|
||||
#define CMD24 (24) /* WRITE_BLOCK */
|
||||
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
|
||||
#define CMD41 (41) /* SEND_OP_COND (ACMD) */
|
||||
#define CMD55 (55) /* APP_CMD */
|
||||
#define CMD58 (58) /* READ_OCR */
|
||||
|
||||
|
||||
/* Control signals (Platform dependent) */
|
||||
#define CS_LOW() GPIO_ResetBits(GPIOB, GPIO_Pin_12) /* MMC CS = L */
|
||||
#define CS_HIGH() GPIO_SetBits(GPIOB, GPIO_Pin_12) /* MMC CS = H */
|
||||
|
||||
|
||||
|
||||
#define FCLK_SLOW() /* Set slow clock (100k-400k) */
|
||||
#define FCLK_FAST() set_max_speed() /* Set fast clock (depends on the CSD) */
|
||||
|
||||
static volatile
|
||||
DSTATUS Stat = STA_NOINIT; /* Disk status */
|
||||
|
||||
static
|
||||
UINT CardType;
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send 80 or so clock transitions with CS and DI held high. This is */
|
||||
/* required after card power up to get it into SPI mode */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
static
|
||||
void send_initial_clock_train(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
unsigned int i;
|
||||
|
||||
/* Ensure CS is held high. */
|
||||
CS_HIGH();
|
||||
|
||||
/* Switch the SSI TX line to a GPIO and drive it high too. */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
GPIO_SetBits(GPIOB, GPIO_Pin_15);
|
||||
|
||||
/* Send 10 bytes over the SSI. This causes the clock to wiggle the */
|
||||
/* required number of times. */
|
||||
for(i = 0 ; i < 10 ; i++)
|
||||
{
|
||||
/* Loop while DR register in not empty */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE) == RESET) { ; }
|
||||
|
||||
/* Send byte through the SPI peripheral */
|
||||
SPI_I2S_SendData(SPI2, 0xff);
|
||||
|
||||
/* Wait to receive a byte */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
|
||||
}
|
||||
|
||||
/* Revert to hardware control of the SSI TX line. */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Power Control (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* When the target system does not support socket power control, there */
|
||||
/* is nothing to do in these functions. */
|
||||
|
||||
static
|
||||
void power_on (void)
|
||||
{
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/*
|
||||
* This doesn't really turn the power on, but initializes the
|
||||
* SSI port and pins needed to talk to the card.
|
||||
*/
|
||||
|
||||
/* Enable GPIO clock for CS */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
/* Enable SPI clock, SPI2: APB1 */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
/* Configure I/O for Flash Chip select (PB12) */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* De-select the Card: Chip Select high */
|
||||
GPIO_SetBits(GPIOB, GPIO_Pin_12);
|
||||
|
||||
/* Configure SPI pins: SCK (PB13) and MOSI (PB15) with default alternate function (not re-mapped) push-pull */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
/* Configure MISO (PB14) as Input with internal pull-up */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* SPI configuration */
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256; // 72000kHz/256=281kHz < 400kHz
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
|
||||
SPI_Init(SPI2, &SPI_InitStructure);
|
||||
SPI_CalculateCRC(SPI2, DISABLE);
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
|
||||
/* Set DI and CS high and apply more than 74 pulses to SCLK for the card */
|
||||
/* to be able to accept a native command. */
|
||||
send_initial_clock_train();
|
||||
|
||||
}
|
||||
// set the SSI speed to the max setting
|
||||
static
|
||||
void set_max_speed(void)
|
||||
{
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
|
||||
/* Disable the SPI system */
|
||||
SPI_Cmd(SPI2, DISABLE);
|
||||
|
||||
/* MMC/SDC can work at the clock frequency up to 20/25MHz so pick a speed close to
|
||||
* this but not higher
|
||||
*/
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; // 72MHz/4=18MHz < 20MHz
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
SPI_Init(SPI2, &SPI_InitStructure);
|
||||
SPI_CalculateCRC(SPI2, DISABLE);
|
||||
|
||||
/* Enable the SPI system */
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
}
|
||||
|
||||
static
|
||||
void power_off (void)
|
||||
{
|
||||
Stat |= STA_NOINIT; /* Force uninitialized */
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Transmit/Receive data to/from MMC via SPI (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE xchg_spi (BYTE dat)
|
||||
{
|
||||
/* Send byte through the SPI peripheral */
|
||||
SPI_I2S_SendData(SPI2, dat);
|
||||
|
||||
/* Wait to receive a byte */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
|
||||
|
||||
/* Return the byte read from the SPI bus */
|
||||
return (BYTE)SPI_I2S_ReceiveData(SPI2);
|
||||
}
|
||||
|
||||
static
|
||||
void rcvr_spi_m (BYTE *dst)
|
||||
{
|
||||
*dst = xchg_spi(0xFF);
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Wait for card ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int wait_ready (void)
|
||||
{
|
||||
BYTE d;
|
||||
ULONG timeOutTime;
|
||||
|
||||
/* set timeout for 500 ms from now */
|
||||
timeOutTime = TimerGet() + 500;
|
||||
|
||||
do {
|
||||
d = xchg_spi(0xFF);
|
||||
} while ((d != 0xFF) && (TimerGet() < timeOutTime));
|
||||
|
||||
return (d == 0xFF) ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Deselect the card and release SPI bus */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
void deselect (void)
|
||||
{
|
||||
CS_HIGH();
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Select the card and wait ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int select (void) /* 1:Successful, 0:Timeout */
|
||||
{
|
||||
CS_LOW();
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
|
||||
|
||||
if (wait_ready()) return 1; /* OK */
|
||||
deselect();
|
||||
return 0; /* Timeout */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Receive a data packet from MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int rcvr_datablock ( /* 1:OK, 0:Failed */
|
||||
BYTE *buff, /* Data buffer to store received data */
|
||||
UINT btr /* Byte count (must be multiple of 4) */
|
||||
)
|
||||
{
|
||||
BYTE token;
|
||||
ULONG timeOutTime;
|
||||
|
||||
/* set timeout for 100 ms from now */
|
||||
timeOutTime = TimerGet() + 100;
|
||||
|
||||
do { /* Wait for data packet in timeout of 100ms */
|
||||
token = xchg_spi(0xFF);
|
||||
} while ((token == 0xFF) && (TimerGet() < timeOutTime));
|
||||
|
||||
if(token != 0xFE) return 0; /* If not valid data token, retutn with error */
|
||||
|
||||
do { /* Receive the data block into buffer */
|
||||
rcvr_spi_m(buff++);
|
||||
rcvr_spi_m(buff++);
|
||||
} while (btr -= 2);
|
||||
xchg_spi(0xFF); /* Discard CRC */
|
||||
xchg_spi(0xFF);
|
||||
|
||||
return 1; /* Return with success */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a data packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
static
|
||||
int xmit_datablock ( /* 1:OK, 0:Failed */
|
||||
const BYTE *buff, /* 512 byte data block to be transmitted */
|
||||
BYTE token /* Data token */
|
||||
)
|
||||
{
|
||||
BYTE resp;
|
||||
UINT wc;
|
||||
|
||||
|
||||
if (!wait_ready()) return 0;
|
||||
|
||||
xchg_spi(token); /* Xmit a token */
|
||||
if (token != 0xFD) { /* Not StopTran token */
|
||||
wc = 512;
|
||||
do { /* Xmit the 512 byte data block to MMC */
|
||||
xchg_spi(*buff++);
|
||||
xchg_spi(*buff++);
|
||||
} while (wc -= 2);
|
||||
xchg_spi(0xFF); /* CRC (Dummy) */
|
||||
xchg_spi(0xFF);
|
||||
resp = xchg_spi(0xFF); /* Receive a data response */
|
||||
if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a command packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE send_cmd (
|
||||
BYTE cmd, /* Command byte */
|
||||
DWORD arg /* Argument */
|
||||
)
|
||||
{
|
||||
BYTE n, res;
|
||||
|
||||
|
||||
if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
|
||||
cmd &= 0x7F;
|
||||
res = send_cmd(CMD55, 0);
|
||||
if (res > 1) return res;
|
||||
}
|
||||
|
||||
/* Select the card and wait for ready */
|
||||
deselect();
|
||||
if (!select()) return 0xFF;
|
||||
|
||||
/* Send command packet */
|
||||
xchg_spi(0x40 | cmd); /* Start + Command index */
|
||||
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
|
||||
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
|
||||
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
|
||||
xchg_spi((BYTE)arg); /* Argument[7..0] */
|
||||
n = 0x01; /* Dummy CRC + Stop */
|
||||
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) + Stop */
|
||||
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) + Stop */
|
||||
xchg_spi(n);
|
||||
|
||||
/* Receive command response */
|
||||
if (cmd == CMD12) xchg_spi(0xFF); /* Skip a stuff byte on stop to read */
|
||||
n = 10; /* Wait for a valid response in timeout of 10 attempts */
|
||||
do
|
||||
res = xchg_spi(0xFF);
|
||||
while ((res & 0x80) && --n);
|
||||
|
||||
return res; /* Return with the response value */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Public Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize Disk Drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_initialize (
|
||||
BYTE pdrv /* Physical drive nmuber (0) */
|
||||
)
|
||||
{
|
||||
BYTE n, cmd, ty, ocr[4];
|
||||
ULONG timeOutTime;
|
||||
|
||||
|
||||
if (pdrv) return STA_NOINIT; /* Supports only single drive */
|
||||
if (Stat & STA_NODISK) return Stat; /* No card in the socket */
|
||||
|
||||
power_on(); /* Force socket power on */
|
||||
|
||||
CS_LOW(); /* CS = L */
|
||||
|
||||
ty = 0;
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
|
||||
timeOutTime = TimerGet() + 1000; /* Initialization timeout of 1000 msec */
|
||||
|
||||
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
|
||||
while ((TimerGet() < timeOutTime) && send_cmd(ACMD41, 0x40000000)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
|
||||
if ((TimerGet() < timeOutTime) && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
|
||||
ty = (ocr[0] & 0x40) ? CT_SD2|CT_BLOCK : CT_SD2; /* SDv2 */
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if (send_cmd(ACMD41, 0) <= 1) {
|
||||
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
|
||||
} else {
|
||||
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
|
||||
}
|
||||
while ((TimerGet() < timeOutTime) && send_cmd(cmd, 0)); /* Wait for leaving idle state */
|
||||
if (!(TimerGet() < timeOutTime) || send_cmd(CMD16, 512) != 0) /* Set read/write block length to 512 */
|
||||
ty = 0;
|
||||
}
|
||||
}
|
||||
CardType = ty;
|
||||
deselect();
|
||||
|
||||
if (ty) { /* Initialization succeded */
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
|
||||
FCLK_FAST();
|
||||
} else { /* Initialization failed */
|
||||
power_off();
|
||||
}
|
||||
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Get Disk Status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_status (
|
||||
BYTE pdrv /* Physical drive nmuber (0) */
|
||||
)
|
||||
{
|
||||
if (pdrv) return STA_NOINIT; /* Supports only single drive */
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT disk_read (
|
||||
BYTE pdrv, /* Physical drive number (0) */
|
||||
BYTE *buff, /* Pointer to the data buffer to store read data */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..255) */
|
||||
)
|
||||
{
|
||||
if (pdrv || !count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
if (count == 1) { /* Single block read */
|
||||
if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
|
||||
&& rcvr_datablock(buff, 512))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block read */
|
||||
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!rcvr_datablock(buff, 512)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
DRESULT disk_write (
|
||||
BYTE pdrv, /* Physical drive nmuber (0) */
|
||||
const BYTE *buff, /* Pointer to the data to be written */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..255) */
|
||||
)
|
||||
{
|
||||
if (pdrv || !count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
if (Stat & STA_PROTECT) return RES_WRPRT;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
if (count == 1) { /* Single block write */
|
||||
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
|
||||
&& xmit_datablock(buff, 0xFE))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block write */
|
||||
if (CardType & CT_SDC) send_cmd(ACMD23, count);
|
||||
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!xmit_datablock(buff, 0xFC)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
|
||||
count = 1;
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous Functions */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_IOCTL
|
||||
DRESULT disk_ioctl (
|
||||
BYTE pdrv, /* Physical drive nmuber (0) */
|
||||
BYTE cmd, /* Control code */
|
||||
void *buff /* Buffer to send/receive data block */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
BYTE n, csd[16], *ptr = buff;
|
||||
DWORD csz;
|
||||
|
||||
|
||||
if (pdrv) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
res = RES_ERROR;
|
||||
switch (cmd) {
|
||||
case CTRL_SYNC : /* Flush write-back cache, Wait for end of internal process */
|
||||
if (select()) res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (WORD) */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||||
if ((csd[0] >> 6) == 1) { /* SDv2? */
|
||||
csz = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
|
||||
*(DWORD*)buff = csz << 10;
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||||
csz = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||||
*(DWORD*)buff = csz << (n - 9);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sectors (DWORD) */
|
||||
if (CardType & CT_SD2) { /* SDv2? */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
||||
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
|
||||
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
||||
if (CardType & CT_SD1) { /* SDv1 */
|
||||
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
||||
} else { /* MMCv3 */
|
||||
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
|
||||
*ptr = CardType;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
|
||||
if ((send_cmd(CMD9, 0) == 0) /* READ_CSD */
|
||||
&& rcvr_datablock(buff, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
|
||||
if ((send_cmd(CMD10, 0) == 0) /* READ_CID */
|
||||
&& rcvr_datablock(buff, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
|
||||
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
||||
for (n = 0; n < 4; n++)
|
||||
*((BYTE*)buff+n) = xchg_spi(0xFF);
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_SDSTAT : /* Receive SD status as a data block (64 bytes) */
|
||||
if ((CardType & CT_SD2) && send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(buff, 64))
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
}
|
||||
|
||||
deselect();
|
||||
|
||||
return res;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*---------------------------------------------------------*/
|
||||
/* User Provided Timer Function for FatFs module */
|
||||
/*---------------------------------------------------------*/
|
||||
/* This is a real time clock service to be called from */
|
||||
/* FatFs module. Any valid time must be returned even if */
|
||||
/* the system does not support a real time clock. */
|
||||
/* This is not required in read-only configuration. */
|
||||
|
||||
DWORD get_fattime (void)
|
||||
{
|
||||
/* No RTC supprt. Return a fixed value 2013/5/10 0:00:00 */
|
||||
return ((DWORD)(2013 - 1980) << 25) /* Y */
|
||||
| ((DWORD)5 << 21) /* M */
|
||||
| ((DWORD)10 << 16) /* D */
|
||||
| ((DWORD)0 << 11) /* H */
|
||||
| ((DWORD)0 << 5) /* M */
|
||||
| ((DWORD)0 >> 1); /* S */
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -34,6 +34,9 @@
|
|||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "stm32f10x.h" /* microcontroller registers */
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
|
|
@ -81,6 +84,10 @@ static void Init(void)
|
|||
{
|
||||
volatile blt_int32u StartUpCounter = 0, HSEStatus = 0;
|
||||
blt_int32u pll_multiplier;
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
USART_InitTypeDef USART_InitStruct;
|
||||
#endif
|
||||
|
||||
/* reset the RCC clock configuration to the default reset state (for debug purpose) */
|
||||
/* set HSION bit */
|
||||
|
|
@ -152,22 +159,6 @@ static void Init(void)
|
|||
while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
|
||||
{
|
||||
}
|
||||
#if (BOOT_COM_UART_ENABLE > 0)
|
||||
/* enable clock for USART2 peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x00020000;
|
||||
/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
|
||||
/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
|
||||
/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
|
||||
/* configure USART2 Rx (GPIOA3) as alternate function input floating */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
|
||||
/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
|
||||
#endif
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* enable clocks for CAN transmitter and receiver pins (GPIOB and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000008 | 0x00000001);
|
||||
|
|
@ -187,6 +178,46 @@ static void Init(void)
|
|||
/* enable clocks for CAN controller peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x02000000;
|
||||
#endif
|
||||
#if (BOOT_COM_UART_ENABLE > 0)
|
||||
/* enable clock for USART2 peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x00020000;
|
||||
/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
|
||||
/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
|
||||
/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
|
||||
/* configure USART2 Rx (GPIOA3) as alternate function input floating */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
|
||||
/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
|
||||
#elif (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* enable UART peripheral clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
|
||||
/* enable GPIO peripheral clock for transmitter and receiver pins */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
|
||||
/* configure USART Tx as alternate function push-pull */
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2;
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
/* Configure USART Rx as alternate function input floating */
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_3;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
/* configure UART communcation parameters */
|
||||
USART_InitStruct.USART_BaudRate = BOOT_COM_UART_BAUDRATE;
|
||||
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStruct.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStruct.USART_Parity = USART_Parity_No;
|
||||
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART2, &USART_InitStruct);
|
||||
/* enable UART */
|
||||
USART_Cmd(USART2, ENABLE);
|
||||
#endif
|
||||
} /*** end of Init ***/
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -38,11 +38,27 @@ PROJ_FILES= \
|
|||
config.h \
|
||||
hooks.c \
|
||||
main.c \
|
||||
./lib/fatfs/ffconf.h \
|
||||
./lib/fatfs/mmc.c \
|
||||
./lib/CMSIS/CM3/CoreSupport/core_cm3.c \
|
||||
./lib/CMSIS/CM3/CoreSupport/core_cm3.h \
|
||||
./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h \
|
||||
./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c \
|
||||
./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h \
|
||||
./lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_gpio.h \
|
||||
./lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h \
|
||||
./lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_spi.h \
|
||||
./lib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_usart.h \
|
||||
./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c \
|
||||
./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c \
|
||||
./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c \
|
||||
./lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c \
|
||||
./lib/STM32F10x_StdPeriph_Driver/stm32f10x_conf.h \
|
||||
../../../Source/fatfs/src/diskio.h \
|
||||
../../../Source/fatfs/src/ff.c \
|
||||
../../../Source/fatfs/src/ff.h \
|
||||
../../../Source/fatfs/src/integer.h \
|
||||
../../../Source/fatfs/src/option/unicode.c \
|
||||
../../../Source/boot.c \
|
||||
../../../Source/boot.h \
|
||||
../../../Source/com.c \
|
||||
|
|
@ -53,6 +69,8 @@ main.c \
|
|||
../../../Source/backdoor.h \
|
||||
../../../Source/cop.c \
|
||||
../../../Source/cop.h \
|
||||
../../../Source/file.c \
|
||||
../../../Source/file.h \
|
||||
../../../Source/assert.c \
|
||||
../../../Source/assert.h \
|
||||
../../../Source/plausibility.h \
|
||||
|
|
@ -112,7 +130,7 @@ CFLAGS = -g -D inline= -mthumb -mcpu=cortex-m3 -O1 -T memory.x
|
|||
CFLAGS += -D PACK_STRUCT_END=__attribute\(\(packed\)\) -Wno-main
|
||||
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)
|
||||
CFLAGS += -ffunction-sections -fdata-sections $(INC_PATH) -D STM32F10X_MD -D GCC_ARMCM3
|
||||
CFLAGS += -Wa,-adhlns="$(OBJ_PATH)/$(subst .o,.lst,$@)"
|
||||
CFLAGS += -D USE_STDPERIPH_DRIVER -D VECT_TAB_FLASH -Wa,-adhlns="$(OBJ_PATH)/$(subst .o,.lst,$@)"
|
||||
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
|
||||
LFLAGS += $(LIB_PATH) -Xlinker --gc-sections
|
||||
OFLAGS = -O srec
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -3,22 +3,22 @@ bin/demoprog_olimex_stm32p103.elf: file format elf32-littlearm
|
|||
bin/demoprog_olimex_stm32p103.elf
|
||||
architecture: arm, flags 0x00000112:
|
||||
EXEC_P, HAS_SYMS, D_PAGED
|
||||
start address 0x08002000
|
||||
start address 0x08006000
|
||||
|
||||
Program Header:
|
||||
LOAD off 0x00000000 vaddr 0x08000000 paddr 0x08000000 align 2**15
|
||||
filesz 0x00002828 memsz 0x00002828 flags r-x
|
||||
LOAD off 0x00008000 vaddr 0x20000000 paddr 0x08002828 align 2**15
|
||||
filesz 0x00006828 memsz 0x00006828 flags r-x
|
||||
LOAD off 0x00008000 vaddr 0x20000000 paddr 0x08006828 align 2**15
|
||||
filesz 0x00000014 memsz 0x00000168 flags rw-
|
||||
private flags = 5000002: [Version5 EABI] [has entry point]
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .text 00000828 08002000 08002000 00002000 2**2
|
||||
0 .text 00000828 08006000 08006000 00006000 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
1 .data 00000014 20000000 08002828 00008000 2**2
|
||||
1 .data 00000014 20000000 08006828 00008000 2**2
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
2 .bss 00000154 20000014 0800283c 00008014 2**2
|
||||
2 .bss 00000154 20000014 0800683c 00008014 2**2
|
||||
ALLOC
|
||||
3 .debug_info 0000311e 00000000 00000000 00008014 2**0
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
|
|
@ -41,7 +41,7 @@ Idx Name Size VMA LMA File off Algn
|
|||
12 .debug_frame 00000770 00000000 00000000 00010560 2**2
|
||||
CONTENTS, READONLY, DEBUGGING
|
||||
SYMBOL TABLE:
|
||||
08002000 l d .text 00000000 .text
|
||||
08006000 l d .text 00000000 .text
|
||||
20000000 l d .data 00000000 .data
|
||||
20000014 l d .bss 00000000 .bss
|
||||
00000000 l d .debug_info 00000000 .debug_info
|
||||
|
|
@ -56,14 +56,14 @@ SYMBOL TABLE:
|
|||
00000000 l d .debug_frame 00000000 .debug_frame
|
||||
00000000 l df *ABS* 00000000 vectors.c
|
||||
00000000 l df *ABS* 00000000 boot.c
|
||||
08002154 l F .text 00000034 UartReceiveByte
|
||||
08006154 l F .text 00000034 UartReceiveByte
|
||||
20000014 l O .bss 00000041 xcpCtoReqPacket.6441
|
||||
20000058 l O .bss 00000001 xcpCtoRxLength.6442
|
||||
20000059 l O .bss 00000001 xcpCtoRxInProgress.6443
|
||||
00000000 l df *ABS* 00000000 cstart.c
|
||||
080022ee l F .text 00000000 zero_loop
|
||||
080062ee l F .text 00000000 zero_loop
|
||||
00000000 l df *ABS* 00000000 irq.c
|
||||
08002320 l F .text 00000004 __enable_irq
|
||||
08006320 l F .text 00000004 __enable_irq
|
||||
00000000 l df *ABS* 00000000 led.c
|
||||
2000005c l O .bss 00000004 timer_counter_last.6434
|
||||
20000060 l O .bss 00000001 led_toggle_state.6433
|
||||
|
|
@ -77,36 +77,36 @@ SYMBOL TABLE:
|
|||
00000000 l df *ABS* 00000000 stm32f10x_usart.c
|
||||
00000000 l df *ABS* 00000000
|
||||
00000100 l *ABS* 00000000 __STACKSIZE__
|
||||
080022b4 g F .text 00000060 reset_handler
|
||||
08002324 g F .text 0000000c IrqInterruptEnable
|
||||
0800281c g F .text 0000000c USART_GetFlagStatus
|
||||
08002828 g .text 00000000 _etext
|
||||
0800254c g F .text 00000010 TimerISRHandler
|
||||
08002810 g F .text 0000000c USART_ReceiveData
|
||||
080026cc g F .text 0000001c RCC_APB2PeriphClockCmd
|
||||
08002560 g F .text 000000b4 GPIO_Init
|
||||
080027f0 g F .text 00000020 USART_Cmd
|
||||
080026e8 g F .text 0000001c RCC_APB1PeriphClockCmd
|
||||
080062b4 g F .text 00000060 reset_handler
|
||||
08006324 g F .text 0000000c IrqInterruptEnable
|
||||
0800681c g F .text 0000000c USART_GetFlagStatus
|
||||
08006828 g .text 00000000 _etext
|
||||
0800654c g F .text 00000010 TimerISRHandler
|
||||
08006810 g F .text 0000000c USART_ReceiveData
|
||||
080066cc g F .text 0000001c RCC_APB2PeriphClockCmd
|
||||
08006560 g F .text 000000b4 GPIO_Init
|
||||
080067f0 g F .text 00000020 USART_Cmd
|
||||
080066e8 g F .text 0000001c RCC_APB1PeriphClockCmd
|
||||
20000068 g .bss 00000000 _ebss
|
||||
0800255c g F .text 00000002 UnusedISR
|
||||
08002330 g F .text 00000040 LedInit
|
||||
08002614 g F .text 00000004 GPIO_SetBits
|
||||
0800261c g F .text 000000b0 RCC_GetClocksFreq
|
||||
08002704 g F .text 000000ec USART_Init
|
||||
0800655c g F .text 00000002 UnusedISR
|
||||
08006330 g F .text 00000040 LedInit
|
||||
08006614 g F .text 00000004 GPIO_SetBits
|
||||
0800661c g F .text 000000b0 RCC_GetClocksFreq
|
||||
08006704 g F .text 000000ec USART_Init
|
||||
20000014 g .bss 00000000 _bss
|
||||
08002618 g F .text 00000004 GPIO_ResetBits
|
||||
080023d0 g F .text 00000120 main
|
||||
08002500 g F .text 0000000c TimerSet
|
||||
08002188 g F .text 000000a8 BootComInit
|
||||
080024f0 g F .text 00000010 TimerDeinit
|
||||
08006618 g F .text 00000004 GPIO_ResetBits
|
||||
080063d0 g F .text 00000120 main
|
||||
08006500 g F .text 0000000c TimerSet
|
||||
08006188 g F .text 000000a8 BootComInit
|
||||
080064f0 g F .text 00000010 TimerDeinit
|
||||
20000000 g .data 00000000 _data
|
||||
08002370 g F .text 00000060 LedToggle
|
||||
08006370 g F .text 00000060 LedToggle
|
||||
20000168 g .bss 00000000 _estack
|
||||
20000014 g .data 00000000 _edata
|
||||
08002000 g O .text 00000154 _vectab
|
||||
08002230 g F .text 00000084 BootComCheckActivationRequest
|
||||
08006000 g O .text 00000154 _vectab
|
||||
08006230 g F .text 00000084 BootComCheckActivationRequest
|
||||
20000068 g .bss 00000000 _stack
|
||||
08002540 g F .text 0000000c TimerGet
|
||||
0800250c g F .text 00000034 TimerInit
|
||||
08006540 g F .text 0000000c TimerGet
|
||||
0800650c g F .text 00000034 TimerInit
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,135 +1,135 @@
|
|||
S025000062696E2F64656D6F70726F675F6F6C696D65785F73746D3332703130332E7372656331
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
S315080020B05D2500085D2500085D2500085D250008EA
|
||||
S315080020C05D2500085D2500085D2500085D250008DA
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
S31508006280064B5B78FF2B06D1044B9B781BB9074B53
|
||||
S315080062909847074B984708BD59000020140000206E
|
||||
S315080062A0556100085800002015000020F164000818
|
||||
S315080062B05101000810B517498D46114B114A9A42EB
|
||||
S315080062C011D202F10403104CE41A24F0030404F179
|
||||
S315080062D004044FF0000310460C495A581A5003F1AB
|
||||
S315080062E00403A342F9D10C480C494FF00002884236
|
||||
S315080062F0B8BF40F8042BFFF6FAAF054B984710BD18
|
||||
S31508006300140000200000002017000020286800085C
|
||||
S31508006310D1630008680100201400002068000020EE
|
||||
S3150800632062B6704708B5014B984708BD2163000857
|
||||
S3150800633000B583B04FF010004FF00101094B9847A4
|
||||
S315080063404FF48053ADF804304FF003038DF8063050
|
||||
S315080063504FF010038DF80730034801A9034B9847FF
|
||||
S3150800636003B000BDCD660008001001406165000855
|
||||
S3150800637010B5114B98470446104B1B68C31AB3F562
|
||||
S31508006380FA7F17D30E4B1B784BB94FF001020C4B13
|
||||
S315080063901A700C484FF480510B4B984708E04FF0A1
|
||||
S315080063A00002074B1A7007484FF48051074B98476D
|
||||
S315080063B0024B1C6010BD00BF416500085C00002050
|
||||
S315080063C060000020001001401966000815660008E4
|
||||
S315080063D000B583B04FF00003009301933B4B1A6856
|
||||
S315080063E042F001021A605968394A0A405A601A6826
|
||||
S315080063F022F0847222F480321A601A6822F480220B
|
||||
S315080064001A605A6822F4FE025A604FF41F029A6014
|
||||
S315080064101A6842F480321A601A4640F2DC53116850
|
||||
S3150800642001F400310191009901F1010100910199EE
|
||||
S3150800643011B900999942F2D1244B1B6813F4003F15
|
||||
S3150800644000D1FEE7234B1A6842F010021A601A6858
|
||||
S3150800645022F003021A601A6842F002021A60A3F5D3
|
||||
S3150800646080535A685A605A6842F400525A605A6809
|
||||
S3150800647042F480625A605A6822F47C125A605A685A
|
||||
S3150800648042F4E8125A601A6842F080721A601A6872
|
||||
S3150800649012F0007FFBD00D4B5A6822F003025A60B7
|
||||
S315080064A05A6842F002025A605A6802F00C02082A38
|
||||
S315080064B0FAD1094B9847094B9847094B9847094B16
|
||||
S315080064C09847094D094CA847A047FCE70010024029
|
||||
S315080064D00000FFF800200240316300080D6500083F
|
||||
S315080064E025630008896100087163000831620008A5
|
||||
S315080064F04FF00002014B1A60704700BF10E000E041
|
||||
S31508006500014B1860704700BF6400002008B5084BAF
|
||||
S31508006510084A5A604FF0F001074A82F823104FF0F4
|
||||
S31508006520000098604FF007021A60044B984708BDB0
|
||||
S3150800653010E000E03F19010000ED00E001650008E9
|
||||
S31508006540014B1868704700BF64000020024B1A68A8
|
||||
S3150800655002F101021A60704764000020FEE700BFDE
|
||||
S315080065602DE9F001CB7803F00F0513F0100F1CBFCF
|
||||
S315080065708B781D430B7813B307684FF000034FF071
|
||||
S3150800658001064FF00F0C06FA03F20C8814409442E9
|
||||
S3150800659010D14FEA83020CFA02F827EA080705FA2F
|
||||
S315080065A002F21743CA78282A01D1446102E0482A30
|
||||
S315080065B008BF046103F10103082BE4D107600B88C7
|
||||
S315080065C0FF2B24D947684FF000034FF001064FF020
|
||||
S315080065D00F0C03F1080206FA02F20C8814409442E2
|
||||
S315080065E010D14FEA83020CFA02F827EA080705FADF
|
||||
S315080065F002F21743CA78282A08BF4461CA78482A8B
|
||||
S3150800660008BF046103F10103082BE2D14760BDE826
|
||||
S31508006610F0017047016170474161704710B4264B1D
|
||||
S315080066205B6803F00C03042B05D0082B06D0FBB9D6
|
||||
S31508006630224B03601EE0214B03601BE01E4B5A6889
|
||||
S315080066405B68C2F3834202F1020213F4803F04D16D
|
||||
S315080066501B4B03FB02F202600CE0174B5B6813F45A
|
||||
S31508006660003F14BF164B154B03FB02F2026001E014
|
||||
S31508006670124B0360104B5A68C2F3031211498C5C23
|
||||
S31508006680026822FA04F242605C68C4F302240C5DD4
|
||||
S3150800669022FA04F484605C68C4F3C224095D22FA11
|
||||
S315080066A001F2C2605B68C3F381330749CB5CB2FB76
|
||||
S315080066B0F3F2026110BC70470010024000127A0023
|
||||
S315080066C000093D00040000200000002021B1054B10
|
||||
S315080066D09A69104398617047024B9A6922EA00004A
|
||||
S315080066E0986170470010024021B1054BDA691043E2
|
||||
S315080066F0D8617047024BDA6922EA0000D861704710
|
||||
S315080067000010024030B587B004460D46038A23F4CC
|
||||
S3150800671040534FEA03434FEA1343CA88134303829D
|
||||
S3150800672083890989AA880A4369890A4323F4B053E5
|
||||
S3150800673023F00C034FEA03434FEA134313439BB278
|
||||
S315080067408381838A23F440734FEA03434FEA134352
|
||||
S31508006750AA891343838201A8224B9847224B9C425D
|
||||
S315080067600CBF049A039AA3891BB2002B09DA02EB21
|
||||
S31508006770820202EB82022B684FEA4303B2FBF3F272
|
||||
S3150800678008E002EB820202EB820229684FEA8101E5
|
||||
S31508006790B2FBF1F2154BA3FB02134FEA53134FEA70
|
||||
S315080067A003104FF0640103FB1123A18909B20029E4
|
||||
S315080067B00ADA4FEAC30303F132030C4DA5FB0323A0
|
||||
S315080067C0C3F34213034309E04FEA031303F1320309
|
||||
S315080067D0064DA5FB0313C3F3431303439BB223815F
|
||||
S315080067E007B030BD1D660008003801401F85EB5113
|
||||
S315080067F029B183899BB243F4005383817047838907
|
||||
S3150800680023F400534FEA03434FEA13438381704747
|
||||
S3150800681080884FEAC0504FEAD05070470388194223
|
||||
S30D080068200CBF0020012070479F
|
||||
S31508006828020406080000000001020304010203042A
|
||||
S309080068380607080930
|
||||
S7050800600092
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08002000, LENGTH = 120K
|
||||
FLASH (rx) : ORIGIN = 0x08006000, LENGTH = 104K
|
||||
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
|
||||
}
|
||||
|
||||
|
|
|
|||
Binary file not shown.
File diff suppressed because it is too large
Load Diff
|
|
@ -91,6 +91,37 @@
|
|||
#define BOOT_COM_UART_CHANNEL_INDEX (1)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* F I L E S Y S T E M I N T E R F A C E C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/* The file system interface is selected by setting the BOOT_FILE_SYS_ENABLE configurable
|
||||
* to 1. This enables support for firmware updates from a file stored on a locally
|
||||
* attached file system such as an SD-card. Note that this interface can be enabled
|
||||
* together with one of the remote communication interfaces such as UART, CAN or USB.
|
||||
*
|
||||
* Set BOOT_FILE_LOGGING_ENABLE to 1 if you would like log messages to be created during
|
||||
* a firmware update. The hook function FileFirmwareUpdateLogHook() will be called each
|
||||
* time a new string formatted log entry is available. This could be used during testing
|
||||
* by outputting the string on UART or to create a log file on the file system itself.
|
||||
*
|
||||
* Set BOOT_FILE_ERROR_HOOK_ENABLE to 1 if you would like to be informed in case an error
|
||||
* occurs during the firmware update. This could for example be used to turn on an error
|
||||
* LED to inform the user that something went wrong. Inspecting the log messages provides
|
||||
* additional information on the error cause.
|
||||
*
|
||||
* Set BOOT_FILE_STARTED_HOOK_ENABLE to 1 if you would like to be informed when a new
|
||||
* firmware update is started by the bootloader.
|
||||
*
|
||||
* Set BOOT_FILE_COMPLETED_HOOK_ENABLE to 1 if you would like to be informed when a
|
||||
* firmware update is completed by the bootloader.
|
||||
*/
|
||||
#define BOOT_FILE_SYS_ENABLE (1)
|
||||
#define BOOT_FILE_LOGGING_ENABLE (1)
|
||||
#define BOOT_FILE_ERROR_HOOK_ENABLE (1)
|
||||
#define BOOT_FILE_STARTED_HOOK_ENABLE (1)
|
||||
#define BOOT_FILE_COMPLETED_HOOK_ENABLE (1)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
|
|
|
|||
|
|
@ -33,6 +33,10 @@
|
|||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
#include "stm32f10x.h" /* STM32 registers */
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
|
|
@ -200,4 +204,187 @@ void CopServiceHook(void)
|
|||
#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* F I L E S Y S T E M I N T E R F A C E H O O K F U N C T I O N S
|
||||
****************************************************************************************/
|
||||
|
||||
#if (BOOT_FILE_SYS_ENABLE > 0)
|
||||
|
||||
/****************************************************************************************
|
||||
* Constant data declarations
|
||||
****************************************************************************************/
|
||||
static const blt_char firmwareFilename[] = "/demoprog_olimex_stm32p103.srec";
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Local data declarations
|
||||
****************************************************************************************/
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
static struct
|
||||
{
|
||||
FIL handle;
|
||||
blt_bool canUse;
|
||||
} logfile;
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
** NAME: FileIsFirmwareUpdateRequestedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: BLT_TRUE if a firmware update is requested, BLT_FALSE otherwise.
|
||||
** DESCRIPTION: Callback that gets called continuously when the bootloader is idle to
|
||||
** check whether a firmware update from local file storage should be
|
||||
** started. This could for example be when a switch is pressed, when a
|
||||
** certain file is found on the local file storage, etc.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_bool FileIsFirmwareUpdateRequestedHook(void)
|
||||
{
|
||||
FILINFO fileInfoObject = { 0 }; /* needs to be zeroed according to f_stat docs */;
|
||||
|
||||
/* Current example implementation looks for a predetermined firmware file on the
|
||||
* SD-card. If the SD-card is accessible and the firmware file was found the firmware
|
||||
* update is started. When successfully completed, the firmware file is deleted.
|
||||
* During the firmware update, progress information is written to a file called
|
||||
* bootlog.txt and additionally outputted on UART @57600 bps for debugging purposes.
|
||||
*/
|
||||
/* check if firmware file is present and SD-card is accessible */
|
||||
if (f_stat(firmwareFilename, &fileInfoObject) == FR_OK)
|
||||
{
|
||||
/* check if the filesize is valid and that it is not a directory */
|
||||
if ( (fileInfoObject.fsize > 0) && (!(fileInfoObject.fattrib & AM_DIR)) )
|
||||
{
|
||||
/* all conditions are met to start a firmware update from local file storage */
|
||||
return BLT_TRUE;
|
||||
}
|
||||
}
|
||||
/* still here so no firmware update request is pending */
|
||||
return BLT_FALSE;
|
||||
} /*** end of FileIsFirmwareUpdateRequestedHook ***/
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
** NAME: FileGetFirmwareFilenameHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: valid firmware filename with full path or BLT_NULL.
|
||||
** DESCRIPTION: Callback to obtain the filename of the firmware file that should be
|
||||
** used during the firmware update from the local file storage. This
|
||||
** hook function is called at the beginning of the firmware update from
|
||||
** local storage sequence.
|
||||
**
|
||||
****************************************************************************************/
|
||||
const blt_char *FileGetFirmwareFilenameHook(void)
|
||||
{
|
||||
return firmwareFilename;
|
||||
} /*** end of FileGetFirmwareFilenameHook ***/
|
||||
|
||||
|
||||
#if (BOOT_FILE_STARTED_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateStartedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called to inform the application that a firmware
|
||||
** update from local storage just started.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateStartedHook(void)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* create/overwrite the logfile */
|
||||
logfile.canUse = BLT_FALSE;
|
||||
if (f_open(&logfile.handle, "/bootlog.txt", FA_CREATE_ALWAYS | FA_WRITE) == FR_OK)
|
||||
{
|
||||
logfile.canUse = BLT_TRUE;
|
||||
}
|
||||
#endif
|
||||
} /*** end of FileFirmwareUpdateStartedHook ***/
|
||||
#endif /* BOOT_FILE_STARTED_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_COMPLETED_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateCompletedHook
|
||||
** PARAMETER: none
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called to inform the application that a firmware
|
||||
** update was successfully completed.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateCompletedHook(void)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* close the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
/* wait for all logging related transmission to complete */
|
||||
while(USART_GetFlagStatus(USART2, USART_FLAG_TC) == RESET);
|
||||
#endif
|
||||
/* now delete the firmware file from the disk since the update was successful */
|
||||
f_unlink(firmwareFilename);
|
||||
} /*** end of FileFirmwareUpdateCompletedHook ***/
|
||||
#endif /* BOOT_FILE_COMPLETED_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_ERROR_HOOK_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateErrorHook
|
||||
** PARAMETER: error_code additional information on the error that occurred.
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called in case an error occurred during a firmware
|
||||
** update. Refer to <file.h> for a list of available error codes.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateErrorHook(blt_int8u error_code)
|
||||
{
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* error detected which stops the firmware update, so close the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
#endif
|
||||
} /*** end of FileFirmwareUpdateErrorHook ***/
|
||||
#endif /* BOOT_FILE_ERROR_HOOK_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/****************************************************************************************
|
||||
** NAME: FileFirmwareUpdateLogHook
|
||||
** PARAMETER: info_string pointer to a character array with the log entry info.
|
||||
** RETURN VALUE: none
|
||||
** DESCRIPTION: Callback that gets called each time new log information becomes
|
||||
** available during a firmware update.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void FileFirmwareUpdateLogHook(blt_char *info_string)
|
||||
{
|
||||
/* write the string to the log file */
|
||||
if (logfile.canUse == BLT_TRUE)
|
||||
{
|
||||
if (f_puts(info_string, &logfile.handle) < 0)
|
||||
{
|
||||
logfile.canUse = BLT_FALSE;
|
||||
f_close(&logfile.handle);
|
||||
}
|
||||
}
|
||||
/* echo all characters in the string on UART */
|
||||
while(*info_string != '\0')
|
||||
{
|
||||
/* write character to transmit holding register */
|
||||
USART_SendData(USART2, *info_string);
|
||||
/* wait for tx holding register to be empty */
|
||||
while(USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);
|
||||
/* point to the next character in the string */
|
||||
info_string++;
|
||||
}
|
||||
} /*** end of FileFirmwareUpdateLogHook ***/
|
||||
#endif /* BOOT_FILE_LOGGING_ENABLE > 0 */
|
||||
|
||||
|
||||
#endif /* BOOT_FILE_SYS_ENABLE > 0 */
|
||||
|
||||
|
||||
/*********************************** end of hooks.c ************************************/
|
||||
|
|
|
|||
|
|
@ -19,6 +19,6 @@
|
|||
@REM
|
||||
|
||||
|
||||
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armgdbserv.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "--semihosting" "--drv_communication=TCPIP:localhost,3333"
|
||||
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --flash_loader "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\config\flashloader\ST\FlashSTM32F10xx8.board" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "--drv_verify_download" "--semihosting" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
|
||||
|
||||
|
||||
<MixedMode>1</MixedMode><CodeCovShow>1</CodeCovShow><InstrProfShow>1</InstrProfShow></Disassembly>
|
||||
<Watch><Format><struct_types/><watch_formats/></Format><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><Column0>100</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></Watch><Register/></Static>
|
||||
<MixedMode>1</MixedMode><CodeCovShow>1</CodeCovShow><InstrProfShow>1</InstrProfShow><col-names><item>Disassembly</item><item>_I0</item></col-names><col-widths><item>500</item><item>20</item></col-widths><DisasmHistory/><ShowCodeCoverage>1</ShowCodeCoverage><ShowInstrProfiling>1</ShowInstrProfiling></Disassembly>
|
||||
<Watch><Format><struct_types/><watch_formats/></Format><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><Column0>100</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></Watch><Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><WATCH_1><expressions><item>res</item><item>dir</item><item>c</item><item/></expressions><col-names><item>Expression</item><item>Location</item><item>Type</item><item>Value</item></col-names><col-widths><item>100</item><item>150</item><item>100</item><item>207</item></col-widths></WATCH_1></Static>
|
||||
<Windows>
|
||||
|
||||
|
||||
|
|
@ -47,7 +47,7 @@
|
|||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
|
||||
<SelectedTab>0</SelectedTab></Wnd0><Wnd3>
|
||||
<Tabs>
|
||||
<Tab>
|
||||
<Identity>TabID-22911-3116</Identity>
|
||||
|
|
@ -55,11 +55,11 @@
|
|||
<Factory>Workspace</Factory>
|
||||
<Session>
|
||||
|
||||
<NodeDict><ExpandedNode>stm32f103</ExpandedNode></NodeDict></Session>
|
||||
<NodeDict><ExpandedNode>stm32f103</ExpandedNode><ExpandedNode>stm32f103/Boot</ExpandedNode></NodeDict></Session>
|
||||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd1><Wnd2>
|
||||
<SelectedTab>0</SelectedTab></Wnd3><Wnd4>
|
||||
<Tabs>
|
||||
<Tab>
|
||||
<Identity>TabID-891-3119</Identity>
|
||||
|
|
@ -69,20 +69,20 @@
|
|||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd2><Wnd3><Tabs><Tab><Identity>TabID-30261-691</Identity><TabName>Register</TabName><Factory>Register</Factory><Session><REG1>0</REG1><REG2>0</REG2><Group>0</Group><States>0</States></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
|
||||
<SelectedTab>0</SelectedTab></Wnd4><Wnd5><Tabs><Tab><Identity>TabID-14651-9098</Identity><TabName>Watch 1</TabName><Factory>WATCH_1</Factory></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5></Windows>
|
||||
<Editor>
|
||||
|
||||
|
||||
|
||||
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\src\app\app.c</Filename><XPos>0</XPos><YPos>30</YPos><SelStart>1795</SelStart><SelEnd>1795</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\src\hw\hw.c</Filename><XPos>0</XPos><YPos>15</YPos><SelStart>1609</SelStart><SelEnd>1609</SelEnd></Tab><ActiveTab>1</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\src\os\os.c</Filename><XPos>0</XPos><YPos>301</YPos><SelStart>11789</SelStart><SelEnd>11789</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\src\app\app.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\Documents\Embedded\stm\apps\STM32F103\feaser_build_platform_iar_os\src\app\app.c</Filename><XPos>0</XPos><YPos>27</YPos><SelStart>1795</SelStart><SelEnd>1795</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\Documents\Embedded\stm\apps\STM32F103\feaser_build_platform_iar_os\src\os\os.c</Filename><XPos>0</XPos><YPos>305</YPos><SelStart>12108</SelStart><SelEnd>12108</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>35</YPos2><SelStart2>2944</SelStart2><SelEnd2>2944</SelEnd2></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\config.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>35</YPos2><SelStart2>3828</SelStart2><SelEnd2>3828</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\hooks.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>266</YPos2><SelStart2>13853</SelStart2><SelEnd2>13853</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\lib\fatfs\mmc.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>109</YPos2><SelStart2>4648</SelStart2><SelEnd2>4670</SelEnd2></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Positions>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<Top><Row0><Sizes><Toolbar-00292ef8><key>iaridepm.enu1</key></Toolbar-00292ef8></Sizes></Row0><Row1><Sizes><Toolbar-04ac0cb0><key>debuggergui.enu1</key></Toolbar-04ac0cb0></Sizes></Row1></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>739</Bottom><Right>259</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>201980</sizeHorzCY><sizeVertCX>135938</sizeVertCX><sizeVertCY>733663</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>739</Bottom><Right>462</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>201980</sizeHorzCY><sizeVertCX>241667</sizeVertCX><sizeVertCY>733663</sizeVertCY></Rect></Wnd2></Sizes></Row0><Row1><Sizes><Wnd3><Rect><Top>-2</Top><Left>460</Left><Bottom>739</Bottom><Right>795</Right><x>460</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>104167</sizeHorzCX><sizeHorzCY>198020</sizeHorzCY><sizeVertCX>174479</sizeVertCX><sizeVertCY>733663</sizeVertCY></Rect></Wnd3></Sizes></Row1></Right><Bottom><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>202</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>204</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>201980</sizeHorzCY><sizeVertCX>135938</sizeVertCX><sizeVertCY>201980</sizeVertCY></Rect></Wnd0></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
<Top><Row0><Sizes><Toolbar-028dd6d8><key>iaridepm.enu1</key></Toolbar-028dd6d8></Sizes></Row0><Row1><Sizes><Toolbar-0c4491c0><key>debuggergui.enu1</key></Toolbar-0c4491c0></Sizes></Row1></Top><Left><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>737</Bottom><Right>259</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>135938</sizeVertCX><sizeVertCY>733135</sizeVertCY></Rect></Wnd3></Sizes></Row0></Left><Right><Row0><Sizes><Wnd4><Rect><Top>-2</Top><Left>-2</Left><Bottom>737</Bottom><Right>283</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>148438</sizeVertCX><sizeVertCY>733135</sizeVertCY></Rect></Wnd4></Sizes></Row0><Row1><Sizes><Wnd5><Rect><Top>-2</Top><Left>281</Left><Bottom>737</Bottom><Right>834</Right><x>281</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>104167</sizeHorzCX><sizeHorzCY>198413</sizeHorzCY><sizeVertCX>288021</sizeVertCX><sizeVertCY>733135</sizeVertCY></Rect></Wnd5></Sizes></Row1></Right><Bottom><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>202</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>204</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>135938</sizeVertCX><sizeVertCY>202381</sizeVertCY></Rect></Wnd0></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
</Desktop>
|
||||
</Project>
|
||||
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ ActionState=1
|
|||
Enabled=0
|
||||
ShowSource=1
|
||||
[DebugChecksum]
|
||||
Checksum=-699265745
|
||||
Checksum=-257755998
|
||||
[DisAssemblyWindow]
|
||||
NumStates=_ 1
|
||||
State 1=_ 1
|
||||
|
|
@ -39,20 +39,6 @@ UseTrigger=1
|
|||
TriggerName=main
|
||||
LimitSize=0
|
||||
ByteLimit=50
|
||||
[CallStackLog]
|
||||
Enabled=0
|
||||
[DriverProfiling]
|
||||
Enabled=0
|
||||
Mode=1852121147
|
||||
Graph=0
|
||||
Symbiont=0
|
||||
[Log file]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
Category=_ 0
|
||||
[TermIOLog]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
[Stack]
|
||||
FillEnabled=0
|
||||
OverflowWarningsEnabled=1
|
||||
|
|
@ -63,11 +49,34 @@ UseTrigger=1
|
|||
TriggerName=main
|
||||
LimitSize=0
|
||||
ByteLimit=50
|
||||
[Disassemble mode]
|
||||
mode=0
|
||||
[Breakpoints]
|
||||
Bp0=_ "STD_CODE" "0x08000874" 0 0 0 0 "" 0 "" 0
|
||||
Count=1
|
||||
[CallStack]
|
||||
ShowArgs=0
|
||||
[Disassembly]
|
||||
MixedMode=1
|
||||
[JLinkDriver]
|
||||
CStepIntDis=_ 0
|
||||
[Log file]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
Category=_ 0
|
||||
[TermIOLog]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
[CallStackLog]
|
||||
Enabled=0
|
||||
[DriverProfiling]
|
||||
Enabled=0
|
||||
Mode=0
|
||||
Graph=0
|
||||
Symbiont=0
|
||||
Exclusions=
|
||||
[Disassemble mode]
|
||||
mode=0
|
||||
[Breakpoints2]
|
||||
Count=0
|
||||
[Aliases]
|
||||
Count=0
|
||||
SuppressDialog=0
|
||||
|
|
|
|||
|
|
@ -12,9 +12,9 @@
|
|||
|
||||
|
||||
|
||||
<Column0>379</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
|
||||
<Column0>362</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
|
||||
</Workspace>
|
||||
<Build><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1059</ColumnWidth1><ColumnWidth2>282</ColumnWidth2><ColumnWidth3>70</ColumnWidth3></Build><Debug-Log><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1413</ColumnWidth1></Debug-Log><TerminalIO/></Static>
|
||||
<Build><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Debug-Log</Factory></Window></Windows></PreferedWindows><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1059</ColumnWidth1><ColumnWidth2>282</ColumnWidth2><ColumnWidth3>70</ColumnWidth3></Build><Debug-Log><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Build</Factory></Window></Windows></PreferedWindows><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1413</ColumnWidth1></Debug-Log><TerminalIO/><Find-in-Files><ColumnWidth0>664</ColumnWidth0><ColumnWidth1>94</ColumnWidth1><ColumnWidth2>1138</ColumnWidth2></Find-in-Files></Static>
|
||||
<Windows>
|
||||
|
||||
<Wnd0>
|
||||
|
|
@ -25,24 +25,24 @@
|
|||
<Factory>Workspace</Factory>
|
||||
<Session>
|
||||
|
||||
<NodeDict><ExpandedNode>stm32f103</ExpandedNode><ExpandedNode>stm32f103/Boot</ExpandedNode><ExpandedNode>stm32f103/Output</ExpandedNode><ExpandedNode>stm32f103/lib</ExpandedNode><ExpandedNode>stm32f103/src</ExpandedNode><ExpandedNode>stm32f103/src/app</ExpandedNode><ExpandedNode>stm32f103/src/hw</ExpandedNode><ExpandedNode>stm32f103/src/os</ExpandedNode></NodeDict></Session>
|
||||
<NodeDict><ExpandedNode>stm32f103</ExpandedNode><ExpandedNode>stm32f103/Boot</ExpandedNode><ExpandedNode>stm32f103/Output</ExpandedNode><ExpandedNode>stm32f103/Source</ExpandedNode><ExpandedNode>stm32f103/Source/ARMCM3_STM32</ExpandedNode><ExpandedNode>stm32f103/lib</ExpandedNode><ExpandedNode>stm32f103/src</ExpandedNode><ExpandedNode>stm32f103/src/app</ExpandedNode><ExpandedNode>stm32f103/src/hw</ExpandedNode><ExpandedNode>stm32f103/src/os</ExpandedNode></NodeDict></Session>
|
||||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-12497-1878</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-2690-2881</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1></Windows>
|
||||
<SelectedTab>0</SelectedTab></Wnd0><Wnd2><Tabs><Tab><Identity>TabID-13144-32069</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-25023-6652</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab><Tab><Identity>TabID-18334-26223</Identity><TabName>Find in Files</TabName><Factory>Find-in-Files</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd2></Windows>
|
||||
<Editor>
|
||||
|
||||
|
||||
|
||||
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>16</YPos2><SelStart2>2198</SelStart2><SelEnd2>2198</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\config.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>80</YPos2><SelStart2>6917</SelStart2><SelEnd2>6917</SelEnd2></Tab><ActiveTab>1</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\hooks.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>266</YPos2><SelStart2>13853</SelStart2><SelEnd2>13853</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\lib\fatfs\mmc.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>109</YPos2><SelStart2>4648</SelStart2><SelEnd2>4670</SelEnd2></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Positions>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<Top><Row0><Sizes><Toolbar-0281d6d8><key>iaridepm.enu1</key></Toolbar-0281d6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>727</Bottom><Right>453</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>236979</sizeVertCX><sizeVertCY>723214</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>236</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>238</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>236111</sizeHorzCY><sizeVertCX>135938</sizeVertCX><sizeVertCY>202381</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
<Top><Row0><Sizes><Toolbar-029dd6d8><key>iaridepm.enu1</key></Toolbar-029dd6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>765</Bottom><Right>453</Right><x>-2</x><y>-2</y><xscreen>261</xscreen><yscreen>204</yscreen><sizeHorzCX>135938</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>236979</sizeVertCX><sizeVertCY>760913</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>200</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>198413</sizeHorzCY><sizeVertCX>104167</sizeVertCX><sizeVertCY>198413</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
</Desktop>
|
||||
</Workspace>
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -77,7 +77,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>OCDownloadVerifyAll</name>
|
||||
<state>0</state>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCProductVersion</name>
|
||||
|
|
@ -85,7 +85,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>OCDynDriverList</name>
|
||||
<state>GDBSERVER_ID</state>
|
||||
<state>JLINK_ID</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCLastSavedByProductVersion</name>
|
||||
|
|
@ -97,7 +97,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>UseFlashLoader</name>
|
||||
<state>0</state>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CLowLevel</name>
|
||||
|
|
@ -117,7 +117,7 @@
|
|||
</option>
|
||||
<option>
|
||||
<name>FlashLoadersV3</name>
|
||||
<state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xx6.board</state>
|
||||
<state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xx8.board</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesSuppressCheck1</name>
|
||||
|
|
@ -783,7 +783,7 @@
|
|||
<option>
|
||||
<name>CCJLinkResetList</name>
|
||||
<version>6</version>
|
||||
<state>5</state>
|
||||
<state>7</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCJLinkInterfaceCmdLine</name>
|
||||
|
|
|
|||
|
|
@ -169,6 +169,7 @@
|
|||
<option>
|
||||
<name>CCDefines</name>
|
||||
<state>STM32F10X_MD</state>
|
||||
<state>USE_STDPERIPH_DRIVER</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCPreprocFile</name>
|
||||
|
|
@ -298,11 +299,15 @@
|
|||
<option>
|
||||
<name>CCIncludePath2</name>
|
||||
<state>$PROJ_DIR$\..\..\..\..\Source</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\Source\fatfs\src</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\Source\ARMCM3_STM32</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\Source\ARMCM3_STM32\IAR</state>
|
||||
<state>$PROJ_DIR$\..</state>
|
||||
<state>$PROJ_DIR$\..\lib\fatfs</state>
|
||||
<state>$PROJ_DIR$\..\lib\CMSIS\CM3\CoreSupport</state>
|
||||
<state>$PROJ_DIR$\..\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x</state>
|
||||
<state>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\inc</state>
|
||||
<state>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCStdIncCheck</name>
|
||||
|
|
@ -1843,21 +1848,63 @@
|
|||
<name>Boot</name>
|
||||
<group>
|
||||
<name>lib</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h</name>
|
||||
</file>
|
||||
<group>
|
||||
<name>cmsis</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\CoreSupport\core_cm3.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>fatfs</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\fatfs\ffconf.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\fatfs\mmc.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>stdperiphlib</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\stm32f10x_conf.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\inc\stm32f10x_gpio.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\inc\stm32f10x_rcc.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\inc\stm32f10x_spi.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\lib\STM32F10x_StdPeriph_Driver\inc\stm32f10x_usart.h</name>
|
||||
</file>
|
||||
</group>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\config.h</name>
|
||||
|
|
@ -1928,6 +1975,24 @@
|
|||
<name>$PROJ_DIR$\..\..\..\..\Source\ARMCM3_STM32\usb.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>fatfs</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\fatfs\src\diskio.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\fatfs\src\ff.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\fatfs\src\ff.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\fatfs\src\integer.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\fatfs\src\option\unicode.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\assert.c</name>
|
||||
</file>
|
||||
|
|
@ -1958,6 +2023,12 @@
|
|||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\cop.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\file.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\file.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\Source\plausibility.h</name>
|
||||
</file>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,342 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<link rel="File-List" href="Library_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F10x Standard Peripherals Library Drivers</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
||||
|
||||
|
||||
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|
||||
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||||
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|
||||
p.MsoNormal, li.MsoNormal, div.MsoNormal
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||||
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||||
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||||
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||||
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|
||||
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|
||||
mso-fareast-font-family:"Times New Roman";}
|
||||
@page Section1
|
||||
{size:8.5in 11.0in;
|
||||
margin:1.0in 1.25in 1.0in 1.25in;
|
||||
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|
||||
mso-footer-margin:.5in;
|
||||
mso-paper-source:0;}
|
||||
div.Section1
|
||||
{page:Section1;}
|
||||
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|
||||
</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]--></head>
|
||||
<body lang="EN-US" link="blue" vlink="blue">
|
||||
<div class="Section1">
|
||||
<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||
</o:p></span></p>
|
||||
<div align="center">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr style="">
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../Release_Notes.html">Back to Release page</a></span></td>
|
||||
</tr>
|
||||
<tr style="">
|
||||
<td style="padding: 1.5pt;">
|
||||
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||
Notes for STM32F10x Standard Peripherals Library Drivers
|
||||
(StdPeriph_Driver)</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F10x Standard Peripherals Library
|
||||
Drivers update History</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<span style="font-family: "Times New Roman";">
|
||||
</span>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F10x Standard
|
||||
Peripherals Library Drivers update History</span></h2><br>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V3.5.0 / 11-March-2011<o:p></o:p></span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 5 new functions</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">3
|
||||
new functions controlling the counter errors: CAN_GetLastErrorCode(),
|
||||
CAN_GetReceiveErrorCounter() and CAN_GetLSBTransmitErrorCounter().</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to select the CAN operating mode: CAN_OperatingModeRequest().</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to support CAN TT mode: CAN_TTComModeCmd().</span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">CAN_TransmitStatus() function updated to support all CAN transmit intermediate states<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 1 new function:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">I2C_NACKPositionConfig():
|
||||
This function configures the same bit (POS) as I2C_PECPositionConfig()
|
||||
but is intended to be used in I2C mode while I2C_PECPositionConfig() is
|
||||
intended to used in SMBUS mode.</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c files:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change the <span style="font-style: italic;">TIM_DMABurstLength_xBytes</span> definitions to <span style="font-style: italic;">TIM_DMABurstLength_xTansfers</span><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
|
||||
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.4.0
|
||||
- 10/15/2010</span></h3>
|
||||
|
||||
<ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||
</ol>
|
||||
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x High-density value line </span>devices.</span></li>
|
||||
</ul>
|
||||
|
||||
<ol style="margin-top: 0in;" start="2" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||
</ol>
|
||||
|
||||
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_bkp.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete BKP registers definition from stm32f10x_bkp.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CAN registers definition from stm32f10x_can.c and use defines within stm32f10x.h file.<br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Update the wording of some defines and Asserts macro. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetFlagStatus()
|
||||
and CAN_ClearFlag() functions: updated to support new flags (were not
|
||||
supported in previous version). These flags are: CAN_FLAG_RQCP0,
|
||||
CAN_FLAG_RQCP1, CAN_FLAG_RQCP2, CAN_FLAG_FMP1, CAN_FLAG_FF1,
|
||||
CAN_FLAG_FOV1, CAN_FLAG_FMP0, CAN_FLAG_FF0, CAN_FLAG_FOV0,
|
||||
CAN_FLAG_WKU, CAN_FLAG_SLAK and CAN_FLAG_LEC. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetITStatus()
|
||||
function: add a check of the interrupt enable bit before getting the
|
||||
status of corresponding interrupt pending bit. <br>
|
||||
</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_ClearITPendingBit() function: correct the procedure to clear the interrupt pending bit. <br>
|
||||
</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_crc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CRC registers definition from stm32f10x_crc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dac.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DAC registers definition from stm32f10x_dac.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DBGMCU registers definition from stm32f10x_dbgmcu.c and use defines within stm32f10x.h file. </span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dma.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DMA registers definition from stm32f10x_dma.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new function "void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber);"<br>
|
||||
</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">FLASH functions (Erase and Program) updated to always clear the "PG", "MER" and "PER" bits even in case of TimeOut Error.</span><span style="font-style: italic;"></span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_fsmc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new member "FSMC_AsynchronousWait" in "FSMC_NORSRAMInitTypeDef" structure.</span><span style="font-style: italic;"></span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for TIM6, TIM7 and DAC DMA requests, TIM12 and DAC Triggers / DMA2_Channel5 Interrupt mapping.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_pwr.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete PWR registers definition from stm32f10x_pwr.c and use defines within stm32f10x.h and core_cm3.h files.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rtc.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete RTC registers definition from stm32f10x_rtc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_spi.h/.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for I2S Audio Clock frequencies "I2S_AudioFreq_192k".</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c</span></li>
|
||||
<ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for TIM Input Capture Polarity "TIM_ICPolarity_BothEdge".</span></span></li></ul>
|
||||
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.3.0
|
||||
- 04/16/2010</span></h3>
|
||||
|
||||
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
|
||||
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x XL-density </span>devices.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C driver: events description and management enhancement.</span></li></ul>
|
||||
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
|
||||
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">DBGMCU_Config()</span> function: add new values <span style="font-style: italic;">DBGMCU_TIMx_STOP</span> (x: 9..14) for <span style="font-style: italic;">DBGMCU_Periph</span> parameter.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c:
|
||||
updated to support Bank2 of XL-density devices (up to 1MByte of Flash
|
||||
memory). For more details, refer to the description provided within
|
||||
stm32f10x_flash.c file.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for FSMC_NADV pin and TIM9..11,13,14.</span></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c: I2C events description and management enhancement. <br></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">I2C_CheckEvent()</span>
|
||||
function: updated to check whether the last event contains the
|
||||
I2C_EVENT (instead of check whether the last event is equal to
|
||||
I2C_EVENT)<br></span></li></ul><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add
|
||||
detailed description of I2C events and how to manage them using the
|
||||
functions provided by this driver. For more information, refer to
|
||||
stm32f10x_i2c.h and stm32f10x_i2c.c files.</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rcc.h/.c: updated to support TIM9..TIM14 APB clock and reset configuration</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c: updated to support new Timers TIM9..TIM14.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_sdio.h: </span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SDIO_SetSDIOReadWaitMode() function: correct values of SDIO_ReadWaitMode parameter<br>change <br>
|
||||
#define
|
||||
SDIO_ReadWaitMode_CLK
|
||||
((uint32_t)0x00000000)<br> #define
|
||||
SDIO_ReadWaitMode_DATA2
|
||||
((uint32_t)0x00000001)<br>by<br> #define
|
||||
SDIO_ReadWaitMode_CLK
|
||||
((uint32_t)0x00000001)<br> #define
|
||||
SDIO_ReadWaitMode_DATA2
|
||||
((uint32_t)0x00000000)</span></li></ul></ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.2.0
|
||||
- 03/01/2010</span></h3>
|
||||
<ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||
for <b>STM32 Low-density Value line (STM32F100x4/6) and
|
||||
Medium-density Value line (STM32F100x8/B) devices</b>.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Almost
|
||||
peripherals drivers were updated to support Value
|
||||
line devices features</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Drivers limitations fix and enhancements. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||
|
||||
</ul>
|
||||
<ol style="margin-top: 0in;" start="2" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new
|
||||
firmware driver for CEC peripheral: stm32f10x_cec.h and stm32f10x_cec.c</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Timers drivers stm32f10x_tim.h/.c: add support for new General Purpose Timers: TIM15, TIM16 and TIM17.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC driver: add support for new Value peripherals: HDMI-CEC, TIM15, TIM16 and TIM17.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GPIO driver: add new remap parameters for TIM1, TIM15, TIM16, TIM17 and HDMI-CEC: </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM1_DMA, </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM15, GPIO_Remap_TIM16, GPIO_Remap_TIM17, GPIO_Remap_CEC.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">USART
|
||||
driver: add support for Oversampling by 8 mode and onebit method. 2
|
||||
functions has been added: USART_OverSampling8Cmd() and
|
||||
USART_OneBitMethodCmd().<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DAC
|
||||
driver: add new functions handling the DAC under run feature:
|
||||
DAC_ITConfig(), DAC_GetFlagStatus(), DAC_ClearFlag(), DAC_GetITStatus()
|
||||
and DAC_ClearITPendingBit().</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DBGMCU driver: add new parameters for TIM15, TIM16 and TIM17: DBGMCU_TIM15_STOP, DBGMCU_TIM16_STOP, DBGMCU_TIM17_STOP.<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">FLASH
|
||||
driver: the FLASH_EraseOptionBytes() function updated. This is now just
|
||||
erasing the option bytes without modifying the RDP status either
|
||||
enabled or disabled.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">PWR
|
||||
driver: the PWR_EnterSTOPMode() function updated. When woken up from
|
||||
STOP mode, this function resets again the SLEEPDEEP bit in the
|
||||
Cortex-M3 System Control register to allow Sleep mode entering.</span></li>
|
||||
|
||||
|
||||
</ul>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||
enclosed firmware and all the related documentation are not covered by
|
||||
a License Agreement, if you need such License you can contact your
|
||||
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||
<hr align="center" size="2" width="100%"></span></div>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32(<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<p class="MsoNormal"><o:p> </o:p></p>
|
||||
</div>
|
||||
</body></html>
|
||||
|
|
@ -0,0 +1,385 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_GPIO_H
|
||||
#define __STM32F10x_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
|
||||
((PERIPH) == GPIOB) || \
|
||||
((PERIPH) == GPIOC) || \
|
||||
((PERIPH) == GPIOD) || \
|
||||
((PERIPH) == GPIOE) || \
|
||||
((PERIPH) == GPIOF) || \
|
||||
((PERIPH) == GPIOG))
|
||||
|
||||
/**
|
||||
* @brief Output Maximum frequency selection
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Speed_10MHz = 1,
|
||||
GPIO_Speed_2MHz,
|
||||
GPIO_Speed_50MHz
|
||||
}GPIOSpeed_TypeDef;
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
|
||||
((SPEED) == GPIO_Speed_50MHz))
|
||||
|
||||
/**
|
||||
* @brief Configuration Mode enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{ GPIO_Mode_AIN = 0x0,
|
||||
GPIO_Mode_IN_FLOATING = 0x04,
|
||||
GPIO_Mode_IPD = 0x28,
|
||||
GPIO_Mode_IPU = 0x48,
|
||||
GPIO_Mode_Out_OD = 0x14,
|
||||
GPIO_Mode_Out_PP = 0x10,
|
||||
GPIO_Mode_AF_OD = 0x1C,
|
||||
GPIO_Mode_AF_PP = 0x18
|
||||
}GPIOMode_TypeDef;
|
||||
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
|
||||
((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
|
||||
((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
|
||||
((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
|
||||
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_pins_define */
|
||||
|
||||
GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIOSpeed_TypeDef */
|
||||
|
||||
GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIOMode_TypeDef */
|
||||
}GPIO_InitTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Bit_SET and Bit_RESET enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{ Bit_RESET = 0,
|
||||
Bit_SET
|
||||
}BitAction;
|
||||
|
||||
#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pins_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||
#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||
#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||
#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||
#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||
#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||
#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||
#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||
#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||
#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||
#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||
#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||
#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||
#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||
#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||
#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||
#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
||||
|
||||
#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
|
||||
|
||||
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
|
||||
((PIN) == GPIO_Pin_1) || \
|
||||
((PIN) == GPIO_Pin_2) || \
|
||||
((PIN) == GPIO_Pin_3) || \
|
||||
((PIN) == GPIO_Pin_4) || \
|
||||
((PIN) == GPIO_Pin_5) || \
|
||||
((PIN) == GPIO_Pin_6) || \
|
||||
((PIN) == GPIO_Pin_7) || \
|
||||
((PIN) == GPIO_Pin_8) || \
|
||||
((PIN) == GPIO_Pin_9) || \
|
||||
((PIN) == GPIO_Pin_10) || \
|
||||
((PIN) == GPIO_Pin_11) || \
|
||||
((PIN) == GPIO_Pin_12) || \
|
||||
((PIN) == GPIO_Pin_13) || \
|
||||
((PIN) == GPIO_Pin_14) || \
|
||||
((PIN) == GPIO_Pin_15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Remap_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
|
||||
#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
|
||||
#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
|
||||
#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
|
||||
#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
|
||||
#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
|
||||
#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
|
||||
#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
|
||||
#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
|
||||
#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
|
||||
#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
|
||||
#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
|
||||
#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
|
||||
#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
|
||||
#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
|
||||
#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
|
||||
#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
|
||||
#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
|
||||
#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
|
||||
#define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
|
||||
#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
||||
to TIM2 Internal Trigger 1 for calibration
|
||||
(only for Connectivity line devices) */
|
||||
#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
|
||||
|
||||
#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */
|
||||
#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */
|
||||
|
||||
#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */
|
||||
#define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
#define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||
|
||||
#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */
|
||||
#define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */
|
||||
#define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
||||
only for High density Value line devices) */
|
||||
|
||||
#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
|
||||
((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
|
||||
((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
|
||||
((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
|
||||
((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
|
||||
((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
|
||||
((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
|
||||
((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
|
||||
((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
|
||||
((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
|
||||
((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
|
||||
((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
|
||||
((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
|
||||
((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
|
||||
((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \
|
||||
((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \
|
||||
((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \
|
||||
((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \
|
||||
((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \
|
||||
((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \
|
||||
((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \
|
||||
((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Port_Sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_PortSourceGPIOA ((uint8_t)0x00)
|
||||
#define GPIO_PortSourceGPIOB ((uint8_t)0x01)
|
||||
#define GPIO_PortSourceGPIOC ((uint8_t)0x02)
|
||||
#define GPIO_PortSourceGPIOD ((uint8_t)0x03)
|
||||
#define GPIO_PortSourceGPIOE ((uint8_t)0x04)
|
||||
#define GPIO_PortSourceGPIOF ((uint8_t)0x05)
|
||||
#define GPIO_PortSourceGPIOG ((uint8_t)0x06)
|
||||
#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOE))
|
||||
|
||||
#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
|
||||
((PORTSOURCE) == GPIO_PortSourceGPIOG))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Pin_sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||
|
||||
#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
|
||||
((PINSOURCE) == GPIO_PinSource1) || \
|
||||
((PINSOURCE) == GPIO_PinSource2) || \
|
||||
((PINSOURCE) == GPIO_PinSource3) || \
|
||||
((PINSOURCE) == GPIO_PinSource4) || \
|
||||
((PINSOURCE) == GPIO_PinSource5) || \
|
||||
((PINSOURCE) == GPIO_PinSource6) || \
|
||||
((PINSOURCE) == GPIO_PinSource7) || \
|
||||
((PINSOURCE) == GPIO_PinSource8) || \
|
||||
((PINSOURCE) == GPIO_PinSource9) || \
|
||||
((PINSOURCE) == GPIO_PinSource10) || \
|
||||
((PINSOURCE) == GPIO_PinSource11) || \
|
||||
((PINSOURCE) == GPIO_PinSource12) || \
|
||||
((PINSOURCE) == GPIO_PinSource13) || \
|
||||
((PINSOURCE) == GPIO_PinSource14) || \
|
||||
((PINSOURCE) == GPIO_PinSource15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Ethernet_Media_Interface
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000)
|
||||
#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)
|
||||
|
||||
#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
|
||||
((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_AFIODeInit(void);
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||
void GPIO_EventOutputCmd(FunctionalState NewState);
|
||||
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
|
||||
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_GPIO_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,727 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_rcc.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the RCC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_RCC_H
|
||||
#define __STM32F10x_RCC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RCC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
|
||||
uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
|
||||
uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
|
||||
uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
|
||||
uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
|
||||
}RCC_ClocksTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HSE_configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HSE_OFF ((uint32_t)0x00000000)
|
||||
#define RCC_HSE_ON ((uint32_t)0x00010000)
|
||||
#define RCC_HSE_Bypass ((uint32_t)0x00040000)
|
||||
#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
|
||||
((HSE) == RCC_HSE_Bypass))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_entry_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)
|
||||
|
||||
#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL)
|
||||
#define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)
|
||||
#define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)
|
||||
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||
((SOURCE) == RCC_PLLSource_HSE_Div1) || \
|
||||
((SOURCE) == RCC_PLLSource_HSE_Div2))
|
||||
#else
|
||||
#define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000)
|
||||
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||
((SOURCE) == RCC_PLLSource_PREDIV1))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
#ifndef STM32F10X_CL
|
||||
#define RCC_PLLMul_2 ((uint32_t)0x00000000)
|
||||
#define RCC_PLLMul_3 ((uint32_t)0x00040000)
|
||||
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||
#define RCC_PLLMul_10 ((uint32_t)0x00200000)
|
||||
#define RCC_PLLMul_11 ((uint32_t)0x00240000)
|
||||
#define RCC_PLLMul_12 ((uint32_t)0x00280000)
|
||||
#define RCC_PLLMul_13 ((uint32_t)0x002C0000)
|
||||
#define RCC_PLLMul_14 ((uint32_t)0x00300000)
|
||||
#define RCC_PLLMul_15 ((uint32_t)0x00340000)
|
||||
#define RCC_PLLMul_16 ((uint32_t)0x00380000)
|
||||
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \
|
||||
((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||
((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
|
||||
((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
|
||||
((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
|
||||
((MUL) == RCC_PLLMul_16))
|
||||
|
||||
#else
|
||||
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||
#define RCC_PLLMul_6_5 ((uint32_t)0x00340000)
|
||||
|
||||
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||
((MUL) == RCC_PLLMul_6_5))
|
||||
#endif /* STM32F10X_CL */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PREDIV1_division_factor
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||
#define RCC_PREDIV1_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV1_Div2 ((uint32_t)0x00000001)
|
||||
#define RCC_PREDIV1_Div3 ((uint32_t)0x00000002)
|
||||
#define RCC_PREDIV1_Div4 ((uint32_t)0x00000003)
|
||||
#define RCC_PREDIV1_Div5 ((uint32_t)0x00000004)
|
||||
#define RCC_PREDIV1_Div6 ((uint32_t)0x00000005)
|
||||
#define RCC_PREDIV1_Div7 ((uint32_t)0x00000006)
|
||||
#define RCC_PREDIV1_Div8 ((uint32_t)0x00000007)
|
||||
#define RCC_PREDIV1_Div9 ((uint32_t)0x00000008)
|
||||
#define RCC_PREDIV1_Div10 ((uint32_t)0x00000009)
|
||||
#define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A)
|
||||
#define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B)
|
||||
#define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C)
|
||||
#define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D)
|
||||
#define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E)
|
||||
#define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F)
|
||||
|
||||
#define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \
|
||||
((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16))
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PREDIV1_clock_source
|
||||
* @{
|
||||
*/
|
||||
#ifdef STM32F10X_CL
|
||||
/* PREDIV1 clock source (for STM32 connectivity line devices) */
|
||||
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000)
|
||||
|
||||
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \
|
||||
((SOURCE) == RCC_PREDIV1_Source_PLL2))
|
||||
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
||||
/* PREDIV1 clock source (for STM32 Value line devices) */
|
||||
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||
|
||||
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE))
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
/** @defgroup PREDIV2_division_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PREDIV2_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_PREDIV2_Div2 ((uint32_t)0x00000010)
|
||||
#define RCC_PREDIV2_Div3 ((uint32_t)0x00000020)
|
||||
#define RCC_PREDIV2_Div4 ((uint32_t)0x00000030)
|
||||
#define RCC_PREDIV2_Div5 ((uint32_t)0x00000040)
|
||||
#define RCC_PREDIV2_Div6 ((uint32_t)0x00000050)
|
||||
#define RCC_PREDIV2_Div7 ((uint32_t)0x00000060)
|
||||
#define RCC_PREDIV2_Div8 ((uint32_t)0x00000070)
|
||||
#define RCC_PREDIV2_Div9 ((uint32_t)0x00000080)
|
||||
#define RCC_PREDIV2_Div10 ((uint32_t)0x00000090)
|
||||
#define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0)
|
||||
#define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0)
|
||||
#define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0)
|
||||
#define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0)
|
||||
#define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0)
|
||||
#define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0)
|
||||
|
||||
#define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \
|
||||
((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PLL2_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLL2Mul_8 ((uint32_t)0x00000600)
|
||||
#define RCC_PLL2Mul_9 ((uint32_t)0x00000700)
|
||||
#define RCC_PLL2Mul_10 ((uint32_t)0x00000800)
|
||||
#define RCC_PLL2Mul_11 ((uint32_t)0x00000900)
|
||||
#define RCC_PLL2Mul_12 ((uint32_t)0x00000A00)
|
||||
#define RCC_PLL2Mul_13 ((uint32_t)0x00000B00)
|
||||
#define RCC_PLL2Mul_14 ((uint32_t)0x00000C00)
|
||||
#define RCC_PLL2Mul_16 ((uint32_t)0x00000E00)
|
||||
#define RCC_PLL2Mul_20 ((uint32_t)0x00000F00)
|
||||
|
||||
#define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \
|
||||
((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \
|
||||
((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \
|
||||
((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \
|
||||
((MUL) == RCC_PLL2Mul_20))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PLL3_multiplication_factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLL3Mul_8 ((uint32_t)0x00006000)
|
||||
#define RCC_PLL3Mul_9 ((uint32_t)0x00007000)
|
||||
#define RCC_PLL3Mul_10 ((uint32_t)0x00008000)
|
||||
#define RCC_PLL3Mul_11 ((uint32_t)0x00009000)
|
||||
#define RCC_PLL3Mul_12 ((uint32_t)0x0000A000)
|
||||
#define RCC_PLL3Mul_13 ((uint32_t)0x0000B000)
|
||||
#define RCC_PLL3Mul_14 ((uint32_t)0x0000C000)
|
||||
#define RCC_PLL3Mul_16 ((uint32_t)0x0000E000)
|
||||
#define RCC_PLL3Mul_20 ((uint32_t)0x0000F000)
|
||||
|
||||
#define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \
|
||||
((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \
|
||||
((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \
|
||||
((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \
|
||||
((MUL) == RCC_PLL3Mul_20))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/** @defgroup System_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
|
||||
#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
|
||||
#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
|
||||
#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_HSE) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_PLLCLK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
|
||||
#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
|
||||
#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
|
||||
#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
|
||||
#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
|
||||
#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
|
||||
#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
|
||||
#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
|
||||
#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
|
||||
((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
|
||||
((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
|
||||
((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
|
||||
((HCLK) == RCC_SYSCLK_Div512))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_APB2_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HCLK_Div1 ((uint32_t)0x00000000)
|
||||
#define RCC_HCLK_Div2 ((uint32_t)0x00000400)
|
||||
#define RCC_HCLK_Div4 ((uint32_t)0x00000500)
|
||||
#define RCC_HCLK_Div8 ((uint32_t)0x00000600)
|
||||
#define RCC_HCLK_Div16 ((uint32_t)0x00000700)
|
||||
#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
|
||||
((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
|
||||
((PCLK) == RCC_HCLK_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Interrupt_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_IT_LSIRDY ((uint8_t)0x01)
|
||||
#define RCC_IT_LSERDY ((uint8_t)0x02)
|
||||
#define RCC_IT_HSIRDY ((uint8_t)0x04)
|
||||
#define RCC_IT_HSERDY ((uint8_t)0x08)
|
||||
#define RCC_IT_PLLRDY ((uint8_t)0x10)
|
||||
#define RCC_IT_CSS ((uint8_t)0x80)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))
|
||||
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))
|
||||
#else
|
||||
#define RCC_IT_PLL2RDY ((uint8_t)0x20)
|
||||
#define RCC_IT_PLL3RDY ((uint8_t)0x40)
|
||||
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00))
|
||||
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
|
||||
((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY))
|
||||
#define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00)
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
/** @defgroup USB_Device_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)
|
||||
#define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \
|
||||
((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#else
|
||||
/** @defgroup USB_OTG_FS_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00)
|
||||
#define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \
|
||||
((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
/** @defgroup I2S2_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00)
|
||||
#define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \
|
||||
((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S3_clock_source
|
||||
* @{
|
||||
*/
|
||||
#define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00)
|
||||
#define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \
|
||||
((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
|
||||
/** @defgroup ADC_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PCLK2_Div2 ((uint32_t)0x00000000)
|
||||
#define RCC_PCLK2_Div4 ((uint32_t)0x00004000)
|
||||
#define RCC_PCLK2_Div6 ((uint32_t)0x00008000)
|
||||
#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
|
||||
#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \
|
||||
((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup LSE_configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_LSE_OFF ((uint8_t)0x00)
|
||||
#define RCC_LSE_ON ((uint8_t)0x01)
|
||||
#define RCC_LSE_Bypass ((uint8_t)0x04)
|
||||
#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
|
||||
((LSE) == RCC_LSE_Bypass))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RTC_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
|
||||
#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
|
||||
#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)
|
||||
#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_LSI) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_HSE_Div128))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
|
||||
#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
|
||||
#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
|
||||
#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
|
||||
#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
|
||||
#define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
|
||||
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))
|
||||
#else
|
||||
#define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
|
||||
#define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
|
||||
#define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
|
||||
#define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
|
||||
|
||||
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00))
|
||||
#define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00))
|
||||
#endif /* STM32F10X_CL */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB2_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
|
||||
#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
|
||||
#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
|
||||
#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
|
||||
#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
|
||||
#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
|
||||
#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
|
||||
#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
|
||||
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
|
||||
#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
|
||||
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
|
||||
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
|
||||
#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
|
||||
#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
|
||||
#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
|
||||
#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000)
|
||||
#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000)
|
||||
#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000)
|
||||
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)
|
||||
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)
|
||||
#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000)
|
||||
|
||||
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_peripheral
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
|
||||
#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
|
||||
#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
|
||||
#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
|
||||
#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
|
||||
#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
|
||||
#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
|
||||
#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
|
||||
#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
|
||||
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
|
||||
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
|
||||
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
|
||||
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
|
||||
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
|
||||
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
|
||||
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
|
||||
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
|
||||
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
|
||||
#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
|
||||
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
|
||||
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
|
||||
#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
|
||||
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
|
||||
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
|
||||
#define RCC_APB1Periph_CEC ((uint32_t)0x40000000)
|
||||
|
||||
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Clock_source_to_output_on_MCO_pin
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_MCO_NoClock ((uint8_t)0x00)
|
||||
#define RCC_MCO_SYSCLK ((uint8_t)0x04)
|
||||
#define RCC_MCO_HSI ((uint8_t)0x05)
|
||||
#define RCC_MCO_HSE ((uint8_t)0x06)
|
||||
#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||
((MCO) == RCC_MCO_PLLCLK_Div2))
|
||||
#else
|
||||
#define RCC_MCO_PLL2CLK ((uint8_t)0x08)
|
||||
#define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09)
|
||||
#define RCC_MCO_XT1 ((uint8_t)0x0A)
|
||||
#define RCC_MCO_PLL3CLK ((uint8_t)0x0B)
|
||||
|
||||
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||
((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \
|
||||
((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \
|
||||
((MCO) == RCC_MCO_PLL3CLK))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
|
||||
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
|
||||
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
|
||||
#define RCC_FLAG_LSERDY ((uint8_t)0x41)
|
||||
#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
|
||||
#define RCC_FLAG_PINRST ((uint8_t)0x7A)
|
||||
#define RCC_FLAG_PORRST ((uint8_t)0x7B)
|
||||
#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
|
||||
#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
|
||||
#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
|
||||
#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_LPWRRST))
|
||||
#else
|
||||
#define RCC_FLAG_PLL2RDY ((uint8_t)0x3B)
|
||||
#define RCC_FLAG_PLL3RDY ((uint8_t)0x3D)
|
||||
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||
((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \
|
||||
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_LPWRRST))
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void RCC_DeInit(void);
|
||||
void RCC_HSEConfig(uint32_t RCC_HSE);
|
||||
ErrorStatus RCC_WaitForHSEStartUp(void);
|
||||
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
|
||||
void RCC_HSICmd(FunctionalState NewState);
|
||||
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
|
||||
void RCC_PLLCmd(FunctionalState NewState);
|
||||
|
||||
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||
void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div);
|
||||
#endif
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div);
|
||||
void RCC_PLL2Config(uint32_t RCC_PLL2Mul);
|
||||
void RCC_PLL2Cmd(FunctionalState NewState);
|
||||
void RCC_PLL3Config(uint32_t RCC_PLL3Mul);
|
||||
void RCC_PLL3Cmd(FunctionalState NewState);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
|
||||
uint8_t RCC_GetSYSCLKSource(void);
|
||||
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
|
||||
void RCC_PCLK1Config(uint32_t RCC_HCLK);
|
||||
void RCC_PCLK2Config(uint32_t RCC_HCLK);
|
||||
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
|
||||
|
||||
#ifndef STM32F10X_CL
|
||||
void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
|
||||
#else
|
||||
void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource);
|
||||
void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_LSEConfig(uint8_t RCC_LSE);
|
||||
void RCC_LSICmd(FunctionalState NewState);
|
||||
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
|
||||
void RCC_RTCCLKCmd(FunctionalState NewState);
|
||||
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
|
||||
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_BackupResetCmd(FunctionalState NewState);
|
||||
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
|
||||
void RCC_MCOConfig(uint8_t RCC_MCO);
|
||||
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
|
||||
void RCC_ClearFlag(void);
|
||||
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
|
||||
void RCC_ClearITPendingBit(uint8_t RCC_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_RCC_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,487 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the SPI firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_SPI_H
|
||||
#define __STM32F10x_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
||||
This parameter can be a value of @ref SPI_data_direction */
|
||||
|
||||
uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_mode */
|
||||
|
||||
uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
|
||||
uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
|
||||
}SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2S Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
|
||||
This parameter can be a value of @ref I2S_Mode */
|
||||
|
||||
uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Standard */
|
||||
|
||||
uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Data_Format */
|
||||
|
||||
uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
||||
This parameter can be a value of @ref I2S_MCLK_Output */
|
||||
|
||||
uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Audio_Frequency */
|
||||
|
||||
uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
|
||||
This parameter can be a value of @ref I2S_Clock_Polarity */
|
||||
}I2S_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
|
||||
((PERIPH) == SPI2) || \
|
||||
((PERIPH) == SPI3))
|
||||
|
||||
#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
|
||||
((PERIPH) == SPI3))
|
||||
|
||||
/** @defgroup SPI_data_direction
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
|
||||
#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
|
||||
#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
|
||||
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
|
||||
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
||||
((MODE) == SPI_Direction_2Lines_RxOnly) || \
|
||||
((MODE) == SPI_Direction_1Line_Rx) || \
|
||||
((MODE) == SPI_Direction_1Line_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Mode_Master ((uint16_t)0x0104)
|
||||
#define SPI_Mode_Slave ((uint16_t)0x0000)
|
||||
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
||||
((MODE) == SPI_Mode_Slave))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_data_size
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_DataSize_16b ((uint16_t)0x0800)
|
||||
#define SPI_DataSize_8b ((uint16_t)0x0000)
|
||||
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
||||
((DATASIZE) == SPI_DataSize_8b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPOL_Low ((uint16_t)0x0000)
|
||||
#define SPI_CPOL_High ((uint16_t)0x0002)
|
||||
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
||||
((CPOL) == SPI_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define SPI_CPHA_2Edge ((uint16_t)0x0001)
|
||||
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
||||
((CPHA) == SPI_CPHA_2Edge))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSS_Soft ((uint16_t)0x0200)
|
||||
#define SPI_NSS_Hard ((uint16_t)0x0000)
|
||||
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
|
||||
((NSS) == SPI_NSS_Hard))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
|
||||
#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
|
||||
#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
|
||||
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
|
||||
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
|
||||
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
|
||||
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
|
||||
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_256))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_FirstBit_MSB ((uint16_t)0x0000)
|
||||
#define SPI_FirstBit_LSB ((uint16_t)0x0080)
|
||||
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
|
||||
((BIT) == SPI_FirstBit_LSB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_Mode_SlaveTx ((uint16_t)0x0000)
|
||||
#define I2S_Mode_SlaveRx ((uint16_t)0x0100)
|
||||
#define I2S_Mode_MasterTx ((uint16_t)0x0200)
|
||||
#define I2S_Mode_MasterRx ((uint16_t)0x0300)
|
||||
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
|
||||
((MODE) == I2S_Mode_SlaveRx) || \
|
||||
((MODE) == I2S_Mode_MasterTx) || \
|
||||
((MODE) == I2S_Mode_MasterRx) )
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Standard
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_Standard_Phillips ((uint16_t)0x0000)
|
||||
#define I2S_Standard_MSB ((uint16_t)0x0010)
|
||||
#define I2S_Standard_LSB ((uint16_t)0x0020)
|
||||
#define I2S_Standard_PCMShort ((uint16_t)0x0030)
|
||||
#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
|
||||
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
|
||||
((STANDARD) == I2S_Standard_MSB) || \
|
||||
((STANDARD) == I2S_Standard_LSB) || \
|
||||
((STANDARD) == I2S_Standard_PCMShort) || \
|
||||
((STANDARD) == I2S_Standard_PCMLong))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Data_Format
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_DataFormat_16b ((uint16_t)0x0000)
|
||||
#define I2S_DataFormat_16bextended ((uint16_t)0x0001)
|
||||
#define I2S_DataFormat_24b ((uint16_t)0x0003)
|
||||
#define I2S_DataFormat_32b ((uint16_t)0x0005)
|
||||
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
|
||||
((FORMAT) == I2S_DataFormat_16bextended) || \
|
||||
((FORMAT) == I2S_DataFormat_24b) || \
|
||||
((FORMAT) == I2S_DataFormat_32b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_MCLK_Output
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
|
||||
#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
|
||||
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
|
||||
((OUTPUT) == I2S_MCLKOutput_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Audio_Frequency
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_AudioFreq_192k ((uint32_t)192000)
|
||||
#define I2S_AudioFreq_96k ((uint32_t)96000)
|
||||
#define I2S_AudioFreq_48k ((uint32_t)48000)
|
||||
#define I2S_AudioFreq_44k ((uint32_t)44100)
|
||||
#define I2S_AudioFreq_32k ((uint32_t)32000)
|
||||
#define I2S_AudioFreq_22k ((uint32_t)22050)
|
||||
#define I2S_AudioFreq_16k ((uint32_t)16000)
|
||||
#define I2S_AudioFreq_11k ((uint32_t)11025)
|
||||
#define I2S_AudioFreq_8k ((uint32_t)8000)
|
||||
#define I2S_AudioFreq_Default ((uint32_t)2)
|
||||
|
||||
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
|
||||
((FREQ) <= I2S_AudioFreq_192k)) || \
|
||||
((FREQ) == I2S_AudioFreq_Default))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2S_CPOL_Low ((uint16_t)0x0000)
|
||||
#define I2S_CPOL_High ((uint16_t)0x0008)
|
||||
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
|
||||
((CPOL) == I2S_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_DMA_transfer_requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
|
||||
#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
|
||||
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_NSS_internal_software_management
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
|
||||
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
|
||||
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
|
||||
((INTERNAL) == SPI_NSSInternalSoft_Reset))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Transmit_Receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CRC_Tx ((uint8_t)0x00)
|
||||
#define SPI_CRC_Rx ((uint8_t)0x01)
|
||||
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_direction_transmit_receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
|
||||
#define SPI_Direction_Tx ((uint16_t)0x4000)
|
||||
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
|
||||
((DIRECTION) == SPI_Direction_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_IT_TXE ((uint8_t)0x71)
|
||||
#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
|
||||
#define SPI_I2S_IT_ERR ((uint8_t)0x50)
|
||||
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
|
||||
((IT) == SPI_I2S_IT_RXNE) || \
|
||||
((IT) == SPI_I2S_IT_ERR))
|
||||
#define SPI_I2S_IT_OVR ((uint8_t)0x56)
|
||||
#define SPI_IT_MODF ((uint8_t)0x55)
|
||||
#define SPI_IT_CRCERR ((uint8_t)0x54)
|
||||
#define I2S_IT_UDR ((uint8_t)0x53)
|
||||
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
|
||||
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
|
||||
((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
|
||||
((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_I2S_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
|
||||
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
|
||||
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
|
||||
#define I2S_FLAG_UDR ((uint16_t)0x0008)
|
||||
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
|
||||
#define SPI_FLAG_MODF ((uint16_t)0x0020)
|
||||
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
|
||||
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
|
||||
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
|
||||
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
|
||||
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
|
||||
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
|
||||
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_polynomial
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
||||
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
||||
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
|
||||
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
|
||||
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
||||
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
||||
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32F10x_SPI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,412 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_usart.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file contains all the functions prototypes for the USART
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_USART_H
|
||||
#define __STM32F10x_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief USART Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
- IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
|
||||
- FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
|
||||
|
||||
uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USART_Word_Length */
|
||||
|
||||
uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref USART_Stop_Bits */
|
||||
|
||||
uint16_t USART_Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref USART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Mode */
|
||||
|
||||
uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
|
||||
or disabled.
|
||||
This parameter can be a value of @ref USART_Hardware_Flow_Control */
|
||||
} USART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USART Clock Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Clock */
|
||||
|
||||
uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
|
||||
This parameter can be a value of @ref USART_Clock_Polarity */
|
||||
|
||||
uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
|
||||
This parameter can be a value of @ref USART_Clock_Phase */
|
||||
|
||||
uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||
This parameter can be a value of @ref USART_Last_Bit */
|
||||
} USART_ClockInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3) || \
|
||||
((PERIPH) == UART4) || \
|
||||
((PERIPH) == UART5))
|
||||
|
||||
#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3))
|
||||
|
||||
#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3) || \
|
||||
((PERIPH) == UART4))
|
||||
/** @defgroup USART_Word_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WordLength_8b ((uint16_t)0x0000)
|
||||
#define USART_WordLength_9b ((uint16_t)0x1000)
|
||||
|
||||
#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
|
||||
((LENGTH) == USART_WordLength_9b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Stop_Bits
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_StopBits_1 ((uint16_t)0x0000)
|
||||
#define USART_StopBits_0_5 ((uint16_t)0x1000)
|
||||
#define USART_StopBits_2 ((uint16_t)0x2000)
|
||||
#define USART_StopBits_1_5 ((uint16_t)0x3000)
|
||||
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
|
||||
((STOPBITS) == USART_StopBits_0_5) || \
|
||||
((STOPBITS) == USART_StopBits_2) || \
|
||||
((STOPBITS) == USART_StopBits_1_5))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Parity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Parity_No ((uint16_t)0x0000)
|
||||
#define USART_Parity_Even ((uint16_t)0x0400)
|
||||
#define USART_Parity_Odd ((uint16_t)0x0600)
|
||||
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
|
||||
((PARITY) == USART_Parity_Even) || \
|
||||
((PARITY) == USART_Parity_Odd))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Mode_Rx ((uint16_t)0x0004)
|
||||
#define USART_Mode_Tx ((uint16_t)0x0008)
|
||||
#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Hardware_Flow_Control
|
||||
* @{
|
||||
*/
|
||||
#define USART_HardwareFlowControl_None ((uint16_t)0x0000)
|
||||
#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
|
||||
#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
|
||||
#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
|
||||
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||
(((CONTROL) == USART_HardwareFlowControl_None) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_CTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock
|
||||
* @{
|
||||
*/
|
||||
#define USART_Clock_Disable ((uint16_t)0x0000)
|
||||
#define USART_Clock_Enable ((uint16_t)0x0800)
|
||||
#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
|
||||
((CLOCK) == USART_Clock_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPOL_Low ((uint16_t)0x0000)
|
||||
#define USART_CPOL_High ((uint16_t)0x0400)
|
||||
#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define USART_CPHA_2Edge ((uint16_t)0x0200)
|
||||
#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Last_Bit
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LastBit_Disable ((uint16_t)0x0000)
|
||||
#define USART_LastBit_Enable ((uint16_t)0x0100)
|
||||
#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
|
||||
((LASTBIT) == USART_LastBit_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Interrupt_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IT_PE ((uint16_t)0x0028)
|
||||
#define USART_IT_TXE ((uint16_t)0x0727)
|
||||
#define USART_IT_TC ((uint16_t)0x0626)
|
||||
#define USART_IT_RXNE ((uint16_t)0x0525)
|
||||
#define USART_IT_IDLE ((uint16_t)0x0424)
|
||||
#define USART_IT_LBD ((uint16_t)0x0846)
|
||||
#define USART_IT_CTS ((uint16_t)0x096A)
|
||||
#define USART_IT_ERR ((uint16_t)0x0060)
|
||||
#define USART_IT_ORE ((uint16_t)0x0360)
|
||||
#define USART_IT_NE ((uint16_t)0x0260)
|
||||
#define USART_IT_FE ((uint16_t)0x0160)
|
||||
#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
|
||||
#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
|
||||
((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
|
||||
#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_DMA_Requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_DMAReq_Tx ((uint16_t)0x0080)
|
||||
#define USART_DMAReq_Rx ((uint16_t)0x0040)
|
||||
#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_WakeUp_methods
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WakeUp_IdleLine ((uint16_t)0x0000)
|
||||
#define USART_WakeUp_AddressMark ((uint16_t)0x0800)
|
||||
#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
|
||||
((WAKEUP) == USART_WakeUp_AddressMark))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LIN_Break_Detection_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
|
||||
#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
|
||||
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
|
||||
(((LENGTH) == USART_LINBreakDetectLength_10b) || \
|
||||
((LENGTH) == USART_LINBreakDetectLength_11b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_IrDA_Low_Power
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IrDAMode_LowPower ((uint16_t)0x0004)
|
||||
#define USART_IrDAMode_Normal ((uint16_t)0x0000)
|
||||
#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
|
||||
((MODE) == USART_IrDAMode_Normal))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Flags
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_FLAG_CTS ((uint16_t)0x0200)
|
||||
#define USART_FLAG_LBD ((uint16_t)0x0100)
|
||||
#define USART_FLAG_TXE ((uint16_t)0x0080)
|
||||
#define USART_FLAG_TC ((uint16_t)0x0040)
|
||||
#define USART_FLAG_RXNE ((uint16_t)0x0020)
|
||||
#define USART_FLAG_IDLE ((uint16_t)0x0010)
|
||||
#define USART_FLAG_ORE ((uint16_t)0x0008)
|
||||
#define USART_FLAG_NE ((uint16_t)0x0004)
|
||||
#define USART_FLAG_FE ((uint16_t)0x0002)
|
||||
#define USART_FLAG_PE ((uint16_t)0x0001)
|
||||
#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
|
||||
((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
|
||||
((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
|
||||
((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
|
||||
((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
|
||||
|
||||
#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
||||
#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
|
||||
((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
|
||||
|| ((USART_FLAG) != USART_FLAG_CTS))
|
||||
#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
|
||||
#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
|
||||
#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void USART_DeInit(USART_TypeDef* USARTx);
|
||||
void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
|
||||
void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
|
||||
void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
|
||||
void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
|
||||
void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
|
||||
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
|
||||
uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
|
||||
void USART_SendBreak(USART_TypeDef* USARTx);
|
||||
void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
|
||||
void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
|
||||
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
|
||||
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_USART_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,650 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file provides all the GPIO firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_gpio.h"
|
||||
#include "stm32f10x_rcc.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO
|
||||
* @brief GPIO driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* ------------ RCC registers bit address in the alias region ----------------*/
|
||||
#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
|
||||
|
||||
/* --- EVENTCR Register -----*/
|
||||
|
||||
/* Alias word address of EVOE bit */
|
||||
#define EVCR_OFFSET (AFIO_OFFSET + 0x00)
|
||||
#define EVOE_BitNumber ((uint8_t)0x07)
|
||||
#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
|
||||
|
||||
|
||||
/* --- MAPR Register ---*/
|
||||
/* Alias word address of MII_RMII_SEL bit */
|
||||
#define MAPR_OFFSET (AFIO_OFFSET + 0x04)
|
||||
#define MII_RMII_SEL_BitNumber ((u8)0x17)
|
||||
#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
|
||||
|
||||
|
||||
#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
|
||||
#define LSB_MASK ((uint16_t)0xFFFF)
|
||||
#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
|
||||
#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
|
||||
#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
|
||||
#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the GPIOx peripheral registers to their default reset values.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
if (GPIOx == GPIOA)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOB)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOC)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOD)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOE)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
|
||||
}
|
||||
else if (GPIOx == GPIOF)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (GPIOx == GPIOG)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the Alternate Functions (remap, event control
|
||||
* and EXTI configuration) registers to their default reset values.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_AFIODeInit(void)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the GPIOx peripheral according to the specified
|
||||
* parameters in the GPIO_InitStruct.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
|
||||
* contains the configuration information for the specified GPIO peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
|
||||
uint32_t tmpreg = 0x00, pinmask = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
|
||||
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
|
||||
|
||||
/*---------------------------- GPIO Mode Configuration -----------------------*/
|
||||
currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
|
||||
if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
|
||||
/* Output mode */
|
||||
currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
|
||||
}
|
||||
/*---------------------------- GPIO CRL Configuration ------------------------*/
|
||||
/* Configure the eight low port pins */
|
||||
if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
|
||||
{
|
||||
tmpreg = GPIOx->CRL;
|
||||
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
||||
{
|
||||
pos = ((uint32_t)0x01) << pinpos;
|
||||
/* Get the port pins position */
|
||||
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
|
||||
if (currentpin == pos)
|
||||
{
|
||||
pos = pinpos << 2;
|
||||
/* Clear the corresponding low control register bits */
|
||||
pinmask = ((uint32_t)0x0F) << pos;
|
||||
tmpreg &= ~pinmask;
|
||||
/* Write the mode configuration in the corresponding bits */
|
||||
tmpreg |= (currentmode << pos);
|
||||
/* Reset the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
||||
{
|
||||
GPIOx->BRR = (((uint32_t)0x01) << pinpos);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
||||
{
|
||||
GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
GPIOx->CRL = tmpreg;
|
||||
}
|
||||
/*---------------------------- GPIO CRH Configuration ------------------------*/
|
||||
/* Configure the eight high port pins */
|
||||
if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
|
||||
{
|
||||
tmpreg = GPIOx->CRH;
|
||||
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
||||
{
|
||||
pos = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
/* Get the port pins position */
|
||||
currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
|
||||
if (currentpin == pos)
|
||||
{
|
||||
pos = pinpos << 2;
|
||||
/* Clear the corresponding high control register bits */
|
||||
pinmask = ((uint32_t)0x0F) << pos;
|
||||
tmpreg &= ~pinmask;
|
||||
/* Write the mode configuration in the corresponding bits */
|
||||
tmpreg |= (currentmode << pos);
|
||||
/* Reset the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
||||
{
|
||||
GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
}
|
||||
/* Set the corresponding ODR bit */
|
||||
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
||||
{
|
||||
GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
||||
}
|
||||
}
|
||||
}
|
||||
GPIOx->CRH = tmpreg;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each GPIO_InitStruct member with its default value.
|
||||
* @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
|
||||
* be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
/* Reset GPIO init structure parameters values */
|
||||
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
|
||||
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified input port pin.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The input port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO input data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval GPIO input data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->IDR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified output data port bit.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The output port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO output data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @retval GPIO output data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->ODR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BRR = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets or clears the selected data port bit.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be one of GPIO_Pin_x where x can be (0..15).
|
||||
* @param BitVal: specifies the value to be written to the selected bit.
|
||||
* This parameter can be one of the BitAction enum values:
|
||||
* @arg Bit_RESET: to clear the port pin
|
||||
* @arg Bit_SET: to set the port pin
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
assert_param(IS_GPIO_BIT_ACTION(BitVal));
|
||||
|
||||
if (BitVal != Bit_RESET)
|
||||
{
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOx->BRR = GPIO_Pin;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes data to the specified GPIO data port.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param PortVal: specifies the value to be written to the port output data register.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
GPIOx->ODR = PortVal;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Locks GPIO Pins configuration registers.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint32_t tmp = 0x00010000;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
tmp |= GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Reset LCKK bit */
|
||||
GPIOx->LCKR = GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the GPIO pin used as Event output.
|
||||
* @param GPIO_PortSource: selects the GPIO port to be used as source
|
||||
* for Event output.
|
||||
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
|
||||
* @param GPIO_PinSource: specifies the pin for the Event output.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
||||
{
|
||||
uint32_t tmpreg = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
|
||||
tmpreg = AFIO->EVCR;
|
||||
/* Clear the PORT[6:4] and PIN[3:0] bits */
|
||||
tmpreg &= EVCR_PORTPINCONFIG_MASK;
|
||||
tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
|
||||
tmpreg |= GPIO_PinSource;
|
||||
AFIO->EVCR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Event Output.
|
||||
* @param NewState: new state of the Event output.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EventOutputCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
*(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Changes the mapping of the specified pin.
|
||||
* @param GPIO_Remap: selects the pin to remap.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping
|
||||
* @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping
|
||||
* @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping
|
||||
* @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping
|
||||
* @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping
|
||||
* @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping
|
||||
* @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping
|
||||
* @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration
|
||||
* @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping
|
||||
* @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping
|
||||
* @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping
|
||||
* @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping
|
||||
* @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
|
||||
* @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled
|
||||
* @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)
|
||||
* @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
|
||||
* When the SPI3/I2S3 is remapped using this function, the SWJ is configured
|
||||
* to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST.
|
||||
* @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
||||
* to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
|
||||
* If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to
|
||||
* Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
|
||||
* @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
|
||||
* @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices)
|
||||
* @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices)
|
||||
* @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
|
||||
* @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
|
||||
* @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices)
|
||||
* @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
||||
* only for High density Value line devices)
|
||||
* @param NewState: new state of the port pin remapping.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
|
||||
{
|
||||
uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_REMAP(GPIO_Remap));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
||||
{
|
||||
tmpreg = AFIO->MAPR2;
|
||||
}
|
||||
else
|
||||
{
|
||||
tmpreg = AFIO->MAPR;
|
||||
}
|
||||
|
||||
tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
|
||||
tmp = GPIO_Remap & LSB_MASK;
|
||||
|
||||
if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
|
||||
{
|
||||
tmpreg &= DBGAFR_SWJCFG_MASK;
|
||||
AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
|
||||
{
|
||||
tmp1 = ((uint32_t)0x03) << tmpmask;
|
||||
tmpreg &= ~tmp1;
|
||||
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
|
||||
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
||||
}
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
|
||||
}
|
||||
|
||||
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
||||
{
|
||||
AFIO->MAPR2 = tmpreg;
|
||||
}
|
||||
else
|
||||
{
|
||||
AFIO->MAPR = tmpreg;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the GPIO pin used as EXTI Line.
|
||||
* @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
|
||||
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
|
||||
* @param GPIO_PinSource: specifies the EXTI line to be configured.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
||||
{
|
||||
uint32_t tmp = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
|
||||
tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
|
||||
AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
|
||||
AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the Ethernet media interface.
|
||||
* @note This function applies only to STM32 Connectivity line devices.
|
||||
* @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPIO_ETH_MediaInterface_MII: MII mode
|
||||
* @arg GPIO_ETH_MediaInterface_RMII: RMII mode
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
|
||||
{
|
||||
assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
|
||||
|
||||
/* Configure MII_RMII selection bit */
|
||||
*(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,908 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f10x_spi.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 11-March-2011
|
||||
* @brief This file provides all the SPI firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_spi.h"
|
||||
#include "stm32f10x_rcc.h"
|
||||
|
||||
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI
|
||||
* @brief SPI driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SPI_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* SPI SPE mask */
|
||||
#define CR1_SPE_Set ((uint16_t)0x0040)
|
||||
#define CR1_SPE_Reset ((uint16_t)0xFFBF)
|
||||
|
||||
/* I2S I2SE mask */
|
||||
#define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
|
||||
#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
|
||||
|
||||
/* SPI CRCNext mask */
|
||||
#define CR1_CRCNext_Set ((uint16_t)0x1000)
|
||||
|
||||
/* SPI CRCEN mask */
|
||||
#define CR1_CRCEN_Set ((uint16_t)0x2000)
|
||||
#define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
|
||||
|
||||
/* SPI SSOE mask */
|
||||
#define CR2_SSOE_Set ((uint16_t)0x0004)
|
||||
#define CR2_SSOE_Reset ((uint16_t)0xFFFB)
|
||||
|
||||
/* SPI registers Masks */
|
||||
#define CR1_CLEAR_Mask ((uint16_t)0x3040)
|
||||
#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
|
||||
|
||||
/* SPI or I2S mode selection masks */
|
||||
#define SPI_Mode_Select ((uint16_t)0xF7FF)
|
||||
#define I2S_Mode_Select ((uint16_t)0x0800)
|
||||
|
||||
/* I2S clock source selection masks */
|
||||
#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
|
||||
#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
|
||||
#define I2S_MUL_MASK ((uint32_t)(0x0000F000))
|
||||
#define I2S_DIV_MASK ((uint32_t)(0x000000F0))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the SPIx peripheral registers to their default
|
||||
* reset values (Affects also the I2Ss).
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
if (SPIx == SPI1)
|
||||
{
|
||||
/* Enable SPI1 reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
|
||||
/* Release SPI1 from reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
|
||||
}
|
||||
else if (SPIx == SPI2)
|
||||
{
|
||||
/* Enable SPI2 reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
/* Release SPI2 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (SPIx == SPI3)
|
||||
{
|
||||
/* Enable SPI3 reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
|
||||
/* Release SPI3 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPIx peripheral according to the specified
|
||||
* parameters in the SPI_InitStruct.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
uint16_t tmpreg = 0;
|
||||
|
||||
/* check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Check the SPI parameters */
|
||||
assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
|
||||
assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
|
||||
assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
|
||||
assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
|
||||
assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
|
||||
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
|
||||
assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
|
||||
assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
|
||||
|
||||
/*---------------------------- SPIx CR1 Configuration ------------------------*/
|
||||
/* Get the SPIx CR1 value */
|
||||
tmpreg = SPIx->CR1;
|
||||
/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
|
||||
tmpreg &= CR1_CLEAR_Mask;
|
||||
/* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
|
||||
master/salve mode, CPOL and CPHA */
|
||||
/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
|
||||
/* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
|
||||
/* Set LSBFirst bit according to SPI_FirstBit value */
|
||||
/* Set BR bits according to SPI_BaudRatePrescaler value */
|
||||
/* Set CPOL bit according to SPI_CPOL value */
|
||||
/* Set CPHA bit according to SPI_CPHA value */
|
||||
tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
|
||||
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
|
||||
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
|
||||
/* Write to SPIx CR1 */
|
||||
SPIx->CR1 = tmpreg;
|
||||
|
||||
/* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
|
||||
SPIx->I2SCFGR &= SPI_Mode_Select;
|
||||
|
||||
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
|
||||
/* Write to SPIx CRCPOLY */
|
||||
SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPIx peripheral according to the specified
|
||||
* parameters in the I2S_InitStruct.
|
||||
* @param SPIx: where x can be 2 or 3 to select the SPI peripheral
|
||||
* (configured in I2S mode).
|
||||
* @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SPI peripheral
|
||||
* configured in I2S mode.
|
||||
* @note
|
||||
* The function calculates the optimal prescaler needed to obtain the most
|
||||
* accurate audio frequency (depending on the I2S clock source, the PLL values
|
||||
* and the product configuration). But in case the prescaler value is greater
|
||||
* than 511, the default value (0x02) will be configured instead. *
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
|
||||
{
|
||||
uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
|
||||
uint32_t tmp = 0;
|
||||
RCC_ClocksTypeDef RCC_Clocks;
|
||||
uint32_t sourceclock = 0;
|
||||
|
||||
/* Check the I2S parameters */
|
||||
assert_param(IS_SPI_23_PERIPH(SPIx));
|
||||
assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
|
||||
assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
|
||||
assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
|
||||
assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
|
||||
assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
|
||||
assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
|
||||
|
||||
/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
|
||||
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
||||
SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
|
||||
SPIx->I2SPR = 0x0002;
|
||||
|
||||
/* Get the I2SCFGR register value */
|
||||
tmpreg = SPIx->I2SCFGR;
|
||||
|
||||
/* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
|
||||
if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
|
||||
{
|
||||
i2sodd = (uint16_t)0;
|
||||
i2sdiv = (uint16_t)2;
|
||||
}
|
||||
/* If the requested audio frequency is not the default, compute the prescaler */
|
||||
else
|
||||
{
|
||||
/* Check the frame length (For the Prescaler computing) */
|
||||
if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
|
||||
{
|
||||
/* Packet length is 16 bits */
|
||||
packetlength = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Packet length is 32 bits */
|
||||
packetlength = 2;
|
||||
}
|
||||
|
||||
/* Get the I2S clock source mask depending on the peripheral number */
|
||||
if(((uint32_t)SPIx) == SPI2_BASE)
|
||||
{
|
||||
/* The mask is relative to I2S2 */
|
||||
tmp = I2S2_CLOCK_SRC;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The mask is relative to I2S3 */
|
||||
tmp = I2S3_CLOCK_SRC;
|
||||
}
|
||||
|
||||
/* Check the I2S clock source configuration depending on the Device:
|
||||
Only Connectivity line devices have the PLL3 VCO clock */
|
||||
#ifdef STM32F10X_CL
|
||||
if((RCC->CFGR2 & tmp) != 0)
|
||||
{
|
||||
/* Get the configuration bits of RCC PLL3 multiplier */
|
||||
tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12);
|
||||
|
||||
/* Get the value of the PLL3 multiplier */
|
||||
if((tmp > 5) && (tmp < 15))
|
||||
{
|
||||
/* Multiplier is between 8 and 14 (value 15 is forbidden) */
|
||||
tmp += 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (tmp == 15)
|
||||
{
|
||||
/* Multiplier is 20 */
|
||||
tmp = 20;
|
||||
}
|
||||
}
|
||||
/* Get the PREDIV2 value */
|
||||
sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1);
|
||||
|
||||
/* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */
|
||||
sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* I2S Clock source is System clock: Get System Clock frequency */
|
||||
RCC_GetClocksFreq(&RCC_Clocks);
|
||||
|
||||
/* Get the source clock value: based on System Clock value */
|
||||
sourceclock = RCC_Clocks.SYSCLK_Frequency;
|
||||
}
|
||||
#else /* STM32F10X_HD */
|
||||
/* I2S Clock source is System clock: Get System Clock frequency */
|
||||
RCC_GetClocksFreq(&RCC_Clocks);
|
||||
|
||||
/* Get the source clock value: based on System Clock value */
|
||||
sourceclock = RCC_Clocks.SYSCLK_Frequency;
|
||||
#endif /* STM32F10X_CL */
|
||||
|
||||
/* Compute the Real divider depending on the MCLK output state with a floating point */
|
||||
if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
|
||||
{
|
||||
/* MCLK output is enabled */
|
||||
tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* MCLK output is disabled */
|
||||
tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
|
||||
}
|
||||
|
||||
/* Remove the floating point */
|
||||
tmp = tmp / 10;
|
||||
|
||||
/* Check the parity of the divider */
|
||||
i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
|
||||
|
||||
/* Compute the i2sdiv prescaler */
|
||||
i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
|
||||
|
||||
/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
|
||||
i2sodd = (uint16_t) (i2sodd << 8);
|
||||
}
|
||||
|
||||
/* Test if the divider is 1 or 0 or greater than 0xFF */
|
||||
if ((i2sdiv < 2) || (i2sdiv > 0xFF))
|
||||
{
|
||||
/* Set the default values */
|
||||
i2sdiv = 2;
|
||||
i2sodd = 0;
|
||||
}
|
||||
|
||||
/* Write to SPIx I2SPR register the computed value */
|
||||
SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
|
||||
|
||||
/* Configure the I2S with the SPI_InitStruct values */
|
||||
tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \
|
||||
(uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
|
||||
(uint16_t)I2S_InitStruct->I2S_CPOL))));
|
||||
|
||||
/* Write to SPIx I2SCFGR */
|
||||
SPIx->I2SCFGR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each SPI_InitStruct member with its default value.
|
||||
* @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
/*--------------- Reset SPI init structure parameters values -----------------*/
|
||||
/* Initialize the SPI_Direction member */
|
||||
SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
/* initialize the SPI_Mode member */
|
||||
SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
|
||||
/* initialize the SPI_DataSize member */
|
||||
SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
|
||||
/* Initialize the SPI_CPOL member */
|
||||
SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
|
||||
/* Initialize the SPI_CPHA member */
|
||||
SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
|
||||
/* Initialize the SPI_NSS member */
|
||||
SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
|
||||
/* Initialize the SPI_BaudRatePrescaler member */
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
|
||||
/* Initialize the SPI_FirstBit member */
|
||||
SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
/* Initialize the SPI_CRCPolynomial member */
|
||||
SPI_InitStruct->SPI_CRCPolynomial = 7;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each I2S_InitStruct member with its default value.
|
||||
* @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
|
||||
{
|
||||
/*--------------- Reset I2S init structure parameters values -----------------*/
|
||||
/* Initialize the I2S_Mode member */
|
||||
I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
|
||||
|
||||
/* Initialize the I2S_Standard member */
|
||||
I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
|
||||
|
||||
/* Initialize the I2S_DataFormat member */
|
||||
I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
|
||||
|
||||
/* Initialize the I2S_MCLKOutput member */
|
||||
I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
|
||||
|
||||
/* Initialize the I2S_AudioFreq member */
|
||||
I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
|
||||
|
||||
/* Initialize the I2S_CPOL member */
|
||||
I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI peripheral.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI peripheral */
|
||||
SPIx->CR1 |= CR1_SPE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI peripheral */
|
||||
SPIx->CR1 &= CR1_SPE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI peripheral (in I2S mode).
|
||||
* @param SPIx: where x can be 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_23_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI peripheral (in I2S mode) */
|
||||
SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI peripheral (in I2S mode) */
|
||||
SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI/I2S interrupts.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
|
||||
* @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
|
||||
* @arg SPI_I2S_IT_ERR: Error interrupt mask
|
||||
* @param NewState: new state of the specified SPI/I2S interrupt.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
|
||||
{
|
||||
uint16_t itpos = 0, itmask = 0 ;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI/I2S IT index */
|
||||
itpos = SPI_I2S_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = (uint16_t)1 << (uint16_t)itpos;
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI/I2S interrupt */
|
||||
SPIx->CR2 |= itmask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI/I2S interrupt */
|
||||
SPIx->CR2 &= (uint16_t)~itmask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SPIx/I2Sx DMA interface.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
|
||||
* @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
|
||||
* @param NewState: new state of the selected SPI/I2S DMA transfer request.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI/I2S DMA requests */
|
||||
SPIx->CR2 |= SPI_I2S_DMAReq;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI/I2S DMA requests */
|
||||
SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmits a Data through the SPIx/I2Sx peripheral.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param Data : Data to be transmitted.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Write in the DR register the data to be sent */
|
||||
SPIx->DR = Data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @retval The value of the received data.
|
||||
*/
|
||||
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the data in the DR register */
|
||||
return SPIx->DR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures internally by software the NSS pin for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
|
||||
* @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
|
||||
if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
|
||||
{
|
||||
/* Set NSS pin internally by software */
|
||||
SPIx->CR1 |= SPI_NSSInternalSoft_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset NSS pin internally by software */
|
||||
SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SS output for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx SS output.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI SS output */
|
||||
SPIx->CR2 |= CR2_SSOE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI SS output */
|
||||
SPIx->CR2 &= CR2_SSOE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the data size for the selected SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_DataSize: specifies the SPI data size.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_DataSize_16b: Set data frame format to 16bit
|
||||
* @arg SPI_DataSize_8b: Set data frame format to 8bit
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_DataSize));
|
||||
/* Clear DFF bit */
|
||||
SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
|
||||
/* Set new DFF bit value */
|
||||
SPIx->CR1 |= SPI_DataSize;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmit the SPIx CRC value.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Enable the selected SPI CRC transmission */
|
||||
SPIx->CR1 |= CR1_CRCNext_Set;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the CRC value calculation of the transferred bytes.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx CRC value calculation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI CRC calculation */
|
||||
SPIx->CR1 |= CR1_CRCEN_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI CRC calculation */
|
||||
SPIx->CR1 &= CR1_CRCEN_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the transmit or the receive CRC register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_CRC: specifies the CRC register to be read.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_CRC_Tx: Selects Tx CRC register
|
||||
* @arg SPI_CRC_Rx: Selects Rx CRC register
|
||||
* @retval The selected CRC register value..
|
||||
*/
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
|
||||
{
|
||||
uint16_t crcreg = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_CRC(SPI_CRC));
|
||||
if (SPI_CRC != SPI_CRC_Rx)
|
||||
{
|
||||
/* Get the Tx CRC register */
|
||||
crcreg = SPIx->TXCRCR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Get the Rx CRC register */
|
||||
crcreg = SPIx->RXCRCR;
|
||||
}
|
||||
/* Return the selected CRC register */
|
||||
return crcreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the CRC Polynomial register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @retval The CRC Polynomial register value.
|
||||
*/
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the CRC polynomial register */
|
||||
return SPIx->CRCPR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the data transfer direction in bi-directional mode for the specified SPI.
|
||||
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
|
||||
* @param SPI_Direction: specifies the data transfer direction in bi-directional mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_Direction_Tx: Selects Tx transmission direction
|
||||
* @arg SPI_Direction_Rx: Selects Rx receive direction
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DIRECTION(SPI_Direction));
|
||||
if (SPI_Direction == SPI_Direction_Tx)
|
||||
{
|
||||
/* Set the Tx only mode */
|
||||
SPIx->CR1 |= SPI_Direction_Tx;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the Rx only mode */
|
||||
SPIx->CR1 &= SPI_Direction_Rx;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI/I2S flag is set or not.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
|
||||
* @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
|
||||
* @arg SPI_I2S_FLAG_BSY: Busy flag.
|
||||
* @arg SPI_I2S_FLAG_OVR: Overrun flag.
|
||||
* @arg SPI_FLAG_MODF: Mode Fault flag.
|
||||
* @arg SPI_FLAG_CRCERR: CRC Error flag.
|
||||
* @arg I2S_FLAG_UDR: Underrun Error flag.
|
||||
* @arg I2S_FLAG_CHSIDE: Channel Side flag.
|
||||
* @retval The new state of SPI_I2S_FLAG (SET or RESET).
|
||||
*/
|
||||
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
|
||||
{
|
||||
FlagStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
|
||||
/* Check the status of the specified SPI/I2S flag */
|
||||
if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
|
||||
{
|
||||
/* SPI_I2S_FLAG is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_I2S_FLAG is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_I2S_FLAG status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) flag.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* @param SPI_I2S_FLAG: specifies the SPI flag to clear.
|
||||
* This function clears only CRCERR flag.
|
||||
* @note
|
||||
* - OVR (OverRun error) flag is cleared by software sequence: a read
|
||||
* operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
|
||||
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
|
||||
* - UDR (UnderRun error) flag is cleared by a read operation to
|
||||
* SPI_SR register (SPI_I2S_GetFlagStatus()).
|
||||
* - MODF (Mode Fault) flag is cleared by software sequence: a read/write
|
||||
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
|
||||
* write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) flag */
|
||||
SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* - 2 or 3 in I2S mode
|
||||
* @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
|
||||
* @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
|
||||
* @arg SPI_I2S_IT_OVR: Overrun interrupt.
|
||||
* @arg SPI_IT_MODF: Mode Fault interrupt.
|
||||
* @arg SPI_IT_CRCERR: CRC Error interrupt.
|
||||
* @arg I2S_IT_UDR: Underrun Error interrupt.
|
||||
* @retval The new state of SPI_I2S_IT (SET or RESET).
|
||||
*/
|
||||
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
|
||||
{
|
||||
ITStatus bitstatus = RESET;
|
||||
uint16_t itpos = 0, itmask = 0, enablestatus = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI/I2S IT index */
|
||||
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
||||
|
||||
/* Get the SPI/I2S IT mask */
|
||||
itmask = SPI_I2S_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = 0x01 << itmask;
|
||||
|
||||
/* Get the SPI_I2S_IT enable bit status */
|
||||
enablestatus = (SPIx->CR2 & itmask) ;
|
||||
|
||||
/* Check the status of the specified SPI/I2S interrupt */
|
||||
if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
|
||||
{
|
||||
/* SPI_I2S_IT is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_I2S_IT is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_I2S_IT status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
|
||||
* @param SPIx: where x can be
|
||||
* - 1, 2 or 3 in SPI mode
|
||||
* @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
|
||||
* This function clears only CRCERR interrupt pending bit.
|
||||
* @note
|
||||
* - OVR (OverRun Error) interrupt pending bit is cleared by software
|
||||
* sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
|
||||
* followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
|
||||
* - UDR (UnderRun Error) interrupt pending bit is cleared by a read
|
||||
* operation to SPI_SR register (SPI_I2S_GetITStatus()).
|
||||
* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
|
||||
* a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
|
||||
* followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
|
||||
* the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
|
||||
{
|
||||
uint16_t itpos = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
|
||||
|
||||
/* Get the SPI IT index */
|
||||
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
|
||||
SPIx->SR = (uint16_t)~itpos;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,77 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.5.0
|
||||
* @date 08-April-2011
|
||||
* @brief Library configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_CONF_H
|
||||
#define __STM32F10x_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
|
||||
/*#include "stm32f10x_adc.h"*/
|
||||
/*#include "stm32f10x_bkp.h"*/
|
||||
/*#include "stm32f10x_can.h"*/
|
||||
/*#include "stm32f10x_cec.h"*/
|
||||
/*#include "stm32f10x_crc.h"*/
|
||||
/*#include "stm32f10x_dac.h"*/
|
||||
/*#include "stm32f10x_dbgmcu.h"*/
|
||||
/*#include "stm32f10x_dma.h"*/
|
||||
/*#include "stm32f10x_exti.h"*/
|
||||
/*#include "stm32f10x_flash.h"*/
|
||||
/*#include "stm32f10x_fsmc.h"*/
|
||||
#include "stm32f10x_gpio.h" /* needed for configuring the SPI and UART pins */
|
||||
/*#include "stm32f10x_i2c.h"*/
|
||||
/*#include "stm32f10x_iwdg.h"*/
|
||||
/*#include "stm32f10x_pwr.h"*/
|
||||
#include "stm32f10x_rcc.h" /* needed for enabling the SPI and UART peripherals */
|
||||
/*#include "stm32f10x_rtc.h"*/
|
||||
/*#include "stm32f10x_sdio.h"*/
|
||||
#include "stm32f10x_spi.h" /* needed for low-level interfacing with SD-card */
|
||||
/*#include "stm32f10x_tim.h"*/
|
||||
#include "stm32f10x_usart.h" /* needed for UART logging during firmware updates from SD-card */
|
||||
/*#include "stm32f10x_wwdg.h"*/
|
||||
/*#include "misc.h"*/ /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function which reports
|
||||
* the name of the source file and the source line number of the call
|
||||
* that failed. If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#endif /* __STM32F10x_CONF_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,192 @@
|
|||
/*---------------------------------------------------------------------------/
|
||||
/ FatFs - FAT file system module configuration file R0.09b (C)ChaN, 2013
|
||||
/----------------------------------------------------------------------------/
|
||||
/
|
||||
/ CAUTION! Do not forget to make clean the project after any changes to
|
||||
/ the configuration options.
|
||||
/
|
||||
/----------------------------------------------------------------------------*/
|
||||
#ifndef _FFCONF
|
||||
#define _FFCONF 82786 /* Revision ID */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Functions and Buffer Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
|
||||
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
|
||||
/ object instead of the sector buffer in the individual file object for file
|
||||
/ data transfer. This reduces memory consumption 512 bytes each file object. */
|
||||
|
||||
|
||||
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
|
||||
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
|
||||
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
|
||||
/ f_truncate and useless f_getfree. */
|
||||
|
||||
|
||||
#define _FS_MINIMIZE 0 /* 0 to 3 */
|
||||
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
|
||||
/
|
||||
/ 0: Full function.
|
||||
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
|
||||
/ are removed.
|
||||
/ 2: f_opendir and f_readdir are removed in addition to 1.
|
||||
/ 3: f_lseek is removed in addition to 2. */
|
||||
|
||||
|
||||
#define _USE_STRFUNC 2 /* 0:Disable or 1-2:Enable */
|
||||
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
|
||||
|
||||
|
||||
#define _USE_MKFS 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
|
||||
|
||||
|
||||
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
|
||||
|
||||
|
||||
#define _USE_LABEL 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable volume label functions, set _USE_LAVEL to 1 */
|
||||
|
||||
|
||||
#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Locale and Namespace Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _CODE_PAGE 437
|
||||
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
|
||||
/ Incorrect setting of the code page can cause a file open failure.
|
||||
/
|
||||
/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows)
|
||||
/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows)
|
||||
/ 949 - Korean (DBCS, OEM, Windows)
|
||||
/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows)
|
||||
/ 1250 - Central Europe (Windows)
|
||||
/ 1251 - Cyrillic (Windows)
|
||||
/ 1252 - Latin 1 (Windows)
|
||||
/ 1253 - Greek (Windows)
|
||||
/ 1254 - Turkish (Windows)
|
||||
/ 1255 - Hebrew (Windows)
|
||||
/ 1256 - Arabic (Windows)
|
||||
/ 1257 - Baltic (Windows)
|
||||
/ 1258 - Vietnam (OEM, Windows)
|
||||
/ 437 - U.S. (OEM)
|
||||
/ 720 - Arabic (OEM)
|
||||
/ 737 - Greek (OEM)
|
||||
/ 775 - Baltic (OEM)
|
||||
/ 850 - Multilingual Latin 1 (OEM)
|
||||
/ 858 - Multilingual Latin 1 + Euro (OEM)
|
||||
/ 852 - Latin 2 (OEM)
|
||||
/ 855 - Cyrillic (OEM)
|
||||
/ 866 - Russian (OEM)
|
||||
/ 857 - Turkish (OEM)
|
||||
/ 862 - Hebrew (OEM)
|
||||
/ 874 - Thai (OEM, Windows)
|
||||
/ 1 - ASCII only (Valid for non LFN cfg.)
|
||||
*/
|
||||
|
||||
|
||||
#define _USE_LFN 1 /* 0 to 3 */
|
||||
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
|
||||
/* The _USE_LFN option switches the LFN support.
|
||||
/
|
||||
/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect.
|
||||
/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant.
|
||||
/ 2: Enable LFN with dynamic working buffer on the STACK.
|
||||
/ 3: Enable LFN with dynamic working buffer on the HEAP.
|
||||
/
|
||||
/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN,
|
||||
/ Unicode handling functions ff_convert() and ff_wtoupper() must be added
|
||||
/ to the project. When enable to use heap, memory control functions
|
||||
/ ff_memalloc() and ff_memfree() must be added to the project. */
|
||||
|
||||
|
||||
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
|
||||
/* To switch the character code set on FatFs API to Unicode,
|
||||
/ enable LFN feature and set _LFN_UNICODE to 1. */
|
||||
|
||||
|
||||
#define _FS_RPATH 0 /* 0 to 2 */
|
||||
/* The _FS_RPATH option configures relative path feature.
|
||||
/
|
||||
/ 0: Disable relative path feature and remove related functions.
|
||||
/ 1: Enable relative path. f_chdrive() and f_chdir() are available.
|
||||
/ 2: f_getcwd() is available in addition to 1.
|
||||
/
|
||||
/ Note that output of the f_readdir fnction is affected by this option. */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Physical Drive Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _VOLUMES 1
|
||||
/* Number of volumes (logical drives) to be used. */
|
||||
|
||||
|
||||
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
|
||||
/* Maximum sector size to be handled.
|
||||
/ Always set 512 for memory card and hard disk but a larger value may be
|
||||
/ required for on-board flash memory, floppy disk and optical disk.
|
||||
/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size
|
||||
/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */
|
||||
|
||||
|
||||
#define _MULTI_PARTITION 0 /* 0:Single partition, 1:Enable multiple partition */
|
||||
/* When set to 0, each volume is bound to the same physical drive number and
|
||||
/ it can mount only first primaly partition. When it is set to 1, each volume
|
||||
/ is tied to the partitions listed in VolToPart[]. */
|
||||
|
||||
|
||||
#define _USE_ERASE 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command
|
||||
/ should be added to the disk_ioctl functio. */
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ System Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _WORD_ACCESS 0 /* 0 or 1 */
|
||||
/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS
|
||||
/ option defines which access method is used to the word data on the FAT volume.
|
||||
/
|
||||
/ 0: Byte-by-byte access.
|
||||
/ 1: Word access. Do not choose this unless following condition is met.
|
||||
/
|
||||
/ When the byte order on the memory is big-endian or address miss-aligned word
|
||||
/ access results incorrect behavior, the _WORD_ACCESS must be set to 0.
|
||||
/ If it is not the case, the value can also be set to 1 to improve the
|
||||
/ performance and code size.
|
||||
*/
|
||||
|
||||
|
||||
/* A header file that defines sync object types on the O/S, such as
|
||||
/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */
|
||||
|
||||
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
|
||||
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
|
||||
#define _SYNC_t HANDLE /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */
|
||||
|
||||
/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module.
|
||||
/
|
||||
/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect.
|
||||
/ 1: Enable reentrancy. Also user provided synchronization handlers,
|
||||
/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj
|
||||
/ function must be added to the project. */
|
||||
|
||||
|
||||
#define _FS_LOCK 0 /* 0:Disable or >=1:Enable */
|
||||
/* To enable file lock control feature, set _FS_LOCK to 1 or greater.
|
||||
The value defines how many files can be opened simultaneously. */
|
||||
|
||||
|
||||
#endif /* _FFCONFIG */
|
||||
|
|
@ -0,0 +1,683 @@
|
|||
/*------------------------------------------------------------------------/
|
||||
/ MMCv3/SDv1/SDv2 (in SPI mode) control module
|
||||
/-------------------------------------------------------------------------/
|
||||
/
|
||||
/ Copyright (C) 2013, ChaN, all right reserved.
|
||||
/
|
||||
/ * This software is a free software and there is NO WARRANTY.
|
||||
/ * No restriction on use. You can use, modify and redistribute it for
|
||||
/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
|
||||
/ * Redistributions of source code must retain the above copyright notice.
|
||||
/
|
||||
/-------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* This file was modified from a sample available from the FatFs
|
||||
* web site. It was modified to work with a Olimex STM32-P103
|
||||
* evaluation board.
|
||||
*
|
||||
*/
|
||||
#include "diskio.h"
|
||||
#include "stm32f10x.h" /* STM32 registers */
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#include "boot.h"
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Module Private Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
/* Definitions for MMC/SDC command */
|
||||
#define CMD0 (0) /* GO_IDLE_STATE */
|
||||
#define CMD1 (1) /* SEND_OP_COND */
|
||||
#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */
|
||||
#define CMD8 (8) /* SEND_IF_COND */
|
||||
#define CMD9 (9) /* SEND_CSD */
|
||||
#define CMD10 (10) /* SEND_CID */
|
||||
#define CMD12 (12) /* STOP_TRANSMISSION */
|
||||
#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */
|
||||
#define CMD16 (16) /* SET_BLOCKLEN */
|
||||
#define CMD17 (17) /* READ_SINGLE_BLOCK */
|
||||
#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
|
||||
#define CMD23 (23) /* SET_BLOCK_COUNT */
|
||||
#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */
|
||||
#define CMD24 (24) /* WRITE_BLOCK */
|
||||
#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
|
||||
#define CMD41 (41) /* SEND_OP_COND (ACMD) */
|
||||
#define CMD55 (55) /* APP_CMD */
|
||||
#define CMD58 (58) /* READ_OCR */
|
||||
|
||||
|
||||
/* Control signals (Platform dependent) */
|
||||
#define CS_LOW() GPIO_ResetBits(GPIOB, GPIO_Pin_12) /* MMC CS = L */
|
||||
#define CS_HIGH() GPIO_SetBits(GPIOB, GPIO_Pin_12) /* MMC CS = H */
|
||||
|
||||
|
||||
|
||||
#define FCLK_SLOW() /* Set slow clock (100k-400k) */
|
||||
#define FCLK_FAST() set_max_speed() /* Set fast clock (depends on the CSD) */
|
||||
|
||||
static volatile
|
||||
DSTATUS Stat = STA_NOINIT; /* Disk status */
|
||||
|
||||
static
|
||||
UINT CardType;
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send 80 or so clock transitions with CS and DI held high. This is */
|
||||
/* required after card power up to get it into SPI mode */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
static
|
||||
void send_initial_clock_train(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
unsigned int i;
|
||||
|
||||
/* Ensure CS is held high. */
|
||||
CS_HIGH();
|
||||
|
||||
/* Switch the SSI TX line to a GPIO and drive it high too. */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
GPIO_SetBits(GPIOB, GPIO_Pin_15);
|
||||
|
||||
/* Send 10 bytes over the SSI. This causes the clock to wiggle the */
|
||||
/* required number of times. */
|
||||
for(i = 0 ; i < 10 ; i++)
|
||||
{
|
||||
/* Loop while DR register in not empty */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE) == RESET) { ; }
|
||||
|
||||
/* Send byte through the SPI peripheral */
|
||||
SPI_I2S_SendData(SPI2, 0xff);
|
||||
|
||||
/* Wait to receive a byte */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
|
||||
}
|
||||
|
||||
/* Revert to hardware control of the SSI TX line. */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Power Control (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* When the target system does not support socket power control, there */
|
||||
/* is nothing to do in these functions. */
|
||||
|
||||
static
|
||||
void power_on (void)
|
||||
{
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/*
|
||||
* This doesn't really turn the power on, but initializes the
|
||||
* SSI port and pins needed to talk to the card.
|
||||
*/
|
||||
|
||||
/* Enable GPIO clock for CS */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||
/* Enable SPI clock, SPI2: APB1 */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
/* Configure I/O for Flash Chip select (PB12) */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* De-select the Card: Chip Select high */
|
||||
GPIO_SetBits(GPIOB, GPIO_Pin_12);
|
||||
|
||||
/* Configure SPI pins: SCK (PB13) and MOSI (PB15) with default alternate function (not re-mapped) push-pull */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
/* Configure MISO (PB14) as Input with internal pull-up */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* SPI configuration */
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256; // 72000kHz/256=281kHz < 400kHz
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
|
||||
SPI_Init(SPI2, &SPI_InitStructure);
|
||||
SPI_CalculateCRC(SPI2, DISABLE);
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
|
||||
/* Set DI and CS high and apply more than 74 pulses to SCLK for the card */
|
||||
/* to be able to accept a native command. */
|
||||
send_initial_clock_train();
|
||||
|
||||
}
|
||||
// set the SSI speed to the max setting
|
||||
static
|
||||
void set_max_speed(void)
|
||||
{
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
|
||||
/* Disable the SPI system */
|
||||
SPI_Cmd(SPI2, DISABLE);
|
||||
|
||||
/* MMC/SDC can work at the clock frequency up to 20/25MHz so pick a speed close to
|
||||
* this but not higher
|
||||
*/
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; // 72MHz/4=18MHz < 20MHz
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
SPI_Init(SPI2, &SPI_InitStructure);
|
||||
SPI_CalculateCRC(SPI2, DISABLE);
|
||||
|
||||
/* Enable the SPI system */
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
}
|
||||
|
||||
static
|
||||
void power_off (void)
|
||||
{
|
||||
Stat |= STA_NOINIT; /* Force uninitialized */
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Transmit/Receive data to/from MMC via SPI (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE xchg_spi (BYTE dat)
|
||||
{
|
||||
/* Send byte through the SPI peripheral */
|
||||
SPI_I2S_SendData(SPI2, dat);
|
||||
|
||||
/* Wait to receive a byte */
|
||||
while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE) == RESET) { ; }
|
||||
|
||||
/* Return the byte read from the SPI bus */
|
||||
return (BYTE)SPI_I2S_ReceiveData(SPI2);
|
||||
}
|
||||
|
||||
static
|
||||
void rcvr_spi_m (BYTE *dst)
|
||||
{
|
||||
*dst = xchg_spi(0xFF);
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Wait for card ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int wait_ready (void)
|
||||
{
|
||||
BYTE d;
|
||||
ULONG timeOutTime;
|
||||
|
||||
/* set timeout for 500 ms from now */
|
||||
timeOutTime = TimerGet() + 500;
|
||||
|
||||
do {
|
||||
d = xchg_spi(0xFF);
|
||||
} while ((d != 0xFF) && (TimerGet() < timeOutTime));
|
||||
|
||||
return (d == 0xFF) ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Deselect the card and release SPI bus */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
void deselect (void)
|
||||
{
|
||||
CS_HIGH();
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Select the card and wait ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int select (void) /* 1:Successful, 0:Timeout */
|
||||
{
|
||||
CS_LOW();
|
||||
xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
|
||||
|
||||
if (wait_ready()) return 1; /* OK */
|
||||
deselect();
|
||||
return 0; /* Timeout */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Receive a data packet from MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
int rcvr_datablock ( /* 1:OK, 0:Failed */
|
||||
BYTE *buff, /* Data buffer to store received data */
|
||||
UINT btr /* Byte count (must be multiple of 4) */
|
||||
)
|
||||
{
|
||||
BYTE token;
|
||||
ULONG timeOutTime;
|
||||
|
||||
/* set timeout for 100 ms from now */
|
||||
timeOutTime = TimerGet() + 100;
|
||||
|
||||
do { /* Wait for data packet in timeout of 100ms */
|
||||
token = xchg_spi(0xFF);
|
||||
} while ((token == 0xFF) && (TimerGet() < timeOutTime));
|
||||
|
||||
if(token != 0xFE) return 0; /* If not valid data token, retutn with error */
|
||||
|
||||
do { /* Receive the data block into buffer */
|
||||
rcvr_spi_m(buff++);
|
||||
rcvr_spi_m(buff++);
|
||||
} while (btr -= 2);
|
||||
xchg_spi(0xFF); /* Discard CRC */
|
||||
xchg_spi(0xFF);
|
||||
|
||||
return 1; /* Return with success */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a data packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
static
|
||||
int xmit_datablock ( /* 1:OK, 0:Failed */
|
||||
const BYTE *buff, /* 512 byte data block to be transmitted */
|
||||
BYTE token /* Data token */
|
||||
)
|
||||
{
|
||||
BYTE resp;
|
||||
UINT wc;
|
||||
|
||||
|
||||
if (!wait_ready()) return 0;
|
||||
|
||||
xchg_spi(token); /* Xmit a token */
|
||||
if (token != 0xFD) { /* Not StopTran token */
|
||||
wc = 512;
|
||||
do { /* Xmit the 512 byte data block to MMC */
|
||||
xchg_spi(*buff++);
|
||||
xchg_spi(*buff++);
|
||||
} while (wc -= 2);
|
||||
xchg_spi(0xFF); /* CRC (Dummy) */
|
||||
xchg_spi(0xFF);
|
||||
resp = xchg_spi(0xFF); /* Receive a data response */
|
||||
if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a command packet to MMC */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static
|
||||
BYTE send_cmd (
|
||||
BYTE cmd, /* Command byte */
|
||||
DWORD arg /* Argument */
|
||||
)
|
||||
{
|
||||
BYTE n, res;
|
||||
|
||||
|
||||
if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
|
||||
cmd &= 0x7F;
|
||||
res = send_cmd(CMD55, 0);
|
||||
if (res > 1) return res;
|
||||
}
|
||||
|
||||
/* Select the card and wait for ready */
|
||||
deselect();
|
||||
if (!select()) return 0xFF;
|
||||
|
||||
/* Send command packet */
|
||||
xchg_spi(0x40 | cmd); /* Start + Command index */
|
||||
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
|
||||
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
|
||||
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
|
||||
xchg_spi((BYTE)arg); /* Argument[7..0] */
|
||||
n = 0x01; /* Dummy CRC + Stop */
|
||||
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) + Stop */
|
||||
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) + Stop */
|
||||
xchg_spi(n);
|
||||
|
||||
/* Receive command response */
|
||||
if (cmd == CMD12) xchg_spi(0xFF); /* Skip a stuff byte on stop to read */
|
||||
n = 10; /* Wait for a valid response in timeout of 10 attempts */
|
||||
do
|
||||
res = xchg_spi(0xFF);
|
||||
while ((res & 0x80) && --n);
|
||||
|
||||
return res; /* Return with the response value */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Public Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize Disk Drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_initialize (
|
||||
BYTE pdrv /* Physical drive nmuber (0) */
|
||||
)
|
||||
{
|
||||
BYTE n, cmd, ty, ocr[4];
|
||||
ULONG timeOutTime;
|
||||
|
||||
|
||||
if (pdrv) return STA_NOINIT; /* Supports only single drive */
|
||||
if (Stat & STA_NODISK) return Stat; /* No card in the socket */
|
||||
|
||||
power_on(); /* Force socket power on */
|
||||
|
||||
CS_LOW(); /* CS = L */
|
||||
|
||||
ty = 0;
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
|
||||
timeOutTime = TimerGet() + 1000; /* Initialization timeout of 1000 msec */
|
||||
|
||||
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
|
||||
while ((TimerGet() < timeOutTime) && send_cmd(ACMD41, 0x40000000)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
|
||||
if ((TimerGet() < timeOutTime) && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
|
||||
ty = (ocr[0] & 0x40) ? CT_SD2|CT_BLOCK : CT_SD2; /* SDv2 */
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if (send_cmd(ACMD41, 0) <= 1) {
|
||||
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
|
||||
} else {
|
||||
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
|
||||
}
|
||||
while ((TimerGet() < timeOutTime) && send_cmd(cmd, 0)); /* Wait for leaving idle state */
|
||||
if (!(TimerGet() < timeOutTime) || send_cmd(CMD16, 512) != 0) /* Set read/write block length to 512 */
|
||||
ty = 0;
|
||||
}
|
||||
}
|
||||
CardType = ty;
|
||||
deselect();
|
||||
|
||||
if (ty) { /* Initialization succeded */
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
|
||||
FCLK_FAST();
|
||||
} else { /* Initialization failed */
|
||||
power_off();
|
||||
}
|
||||
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Get Disk Status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_status (
|
||||
BYTE pdrv /* Physical drive nmuber (0) */
|
||||
)
|
||||
{
|
||||
if (pdrv) return STA_NOINIT; /* Supports only single drive */
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT disk_read (
|
||||
BYTE pdrv, /* Physical drive number (0) */
|
||||
BYTE *buff, /* Pointer to the data buffer to store read data */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..255) */
|
||||
)
|
||||
{
|
||||
if (pdrv || !count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
if (count == 1) { /* Single block read */
|
||||
if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
|
||||
&& rcvr_datablock(buff, 512))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block read */
|
||||
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!rcvr_datablock(buff, 512)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
DRESULT disk_write (
|
||||
BYTE pdrv, /* Physical drive nmuber (0) */
|
||||
const BYTE *buff, /* Pointer to the data to be written */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..255) */
|
||||
)
|
||||
{
|
||||
if (pdrv || !count) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
if (Stat & STA_PROTECT) return RES_WRPRT;
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
|
||||
|
||||
if (count == 1) { /* Single block write */
|
||||
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
|
||||
&& xmit_datablock(buff, 0xFE))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block write */
|
||||
if (CardType & CT_SDC) send_cmd(ACMD23, count);
|
||||
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!xmit_datablock(buff, 0xFC)) break;
|
||||
buff += 512;
|
||||
} while (--count);
|
||||
if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
|
||||
count = 1;
|
||||
}
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous Functions */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_IOCTL
|
||||
DRESULT disk_ioctl (
|
||||
BYTE pdrv, /* Physical drive nmuber (0) */
|
||||
BYTE cmd, /* Control code */
|
||||
void *buff /* Buffer to send/receive data block */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
BYTE n, csd[16], *ptr = buff;
|
||||
DWORD csz;
|
||||
|
||||
|
||||
if (pdrv) return RES_PARERR;
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
res = RES_ERROR;
|
||||
switch (cmd) {
|
||||
case CTRL_SYNC : /* Flush write-back cache, Wait for end of internal process */
|
||||
if (select()) res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (WORD) */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||||
if ((csd[0] >> 6) == 1) { /* SDv2? */
|
||||
csz = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
|
||||
*(DWORD*)buff = csz << 10;
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||||
csz = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||||
*(DWORD*)buff = csz << (n - 9);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sectors (DWORD) */
|
||||
if (CardType & CT_SD2) { /* SDv2? */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
||||
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
|
||||
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
||||
if (CardType & CT_SD1) { /* SDv1 */
|
||||
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
||||
} else { /* MMCv3 */
|
||||
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
|
||||
*ptr = CardType;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
|
||||
if ((send_cmd(CMD9, 0) == 0) /* READ_CSD */
|
||||
&& rcvr_datablock(buff, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
|
||||
if ((send_cmd(CMD10, 0) == 0) /* READ_CID */
|
||||
&& rcvr_datablock(buff, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
|
||||
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
||||
for (n = 0; n < 4; n++)
|
||||
*((BYTE*)buff+n) = xchg_spi(0xFF);
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_SDSTAT : /* Receive SD status as a data block (64 bytes) */
|
||||
if ((CardType & CT_SD2) && send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(buff, 64))
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
}
|
||||
|
||||
deselect();
|
||||
|
||||
return res;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*---------------------------------------------------------*/
|
||||
/* User Provided Timer Function for FatFs module */
|
||||
/*---------------------------------------------------------*/
|
||||
/* This is a real time clock service to be called from */
|
||||
/* FatFs module. Any valid time must be returned even if */
|
||||
/* the system does not support a real time clock. */
|
||||
/* This is not required in read-only configuration. */
|
||||
|
||||
DWORD get_fattime (void)
|
||||
{
|
||||
/* No RTC supprt. Return a fixed value 2013/5/10 0:00:00 */
|
||||
return ((DWORD)(2013 - 1980) << 25) /* Y */
|
||||
| ((DWORD)5 << 21) /* M */
|
||||
| ((DWORD)10 << 16) /* D */
|
||||
| ((DWORD)0 << 11) /* H */
|
||||
| ((DWORD)0 << 5) /* M */
|
||||
| ((DWORD)0 >> 1); /* S */
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -34,6 +34,9 @@
|
|||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "stm32f10x.h" /* microcontroller registers */
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
|
||||
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
|
|
@ -78,6 +81,10 @@ static void Init(void)
|
|||
{
|
||||
volatile blt_int32u StartUpCounter = 0, HSEStatus = 0;
|
||||
blt_int32u pll_multiplier;
|
||||
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
USART_InitTypeDef USART_InitStruct;
|
||||
#endif
|
||||
|
||||
/* reset the RCC clock configuration to the default reset state (for debug purpose) */
|
||||
/* set HSION bit */
|
||||
|
|
@ -149,22 +156,6 @@ static void Init(void)
|
|||
while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
|
||||
{
|
||||
}
|
||||
#if (BOOT_COM_UART_ENABLE > 0)
|
||||
/* enable clock for USART2 peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x00020000;
|
||||
/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
|
||||
/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
|
||||
/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
|
||||
/* configure USART2 Rx (GPIOA3) as alternate function input floating */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
|
||||
/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
|
||||
#endif
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* enable clocks for CAN transmitter and receiver pins (GPIOB and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000008 | 0x00000001);
|
||||
|
|
@ -184,6 +175,46 @@ static void Init(void)
|
|||
/* enable clocks for CAN controller peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x02000000;
|
||||
#endif
|
||||
#if (BOOT_COM_UART_ENABLE > 0)
|
||||
/* enable clock for USART2 peripheral */
|
||||
RCC->APB1ENR |= (blt_int32u)0x00020000;
|
||||
/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
|
||||
RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
|
||||
/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
|
||||
/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
|
||||
/* configure USART2 Rx (GPIOA3) as alternate function input floating */
|
||||
/* first reset the configuration */
|
||||
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
|
||||
/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
|
||||
GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
|
||||
#elif (BOOT_FILE_LOGGING_ENABLE > 0)
|
||||
/* enable UART peripheral clock */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
|
||||
/* enable GPIO peripheral clock for transmitter and receiver pins */
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
|
||||
/* configure USART Tx as alternate function push-pull */
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2;
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
/* Configure USART Rx as alternate function input floating */
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_3;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
/* configure UART communcation parameters */
|
||||
USART_InitStruct.USART_BaudRate = BOOT_COM_UART_BAUDRATE;
|
||||
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStruct.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStruct.USART_Parity = USART_Parity_No;
|
||||
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART2, &USART_InitStruct);
|
||||
/* enable UART */
|
||||
USART_Cmd(USART2, ENABLE);
|
||||
#endif
|
||||
} /*** end of Init ***/
|
||||
|
||||
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -1,146 +1,146 @@
|
|||
S021000064656D6F70726F675F6F6C696D65785F73746D3332703130332E737265639D
|
||||
S3150800200068040020C92800088528000885280008D3
|
||||
S3150800201085280008852800088528000885280008DE
|
||||
S3150800202085280008852800088528000885280008CE
|
||||
S31508002030852800088528000885280008C724000880
|
||||
S3150800204085280008852800088528000885280008AE
|
||||
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S3150800681410B5074979441831064C7C44163404E00B
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S315080068240A68081D511888470146A142F8D110BDC7
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S315080068342C0000004C00000050F8041B61B150F80D
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||||
S31508006844042BD30744BFA9F101039A18002342F87D
|
||||
S31508006854043B091FFAD1EFE770470000DDFFFFFF8D
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S3150800686450000000140000200000000077FFFFFF1E
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||||
S31508006874140000006400000000000020000000006E
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||||
S31508006884FEE7000000F009F8002801D0FFF7C0FF72
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||||
S315080068940020FFF75DFC00F002F80120704700F0C5
|
||||
S315080068A401B800000746384600F002F8FBE7000086
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||||
S315080068B480B5C046C046024A11001820ABBEFBE7A5
|
||||
S315080068C426000200034B9D46C046C046C046C04645
|
||||
S315080068D4FFF7D8FF68040020000000000102030443
|
||||
S311080068E40102030406070809020406085E
|
||||
S705080068C9C1
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
<Build><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1059</ColumnWidth1><ColumnWidth2>282</ColumnWidth2><ColumnWidth3>70</ColumnWidth3></Build><Debug-Log><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1413</ColumnWidth1></Debug-Log><TerminalIO/></Static>
|
||||
<Windows>
|
||||
|
||||
<Wnd2>
|
||||
<Wnd0>
|
||||
<Tabs>
|
||||
<Tab>
|
||||
<Identity>TabID-32216-31616</Identity>
|
||||
|
|
@ -29,20 +29,20 @@
|
|||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd2><Wnd3><Tabs><Tab><Identity>TabID-12497-1878</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-2690-2881</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
|
||||
<SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-12497-1878</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-2690-2881</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1></Windows>
|
||||
<Editor>
|
||||
|
||||
|
||||
|
||||
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>0</SelStart2><SelEnd2>0</SelEnd2></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
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||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>0</YPos2><SelStart2>987</SelStart2><SelEnd2>987</SelEnd2></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\led.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>18</YPos2><SelStart2>1565</SelStart2><SelEnd2>1565</SelEnd2></Tab><ActiveTab>1</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
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||||
<Positions>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<Top><Row0><Sizes><Toolbar-0291d6d8><key>iaridepm.enu1</key></Toolbar-0291d6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>727</Bottom><Right>453</Right><x>-2</x><y>-2</y><xscreen>262</xscreen><yscreen>204</yscreen><sizeHorzCX>136458</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>236979</sizeVertCX><sizeVertCY>723214</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>236</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>238</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>236111</sizeHorzCY><sizeVertCX>136458</sizeVertCX><sizeVertCY>202381</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
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<Top><Row0><Sizes><Toolbar-014dd6d8><key>iaridepm.enu1</key></Toolbar-014dd6d8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>727</Bottom><Right>453</Right><x>-2</x><y>-2</y><xscreen>262</xscreen><yscreen>204</yscreen><sizeHorzCX>136458</sizeHorzCX><sizeHorzCY>202381</sizeHorzCY><sizeVertCX>236979</sizeVertCX><sizeVertCY>723214</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>236</Bottom><Right>1922</Right><x>-2</x><y>-2</y><xscreen>1924</xscreen><yscreen>238</yscreen><sizeHorzCX>1002083</sizeHorzCX><sizeHorzCY>236111</sizeHorzCY><sizeVertCX>136458</sizeVertCX><sizeVertCY>202381</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
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||||
</Desktop>
|
||||
</Workspace>
|
||||
|
||||
|
|
|
|||
|
|
@ -7,9 +7,9 @@
|
|||
<name>Debug</name>
|
||||
<outputs>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\CMSIS\CM3\CoreSupport\core_cm3.c</file>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\CMSIS\CM3\CoreSupport\core_cm3.h</file>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h</file>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\STM32F10x_StdPeriph_Driver\src\misc.c</file>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\CMSIS\CM3\CoreSupport\core_cm3.h</file>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\STM32F10x_StdPeriph_Driver\inc\misc.h</file>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c</file>
|
||||
<file>$PROJ_DIR$\..\lib\stdperiphlib\STM32F10x_StdPeriph_Driver\inc\stm32f10x_adc.h</file>
|
||||
|
|
@ -73,13 +73,13 @@
|
|||
<file>$TOOLKIT_DIR$\lib\m7M_tl.a</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_rtc.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_rcc.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_usart.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\app.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_tim.pbi</file>
|
||||
<file>$PROJ_DIR$\..\bin\stm32f103.srec</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f103.pbd</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_fsmc.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_usart.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_wwdg.pbi</file>
|
||||
<file>$PROJ_DIR$\..\bin\stm32f103.srec</file>
|
||||
<file>$PROJ_DIR$\..\obj\app.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_tim.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_spi.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_iwdg.pbi</file>
|
||||
<file>$PROJ_DIR$\..\obj\stm32f10x_i2c.pbi</file>
|
||||
|
|
@ -299,11 +299,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 4 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49</file>
|
||||
<file> 4 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49</file>
|
||||
</tool>
|
||||
<tool>
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||||
<name>ICCARM</name>
|
||||
<file> 4 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49</file>
|
||||
<file> 4 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -322,11 +322,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 6 1 3 158 160 145 84 162 142 112 116 182 51 13 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 6 2 1 158 160 145 84 162 142 112 116 182 51 13 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 6 1 3 158 160 145 84 162 142 112 116 182 51 13 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 6 2 1 158 160 145 84 162 142 112 116 182 51 13 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -345,11 +345,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 8 1 3 158 160 145 84 162 142 112 116 182 51 13 6 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 8 2 1 158 160 145 84 162 142 112 116 182 51 13 6 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 8 1 3 158 160 145 84 162 142 112 116 182 51 13 6 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 8 2 1 158 160 145 84 162 142 112 116 182 51 13 6 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -366,9 +366,13 @@
|
|||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 10 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 10 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 10 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -387,11 +391,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 12 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 12 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 12 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 12 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -410,11 +414,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 15 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 15 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 15 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 15 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -433,11 +437,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 17 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 17 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 17 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 17 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -456,11 +460,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 19 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 19 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 19 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 19 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -479,11 +483,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 21 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 21 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 21 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 21 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -511,11 +515,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 23 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 23 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 23 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 23 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -534,11 +538,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 25 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 25 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 25 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 25 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -547,7 +551,7 @@
|
|||
<outputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 72</file>
|
||||
<file> 68</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
|
|
@ -557,11 +561,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 27 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 27 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 27 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 27 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -580,11 +584,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 29 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 29 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 29 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 29 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -603,11 +607,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 31 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 31 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 31 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 31 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -626,11 +630,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 33 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 33 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 33 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -649,11 +653,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 35 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 37 39 41 43 45 47 49 4</file>
|
||||
<file> 35 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 35 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 37 39 41 43 45 47 49 4</file>
|
||||
<file> 35 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -672,11 +676,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 37 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 39 41 43 45 47 49 4</file>
|
||||
<file> 37 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 37 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 39 41 43 45 47 49 4</file>
|
||||
<file> 37 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -695,11 +699,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 39 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 41 43 45 47 49 4</file>
|
||||
<file> 39 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 39 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 41 43 45 47 49 4</file>
|
||||
<file> 39 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -718,11 +722,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 41 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 43 45 47 49 4</file>
|
||||
<file> 41 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 41 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 43 45 47 49 4</file>
|
||||
<file> 41 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -741,11 +745,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 43 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 45 47 49 4</file>
|
||||
<file> 43 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 43 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 45 47 49 4</file>
|
||||
<file> 43 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -754,7 +758,7 @@
|
|||
<outputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 69</file>
|
||||
<file> 73</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
|
|
@ -764,11 +768,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 45 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 47 49 4</file>
|
||||
<file> 45 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 45 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 47 49 4</file>
|
||||
<file> 45 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -777,7 +781,7 @@
|
|||
<outputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 67</file>
|
||||
<file> 69</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
|
|
@ -787,11 +791,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 47 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 49 4</file>
|
||||
<file> 47 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 47 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 49 4</file>
|
||||
<file> 47 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -800,7 +804,7 @@
|
|||
<outputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 73</file>
|
||||
<file> 70</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
|
|
@ -810,11 +814,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 49 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 4</file>
|
||||
<file> 49 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 49 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 4</file>
|
||||
<file> 49 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -833,11 +837,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
<file> 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -856,11 +860,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 55 243 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 55 243 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -886,13 +890,9 @@
|
|||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 55 243 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 55 243 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -911,11 +911,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 55 243 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 55 243 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -934,11 +934,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 55 243 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 55 243 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -957,11 +957,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 55 243 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 55 243 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -980,20 +980,11 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 55 243 1 3 158 160 145 84 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 55 243 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\obj\stm32f103.pbd</name>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>BILINK</name>
|
||||
<file> 175 204 238 239 240 205 107 133 134 135 136 137 132 138 139 253 72 178 76 75 176 66 65 177 74 69 67 73 181 247 246</file>
|
||||
<file> 55 243 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 53 57 59 62</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -1002,7 +993,7 @@
|
|||
<outputs>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 68</file>
|
||||
<file> 72</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
|
|
@ -1012,7 +1003,7 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 82 80 85 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 78</file>
|
||||
<file> 82 80 85 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 78</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -1059,7 +1050,7 @@
|
|||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 82 80 85 1 3 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 78</file>
|
||||
<file> 82 80 85 2 1 158 160 145 84 162 142 112 116 182 51 13 6 8 10 12 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 4 78</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
|
|
@ -1086,7 +1077,7 @@
|
|||
<outputs>
|
||||
<tool>
|
||||
<name>OBJCOPY</name>
|
||||
<file> 70</file>
|
||||
<file> 71</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08002000;
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08006000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08002000;
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08006000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
|
||||
|
|
|
|||
|
|
@ -1,19 +1,19 @@
|
|||
MEMORY
|
||||
{
|
||||
UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
|
||||
SRAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00001800
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00004000
|
||||
SRAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00002000
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00006000
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
__SRAM_segment_start__ = 0x20000000;
|
||||
__SRAM_segment_end__ = 0x20001800;
|
||||
__SRAM_segment_end__ = 0x20002000;
|
||||
__FLASH_segment_start__ = 0x08000000;
|
||||
__FLASH_segment_end__ = 0x08004000;
|
||||
__FLASH_segment_end__ = 0x08006000;
|
||||
|
||||
__STACKSIZE__ = 256;
|
||||
__STACKSIZE__ = 512;
|
||||
__STACKSIZE_PROCESS__ = 0;
|
||||
__STACKSIZE_IRQ__ = 0;
|
||||
__STACKSIZE_FIQ__ = 0;
|
||||
|
|
|
|||
|
|
@ -1,12 +1,12 @@
|
|||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 16K
|
||||
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 6K
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 24K
|
||||
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
__STACKSIZE__ = 256;
|
||||
__STACKSIZE__ = 512;
|
||||
|
||||
.text :
|
||||
{
|
||||
|
|
|
|||
|
|
@ -2,9 +2,9 @@
|
|||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x08003FFF;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x08005FFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x800;
|
||||
|
|
|
|||
|
|
@ -44,11 +44,19 @@
|
|||
*/
|
||||
#define CPU_USER_PROGRAM_STARTADDR_PTR ((blt_addr) 0x08004004)
|
||||
#define CPU_USER_PROGRAM_VECTABLE_OFFSET ((blt_int32u)0x00004000)
|
||||
#elif (BOOT_FILE_SYS_ENABLE > 0)
|
||||
/* the size of the bootloader with support for firmware update from a locally attached
|
||||
* storage disk is larger so the start address of the user program is at a different
|
||||
* location.
|
||||
*/
|
||||
#define CPU_USER_PROGRAM_STARTADDR_PTR ((blt_addr) 0x08006004)
|
||||
#define CPU_USER_PROGRAM_VECTABLE_OFFSET ((blt_int32u)0x00006000)
|
||||
#else
|
||||
#define CPU_USER_PROGRAM_STARTADDR_PTR ((blt_addr) 0x08002004)
|
||||
#define CPU_USER_PROGRAM_VECTABLE_OFFSET ((blt_int32u)0x00002000)
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Register definitions
|
||||
****************************************************************************************/
|
||||
|
|
|
|||
|
|
@ -131,11 +131,21 @@ static const tFlashSector flashLayout[] =
|
|||
*/
|
||||
/* { 0x08000000, 0x02000, 0}, flash sector 0 - reserved for bootloader */
|
||||
/* { 0x08002000, 0x02000, 1}, flash sector 1 - reserved for bootloader */
|
||||
{ 0x08004000, 0x02000, 2}, /* flash sector 2 - 8kb */
|
||||
#elif (BOOT_FILE_SYS_ENABLE > 0)
|
||||
/* the size of the bootloader with support for firmware update from a locally attached
|
||||
* storage disk is larger so the start address of the user program is at a different
|
||||
* location.
|
||||
*/
|
||||
/* { 0x08000000, 0x02000, 0}, flash sector 0 - reserved for bootloader */
|
||||
/* { 0x08002000, 0x02000, 1}, flash sector 1 - reserved for bootloader */
|
||||
/* { 0x08004000, 0x02000, 2}, flash sector 2 - 8kb */
|
||||
#else
|
||||
/* { 0x08000000, 0x02000, 0}, flash sector 0 - reserved for bootloader */
|
||||
{ 0x08002000, 0x02000, 1}, /* flash sector 1 - 8kb */
|
||||
#endif
|
||||
{ 0x08004000, 0x02000, 2}, /* flash sector 2 - 8kb */
|
||||
#endif
|
||||
|
||||
{ 0x08006000, 0x02000, 3}, /* flash sector 3 - 8kb */
|
||||
#if (BOOT_NVM_SIZE_KB > 32)
|
||||
{ 0x08008000, 0x02000, 4}, /* flash sector 4 - 8kb */
|
||||
|
|
|
|||
Loading…
Reference in New Issue