- Added support for the GCC and IAR compiler on target ARMCM3_LM3S, including demos.
- Enabled 'longcalls' compiler switch in the demo programs for ARM GCC. - Enabled garbage collection for ARMCM3_LM3S/GCC boot programs and reduced bootloader size from 16 to 8kb. git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@34 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
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@ -44,9 +44,9 @@ Discarded input sections
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.bss.interruptNesting
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.bss.interruptNesting
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||||||
0x00000000 0x1 ARM Flash Debug/../../obj/irq.o
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0x00000000 0x1 ARM Flash Debug/../../obj/irq.o
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||||||
.text.IrqInterruptDisable
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.text.IrqInterruptDisable
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||||||
0x00000000 0x6c ARM Flash Debug/../../obj/irq.o
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0x00000000 0x84 ARM Flash Debug/../../obj/irq.o
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||||||
.text.IrqInterruptRestore
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.text.IrqInterruptRestore
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||||||
0x00000000 0x70 ARM Flash Debug/../../obj/irq.o
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0x00000000 0x88 ARM Flash Debug/../../obj/irq.o
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||||||
.text 0x00000000 0x0 ARM Flash Debug/../../obj/led.o
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.text 0x00000000 0x0 ARM Flash Debug/../../obj/led.o
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||||||
.data 0x00000000 0x0 ARM Flash Debug/../../obj/led.o
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.data 0x00000000 0x0 ARM Flash Debug/../../obj/led.o
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||||||
.bss 0x00000000 0x0 ARM Flash Debug/../../obj/led.o
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.bss 0x00000000 0x0 ARM Flash Debug/../../obj/led.o
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||||||
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@ -792,9 +792,9 @@ FLASH 0x00002000 0x0003e000 xr
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||||||
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||||||
Linker script and memory map
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Linker script and memory map
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||||||
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|
||||||
0x00003c44 __do_debug_operation = __do_debug_operation_dcc
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0x00003d04 __do_debug_operation = __do_debug_operation_dcc
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||||||
0x00002a10 __vfprintf = __vfprintf_int
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0x00002ad0 __vfprintf = __vfprintf_int
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||||||
0x000034dc __vfscanf = __vfscanf_int
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0x0000359c __vfscanf = __vfscanf_int
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||||||
0xffe00000 __AHB_Peripherals_segment_start__ = 0xffe00000
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0xffe00000 __AHB_Peripherals_segment_start__ = 0xffe00000
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||||||
0x00000000 __AHB_Peripherals_segment_end__ = 0x0
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0x00000000 __AHB_Peripherals_segment_end__ = 0x0
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||||||
0xe0000000 __VPB_Peripherals_segment_start__ = 0xe0000000
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0xe0000000 __VPB_Peripherals_segment_start__ = 0xe0000000
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@ -900,7 +900,7 @@ Linker script and memory map
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||||||
0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .init is too large to fit in FLASH memory segment)
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0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .init is too large to fit in FLASH memory segment)
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||||||
0x00002250 __text_load_start__ = ALIGN (__init_end__, 0x4)
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0x00002250 __text_load_start__ = ALIGN (__init_end__, 0x4)
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||||||
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||||||
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.text 0x00002250 0x1d68
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||||||
0x00002250 __text_start__ = .
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0x00002250 __text_start__ = .
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||||||
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
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*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
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@ -911,105 +911,105 @@ Linker script and memory map
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||||||
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0x0000227c 0xb8 ARM Flash Debug/../../obj/boot.o
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||||||
0x0000227c BootComInit
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0x0000227c BootComInit
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||||||
.text.BootComCheckActivationRequest
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.text.BootComCheckActivationRequest
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||||||
0x00002334 0xe8 ARM Flash Debug/../../obj/boot.o
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0x00002334 0x108 ARM Flash Debug/../../obj/boot.o
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||||||
0x00002334 BootComCheckActivationRequest
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0x00002334 BootComCheckActivationRequest
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||||||
.text.UartReceiveByte
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||||||
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||||||
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||||||
0x00002480 0x28 ARM Flash Debug/../../obj/irq.o
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||||||
.text.IrqSetCPSR
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.text.IrqSetCPSR
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||||||
0x000024a8 0x24 ARM Flash Debug/../../obj/irq.o
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0x000024c8 0x24 ARM Flash Debug/../../obj/irq.o
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||||||
.text.IrqInterruptEnable
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.text.IrqInterruptEnable
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||||||
0x000024cc 0x30 ARM Flash Debug/../../obj/irq.o
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0x000024ec 0x48 ARM Flash Debug/../../obj/irq.o
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||||||
0x000024cc IrqInterruptEnable
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0x000024ec IrqInterruptEnable
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||||||
.text.LedInit 0x000024fc 0x3c ARM Flash Debug/../../obj/led.o
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.text.LedInit 0x00002534 0x3c ARM Flash Debug/../../obj/led.o
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||||||
0x000024fc LedInit
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||||||
.text.LedToggle
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||||||
0x00002538 0xa8 ARM Flash Debug/../../obj/led.o
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0x00002570 0xb4 ARM Flash Debug/../../obj/led.o
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||||||
0x00002538 LedToggle
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
0x00002894 TimerSet
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||||||
.text.TimerGet
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.text.TimerGet
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||||||
0x000028c0 0x24 ARM Flash Debug/../../obj/timer.o
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||||||
0x000028c0 TimerGet
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0x00002970 TimerGet
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||||||
.text.TIMER0_ISR
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||||||
0x000028e4 0x38 ARM Flash Debug/../../obj/vectors.o
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0x00002994 0x44 ARM Flash Debug/../../obj/vectors.o
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||||||
0x000028e4 TIMER0_ISR
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||||||
*fill* 0x0000291c 0x4 00
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||||||
.text.libc.memcpy
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||||||
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0x000029e0 0x60 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2_asm.o)
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||||||
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||||||
.text.libc.strlen
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||||||
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0x00002a40 0x90 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2_asm.o)
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||||||
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||||||
.text.libc.__vfprintf_int
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||||||
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||||||
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||||||
.text.libc.__ungetc
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||||||
0x000032d0 0x40 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(__vfscanf_int.o)
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0x00003390 0x40 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(__vfscanf_int.o)
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||||||
.text.libc.rd_int
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||||||
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||||||
.text.libc.__vfscanf_int
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||||||
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||||||
0x000034dc __vfscanf_int
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||||||
.text.libc.__getc
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.text.libc.__getc
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||||||
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||||||
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||||||
.text.libc.__putc
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||||||
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0x00003b8c 0x6c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
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||||||
0x00003acc __putc
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||||||
.text.libc.__print_padding
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||||||
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0x00003bf8 0x3c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
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||||||
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||||||
.text.libc.__pre_padding
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||||||
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||||||
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||||||
.text.libc.isupper
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||||||
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0x00003c5c 0x14 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
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||||||
0x00003b9c isupper
|
0x00003c5c isupper
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||||||
.text.libc.islower
|
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||||||
0x00003bb0 0x14 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
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0x00003c70 0x14 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
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||||||
0x00003bb0 islower
|
0x00003c70 islower
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||||||
.text.libc.isdigit
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.text.libc.isdigit
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||||||
0x00003bc4 0x14 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
0x00003c84 0x14 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
||||||
0x00003bc4 isdigit
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||||||
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||||||
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|
||||||
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||||||
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|
||||||
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0x00003cec 0x18 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
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||||||
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||||||
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|
||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
0x00003c88 __debug_io_unlock
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||||||
*fill* 0x00003c8c 0x4 00
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*fill* 0x00003d4c 0x4 00
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.text.libdebugio_dcc.libarm_dcc_read
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0x00003d50 0x20 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm.o)
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||||||
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||||||
.text.libdebugio_dcc.libarm_dcc_write
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0x00003cb0 0x20 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm.o)
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0x00003d70 0x20 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm.o)
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0x00003cb0 libarm_dcc_write
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0x00003d70 libarm_dcc_write
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.text.libarm.libarm_run_dcc_port_server
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||||||
0x00003cd0 0x228 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm_run_dcc_port_server.o)
|
0x00003d90 0x228 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm_run_dcc_port_server.o)
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0x00003cd0 libarm_run_dcc_port_server
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0x00003ef8 __text_load_end__ = __text_end__
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.vfp11_veneer 0x00000000 0x0
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.vfp11_veneer 0x00000000 0x0 linker stubs
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.vfp11_veneer 0x00000000 0x0 linker stubs
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@ -1017,46 +1017,46 @@ Linker script and memory map
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.v4_bx 0x00000000 0x0
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.v4_bx 0x00000000 0x0
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.v4_bx 0x00000000 0x0 linker stubs
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.v4_bx 0x00000000 0x0 linker stubs
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0x00000001 . = ASSERT (((__text_end__ >= __FLASH_segment_start__) && (__text_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .text is too large to fit in FLASH memory segment)
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0x00000001 . = ASSERT (((__text_end__ >= __FLASH_segment_start__) && (__text_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .text is too large to fit in FLASH memory segment)
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0x00003ef8 __dtors_load_start__ = ALIGN (__text_end__, 0x4)
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0x00003fb8 __dtors_load_start__ = ALIGN (__text_end__, 0x4)
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.dtors 0x00003fb8 0x0
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0x00003ef8 __dtors_start__ = .
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0x00003fb8 __dtors_start__ = .
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*(SORT(.dtors.*))
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*(SORT(.dtors.*))
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*(.dtors)
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*(.dtors)
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||||||
0x00003ef8 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
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0x00003fb8 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
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0x00003ef8 __dtors_load_end__ = __dtors_end__
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0x00003fb8 __dtors_load_end__ = __dtors_end__
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||||||
0x00000001 . = ASSERT (((__dtors_end__ >= __FLASH_segment_start__) && (__dtors_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .dtors is too large to fit in FLASH memory segment)
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0x00000001 . = ASSERT (((__dtors_end__ >= __FLASH_segment_start__) && (__dtors_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .dtors is too large to fit in FLASH memory segment)
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||||||
0x00003ef8 __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
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0x00003fb8 __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
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.ctors 0x00003ef8 0x0
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.ctors 0x00003fb8 0x0
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0x00003ef8 __ctors_start__ = .
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0x00003fb8 __ctors_start__ = .
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*(SORT(.ctors.*))
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*(SORT(.ctors.*))
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||||||
*(.ctors)
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*(.ctors)
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||||||
0x00003ef8 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
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0x00003fb8 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
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0x00003ef8 __ctors_load_end__ = __ctors_end__
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0x00003fb8 __ctors_load_end__ = __ctors_end__
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||||||
0x00000001 . = ASSERT (((__ctors_end__ >= __FLASH_segment_start__) && (__ctors_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .ctors is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__ctors_end__ >= __FLASH_segment_start__) && (__ctors_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .ctors is too large to fit in FLASH memory segment)
|
||||||
0x00003ef8 __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
|
0x00003fb8 __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
|
||||||
|
|
||||||
.rodata 0x00003ef8 0x24
|
.rodata 0x00003fb8 0x24
|
||||||
0x00003ef8 __rodata_start__ = .
|
0x00003fb8 __rodata_start__ = .
|
||||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||||
.rodata 0x00003ef8 0x4 ARM Flash Debug/../../obj/main.o
|
.rodata 0x00003fb8 0x4 ARM Flash Debug/../../obj/main.o
|
||||||
.rodata.libc.__hex_lc
|
.rodata.libc.__hex_lc
|
||||||
0x00003efc 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
0x00003fbc 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
||||||
0x00003efc __hex_lc
|
0x00003fbc __hex_lc
|
||||||
.rodata.libc.__hex_uc
|
.rodata.libc.__hex_uc
|
||||||
0x00003f0c 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
0x00003fcc 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
||||||
0x00003f0c __hex_uc
|
0x00003fcc __hex_uc
|
||||||
0x00003f1c __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
|
0x00003fdc __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
|
||||||
0x00003f1c __rodata_load_end__ = __rodata_end__
|
0x00003fdc __rodata_load_end__ = __rodata_end__
|
||||||
0x00000001 . = ASSERT (((__rodata_end__ >= __FLASH_segment_start__) && (__rodata_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .rodata is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__rodata_end__ >= __FLASH_segment_start__) && (__rodata_end__ <= (__FLASH_segment_start__ + 0x40000))), error: .rodata is too large to fit in FLASH memory segment)
|
||||||
0x00003f1c __data_load_start__ = ALIGN (__rodata_end__, 0x4)
|
0x00003fdc __data_load_start__ = ALIGN (__rodata_end__, 0x4)
|
||||||
|
|
||||||
.data 0x4000203c 0x0 load address 0x00003f1c
|
.data 0x4000203c 0x0 load address 0x00003fdc
|
||||||
0x4000203c __data_start__ = .
|
0x4000203c __data_start__ = .
|
||||||
*(.data .data.* .gnu.linkonce.d.*)
|
*(.data .data.* .gnu.linkonce.d.*)
|
||||||
0x4000203c __data_end__ = (__data_start__ + SIZEOF (.data))
|
0x4000203c __data_end__ = (__data_start__ + SIZEOF (.data))
|
||||||
0x00003f1c __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
|
0x00003fdc __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
|
||||||
0x00000001 . = ASSERT ((((__data_load_start__ + SIZEOF (.data)) >= __FLASH_segment_start__) && ((__data_load_start__ + SIZEOF (.data)) <= (__FLASH_segment_start__ + 0x40000))), error: .data is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT ((((__data_load_start__ + SIZEOF (.data)) >= __FLASH_segment_start__) && ((__data_load_start__ + SIZEOF (.data)) <= (__FLASH_segment_start__ + 0x40000))), error: .data is too large to fit in FLASH memory segment)
|
||||||
|
|
||||||
.data_run 0x4000203c 0x0
|
.data_run 0x4000203c 0x0
|
||||||
|
@ -1170,14 +1170,14 @@ Linker script and memory map
|
||||||
0x40002d98 __stack_und_end__ = (__stack_und_start__ + SIZEOF (.stack_und))
|
0x40002d98 __stack_und_end__ = (__stack_und_start__ + SIZEOF (.stack_und))
|
||||||
0x40002d98 __stack_und_load_end__ = __stack_und_end__
|
0x40002d98 __stack_und_load_end__ = __stack_und_end__
|
||||||
0x00000001 . = ASSERT (((__stack_und_end__ >= __SRAM_segment_start__) && (__stack_und_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack_und is too large to fit in SRAM memory segment)
|
0x00000001 . = ASSERT (((__stack_und_end__ >= __SRAM_segment_start__) && (__stack_und_end__ <= (__SRAM_segment_start__ + 0x4000))), error: .stack_und is too large to fit in SRAM memory segment)
|
||||||
0x00003f1c __fast_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
|
0x00003fdc __fast_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
|
||||||
|
|
||||||
.fast 0x40002d98 0x0 load address 0x00003f1c
|
.fast 0x40002d98 0x0 load address 0x00003fdc
|
||||||
0x40002d98 __fast_start__ = .
|
0x40002d98 __fast_start__ = .
|
||||||
*(.fast .fast.*)
|
*(.fast .fast.*)
|
||||||
0x40002d98 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
|
0x40002d98 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
|
||||||
0x00003f1c __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
|
0x00003fdc __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
|
||||||
0x00003f1c __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.fast))
|
0x00003fdc __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.fast))
|
||||||
0x00000001 . = ASSERT ((((__fast_load_start__ + SIZEOF (.fast)) >= __FLASH_segment_start__) && ((__fast_load_start__ + SIZEOF (.fast)) <= (__FLASH_segment_start__ + 0x40000))), error: .fast is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT ((((__fast_load_start__ + SIZEOF (.fast)) >= __FLASH_segment_start__) && ((__fast_load_start__ + SIZEOF (.fast)) <= (__FLASH_segment_start__ + 0x40000))), error: .fast is too large to fit in FLASH memory segment)
|
||||||
|
|
||||||
.fast_run 0x40002d98 0x0
|
.fast_run 0x40002d98 0x0
|
||||||
|
@ -1310,20 +1310,20 @@ OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARM7_LPC2000_Olimex_LPC_L2294_
|
||||||
.debug_ranges 0x000007e0 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v4t_a_le.a(user_libc.o)
|
.debug_ranges 0x000007e0 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v4t_a_le.a(user_libc.o)
|
||||||
.debug_ranges 0x00000830 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm_run_dcc_port_server.o)
|
.debug_ranges 0x00000830 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm_run_dcc_port_server.o)
|
||||||
|
|
||||||
.debug_line 0x00000000 0x12a1
|
.debug_line 0x00000000 0x12a3
|
||||||
.debug_line 0x00000000 0xec ARM Flash Debug/../../obj/boot.o
|
.debug_line 0x00000000 0xec ARM Flash Debug/../../obj/boot.o
|
||||||
.debug_line 0x000000ec 0x11e ARM Flash Debug/../../obj/cstart.o
|
.debug_line 0x000000ec 0x11e ARM Flash Debug/../../obj/cstart.o
|
||||||
.debug_line 0x0000020a 0xe8 ARM Flash Debug/../../obj/irq.o
|
.debug_line 0x0000020a 0xe9 ARM Flash Debug/../../obj/irq.o
|
||||||
.debug_line 0x000002f2 0xb6 ARM Flash Debug/../../obj/led.o
|
.debug_line 0x000002f3 0xb6 ARM Flash Debug/../../obj/led.o
|
||||||
.debug_line 0x000003a8 0xea ARM Flash Debug/../../obj/main.o
|
.debug_line 0x000003a9 0xeb ARM Flash Debug/../../obj/main.o
|
||||||
.debug_line 0x00000492 0xd5 ARM Flash Debug/../../obj/timer.o
|
.debug_line 0x00000494 0xd5 ARM Flash Debug/../../obj/timer.o
|
||||||
.debug_line 0x00000567 0x9d ARM Flash Debug/../../obj/vectors.o
|
.debug_line 0x00000569 0x9d ARM Flash Debug/../../obj/vectors.o
|
||||||
.debug_line 0x00000604 0x75 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(__vfprintf_int.o)
|
.debug_line 0x00000606 0x75 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(__vfprintf_int.o)
|
||||||
.debug_line 0x00000679 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(__vfscanf_int.o)
|
.debug_line 0x0000067b 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(__vfscanf_int.o)
|
||||||
.debug_line 0x000006ed 0x54f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
.debug_line 0x000006ef 0x54f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v4t_a_le.a(libc2.o)
|
||||||
.debug_line 0x00000c3c 0x56a C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v4t_a_le.a(libdebugio.o)
|
.debug_line 0x00000c3e 0x56a C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v4t_a_le.a(libdebugio.o)
|
||||||
.debug_line 0x000011a6 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v4t_a_le.a(user_libc.o)
|
.debug_line 0x000011a8 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v4t_a_le.a(user_libc.o)
|
||||||
.debug_line 0x0000121a 0x87 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm_run_dcc_port_server.o)
|
.debug_line 0x0000121c 0x87 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libarm_v4t_a_le.a(libarm_run_dcc_port_server.o)
|
||||||
|
|
||||||
.debug_str 0x00000000 0xfc6
|
.debug_str 0x00000000 0xfc6
|
||||||
.debug_str 0x00000000 0x132 ARM Flash Debug/../../obj/boot.o
|
.debug_str 0x00000000 0x132 ARM Flash Debug/../../obj/boot.o
|
||||||
|
|
|
@ -30,12 +30,12 @@ S11321A8FBFFFF1A0EF0A0E10130D0E40130C1E4D6
|
||||||
S11321B8012052E2FBFFFF1A0EF0A0E1010050E1FA
|
S11321B8012052E2FBFFFF1A0EF0A0E1010050E1FA
|
||||||
S11321C80EF0A0010120C0E4FBFFFFEA982D0040B7
|
S11321C80EF0A0010120C0E4FBFFFFEA982D0040B7
|
||||||
S11321D8982C004098290040982A0040982B0040E9
|
S11321D8982C004098290040982A0040982B0040E9
|
||||||
S11321E8982800401C3F00003C2000403C20004050
|
S11321E898280040DC3F00003C2000403C20004090
|
||||||
S11321F85022000050220000F83E00001C3F00005E
|
S11321F85022000050220000B83F0000DC3F0000DD
|
||||||
S1132208982D0040982D0040F83E0000F83E00004C
|
S1132208982D0040982D0040B83F0000B83F0000CA
|
||||||
S1132218F83E0000F83E0000F83E0000F83E0000DA
|
S1132218B83F0000B83F0000B83F0000B83F0000D6
|
||||||
S1132228F83E0000F83E00001C3F00003C2000403F
|
S1132228B83F0000B83F0000DC3F00003C200040FD
|
||||||
S1132238982000409820004098240040E0250000A1
|
S1132238982000409820004098240040242600005C
|
||||||
S10B22480000A0E10000A0E188
|
S10B22480000A0E10000A0E188
|
||||||
S113225000482DE904B08DE204D04DE24030A0E303
|
S113225000482DE904B08DE204D04DE24030A0E303
|
||||||
S113226008300BE508301BE50FE0A0E113FF2FE178
|
S113226008300BE508301BE50FE0A0E113FF2FE178
|
||||||
|
@ -51,452 +51,464 @@ S11322F0FF2002E20020C3E52C309FE50320A0E389
|
||||||
S11323000020C3E518309FE50720A0E30020C3E5C3
|
S11323000020C3E518309FE50720A0E30020C3E5C3
|
||||||
S113231000D08BE20008BDE81EFF2FE100C002E000
|
S113231000D08BE20008BDE81EFF2FE100C002E000
|
||||||
S113232004C000E008C000E014C000E00CC000E0FD
|
S113232004C000E008C000E014C000E00CC000E0FD
|
||||||
S113233000C000E000482DE904B08DE2CC309FE5F8
|
S113233000C000E000482DE904B08DE2E4309FE5E0
|
||||||
S11323400030D3E5000053E30B00001AC0009FE502
|
S11323400030D3E5000053E30D00001AD8009FE5E8
|
||||||
S1132350310000EB0030A0E1010053E32800001A33
|
S1132350D8309FE50FE0A0E113FF2FE10030A0E1AA
|
||||||
S1132360A8309FE50120A0E30020C3E5A4309FE549
|
S1132360010053E32C00001AB8309FE50120A0E3DC
|
||||||
S11323700020A0E30020C3E5210000EA94309FE59B
|
S11323700020C3E5B8309FE50020A0E30020C3E5BA
|
||||||
S11323800030D3E5012083E284309FE5033082E00E
|
S1132380250000EAA8309FE50030D3E5012083E270
|
||||||
S11323900300A0E1200000EB0030A0E1010053E3C2
|
S113239094309FE5033082E00300A0E18C309FE598
|
||||||
S11323A01700001A6C309FE50030D3E5013083E25A
|
S11323A00FE0A0E113FF2FE10030A0E1010053E3AF
|
||||||
S11323B0FF2003E25C309FE50020C3E550309FE539
|
S11323B01900001A78309FE50030D3E5013083E23C
|
||||||
S11323C00020D3E54C309FE50030D3E5030052E113
|
S11323C0FF2003E268309FE50020C3E558309FE515
|
||||||
S11323D00B00001A34309FE50020A0E30020C3E581
|
S11323D00020D3E558309FE50030D3E5030052E1F7
|
||||||
S11323E02C309FE50130D3E5FF0053E30400001ACD
|
S11323E00D00001A3C309FE50020A0E30020C3E567
|
||||||
S11323F01C309FE50230D3E5000053E30000001ACF
|
S11323F034309FE50130D3E5FF0053E30600001AB3
|
||||||
S113240092FFFFEB04D04BE20048BDE81EFF2FE132
|
S113240024309FE50230D3E5000053E30200001AB4
|
||||||
S11324103C200040402000408420004004B02DE5D2
|
S113241020309FE50FE0A0E113FF2FE104D04BE251
|
||||||
S113242000B08DE204D04DE204000BE544309FE59A
|
S11324200048BDE81EFF2FE13C2000404020004052
|
||||||
S11324300030D3E5FF3003E2013003E2FF3003E272
|
S11324303C240000842000405022000004B02DE51C
|
||||||
S1132440000053E30600000A2C309FE50030D3E57A
|
S113244000B08DE204D04DE204000BE544309FE57A
|
||||||
S1132450FF2003E204301BE50020C3E50130A0E3C4
|
S11324500030D3E5FF3003E2013003E2FF3003E252
|
||||||
S1132460000000EA0030A0E30300A0E100D08BE20A
|
S1132460000053E30600000A2C309FE50030D3E55A
|
||||||
S11324700008BDE81EFF2FE114C000E000C000E02A
|
S1132470FF2003E204301BE50020C3E50130A0E3A4
|
||||||
S113248010082DE904B08DE204D04DE200400FE1C4
|
S1132480000000EA0030A0E30300A0E100D08BE2EA
|
||||||
S113249008400BE508301BE50300A0E104D04BE243
|
S11324900008BDE81EFF2FE114C000E000C000E00A
|
||||||
S11324A01008BDE81EFF2FE104B02DE500B08DE259
|
S11324A010082DE904B08DE204D04DE200400FE1A4
|
||||||
S11324B004D04DE204000BE504301BE503F029E1F0
|
S11324B008400BE508301BE50300A0E104D04BE223
|
||||||
S11324C000D08BE20008BDE81EFF2FE100482DE993
|
S11324C01008BDE81EFF2FE104B02DE500B08DE239
|
||||||
S11324D004B08DE204D04DE2E8FFFFEB08000BE509
|
S11324D004D04DE204000BE504301BE503F029E1D0
|
||||||
S11324E008301BE58030C3E30300A0E1EDFFFFEB00
|
S11324E000D08BE20008BDE81EFF2FE100482DE973
|
||||||
S11324F004D04BE20048BDE81EFF2FE104B02DE5F7
|
S11324F004B08DE204D04DE22C309FE50FE0A0E162
|
||||||
S113250000B08DE224309FE520209FE5002092E575
|
S113250013FF2FE108000BE508301BE58030C3E31F
|
||||||
S1132510022582E3002083E514309FE50225A0E331
|
S11325100300A0E114309FE50FE0A0E113FF2FE1D9
|
||||||
S1132520002083E500D08BE20008BDE81EFF2FE108
|
S113252004D04BE20048BDE81EFF2FE1A0240000C8
|
||||||
S1132530188002E0148002E000482DE904B08DE226
|
S1132530C824000004B02DE500B08DE224309FE5EE
|
||||||
S113254004D04DE2DD0000EB08000BE578309FE598
|
S113254020209FE5002092E5022582E3002083E518
|
||||||
S1132550003093E508201BE5022063E06C309FE522
|
S113255014309FE50225A0E3002083E500D08BE240
|
||||||
S1132560030052E11400009A64309FE50030D3E583
|
S11325600008BDE81EFF2FE1188002E0148002E09D
|
||||||
S1132570000053E30600001A54309FE50120A0E355
|
S113257000482DE904B08DE204D04DE288309FE597
|
||||||
S11325800020C3E54C309FE50225A0E3002083E54D
|
S11325800FE0A0E113FF2FE108000BE57C309FE58D
|
||||||
S1132590050000EA38309FE50020A0E30020C3E5F1
|
S1132590003093E508201BE5022063E070309FE5DE
|
||||||
S11325A034309FE50225A0E3002083E518309FE541
|
S11325A0030052E11400009A68309FE50030D3E53F
|
||||||
S11325B008201BE5002083E5000000EA0000A0E1FC
|
S11325B0000053E30600001A58309FE50120A0E311
|
||||||
S11325C004D04BE20048BDE81EFF2FE18820004004
|
S11325C00020C3E550309FE50225A0E3002083E509
|
||||||
S11325D0F30100008C2000401C8002E0148002E023
|
S11325D0050000EA3C309FE50020A0E30020C3E5AD
|
||||||
S11325E000482DE904B08DE2030000EB22FFFFEB6D
|
S11325E038309FE50225A0E3002083E51C309FE5F9
|
||||||
S11325F0D0FFFFEB4EFFFFEBFCFFFFEA00482DE9A5
|
S11325F008201BE5002083E5000000EA0000A0E1BC
|
||||||
S113260004B08DE20CD04DE2AC319FE510104BE2EA
|
S113260004D04BE20048BDE81EFF2FE17029000012
|
||||||
S11326100320A0E10430A0E30100A0E10210A0E146
|
S113261088200040F30100008C2000401C8002E070
|
||||||
S11326200320A0E1BD0000EB0330A0E306304BE53E
|
S1132620148002E000482DE904B08DE22C309FE5CF
|
||||||
S113263006305BE5013043E206304BE50030A0E3B1
|
S11326300FE0A0E113FF2FE124309FE50FE0A0E1BC
|
||||||
S113264005304BE51C0000EA05205BE50B30E0E3B8
|
S113264013FF2FE11C309FE50FE0A0E113FF2FE102
|
||||||
S113265004104BE2022081E0033082E00030D3E535
|
S113265014309FE50FE0A0E113FF2FE1F8FFFFEA3C
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@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="lpc2294_crossworks" target="8" version="2">
|
<solution Name="lpc2294_crossworks" target="8" version="2">
|
||||||
<project Name="demoprog_olimex_lpc_l2294_20mhz">
|
<project Name="demoprog_olimex_lpc_l2294_20mhz">
|
||||||
<configuration Name="Common" arm_simulator_memory_simulation_filename="$(PackagesDir)/targets/Philips_LPC210X/LPC2000SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="LPC22;0x20000;0x4000;0x400000;0x100000;0x0;0x0" arm_target_loader_parameter="20000000" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="__TARGET_PROCESSOR=LPC2294;OSCILLATOR_CLOCK_FREQUENCY=20000000" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARM7_LPC2000;$(ProjectDir)/../../../../Source/ARM7_LPC2000/Crossworks" gcc_entry_point="_start" gcc_optimization_level="None" link_include_standard_libraries="Yes" link_include_startup_code="No" linker_DebugIO_enabled="Yes" linker_additional_files="$(PackagesDir)/lib/liblpc2000$(LibExt)$(LIB)" linker_additional_options="" linker_keep_symbols="_vectors;EntryFromProg;ExtFlashTestData" linker_output_format="srec" project_directory="" project_type="Executable"/>
|
<configuration Name="Common" arm_long_calls="Yes" arm_simulator_memory_simulation_filename="$(PackagesDir)/targets/Philips_LPC210X/LPC2000SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="LPC22;0x20000;0x4000;0x400000;0x100000;0x0;0x0" arm_target_loader_parameter="20000000" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="__TARGET_PROCESSOR=LPC2294;OSCILLATOR_CLOCK_FREQUENCY=20000000" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARM7_LPC2000;$(ProjectDir)/../../../../Source/ARM7_LPC2000/Crossworks" gcc_entry_point="_start" gcc_optimization_level="None" link_include_standard_libraries="Yes" link_include_startup_code="No" linker_DebugIO_enabled="Yes" linker_additional_files="$(PackagesDir)/lib/liblpc2000$(LibExt)$(LIB)" linker_additional_options="" linker_keep_symbols="_vectors;EntryFromProg;ExtFlashTestData" linker_output_format="srec" project_directory="" project_type="Executable"/>
|
||||||
<configuration Name="RAM" target_reset_script="RAMReset()"/>
|
<configuration Name="RAM" target_reset_script="RAMReset()"/>
|
||||||
<configuration Name="Flash" arm_target_flash_loader_file_path="$(PackagesDir)/targets/Olimex_LPC_E2294/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" arm_target_flash_loader_file_path="$(PackagesDir)/targets/Olimex_LPC_E2294/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
|
|
|
@ -56,7 +56,7 @@
|
||||||
<Watches active="0" update="Never" />
|
<Watches active="0" update="Never" />
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" y="0" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="30" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" y="50" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="50" />
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\boot.c" y="0" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\boot.c" left="0" selected="0" name="unnamed" top="0" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\boot.c" y="0" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog\boot.c" left="0" selected="0" name="unnamed" top="0" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="demoprog_olimex_lpc_l2294_20mhz" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388479" debugSearchPath="" buildConfiguration="ARM Flash Debug" />
|
<ARMCrossStudioWindow activeProject="demoprog_olimex_lpc_l2294_20mhz" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARM7_LPC2000_Olimex_LPC_L2294_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388479" debugSearchPath="" buildConfiguration="ARM Flash Debug" />
|
||||||
|
|
|
@ -5,7 +5,7 @@
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| C O P Y R I G H T
|
#| C O P Y R I G H T
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| Copyright (c) 2011 by Feaser LLC http://www.feaser.com All rights reserved
|
#| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
#|
|
#|
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| L I C E N S E
|
#| L I C E N S E
|
||||||
|
|
|
@ -5,7 +5,7 @@
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| C O P Y R I G H T
|
#| C O P Y R I G H T
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| Copyright (c) 2011 by Feaser LLC http://www.feaser.com All rights reserved
|
#| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
#|
|
#|
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| L I C E N S E
|
#| L I C E N S E
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="EFM32G880_crossworks" target="8" version="2">
|
<solution Name="EFM32G880_crossworks" target="8" version="2">
|
||||||
<project Name="openbtl_olimex_efm32g880">
|
<project Name="openbtl_olimex_efm32g880">
|
||||||
<configuration Name="Common" Target="EFM32G880F128" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_long_calls="Yes" arm_simulator_memory_simulation_filename="$(TargetsDir)/EFM32/EFM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="EFM32G880F128;FLASH=0x00000000:0x20000;RAM=0x20000000:0x4000" arm_target_debug_interface_type="ADIv5" arm_target_interface_type="SWD" arm_target_loader_parameter="16000000" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(Configuration)/../../bin" c_preprocessor_definitions="USE_PROCESS_STACK" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib/CMSIS/CM3/CoreSupport;$(ProjectDir)/../lib/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32;$(ProjectDir)/../lib/efm32lib/inc;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARMCM3_EFM32;$(ProjectDir)/../../../../Source/ARMCM3_EFM32/Crossworks" gcc_optimization_level="Level 1" link_include_startup_code="No" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/EFM32/EFM32G880F128_MemoryMap.xml" linker_output_format="srec" oscillator_frequency="Other" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/EFM32/EFM32_propertyGroups.xml"/>
|
<configuration Name="Common" Target="EFM32G880F128" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_long_calls="Yes" arm_simulator_memory_simulation_filename="$(TargetsDir)/EFM32/EFM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="EFM32G880F128;FLASH=0x00000000:0x20000;RAM=0x20000000:0x4000" arm_target_debug_interface_type="ADIv5" arm_target_interface_type="SWD" arm_target_loader_parameter="16000000" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(Configuration)/../../bin" c_preprocessor_definitions="USE_PROCESS_STACK" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib/CMSIS/CM3/CoreSupport;$(ProjectDir)/../lib/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32;$(ProjectDir)/../lib/efm32lib/inc;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARMCM3_EFM32;$(ProjectDir)/../../../../Source/ARMCM3_EFM32/Crossworks" gcc_optimization_level="Level 1" link_include_startup_code="No" linker_additional_files="" linker_keep_symbols="_vectors;EntryFromProg" linker_memory_map_file="$(TargetsDir)/EFM32/EFM32G880F128_MemoryMap.xml" linker_output_format="srec" oscillator_frequency="Other" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/EFM32/EFM32_propertyGroups.xml"/>
|
||||||
<configuration Name="Flash" Placement="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/EFM32/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" Placement="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/EFM32/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" target_reset_script="FLASHReset()"/>
|
||||||
<configuration Name="RAM" Placement="RAM" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/ram_placement.xml" target_reset_script="SRAMReset()"/>
|
<configuration Name="RAM" Placement="RAM" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/ram_placement.xml" target_reset_script="SRAMReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
|
|
|
@ -26,6 +26,7 @@
|
||||||
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files" name="unnamed" />
|
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files" name="unnamed" />
|
||||||
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source" name="unnamed" />
|
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source" name="unnamed" />
|
||||||
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source;ARMCM3_EFM32" name="unnamed" />
|
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source;ARMCM3_EFM32" name="unnamed" />
|
||||||
|
<ProjectSessionItem path="EFM32G880_crossworks;openbtl_olimex_efm32g880;Source Files;Source;ARMCM3_EFM32;Crossworks" name="unnamed" />
|
||||||
</Project>
|
</Project>
|
||||||
<Register1>
|
<Register1>
|
||||||
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
|
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
|
||||||
|
@ -57,7 +58,9 @@
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" y="72" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="36" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" y="72" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="36" />
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\uart.c" y="31" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\uart.c" left="0" selected="1" name="unnamed" top="31" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\uart.c" y="31" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\uart.c" left="0" selected="0" name="unnamed" top="31" />
|
||||||
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks\vectors.c" y="0" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks\vectors.c" left="0" selected="0" name="unnamed" top="0" />
|
||||||
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks\cstart.s" y="98" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks\cstart.s" left="0" selected="1" name="unnamed" top="74" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="openbtl_olimex_efm32g880" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
|
<ARMCrossStudioWindow activeProject="openbtl_olimex_efm32g880" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_EFM32\Crossworks" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
Binary file not shown.
|
@ -59,18 +59,18 @@ Discarded input sections
|
||||||
.text.SystemHFXOClockGet
|
.text.SystemHFXOClockGet
|
||||||
0x00000000 0x18 THUMB Flash Debug/../../obj/system_efm32.o
|
0x00000000 0x18 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
.text.SystemHFXOClockSet
|
.text.SystemHFXOClockSet
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/system_efm32.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
.text.SystemULFRCOClockGet
|
.text.SystemULFRCOClockGet
|
||||||
0x00000000 0x10 THUMB Flash Debug/../../obj/system_efm32.o
|
0x00000000 0x10 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
.text.SystemLFXOClockSet
|
.text.SystemLFXOClockSet
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/system_efm32.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_acmp.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_acmp.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_acmp.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.text.BITBAND_Peripheral
|
.text.BITBAND_Peripheral
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_acmp.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.text.ACMP_CapsenseInit
|
.text.ACMP_CapsenseInit
|
||||||
0x00000000 0x84 THUMB Flash Debug/../../obj/efm32_acmp.o
|
0x00000000 0x88 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.text.ACMP_CapsenseChannelSet
|
.text.ACMP_CapsenseChannelSet
|
||||||
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_acmp.o
|
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.text.ACMP_Disable
|
.text.ACMP_Disable
|
||||||
|
@ -84,7 +84,7 @@ Discarded input sections
|
||||||
.text.ACMP_ChannelSet
|
.text.ACMP_ChannelSet
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_acmp.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.text.ACMP_Init
|
.text.ACMP_Init
|
||||||
0x00000000 0x90 THUMB Flash Debug/../../obj/efm32_acmp.o
|
0x00000000 0x98 THUMB Flash Debug/../../obj/efm32_acmp.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_adc.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_adc.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_adc.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
|
@ -95,15 +95,15 @@ Discarded input sections
|
||||||
.text.ADC_Init
|
.text.ADC_Init
|
||||||
0x00000000 0x68 THUMB Flash Debug/../../obj/efm32_adc.o
|
0x00000000 0x68 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
.text.ADC_InitScan
|
.text.ADC_InitScan
|
||||||
0x00000000 0x9c THUMB Flash Debug/../../obj/efm32_adc.o
|
|
||||||
.text.ADC_InitSingle
|
|
||||||
0x00000000 0xa0 THUMB Flash Debug/../../obj/efm32_adc.o
|
0x00000000 0xa0 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
|
.text.ADC_InitSingle
|
||||||
|
0x00000000 0xa4 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
.text.ADC_PrescaleCalc
|
.text.ADC_PrescaleCalc
|
||||||
0x00000000 0x78 THUMB Flash Debug/../../obj/efm32_adc.o
|
0x00000000 0x80 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
.text.ADC_Reset
|
.text.ADC_Reset
|
||||||
0x00000000 0x88 THUMB Flash Debug/../../obj/efm32_adc.o
|
0x00000000 0x88 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
.text.ADC_TimebaseCalc
|
.text.ADC_TimebaseCalc
|
||||||
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_adc.o
|
0x00000000 0x68 THUMB Flash Debug/../../obj/efm32_adc.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_aes.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_aes.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_aes.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_aes.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_aes.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_aes.o
|
||||||
|
@ -124,7 +124,7 @@ Discarded input sections
|
||||||
.text.AES_CTRUpdate32Bit
|
.text.AES_CTRUpdate32Bit
|
||||||
0x00000000 0x40 THUMB Flash Debug/../../obj/efm32_aes.o
|
0x00000000 0x40 THUMB Flash Debug/../../obj/efm32_aes.o
|
||||||
.text.AES_DecryptKey128
|
.text.AES_DecryptKey128
|
||||||
0x00000000 0xc0 THUMB Flash Debug/../../obj/efm32_aes.o
|
0x00000000 0xc8 THUMB Flash Debug/../../obj/efm32_aes.o
|
||||||
.text.AES_DecryptKey256
|
.text.AES_DecryptKey256
|
||||||
0x00000000 0x118 THUMB Flash Debug/../../obj/efm32_aes.o
|
0x00000000 0x118 THUMB Flash Debug/../../obj/efm32_aes.o
|
||||||
.text.AES_ECB128
|
.text.AES_ECB128
|
||||||
|
@ -146,13 +146,13 @@ Discarded input sections
|
||||||
.text.CMU_Calibrate
|
.text.CMU_Calibrate
|
||||||
0x00000000 0xc8 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0xc8 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_ClockDivGet
|
.text.CMU_ClockDivGet
|
||||||
0x00000000 0xec THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0x104 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_FreezeEnable
|
.text.CMU_FreezeEnable
|
||||||
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_HFRCOBandGet
|
.text.CMU_HFRCOBandGet
|
||||||
0x00000000 0x20 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0x20 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_HFRCOBandSet
|
.text.CMU_HFRCOBandSet
|
||||||
0x00000000 0x100 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0x118 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_HFRCOStartupDelayGet
|
.text.CMU_HFRCOStartupDelayGet
|
||||||
0x00000000 0x20 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0x20 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_HFRCOStartupDelaySet
|
.text.CMU_HFRCOStartupDelaySet
|
||||||
|
@ -168,20 +168,20 @@ Discarded input sections
|
||||||
.text.CMU_PCNTClockExternalGet
|
.text.CMU_PCNTClockExternalGet
|
||||||
0x00000000 0x78 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0x78 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_PCNTClockExternalSet
|
.text.CMU_PCNTClockExternalSet
|
||||||
0x00000000 0x40 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dac.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dac.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dac.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.text.BITBAND_Peripheral
|
.text.BITBAND_Peripheral
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_dac.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.text.DAC_Enable
|
.text.DAC_Enable
|
||||||
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_dac.o
|
0x00000000 0x44 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.text.DAC_Init
|
.text.DAC_Init
|
||||||
0x00000000 0xf4 THUMB Flash Debug/../../obj/efm32_dac.o
|
0x00000000 0x100 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.text.DAC_InitChannel
|
.text.DAC_InitChannel
|
||||||
0x00000000 0x64 THUMB Flash Debug/../../obj/efm32_dac.o
|
0x00000000 0x64 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.text.DAC_PrescaleCalc
|
.text.DAC_PrescaleCalc
|
||||||
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_dac.o
|
0x00000000 0x74 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.text.DAC_Reset
|
.text.DAC_Reset
|
||||||
0x00000000 0x50 THUMB Flash Debug/../../obj/efm32_dac.o
|
0x00000000 0x50 THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dbg.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dbg.o
|
||||||
|
@ -190,9 +190,9 @@ Discarded input sections
|
||||||
.text.BITBAND_Peripheral
|
.text.BITBAND_Peripheral
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_dbg.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_dbg.o
|
||||||
.text.GPIO_DbgSWOEnable
|
.text.GPIO_DbgSWOEnable
|
||||||
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_dbg.o
|
0x00000000 0x2c THUMB Flash Debug/../../obj/efm32_dbg.o
|
||||||
.text.DBG_SWOEnable
|
.text.DBG_SWOEnable
|
||||||
0x00000000 0x90 THUMB Flash Debug/../../obj/efm32_dbg.o
|
0x00000000 0xa8 THUMB Flash Debug/../../obj/efm32_dbg.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dma.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dma.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dma.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
|
@ -209,15 +209,15 @@ Discarded input sections
|
||||||
.text.DMA_IRQHandler
|
.text.DMA_IRQHandler
|
||||||
0x00000000 0xf4 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0xf4 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_ActivateAuto
|
.text.DMA_ActivateAuto
|
||||||
0x00000000 0x5c THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_ActivateBasic
|
.text.DMA_ActivateBasic
|
||||||
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x50 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_ActivatePingPong
|
.text.DMA_ActivatePingPong
|
||||||
0x00000000 0x64 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_ActivateScatterGather
|
.text.DMA_ActivateScatterGather
|
||||||
0x00000000 0x15c THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x15c THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_CfgChannel
|
.text.DMA_CfgChannel
|
||||||
0x00000000 0xc0 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0xcc THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_CfgDescr
|
.text.DMA_CfgDescr
|
||||||
0x00000000 0x84 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x84 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_CfgDescrScatterGather
|
.text.DMA_CfgDescrScatterGather
|
||||||
|
@ -225,28 +225,28 @@ Discarded input sections
|
||||||
.text.DMA_ChannelEnabled
|
.text.DMA_ChannelEnabled
|
||||||
0x00000000 0x2c THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x2c THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_Init
|
.text.DMA_Init
|
||||||
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x88 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_RefreshPingPong
|
.text.DMA_RefreshPingPong
|
||||||
0x00000000 0x118 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0x118 THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text.DMA_Reset
|
.text.DMA_Reset
|
||||||
0x00000000 0xd4 THUMB Flash Debug/../../obj/efm32_dma.o
|
0x00000000 0xdc THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_ebi.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_ebi.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_ebi.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.BITBAND_Peripheral
|
.text.BITBAND_Peripheral
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_Init
|
.text.EBI_Init
|
||||||
0x00000000 0x194 THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0x1dc THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_Disable
|
.text.EBI_Disable
|
||||||
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_BankEnable
|
.text.EBI_BankEnable
|
||||||
0x00000000 0x8c THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0xa4 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_BankAddress
|
.text.EBI_BankAddress
|
||||||
0x00000000 0x80 THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0x80 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_ChipSelectEnable
|
.text.EBI_ChipSelectEnable
|
||||||
0x00000000 0x8c THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0xa4 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_PolaritySet
|
.text.EBI_PolaritySet
|
||||||
0x00000000 0x9c THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0xb8 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_ReadTimingSet
|
.text.EBI_ReadTimingSet
|
||||||
0x00000000 0x4c THUMB Flash Debug/../../obj/efm32_ebi.o
|
0x00000000 0x4c THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.text.EBI_WriteTimingSet
|
.text.EBI_WriteTimingSet
|
||||||
|
@ -257,17 +257,17 @@ Discarded input sections
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_emu.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_emu.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.SystemCoreClockUpdate
|
.text.SystemCoreClockUpdate
|
||||||
0x00000000 0xc THUMB Flash Debug/../../obj/efm32_emu.o
|
0x00000000 0x10 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.CMU_Lock
|
.text.CMU_Lock
|
||||||
0x00000000 0x1c THUMB Flash Debug/../../obj/efm32_emu.o
|
0x00000000 0x1c THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.CMU_Unlock
|
.text.CMU_Unlock
|
||||||
0x00000000 0x1c THUMB Flash Debug/../../obj/efm32_emu.o
|
0x00000000 0x1c THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.EMU_Restore
|
.text.EMU_Restore
|
||||||
0x00000000 0xf8 THUMB Flash Debug/../../obj/efm32_emu.o
|
0x00000000 0x104 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.EMU_EnterEM2
|
.text.EMU_EnterEM2
|
||||||
0x00000000 0x64 THUMB Flash Debug/../../obj/efm32_emu.o
|
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.EMU_EnterEM3
|
.text.EMU_EnterEM3
|
||||||
0x00000000 0x94 THUMB Flash Debug/../../obj/efm32_emu.o
|
0x00000000 0xac THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.EMU_EnterEM4
|
.text.EMU_EnterEM4
|
||||||
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_emu.o
|
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.text.EMU_MemPwrDown
|
.text.EMU_MemPwrDown
|
||||||
|
@ -280,7 +280,7 @@ Discarded input sections
|
||||||
.text.GPIO_DbgLocationSet
|
.text.GPIO_DbgLocationSet
|
||||||
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_gpio.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_gpio.o
|
||||||
.text.GPIO_IntConfig
|
.text.GPIO_IntConfig
|
||||||
0x00000000 0xf0 THUMB Flash Debug/../../obj/efm32_gpio.o
|
0x00000000 0x100 THUMB Flash Debug/../../obj/efm32_gpio.o
|
||||||
.text.GPIO_PinInGet
|
.text.GPIO_PinInGet
|
||||||
0x00000000 0x40 THUMB Flash Debug/../../obj/efm32_gpio.o
|
0x00000000 0x40 THUMB Flash Debug/../../obj/efm32_gpio.o
|
||||||
.text.GPIO_PinOutClear
|
.text.GPIO_PinOutClear
|
||||||
|
@ -313,19 +313,19 @@ Discarded input sections
|
||||||
.bss.i2cTransfer
|
.bss.i2cTransfer
|
||||||
0x00000000 0x10 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0x10 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text.I2C_BusFreqGet
|
.text.I2C_BusFreqGet
|
||||||
0x00000000 0x54 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0x58 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text.I2C_BusFreqSet
|
.text.I2C_BusFreqSet
|
||||||
0x00000000 0x94 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0x98 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text.I2C_Enable
|
.text.I2C_Enable
|
||||||
0x00000000 0x24 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0x2c THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text.I2C_Init
|
.text.I2C_Init
|
||||||
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0x74 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text.I2C_Reset
|
.text.I2C_Reset
|
||||||
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text.I2C_Transfer
|
.text.I2C_Transfer
|
||||||
0x00000000 0x484 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0x484 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text.I2C_TransferInit
|
.text.I2C_TransferInit
|
||||||
0x00000000 0xd4 THUMB Flash Debug/../../obj/efm32_i2c.o
|
0x00000000 0xd8 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_int.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_int.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_int.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_int.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_int.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_int.o
|
||||||
|
@ -343,19 +343,19 @@ Discarded input sections
|
||||||
.text.BITBAND_Peripheral
|
.text.BITBAND_Peripheral
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_Initialize
|
.text.LCD_Initialize
|
||||||
0x00000000 0x80 THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x8c THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_VLCDSelect
|
.text.LCD_VLCDSelect
|
||||||
0x00000000 0x4c THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x4c THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_UpdateCtrl
|
.text.LCD_UpdateCtrl
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_FrameCountInit
|
.text.LCD_FrameCountInit
|
||||||
0x00000000 0x54 THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x58 THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_AnimInit
|
.text.LCD_AnimInit
|
||||||
0x00000000 0x7c THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x84 THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_SegmentRangeEnable
|
.text.LCD_SegmentRangeEnable
|
||||||
0x00000000 0x54 THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x54 THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_SegmentSet
|
.text.LCD_SegmentSet
|
||||||
0x00000000 0x130 THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0x160 THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_SegmentSetLow
|
.text.LCD_SegmentSetLow
|
||||||
0x00000000 0xfc THUMB Flash Debug/../../obj/efm32_lcd.o
|
0x00000000 0xfc THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.text.LCD_SegmentSetHigh
|
.text.LCD_SegmentSetHigh
|
||||||
|
@ -375,34 +375,34 @@ Discarded input sections
|
||||||
.text.LETIMER_CompareGet
|
.text.LETIMER_CompareGet
|
||||||
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text.LETIMER_CompareSet
|
.text.LETIMER_CompareSet
|
||||||
0x00000000 0x50 THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x58 THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text.LETIMER_Enable
|
.text.LETIMER_Enable
|
||||||
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text.LETIMER_FreezeEnable
|
.text.LETIMER_FreezeEnable
|
||||||
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text.LETIMER_Init
|
.text.LETIMER_Init
|
||||||
0x00000000 0x114 THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x124 THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text.LETIMER_RepeatGet
|
.text.LETIMER_RepeatGet
|
||||||
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text.LETIMER_RepeatSet
|
.text.LETIMER_RepeatSet
|
||||||
0x00000000 0x50 THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x58 THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text.LETIMER_Reset
|
.text.LETIMER_Reset
|
||||||
0x00000000 0x64 THUMB Flash Debug/../../obj/efm32_letimer.o
|
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_leuart.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_leuart.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_leuart.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text.LEUART_BaudrateCalc
|
.text.LEUART_BaudrateCalc
|
||||||
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text.LEUART_BaudrateGet
|
.text.LEUART_BaudrateGet
|
||||||
0x00000000 0x64 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text.LEUART_Reset
|
.text.LEUART_Reset
|
||||||
0x00000000 0x6c THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00000000 0x78 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text.LEUART_RxExt
|
.text.LEUART_RxExt
|
||||||
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text.LEUART_Tx
|
.text.LEUART_Tx
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text.LEUART_TxExt
|
.text.LEUART_TxExt
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_mpu.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_mpu.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_mpu.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_mpu.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_mpu.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_mpu.o
|
||||||
|
@ -429,21 +429,21 @@ Discarded input sections
|
||||||
.text.PCNT_Sync
|
.text.PCNT_Sync
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_CounterReset
|
.text.PCNT_CounterReset
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_CounterTopSet
|
.text.PCNT_CounterTopSet
|
||||||
0x00000000 0xb0 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0xdc THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_Enable
|
.text.PCNT_Enable
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_FreezeEnable
|
.text.PCNT_FreezeEnable
|
||||||
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_Init
|
.text.PCNT_Init
|
||||||
0x00000000 0x124 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x160 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_Reset
|
.text.PCNT_Reset
|
||||||
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x94 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_TopBufferSet
|
.text.PCNT_TopBufferSet
|
||||||
0x00000000 0x24 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text.PCNT_TopSet
|
.text.PCNT_TopSet
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
0x00000000 0x40 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_prs.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_prs.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_prs.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_prs.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_prs.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_prs.o
|
||||||
|
@ -459,9 +459,9 @@ Discarded input sections
|
||||||
.text.EMU_Unlock
|
.text.EMU_Unlock
|
||||||
0x00000000 0x18 THUMB Flash Debug/../../obj/efm32_rmu.o
|
0x00000000 0x18 THUMB Flash Debug/../../obj/efm32_rmu.o
|
||||||
.text.RMU_LockupResetDisable
|
.text.RMU_LockupResetDisable
|
||||||
0x00000000 0x28 THUMB Flash Debug/../../obj/efm32_rmu.o
|
0x00000000 0x2c THUMB Flash Debug/../../obj/efm32_rmu.o
|
||||||
.text.RMU_ResetCauseClear
|
.text.RMU_ResetCauseClear
|
||||||
0x00000000 0x68 THUMB Flash Debug/../../obj/efm32_rmu.o
|
0x00000000 0x80 THUMB Flash Debug/../../obj/efm32_rmu.o
|
||||||
.text.RMU_ResetCauseGet
|
.text.RMU_ResetCauseGet
|
||||||
0x00000000 0x88 THUMB Flash Debug/../../obj/efm32_rmu.o
|
0x00000000 0x88 THUMB Flash Debug/../../obj/efm32_rmu.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_rtc.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
|
@ -474,17 +474,17 @@ Discarded input sections
|
||||||
.text.RTC_CompareGet
|
.text.RTC_CompareGet
|
||||||
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_rtc.o
|
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.text.RTC_CompareSet
|
.text.RTC_CompareSet
|
||||||
0x00000000 0x50 THUMB Flash Debug/../../obj/efm32_rtc.o
|
0x00000000 0x58 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.text.RTC_Enable
|
.text.RTC_Enable
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_rtc.o
|
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.text.RTC_FreezeEnable
|
.text.RTC_FreezeEnable
|
||||||
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_rtc.o
|
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.text.RTC_Init
|
.text.RTC_Init
|
||||||
0x00000000 0x5c THUMB Flash Debug/../../obj/efm32_rtc.o
|
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.text.RTC_Reset
|
.text.RTC_Reset
|
||||||
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_rtc.o
|
0x00000000 0x60 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.text.RTC_CounterReset
|
.text.RTC_CounterReset
|
||||||
0x00000000 0x18 THUMB Flash Debug/../../obj/efm32_rtc.o
|
0x00000000 0x24 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_system.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_system.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_system.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_system.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_system.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_system.o
|
||||||
|
@ -509,21 +509,21 @@ Discarded input sections
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_usart.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_usart.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_BaudrateAsyncSet
|
.text.USART_BaudrateAsyncSet
|
||||||
0x00000000 0xbc THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0xc4 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_BaudrateCalc
|
.text.USART_BaudrateCalc
|
||||||
0x00000000 0xd0 THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0xd0 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_BaudrateGet
|
.text.USART_BaudrateGet
|
||||||
0x00000000 0x5c THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0x68 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_BaudrateSyncSet
|
.text.USART_BaudrateSyncSet
|
||||||
0x00000000 0x70 THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0x78 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_Enable
|
.text.USART_Enable
|
||||||
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0x34 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_InitAsync
|
.text.USART_InitAsync
|
||||||
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0x54 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_InitSync
|
.text.USART_InitSync
|
||||||
0x00000000 0x74 THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0x80 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_InitIrDA
|
.text.USART_InitIrDA
|
||||||
0x00000000 0xa8 THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0xac THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_Reset
|
.text.USART_Reset
|
||||||
0x00000000 0x68 THUMB Flash Debug/../../obj/efm32_usart.o
|
0x00000000 0x68 THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.text.USART_Rx
|
.text.USART_Rx
|
||||||
|
@ -550,7 +550,7 @@ Discarded input sections
|
||||||
.text.VCMP_IntClear
|
.text.VCMP_IntClear
|
||||||
0x00000000 0x1c THUMB Flash Debug/../../obj/efm32_vcmp.o
|
0x00000000 0x1c THUMB Flash Debug/../../obj/efm32_vcmp.o
|
||||||
.text.VCMP_Init
|
.text.VCMP_Init
|
||||||
0x00000000 0x190 THUMB Flash Debug/../../obj/efm32_vcmp.o
|
0x00000000 0x1a8 THUMB Flash Debug/../../obj/efm32_vcmp.o
|
||||||
.text.VCMP_LowPowerRefSet
|
.text.VCMP_LowPowerRefSet
|
||||||
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_vcmp.o
|
0x00000000 0x3c THUMB Flash Debug/../../obj/efm32_vcmp.o
|
||||||
.text.VCMP_TriggerSet
|
.text.VCMP_TriggerSet
|
||||||
|
@ -561,13 +561,13 @@ Discarded input sections
|
||||||
.text.BITBAND_Peripheral
|
.text.BITBAND_Peripheral
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_wdog.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_wdog.o
|
||||||
.text.WDOG_Enable
|
.text.WDOG_Enable
|
||||||
0x00000000 0x48 THUMB Flash Debug/../../obj/efm32_wdog.o
|
0x00000000 0x50 THUMB Flash Debug/../../obj/efm32_wdog.o
|
||||||
.text.WDOG_Feed
|
.text.WDOG_Feed
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_wdog.o
|
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_wdog.o
|
||||||
.text.WDOG_Init
|
.text.WDOG_Init
|
||||||
0x00000000 0xdc THUMB Flash Debug/../../obj/efm32_wdog.o
|
0x00000000 0xe8 THUMB Flash Debug/../../obj/efm32_wdog.o
|
||||||
.text.WDOG_Lock
|
.text.WDOG_Lock
|
||||||
0x00000000 0x30 THUMB Flash Debug/../../obj/efm32_wdog.o
|
0x00000000 0x38 THUMB Flash Debug/../../obj/efm32_wdog.o
|
||||||
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/lcdcontroller.o
|
.text 0x00000000 0x0 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/lcdcontroller.o
|
.data 0x00000000 0x0 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/lcdcontroller.o
|
.bss 0x00000000 0x0 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
|
@ -580,17 +580,17 @@ Discarded input sections
|
||||||
.data.EM_Numbers
|
.data.EM_Numbers
|
||||||
0x00000000 0x18 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00000000 0x18 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_Number
|
.text.LCD_Number
|
||||||
0x00000000 0x14c THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00000000 0x15c THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_NumberOff
|
.text.LCD_NumberOff
|
||||||
0x00000000 0x80 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00000000 0x84 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_Write
|
.text.LCD_Write
|
||||||
0x00000000 0x108 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00000000 0x118 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_AllOn
|
.text.LCD_AllOn
|
||||||
0x00000000 0x5c THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00000000 0x5c THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_Battery
|
.text.LCD_Battery
|
||||||
0x00000000 0x8c THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00000000 0x98 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_Disable
|
.text.LCD_Disable
|
||||||
0x00000000 0x50 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00000000 0x54 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text 0x00000000 0x0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
.text 0x00000000 0x0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
.data 0x00000000 0x0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
.data 0x00000000 0x0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
.bss 0x00000000 0x0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
.bss 0x00000000 0x0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
|
@ -1143,9 +1143,9 @@ FLASH 0x00004000 0x0001c000 xr
|
||||||
|
|
||||||
Linker script and memory map
|
Linker script and memory map
|
||||||
|
|
||||||
0x00006b6c __do_debug_operation = __do_debug_operation_bkpt
|
0x00006dec __do_debug_operation = __do_debug_operation_bkpt
|
||||||
0x00006014 __vfprintf = __vfprintf_int
|
0x00006294 __vfprintf = __vfprintf_int
|
||||||
0x00006780 __vfscanf = __vfscanf_int
|
0x00006a00 __vfscanf = __vfscanf_int
|
||||||
0xe000e000 __CM3_System_Control_Space_segment_start__ = 0xe000e000
|
0xe000e000 __CM3_System_Control_Space_segment_start__ = 0xe000e000
|
||||||
0xe000f000 __CM3_System_Control_Space_segment_end__ = 0xe000f000
|
0xe000f000 __CM3_System_Control_Space_segment_end__ = 0xe000f000
|
||||||
0x20000000 __RAM_segment_start__ = 0x20000000
|
0x20000000 __RAM_segment_start__ = 0x20000000
|
||||||
|
@ -1192,7 +1192,7 @@ Linker script and memory map
|
||||||
0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .init is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .init is too large to fit in FLASH memory segment)
|
||||||
0x000041e8 __text_load_start__ = ALIGN (__init_end__, 0x4)
|
0x000041e8 __text_load_start__ = ALIGN (__init_end__, 0x4)
|
||||||
|
|
||||||
.text 0x000041e8 0x29a4
|
.text 0x000041e8 0x2c24
|
||||||
0x000041e8 __text_start__ = .
|
0x000041e8 __text_start__ = .
|
||||||
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table .ARM.extab* .gnu.linkonce.armextab.*)
|
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table .ARM.extab* .gnu.linkonce.armextab.*)
|
||||||
.glue_7 0x00000000 0x0 linker stubs
|
.glue_7 0x00000000 0x0 linker stubs
|
||||||
|
@ -1200,197 +1200,197 @@ Linker script and memory map
|
||||||
.text.LEUART_IntClear
|
.text.LEUART_IntClear
|
||||||
0x000041e8 0x1c THUMB Flash Debug/../../obj/boot.o
|
0x000041e8 0x1c THUMB Flash Debug/../../obj/boot.o
|
||||||
.text.BootActivate
|
.text.BootActivate
|
||||||
0x00004204 0x1c THUMB Flash Debug/../../obj/boot.o
|
0x00004204 0x24 THUMB Flash Debug/../../obj/boot.o
|
||||||
.text.BootComInit
|
.text.BootComInit
|
||||||
0x00004220 0xf8 THUMB Flash Debug/../../obj/boot.o
|
0x00004228 0x138 THUMB Flash Debug/../../obj/boot.o
|
||||||
0x00004220 BootComInit
|
0x00004228 BootComInit
|
||||||
.text.BootComCheckActivationRequest
|
.text.BootComCheckActivationRequest
|
||||||
0x00004318 0xc8 THUMB Flash Debug/../../obj/boot.o
|
0x00004360 0xdc THUMB Flash Debug/../../obj/boot.o
|
||||||
0x00004318 BootComCheckActivationRequest
|
0x00004360 BootComCheckActivationRequest
|
||||||
.text.UartReceiveByte
|
.text.UartReceiveByte
|
||||||
0x000043e0 0x44 THUMB Flash Debug/../../obj/boot.o
|
0x0000443c 0x48 THUMB Flash Debug/../../obj/boot.o
|
||||||
.text.IrqInterruptEnable
|
.text.IrqInterruptEnable
|
||||||
0x00004424 0xc THUMB Flash Debug/../../obj/irq.o
|
0x00004484 0xc THUMB Flash Debug/../../obj/irq.o
|
||||||
0x00004424 IrqInterruptEnable
|
0x00004484 IrqInterruptEnable
|
||||||
.text.LedInit 0x00004430 0x14 THUMB Flash Debug/../../obj/led.o
|
.text.LedInit 0x00004490 0x18 THUMB Flash Debug/../../obj/led.o
|
||||||
0x00004430 LedInit
|
0x00004490 LedInit
|
||||||
.text.LedToggle
|
.text.LedToggle
|
||||||
0x00004444 0x90 THUMB Flash Debug/../../obj/led.o
|
0x000044a8 0xa4 THUMB Flash Debug/../../obj/led.o
|
||||||
0x00004444 LedToggle
|
0x000044a8 LedToggle
|
||||||
.text.CHIP_Init
|
.text.CHIP_Init
|
||||||
0x000044d4 0x1e8 THUMB Flash Debug/../../obj/main.o
|
0x0000454c 0x1ec THUMB Flash Debug/../../obj/main.o
|
||||||
.text.main 0x000046bc 0x18 THUMB Flash Debug/../../obj/main.o
|
.text.main 0x00004738 0x30 THUMB Flash Debug/../../obj/main.o
|
||||||
0x000046bc main
|
0x00004738 main
|
||||||
.text.Init 0x000046d4 0x160 THUMB Flash Debug/../../obj/main.o
|
.text.Init 0x00004768 0x1e4 THUMB Flash Debug/../../obj/main.o
|
||||||
.text.NVIC_SetPriority
|
.text.NVIC_SetPriority
|
||||||
0x00004834 0x58 THUMB Flash Debug/../../obj/timer.o
|
0x0000494c 0x58 THUMB Flash Debug/../../obj/timer.o
|
||||||
.text.SysTick_Config
|
.text.SysTick_Config
|
||||||
0x0000488c 0x64 THUMB Flash Debug/../../obj/timer.o
|
0x000049a4 0x68 THUMB Flash Debug/../../obj/timer.o
|
||||||
.text.TimerInit
|
.text.TimerInit
|
||||||
0x000048f0 0x34 THUMB Flash Debug/../../obj/timer.o
|
0x00004a0c 0x44 THUMB Flash Debug/../../obj/timer.o
|
||||||
0x000048f0 TimerInit
|
0x00004a0c TimerInit
|
||||||
.text.TimerDeinit
|
.text.TimerDeinit
|
||||||
0x00004924 0x18 THUMB Flash Debug/../../obj/timer.o
|
0x00004a50 0x18 THUMB Flash Debug/../../obj/timer.o
|
||||||
0x00004924 TimerDeinit
|
0x00004a50 TimerDeinit
|
||||||
.text.TimerSet
|
.text.TimerSet
|
||||||
0x0000493c 0x20 THUMB Flash Debug/../../obj/timer.o
|
0x00004a68 0x20 THUMB Flash Debug/../../obj/timer.o
|
||||||
0x0000493c TimerSet
|
0x00004a68 TimerSet
|
||||||
.text.TimerGet
|
.text.TimerGet
|
||||||
0x0000495c 0x18 THUMB Flash Debug/../../obj/timer.o
|
0x00004a88 0x18 THUMB Flash Debug/../../obj/timer.o
|
||||||
0x0000495c TimerGet
|
0x00004a88 TimerGet
|
||||||
.text.TimerISRHandler
|
.text.TimerISRHandler
|
||||||
0x00004974 0x24 THUMB Flash Debug/../../obj/timer.o
|
0x00004aa0 0x24 THUMB Flash Debug/../../obj/timer.o
|
||||||
0x00004974 TimerISRHandler
|
0x00004aa0 TimerISRHandler
|
||||||
.text.UnusedISR
|
.text.UnusedISR
|
||||||
0x00004998 0x8 THUMB Flash Debug/../../obj/vectors.o
|
0x00004ac4 0x8 THUMB Flash Debug/../../obj/vectors.o
|
||||||
0x00004998 UnusedISR
|
0x00004ac4 UnusedISR
|
||||||
.text.SystemCoreClockGet
|
.text.SystemCoreClockGet
|
||||||
0x000049a0 0x3c THUMB Flash Debug/../../obj/system_efm32.o
|
0x00004acc 0x44 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
0x000049a0 SystemCoreClockGet
|
0x00004acc SystemCoreClockGet
|
||||||
.text.SystemHFClockGet
|
.text.SystemHFClockGet
|
||||||
0x000049dc 0xe8 THUMB Flash Debug/../../obj/system_efm32.o
|
0x00004b10 0xe8 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
0x000049dc SystemHFClockGet
|
0x00004b10 SystemHFClockGet
|
||||||
.text.SystemInit
|
.text.SystemInit
|
||||||
0x00004ac4 0xc THUMB Flash Debug/../../obj/system_efm32.o
|
0x00004bf8 0xc THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
0x00004ac4 SystemInit
|
0x00004bf8 SystemInit
|
||||||
.text.SystemLFRCOClockGet
|
.text.SystemLFRCOClockGet
|
||||||
0x00004ad0 0x10 THUMB Flash Debug/../../obj/system_efm32.o
|
0x00004c04 0x10 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
0x00004ad0 SystemLFRCOClockGet
|
0x00004c04 SystemLFRCOClockGet
|
||||||
.text.SystemLFXOClockGet
|
.text.SystemLFXOClockGet
|
||||||
0x00004ae0 0x18 THUMB Flash Debug/../../obj/system_efm32.o
|
0x00004c14 0x18 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
0x00004ae0 SystemLFXOClockGet
|
0x00004c14 SystemLFXOClockGet
|
||||||
.text.BITBAND_Peripheral
|
.text.BITBAND_Peripheral
|
||||||
0x00004af8 0x30 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004c2c 0x30 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_FlashWaitStateMax
|
.text.CMU_FlashWaitStateMax
|
||||||
0x00004b28 0x68 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004c5c 0x68 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_DivToLog2
|
.text.CMU_DivToLog2
|
||||||
0x00004b90 0x2c THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004cc4 0x2c THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_FlashWaitStateControl
|
.text.CMU_FlashWaitStateControl
|
||||||
0x00004bbc 0xa4 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004cf0 0xa4 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_AUXClkGet
|
.text.CMU_AUXClkGet
|
||||||
0x00004c60 0x20 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004d94 0x20 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_DBGClkGet
|
.text.CMU_DBGClkGet
|
||||||
0x00004c80 0x48 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004db4 0x5c THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_LFClkGet
|
.text.CMU_LFClkGet
|
||||||
0x00004cc8 0x7c THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004e10 0x8c THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_Sync
|
.text.CMU_Sync
|
||||||
0x00004d44 0x40 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004e9c 0x40 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.text.CMU_ClockDivSet
|
.text.CMU_ClockDivSet
|
||||||
0x00004d84 0x1f0 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00004edc 0x248 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
0x00004d84 CMU_ClockDivSet
|
0x00004edc CMU_ClockDivSet
|
||||||
.text.CMU_ClockEnable
|
.text.CMU_ClockEnable
|
||||||
0x00004f74 0xc8 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00005124 0xd4 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
0x00004f74 CMU_ClockEnable
|
0x00005124 CMU_ClockEnable
|
||||||
.text.CMU_ClockFreqGet
|
.text.CMU_ClockFreqGet
|
||||||
0x0000503c 0x1f8 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x000051f8 0x24c THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
0x0000503c CMU_ClockFreqGet
|
0x000051f8 CMU_ClockFreqGet
|
||||||
.text.CMU_ClockSelectGet
|
.text.CMU_ClockSelectGet
|
||||||
0x00005234 0x114 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00005444 0x114 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
0x00005234 CMU_ClockSelectGet
|
0x00005444 CMU_ClockSelectGet
|
||||||
.text.CMU_ClockSelectSet
|
.text.CMU_ClockSelectSet
|
||||||
0x00005348 0x194 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00005558 0x1c0 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
0x00005348 CMU_ClockSelectSet
|
0x00005558 CMU_ClockSelectSet
|
||||||
.text.CMU_OscillatorEnable
|
.text.CMU_OscillatorEnable
|
||||||
0x000054dc 0xe0 THUMB Flash Debug/../../obj/efm32_cmu.o
|
0x00005718 0xe4 THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
0x000054dc CMU_OscillatorEnable
|
0x00005718 CMU_OscillatorEnable
|
||||||
.text.EMU_UpdateOscConfig
|
.text.EMU_UpdateOscConfig
|
||||||
0x000055bc 0x20 THUMB Flash Debug/../../obj/efm32_emu.o
|
0x000057fc 0x20 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
0x000055bc EMU_UpdateOscConfig
|
0x000057fc EMU_UpdateOscConfig
|
||||||
.text.GPIO_DriveModeSet
|
.text.GPIO_DriveModeSet
|
||||||
0x000055dc 0x54 THUMB Flash Debug/../../obj/efm32_gpio.o
|
0x0000581c 0x54 THUMB Flash Debug/../../obj/efm32_gpio.o
|
||||||
0x000055dc GPIO_DriveModeSet
|
0x0000581c GPIO_DriveModeSet
|
||||||
.text.GPIO_PinModeSet
|
.text.GPIO_PinModeSet
|
||||||
0x00005630 0x1ac THUMB Flash Debug/../../obj/efm32_gpio.o
|
0x00005870 0x1ac THUMB Flash Debug/../../obj/efm32_gpio.o
|
||||||
0x00005630 GPIO_PinModeSet
|
0x00005870 GPIO_PinModeSet
|
||||||
.text.LEUART_Sync
|
.text.LEUART_Sync
|
||||||
0x000057dc 0x34 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00005a1c 0x34 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.text.LEUART_BaudrateSet
|
.text.LEUART_BaudrateSet
|
||||||
0x00005810 0x88 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00005a50 0x94 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
0x00005810 LEUART_BaudrateSet
|
0x00005a50 LEUART_BaudrateSet
|
||||||
.text.LEUART_Enable
|
.text.LEUART_Enable
|
||||||
0x00005898 0x44 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00005ae4 0x48 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
0x00005898 LEUART_Enable
|
0x00005ae4 LEUART_Enable
|
||||||
.text.LEUART_FreezeEnable
|
.text.LEUART_FreezeEnable
|
||||||
0x000058dc 0x38 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00005b2c 0x38 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
0x000058dc LEUART_FreezeEnable
|
0x00005b2c LEUART_FreezeEnable
|
||||||
.text.LEUART_Init
|
.text.LEUART_Init
|
||||||
0x00005914 0x70 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00005b64 0x88 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
0x00005914 LEUART_Init
|
0x00005b64 LEUART_Init
|
||||||
.text.LEUART_Rx
|
.text.LEUART_Rx
|
||||||
0x00005984 0x28 THUMB Flash Debug/../../obj/efm32_leuart.o
|
0x00005bec 0x28 THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
0x00005984 LEUART_Rx
|
0x00005bec LEUART_Rx
|
||||||
.text.SYSTEM_ChipRevisionGet
|
.text.SYSTEM_ChipRevisionGet
|
||||||
0x000059ac 0x5c THUMB Flash Debug/../../obj/efm32_system.o
|
0x00005c14 0x5c THUMB Flash Debug/../../obj/efm32_system.o
|
||||||
0x000059ac SYSTEM_ChipRevisionGet
|
0x00005c14 SYSTEM_ChipRevisionGet
|
||||||
.text.NVIC_EnableIRQ
|
.text.NVIC_EnableIRQ
|
||||||
0x00005a08 0x34 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00005c70 0x34 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_IRQHandler
|
.text.LCD_IRQHandler
|
||||||
0x00005a3c 0x3c THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00005ca4 0x3c THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
0x00005a3c LCD_IRQHandler
|
0x00005ca4 LCD_IRQHandler
|
||||||
.text.LCD_enableSegment
|
.text.LCD_enableSegment
|
||||||
0x00005a78 0xd8 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00005ce0 0xd8 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_disableSegment
|
.text.LCD_disableSegment
|
||||||
0x00005b50 0xf8 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00005db8 0xf8 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.text.LCD_AllOff
|
.text.LCD_AllOff
|
||||||
0x00005c48 0x5c THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00005eb0 0x5c THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
0x00005c48 LCD_AllOff
|
0x00005eb0 LCD_AllOff
|
||||||
.text.LCD_Symbol
|
.text.LCD_Symbol
|
||||||
0x00005ca4 0x114 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x00005f0c 0x120 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
0x00005ca4 LCD_Symbol
|
0x00005f0c LCD_Symbol
|
||||||
.text.LCD_Init
|
.text.LCD_Init
|
||||||
0x00005db8 0xd8 THUMB Flash Debug/../../obj/lcdcontroller.o
|
0x0000602c 0xe4 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
0x00005db8 LCD_Init
|
0x0000602c LCD_Init
|
||||||
.text.libc.__getc
|
.text.libc.__getc
|
||||||
0x00005e90 0x28 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x00006110 0x28 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005e90 __getc
|
0x00006110 __getc
|
||||||
.text.libc.__putc
|
.text.libc.__putc
|
||||||
0x00005eb8 0x38 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x00006138 0x38 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005eb8 __putc
|
0x00006138 __putc
|
||||||
.text.libc.__print_padding
|
.text.libc.__print_padding
|
||||||
0x00005ef0 0x24 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x00006170 0x24 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005ef0 __print_padding
|
0x00006170 __print_padding
|
||||||
.text.libc.__pre_padding
|
.text.libc.__pre_padding
|
||||||
0x00005f14 0x1c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x00006194 0x1c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005f14 __pre_padding
|
0x00006194 __pre_padding
|
||||||
.text.libc.isupper
|
.text.libc.isupper
|
||||||
0x00005f30 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x000061b0 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005f30 isupper
|
0x000061b0 isupper
|
||||||
.text.libc.islower
|
.text.libc.islower
|
||||||
0x00005f40 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x000061c0 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005f40 islower
|
0x000061c0 islower
|
||||||
.text.libc.isdigit
|
.text.libc.isdigit
|
||||||
0x00005f50 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x000061d0 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005f50 isdigit
|
0x000061d0 isdigit
|
||||||
.text.libc.__digit
|
.text.libc.__digit
|
||||||
0x00005f60 0x3c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x000061e0 0x3c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005f60 __digit
|
0x000061e0 __digit
|
||||||
.text.libc.isspace
|
.text.libc.isspace
|
||||||
0x00005f9c 0x18 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x0000621c 0x18 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00005f9c isspace
|
0x0000621c isspace
|
||||||
.text.libc.strlen
|
.text.libc.strlen
|
||||||
0x00005fb4 0x60 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2_asm.o)
|
0x00006234 0x60 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2_asm.o)
|
||||||
0x00005fb4 strlen
|
0x00006234 strlen
|
||||||
.text.libc.__vfprintf_int
|
.text.libc.__vfprintf_int
|
||||||
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|
0x00006294 0x5d0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfprintf_int.o)
|
||||||
0x00006014 __vfprintf_int
|
0x00006294 __vfprintf_int
|
||||||
.text.libc.__ungetc
|
.text.libc.__ungetc
|
||||||
0x000065e4 0x20 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
0x00006864 0x20 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
||||||
.text.libc.rd_int
|
.text.libc.rd_int
|
||||||
0x00006604 0x17c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
0x00006884 0x17c C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
||||||
.text.libc.__vfscanf_int
|
.text.libc.__vfscanf_int
|
||||||
0x00006780 0x3ec C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
0x00006a00 0x3ec C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
||||||
0x00006780 __vfscanf_int
|
0x00006a00 __vfscanf_int
|
||||||
.text.libdebugio_bkpt.__do_debug_operation_bkpt
|
.text.libdebugio_bkpt.__do_debug_operation_bkpt
|
||||||
0x00006b6c 0x18 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v7m_t_le.a(libdebugio_asm.o)
|
0x00006dec 0x18 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v7m_t_le.a(libdebugio_asm.o)
|
||||||
0x00006b6c __do_debug_operation_bkpt
|
0x00006dec __do_debug_operation_bkpt
|
||||||
.text.libc.__debug_io_lock
|
.text.libc.__debug_io_lock
|
||||||
0x00006b84 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
0x00006e04 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
0x00006b84 __debug_io_lock
|
0x00006e04 __debug_io_lock
|
||||||
.text.libc.__debug_io_unlock
|
.text.libc.__debug_io_unlock
|
||||||
0x00006b88 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
0x00006e08 0x4 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
0x00006b88 __debug_io_unlock
|
0x00006e08 __debug_io_unlock
|
||||||
0x00006b8c __text_end__ = (__text_start__ + SIZEOF (.text))
|
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|
||||||
0x00006b8c __text_load_end__ = __text_end__
|
0x00006e0c __text_load_end__ = __text_end__
|
||||||
|
|
||||||
.vfp11_veneer 0x00000000 0x0
|
.vfp11_veneer 0x00000000 0x0
|
||||||
.vfp11_veneer 0x00000000 0x0 linker stubs
|
.vfp11_veneer 0x00000000 0x0 linker stubs
|
||||||
|
@ -1398,58 +1398,58 @@ Linker script and memory map
|
||||||
.v4_bx 0x00000000 0x0
|
.v4_bx 0x00000000 0x0
|
||||||
.v4_bx 0x00000000 0x0 linker stubs
|
.v4_bx 0x00000000 0x0 linker stubs
|
||||||
0x00000001 . = ASSERT (((__text_end__ >= __FLASH_segment_start__) && (__text_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .text is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__text_end__ >= __FLASH_segment_start__) && (__text_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .text is too large to fit in FLASH memory segment)
|
||||||
0x00006b8c __dtors_load_start__ = ALIGN (__text_end__, 0x4)
|
0x00006e0c __dtors_load_start__ = ALIGN (__text_end__, 0x4)
|
||||||
|
|
||||||
.dtors 0x00006b8c 0x0
|
.dtors 0x00006e0c 0x0
|
||||||
0x00006b8c __dtors_start__ = .
|
0x00006e0c __dtors_start__ = .
|
||||||
*(SORT(.dtors.*))
|
*(SORT(.dtors.*))
|
||||||
*(.dtors)
|
*(.dtors)
|
||||||
*(.fini_array .fini_array.*)
|
*(.fini_array .fini_array.*)
|
||||||
0x00006b8c __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
|
0x00006e0c __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
|
||||||
0x00006b8c __dtors_load_end__ = __dtors_end__
|
0x00006e0c __dtors_load_end__ = __dtors_end__
|
||||||
0x00000001 . = ASSERT (((__dtors_end__ >= __FLASH_segment_start__) && (__dtors_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .dtors is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__dtors_end__ >= __FLASH_segment_start__) && (__dtors_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .dtors is too large to fit in FLASH memory segment)
|
||||||
0x00006b8c __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
|
0x00006e0c __ctors_load_start__ = ALIGN (__dtors_end__, 0x4)
|
||||||
|
|
||||||
.ctors 0x00006b8c 0x0
|
.ctors 0x00006e0c 0x0
|
||||||
0x00006b8c __ctors_start__ = .
|
0x00006e0c __ctors_start__ = .
|
||||||
*(SORT(.ctors.*))
|
*(SORT(.ctors.*))
|
||||||
*(.ctors)
|
*(.ctors)
|
||||||
*(.init_array .init_array.*)
|
*(.init_array .init_array.*)
|
||||||
0x00006b8c __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
|
0x00006e0c __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
|
||||||
0x00006b8c __ctors_load_end__ = __ctors_end__
|
0x00006e0c __ctors_load_end__ = __ctors_end__
|
||||||
0x00000001 . = ASSERT (((__ctors_end__ >= __FLASH_segment_start__) && (__ctors_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .ctors is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__ctors_end__ >= __FLASH_segment_start__) && (__ctors_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .ctors is too large to fit in FLASH memory segment)
|
||||||
0x00006b8c __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
|
0x00006e0c __rodata_load_start__ = ALIGN (__ctors_end__, 0x4)
|
||||||
|
|
||||||
.rodata 0x00006b8c 0x38
|
.rodata 0x00006e0c 0x38
|
||||||
0x00006b8c __rodata_start__ = .
|
0x00006e0c __rodata_start__ = .
|
||||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||||
.rodata 0x00006b8c 0x18 THUMB Flash Debug/../../obj/boot.o
|
.rodata 0x00006e0c 0x18 THUMB Flash Debug/../../obj/boot.o
|
||||||
.rodata.libc.__hex_lc
|
.rodata.libc.__hex_lc
|
||||||
0x00006ba4 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x00006e24 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00006ba4 __hex_lc
|
0x00006e24 __hex_lc
|
||||||
.rodata.libc.__hex_uc
|
.rodata.libc.__hex_uc
|
||||||
0x00006bb4 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
0x00006e34 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
0x00006bb4 __hex_uc
|
0x00006e34 __hex_uc
|
||||||
0x00006bc4 __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
|
0x00006e44 __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
|
||||||
0x00006bc4 __rodata_load_end__ = __rodata_end__
|
0x00006e44 __rodata_load_end__ = __rodata_end__
|
||||||
0x00000001 . = ASSERT (((__rodata_end__ >= __FLASH_segment_start__) && (__rodata_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .rodata is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__rodata_end__ >= __FLASH_segment_start__) && (__rodata_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .rodata is too large to fit in FLASH memory segment)
|
||||||
0x00006bc4 __ARM.exidx_load_start__ = ALIGN (__rodata_end__, 0x4)
|
0x00006e44 __ARM.exidx_load_start__ = ALIGN (__rodata_end__, 0x4)
|
||||||
|
|
||||||
.ARM.exidx 0x00006bc4 0x0
|
.ARM.exidx 0x00006e44 0x0
|
||||||
0x00006bc4 __ARM.exidx_start__ = .
|
0x00006e44 __ARM.exidx_start__ = .
|
||||||
0x00006bc4 __exidx_start = __ARM.exidx_start__
|
0x00006e44 __exidx_start = __ARM.exidx_start__
|
||||||
*(.ARM.exidx .ARM.exidx.*)
|
*(.ARM.exidx .ARM.exidx.*)
|
||||||
0x00006bc4 __ARM.exidx_end__ = (__ARM.exidx_start__ + SIZEOF (.ARM.exidx))
|
0x00006e44 __ARM.exidx_end__ = (__ARM.exidx_start__ + SIZEOF (.ARM.exidx))
|
||||||
0x00006bc4 __exidx_end = __ARM.exidx_end__
|
0x00006e44 __exidx_end = __ARM.exidx_end__
|
||||||
0x00006bc4 __ARM.exidx_load_end__ = __ARM.exidx_end__
|
0x00006e44 __ARM.exidx_load_end__ = __ARM.exidx_end__
|
||||||
0x00000001 . = ASSERT (((__ARM.exidx_end__ >= __FLASH_segment_start__) && (__ARM.exidx_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .ARM.exidx is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT (((__ARM.exidx_end__ >= __FLASH_segment_start__) && (__ARM.exidx_end__ <= (__FLASH_segment_start__ + 0x20000))), error: .ARM.exidx is too large to fit in FLASH memory segment)
|
||||||
0x00006bc4 __fast_load_start__ = ALIGN (__ARM.exidx_end__, 0x4)
|
0x00006e44 __fast_load_start__ = ALIGN (__ARM.exidx_end__, 0x4)
|
||||||
|
|
||||||
.fast 0x20000000 0x0 load address 0x00006bc4
|
.fast 0x20000000 0x0 load address 0x00006e44
|
||||||
0x20000000 __fast_start__ = .
|
0x20000000 __fast_start__ = .
|
||||||
*(.fast .fast.*)
|
*(.fast .fast.*)
|
||||||
0x20000000 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
|
0x20000000 __fast_end__ = (__fast_start__ + SIZEOF (.fast))
|
||||||
0x00006bc4 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
|
0x00006e44 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
|
||||||
0x00000001 . = ASSERT ((((__fast_load_start__ + SIZEOF (.fast)) >= __FLASH_segment_start__) && ((__fast_load_start__ + SIZEOF (.fast)) <= (__FLASH_segment_start__ + 0x20000))), error: .fast is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT ((((__fast_load_start__ + SIZEOF (.fast)) >= __FLASH_segment_start__) && ((__fast_load_start__ + SIZEOF (.fast)) <= (__FLASH_segment_start__ + 0x20000))), error: .fast is too large to fit in FLASH memory segment)
|
||||||
|
|
||||||
.fast_run 0x20000000 0x0
|
.fast_run 0x20000000 0x0
|
||||||
|
@ -1458,9 +1458,9 @@ Linker script and memory map
|
||||||
0x20000000 __fast_run_end__ = (__fast_run_start__ + SIZEOF (.fast_run))
|
0x20000000 __fast_run_end__ = (__fast_run_start__ + SIZEOF (.fast_run))
|
||||||
0x20000000 __fast_run_load_end__ = __fast_run_end__
|
0x20000000 __fast_run_load_end__ = __fast_run_end__
|
||||||
0x00000001 . = ASSERT (((__fast_run_end__ >= __RAM_segment_start__) && (__fast_run_end__ <= (__RAM_segment_start__ + 0x4000))), error: .fast_run is too large to fit in RAM memory segment)
|
0x00000001 . = ASSERT (((__fast_run_end__ >= __RAM_segment_start__) && (__fast_run_end__ <= (__RAM_segment_start__ + 0x4000))), error: .fast_run is too large to fit in RAM memory segment)
|
||||||
0x00006bc4 __data_load_start__ = ALIGN ((__fast_load_start__ + SIZEOF (.fast)), 0x4)
|
0x00006e44 __data_load_start__ = ALIGN ((__fast_load_start__ + SIZEOF (.fast)), 0x4)
|
||||||
|
|
||||||
.data 0x20000000 0x8 load address 0x00006bc4
|
.data 0x20000000 0x8 load address 0x00006e44
|
||||||
0x20000000 __data_start__ = .
|
0x20000000 __data_start__ = .
|
||||||
*(.data .data.* .gnu.linkonce.d.*)
|
*(.data .data.* .gnu.linkonce.d.*)
|
||||||
.data.SystemHFXOClock
|
.data.SystemHFXOClock
|
||||||
|
@ -1468,10 +1468,10 @@ Linker script and memory map
|
||||||
.data.SystemLFXOClock
|
.data.SystemLFXOClock
|
||||||
0x20000004 0x4 THUMB Flash Debug/../../obj/system_efm32.o
|
0x20000004 0x4 THUMB Flash Debug/../../obj/system_efm32.o
|
||||||
0x20000008 __data_end__ = (__data_start__ + SIZEOF (.data))
|
0x20000008 __data_end__ = (__data_start__ + SIZEOF (.data))
|
||||||
0x00006bcc __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
|
0x00006e4c __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
|
||||||
0x00000001 . = ASSERT ((((__data_load_start__ + SIZEOF (.data)) >= __FLASH_segment_start__) && ((__data_load_start__ + SIZEOF (.data)) <= (__FLASH_segment_start__ + 0x20000))), error: .data is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT ((((__data_load_start__ + SIZEOF (.data)) >= __FLASH_segment_start__) && ((__data_load_start__ + SIZEOF (.data)) <= (__FLASH_segment_start__ + 0x20000))), error: .data is too large to fit in FLASH memory segment)
|
||||||
|
|
||||||
.data_run 0x20000000 0x8 load address 0x00006bc4
|
.data_run 0x20000000 0x8 load address 0x00006e44
|
||||||
0x20000000 __data_run_start__ = .
|
0x20000000 __data_run_start__ = .
|
||||||
0x20000008 . = MAX ((__data_run_start__ + SIZEOF (.data)), .)
|
0x20000008 . = MAX ((__data_run_start__ + SIZEOF (.data)), .)
|
||||||
*fill* 0x20000000 0x8 00
|
*fill* 0x20000000 0x8 00
|
||||||
|
@ -1559,14 +1559,14 @@ Linker script and memory map
|
||||||
0x200001f0 __tbss_end__ = (__tbss_start__ + SIZEOF (.tbss))
|
0x200001f0 __tbss_end__ = (__tbss_start__ + SIZEOF (.tbss))
|
||||||
0x200001f0 __tbss_load_end__ = __tbss_end__
|
0x200001f0 __tbss_load_end__ = __tbss_end__
|
||||||
0x00000001 . = ASSERT (((__tbss_end__ >= __RAM_segment_start__) && (__tbss_end__ <= (__RAM_segment_start__ + 0x4000))), error: .tbss is too large to fit in RAM memory segment)
|
0x00000001 . = ASSERT (((__tbss_end__ >= __RAM_segment_start__) && (__tbss_end__ <= (__RAM_segment_start__ + 0x4000))), error: .tbss is too large to fit in RAM memory segment)
|
||||||
0x00006bcc __tdata_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
|
0x00006e4c __tdata_load_start__ = ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4)
|
||||||
|
|
||||||
.tdata 0x200001f0 0x0 load address 0x00006bcc
|
.tdata 0x200001f0 0x0 load address 0x00006e4c
|
||||||
0x200001f0 __tdata_start__ = .
|
0x200001f0 __tdata_start__ = .
|
||||||
*(.tdata .tdata.*)
|
*(.tdata .tdata.*)
|
||||||
0x200001f0 __tdata_end__ = (__tdata_start__ + SIZEOF (.tdata))
|
0x200001f0 __tdata_end__ = (__tdata_start__ + SIZEOF (.tdata))
|
||||||
0x00006bcc __tdata_load_end__ = (__tdata_load_start__ + SIZEOF (.tdata))
|
0x00006e4c __tdata_load_end__ = (__tdata_load_start__ + SIZEOF (.tdata))
|
||||||
0x00006bcc __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.tdata))
|
0x00006e4c __FLASH_segment_used_end__ = (ALIGN ((__data_load_start__ + SIZEOF (.data)), 0x4) + SIZEOF (.tdata))
|
||||||
0x00000001 . = ASSERT ((((__tdata_load_start__ + SIZEOF (.tdata)) >= __FLASH_segment_start__) && ((__tdata_load_start__ + SIZEOF (.tdata)) <= (__FLASH_segment_start__ + 0x20000))), error: .tdata is too large to fit in FLASH memory segment)
|
0x00000001 . = ASSERT ((((__tdata_load_start__ + SIZEOF (.tdata)) >= __FLASH_segment_start__) && ((__tdata_load_start__ + SIZEOF (.tdata)) <= (__FLASH_segment_start__ + 0x20000))), error: .tdata is too large to fit in FLASH memory segment)
|
||||||
|
|
||||||
.tdata_run 0x200001f0 0x0
|
.tdata_run 0x200001f0 0x0
|
||||||
|
@ -1912,7 +1912,7 @@ OUTPUT(THUMB Flash Debug/../../bin/demoprog_olimex_efm32g880.elf elf32-littlearm
|
||||||
.debug_ranges 0x00000e88 0x20 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
.debug_ranges 0x00000e88 0x20 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
||||||
.debug_ranges 0x00000ea8 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
.debug_ranges 0x00000ea8 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
||||||
.debug_line 0x00000000 0x8e51
|
.debug_line 0x00000000 0x8e54
|
||||||
.debug_line 0x00000000 0x34a THUMB Flash Debug/../../obj/boot.o
|
.debug_line 0x00000000 0x34a THUMB Flash Debug/../../obj/boot.o
|
||||||
.debug_line 0x0000034a 0xfe THUMB Flash Debug/../../obj/cstart.o
|
.debug_line 0x0000034a 0xfe THUMB Flash Debug/../../obj/cstart.o
|
||||||
.debug_line 0x00000448 0x1de THUMB Flash Debug/../../obj/irq.o
|
.debug_line 0x00000448 0x1de THUMB Flash Debug/../../obj/irq.o
|
||||||
|
@ -1929,33 +1929,33 @@ OUTPUT(THUMB Flash Debug/../../bin/demoprog_olimex_efm32g880.elf elf32-littlearm
|
||||||
.debug_line 0x000028ff 0x6fb THUMB Flash Debug/../../obj/efm32_cmu.o
|
.debug_line 0x000028ff 0x6fb THUMB Flash Debug/../../obj/efm32_cmu.o
|
||||||
.debug_line 0x00002ffa 0x38e THUMB Flash Debug/../../obj/efm32_dac.o
|
.debug_line 0x00002ffa 0x38e THUMB Flash Debug/../../obj/efm32_dac.o
|
||||||
.debug_line 0x00003388 0x368 THUMB Flash Debug/../../obj/efm32_dbg.o
|
.debug_line 0x00003388 0x368 THUMB Flash Debug/../../obj/efm32_dbg.o
|
||||||
.debug_line 0x000036f0 0x518 THUMB Flash Debug/../../obj/efm32_dma.o
|
.debug_line 0x000036f0 0x51b THUMB Flash Debug/../../obj/efm32_dma.o
|
||||||
.debug_line 0x00003c08 0x402 THUMB Flash Debug/../../obj/efm32_ebi.o
|
.debug_line 0x00003c0b 0x402 THUMB Flash Debug/../../obj/efm32_ebi.o
|
||||||
.debug_line 0x0000400a 0x3f4 THUMB Flash Debug/../../obj/efm32_emu.o
|
.debug_line 0x0000400d 0x3f4 THUMB Flash Debug/../../obj/efm32_emu.o
|
||||||
.debug_line 0x000043fe 0x440 THUMB Flash Debug/../../obj/efm32_gpio.o
|
.debug_line 0x00004401 0x440 THUMB Flash Debug/../../obj/efm32_gpio.o
|
||||||
.debug_line 0x0000483e 0x481 THUMB Flash Debug/../../obj/efm32_i2c.o
|
.debug_line 0x00004841 0x481 THUMB Flash Debug/../../obj/efm32_i2c.o
|
||||||
.debug_line 0x00004cbf 0x213 THUMB Flash Debug/../../obj/efm32_int.o
|
.debug_line 0x00004cc2 0x213 THUMB Flash Debug/../../obj/efm32_int.o
|
||||||
.debug_line 0x00004ed2 0x478 THUMB Flash Debug/../../obj/efm32_lcd.o
|
.debug_line 0x00004ed5 0x478 THUMB Flash Debug/../../obj/efm32_lcd.o
|
||||||
.debug_line 0x0000534a 0x107 THUMB Flash Debug/../../obj/efm32_lesense.o
|
.debug_line 0x0000534d 0x107 THUMB Flash Debug/../../obj/efm32_lesense.o
|
||||||
.debug_line 0x00005451 0x3d0 THUMB Flash Debug/../../obj/efm32_letimer.o
|
.debug_line 0x00005454 0x3d0 THUMB Flash Debug/../../obj/efm32_letimer.o
|
||||||
.debug_line 0x00005821 0x41b THUMB Flash Debug/../../obj/efm32_leuart.o
|
.debug_line 0x00005824 0x41b THUMB Flash Debug/../../obj/efm32_leuart.o
|
||||||
.debug_line 0x00005c3c 0x23e THUMB Flash Debug/../../obj/efm32_mpu.o
|
.debug_line 0x00005c3f 0x23e THUMB Flash Debug/../../obj/efm32_mpu.o
|
||||||
.debug_line 0x00005e7a 0x357 THUMB Flash Debug/../../obj/efm32_msc.o
|
.debug_line 0x00005e7d 0x357 THUMB Flash Debug/../../obj/efm32_msc.o
|
||||||
.debug_line 0x000061d1 0x107 THUMB Flash Debug/../../obj/efm32_opamp.o
|
.debug_line 0x000061d4 0x107 THUMB Flash Debug/../../obj/efm32_opamp.o
|
||||||
.debug_line 0x000062d8 0x400 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
.debug_line 0x000062db 0x400 THUMB Flash Debug/../../obj/efm32_pcnt.o
|
||||||
.debug_line 0x000066d8 0x2d0 THUMB Flash Debug/../../obj/efm32_prs.o
|
.debug_line 0x000066db 0x2d0 THUMB Flash Debug/../../obj/efm32_prs.o
|
||||||
.debug_line 0x000069a8 0x358 THUMB Flash Debug/../../obj/efm32_rmu.o
|
.debug_line 0x000069ab 0x358 THUMB Flash Debug/../../obj/efm32_rmu.o
|
||||||
.debug_line 0x00006d00 0x3b6 THUMB Flash Debug/../../obj/efm32_rtc.o
|
.debug_line 0x00006d03 0x3b6 THUMB Flash Debug/../../obj/efm32_rtc.o
|
||||||
.debug_line 0x000070b6 0x2f8 THUMB Flash Debug/../../obj/efm32_system.o
|
.debug_line 0x000070b9 0x2f8 THUMB Flash Debug/../../obj/efm32_system.o
|
||||||
.debug_line 0x000073ae 0x3f9 THUMB Flash Debug/../../obj/efm32_timer.o
|
.debug_line 0x000073b1 0x3f9 THUMB Flash Debug/../../obj/efm32_timer.o
|
||||||
.debug_line 0x000077a7 0x4bf THUMB Flash Debug/../../obj/efm32_usart.o
|
.debug_line 0x000077aa 0x4bf THUMB Flash Debug/../../obj/efm32_usart.o
|
||||||
.debug_line 0x00007c66 0x348 THUMB Flash Debug/../../obj/efm32_vcmp.o
|
.debug_line 0x00007c69 0x348 THUMB Flash Debug/../../obj/efm32_vcmp.o
|
||||||
.debug_line 0x00007fae 0x360 THUMB Flash Debug/../../obj/efm32_wdog.o
|
.debug_line 0x00007fb1 0x360 THUMB Flash Debug/../../obj/efm32_wdog.o
|
||||||
.debug_line 0x0000830e 0x497 THUMB Flash Debug/../../obj/lcdcontroller.o
|
.debug_line 0x00008311 0x497 THUMB Flash Debug/../../obj/lcdcontroller.o
|
||||||
.debug_line 0x000087a5 0x54f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
.debug_line 0x000087a8 0x54f C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(libc2.o)
|
||||||
.debug_line 0x00008cf4 0x75 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfprintf_int.o)
|
.debug_line 0x00008cf7 0x75 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfprintf_int.o)
|
||||||
.debug_line 0x00008d69 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
.debug_line 0x00008d6c 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_v7m_t_le.a(__vfscanf_int.o)
|
||||||
.debug_line 0x00008ddd 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
.debug_line 0x00008de0 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
||||||
.debug_str 0x00000000 0x66d7
|
.debug_str 0x00000000 0x66d7
|
||||||
.debug_str 0x00000000 0x782 THUMB Flash Debug/../../obj/boot.o
|
.debug_str 0x00000000 0x782 THUMB Flash Debug/../../obj/boot.o
|
||||||
|
|
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|
@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="EFM32G880_crossworks" target="8" version="2">
|
<solution Name="EFM32G880_crossworks" target="8" version="2">
|
||||||
<project Name="demoprog_olimex_efm32g880">
|
<project Name="demoprog_olimex_efm32g880">
|
||||||
<configuration Name="Common" Target="EFM32G880F128" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/EFM32/EFM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="EFM32G880F128;FLASH=0x00000000:0x20000;RAM=0x20000000:0x4000" arm_target_debug_interface_type="ADIv5" arm_target_interface_type="SWD" arm_target_loader_parameter="16000000" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(Configuration)/../../bin" c_preprocessor_definitions="USE_PROCESS_STACK" c_user_include_directories="$(ProjectDir)/../src;$(ProjectDir)/../lib/CMSIS/CM3/CoreSupport;$(ProjectDir)/../lib/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32;$(ProjectDir)/../lib/efm32lib/inc;$(ProjectDir)/../lib/lcd" gcc_optimization_level="None" link_include_startup_code="No" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/EFM32/EFM32G880F128_MemoryMap.xml" linker_output_format="srec" oscillator_frequency="Other" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/EFM32/EFM32_propertyGroups.xml"/>
|
<configuration Name="Common" Target="EFM32G880F128" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_long_calls="Yes" arm_simulator_memory_simulation_filename="$(TargetsDir)/EFM32/EFM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="EFM32G880F128;FLASH=0x00000000:0x20000;RAM=0x20000000:0x4000" arm_target_debug_interface_type="ADIv5" arm_target_interface_type="SWD" arm_target_loader_parameter="16000000" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(Configuration)/../../bin" c_preprocessor_definitions="USE_PROCESS_STACK" c_user_include_directories="$(ProjectDir)/../src;$(ProjectDir)/../lib/CMSIS/CM3/CoreSupport;$(ProjectDir)/../lib/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32;$(ProjectDir)/../lib/efm32lib/inc;$(ProjectDir)/../lib/lcd" gcc_optimization_level="None" link_include_startup_code="No" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/EFM32/EFM32G880F128_MemoryMap.xml" linker_output_format="srec" oscillator_frequency="Other" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/EFM32/EFM32_propertyGroups.xml"/>
|
||||||
<configuration Name="Flash" Placement="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/EFM32/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" Placement="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/EFM32/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" target_reset_script="FLASHReset()"/>
|
||||||
<configuration Name="RAM" Placement="RAM" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/ram_placement.xml" target_reset_script="SRAMReset()"/>
|
<configuration Name="RAM" Placement="RAM" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/ram_placement.xml" target_reset_script="SRAMReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
|
|
|
@ -56,7 +56,7 @@
|
||||||
<Watches active="0" update="Never" />
|
<Watches active="0" update="Never" />
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" y="66" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="51" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="51" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" y="76" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="51" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="demoprog_olimex_efm32g880" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
|
<ARMCrossStudioWindow activeProject="demoprog_olimex_efm32g880" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_EFM32_Olimex_EM32G880F128STK_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
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|
@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="lm3s6965_crossworks" target="8" version="2">
|
<solution Name="lm3s6965_crossworks" target="8" version="2">
|
||||||
<project Name="openbtl_ek_lm3s6965">
|
<project Name="openbtl_ek_lm3s6965">
|
||||||
<configuration Name="Common" Placement="Flash" Target="LM3S6965" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARMCM3_LM3S;$(ProjectDir)/../../../../Source/ARMCM3_LM3S/Crossworks" gcc_entry_point="reset_handler" gcc_optimization_level="Level 1" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/LM3S/LM3S6965_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
<configuration Name="Common" Placement="Flash" Target="LM3S6965" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARMCM3_LM3S;$(ProjectDir)/../../../../Source/ARMCM3_LM3S/Crossworks" gcc_entry_point="reset_handler" gcc_optimization_level="Optimize For Size" link_include_standard_libraries="No" linker_additional_files="" linker_keep_symbols="_vectors;EntryFromProg" linker_memory_map_file="$(TargetsDir)/LM3S/LM3S6965_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
||||||
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
||||||
|
|
|
@ -24,9 +24,9 @@
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Demo" name="unnamed" />
|
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Demo;Boot" name="unnamed" />
|
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Source" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Source" name="unnamed" />
|
||||||
|
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Source;ARMCM3_LM3S" name="unnamed" />
|
||||||
|
<ProjectSessionItem path="lm3s6965_crossworks;openbtl_ek_lm3s6965;Source Files;Source;ARMCM3_LM3S;Crossworks" name="unnamed" />
|
||||||
</Project>
|
</Project>
|
||||||
<Register1>
|
<Register1>
|
||||||
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
|
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
|
||||||
|
@ -57,7 +57,8 @@
|
||||||
<Watches active="0" update="Never" />
|
<Watches active="0" update="Never" />
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="29" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" y="72" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" left="0" selected="1" name="unnamed" top="36" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" y="72" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="72" />
|
||||||
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\Crossworks\cstart.s" y="87" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\Crossworks\cstart.s" left="0" selected="1" name="unnamed" top="74" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="openbtl_ek_lm3s6965" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\lib\driverlib" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
<ARMCrossStudioWindow activeProject="openbtl_ek_lm3s6965" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Boot\lib\driverlib" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
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|
@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="lm3s6965_crossworks" target="8" version="2">
|
<solution Name="lm3s6965_crossworks" target="8" version="2">
|
||||||
<project Name="demoprog_ek_lm3s6965">
|
<project Name="demoprog_ek_lm3s6965">
|
||||||
<configuration Name="Common" Placement="Flash" Target="LM3S6965" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib" gcc_entry_point="reset_handler" gcc_optimization_level="None" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/LM3S/LM3S6965_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
<configuration Name="Common" Placement="Flash" Target="LM3S6965" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_long_calls="Yes" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib" gcc_entry_point="reset_handler" gcc_optimization_level="None" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/LM3S/LM3S6965_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
||||||
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
||||||
|
|
|
@ -23,7 +23,6 @@
|
||||||
<Project>
|
<Project>
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965;Library Files" name="unnamed" />
|
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965;Source Files" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965;Source Files" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965;Source Files;Demo" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965;Source Files;Demo" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965;Source Files;Demo;Prog" name="unnamed" />
|
<ProjectSessionItem path="lm3s6965_crossworks;demoprog_ek_lm3s6965;Source Files;Demo;Prog" name="unnamed" />
|
||||||
|
@ -57,8 +56,8 @@
|
||||||
<Watches active="0" update="Never" />
|
<Watches active="0" update="Never" />
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="1" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\main.c" y="52" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\main.c" left="0" selected="0" name="unnamed" top="45" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\main.c" y="52" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\main.c" left="0" selected="0" name="unnamed" top="52" />
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="26" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\led.c" y="40" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\led.c" left="0" selected="1" name="unnamed" top="37" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="26" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\led.c" y="54" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog\led.c" left="0" selected="1" name="unnamed" top="40" />
|
||||||
</Files>
|
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|
||||||
<ARMCrossStudioWindow activeProject="demoprog_ek_lm3s6965" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
<ARMCrossStudioWindow activeProject="demoprog_ek_lm3s6965" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S6965_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
Binary file not shown.
Binary file not shown.
|
@ -7,47 +7,44 @@ start address 0x00000000
|
||||||
|
|
||||||
Program Header:
|
Program Header:
|
||||||
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
|
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
|
||||||
filesz 0x000036ae memsz 0x000036ae flags r-x
|
filesz 0x000016ba memsz 0x000016ba flags r-x
|
||||||
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x000036ae align 2**15
|
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x20000000 align 2**15
|
||||||
filesz 0x0000011c memsz 0x00000708 flags rw-
|
filesz 0x00000000 memsz 0x000005ec flags rw-
|
||||||
private flags = 5000000: [Version5 EABI]
|
private flags = 5000000: [Version5 EABI]
|
||||||
|
|
||||||
Sections:
|
Sections:
|
||||||
Idx Name Size VMA LMA File off Algn
|
Idx Name Size VMA LMA File off Algn
|
||||||
0 .text 000036ae 00000000 00000000 00008000 2**2
|
0 .text 000016ba 00000000 00000000 00008000 2**2
|
||||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||||
1 .data 0000011c 20000000 000036ae 00010000 2**2
|
1 .bss 000005ec 20000000 20000000 00010000 2**2
|
||||||
CONTENTS, ALLOC, LOAD, DATA
|
|
||||||
2 .bss 000005ec 2000011c 000037ca 0001011c 2**2
|
|
||||||
ALLOC
|
ALLOC
|
||||||
3 .debug_abbrev 00001319 00000000 00000000 0001011c 2**0
|
2 .debug_abbrev 00001319 00000000 00000000 000096ba 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
4 .debug_info 00003c91 00000000 00000000 00011435 2**0
|
3 .debug_info 00003c91 00000000 00000000 0000a9d3 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
5 .debug_line 000023cc 00000000 00000000 000150c6 2**0
|
4 .debug_line 000023cf 00000000 00000000 0000e664 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
6 .debug_pubtypes 000003ef 00000000 00000000 00017492 2**0
|
5 .debug_pubtypes 000003ef 00000000 00000000 00010a33 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
7 .debug_str 000017f3 00000000 00000000 00017881 2**0
|
6 .debug_str 000017f3 00000000 00000000 00010e22 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
8 .comment 0000002a 00000000 00000000 00019074 2**0
|
7 .comment 0000002a 00000000 00000000 00012615 2**0
|
||||||
CONTENTS, READONLY
|
CONTENTS, READONLY
|
||||||
9 .ARM.attributes 00000031 00000000 00000000 0001909e 2**0
|
8 .ARM.attributes 00000031 00000000 00000000 0001263f 2**0
|
||||||
CONTENTS, READONLY
|
CONTENTS, READONLY
|
||||||
10 .debug_loc 000036c2 00000000 00000000 000190cf 2**0
|
9 .debug_loc 0000370f 00000000 00000000 00012670 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
11 .debug_pubnames 000010f0 00000000 00000000 0001c791 2**0
|
10 .debug_pubnames 000010f0 00000000 00000000 00015d7f 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
12 .debug_aranges 00000878 00000000 00000000 0001d881 2**0
|
11 .debug_aranges 00000878 00000000 00000000 00016e6f 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
13 .debug_ranges 00000768 00000000 00000000 0001e0f9 2**0
|
12 .debug_ranges 00000768 00000000 00000000 000176e7 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
14 .debug_frame 000016d0 00000000 00000000 0001e864 2**2
|
13 .debug_frame 000016d0 00000000 00000000 00017e50 2**2
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
SYMBOL TABLE:
|
SYMBOL TABLE:
|
||||||
00000000 l d .text 00000000 .text
|
00000000 l d .text 00000000 .text
|
||||||
20000000 l d .data 00000000 .data
|
20000000 l d .bss 00000000 .bss
|
||||||
2000011c l d .bss 00000000 .bss
|
|
||||||
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
||||||
00000000 l d .debug_info 00000000 .debug_info
|
00000000 l d .debug_info 00000000 .debug_info
|
||||||
00000000 l d .debug_line 00000000 .debug_line
|
00000000 l d .debug_line 00000000 .debug_line
|
||||||
|
@ -63,272 +60,121 @@ SYMBOL TABLE:
|
||||||
00000000 l df *ABS* 00000000 vectors.c
|
00000000 l df *ABS* 00000000 vectors.c
|
||||||
00000000 l df *ABS* 00000000 cstart.c
|
00000000 l df *ABS* 00000000 cstart.c
|
||||||
0000011a l F .text 00000000 zero_loop2
|
0000011a l F .text 00000000 zero_loop2
|
||||||
00003366 l F .text 00000000 zero_loop
|
0000148e l F .text 00000000 zero_loop
|
||||||
00000000 l df *ABS* 00000000 hooks.c
|
|
||||||
00000000 l df *ABS* 00000000 main.c
|
00000000 l df *ABS* 00000000 main.c
|
||||||
00000000 l df *ABS* 00000000 cpulib.c
|
|
||||||
00000000 l df *ABS* 00000000 flashlib.c
|
00000000 l df *ABS* 00000000 flashlib.c
|
||||||
00003388 l O .text 00000010 g_pulFMPPERegs
|
|
||||||
000033b4 l O .text 00000010 g_pulFMPRERegs
|
|
||||||
000033c4 l O .text 00000003 CSWTCH.4
|
|
||||||
00000000 l df *ABS* 00000000 sysctl.c
|
00000000 l df *ABS* 00000000 sysctl.c
|
||||||
00000664 l F .text 00000168 SysCtlPeripheralValid
|
00000298 l F .text 00000168 SysCtlPeripheralValid
|
||||||
000033c8 l O .text 00000010 g_pulDCRegs
|
000014cc l O .text 0000005c g_pulXtals
|
||||||
000033d8 l O .text 0000005c g_pulXtals
|
00001544 l O .text 0000000c g_pulRCGCRegs
|
||||||
00003450 l O .text 0000000c g_pulDCGCRegs
|
|
||||||
0000345c l O .text 0000000c g_pulRCGCRegs
|
|
||||||
00003468 l O .text 0000000c g_pulSCGCRegs
|
|
||||||
00003474 l O .text 0000000c g_pulSRCRRegs
|
|
||||||
00000000 l df *ABS* 00000000 interrupt.c
|
|
||||||
000012d0 l F .text 00000002 IntDefaultHandler
|
|
||||||
20000000 l O .data 0000011c g_pfnRAMVectors
|
|
||||||
0000349c l O .text 00000020 g_pulPriority
|
|
||||||
000034bc l O .text 00000048 g_pulRegs
|
|
||||||
00000000 l df *ABS* 00000000 gpio.c
|
00000000 l df *ABS* 00000000 gpio.c
|
||||||
00001628 l F .text 000000c4 GPIOBaseValid
|
00000774 l F .text 000000c4 GPIOBaseValid
|
||||||
000016ec l F .text 000000f4 GPIOGetIntNumber
|
|
||||||
0000351c l O .text 00000048 g_pulGPIOBaseAddrs
|
|
||||||
00000000 l df *ABS* 00000000 uartlib.c
|
00000000 l df *ABS* 00000000 uartlib.c
|
||||||
00002044 l F .text 0000002c UARTBaseValid
|
000009e0 l F .text 0000002c UARTBaseValid
|
||||||
00000000 l df *ABS* 00000000 boot.c
|
00000000 l df *ABS* 00000000 boot.c
|
||||||
00000000 l df *ABS* 00000000 com.c
|
00000000 l df *ABS* 00000000 com.c
|
||||||
2000011c l O .bss 00000001 comEntryStateConnect
|
20000000 l O .bss 00000001 comEntryStateConnect
|
||||||
2000011d l O .bss 00000040 xcpCtoReqPacket.1375
|
20000001 l O .bss 00000040 xcpCtoReqPacket.1375
|
||||||
00000000 l df *ABS* 00000000 xcp.c
|
00000000 l df *ABS* 00000000 xcp.c
|
||||||
00002b48 l F .text 0000000c XcpProtectResources
|
00000c68 l F .text 0000000c XcpProtectResources
|
||||||
00002b54 l F .text 00000014 XcpSetCtoError
|
00000c74 l F .text 00000014 XcpSetCtoError
|
||||||
0000357e l O .text 00000008 xcpStationId
|
00001581 l O .text 00000008 xcpStationId
|
||||||
20000160 l O .bss 0000004c xcpInfo
|
20000044 l O .bss 0000004c xcpInfo
|
||||||
00000000 l df *ABS* 00000000 backdoor.c
|
00000000 l df *ABS* 00000000 backdoor.c
|
||||||
200001ac l O .bss 00000001 backdoorOpen
|
20000090 l O .bss 00000001 backdoorOpen
|
||||||
00000000 l df *ABS* 00000000 cop.c
|
00000000 l df *ABS* 00000000 cop.c
|
||||||
00000000 l df *ABS* 00000000 assert.c
|
00000000 l df *ABS* 00000000 assert.c
|
||||||
200001b0 l O .bss 00000004 assert_failure_file
|
20000094 l O .bss 00000004 assert_failure_file
|
||||||
200001b4 l O .bss 00000004 assert_failure_line
|
20000098 l O .bss 00000004 assert_failure_line
|
||||||
00000000 l df *ABS* 00000000 cpu.c
|
00000000 l df *ABS* 00000000 cpu.c
|
||||||
00000000 l df *ABS* 00000000 uart.c
|
00000000 l df *ABS* 00000000 uart.c
|
||||||
00002e38 l F .text 00000020 UartReceiveByte
|
00000f58 l F .text 00000020 UartReceiveByte
|
||||||
00002e58 l F .text 00000024 UartTransmitByte
|
00000f78 l F .text 00000024 UartTransmitByte
|
||||||
200001b8 l O .bss 00000041 xcpCtoReqPacket.1577
|
2000009c l O .bss 00000041 xcpCtoReqPacket.1577
|
||||||
200001f9 l O .bss 00000001 xcpCtoRxLength.1578
|
200000dd l O .bss 00000001 xcpCtoRxLength.1578
|
||||||
200001fa l O .bss 00000001 xcpCtoRxInProgress.1579
|
200000de l O .bss 00000001 xcpCtoRxInProgress.1579
|
||||||
00000000 l df *ABS* 00000000 nvm.c
|
00000000 l df *ABS* 00000000 nvm.c
|
||||||
00000000 l df *ABS* 00000000 timer.c
|
00000000 l df *ABS* 00000000 timer.c
|
||||||
200001fc l O .bss 00000002 millisecond_counter
|
200000e0 l O .bss 00000002 millisecond_counter
|
||||||
00000000 l df *ABS* 00000000 flash.c
|
00000000 l df *ABS* 00000000 flash.c
|
||||||
00002fe4 l F .text 00000038 FlashGetSector
|
00001104 l F .text 00000038 FlashGetSector
|
||||||
0000301c l F .text 00000030 FlashGetSectorBaseAddr
|
0000113c l F .text 00000030 FlashGetSectorBaseAddr
|
||||||
0000304c l F .text 0000004e FlashWriteBlock
|
0000116c l F .text 0000004e FlashWriteBlock
|
||||||
0000309a l F .text 00000026 FlashInitBlock
|
000011ba l F .text 00000026 FlashInitBlock
|
||||||
000030c0 l F .text 00000040 FlashSwitchBlock
|
000011e0 l F .text 00000040 FlashSwitchBlock
|
||||||
00003100 l F .text 00000080 FlashAddToBlock
|
00001220 l F .text 00000080 FlashAddToBlock
|
||||||
000035ac l O .text 000000d8 flashLayout
|
000015ac l O .text 000000e4 flashLayout
|
||||||
20000200 l O .bss 00000204 bootBlockInfo
|
200000e4 l O .bss 00000204 bootBlockInfo
|
||||||
20000404 l O .bss 00000204 blockInfo
|
200002e8 l O .bss 00000204 blockInfo
|
||||||
000020b0 g F .text 00000020 UARTParityModeGet
|
00000000 l df *ABS* 00000000 hooks.c
|
||||||
00002ac4 g F .text 0000002c ComInit
|
00000000 l df *ABS* 00000000 cpulib.c
|
||||||
00003198 g F .text 00000048 FlashWrite
|
00000000 l df *ABS* 00000000 interrupt.c
|
||||||
00000b88 g F .text 0000000c SysCtlLDOGet
|
00000bfc g F .text 0000002c ComInit
|
||||||
00000b3c g F .text 00000018 SysCtlIntStatus
|
000012b8 g F .text 00000048 FlashWrite
|
||||||
00002dd8 g F .text 00000018 AssertFailure
|
00000ef8 g F .text 00000018 AssertFailure
|
||||||
00001cfc g F .text 00000034 GPIOPinTypeGPIOInput
|
00001470 g F .text 00000038 reset_handler
|
||||||
00001e34 g F .text 00000034 GPIOPinTypeSSI
|
000010a8 g F .text 0000001c TimerUpdate
|
||||||
00002a38 g F .text 00000024 UARTDMADisable
|
00000cb4 g F .text 00000010 XcpPacketTransmitted
|
||||||
00003348 g F .text 00000038 reset_handler
|
00000c28 g F .text 0000001c ComTask
|
||||||
00001158 g F .text 0000005c SysCtlGPIOAHBDisable
|
00000438 g F .text 00000006 SysCtlDelay
|
||||||
0000106c g F .text 0000002c SysCtlADCSpeedGet
|
00000c58 g F .text 0000000c ComSetConnectEntryState
|
||||||
00001bec g F .text 00000030 GPIOPortIntUnregister
|
00000bd4 g F .text 00000016 BootInit
|
||||||
00002f88 g F .text 0000001c TimerUpdate
|
00000edc g F .text 00000018 BackDoorInit
|
||||||
00002b94 g F .text 00000010 XcpPacketTransmitted
|
00000ef6 g F .text 00000002 CopService
|
||||||
000029ac g F .text 00000024 UARTIntDisable
|
000016ba g .text 00000000 _etext
|
||||||
00002af0 g F .text 0000001c ComTask
|
00000b58 g F .text 00000028 UARTSpaceAvail
|
||||||
000029f4 g F .text 00000020 UARTIntClear
|
0000109c g F .text 0000000c TimerReset
|
||||||
00000c3c g F .text 00000006 SysCtlDelay
|
00000ba8 g F .text 0000002c UARTCharPutNonBlocking
|
||||||
00000630 g F .text 00000010 FlashIntDisable
|
00000bea g F .text 00000012 BootTask
|
||||||
00002b20 g F .text 0000000c ComSetConnectEntryState
|
000013a4 g F .text 00000044 FlashWriteChecksum
|
||||||
00000fdc g F .text 00000034 SysCtlPWMClockGet
|
00000c46 g F .text 00000010 ComTransmitPacket
|
||||||
00002a9c g F .text 00000016 BootInit
|
00000400 g F .text 00000038 SysCtlPeripheralEnable
|
||||||
00000620 g F .text 00000010 FlashIntEnable
|
00000ca4 g F .text 00000010 XcpIsConnected
|
||||||
00001bb8 g F .text 00000034 GPIOPortIntRegister
|
00001078 g F .text 00000004 NvmInit
|
||||||
00002dbc g F .text 00000018 BackDoorInit
|
000012a0 g F .text 00000018 FlashInit
|
||||||
00002dd6 g F .text 00000002 CopService
|
200004ec g .bss 00000000 _ebss
|
||||||
000036ae g .text 00000000 _etext
|
|
||||||
0000091c g F .text 00000054 SysCtlPeripheralReset
|
|
||||||
00000bc4 g F .text 00000004 SysCtlSleep
|
|
||||||
00000be8 g F .text 0000000c SysCtlResetCauseGet
|
|
||||||
000013fc g F .text 00000034 IntPriorityGet
|
|
||||||
00001398 g F .text 00000024 IntPriorityGroupingGet
|
|
||||||
00001b20 g F .text 00000028 GPIOPinIntEnable
|
|
||||||
000028a8 g F .text 00000034 UARTBreakCtl
|
|
||||||
00001c3c g F .text 00000024 GPIOPinWrite
|
|
||||||
0000019c g F .text 00000006 CPUbasepriGet
|
|
||||||
000027e0 g F .text 00000028 UARTSpaceAvail
|
|
||||||
00000a58 g F .text 00000038 SysCtlPeripheralDeepSleepEnable
|
|
||||||
00001540 g F .text 00000078 IntPendSet
|
|
||||||
00002f7c g F .text 0000000c TimerReset
|
|
||||||
000028fc g F .text 00000048 UARTIntRegister
|
|
||||||
00002854 g F .text 0000002c UARTCharPutNonBlocking
|
|
||||||
00002ab2 g F .text 00000012 BootTask
|
|
||||||
00002988 g F .text 00000024 UARTIntEnable
|
|
||||||
0000327c g F .text 00000044 FlashWriteChecksum
|
|
||||||
00002b0e g F .text 00000010 ComTransmitPacket
|
|
||||||
0000234c g F .text 00000024 UARTDisableSIR
|
|
||||||
00001a7c g F .text 000000a4 GPIOPadConfigGet
|
|
||||||
000025f0 g F .text 00000078 UARTModemStatusGet
|
|
||||||
00001dcc g F .text 00000034 GPIOPinTypePWM
|
|
||||||
000009e4 g F .text 00000038 SysCtlPeripheralSleepEnable
|
|
||||||
00000970 g F .text 00000038 SysCtlPeripheralEnable
|
|
||||||
00002880 g F .text 00000028 UARTCharPut
|
|
||||||
00002370 g F .text 00000080 UARTSmartCardEnable
|
|
||||||
00001620 g F .text 00000004 IntPriorityMaskSet
|
|
||||||
00002b84 g F .text 00000010 XcpIsConnected
|
|
||||||
00002144 g F .text 00000044 UARTConfigGetExpClk
|
|
||||||
00002f58 g F .text 00000004 NvmInit
|
|
||||||
00000bb4 g F .text 00000010 SysCtlReset
|
|
||||||
00003180 g F .text 00000018 FlashInit
|
|
||||||
00001b48 g F .text 00000028 GPIOPinIntDisable
|
|
||||||
00002464 g F .text 0000008c UARTModemControlSet
|
|
||||||
20000608 g .bss 00000000 _ebss
|
|
||||||
00000b20 g F .text 00000010 SysCtlIntDisable
|
|
||||||
000007e0 g F .text 00000014 SysCtlFlashSizeGet
|
|
||||||
00000100 g *ABS* 00000000 __STACKSIZE__
|
00000100 g *ABS* 00000000 __STACKSIZE__
|
||||||
00000bf4 g F .text 00000010 SysCtlResetCauseClear
|
00001464 g F .text 0000000c UnusedISR
|
||||||
0000333c g F .text 0000000c UnusedISR
|
00000c44 g F .text 00000002 ComFree
|
||||||
00001f04 g F .text 00000034 GPIOPinTypeUSBAnalog
|
00000f9c g F .text 00000028 UartInit
|
||||||
000007cc g F .text 00000014 SysCtlSRAMSizeGet
|
00001080 g F .text 00000004 NvmErase
|
||||||
00001c1c g F .text 00000020 GPIOPinRead
|
00000b80 g F .text 00000028 UARTCharGetNonBlocking
|
||||||
00002b0c g F .text 00000002 ComFree
|
20000000 g .bss 00000000 _bss
|
||||||
00000a1c g F .text 0000003c SysCtlPeripheralSleepDisable
|
00000cc4 g F .text 000001e8 XcpPacketReceived
|
||||||
00001f6c g F .text 00000034 GPIOPinTypeEthernetLED
|
00001430 g F .text 00000034 FlashDone
|
||||||
00001834 g F .text 0000004c GPIODirModeGet
|
|
||||||
00001c60 g F .text 00000034 GPIOPinTypeADC
|
|
||||||
00002668 g F .text 00000088 UARTFlowControlSet
|
|
||||||
000010fc g F .text 0000005c SysCtlGPIOAHBEnable
|
|
||||||
00000acc g F .text 0000001c SysCtlPeripheralClockGating
|
|
||||||
000027b8 g F .text 00000028 UARTCharsAvail
|
|
||||||
00002e7c g F .text 00000028 UartInit
|
|
||||||
000007f4 g F .text 000000cc SysCtlPinPresent
|
|
||||||
000023f0 g F .text 00000074 UARTSmartCardDisable
|
|
||||||
00002f60 g F .text 00000004 NvmErase
|
|
||||||
00001d98 g F .text 00000034 GPIOPinTypeI2C
|
|
||||||
00002808 g F .text 00000028 UARTCharGetNonBlocking
|
|
||||||
000015b8 g F .text 00000068 IntPendClear
|
|
||||||
00001d64 g F .text 00000034 GPIOPinTypeGPIOOutputOD
|
|
||||||
2000011c g .bss 00000000 _bss
|
|
||||||
00002ba4 g F .text 000001e8 XcpPacketReceived
|
|
||||||
000022f8 g F .text 00000024 UARTFIFODisable
|
|
||||||
00000b94 g F .text 00000020 SysCtlLDOConfigSet
|
|
||||||
00000554 g F .text 0000003c FlashUserSet
|
|
||||||
00003308 g F .text 00000034 FlashDone
|
|
||||||
00001e00 g F .text 00000034 GPIOPinTypeQEI
|
|
||||||
00002b2c g F .text 0000000c ComSetDisconnectEntryState
|
|
||||||
000000f0 g F .text 0000004c EntryFromProg
|
000000f0 g F .text 0000004c EntryFromProg
|
||||||
00001364 g F .text 00000034 IntPriorityGroupingSet
|
000001cc g F .text 000000cc FlashProgram
|
||||||
00002b38 g F .text 0000000c ComIsConnectEntryState
|
00000c88 g F .text 0000001c XcpInit
|
||||||
00001880 g F .text 00000080 GPIOIntTypeSet
|
00001300 g F .text 000000a4 FlashErase
|
||||||
000001a4 g F .text 0000000c FlashUsecGet
|
|
||||||
000024f0 g F .text 0000008c UARTModemControlClear
|
|
||||||
0000017c g F .text 00000008 CPUcpsid
|
|
||||||
00000658 g F .text 0000000c FlashIntClear
|
|
||||||
00000192 g F .text 00000004 CPUwfi
|
|
||||||
00000bc8 g F .text 00000020 SysCtlDeepSleep
|
|
||||||
00000184 g F .text 00000006 CPUprimask
|
|
||||||
0000257c g F .text 00000074 UARTModemControlGet
|
|
||||||
0000020c g F .text 000000cc FlashProgram
|
|
||||||
00002b68 g F .text 0000001c XcpInit
|
|
||||||
00002118 g F .text 0000002c UARTFIFOLevelGet
|
|
||||||
0000049c g F .text 00000050 FlashProtectSave
|
|
||||||
000031e0 g F .text 0000009c FlashErase
|
|
||||||
00000b54 g F .text 00000034 SysCtlLDOSet
|
|
||||||
00000150 g F .text 0000002c main
|
00000150 g F .text 0000002c main
|
||||||
00000d9c g F .text 000001dc SysCtlClockGet
|
00000598 g F .text 000001dc SysCtlClockGet
|
||||||
000011d4 g F .text 000000fc SysCtlI2SMClkSet
|
00000a3c g F .text 00000038 UARTDisable
|
||||||
00001098 g F .text 0000001c SysCtlIOSCVerificationSet
|
00001088 g F .text 00000012 NvmDone
|
||||||
0000060c g F .text 00000012 FlashIntUnregister
|
00000fc4 g F .text 00000050 UartTransmitPacket
|
||||||
00002760 g F .text 00000038 UARTTxIntModeSet
|
00001084 g F .text 00000004 NvmVerifyChecksum
|
||||||
000021b8 g F .text 00000038 UARTDisable
|
00000f34 g F .text 00000020 CpuMemCopy
|
||||||
00002f68 g F .text 00000012 NvmDone
|
000010c4 g F .text 0000000c TimerSet
|
||||||
00002ea4 g F .text 00000050 UartTransmitPacket
|
00001014 g F .text 00000064 UartReceivePacket
|
||||||
00002f64 g F .text 00000004 NvmVerifyChecksum
|
20000000 g .text 00000000 _data
|
||||||
00002e14 g F .text 00000020 CpuMemCopy
|
00000ef4 g F .text 00000002 CopInit
|
||||||
00000ae8 g F .text 00000014 SysCtlIntRegister
|
00000f54 g F .text 00000004 CpuReset
|
||||||
00002fa4 g F .text 0000000c TimerSet
|
0000107c g F .text 00000004 NvmWrite
|
||||||
000011b4 g F .text 00000010 SysCtlUSBPLLEnable
|
00000f10 g F .text 00000024 CpuStartUserProgram
|
||||||
0000133c g F .text 00000028 IntUnregister
|
200005ec g .bss 00000000 _estack
|
||||||
00001c94 g F .text 00000034 GPIOPinTypeCAN
|
000013e8 g F .text 00000046 FlashVerifyChecksum
|
||||||
00000afc g F .text 00000012 SysCtlIntUnregister
|
20000000 g .text 00000000 _edata
|
||||||
00001fa0 g F .text 00000034 GPIOPinTypeEPI
|
|
||||||
00000640 g F .text 00000018 FlashIntStatus
|
|
||||||
000029d0 g F .text 00000024 UARTIntStatus
|
|
||||||
00001f38 g F .text 00000034 GPIOPinTypeI2S
|
|
||||||
000012d2 g F .text 0000000a IntMasterEnable
|
|
||||||
00002ef4 g F .text 00000064 UartReceivePacket
|
|
||||||
000012e8 g F .text 00000054 IntRegister
|
|
||||||
00002a5c g F .text 00000020 UARTRxErrorGet
|
|
||||||
00001010 g F .text 0000005c SysCtlADCSpeedSet
|
|
||||||
00000c04 g F .text 00000038 SysCtlBrownOutConfigSet
|
|
||||||
000012dc g F .text 0000000a IntMasterDisable
|
|
||||||
00001ed0 g F .text 00000034 GPIOPinTypeUSBDigital
|
|
||||||
000014b8 g F .text 00000088 IntDisable
|
|
||||||
000013bc g F .text 00000040 IntPrioritySet
|
|
||||||
00001b98 g F .text 00000020 GPIOPinIntClear
|
|
||||||
000005f8 g F .text 00000014 FlashIntRegister
|
|
||||||
20000000 g .data 00000000 _data
|
|
||||||
00002dd4 g F .text 00000002 CopInit
|
|
||||||
00002e34 g F .text 00000004 CpuReset
|
|
||||||
00002830 g F .text 00000024 UARTCharGet
|
|
||||||
000020d0 g F .text 00000048 UARTFIFOLevelSet
|
|
||||||
00002f5c g F .text 00000004 NvmWrite
|
|
||||||
000022d4 g F .text 00000024 UARTFIFOEnable
|
|
||||||
00000590 g F .text 00000068 FlashUserSave
|
|
||||||
00002df0 g F .text 00000024 CpuStartUserProgram
|
|
||||||
000010b4 g F .text 0000001c SysCtlMOSCVerificationSet
|
|
||||||
00000b10 g F .text 00000010 SysCtlIntEnable
|
|
||||||
000026f0 g F .text 00000070 UARTFlowControlGet
|
|
||||||
20000708 g .bss 00000000 _estack
|
|
||||||
00002798 g F .text 00000020 UARTTxIntModeGet
|
|
||||||
000032c0 g F .text 00000046 FlashVerifyChecksum
|
|
||||||
2000011c g .data 00000000 _edata
|
|
||||||
000001b0 g F .text 0000000c FlashUsecSet
|
|
||||||
00000000 g O .text 000000f0 _vectab
|
00000000 g O .text 000000f0 _vectab
|
||||||
000004ec g F .text 00000068 FlashUserGet
|
000009ac g F .text 00000034 GPIOPinTypeUART
|
||||||
00001624 g F .text 00000004 IntPriorityMaskGet
|
00000c64 g F .text 00000004 ComIsConnected
|
||||||
00001e68 g F .text 00000034 GPIOPinTypeTimer
|
00000838 g F .text 00000054 GPIODirModeSet
|
||||||
000010d0 g F .text 0000001c SysCtlPLLVerificationSet
|
00000eac g F .text 00000030 BackDoorCheck
|
||||||
00001e9c g F .text 00000034 GPIOPinTypeUART
|
200004ec g .bss 00000000 _stack
|
||||||
00001cc8 g F .text 00000034 GPIOPinTypeComparator
|
000010f4 g F .text 00000010 TimerGet
|
||||||
00000196 g F .text 00000006 CPUbasepriSet
|
00000a74 g F .text 000000e4 UARTConfigSetExpClk
|
||||||
00001d30 g F .text 00000034 GPIOPinTypeGPIOOutput
|
00000440 g F .text 00000158 SysCtlClockSet
|
||||||
00000f78 g F .text 00000064 SysCtlPWMClockSet
|
0000088c g F .text 00000120 GPIOPadConfigSet
|
||||||
000002d8 g F .text 0000009c FlashProtectGet
|
000010d0 g F .text 00000024 TimerInit
|
||||||
00002b44 g F .text 00000004 ComIsConnected
|
0000017c g F .text 00000050 FlashClear
|
||||||
00000b30 g F .text 0000000c SysCtlIntClear
|
00000a0c g F .text 00000030 UARTEnable
|
||||||
00001430 g F .text 00000088 IntEnable
|
|
||||||
000028dc g F .text 00000020 UARTBusy
|
|
||||||
00001fd4 g F .text 00000070 GPIOPinConfigure
|
|
||||||
000010ec g F .text 00000010 SysCtlClkVerificationClear
|
|
||||||
0000018a g F .text 00000008 CPUcpsie
|
|
||||||
000017e0 g F .text 00000054 GPIODirModeSet
|
|
||||||
00002944 g F .text 00000044 UARTIntUnregister
|
|
||||||
00002d8c g F .text 00000030 BackDoorCheck
|
|
||||||
00000a90 g F .text 0000003c SysCtlPeripheralDeepSleepDisable
|
|
||||||
20000608 g .bss 00000000 _stack
|
|
||||||
00001900 g F .text 0000005c GPIOIntTypeGet
|
|
||||||
00000374 g F .text 00000128 FlashProtectSet
|
|
||||||
00002fd4 g F .text 00000010 TimerGet
|
|
||||||
00002a7c g F .text 00000020 UARTRxErrorClear
|
|
||||||
000009a8 g F .text 0000003c SysCtlPeripheralDisable
|
|
||||||
00002a14 g F .text 00000024 UARTDMAEnable
|
|
||||||
000021f0 g F .text 000000e4 UARTConfigSetExpClk
|
|
||||||
00001b70 g F .text 00000028 GPIOPinIntStatus
|
|
||||||
000011c4 g F .text 00000010 SysCtlUSBPLLDisable
|
|
||||||
00000c44 g F .text 00000158 SysCtlClockSet
|
|
||||||
000008c0 g F .text 0000005c SysCtlPeripheralPresent
|
|
||||||
0000195c g F .text 00000120 GPIOPadConfigSet
|
|
||||||
00002fb0 g F .text 00000024 TimerInit
|
|
||||||
0000231c g F .text 00000030 UARTEnableSIR
|
|
||||||
000001bc g F .text 00000050 FlashClear
|
|
||||||
00002188 g F .text 00000030 UARTEnable
|
|
||||||
00002070 g F .text 00000040 UARTParityModeSet
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,11 +1,11 @@
|
||||||
#****************************************************************************************
|
#****************************************************************************************
|
||||||
#| Description: Makefile for STM32 using CodeSourcery GNU GCC compiler toolset
|
#| Description: Makefile for LM3S using CodeSourcery GNU GCC compiler toolset
|
||||||
#| File Name: makefile
|
#| File Name: makefile
|
||||||
#|
|
#|
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| C O P Y R I G H T
|
#| C O P Y R I G H T
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| Copyright (c) 2012 by Feaser LLC http://www.feaser.com All rights reserved
|
#| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
#|
|
#|
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| L I C E N S E
|
#| L I C E N S E
|
||||||
|
@ -128,7 +128,7 @@ CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)
|
||||||
CFLAGS += -ffunction-sections -fdata-sections $(INC_PATH) -D DEBUG -D gcc
|
CFLAGS += -ffunction-sections -fdata-sections $(INC_PATH) -D DEBUG -D gcc
|
||||||
CFLAGS += -Wa,-adhlns="$(OBJ_PATH)/$(subst .o,.lst,$@)"
|
CFLAGS += -Wa,-adhlns="$(OBJ_PATH)/$(subst .o,.lst,$@)"
|
||||||
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
|
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
|
||||||
LFLAGS += $(LIB_PATH) -Xlinker --no-gc-sections
|
LFLAGS += $(LIB_PATH) -Xlinker --gc-sections
|
||||||
OFLAGS = -O binary
|
OFLAGS = -O binary
|
||||||
ODFLAGS = -x
|
ODFLAGS = -x
|
||||||
SZFLAGS = -B -d
|
SZFLAGS = -B -d
|
||||||
|
|
Binary file not shown.
|
@ -3,51 +3,48 @@ bin/demoprog_ek_lm3s6965.elf: file format elf32-littlearm
|
||||||
bin/demoprog_ek_lm3s6965.elf
|
bin/demoprog_ek_lm3s6965.elf
|
||||||
architecture: arm, flags 0x00000112:
|
architecture: arm, flags 0x00000112:
|
||||||
EXEC_P, HAS_SYMS, D_PAGED
|
EXEC_P, HAS_SYMS, D_PAGED
|
||||||
start address 0x00004000
|
start address 0x00002000
|
||||||
|
|
||||||
Program Header:
|
Program Header:
|
||||||
LOAD off 0x00000000 vaddr 0x00000000 paddr 0x00000000 align 2**15
|
LOAD off 0x00000000 vaddr 0x00000000 paddr 0x00000000 align 2**15
|
||||||
filesz 0x00010584 memsz 0x00010584 flags r-x
|
filesz 0x00003514 memsz 0x00003514 flags r-x
|
||||||
LOAD off 0x00018000 vaddr 0x20000000 paddr 0x00010584 align 2**15
|
LOAD off 0x00008000 vaddr 0x20000000 paddr 0x20000000 align 2**15
|
||||||
filesz 0x0000011c memsz 0x00000284 flags rw-
|
filesz 0x00000000 memsz 0x0000015c flags rw-
|
||||||
private flags = 5000002: [Version5 EABI] [has entry point]
|
private flags = 5000002: [Version5 EABI] [has entry point]
|
||||||
|
|
||||||
Sections:
|
Sections:
|
||||||
Idx Name Size VMA LMA File off Algn
|
Idx Name Size VMA LMA File off Algn
|
||||||
0 .text 0000c584 00004000 00004000 00004000 2**2
|
0 .text 00001514 00002000 00002000 00002000 2**2
|
||||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||||
1 .data 0000011c 20000000 00010584 00018000 2**2
|
1 .bss 0000015c 20000000 20000000 00008000 2**2
|
||||||
CONTENTS, ALLOC, LOAD, DATA
|
|
||||||
2 .bss 00000168 2000011c 000106a0 0001811c 2**2
|
|
||||||
ALLOC
|
ALLOC
|
||||||
3 .debug_abbrev 00001afb 00000000 00000000 0001811c 2**0
|
2 .debug_abbrev 00001afb 00000000 00000000 00003514 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
4 .debug_info 00008981 00000000 00000000 00019c17 2**0
|
3 .debug_info 00008981 00000000 00000000 0000500f 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
5 .debug_line 0000565e 00000000 00000000 00022598 2**0
|
4 .debug_line 00005665 00000000 00000000 0000d990 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
6 .debug_loc 0000bd77 00000000 00000000 00027bf6 2**0
|
5 .debug_loc 0000bd77 00000000 00000000 00012ff5 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
7 .debug_pubnames 0000305b 00000000 00000000 0003396d 2**0
|
6 .debug_pubnames 0000305b 00000000 00000000 0001ed6c 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
8 .debug_pubtypes 00000326 00000000 00000000 000369c8 2**0
|
7 .debug_pubtypes 00000326 00000000 00000000 00021dc7 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
9 .debug_aranges 00001440 00000000 00000000 00036cee 2**0
|
8 .debug_aranges 00001440 00000000 00000000 000220ed 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
10 .debug_ranges 00001270 00000000 00000000 0003812e 2**0
|
9 .debug_ranges 00001270 00000000 00000000 0002352d 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
11 .debug_str 00003310 00000000 00000000 0003939e 2**0
|
10 .debug_str 00003310 00000000 00000000 0002479d 2**0
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
12 .comment 0000002a 00000000 00000000 0003c6ae 2**0
|
11 .comment 0000002a 00000000 00000000 00027aad 2**0
|
||||||
CONTENTS, READONLY
|
CONTENTS, READONLY
|
||||||
13 .ARM.attributes 00000031 00000000 00000000 0003c6d8 2**0
|
12 .ARM.attributes 00000031 00000000 00000000 00027ad7 2**0
|
||||||
CONTENTS, READONLY
|
CONTENTS, READONLY
|
||||||
14 .debug_frame 00003904 00000000 00000000 0003c70c 2**2
|
13 .debug_frame 00003908 00000000 00000000 00027b08 2**2
|
||||||
CONTENTS, READONLY, DEBUGGING
|
CONTENTS, READONLY, DEBUGGING
|
||||||
SYMBOL TABLE:
|
SYMBOL TABLE:
|
||||||
00004000 l d .text 00000000 .text
|
00002000 l d .text 00000000 .text
|
||||||
20000000 l d .data 00000000 .data
|
20000000 l d .bss 00000000 .bss
|
||||||
2000011c l d .bss 00000000 .bss
|
|
||||||
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
||||||
00000000 l d .debug_info 00000000 .debug_info
|
00000000 l d .debug_info 00000000 .debug_info
|
||||||
00000000 l d .debug_line 00000000 .debug_line
|
00000000 l d .debug_line 00000000 .debug_line
|
||||||
|
@ -62,626 +59,90 @@ SYMBOL TABLE:
|
||||||
00000000 l d .debug_frame 00000000 .debug_frame
|
00000000 l d .debug_frame 00000000 .debug_frame
|
||||||
00000000 l df *ABS* 00000000 vectors.c
|
00000000 l df *ABS* 00000000 vectors.c
|
||||||
00000000 l df *ABS* 00000000 boot.c
|
00000000 l df *ABS* 00000000 boot.c
|
||||||
000040f4 l F .text 0000001e UartReceiveByte
|
000020f4 l F .text 00000024 UartReceiveByte
|
||||||
2000011c l O .bss 00000001 xcpCtoRxInProgress.1651
|
20000000 l O .bss 00000001 xcpCtoRxInProgress.1651
|
||||||
2000011d l O .bss 00000001 xcpCtoRxLength.1650
|
20000001 l O .bss 00000001 xcpCtoRxLength.1650
|
||||||
20000120 l O .bss 00000041 xcpCtoReqPacket.1649
|
20000004 l O .bss 00000041 xcpCtoReqPacket.1649
|
||||||
00000000 l df *ABS* 00000000 cstart.c
|
00000000 l df *ABS* 00000000 cstart.c
|
||||||
0000424e l F .text 00000000 zero_loop
|
00002276 l F .text 00000000 zero_loop
|
||||||
00000000 l df *ABS* 00000000 irq.c
|
00000000 l df *ABS* 00000000 irq.c
|
||||||
20000164 l O .bss 00000001 interruptNesting
|
|
||||||
00000000 l df *ABS* 00000000 led.c
|
00000000 l df *ABS* 00000000 led.c
|
||||||
20000168 l O .bss 00000004 timer_counter_last.1643
|
20000048 l O .bss 00000004 timer_counter_last.1643
|
||||||
2000016c l O .bss 00000001 led_toggle_state.1642
|
2000004c l O .bss 00000001 led_toggle_state.1642
|
||||||
00000000 l df *ABS* 00000000 main.c
|
00000000 l df *ABS* 00000000 main.c
|
||||||
20000170 l O .bss 00000004 assert_failure_file.1649
|
20000050 l O .bss 00000004 assert_failure_file.1649
|
||||||
20000174 l O .bss 00000004 assert_failure_line.1650
|
20000054 l O .bss 00000004 assert_failure_line.1650
|
||||||
00000000 l df *ABS* 00000000 time.c
|
00000000 l df *ABS* 00000000 time.c
|
||||||
20000178 l O .bss 00000004 millisecond_counter
|
20000058 l O .bss 00000004 millisecond_counter
|
||||||
00000000 l df *ABS* 00000000 adc.c
|
|
||||||
2000017c l O .bss 00000003 g_pucOversampleFactor
|
|
||||||
00000000 l df *ABS* 00000000 comp.c
|
|
||||||
00000000 l df *ABS* 00000000 cpu.c
|
00000000 l df *ABS* 00000000 cpu.c
|
||||||
|
00000000 l df *ABS* 00000000 gpio.c
|
||||||
|
00002474 l F .text 00000188 GPIOBaseValid
|
||||||
|
00000000 l df *ABS* 00000000 interrupt.c
|
||||||
|
00000000 l df *ABS* 00000000 sysctl.c
|
||||||
|
000028d4 l F .text 0000039c SysCtlPeripheralValid
|
||||||
|
00003464 l O .text 0000005c g_pulXtals
|
||||||
|
000034d8 l O .text 0000000c g_pulRCGCRegs
|
||||||
|
00000000 l df *ABS* 00000000 systick.c
|
||||||
|
00000000 l df *ABS* 00000000 uart.c
|
||||||
|
00003200 l F .text 0000003c UARTBaseValid
|
||||||
|
00000000 l df *ABS* 00000000 adc.c
|
||||||
|
00000000 l df *ABS* 00000000 comp.c
|
||||||
00000000 l df *ABS* 00000000 epi.c
|
00000000 l df *ABS* 00000000 epi.c
|
||||||
00000000 l df *ABS* 00000000 ethernet.c
|
00000000 l df *ABS* 00000000 ethernet.c
|
||||||
00005c4c l F .text 000000b6 EthernetPacketGetInternal
|
|
||||||
00005d04 l F .text 00000094 EthernetPacketPutInternal
|
|
||||||
00000000 l df *ABS* 00000000 flash.c
|
00000000 l df *ABS* 00000000 flash.c
|
||||||
00010290 l O .text 00000010 g_pulFMPPERegs
|
|
||||||
000102b8 l O .text 00000010 g_pulFMPRERegs
|
|
||||||
00000000 l df *ABS* 00000000 gpio.c
|
|
||||||
00006a5c l F .text 00000188 GPIOBaseValid
|
|
||||||
00006be4 l F .text 00000172 GPIOGetIntNumber
|
|
||||||
000102e0 l O .text 00000048 g_pulGPIOBaseAddrs
|
|
||||||
00000000 l df *ABS* 00000000 hibernate.c
|
00000000 l df *ABS* 00000000 hibernate.c
|
||||||
20000180 l O .bss 00000004 g_ulWriteDelay
|
|
||||||
00000000 l df *ABS* 00000000 i2c.c
|
00000000 l df *ABS* 00000000 i2c.c
|
||||||
00000000 l df *ABS* 00000000 i2s.c
|
00000000 l df *ABS* 00000000 i2s.c
|
||||||
00000000 l df *ABS* 00000000 interrupt.c
|
|
||||||
00008af4 l F .text 00000002 IntDefaultHandler
|
|
||||||
20000000 l O .data 0000011c g_pfnRAMVectors
|
|
||||||
00010388 l O .text 00000020 g_pulPriority
|
|
||||||
000103a8 l O .text 00000048 g_pulRegs
|
|
||||||
00000000 l df *ABS* 00000000 mpu.c
|
00000000 l df *ABS* 00000000 mpu.c
|
||||||
00000000 l df *ABS* 00000000 pwm.c
|
00000000 l df *ABS* 00000000 pwm.c
|
||||||
000090fc l F .text 0000002e PWMGenValid
|
|
||||||
0000912c l F .text 0000005c PWMOutValid
|
|
||||||
00000000 l df *ABS* 00000000 qei.c
|
00000000 l df *ABS* 00000000 qei.c
|
||||||
00000000 l df *ABS* 00000000 ssi.c
|
00000000 l df *ABS* 00000000 ssi.c
|
||||||
00000000 l df *ABS* 00000000 sysctl.c
|
|
||||||
0000a86c l F .text 0000039c SysCtlPeripheralValid
|
|
||||||
00010440 l O .text 00000010 g_pulDCRegs
|
|
||||||
00010450 l O .text 0000005c g_pulXtals
|
|
||||||
000104c4 l O .text 0000000c g_pulRCGCRegs
|
|
||||||
000104d0 l O .text 0000000c g_pulSCGCRegs
|
|
||||||
000104dc l O .text 0000000c g_pulSRCRRegs
|
|
||||||
000104e8 l O .text 0000000c g_pulDCGCRegs
|
|
||||||
00000000 l df *ABS* 00000000 systick.c
|
|
||||||
00000000 l df *ABS* 00000000 timer.c
|
00000000 l df *ABS* 00000000 timer.c
|
||||||
0000bc1c l F .text 0000004e TimerBaseValid
|
|
||||||
00000000 l df *ABS* 00000000 uart.c
|
|
||||||
0000c608 l F .text 0000003c UARTBaseValid
|
|
||||||
00000000 l df *ABS* 00000000 udma.c
|
00000000 l df *ABS* 00000000 udma.c
|
||||||
00000000 l df *ABS* 00000000 usb.c
|
00000000 l df *ABS* 00000000 usb.c
|
||||||
0000d994 l F .text 00000066 USBIndexRead
|
|
||||||
0000d9fc l F .text 00000072 USBIndexWrite
|
|
||||||
00000000 l df *ABS* 00000000 watchdog.c
|
00000000 l df *ABS* 00000000 watchdog.c
|
||||||
0000ed50 g F .text 0000012e USBFIFOConfigGet
|
000023c0 g F .text 00000016 __error__
|
||||||
0000c6a8 g F .text 00000022 UARTParityModeGet
|
00002230 g F .text 0000005c reset_handler
|
||||||
00007fec g F .text 0000004e I2CMasterIntStatus
|
00002cb8 g F .text 00000006 SysCtlDelay
|
||||||
0000b0f8 g F .text 0000000c SysCtlLDOGet
|
00002298 g F .text 0000000e IrqInterruptEnable
|
||||||
0000feac g F .text 0000003a WatchdogResetEnable
|
000023f0 g F .text 0000000c TimeSet
|
||||||
0000437c g F .text 00000016 __error__
|
00003514 g .text 00000000 _etext
|
||||||
0000eec8 g F .text 000000f6 USBEndpointDataAvail
|
000027ec g F .text 00000030 GPIOPinWrite
|
||||||
0000b080 g F .text 0000001a SysCtlIntStatus
|
00002c70 g F .text 00000048 SysCtlPeripheralEnable
|
||||||
00007d6c g F .text 0000004a I2CSlaveDisable
|
2000005c g .bss 00000000 _ebss
|
||||||
00004f88 g F .text 00000074 ADCComparatorReset
|
00003194 g F .text 00000012 SysTickDisable
|
||||||
0000db0c g F .text 00000044 USBHostSpeedGet
|
|
||||||
00007360 g F .text 0000003a GPIOPinTypeGPIOInput
|
|
||||||
000074c8 g F .text 0000003a GPIOPinTypeSSI
|
|
||||||
0000d2b8 g F .text 00000026 UARTDMADisable
|
|
||||||
0000518c g F .text 0000003e ADCReferenceGet
|
|
||||||
0000d440 g F .text 0000000c uDMAControlAlternateBaseGet
|
|
||||||
00009818 g F .text 00000064 PWMGenIntTrigDisable
|
|
||||||
0000d654 g F .text 00000140 uDMAChannelTransferSet
|
|
||||||
00004208 g F .text 00000056 reset_handler
|
|
||||||
0000de5c g F .text 0000003c USBIntEnableEndpoint
|
|
||||||
0000b94c g F .text 000000b2 SysCtlGPIOAHBDisable
|
|
||||||
0000a710 g F .text 00000046 SSIDataGet
|
|
||||||
0000b7d8 g F .text 00000032 SysCtlADCSpeedGet
|
|
||||||
00005b40 g F .text 00000030 EPIIntStatus
|
|
||||||
00009308 g F .text 00000044 PWMGenDisable
|
|
||||||
00007234 g F .text 0000002e GPIOPortIntUnregister
|
|
||||||
00009a38 g F .text 000000a4 PWMGenFaultConfigure
|
|
||||||
0000ddbc g F .text 00000062 USBIntStatusControl
|
|
||||||
0000d5fc g F .text 00000058 uDMAChannelControlSet
|
|
||||||
0000e480 g F .text 00000120 USBDevEndpointStall
|
|
||||||
0000eea4 g F .text 00000024 USBEndpointDMADisable
|
|
||||||
0000d854 g F .text 0000005e uDMAChannelSizeGet
|
|
||||||
0000def8 g F .text 00000030 USBIntUnregister
|
|
||||||
000099fc g F .text 0000003c PWMFaultIntClearExt
|
|
||||||
000056ac g F .text 00000072 EPIConfigGPModeSet
|
|
||||||
0000e398 g F .text 000000e8 USBEndpointDataToggleClear
|
|
||||||
0000fb84 g F .text 00000036 USBHostPwrFaultDisable
|
|
||||||
0000a578 g F .text 00000042 SSIIntDisable
|
|
||||||
0000d220 g F .text 00000026 UARTIntDisable
|
|
||||||
0000d270 g F .text 00000020 UARTIntClear
|
|
||||||
0000a408 g F .text 00000040 SSIEnable
|
|
||||||
00009e7c g F .text 0000004a QEIConfigure
|
|
||||||
000085cc g F .text 0000003a I2STxFIFOLimitSet
|
|
||||||
00007cd4 g F .text 00000058 I2CSlaveInit
|
|
||||||
0000b1c8 g F .text 00000006 SysCtlDelay
|
|
||||||
00009f40 g F .text 00000048 QEIDirectionGet
|
|
||||||
00007a04 g F .text 0000008c HibernateDataSet
|
|
||||||
00006a20 g F .text 00000012 FlashIntDisable
|
|
||||||
0000426c g F .text 00000008 IrqInterruptEnable
|
|
||||||
0000d390 g F .text 0000002c uDMAChannelDisable
|
|
||||||
00007c88 g F .text 0000004a I2CSlaveEnable
|
|
||||||
00009bcc g F .text 00000082 PWMGenFaultTriggerGet
|
|
||||||
00004914 g F .text 0000005c ADCSequenceOverflow
|
|
||||||
0000803c g F .text 0000004e I2CSlaveIntStatus
|
|
||||||
00005fcc g F .text 0000002c EthernetPacketAvail
|
|
||||||
00009f88 g F .text 0000003e QEIErrorGet
|
|
||||||
0000c540 g F .text 00000026 TimerIntDisable
|
|
||||||
0000bfe0 g F .text 00000080 TimerControlWaitOnTrigger
|
|
||||||
0000b708 g F .text 00000046 SysCtlPWMClockGet
|
|
||||||
0000d354 g F .text 00000010 uDMAErrorStatusClear
|
|
||||||
00007a90 g F .text 0000004c HibernateDataGet
|
|
||||||
00008ff0 g F .text 00000068 MPURegionSet
|
|
||||||
0000862c g F .text 00000024 I2STxFIFOLevelGet
|
|
||||||
00006a0c g F .text 00000012 FlashIntEnable
|
|
||||||
00007200 g F .text 00000032 GPIOPortIntRegister
|
|
||||||
0000f700 g F .text 0000002a USBHostRequestStatus
|
|
||||||
00007860 g F .text 0000003c HibernateLowBatSet
|
|
||||||
0000808c g F .text 0000007a I2CSlaveIntStatusEx
|
|
||||||
0000d794 g F .text 000000c0 uDMAChannelScatterGatherSet
|
|
||||||
0000a7e8 g F .text 00000042 SSIDMADisable
|
|
||||||
0000a2b0 g F .text 00000158 SSIConfigSetExpClk
|
|
||||||
0000a6a4 g F .text 0000006a SSIDataPutNonBlocking
|
|
||||||
0000bf70 g F .text 0000006e TimerControlStall
|
|
||||||
000086ec g F .text 0000003a I2SRxDataGetNonBlocking
|
|
||||||
0000d44c g F .text 0000002c uDMAChannelRequest
|
|
||||||
0000530c g F .text 0000005a ComparatorIntRegister
|
|
||||||
000096fc g F .text 00000052 PWMGenIntUnregister
|
|
||||||
00010018 g F .text 00000034 WatchdogReloadGet
|
|
||||||
000099a8 g F .text 00000028 PWMFaultIntClear
|
|
||||||
000043a0 g F .text 0000000c TimeSet
|
|
||||||
00009188 g F .text 0000006c PWMGenConfigure
|
|
||||||
0000987c g F .text 00000048 PWMGenIntStatus
|
|
||||||
00005514 g F .text 0000004c EPIModeSet
|
|
||||||
00008514 g F .text 0000002c I2STxDataPut
|
|
||||||
00010584 g .text 00000000 _etext
|
|
||||||
000087a8 g F .text 0000003c I2SRxFIFOLimitSet
|
|
||||||
0000ae20 g F .text 00000064 SysCtlPeripheralReset
|
|
||||||
000058b4 g F .text 00000024 EPINonBlockingReadAvail
|
|
||||||
00009784 g F .text 00000030 PWMFaultIntUnregister
|
|
||||||
0000b13c g F .text 00000008 SysCtlSleep
|
|
||||||
0000b164 g F .text 0000000c SysCtlResetCauseGet
|
|
||||||
00008c88 g F .text 0000003e IntPriorityGet
|
|
||||||
0000c5b0 g F .text 00000056 TimerQuiesce
|
|
||||||
0000d504 g F .text 0000008c uDMAChannelAttributeDisable
|
|
||||||
00008c00 g F .text 00000038 IntPriorityGroupingGet
|
|
||||||
00008148 g F .text 0000003e I2CSlaveIntClear
|
|
||||||
000084b0 g F .text 00000034 I2STxEnable
|
|
||||||
00008a7c g F .text 00000046 I2SIntRegister
|
|
||||||
00007158 g F .text 0000002a GPIOPinIntEnable
|
|
||||||
0000d108 g F .text 00000038 UARTBreakCtl
|
|
||||||
0000ffe0 g F .text 00000036 WatchdogReloadSet
|
|
||||||
00007288 g F .text 00000024 GPIOPinWrite
|
|
||||||
00005720 g F .text 0000003a EPIAddressMapSet
|
|
||||||
0000a82c g F .text 0000003e SSIBusy
|
|
||||||
00008a3c g F .text 00000040 I2SIntClear
|
|
||||||
00004b04 g F .text 00000068 ADCProcessorTrigger
|
|
||||||
0000d590 g F .text 0000006a uDMAChannelAttributeGet
|
|
||||||
0000f90c g F .text 000000f0 USBHostHubAddrSet
|
|
||||||
00007b48 g F .text 00000016 HibernateIntRegister
|
|
||||||
0000f9fc g F .text 000000f0 USBHostHubAddrGet
|
|
||||||
0000bf08 g F .text 00000068 TimerControlEvent
|
|
||||||
0000fe20 g F .text 0000000a USBPHYPowerOff
|
|
||||||
00007b60 g F .text 00000014 HibernateIntUnregister
|
|
||||||
0000550c g F .text 00000006 CPUbasepriGet
|
|
||||||
00008f64 g F .text 00000012 MPUDisable
|
|
||||||
0000446c g F .text 0000006e ADCIntUnregister
|
|
||||||
0000d038 g F .text 00000028 UARTSpaceAvail
|
|
||||||
00005588 g F .text 0000004a EPIConfigSDRAMSet
|
|
||||||
0000934c g F .text 00000070 PWMPulseWidthSet
|
|
||||||
0000af7c g F .text 0000003c SysCtlPeripheralDeepSleepEnable
|
|
||||||
00008e18 g F .text 00000092 IntPendSet
|
|
||||||
000061b0 g F .text 00000046 EthernetIntRegister
|
|
||||||
000055d4 g F .text 0000006c EPIConfigHB8Set
|
|
||||||
0000d164 g F .text 0000004c UARTIntRegister
|
|
||||||
000078ac g F .text 00000044 HibernateRTCSet
|
|
||||||
0000d0b4 g F .text 0000002c UARTCharPutNonBlocking
|
|
||||||
0000da70 g F .text 0000002a USBHostSuspend
|
|
||||||
0000fe70 g F .text 0000003a WatchdogEnable
|
|
||||||
0000a1ec g F .text 00000042 QEIIntDisable
|
|
||||||
0000bb74 g F .text 0000001e SysTickIntRegister
|
|
||||||
0000772c g F .text 00000010 HibernateWriteComplete
|
|
||||||
00009554 g F .text 0000004a PWMOutputState
|
|
||||||
00007fa8 g F .text 00000042 I2CSlaveIntDisableEx
|
|
||||||
00004ffc g F .text 0000005e ADCComparatorIntDisable
|
|
||||||
0000d1f8 g F .text 00000026 UARTIntEnable
|
|
||||||
00004624 g F .text 00000058 ADCIntClear
|
|
||||||
00004a7c g F .text 00000086 ADCSequenceDataGet
|
|
||||||
00007d2c g F .text 00000040 I2CMasterDisable
|
|
||||||
0000d8b4 g F .text 00000066 uDMAChannelModeGet
|
|
||||||
0000efc0 g F .text 0000012c USBEndpointDataGet
|
|
||||||
000101f4 g F .text 0000003e WatchdogStallDisable
|
|
||||||
00005d98 g F .text 00000036 EthernetInitExpClk
|
|
||||||
0000c9d4 g F .text 00000024 UARTDisableSIR
|
|
||||||
0000d91c g F .text 00000012 uDMAChannelSelectSecondary
|
|
||||||
00007090 g F .text 000000c8 GPIOPadConfigGet
|
|
||||||
00007940 g F .text 0000000c HibernateRTCMatch0Get
|
|
||||||
0000a1a8 g F .text 00000042 QEIIntEnable
|
|
||||||
000101b4 g F .text 0000003e WatchdogStallEnable
|
|
||||||
0000cd8c g F .text 000000ac UARTModemStatusGet
|
|
||||||
0000d338 g F .text 00000010 uDMADisable
|
|
||||||
000088a4 g F .text 0000008c I2STxRxConfigSet
|
|
||||||
000052c4 g F .text 00000046 ComparatorValueGet
|
|
||||||
00007450 g F .text 0000003a GPIOPinTypePWM
|
|
||||||
00005408 g F .text 00000048 ComparatorIntDisable
|
|
||||||
000093bc g F .text 0000005a PWMPulseWidthGet
|
|
||||||
0000a4e0 g F .text 00000054 SSIIntUnregister
|
|
||||||
0000bcc8 g F .text 0000005a TimerDisable
|
|
||||||
0000467c g F .text 0000005c ADCSequenceEnable
|
|
||||||
0000608c g F .text 0000005e EthernetPacketGet
|
|
||||||
00008930 g F .text 0000004c I2SMasterClockSelect
|
|
||||||
0000af00 g F .text 0000003c SysCtlPeripheralSleepEnable
|
|
||||||
00008688 g F .text 0000002e I2SRxDisable
|
|
||||||
00006150 g F .text 0000005e EthernetPacketPut
|
|
||||||
00005640 g F .text 0000006c EPIConfigHB16Set
|
|
||||||
000081c4 g F .text 00000058 I2CMasterSlaveAddrSet
|
|
||||||
0000832c g F .text 00000056 I2CMasterErr
|
|
||||||
0000ae84 g F .text 0000003c SysCtlPeripheralEnable
|
|
||||||
0000d0e0 g F .text 00000028 UARTCharPut
|
|
||||||
0000fc24 g F .text 00000026 USBFrameNumberGet
|
|
||||||
00009494 g F .text 00000048 PWMDeadBandDisable
|
|
||||||
0000be28 g F .text 0000006e TimerControlLevel
|
|
||||||
0000c9f8 g F .text 000000b2 UARTSmartCardEnable
|
|
||||||
0001017c g F .text 00000038 WatchdogIntClear
|
|
||||||
00009cf0 g F .text 0000010c PWMGenFaultClear
|
|
||||||
00008f28 g F .text 00000008 IntPriorityMaskSet
|
|
||||||
0000fc98 g F .text 0000002a USBModeGet
|
|
||||||
000057cc g F .text 0000005a EPINonBlockingReadStart
|
|
||||||
00008f38 g F .text 0000002a MPUEnable
|
|
||||||
00005954 g F .text 0000007a EPINonBlockingReadGet16
|
|
||||||
00008874 g F .text 0000002e I2STxRxDisable
|
|
||||||
0000d3bc g F .text 00000034 uDMAChannelIsEnabled
|
|
||||||
00009278 g F .text 0000004c PWMGenPeriodGet
|
|
||||||
0000c770 g F .text 0000004a UARTConfigGetExpClk
|
|
||||||
00004738 g F .text 000000c0 ADCSequenceConfigure
|
|
||||||
00007f28 g F .text 0000003e I2CMasterIntDisable
|
|
||||||
0000bc6c g F .text 0000005a TimerEnable
|
|
||||||
0000b128 g F .text 00000014 SysCtlReset
|
|
||||||
000083fc g F .text 0000003a I2CSlaveStatus
|
|
||||||
00005870 g F .text 00000042 EPINonBlockingReadCount
|
|
||||||
0000fe2c g F .text 0000000a USBPHYPowerOn
|
|
||||||
000077bc g F .text 0000003a HibernateClockSelect
|
|
||||||
0000c0a8 g F .text 00000070 TimerPrescaleSet
|
|
||||||
00008188 g F .text 0000003c I2CSlaveIntClearEx
|
|
||||||
00004970 g F .text 00000058 ADCSequenceOverflowClear
|
|
||||||
00004ef0 g F .text 00000098 ADCComparatorRegionSet
|
|
||||||
00007184 g F .text 0000002a GPIOPinIntDisable
|
|
||||||
000063b0 g F .text 00000020 EthernetPHYPowerOff
|
|
||||||
0000cb54 g F .text 000000c6 UARTModemControlSet
|
|
||||||
0000dd50 g F .text 0000006a USBIntEnableControl
|
|
||||||
0000ff24 g F .text 0000003a WatchdogLock
|
|
||||||
20000184 g .bss 00000000 _ebss
|
|
||||||
0000bb60 g F .text 00000012 SysTickDisable
|
|
||||||
000059d0 g F .text 00000078 EPINonBlockingReadGet8
|
|
||||||
00009f04 g F .text 0000003c QEIPositionSet
|
|
||||||
00008438 g F .text 0000003c I2CSlaveDataPut
|
|
||||||
0000505c g F .text 0000005c ADCComparatorIntEnable
|
|
||||||
0000bc00 g F .text 00000010 SysTickPeriodGet
|
|
||||||
0000f72c g F .text 000000f0 USBHostAddrSet
|
|
||||||
0000b060 g F .text 00000012 SysCtlIntDisable
|
|
||||||
0000d478 g F .text 0000008c uDMAChannelAttributeEnable
|
|
||||||
0000ac20 g F .text 00000016 SysCtlFlashSizeGet
|
|
||||||
00005ab8 g F .text 00000044 EPIIntEnable
|
|
||||||
00008fbc g F .text 00000034 MPURegionDisable
|
|
||||||
00007ea4 g F .text 00000040 I2CSlaveIntEnable
|
|
||||||
00000100 g *ABS* 00000000 __STACKSIZE__
|
00000100 g *ABS* 00000000 __STACKSIZE__
|
||||||
00010140 g F .text 0000003c WatchdogIntStatus
|
00002468 g F .text 00000002 UnusedISR
|
||||||
0000b170 g F .text 00000012 SysCtlResetCauseClear
|
000022a8 g F .text 00000042 LedInit
|
||||||
000043f8 g F .text 00000002 UnusedISR
|
00002454 g F .text 00000012 TimeISRHandler
|
||||||
00006028 g F .text 00000064 EthernetPacketGetNonBlocking
|
00003414 g F .text 00000036 UARTCharGetNonBlocking
|
||||||
000075b8 g F .text 0000003a GPIOPinTypeUSBAnalog
|
20000000 g .bss 00000000 _bss
|
||||||
00004e98 g F .text 00000058 ADCComparatorConfigure
|
000031bc g F .text 00000012 SysTickIntDisable
|
||||||
0000ac08 g F .text 00000018 SysCtlSRAMSizeGet
|
000031d0 g F .text 0000002e SysTickPeriodSet
|
||||||
000042b4 g F .text 00000030 LedInit
|
0000236c g F .text 00000052 main
|
||||||
00007264 g F .text 00000022 GPIOPinRead
|
00002e9c g F .text 000002e2 SysCtlClockGet
|
||||||
0000a048 g F .text 00000076 QEIVelocityConfigure
|
00003278 g F .text 00000044 UARTDisable
|
||||||
00010080 g F .text 00000044 WatchdogIntRegister
|
00002118 g F .text 0000005c BootComInit
|
||||||
0000dc54 g F .text 00000092 USBIntEnable
|
000028c4 g F .text 00000010 IntMasterEnable
|
||||||
0000c28c g F .text 0000004a TimerLoadGet
|
000023fc g F .text 0000004a TimeInit
|
||||||
0000c380 g F .text 0000004a TimerMatchGet
|
000023d8 g F .text 00000018 TimeDeinit
|
||||||
000078fc g F .text 00000044 HibernateRTCMatch0Set
|
20000000 g .text 00000000 _data
|
||||||
0000af3c g F .text 0000003e SysCtlPeripheralSleepDisable
|
000022ec g F .text 00000080 LedToggle
|
||||||
000043e4 g F .text 00000012 TimeISRHandler
|
2000015c g .bss 00000000 _estack
|
||||||
00007630 g F .text 0000003a GPIOPinTypeEthernetLED
|
20000000 g .text 00000000 _edata
|
||||||
00006db8 g F .text 00000058 GPIODirModeGet
|
00002000 g O .text 000000f4 _vectab
|
||||||
000072ac g F .text 0000003a GPIOPinTypeADC
|
00002870 g F .text 00000052 GPIOPinTypeUART
|
||||||
0000fc4c g F .text 00000040 USBOTGSessionRequest
|
0000281c g F .text 00000052 GPIOPinTypeGPIOOutput
|
||||||
0000c1dc g F .text 00000054 TimerPrescaleMatchGet
|
00002174 g F .text 000000bc BootComCheckActivationRequest
|
||||||
000058d8 g F .text 0000007a EPINonBlockingReadGet32
|
00002448 g F .text 0000000c TimeGet
|
||||||
00005ee4 g F .text 0000005e EthernetMACAddrGet
|
0000246c g F .text 00000008 CPUcpsie
|
||||||
00007f68 g F .text 00000040 I2CSlaveIntDisable
|
000025fc g F .text 00000070 GPIODirModeSet
|
||||||
0000ce38 g F .text 000000c2 UARTFlowControlSet
|
2000005c g .bss 00000000 _stack
|
||||||
00007af0 g F .text 0000002a HibernateIntEnable
|
00003180 g F .text 00000012 SysTickEnable
|
||||||
0000b89c g F .text 000000b0 SysCtlGPIOAHBEnable
|
000031a8 g F .text 00000012 SysTickIntEnable
|
||||||
0000bc10 g F .text 0000000c SysTickValueGet
|
000032bc g F .text 00000158 UARTConfigSetExpClk
|
||||||
00004a24 g F .text 00000058 ADCSequenceUnderflowClear
|
00002cc0 g F .text 000001da SysCtlClockSet
|
||||||
0000aff8 g F .text 00000026 SysCtlPeripheralClockGating
|
0000266c g F .text 00000180 GPIOPadConfigSet
|
||||||
0000a488 g F .text 00000058 SSIIntRegister
|
0000323c g F .text 0000003c UARTEnable
|
||||||
00010104 g F .text 0000003a WatchdogIntEnable
|
|
||||||
00007990 g F .text 0000000c HibernateRTCMatch1Get
|
|
||||||
0000d010 g F .text 00000028 UARTCharsAvail
|
|
||||||
00006228 g F .text 00000042 EthernetIntEnable
|
|
||||||
000078f0 g F .text 0000000c HibernateRTCGet
|
|
||||||
0000ac38 g F .text 00000188 SysCtlPinPresent
|
|
||||||
0000caac g F .text 000000a6 UARTSmartCardDisable
|
|
||||||
00007850 g F .text 00000010 HibernateWakeGet
|
|
||||||
0000c324 g F .text 0000005c TimerMatchSet
|
|
||||||
00008608 g F .text 00000024 I2STxFIFOLimitGet
|
|
||||||
0000c084 g F .text 00000024 TimerRTCDisable
|
|
||||||
000077f8 g F .text 00000012 HibernateRTCEnable
|
|
||||||
00007414 g F .text 0000003a GPIOPinTypeI2C
|
|
||||||
0000575c g F .text 0000006e EPINonBlockingReadConfigure
|
|
||||||
00004298 g F .text 0000001c IrqInterruptRestore
|
|
||||||
00008108 g F .text 00000040 I2CMasterIntClear
|
|
||||||
0000c518 g F .text 00000026 TimerIntEnable
|
|
||||||
0000d060 g F .text 0000002a UARTCharGetNonBlocking
|
|
||||||
00009c50 g F .text 0000009e PWMGenFaultStatus
|
|
||||||
00008eac g F .text 0000007c IntPendClear
|
|
||||||
0000a63c g F .text 00000066 SSIDataPut
|
|
||||||
000073d8 g F .text 0000003a GPIOPinTypeGPIOOutputOD
|
|
||||||
00005b70 g F .text 00000026 EPIIntErrorStatus
|
|
||||||
2000011c g .bss 00000000 _bss
|
|
||||||
0000c118 g F .text 00000054 TimerPrescaleGet
|
|
||||||
000050b8 g F .text 0000003a ADCComparatorIntStatus
|
|
||||||
00008474 g F .text 0000003a I2CSlaveDataGet
|
|
||||||
0000e754 g F .text 00000024 USBDevAddrGet
|
|
||||||
00007adc g F .text 00000012 HibernateRequest
|
|
||||||
0000f3f0 g F .text 000000fe USBEndpointDataSend
|
|
||||||
000044dc g F .text 0000005e ADCIntDisable
|
|
||||||
0000c97c g F .text 00000024 UARTFIFODisable
|
|
||||||
0000b104 g F .text 00000024 SysCtlLDOConfigSet
|
|
||||||
00008f78 g F .text 00000010 MPURegionCountGet
|
|
||||||
0000fbbc g F .text 00000030 USBHostPwrEnable
|
|
||||||
00007b98 g F .text 0000002a HibernateIntClear
|
|
||||||
000068e8 g F .text 00000052 FlashUserSet
|
|
||||||
0000dbc0 g F .text 00000092 USBIntDisable
|
|
||||||
0000dec4 g F .text 00000034 USBIntRegister
|
|
||||||
00005b98 g F .text 0000003c EPIIntErrorClear
|
|
||||||
0000748c g F .text 0000003a GPIOPinTypeQEI
|
|
||||||
0000bbc4 g F .text 00000012 SysTickIntDisable
|
|
||||||
00008ac4 g F .text 00000030 I2SIntUnregister
|
|
||||||
0000829c g F .text 00000090 I2CMasterControl
|
|
||||||
000047f8 g F .text 0000011c ADCSequenceStepConfigure
|
|
||||||
00009518 g F .text 0000003c PWMSyncTimeBase
|
|
||||||
00009ec8 g F .text 0000003a QEIPositionGet
|
|
||||||
0000a5bc g F .text 00000042 SSIIntStatus
|
|
||||||
00008bc8 g F .text 00000038 IntPriorityGroupingSet
|
|
||||||
00005368 g F .text 00000058 ComparatorIntUnregister
|
|
||||||
0000453c g F .text 0000005e ADCIntEnable
|
|
||||||
0000bbd8 g F .text 00000028 SysTickPeriodSet
|
|
||||||
00006e10 g F .text 000000aa GPIOIntTypeSet
|
|
||||||
000063f0 g F .text 00000010 FlashUsecGet
|
|
||||||
000061f8 g F .text 00000030 EthernetIntUnregister
|
|
||||||
000089c4 g F .text 00000048 I2SIntDisable
|
|
||||||
0000cc1c g F .text 000000c6 UARTModemControlClear
|
|
||||||
0000db50 g F .text 00000070 USBIntStatus
|
|
||||||
000054e8 g F .text 00000008 CPUcpsid
|
|
||||||
000099d0 g F .text 0000002c PWMIntStatus
|
|
||||||
0000773c g F .text 0000006c HibernateEnableExpClk
|
|
||||||
0000d984 g F .text 00000010 uDMAIntUnregister
|
|
||||||
0000d944 g F .text 00000040 uDMAIntRegister
|
|
||||||
0000e254 g F .text 00000142 USBHostEndpointDataToggle
|
|
||||||
00006a50 g F .text 0000000c FlashIntClear
|
|
||||||
00005500 g F .text 00000004 CPUwfi
|
|
||||||
00005a90 g F .text 00000026 EPIWriteFIFOCountGet
|
|
||||||
0000c2d8 g F .text 0000004a TimerValueGet
|
|
||||||
0000f0ec g F .text 000000f8 USBDevEndpointDataAck
|
|
||||||
000094dc g F .text 0000003c PWMSyncUpdate
|
|
||||||
0000d434 g F .text 0000000c uDMAControlBaseGet
|
|
||||||
0000b144 g F .text 00000020 SysCtlDeepSleep
|
|
||||||
0000e940 g F .text 00000154 USBDevEndpointConfigSet
|
|
||||||
00009fc8 g F .text 00000040 QEIVelocityEnable
|
|
||||||
000054f0 g F .text 00000006 CPUprimask
|
|
||||||
0000a274 g F .text 0000003c QEIIntClear
|
|
||||||
0000cce4 g F .text 000000a8 UARTModemControlGet
|
|
||||||
0000c060 g F .text 00000024 TimerRTCEnable
|
|
||||||
00006484 g F .text 00000120 FlashProgram
|
|
||||||
000063d0 g F .text 00000020 EthernetPHYPowerOn
|
|
||||||
0000825c g F .text 0000003e I2CMasterBusBusy
|
|
||||||
00004d1c g F .text 000000d4 ADCSoftwareOversampleDataGet
|
|
||||||
00005f88 g F .text 00000042 EthernetDisable
|
|
||||||
0000a154 g F .text 00000054 QEIIntUnregister
|
|
||||||
0000c740 g F .text 0000002e UARTFIFOLevelGet
|
|
||||||
000062b0 g F .text 0000002c EthernetIntStatus
|
|
||||||
0000f81c g F .text 000000f0 USBHostAddrGet
|
|
||||||
00009920 g F .text 00000042 PWMIntEnable
|
|
||||||
0000a600 g F .text 0000003c SSIIntClear
|
|
||||||
0000fbec g F .text 00000036 USBHostPwrDisable
|
|
||||||
000067f8 g F .text 0000006e FlashProtectSave
|
|
||||||
0000c3cc g F .text 000000a8 TimerIntRegister
|
|
||||||
00006410 g F .text 00000072 FlashErase
|
|
||||||
000079f8 g F .text 0000000c HibernateRTCTrimGet
|
|
||||||
0000b09c g F .text 0000005c SysCtlLDOSet
|
|
||||||
000051cc g F .text 00000050 ADCPhaseDelaySet
|
|
||||||
00005258 g F .text 00000044 ComparatorConfigure
|
|
||||||
00005c1c g F .text 00000030 EPIIntUnregister
|
|
||||||
00004354 g F .text 00000028 main
|
|
||||||
000084e4 g F .text 0000002e I2STxDisable
|
|
||||||
00005afc g F .text 00000044 EPIIntDisable
|
|
||||||
0000b394 g F .text 000002e2 SysCtlClockGet
|
|
||||||
0000a7a4 g F .text 00000042 SSIDMAEnable
|
|
||||||
00007b74 g F .text 00000024 HibernateIntStatus
|
|
||||||
00005450 g F .text 00000052 ComparatorIntStatus
|
|
||||||
0000883c g F .text 00000038 I2STxRxEnable
|
|
||||||
000054a4 g F .text 00000042 ComparatorIntClear
|
|
||||||
0000c230 g F .text 0000005c TimerLoadSet
|
|
||||||
0000ba28 g F .text 00000122 SysCtlI2SMClkSet
|
|
||||||
0000d3f0 g F .text 00000042 uDMAControlBaseSet
|
|
||||||
0000b80c g F .text 00000026 SysCtlIOSCVerificationSet
|
|
||||||
000069f8 g F .text 00000014 FlashIntUnregister
|
|
||||||
000060ec g F .text 00000064 EthernetPacketPutNonBlocking
|
|
||||||
0000cfa0 g F .text 0000004c UARTTxIntModeSet
|
|
||||||
0000c7ec g F .text 00000038 UARTDisable
|
|
||||||
000050f4 g F .text 0000003c ADCComparatorIntClear
|
|
||||||
00005f44 g F .text 00000042 EthernetEnable
|
|
||||||
0000fcc4 g F .text 00000102 USBEndpointDMAChannel
|
|
||||||
000092c4 g F .text 00000044 PWMGenEnable
|
|
||||||
0000897c g F .text 00000048 I2SIntEnable
|
|
||||||
0000b020 g F .text 00000016 SysCtlIntRegister
|
|
||||||
00008f88 g F .text 00000034 MPURegionEnable
|
|
||||||
00008384 g F .text 0000003c I2CMasterDataPut
|
|
||||||
0000ba00 g F .text 00000012 SysCtlUSBPLLEnable
|
|
||||||
00008b98 g F .text 0000002e IntUnregister
|
|
||||||
000072e8 g F .text 0000003a GPIOPinTypeCAN
|
|
||||||
0000b038 g F .text 00000014 SysCtlIntUnregister
|
|
||||||
00008728 g F .text 0000007e I2SRxConfigSet
|
|
||||||
0000766c g F .text 0000003a GPIOPinTypeEPI
|
|
||||||
0000f1e4 g F .text 000000f6 USBHostEndpointDataAck
|
|
||||||
00004114 g F .text 00000046 BootComInit
|
|
||||||
000053c0 g F .text 00000046 ComparatorIntEnable
|
|
||||||
00005bd4 g F .text 00000046 EPIIntRegister
|
|
||||||
0000521c g F .text 0000003a ADCPhaseDelayGet
|
|
||||||
0000de20 g F .text 0000003c USBIntDisableEndpoint
|
|
||||||
00009658 g F .text 0000004a PWMOutputFault
|
|
||||||
00008814 g F .text 00000026 I2SRxFIFOLevelGet
|
|
||||||
00006a34 g F .text 0000001a FlashIntStatus
|
|
||||||
0000d248 g F .text 00000026 UARTIntStatus
|
|
||||||
00009e3c g F .text 00000040 QEIDisable
|
|
||||||
00004b6c g F .text 000000a6 ADCSoftwareOversampleConfigure
|
|
||||||
00009418 g F .text 0000007a PWMDeadBandEnable
|
|
||||||
000075f4 g F .text 0000003a GPIOPinTypeI2S
|
|
||||||
0000a758 g F .text 0000004a SSIDataGetNonBlocking
|
|
||||||
00008af8 g F .text 0000000a IntMasterEnable
|
|
||||||
0000dce8 g F .text 00000068 USBIntDisableControl
|
|
||||||
000043ac g F .text 0000002c TimeInit
|
|
||||||
00008b10 g F .text 00000086 IntRegister
|
|
||||||
0000c590 g F .text 00000020 TimerIntClear
|
|
||||||
0000fe38 g F .text 00000038 WatchdogRunning
|
|
||||||
00005e78 g F .text 0000006c EthernetMACAddrSet
|
|
||||||
000095a0 g F .text 0000004a PWMOutputInvert
|
|
||||||
0000d2e0 g F .text 00000022 UARTRxErrorGet
|
|
||||||
00009750 g F .text 00000034 PWMFaultIntRegister
|
|
||||||
0000b750 g F .text 00000086 SysCtlADCSpeedSet
|
|
||||||
0000780c g F .text 00000012 HibernateRTCDisable
|
|
||||||
000095ec g F .text 0000006a PWMOutputFaultLevel
|
|
||||||
0000b184 g F .text 00000042 SysCtlBrownOutConfigSet
|
|
||||||
0000459c g F .text 00000086 ADCIntStatus
|
|
||||||
00005a48 g F .text 00000048 EPIFIFOConfig
|
|
||||||
0000d348 g F .text 0000000c uDMAErrorStatusGet
|
|
||||||
00008b04 g F .text 0000000a IntMasterDisable
|
|
||||||
0000e6d4 g F .text 0000002a USBDevConnect
|
|
||||||
0000757c g F .text 0000003a GPIOPinTypeUSBDigital
|
|
||||||
00008d70 g F .text 000000a8 IntDisable
|
|
||||||
0000ee80 g F .text 00000024 USBEndpointDMAEnable
|
|
||||||
00008c38 g F .text 00000050 IntPrioritySet
|
|
||||||
000071dc g F .text 00000022 GPIOPinIntClear
|
|
||||||
000069e0 g F .text 00000016 FlashIntRegister
|
|
||||||
00004394 g F .text 0000000c TimeDeinit
|
|
||||||
20000000 g .data 00000000 _data
|
|
||||||
00006364 g F .text 0000004a EthernetPHYRead
|
|
||||||
000042e4 g F .text 0000006e LedToggle
|
|
||||||
0000d328 g F .text 00000010 uDMAEnable
|
|
||||||
0000a534 g F .text 00000042 SSIIntEnable
|
|
||||||
0000a008 g F .text 00000040 QEIVelocityDisable
|
|
||||||
0000d08c g F .text 00000026 UARTCharGet
|
|
||||||
000043fc g F .text 0000006e ADCIntRegister
|
|
||||||
0000c6cc g F .text 00000074 UARTFIFOLevelSet
|
|
||||||
0000f4f0 g F .text 00000122 USBFIFOFlush
|
|
||||||
0000a448 g F .text 00000040 SSIDisable
|
|
||||||
00007e10 g F .text 00000054 I2CIntUnregister
|
|
||||||
00005560 g F .text 00000026 EPIDividerSet
|
|
||||||
0000d930 g F .text 00000012 uDMAChannelSelectDefault
|
|
||||||
0000c958 g F .text 00000024 UARTFIFOEnable
|
|
||||||
0000693c g F .text 000000a2 FlashUserSave
|
|
||||||
0000fdc8 g F .text 0000002a USBHostMode
|
|
||||||
000097b4 g F .text 00000064 PWMGenIntTrigEnable
|
|
||||||
00007db8 g F .text 00000058 I2CIntRegister
|
|
||||||
00007820 g F .text 0000002e HibernateWakeSet
|
|
||||||
0000b834 g F .text 00000026 SysCtlMOSCVerificationSet
|
|
||||||
0000dad4 g F .text 00000038 USBHostResume
|
|
||||||
0000b04c g F .text 00000012 SysCtlIntEnable
|
|
||||||
00005130 g F .text 0000005a ADCReferenceSet
|
|
||||||
0000cefc g F .text 000000a4 UARTFlowControlGet
|
|
||||||
00009dfc g F .text 00000040 QEIEnable
|
|
||||||
20000284 g .bss 00000000 _estack
|
|
||||||
0000a0fc g F .text 00000058 QEIIntRegister
|
|
||||||
00009964 g F .text 00000042 PWMIntDisable
|
|
||||||
0000e014 g F .text 00000106 USBHostEndpointStatusClear
|
|
||||||
00005dd0 g F .text 0000006e EthernetConfigSet
|
|
||||||
0000cfec g F .text 00000022 UARTTxIntModeGet
|
|
||||||
00007c14 g F .text 00000072 I2CMasterInitExpClk
|
|
||||||
000086b8 g F .text 00000034 I2SRxDataGet
|
|
||||||
2000011c g .data 00000000 _edata
|
|
||||||
0000df28 g F .text 000000ea USBEndpointStatus
|
|
||||||
0000ff60 g F .text 0000003e WatchdogUnlock
|
|
||||||
0000ea94 g F .text 00000184 USBDevEndpointConfigGet
|
|
||||||
00006400 g F .text 00000010 FlashUsecSet
|
|
||||||
0000ffa0 g F .text 0000003e WatchdogLockState
|
|
||||||
000083c0 g F .text 0000003a I2CMasterDataGet
|
|
||||||
0000529c g F .text 00000026 ComparatorRefSet
|
|
||||||
0000faec g F .text 00000066 USBHostPwrConfig
|
|
||||||
00009058 g F .text 00000064 MPURegionGet
|
|
||||||
00004000 g O .text 000000f4 _vectab
|
|
||||||
00007bc4 g F .text 00000010 HibernateIsActive
|
|
||||||
00007ee4 g F .text 00000042 I2CSlaveIntEnableEx
|
|
||||||
0000fdf4 g F .text 0000002a USBDevMode
|
|
||||||
00006868 g F .text 00000080 FlashUserGet
|
|
||||||
0000c568 g F .text 00000026 TimerIntStatus
|
|
||||||
00008f30 g F .text 00000008 IntPriorityMaskGet
|
|
||||||
00007504 g F .text 0000003a GPIOPinTypeTimer
|
|
||||||
00008a0c g F .text 00000030 I2SIntStatus
|
|
||||||
0000b85c g F .text 00000026 SysCtlPLLVerificationSet
|
|
||||||
000046d8 g F .text 0000005e ADCSequenceDisable
|
|
||||||
00007540 g F .text 0000003a GPIOPinTypeUART
|
|
||||||
00007324 g F .text 0000003a GPIOPinTypeComparator
|
|
||||||
000091f4 g F .text 00000082 PWMGenPeriodSet
|
|
||||||
0000d364 g F .text 0000002c uDMAChannelEnable
|
|
||||||
00005ff8 g F .text 0000002e EthernetSpaceAvail
|
|
||||||
000098c4 g F .text 0000005a PWMGenIntClear
|
|
||||||
000077a8 g F .text 00000012 HibernateDisable
|
|
||||||
0000bb94 g F .text 0000001c SysTickIntUnregister
|
|
||||||
00005504 g F .text 00000006 CPUbasepriSet
|
|
||||||
0000c16c g F .text 00000070 TimerPrescaleMatchSet
|
|
||||||
00007bd4 g F .text 00000040 I2CMasterEnable
|
|
||||||
0000739c g F .text 0000003a GPIOPinTypeGPIOOutput
|
|
||||||
0000b678 g F .text 0000008e SysCtlPWMClockSet
|
|
||||||
0000de98 g F .text 0000002c USBIntStatusEndpoint
|
|
||||||
0000fc8c g F .text 0000000a USBFIFOAddrGet
|
|
||||||
000065a4 g F .text 000000c4 FlashProtectGet
|
|
||||||
00007b1c g F .text 0000002c HibernateIntDisable
|
|
||||||
0000799c g F .text 0000005c HibernateRTCTrimSet
|
|
||||||
00004274 g F .text 00000024 IrqInterruptDisable
|
|
||||||
0000fee8 g F .text 0000003a WatchdogResetDisable
|
|
||||||
000090e8 g F .text 00000014 MPUIntUnregister
|
|
||||||
0000626c g F .text 00000042 EthernetIntDisable
|
|
||||||
0000b074 g F .text 0000000c SysCtlIntClear
|
|
||||||
0000c474 g F .text 000000a2 TimerIntUnregister
|
|
||||||
00005e40 g F .text 00000038 EthernetConfigGet
|
|
||||||
00008cc8 g F .text 000000a8 IntEnable
|
|
||||||
0000415c g F .text 000000ac BootComCheckActivationRequest
|
|
||||||
0000e72c g F .text 00000028 USBDevAddrSet
|
|
||||||
000062dc g F .text 0000003c EthernetIntClear
|
|
||||||
0000e11c g F .text 00000138 USBDevEndpointStatusClear
|
|
||||||
0000d140 g F .text 00000022 UARTBusy
|
|
||||||
0000ec18 g F .text 00000136 USBFIFOConfigSet
|
|
||||||
0000794c g F .text 00000044 HibernateRTCMatch1Set
|
|
||||||
000043d8 g F .text 0000000c TimeGet
|
|
||||||
0000e778 g F .text 000001c6 USBHostEndpointConfig
|
|
||||||
000100c4 g F .text 00000040 WatchdogIntUnregister
|
|
||||||
00007e64 g F .text 0000003e I2CMasterIntEnable
|
|
||||||
00006318 g F .text 0000004c EthernetPHYWrite
|
|
||||||
000076a8 g F .text 00000084 GPIOPinConfigure
|
|
||||||
00008570 g F .text 0000005a I2STxConfigSet
|
|
||||||
0000b884 g F .text 00000016 SysCtlClkVerificationClear
|
|
||||||
000054f8 g F .text 00000008 CPUcpsie
|
|
||||||
00006d58 g F .text 0000005e GPIODirModeSet
|
|
||||||
0000d1b0 g F .text 00000048 UARTIntUnregister
|
|
||||||
00004df0 g F .text 000000a6 ADCHardwareOversampleConfigure
|
|
||||||
0000afb8 g F .text 0000003e SysCtlPeripheralDeepSleepDisable
|
|
||||||
20000184 g .bss 00000000 _stack
|
|
||||||
0000fb54 g F .text 00000030 USBHostPwrFaultEnable
|
|
||||||
0000a0c0 g F .text 0000003a QEIVelocityGet
|
|
||||||
000049c8 g F .text 0000005c ADCSequenceUnderflow
|
|
||||||
00009adc g F .text 000000f0 PWMGenFaultTriggerSet
|
|
||||||
00006ebc g F .text 0000006a GPIOIntTypeGet
|
|
||||||
0000bb4c g F .text 00000012 SysTickEnable
|
|
||||||
00006668 g F .text 00000190 FlashProtectSet
|
|
||||||
0000d304 g F .text 00000022 UARTRxErrorClear
|
|
||||||
00008540 g F .text 00000030 I2STxDataPutNonBlocking
|
|
||||||
0000aec0 g F .text 0000003e SysCtlPeripheralDisable
|
|
||||||
0000f2dc g F .text 00000114 USBEndpointDataPut
|
|
||||||
0000da9c g F .text 00000038 USBHostReset
|
|
||||||
0000789c g F .text 00000010 HibernateLowBatGet
|
|
||||||
0000bbb0 g F .text 00000012 SysTickIntEnable
|
|
||||||
0000d290 g F .text 00000026 UARTDMAEnable
|
|
||||||
0000c824 g F .text 00000134 UARTConfigSetExpClk
|
|
||||||
0000f614 g F .text 000000ec USBHostRequestIN
|
|
||||||
000087e4 g F .text 0000002e I2SRxFIFOLimitGet
|
|
||||||
0000821c g F .text 0000003e I2CMasterBusy
|
|
||||||
000071b0 g F .text 0000002a GPIOPinIntStatus
|
|
||||||
00005828 g F .text 00000046 EPINonBlockingReadStop
|
|
||||||
0000ba14 g F .text 00000012 SysCtlUSBPLLDisable
|
|
||||||
0000e700 g F .text 0000002a USBDevDisconnect
|
|
||||||
0000b1d0 g F .text 000001c2 SysCtlClockSet
|
|
||||||
0000bd24 g F .text 00000104 TimerConfigure
|
|
||||||
0000be98 g F .text 0000006e TimerControlTrigger
|
|
||||||
0000adc0 g F .text 00000060 SysCtlPeripheralPresent
|
|
||||||
00006f28 g F .text 00000168 GPIOPadConfigSet
|
|
||||||
0000c9a0 g F .text 00000032 UARTEnableSIR
|
|
||||||
000090bc g F .text 0000002a MPUIntRegister
|
|
||||||
00004c14 g F .text 00000108 ADCSoftwareOversampleStepConfigure
|
|
||||||
0000e5a0 g F .text 00000132 USBDevEndpointStallClear
|
|
||||||
0000a230 g F .text 00000042 QEIIntStatus
|
|
||||||
0000c7bc g F .text 00000030 UARTEnable
|
|
||||||
00008650 g F .text 00000036 I2SRxEnable
|
|
||||||
0000c644 g F .text 00000064 UARTParityModeSet
|
|
||||||
0001004c g F .text 00000034 WatchdogValueGet
|
|
||||||
000096a4 g F .text 00000056 PWMGenIntRegister
|
|
||||||
|
|
||||||
|
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,11 +1,11 @@
|
||||||
#****************************************************************************************
|
#****************************************************************************************
|
||||||
#| Description: Makefile for STM32 using CodeSourcery GNU GCC compiler toolset
|
#| Description: Makefile for LM3S using CodeSourcery GNU GCC compiler toolset
|
||||||
#| File Name: makefile
|
#| File Name: makefile
|
||||||
#|
|
#|
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| C O P Y R I G H T
|
#| C O P Y R I G H T
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| Copyright (c) 2012 by Feaser LLC http://www.feaser.com All rights reserved
|
#| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
#|
|
#|
|
||||||
#|---------------------------------------------------------------------------------------
|
#|---------------------------------------------------------------------------------------
|
||||||
#| L I C E N S E
|
#| L I C E N S E
|
||||||
|
@ -156,13 +156,13 @@ LIB_PATH =
|
||||||
#|---------------------------------------------------------------------------------------|
|
#|---------------------------------------------------------------------------------------|
|
||||||
#| Options for compiler binaries |
|
#| Options for compiler binaries |
|
||||||
#|---------------------------------------------------------------------------------------|
|
#|---------------------------------------------------------------------------------------|
|
||||||
CFLAGS = -g -D inline= -mthumb -mcpu=cortex-m3 -O1 -T memory.x
|
CFLAGS = -g -D inline= -mthumb -mcpu=cortex-m3 -mlong-calls -O1 -T memory.x
|
||||||
CFLAGS += -D PACK_STRUCT_END=__attribute\(\(packed\)\) -D sprintf=usprintf -Wno-main
|
CFLAGS += -D PACK_STRUCT_END=__attribute\(\(packed\)\) -D sprintf=usprintf -Wno-main
|
||||||
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) -D snprintf=usnprintf
|
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) -D snprintf=usnprintf
|
||||||
CFLAGS += -D printf=uipprintf -ffunction-sections -fdata-sections $(INC_PATH)
|
CFLAGS += -D printf=uipprintf -ffunction-sections -fdata-sections $(INC_PATH)
|
||||||
CFLAGS += -D DEBUG -D gcc
|
CFLAGS += -D DEBUG -D gcc
|
||||||
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
|
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
|
||||||
LFLAGS += $(LIB_PATH) -Xlinker --no-gc-sections
|
LFLAGS += $(LIB_PATH) -Xlinker --gc-sections
|
||||||
OFLAGS = -O srec
|
OFLAGS = -O srec
|
||||||
ODFLAGS = -x
|
ODFLAGS = -x
|
||||||
SZFLAGS = -B -d
|
SZFLAGS = -B -d
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = 0x00004000, LENGTH = 240K
|
FLASH (rx) : ORIGIN = 0x00002000, LENGTH = 248K
|
||||||
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Binary file not shown.
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="lm3s8962_crossworks" target="8" version="2">
|
<solution Name="lm3s8962_crossworks" target="8" version="2">
|
||||||
<project Name="openbtl_ek_lm3s8962">
|
<project Name="openbtl_ek_lm3s8962">
|
||||||
<configuration Name="Common" Placement="Flash" Target="lm3s8962" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARMCM3_LM3S;$(ProjectDir)/../../../../Source/ARMCM3_LM3S/Crossworks" gcc_entry_point="reset_handler" gcc_optimization_level="Level 1" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/LM3S/lm3s8962_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
<configuration Name="Common" Placement="Flash" Target="lm3s8962" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib;$(ProjectDir)/../../../../Source;$(ProjectDir)/../../../../Source/ARMCM3_LM3S;$(ProjectDir)/../../../../Source/ARMCM3_LM3S/Crossworks" gcc_entry_point="reset_handler" gcc_omit_frame_pointer="No" gcc_optimization_level="Optimize For Size" link_include_standard_libraries="No" linker_additional_files="" linker_keep_symbols="_vectors;EntryFromProg" linker_memory_map_file="$(TargetsDir)/LM3S/lm3s8962_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
||||||
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
||||||
|
|
|
@ -26,7 +26,6 @@
|
||||||
<ProjectSessionItem path="lm3s8962_crossworks;openbtl_ek_lm3s8962;Source Files" name="unnamed" />
|
<ProjectSessionItem path="lm3s8962_crossworks;openbtl_ek_lm3s8962;Source Files" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s8962_crossworks;openbtl_ek_lm3s8962;Source Files;Demo" name="unnamed" />
|
<ProjectSessionItem path="lm3s8962_crossworks;openbtl_ek_lm3s8962;Source Files;Demo" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s8962_crossworks;openbtl_ek_lm3s8962;Source Files;Demo;Boot" name="unnamed" />
|
<ProjectSessionItem path="lm3s8962_crossworks;openbtl_ek_lm3s8962;Source Files;Demo;Boot" name="unnamed" />
|
||||||
<ProjectSessionItem path="lm3s8962_crossworks;openbtl_ek_lm3s8962;Source Files;Source" name="unnamed" />
|
|
||||||
</Project>
|
</Project>
|
||||||
<Register1>
|
<Register1>
|
||||||
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
|
<RegisterWindow openNodes="" binaryNodes="" hiddenNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
|
||||||
|
@ -58,7 +57,9 @@
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\main.c" y="106" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="100" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\main.c" y="106" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\main.c" left="0" selected="0" name="unnamed" top="100" />
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="42" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\config.h" y="64" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\config.h" left="0" selected="1" name="unnamed" top="58" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\config.h" y="68" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\config.h" left="0" selected="1" name="unnamed" top="68" />
|
||||||
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\cpu.c" y="43" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\cpu.c" left="0" selected="0" name="unnamed" top="37" />
|
||||||
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\flash.c" y="110" path="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_LM3S\flash.c" left="0" selected="0" name="unnamed" top="110" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="openbtl_ek_lm3s8962" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\lib\inc" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
<ARMCrossStudioWindow activeProject="openbtl_ek_lm3s8962" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Boot\lib\inc" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
Binary file not shown.
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="lm3s8962_crossworks" target="8" version="2">
|
<solution Name="lm3s8962_crossworks" target="8" version="2">
|
||||||
<project Name="demoprog_ek_lm3s8962">
|
<project Name="demoprog_ek_lm3s8962">
|
||||||
<configuration Name="Common" Placement="Flash" Target="lm3s8962" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib" gcc_entry_point="reset_handler" gcc_optimization_level="None" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/LM3S/lm3s8962_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
<configuration Name="Common" Placement="Flash" Target="lm3s8962" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_long_calls="Yes" arm_simulator_memory_simulation_filename="$(TargetsDir)/LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_preprocessor_definitions="gcc" c_user_include_directories="$(ProjectDir)/..;$(ProjectDir)/../lib;$(ProjectDir)/../lib/inc;$(ProjectDir)/../lib/driverlib" gcc_entry_point="reset_handler" gcc_optimization_level="None" linker_additional_files="" linker_memory_map_file="$(TargetsDir)/LM3S/lm3s8962_MemoryMap.xml" linker_output_format="srec" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/LM3S/propertyGroups.xml" target_get_partname_script="GetPartName()" target_reset_script="Reset()"/>
|
||||||
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/LM3S/Release/Loader.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" target_reset_script="FLASHReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
||||||
|
|
|
@ -56,9 +56,9 @@
|
||||||
<Watches active="0" update="Never" />
|
<Watches active="0" update="Never" />
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="25" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\led.c" y="40" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\led.c" left="0" selected="1" name="unnamed" top="15" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\led.c" y="40" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\led.c" left="0" selected="0" name="unnamed" top="40" />
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\boot.c" y="259" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\boot.c" left="0" selected="0" name="unnamed" top="248" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="23" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\boot.c" y="72" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\boot.c" left="0" selected="1" name="unnamed" top="66" />
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="39" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\header.h" y="25" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\header.h" left="0" selected="0" name="unnamed" top="12" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\header.h" y="25" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\header.h" left="0" selected="0" name="unnamed" top="25" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="demoprog_ek_lm3s8962" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\lib\driverlib" fileDialogDefaultFilter="" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
<ARMCrossStudioWindow activeProject="demoprog_ek_lm3s8962" autoConnectTarget="Texas Instruments ICDI" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_LM3S_EK_LM3S8962_Crossworks\Prog\lib\driverlib" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
|
@ -5,7 +5,7 @@ MEMORY
|
||||||
Peripherals (wx) : ORIGIN = 0x40020000, LENGTH = 0x00100000
|
Peripherals (wx) : ORIGIN = 0x40020000, LENGTH = 0x00100000
|
||||||
FiRM_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00010000
|
FiRM_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00010000
|
||||||
SRAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00010000
|
SRAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00010000
|
||||||
FLASH (rx) : ORIGIN = 0x00004000, LENGTH = 0x00040000 - 0x4000
|
FLASH (rx) : ORIGIN = 0x00002000, LENGTH = 0x00040000 - 0x2000
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -19,7 +19,7 @@ SECTIONS
|
||||||
__FiRM_Peripherals_segment_end__ = 0x40010000;
|
__FiRM_Peripherals_segment_end__ = 0x40010000;
|
||||||
__SRAM_segment_start__ = 0x20000000;
|
__SRAM_segment_start__ = 0x20000000;
|
||||||
__SRAM_segment_end__ = 0x20010000;
|
__SRAM_segment_end__ = 0x20010000;
|
||||||
__FLASH_segment_start__ = 0x00004000;
|
__FLASH_segment_start__ = 0x00002000;
|
||||||
__FLASH_segment_end__ = 0x00040000;
|
__FLASH_segment_end__ = 0x00040000;
|
||||||
|
|
||||||
__STACKSIZE__ = 256;
|
__STACKSIZE__ = 256;
|
||||||
|
|
Binary file not shown.
Binary file not shown.
|
@ -0,0 +1,182 @@
|
||||||
|
|
||||||
|
bin/openbtl_ek_lm3s8962.elf: file format elf32-littlearm
|
||||||
|
bin/openbtl_ek_lm3s8962.elf
|
||||||
|
architecture: arm, flags 0x00000112:
|
||||||
|
EXEC_P, HAS_SYMS, D_PAGED
|
||||||
|
start address 0x00000000
|
||||||
|
|
||||||
|
Program Header:
|
||||||
|
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
|
||||||
|
filesz 0x000016ba memsz 0x000016ba flags r-x
|
||||||
|
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x20000000 align 2**15
|
||||||
|
filesz 0x00000000 memsz 0x000005ec flags rw-
|
||||||
|
private flags = 5000000: [Version5 EABI]
|
||||||
|
|
||||||
|
Sections:
|
||||||
|
Idx Name Size VMA LMA File off Algn
|
||||||
|
0 .text 000016ba 00000000 00000000 00008000 2**2
|
||||||
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||||
|
1 .bss 000005ec 20000000 20000000 00010000 2**2
|
||||||
|
ALLOC
|
||||||
|
2 .debug_abbrev 0000151a 00000000 00000000 000096ba 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
3 .debug_info 0000475c 00000000 00000000 0000abd4 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
4 .debug_line 00002941 00000000 00000000 0000f330 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
5 .debug_pubtypes 00000477 00000000 00000000 00011c71 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
6 .debug_str 00001cad 00000000 00000000 000120e8 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
7 .comment 0000002a 00000000 00000000 00013d95 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
8 .ARM.attributes 00000031 00000000 00000000 00013dbf 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
9 .debug_loc 000046d2 00000000 00000000 00013df0 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
10 .debug_pubnames 0000124c 00000000 00000000 000184c2 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
11 .debug_aranges 00000948 00000000 00000000 0001970e 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
12 .debug_ranges 00000828 00000000 00000000 0001a056 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
13 .debug_frame 000019d4 00000000 00000000 0001a880 2**2
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
SYMBOL TABLE:
|
||||||
|
00000000 l d .text 00000000 .text
|
||||||
|
20000000 l d .bss 00000000 .bss
|
||||||
|
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
||||||
|
00000000 l d .debug_info 00000000 .debug_info
|
||||||
|
00000000 l d .debug_line 00000000 .debug_line
|
||||||
|
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
|
||||||
|
00000000 l d .debug_str 00000000 .debug_str
|
||||||
|
00000000 l d .comment 00000000 .comment
|
||||||
|
00000000 l d .ARM.attributes 00000000 .ARM.attributes
|
||||||
|
00000000 l d .debug_loc 00000000 .debug_loc
|
||||||
|
00000000 l d .debug_pubnames 00000000 .debug_pubnames
|
||||||
|
00000000 l d .debug_aranges 00000000 .debug_aranges
|
||||||
|
00000000 l d .debug_ranges 00000000 .debug_ranges
|
||||||
|
00000000 l d .debug_frame 00000000 .debug_frame
|
||||||
|
00000000 l df *ABS* 00000000 vectors.c
|
||||||
|
00000000 l df *ABS* 00000000 cstart.c
|
||||||
|
0000011a l F .text 00000000 zero_loop2
|
||||||
|
0000148e l F .text 00000000 zero_loop
|
||||||
|
00000000 l df *ABS* 00000000 main.c
|
||||||
|
00000000 l df *ABS* 00000000 flashlib.c
|
||||||
|
00000000 l df *ABS* 00000000 sysctl.c
|
||||||
|
00000298 l F .text 00000168 SysCtlPeripheralValid
|
||||||
|
000014cc l O .text 0000005c g_pulXtals
|
||||||
|
00001544 l O .text 0000000c g_pulRCGCRegs
|
||||||
|
00000000 l df *ABS* 00000000 gpio.c
|
||||||
|
00000774 l F .text 000000c4 GPIOBaseValid
|
||||||
|
00000000 l df *ABS* 00000000 uartlib.c
|
||||||
|
000009e0 l F .text 0000002c UARTBaseValid
|
||||||
|
00000000 l df *ABS* 00000000 boot.c
|
||||||
|
00000000 l df *ABS* 00000000 com.c
|
||||||
|
20000000 l O .bss 00000001 comEntryStateConnect
|
||||||
|
20000001 l O .bss 00000040 xcpCtoReqPacket.1375
|
||||||
|
00000000 l df *ABS* 00000000 xcp.c
|
||||||
|
00000c68 l F .text 0000000c XcpProtectResources
|
||||||
|
00000c74 l F .text 00000014 XcpSetCtoError
|
||||||
|
00001581 l O .text 00000008 xcpStationId
|
||||||
|
20000044 l O .bss 0000004c xcpInfo
|
||||||
|
00000000 l df *ABS* 00000000 backdoor.c
|
||||||
|
20000090 l O .bss 00000001 backdoorOpen
|
||||||
|
00000000 l df *ABS* 00000000 cop.c
|
||||||
|
00000000 l df *ABS* 00000000 assert.c
|
||||||
|
20000094 l O .bss 00000004 assert_failure_file
|
||||||
|
20000098 l O .bss 00000004 assert_failure_line
|
||||||
|
00000000 l df *ABS* 00000000 cpu.c
|
||||||
|
00000000 l df *ABS* 00000000 uart.c
|
||||||
|
00000f58 l F .text 00000020 UartReceiveByte
|
||||||
|
00000f78 l F .text 00000024 UartTransmitByte
|
||||||
|
2000009c l O .bss 00000041 xcpCtoReqPacket.1577
|
||||||
|
200000dd l O .bss 00000001 xcpCtoRxLength.1578
|
||||||
|
200000de l O .bss 00000001 xcpCtoRxInProgress.1579
|
||||||
|
00000000 l df *ABS* 00000000 nvm.c
|
||||||
|
00000000 l df *ABS* 00000000 timer.c
|
||||||
|
200000e0 l O .bss 00000002 millisecond_counter
|
||||||
|
00000000 l df *ABS* 00000000 flash.c
|
||||||
|
00001104 l F .text 00000038 FlashGetSector
|
||||||
|
0000113c l F .text 00000030 FlashGetSectorBaseAddr
|
||||||
|
0000116c l F .text 0000004e FlashWriteBlock
|
||||||
|
000011ba l F .text 00000026 FlashInitBlock
|
||||||
|
000011e0 l F .text 00000040 FlashSwitchBlock
|
||||||
|
00001220 l F .text 00000080 FlashAddToBlock
|
||||||
|
000015ac l O .text 000000e4 flashLayout
|
||||||
|
200000e4 l O .bss 00000204 bootBlockInfo
|
||||||
|
200002e8 l O .bss 00000204 blockInfo
|
||||||
|
00000000 l df *ABS* 00000000 hooks.c
|
||||||
|
00000000 l df *ABS* 00000000 cpulib.c
|
||||||
|
00000000 l df *ABS* 00000000 interrupt.c
|
||||||
|
00000000 l df *ABS* 00000000 canlib.c
|
||||||
|
00000000 l df *ABS* 00000000 can.c
|
||||||
|
00000bfc g F .text 0000002c ComInit
|
||||||
|
000012b8 g F .text 00000048 FlashWrite
|
||||||
|
00000ef8 g F .text 00000018 AssertFailure
|
||||||
|
00001470 g F .text 00000038 reset_handler
|
||||||
|
000010a8 g F .text 0000001c TimerUpdate
|
||||||
|
00000cb4 g F .text 00000010 XcpPacketTransmitted
|
||||||
|
00000c28 g F .text 0000001c ComTask
|
||||||
|
00000438 g F .text 00000006 SysCtlDelay
|
||||||
|
00000c58 g F .text 0000000c ComSetConnectEntryState
|
||||||
|
00000bd4 g F .text 00000016 BootInit
|
||||||
|
00000edc g F .text 00000018 BackDoorInit
|
||||||
|
00000ef6 g F .text 00000002 CopService
|
||||||
|
000016ba g .text 00000000 _etext
|
||||||
|
00000b58 g F .text 00000028 UARTSpaceAvail
|
||||||
|
0000109c g F .text 0000000c TimerReset
|
||||||
|
00000ba8 g F .text 0000002c UARTCharPutNonBlocking
|
||||||
|
00000bea g F .text 00000012 BootTask
|
||||||
|
000013a4 g F .text 00000044 FlashWriteChecksum
|
||||||
|
00000c46 g F .text 00000010 ComTransmitPacket
|
||||||
|
00000400 g F .text 00000038 SysCtlPeripheralEnable
|
||||||
|
00000ca4 g F .text 00000010 XcpIsConnected
|
||||||
|
00001078 g F .text 00000004 NvmInit
|
||||||
|
000012a0 g F .text 00000018 FlashInit
|
||||||
|
200004ec g .bss 00000000 _ebss
|
||||||
|
00000100 g *ABS* 00000000 __STACKSIZE__
|
||||||
|
00001464 g F .text 0000000c UnusedISR
|
||||||
|
00000c44 g F .text 00000002 ComFree
|
||||||
|
00000f9c g F .text 00000028 UartInit
|
||||||
|
00001080 g F .text 00000004 NvmErase
|
||||||
|
00000b80 g F .text 00000028 UARTCharGetNonBlocking
|
||||||
|
20000000 g .bss 00000000 _bss
|
||||||
|
00000cc4 g F .text 000001e8 XcpPacketReceived
|
||||||
|
00001430 g F .text 00000034 FlashDone
|
||||||
|
000000f0 g F .text 0000004c EntryFromProg
|
||||||
|
000001cc g F .text 000000cc FlashProgram
|
||||||
|
00000c88 g F .text 0000001c XcpInit
|
||||||
|
00001300 g F .text 000000a4 FlashErase
|
||||||
|
00000150 g F .text 0000002c main
|
||||||
|
00000598 g F .text 000001dc SysCtlClockGet
|
||||||
|
00000a3c g F .text 00000038 UARTDisable
|
||||||
|
00001088 g F .text 00000012 NvmDone
|
||||||
|
00000fc4 g F .text 00000050 UartTransmitPacket
|
||||||
|
00001084 g F .text 00000004 NvmVerifyChecksum
|
||||||
|
00000f34 g F .text 00000020 CpuMemCopy
|
||||||
|
000010c4 g F .text 0000000c TimerSet
|
||||||
|
00001014 g F .text 00000064 UartReceivePacket
|
||||||
|
20000000 g .text 00000000 _data
|
||||||
|
00000ef4 g F .text 00000002 CopInit
|
||||||
|
00000f54 g F .text 00000004 CpuReset
|
||||||
|
0000107c g F .text 00000004 NvmWrite
|
||||||
|
00000f10 g F .text 00000024 CpuStartUserProgram
|
||||||
|
200005ec g .bss 00000000 _estack
|
||||||
|
000013e8 g F .text 00000046 FlashVerifyChecksum
|
||||||
|
20000000 g .text 00000000 _edata
|
||||||
|
00000000 g O .text 000000f0 _vectab
|
||||||
|
000009ac g F .text 00000034 GPIOPinTypeUART
|
||||||
|
00000c64 g F .text 00000004 ComIsConnected
|
||||||
|
00000838 g F .text 00000054 GPIODirModeSet
|
||||||
|
00000eac g F .text 00000030 BackDoorCheck
|
||||||
|
200004ec g .bss 00000000 _stack
|
||||||
|
000010f4 g F .text 00000010 TimerGet
|
||||||
|
00000a74 g F .text 000000e4 UARTConfigSetExpClk
|
||||||
|
00000440 g F .text 00000158 SysCtlClockSet
|
||||||
|
0000088c g F .text 00000120 GPIOPadConfigSet
|
||||||
|
000010d0 g F .text 00000024 TimerInit
|
||||||
|
0000017c g F .text 00000050 FlashClear
|
||||||
|
00000a0c g F .text 00000030 UARTEnable
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ all
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ clean
|
|
@ -0,0 +1,128 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: bootloader configuration header file
|
||||||
|
| File Name: config.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef CONFIG_H
|
||||||
|
#define CONFIG_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* C P U D R I V E R C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* To properly initialize the baudrate clocks of the communication interface, typically
|
||||||
|
* the speed of the crystal oscillator and/or the speed at which the system runs is
|
||||||
|
* needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and
|
||||||
|
* BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is
|
||||||
|
* not dependent on the targets architecture, the byte ordering needs to be known.
|
||||||
|
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
|
||||||
|
* big endian mode.
|
||||||
|
*/
|
||||||
|
#define BOOT_CPU_XTAL_SPEED_KHZ (8000)
|
||||||
|
#define BOOT_CPU_SYSTEM_SPEED_KHZ (50000)
|
||||||
|
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
|
||||||
|
* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
|
||||||
|
* in bits/second. Two CAN messages are reserved for communication with the host. The
|
||||||
|
* message identifier for sending data from the target to the host is configured with
|
||||||
|
* BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
|
||||||
|
* BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data
|
||||||
|
* transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
|
||||||
|
* BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
|
||||||
|
* than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
|
||||||
|
* CAN controller channel.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#define BOOT_COM_CAN_ENABLE (0)
|
||||||
|
#define BOOT_COM_CAN_BAUDRATE (500000)
|
||||||
|
#define BOOT_COM_CAN_TX_MSG_ID (0x7E1)
|
||||||
|
#define BOOT_COM_CAN_TX_MAX_DATA (8)
|
||||||
|
#define BOOT_COM_CAN_RX_MSG_ID (0x667)
|
||||||
|
#define BOOT_COM_CAN_RX_MAX_DATA (8)
|
||||||
|
#define BOOT_COM_CAN_CHANNEL_INDEX (0)
|
||||||
|
|
||||||
|
/* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE
|
||||||
|
* configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed
|
||||||
|
* in bits/second. The maximum amount of data bytes in a message for data transmission
|
||||||
|
* and reception is set through BOOT_COM_UART_TX_MAX_DATA and BOOT_COM_UART_RX_MAX_DATA,
|
||||||
|
* respectively. It is common for a microcontroller to have more than 1 UART interface
|
||||||
|
* on board. The zero-based BOOT_COM_UART_CHANNEL_INDEX selects the UART interface.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#define BOOT_COM_UART_ENABLE (1)
|
||||||
|
#define BOOT_COM_UART_BAUDRATE (57600)
|
||||||
|
#define BOOT_COM_UART_TX_MAX_DATA (64)
|
||||||
|
#define BOOT_COM_UART_RX_MAX_DATA (64)
|
||||||
|
#define BOOT_COM_UART_CHANNEL_INDEX (0)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* It is possible to implement an application specific method to force the bootloader to
|
||||||
|
* stay active after a reset. Such a backdoor entry into the bootloader is desired in
|
||||||
|
* situations where the user program does not run properly and therefore cannot
|
||||||
|
* reactivate the bootloader. By enabling these hook functions, the application can
|
||||||
|
* implement the backdoor, which overrides the default backdoor entry that is programmed
|
||||||
|
* into the bootloader. When desired for security purposes, these hook functions can
|
||||||
|
* also be implemented in a way that disables the backdoor entry altogether.
|
||||||
|
*/
|
||||||
|
#define BOOT_BACKDOOR_HOOKS_ENABLE (0)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* N O N - V O L A T I L E M E M O R Y D R I V E R C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* The NVM driver typically supports erase and program operations of the internal memory
|
||||||
|
* present on the microcontroller. Through these hook functions the NVM driver can be
|
||||||
|
* extended to support additional memory types such as external flash memory and serial
|
||||||
|
* eeproms. The size of the internal memory in kilobytes is specified with configurable
|
||||||
|
* BOOT_NVM_SIZE_KB.
|
||||||
|
*/
|
||||||
|
#define BOOT_NVM_HOOKS_ENABLE (0)
|
||||||
|
#define BOOT_NVM_SIZE_KB (256)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* W A T C H D O G D R I V E R C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* The COP driver cannot be configured internally in the bootloader, because its use
|
||||||
|
* and configuration is application specific. The bootloader does need to service the
|
||||||
|
* watchdog in case it is used. When the application requires the use of a watchdog,
|
||||||
|
* set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through
|
||||||
|
* hook functions.
|
||||||
|
*/
|
||||||
|
#define BOOT_COP_HOOKS_ENABLE (0)
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* CONFIG_H */
|
||||||
|
/*********************************** end of config.h ***********************************/
|
|
@ -0,0 +1,179 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: bootloader callback source file
|
||||||
|
| File Name: hooks.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "boot.h" /* bootloader generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* B A C K D O O R E N T R Y H O O K F U N C T I O N S
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
#if (BOOT_BACKDOOR_HOOKS_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BackDoorInitHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the backdoor entry option.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BackDoorInitHook(void)
|
||||||
|
{
|
||||||
|
} /*** end of BackDoorInitHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BackDoorEntryHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: BLT_TRUE if the backdoor entry is requested, BLT_FALSE otherwise.
|
||||||
|
** DESCRIPTION: Checks if a backdoor entry is requested.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_bool BackDoorEntryHook(void)
|
||||||
|
{
|
||||||
|
/* default implementation always activates the bootloader after a reset */
|
||||||
|
return BLT_TRUE;
|
||||||
|
} /*** end of BackDoorEntryHook ***/
|
||||||
|
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
#if (BOOT_NVM_HOOKS_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmInitHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Callback that gets called at the start of the internal NVM driver
|
||||||
|
** initialization routine.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void NvmInitHook(void)
|
||||||
|
{
|
||||||
|
} /*** end of NvmInitHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmWriteHook
|
||||||
|
** PARAMETER: addr start address
|
||||||
|
** len length in bytes
|
||||||
|
** data pointer to the data buffer.
|
||||||
|
** RETURN VALUE: BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is
|
||||||
|
** not within the supported memory range, or BLT_NVM_ERROR is the write
|
||||||
|
** operation failed.
|
||||||
|
** DESCRIPTION: Callback that gets called at the start of the NVM driver write
|
||||||
|
** routine. It allows additional memory to be operated on. If the address
|
||||||
|
** is not within the range of the additional memory, then
|
||||||
|
** BLT_NVM_NOT_IN_RANGE must be returned to indicate that the data hasn't
|
||||||
|
** been written yet.
|
||||||
|
**
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_int8u NvmWriteHook(blt_addr addr, blt_int32u len, blt_int8u *data)
|
||||||
|
{
|
||||||
|
return BLT_NVM_NOT_IN_RANGE;
|
||||||
|
} /*** end of NvmWriteHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmEraseHook
|
||||||
|
** PARAMETER: addr start address
|
||||||
|
** len length in bytes
|
||||||
|
** RETURN VALUE: BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is
|
||||||
|
** not within the supported memory range, or BLT_NVM_ERROR is the erase
|
||||||
|
** operation failed.
|
||||||
|
** DESCRIPTION: Callback that gets called at the start of the NVM driver erase
|
||||||
|
** routine. It allows additional memory to be operated on. If the address
|
||||||
|
** is not within the range of the additional memory, then
|
||||||
|
** BLT_NVM_NOT_IN_RANGE must be returned to indicate that the memory
|
||||||
|
** hasn't been erased yet.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_int8u NvmEraseHook(blt_addr addr, blt_int32u len)
|
||||||
|
{
|
||||||
|
return BLT_NVM_NOT_IN_RANGE;
|
||||||
|
} /*** end of NvmEraseHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmDoneHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: BLT_TRUE is successful, BLT_FALSE otherwise.
|
||||||
|
** DESCRIPTION: Callback that gets called at the end of the NVM programming session.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_bool NvmDoneHook(void)
|
||||||
|
{
|
||||||
|
return BLT_TRUE;
|
||||||
|
} /*** end of NvmDoneHook ***/
|
||||||
|
#endif /* BOOT_NVM_HOOKS_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* W A T C H D O G D R I V E R H O O K F U N C T I O N S
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
#if (BOOT_COP_HOOKS_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: CopInitHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Callback that gets called at the end of the internal COP driver
|
||||||
|
** initialization routine. It can be used to configure and enable the
|
||||||
|
** watchdog.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void CopInitHook(void)
|
||||||
|
{
|
||||||
|
} /*** end of CopInitHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: CopServiceHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Callback that gets called at the end of the internal COP driver
|
||||||
|
** service routine. This gets called upon initialization and during
|
||||||
|
** potential long lasting loops and routine. It can be used to service
|
||||||
|
** the watchdog to prevent a watchdog reset.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void CopServiceHook(void)
|
||||||
|
{
|
||||||
|
} /*** end of CopServiceHook ***/
|
||||||
|
#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of hooks.c ************************************/
|
|
@ -0,0 +1,154 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Project Name="DemoBoot" InternalType="">
|
||||||
|
<VirtualDirectory Name="Source">
|
||||||
|
<VirtualDirectory Name="ARMCM3_LM3S">
|
||||||
|
<VirtualDirectory Name="GCC">
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/GCC/cstart.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/GCC/vectors.c"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/can.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/can.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/cpu.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/cpu.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/flash.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/flash.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/nvm.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/nvm.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/timer.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/timer.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/types.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/uart.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_LM3S/uart.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../../../../Source/assert.c"/>
|
||||||
|
<File Name="../../../../Source/assert.h"/>
|
||||||
|
<File Name="../../../../Source/backdoor.c"/>
|
||||||
|
<File Name="../../../../Source/backdoor.h"/>
|
||||||
|
<File Name="../../../../Source/boot.c"/>
|
||||||
|
<File Name="../../../../Source/boot.h"/>
|
||||||
|
<File Name="../../../../Source/com.c"/>
|
||||||
|
<File Name="../../../../Source/com.h"/>
|
||||||
|
<File Name="../../../../Source/cop.c"/>
|
||||||
|
<File Name="../../../../Source/cop.h"/>
|
||||||
|
<File Name="../../../../Source/plausibility.h"/>
|
||||||
|
<File Name="../../../../Source/xcp.c"/>
|
||||||
|
<File Name="../../../../Source/xcp.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="Demo">
|
||||||
|
<VirtualDirectory Name="ARMCM3_LM3S_EK_LM3S8962_GCC">
|
||||||
|
<VirtualDirectory Name="Boot">
|
||||||
|
<VirtualDirectory Name="lib">
|
||||||
|
<VirtualDirectory Name="driverlib">
|
||||||
|
<File Name="../lib/driverlib/canlib.c"/>
|
||||||
|
<File Name="../lib/driverlib/canlib.h"/>
|
||||||
|
<File Name="../lib/driverlib/cpulib.c"/>
|
||||||
|
<File Name="../lib/driverlib/cpulib.h"/>
|
||||||
|
<File Name="../lib/driverlib/debug.h"/>
|
||||||
|
<File Name="../lib/driverlib/flashlib.c"/>
|
||||||
|
<File Name="../lib/driverlib/flashlib.h"/>
|
||||||
|
<File Name="../lib/driverlib/gpio.c"/>
|
||||||
|
<File Name="../lib/driverlib/gpio.h"/>
|
||||||
|
<File Name="../lib/driverlib/interrupt.c"/>
|
||||||
|
<File Name="../lib/driverlib/interrupt.h"/>
|
||||||
|
<File Name="../lib/driverlib/sysctl.c"/>
|
||||||
|
<File Name="../lib/driverlib/sysctl.h"/>
|
||||||
|
<File Name="../lib/driverlib/uartlib.c"/>
|
||||||
|
<File Name="../lib/driverlib/uartlib.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="inc">
|
||||||
|
<File Name="../lib/inc/hw_can.h"/>
|
||||||
|
<File Name="../lib/inc/hw_flash.h"/>
|
||||||
|
<File Name="../lib/inc/hw_gpio.h"/>
|
||||||
|
<File Name="../lib/inc/hw_ints.h"/>
|
||||||
|
<File Name="../lib/inc/hw_memmap.h"/>
|
||||||
|
<File Name="../lib/inc/hw_nvic.h"/>
|
||||||
|
<File Name="../lib/inc/hw_sysctl.h"/>
|
||||||
|
<File Name="../lib/inc/hw_types.h"/>
|
||||||
|
<File Name="../lib/inc/hw_uart.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../config.h"/>
|
||||||
|
<File Name="../hooks.c"/>
|
||||||
|
<File Name="../main.c"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<Plugins>
|
||||||
|
<Plugin Name="qmake">
|
||||||
|
<![CDATA[00010001N0005Debug000000000000]]>
|
||||||
|
</Plugin>
|
||||||
|
</Plugins>
|
||||||
|
<Description/>
|
||||||
|
<Dependencies/>
|
||||||
|
<Settings Type="Dynamic Library">
|
||||||
|
<GlobalSettings>
|
||||||
|
<Compiler Options="" C_Options="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="">
|
||||||
|
<LibraryPath Value="."/>
|
||||||
|
</Linker>
|
||||||
|
<ResourceCompiler Options=""/>
|
||||||
|
</GlobalSettings>
|
||||||
|
<Configuration Name="Debug" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="-g" C_Options="-g" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="../obj" Command="openbtl_olimex_lpc_l2294_20mhz.elf" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(WorkspacePath)/../bin" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="yes" RemoteHostName="localhost" RemoteHostPort="3333" DebuggerPath="C:\Program Files (x86)\CodeSourcery\Sourcery G++ Lite\bin\arm-none-eabi-gdb.exe">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands>break main
|
||||||
|
continue
|
||||||
|
</StartupCommands>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)/..</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
<Configuration Name="Release" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="" C_Options="" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="-O2" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="./Release" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands/>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
</Settings>
|
||||||
|
</CodeLite_Project>
|
|
@ -0,0 +1,12 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Workspace Name="DemoBoot" Database="./DemoBoot.tags">
|
||||||
|
<Project Name="DemoBoot" Path="DemoBoot.project" Active="Yes"/>
|
||||||
|
<BuildMatrix>
|
||||||
|
<WorkspaceConfiguration Name="Debug" Selected="yes">
|
||||||
|
<Project Name="DemoBoot" ConfigName="Debug"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
<WorkspaceConfiguration Name="Release" Selected="yes">
|
||||||
|
<Project Name="DemoBoot" ConfigName="Release"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
</BuildMatrix>
|
||||||
|
</CodeLite_Workspace>
|
|
@ -0,0 +1,4 @@
|
||||||
|
Integrated Development Environment
|
||||||
|
----------------------------------
|
||||||
|
Codelite was used as the editor during the development of this software program. This directory contains the Codelite
|
||||||
|
workspace and project files. Codelite is a cross platform open source C/C++ IDE, available at http://www.codelite.org/.
|
|
@ -0,0 +1,400 @@
|
||||||
|
License Agreement
|
||||||
|
|
||||||
|
Important - This is a legally binding agreement. Read it carefully. After you
|
||||||
|
read the following terms, you will be asked whether you are authorized to
|
||||||
|
commit your company to abide by the following terms. THIS AGREEMENT IS
|
||||||
|
DISPLAYED FOR YOU TO READ PRIOR TO DOWNLOADING OR USING THE "LICENSED
|
||||||
|
MATERIALS".
|
||||||
|
|
||||||
|
DO NOT DOWNLOAD OR INSTALL the software programs unless you agree on behalf of
|
||||||
|
yourself and your company to be bound by the terms of this License Agreement.
|
||||||
|
|
||||||
|
DO NOT CLICK "I AGREE" UNLESS:
|
||||||
|
|
||||||
|
1. YOU ARE AUTHORIZED TO AGREE TO THE TERMS OF THIS LICENSE ON BEHALF OF
|
||||||
|
YOURSELF AND YOUR COMPANY; AND
|
||||||
|
|
||||||
|
2. YOU INTEND TO ENTER THIS LEGALLY BINDING AGREEMENT ON BEHALF OF YOURSELF AND
|
||||||
|
YOUR COMPANY.
|
||||||
|
|
||||||
|
Important - Read carefully: This software license agreement ("Agreement") is a
|
||||||
|
legal agreement between you (either an individual or entity) and Texas
|
||||||
|
Instruments Incorporated ("TI"). The "Licensed Materials" subject to this
|
||||||
|
Agreement include the software programs TI has granted you access to download
|
||||||
|
and any "on-line" or electronic documentation associated with these programs,
|
||||||
|
or any portion thereof, and may also include hardware, reference designs and
|
||||||
|
associated documentation. The Licensed Materials are specifically designed and
|
||||||
|
licensed for use solely and exclusively with microprocessor/microcontroller
|
||||||
|
devices manufactured by or for TI ("TI Devices"). By installing, copying or
|
||||||
|
otherwise using the Licensed Materials you agree to abide by the provisions set
|
||||||
|
forth herein. This Agreement is displayed for you to read prior to using the
|
||||||
|
Licensed Materials. If you choose not to accept or agree with these provisions,
|
||||||
|
do not download or install the Licensed Materials.
|
||||||
|
|
||||||
|
1. Delivery. TI may deliver the Licensed Materials, or portions thereof, to you
|
||||||
|
electronically.
|
||||||
|
|
||||||
|
2. License Grant and Use Restrictions.
|
||||||
|
|
||||||
|
a. Limited Source Code License. Subject to the terms of this Agreement, and
|
||||||
|
commencing as of the Effective Date and continuing for the term of this
|
||||||
|
Agreement, TI hereby grants to you a limited, free, non-transferable,
|
||||||
|
non-exclusive, non-assignable, non-sub-licensable license to make copies,
|
||||||
|
prepare derivative works, display internally and use internally the Licensed
|
||||||
|
Materials provided to you in source code for the sole purposes of designing and
|
||||||
|
developing object and executable versions of such Licensed Materials or any
|
||||||
|
derivative thereof, that execute solely and exclusively on TI Devices used in
|
||||||
|
Customer Product(s), and maintaining and supporting such Licensed Materials, or
|
||||||
|
any derivative thereof, and Customer Product(s). "Customer Product" means a
|
||||||
|
final product distributed by or for you that consists of both hardware,
|
||||||
|
including one or more TI Devices, and software components, including only
|
||||||
|
executable versions of the Licensed Materials that execute solely and
|
||||||
|
exclusively on or with such TI Devices and not on devices manufactured by or
|
||||||
|
for an entity other than TI.
|
||||||
|
|
||||||
|
b. Production and Distribution License. Subject to the terms of this Agreement,
|
||||||
|
and commencing as of the Effective Date and continuing for the term of this
|
||||||
|
Agreement, TI hereby grants to you a free, non-exclusive, non-transferable,
|
||||||
|
non-assignable, worldwide license to:
|
||||||
|
|
||||||
|
(i). Use object code versions of the Licensed Materials, or any derivative
|
||||||
|
thereof, to make copies, display internally, evaluate, test, distribute
|
||||||
|
internally and use internally for the sole purposes of designing and developing
|
||||||
|
Customer Product(s), and maintaining and supporting the Licensed Materials and
|
||||||
|
Customer Product(s);
|
||||||
|
|
||||||
|
(ii). Make copies, use, sell, offer to sell, and otherwise distribute object
|
||||||
|
code and executable versions of the Licensed Materials, or any derivative
|
||||||
|
thereof, for use in or with Customer Product(s), provided that such Licensed
|
||||||
|
Materials are embedded in or only used with Customer Product(s), and provided
|
||||||
|
further that such Licensed Materials execute solely and exclusively on a TI
|
||||||
|
Device and not on any device manufactured by or for an entity other than TI.
|
||||||
|
|
||||||
|
c. Demonstration License. Subject to the terms of this Agreement, and
|
||||||
|
commencing as of the Effective Date and continuing for the term of this
|
||||||
|
Agreement, TI grants to you a free, non-transferable, non-exclusive,
|
||||||
|
non-assignable, non-sub-licensable worldwide license to demonstrate to third
|
||||||
|
parties the Licensed Materials as they are used in Customer Products executing
|
||||||
|
solely and exclusively on TI Devices, provided that such Licensed Materials are
|
||||||
|
demonstrated in object or executable versions only.
|
||||||
|
|
||||||
|
d. Reference Design Use License. Subject to the terms of this Agreement, and
|
||||||
|
commencing as of the Effective Date and continuing for the term of this
|
||||||
|
Agreement, TI hereby grants to you a free, non-transferable, non-exclusive,
|
||||||
|
non-assignable, non-sub-licensable worldwide license to:
|
||||||
|
|
||||||
|
(i). use the Licensed Materials to design, develop, manufacture or have
|
||||||
|
manufactured, sell, offer to sell, or otherwise distribute Customer Product(s)
|
||||||
|
or product designs, including portions or derivatives of the Licensed Materials
|
||||||
|
as they are incorporated in or used with Customer Product(s), provided such
|
||||||
|
Customer Products or product designs utilize a TI Device.
|
||||||
|
|
||||||
|
e. Contractors and Suppliers. The licenses granted to you hereunder shall
|
||||||
|
include your on-site and off-site suppliers and independent contractors, while
|
||||||
|
such suppliers and independent contractors are performing work for or providing
|
||||||
|
services to you, provided that such suppliers and independent contractors have
|
||||||
|
executed work-for-hire agreements with you containing terms and conditions not
|
||||||
|
inconsistent with the terms and conditions set forth is this Agreement and
|
||||||
|
provided further that such contractors may provide work product to only you
|
||||||
|
under such work-for-hire agreements.
|
||||||
|
|
||||||
|
f. No Other License. Notwithstanding anything to the contrary, nothing in this
|
||||||
|
Agreement shall be construed as a license to any intellectual property rights
|
||||||
|
of TI other than those rights embodied in the Licensed Materials provided to
|
||||||
|
you by TI. EXCEPT AS PROVIDED HEREIN, NO OTHER LICENSE, EXPRESS OR IMPLIED, BY
|
||||||
|
ESTOPPEL OR OTHERWISE, TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHTS IS GRANTED
|
||||||
|
HEREIN.
|
||||||
|
|
||||||
|
g. Restrictions. You shall maintain the source code versions of the Licensed
|
||||||
|
Materials under password control protection and shall not disclose such source
|
||||||
|
code versions of the Licensed Materials, or any derivative thereof, to any
|
||||||
|
person other than your employees and contractors whose job performance requires
|
||||||
|
access. You shall not use the Licensed Materials with a processing device
|
||||||
|
manufactured by or for an entity other than TI, and you agree that any such
|
||||||
|
unauthorized use of the Licensed Materials is a material breach of this
|
||||||
|
Agreement. Except as expressly provided in this Agreement, you shall not copy,
|
||||||
|
publish, disclose, display, provide, transfer or make available the Licensed
|
||||||
|
Materials to any third party and you shall not sublicense, transfer, or assign
|
||||||
|
the Licensed Materials or your rights under this Agreement to any third party.
|
||||||
|
You shall not mortgage, pledge or encumber the Licensed Materials in any way.
|
||||||
|
You shall not (i) incorporate, combine, or distribute the Licensed Materials,
|
||||||
|
or any derivative thereof, with any Public Software, or (ii) use Public
|
||||||
|
Software in the development of any derivatives of the Licensed Materials, each
|
||||||
|
in such a way that would cause the Licensed Materials, or any derivative
|
||||||
|
thereof, to be subject to all or part of the license obligations or other
|
||||||
|
intellectual property related terms with respect to such Public Software,
|
||||||
|
including but not limited to, the obligations that the Licensed Materials, or
|
||||||
|
any derivative thereof, incorporated into, combined, or distributed with such
|
||||||
|
Public Software (x) be disclosed or distributed in source code form, be
|
||||||
|
licensed for the purpose of making derivatives of such software, or be
|
||||||
|
redistributed free of charge, contrary to the terms and conditions of this
|
||||||
|
Agreement, (y) be used with devices other than TI Devices, or (z) be otherwise
|
||||||
|
used or distributed in a manner contrary to the terms and conditions of this
|
||||||
|
Agreement. As used in this Section 2(g), "Public Software" means any software
|
||||||
|
that contains, or is derived in whole or in part from, any software distributed
|
||||||
|
as open source software, including but not limited to software licensed under
|
||||||
|
the following or similar models: (A) GNU's General Public License (GPL) or
|
||||||
|
Lesser/Library GPL (LGPL), (B) the Artistic License (e.g., PERL), (C) the
|
||||||
|
Mozilla Public License, (D) the Netscape Public License, (E) the Sun Community
|
||||||
|
Source License (SCSL), (F) the Sun Industry Standards Source License (SISL),
|
||||||
|
(G) the Apache Server license, (H) QT Free Edition License, (I) IBM Public
|
||||||
|
License, and (J) BitKeeper.
|
||||||
|
|
||||||
|
h. Termination. This Agreement is effective until terminated. You may terminate
|
||||||
|
this Agreement at any time by written notice to TI. Without prejudice to any
|
||||||
|
other rights, if you fail to comply with the terms of this Agreement, TI may
|
||||||
|
terminate your right to use the Licensed Materials upon written notice to you.
|
||||||
|
Upon termination of this Agreement, you will destroy any and all copies of the
|
||||||
|
Licensed Materials in your possession, custody or control and provide to TI a
|
||||||
|
written statement signed by your authorized representative certifying such
|
||||||
|
destruction. The following sections will survive any expiration or termination
|
||||||
|
of this Agreement: 2(h) (Termination), 3 (Licensed Materials Ownership), 6
|
||||||
|
(Warranties and Limitations), 7 (Indemnification Disclaimer), 10 (Export
|
||||||
|
Control), 11 (Governing Law and Severability), 12 (PRC Provisions), and 13
|
||||||
|
(Entire Agreement). The obligations set forth in Section 5 (Confidential
|
||||||
|
Information) will survive any expiration or termination of this Agreement for
|
||||||
|
three (3) years after such expiration or termination.
|
||||||
|
|
||||||
|
3. Licensed Materials Ownership. The Licensed Materials are licensed, not sold
|
||||||
|
to you, and can only be used in accordance with the terms of this Agreement.
|
||||||
|
Subject to the licenses granted to you pursuant to this Agreement, TI and TI's
|
||||||
|
licensors own and shall continue to own all right, title, and interest in and
|
||||||
|
to the Licensed Materials, including all copies thereof. The parties agree that
|
||||||
|
all fixes, modifications and improvements to the Licensed Materials conceived
|
||||||
|
of or made by TI that are based, either in whole or in part, on your feedback,
|
||||||
|
suggestions or recommendations are the exclusive property of TI and all right,
|
||||||
|
title and interest in and to such fixes, modifications or improvements to the
|
||||||
|
Licensed Materials will vest solely in TI. Moreover, you acknowledge and agree
|
||||||
|
that when your independently developed software or hardware components are
|
||||||
|
combined, in whole or in part, with the Licensed Materials, your right to use
|
||||||
|
the Licensed Materials embodied in such resulting combined work shall remain
|
||||||
|
subject to the terms and conditions of this Agreement.
|
||||||
|
|
||||||
|
4. Intellectual Property Rights.
|
||||||
|
|
||||||
|
a. The Licensed Materials contain copyrighted material, trade secrets and other
|
||||||
|
proprietary information of TI and TI's licensors and are protected by copyright
|
||||||
|
laws, international copyright treaties, and trade secret laws, as well as other
|
||||||
|
intellectual property laws. To protect TI's and TI's licensors' rights in the
|
||||||
|
Licensed Materials, you agree, except as specifically permitted by statute by a
|
||||||
|
provision that cannot be waived by contract, not to "unlock", decompile,
|
||||||
|
reverse engineer, disassemble or otherwise translate any portions of the
|
||||||
|
Licensed Materials to a human-perceivable form nor to permit any person or
|
||||||
|
entity to do so. You shall not remove, alter, cover, or obscure any
|
||||||
|
confidentiality, trade secret, proprietary, or copyright notices, trade-marks,
|
||||||
|
proprietary, patent, or other identifying marks or designs from any component
|
||||||
|
of the Licensed Materials and you shall reproduce and include in all copies of
|
||||||
|
the Licensed Materials the copyright notice(s) and proprietary legend(s) of TI
|
||||||
|
and TI's licensors as they appear in the Licensed Materials. TI reserves all
|
||||||
|
rights not specifically granted under this Agreement.
|
||||||
|
|
||||||
|
b. Third parties may claim to own patents, copyrights, or other intellectual
|
||||||
|
property rights that cover the implementation of certain Licensed Materials.
|
||||||
|
Certain Licensed Materials may also be based on industry recognized standards,
|
||||||
|
including but not limited to specifically the ISO MPEG and ITU standards, and
|
||||||
|
software programs published by industry recognized standards bodies and certain
|
||||||
|
third parties claim to own patents, copyrights, and other intellectual property
|
||||||
|
rights that cover implementation of those standards. You acknowledge and agree
|
||||||
|
that this Agreement does not convey a license to any such third party patents,
|
||||||
|
copyrights, and other intellectual property rights and that you are solely
|
||||||
|
responsible for any patent, copyright, or other intellectual property right
|
||||||
|
claims that relate to your use and distribution of the Licensed Materials, and
|
||||||
|
your use and distribution of your products that include or incorporate the
|
||||||
|
Licensed Materials.
|
||||||
|
|
||||||
|
5. Confidential Information. You acknowledge and agree that the Licensed
|
||||||
|
Materials contain trade secrets and other confidential information of TI and
|
||||||
|
TI's licensors. You agree to use the Licensed Materials solely within the scope
|
||||||
|
of the licenses set forth herein, to maintain the Licensed Materials in strict
|
||||||
|
confidence, to use at least the same procedures and degree of care that you use
|
||||||
|
to prevent disclosure of your own confidential information of like importance
|
||||||
|
but in no instance less than reasonable care, and to prevent disclosure of the
|
||||||
|
Licensed Materials to any third party, except as may be necessary and required
|
||||||
|
in connection with your rights and obligations hereunder. You agree to obtain
|
||||||
|
executed confidentiality agreements with your employees and contractors having
|
||||||
|
access to the Licensed Materials and to diligently take steps to enforce such
|
||||||
|
agreements in this respect. TI agrees that the employment agreements used in
|
||||||
|
the normal course of your business shall satisfy the requirements of this
|
||||||
|
section. TI may disclose your contact information to TI's applicable licensors.
|
||||||
|
|
||||||
|
6. Warranties and Limitations. YOU ACKNOWLEDGE AND AGREE THAT THE LICENSED
|
||||||
|
MATERIALS MAY NOT BE INTENDED FOR PRODUCTION APPLICATIONS AND MAY CONTAIN
|
||||||
|
IRREGULARITIES AND DEFECTS NOT FOUND IN PRODUCTION SOFTWARE. FURTHERMORE, YOU
|
||||||
|
ACKNOWLEDGE AND AGREE THAT THE LICENSED MATERIALS HAVE NOT BEEN TESTED OR
|
||||||
|
CERTIFIED BY ANY GOVERNMENT AGENCY OR INDUSTRY REGULATORY ORGANIZATION OR ANY
|
||||||
|
OTHER THIRD PARTY ORGANIZATION. YOU AGREE THAT PRIOR TO USING, INCORPORATING OR
|
||||||
|
DISTRIBUTING THE LICENSED MATERIALS IN OR WITH ANY COMMERCIAL PRODUCT THAT YOU
|
||||||
|
WILL THOROUGHLY TEST THE PRODUCT AND THE FUNCTIONALITY OF THE LICENSED
|
||||||
|
MATERIALS IN OR WITH THAT PRODUCT AND BE SOLELY RESPONSIBLE FOR ANY PROBLEMS OR
|
||||||
|
FAILURES.
|
||||||
|
|
||||||
|
THE LICENSED MATERIALS AND ANY REALTED DOCUMENTATION ARE PROVIDED "AS IS" AND
|
||||||
|
WITH ALL FAULTS. TI MAKES NO WARRANTY OR REPRESENTATION, WHETHER EXPRESS,
|
||||||
|
IMPLIED OR STATUTORY, REGARDING THE LICENSED MATERIALS, INCLUDING BUT NOT
|
||||||
|
LIMITED TO, ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
|
||||||
|
PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS OF RESPONSES,
|
||||||
|
RESULTS AND LACK OF NEGLIGENCE. TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET
|
||||||
|
ENJOYMENT, QUIET POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS,
|
||||||
|
COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. YOU AGREE TO
|
||||||
|
USE YOUR INDEPENDENT JUDGMENT IN DEVELOPING YOUR PRODUCTS. NOTHING CONTAINED IN
|
||||||
|
THIS AGREEMENT WILL BE CONSTRUED AS A WARRANTY OR REPRESENTATION BY TI TO
|
||||||
|
MAINTAIN PRODUCTION OF ANY TI SEMICONDUCTOR DEVICE OR OTHER HARDWARE OR
|
||||||
|
SOFTWARE WITH WHICH THE LICENSED MATERIALS MAY BE USED.
|
||||||
|
|
||||||
|
IN NO EVENT SHALL TI, OR ANY APPLICABLE LICENSOR, BE LIABLE FOR ANY SPECIAL,
|
||||||
|
INDIRECT, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES, HOWEVER CAUSED, ON ANY
|
||||||
|
THEORY OF LIABILITY, IN CONNECTION WITH OR ARISING OUT OF THIS AGREEMENT OR THE
|
||||||
|
USE OF THE LICENSED MATERIALS, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE
|
||||||
|
POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO,
|
||||||
|
COST OF REMOVAL OR REINSTALLATION, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF
|
||||||
|
DATA, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF USE OR
|
||||||
|
INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S AGGREGATE LIABILITY UNDER THIS
|
||||||
|
AGREEMENT OR ARISING OUT OF YOUR USE OF THE LICENSED MATERIALS EXCEED FIVE
|
||||||
|
HUNDRED U.S. DOLLARS (US$500). THE EXISTENCE OF MORE THAN ONE CLAIM WILL NOT
|
||||||
|
ENLARGE OR EXTEND THESE LIMITS.
|
||||||
|
|
||||||
|
Because some jurisdictions do not allow the exclusion or limitation of
|
||||||
|
incidental or consequential damages or limitation on how long an implied
|
||||||
|
warranty lasts, the above limitations or exclusions may not apply to you.
|
||||||
|
|
||||||
|
7. Indemnification Disclaimer. YOU ACKNOWLEDGE AND AGREE THAT TI SHALL NOT BE
|
||||||
|
LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY THIRD PARTY
|
||||||
|
INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON YOUR MANUFACTURE, USE, OR
|
||||||
|
DISTRIBUTION OF THE LICENSED MATERIALS OR YOUR MANUFACTURE, USE, OFFER FOR
|
||||||
|
SALE, SALE, IMPORTATION OR DISTRIBUTION OF YOUR PRODUCTS THAT INCLUDE OR
|
||||||
|
INCORPORATE THE LICENSED MATERIALS.
|
||||||
|
|
||||||
|
You will defend and indemnify TI in the event of claim, liability or costs
|
||||||
|
(including reasonable attorney's fees related to Your use or any sub-licensee's
|
||||||
|
use of the Licensed Materials) relating in any way to Your violation of the
|
||||||
|
terms of the License Grants set forth in Section 2, or any other violation of
|
||||||
|
other terms and conditions of this Agreement.
|
||||||
|
|
||||||
|
8. No Technical Support. TI and TI's licensors are under no obligation to
|
||||||
|
install, maintain or support the Licensed Materials.
|
||||||
|
|
||||||
|
9. Notices. All notices to TI hereunder shall be delivered to Texas Instruments
|
||||||
|
Incorporated, AEC Software Operations, 12203 Southwest Freeway, Mail Station
|
||||||
|
701, Stafford, Texas 77477, Attention: Administrator, AEC Software Operations,
|
||||||
|
with a copy to Texas Instruments Incorporated, 12203 Southwest Freeway, Mail
|
||||||
|
Station 725, Stafford, Texas 77477, Attention: Legal Department. All notices
|
||||||
|
shall be deemed served when received by TI.
|
||||||
|
|
||||||
|
10. Export Control. You hereby acknowledge that the Licensed Materials are
|
||||||
|
subject to export control under the U.S. Commerce Department's Export
|
||||||
|
Administration Regulations ("EAR"). You further hereby acknowledge and agree
|
||||||
|
that unless prior authorization is obtained from the U.S. Commerce Department,
|
||||||
|
neither you nor your customers will export, re-export, or release, directly or
|
||||||
|
indirectly, any technology, software, or software source code (as defined in
|
||||||
|
Part 772 of the EAR), received from TI, or export, directly or indirectly, any
|
||||||
|
direct product of such technology, software, or software source code (as
|
||||||
|
defined in Part 734 of the EAR), to any destination or country to which the
|
||||||
|
export, re-export, or release of the technology, software, or software source
|
||||||
|
code, or direct product is prohibited by the EAR. You agree that none of the
|
||||||
|
Licensed Materials may be downloaded or otherwise exported or reexported (i)
|
||||||
|
into (or to a national or resident of) Cuba, Iran, North Korea, Sudan and Syria
|
||||||
|
or any other country the U.S. has embargoed goods; or (ii) to anyone on the
|
||||||
|
U.S. Treasury Department's List of Specially Designated Nationals or the U.S.
|
||||||
|
Commerce Department's Denied Persons List or Entity List. You represent and
|
||||||
|
warrant that you are not located in, under the control of, or a national or
|
||||||
|
resident of any such country or on any such list and you will not use or
|
||||||
|
transfer the Licensed Materials for use in any sensitive nuclear, chemical or
|
||||||
|
biological weapons, or missile technology end-uses unless authorized by the
|
||||||
|
U.S. Government by regulation or specific license or for a military end-use in,
|
||||||
|
or by any military entity of Albania, Armenia, Azerbaijan, Belarus, Cambodia,
|
||||||
|
China, Georgia, Iran, Iraq, Kazakhstan, Kyrgyzstan, Laos, Libya, Macau,
|
||||||
|
Moldova, Mongolia, Russia, Tajikistan, Turkmenistan, Ukraine, Uzbekistan, and
|
||||||
|
Vietnam. Any software export classification made by TI shall be for TI's
|
||||||
|
internal use only and shall not be construed as a representation or warranty
|
||||||
|
regarding the proper export classification for such software or whether an
|
||||||
|
export license or other documentation is required for the exportation of such
|
||||||
|
software.
|
||||||
|
|
||||||
|
11. Governing Law and Severability. This Agreement will be governed by and
|
||||||
|
interpreted in accordance with the laws of the State of Texas, without
|
||||||
|
reference to conflict of laws principles. If for any reason a court of
|
||||||
|
competent jurisdiction finds any provision of the Agreement to be
|
||||||
|
unenforceable, that provision will be enforced to the maximum extent possible
|
||||||
|
to effectuate the intent of the parties, and the remainder of the Agreement
|
||||||
|
shall continue in full force and effect. This Agreement shall not be governed
|
||||||
|
by the United Nations Convention on Contracts for the International Sale of
|
||||||
|
Goods, or by the Uniform Computer Information Transactions Act (UCITA), as it
|
||||||
|
may be enacted in the State of Texas. The parties agree that non-exclusive
|
||||||
|
jurisdiction for any dispute arising out of or relating to this Agreement lies
|
||||||
|
within the courts located in the State of Texas. Notwithstanding the foregoing,
|
||||||
|
any judgment may be enforced in any United States or foreign court, and either
|
||||||
|
party may seek injunctive relief in any United States or foreign court.
|
||||||
|
|
||||||
|
12. PRC Provisions. If you are located in the People's Republic of China
|
||||||
|
("PRC") or if the Licensed Materials will be sent to the PRC, the following
|
||||||
|
provisions shall apply and shall supersede any other provisions in this
|
||||||
|
Agreement concerning the same subject matter as the following provisions:
|
||||||
|
|
||||||
|
a. Registration Requirements. You shall be solely responsible for performing
|
||||||
|
all acts and obtaining all approvals that may be required in connection with
|
||||||
|
this Agreement by the government of the PRC, including but not limited to
|
||||||
|
registering pursuant to, and otherwise complying with, the PRC Measures on the
|
||||||
|
Administration of Software Products, Management Regulations on Technology
|
||||||
|
Import-Export, and Technology Import and Export Contract Registration
|
||||||
|
Management Rules. Upon receipt of such approvals from the government
|
||||||
|
authorities, you shall forward evidence of all such approvals to TI for its
|
||||||
|
records. In the event that you fail to obtain any such approval or
|
||||||
|
registration, you shall be solely responsible for any and all losses, damages
|
||||||
|
or costs resulting therefrom, and shall indemnify TI for all such losses,
|
||||||
|
damages or costs.
|
||||||
|
|
||||||
|
b. Governing Language. This Agreement is written and executed in the English
|
||||||
|
language. If a translation of this Agreement is required for any purpose,
|
||||||
|
including but not limited to registration of the Agreement pursuant to any
|
||||||
|
governmental laws, regulations or rules, you shall be solely responsible for
|
||||||
|
creating such translation. Any translation of this Agreement into a language
|
||||||
|
other than English is intended solely in order to comply with such laws or for
|
||||||
|
reference purposes, and the English language version shall be authoritative and
|
||||||
|
controlling.
|
||||||
|
|
||||||
|
c. Export Control.
|
||||||
|
|
||||||
|
(i). Diversions of Technology. You hereby agree that unless prior authorization
|
||||||
|
is obtained from the U.S. Department of Commerce, neither you nor your
|
||||||
|
subsidiaries or affiliates shall knowingly export, re-export, or release,
|
||||||
|
directly or indirectly, any technology, software, or software source code (as
|
||||||
|
defined in Part 772 of the Export Administration Regulations of the U.S.
|
||||||
|
Department of Commerce ("EAR")), received from TI or any of its affiliated
|
||||||
|
companies, or export, directly or indirectly, any direct product of such
|
||||||
|
technology, software, or software source code (as defined in Part 734 of the
|
||||||
|
EAR), to any destination or country to which the export, re-export, or release
|
||||||
|
of the technology, software, software source code, or direct product is
|
||||||
|
prohibited by the EAR.
|
||||||
|
|
||||||
|
(ii). Assurance of Compliance. You understand and acknowledge that products,
|
||||||
|
technology (regardless of the form in which it is provided), software or
|
||||||
|
software source code, received from TI or any of its affiliates under this
|
||||||
|
Agreement may be under export control of the United States or other countries.
|
||||||
|
You shall comply with the United States and other applicable non-U.S. laws and
|
||||||
|
regulations governing the export, re-export and release of any products,
|
||||||
|
technology, software, or software source code received under this Agreement
|
||||||
|
from TI or its affiliates. You shall not undertake any action that is
|
||||||
|
prohibited by the EAR. Without limiting the generality of the foregoing, you
|
||||||
|
specifically agree that you shall not transfer or release products, technology,
|
||||||
|
software, or software source code of TI or its affiliates to, or for use by,
|
||||||
|
military end users or for use in military, missile, nuclear, biological, or
|
||||||
|
chemical weapons end uses.
|
||||||
|
|
||||||
|
(iii). Licenses. Each party shall secure at its own expense, such licenses and
|
||||||
|
export and import documents as are necessary for each respective party to
|
||||||
|
fulfill its obligations under this Agreement. If such licenses or government
|
||||||
|
approvals cannot be obtained, TI may terminate this Agreement, or shall
|
||||||
|
otherwise be excused from the performance of any obligations it may have under
|
||||||
|
this Agreement for which the licenses or government approvals are required.
|
||||||
|
|
||||||
|
13. Entire Agreement. This is the entire Agreement between you and TI, and
|
||||||
|
absent a signed and effective software license agreement related to the subject
|
||||||
|
matter of this Agreement, this Agreement supersedes any prior agreement between
|
||||||
|
the parties related to the subject matter of this Agreement. Notwithstanding
|
||||||
|
the foregoing, any signed and effective software license agreement relating to
|
||||||
|
the subject matter hereof will supersede the terms of this Agreement. No
|
||||||
|
amendment or modification of this Agreement will be effective unless in writing
|
||||||
|
and signed by a duly authorized representative of TI. You hereby warrant and
|
||||||
|
represent that you have obtained all authorizations and other applicable
|
||||||
|
consents required empowering you to enter into this Agreement.
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,450 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// can.h - Defines and Macros for the CAN controller.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __CAN_H__
|
||||||
|
#define __CAN_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup can_api
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Miscellaneous defines for Message ID Types
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// These are the flags used by the tCANMsgObject.ulFlags value when calling the
|
||||||
|
// CANMessageSet() and CANMessageGet() functions.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This definition is used with the tCANMsgObject ulFlags value and indicates
|
||||||
|
//! that transmit interrupts should be enabled, or are enabled.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_TX_INT_ENABLE 0x00000001
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that receive interrupts should be enabled, or are
|
||||||
|
//! enabled.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_RX_INT_ENABLE 0x00000002
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that a message object will use or is using an extended
|
||||||
|
//! identifier.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_EXTENDED_ID 0x00000004
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that a message object will use or is using filtering
|
||||||
|
//! based on the object's message identifier.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_USE_ID_FILTER 0x00000008
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that new data was available in the message object.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_NEW_DATA 0x00000080
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that data was lost since this message object was last
|
||||||
|
//! read.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_DATA_LOST 0x00000100
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that a message object will use or is using filtering
|
||||||
|
//! based on the direction of the transfer. If the direction filtering is
|
||||||
|
//! used, then ID filtering must also be enabled.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_USE_DIR_FILTER (0x00000010 | MSG_OBJ_USE_ID_FILTER)
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that a message object will use or is using message
|
||||||
|
//! identifier filtering based on the extended identifier. If the extended
|
||||||
|
//! identifier filtering is used, then ID filtering must also be enabled.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_USE_EXT_FILTER (0x00000020 | MSG_OBJ_USE_ID_FILTER)
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that a message object is a remote frame.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_REMOTE_FRAME 0x00000040
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that this message object is part of a FIFO structure and
|
||||||
|
//! not the final message object in a FIFO.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_FIFO 0x00000200
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This indicates that a message object has no flags set.
|
||||||
|
//
|
||||||
|
#define MSG_OBJ_NO_FLAGS 0x00000000
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! This define is used with the flag values to allow checking only status
|
||||||
|
//! flags and not configuration flags.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define MSG_OBJ_STATUS_MASK (MSG_OBJ_NEW_DATA | MSG_OBJ_DATA_LOST)
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! The structure used for encapsulating all the items associated with a CAN
|
||||||
|
//! message object in the CAN controller.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//! The CAN message identifier used for 11 or 29 bit identifiers.
|
||||||
|
//
|
||||||
|
unsigned long ulMsgID;
|
||||||
|
|
||||||
|
//
|
||||||
|
//! The message identifier mask used when identifier filtering is enabled.
|
||||||
|
//
|
||||||
|
unsigned long ulMsgIDMask;
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This value holds various status flags and settings specified by
|
||||||
|
//! tCANObjFlags.
|
||||||
|
//
|
||||||
|
unsigned long ulFlags;
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This value is the number of bytes of data in the message object.
|
||||||
|
//
|
||||||
|
unsigned long ulMsgLen;
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This is a pointer to the message object's data.
|
||||||
|
//
|
||||||
|
unsigned char *pucMsgData;
|
||||||
|
}
|
||||||
|
tCANMsgObject;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! This structure is used for encapsulating the values associated with setting
|
||||||
|
//! up the bit timing for a CAN controller. The structure is used when calling
|
||||||
|
//! the CANGetBitTiming and CANSetBitTiming functions.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//! This value holds the sum of the Synchronization, Propagation, and Phase
|
||||||
|
//! Buffer 1 segments, measured in time quanta. The valid values for this
|
||||||
|
//! setting range from 2 to 16.
|
||||||
|
//
|
||||||
|
unsigned int uSyncPropPhase1Seg;
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This value holds the Phase Buffer 2 segment in time quanta. The valid
|
||||||
|
//! values for this setting range from 1 to 8.
|
||||||
|
//
|
||||||
|
unsigned int uPhase2Seg;
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This value holds the Resynchronization Jump Width in time quanta. The
|
||||||
|
//! valid values for this setting range from 1 to 4.
|
||||||
|
//
|
||||||
|
unsigned int uSJW;
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This value holds the CAN_CLK divider used to determine time quanta.
|
||||||
|
//! The valid values for this setting range from 1 to 1023.
|
||||||
|
//
|
||||||
|
unsigned int uQuantumPrescaler;
|
||||||
|
}
|
||||||
|
tCANBitClkParms;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! This data type is used to identify the interrupt status register. This is
|
||||||
|
//! used when calling the CANIntStatus() function.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//! Read the CAN interrupt status information.
|
||||||
|
//
|
||||||
|
CAN_INT_STS_CAUSE,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Read a message object's interrupt status.
|
||||||
|
//
|
||||||
|
CAN_INT_STS_OBJECT
|
||||||
|
}
|
||||||
|
tCANIntStsReg;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! This data type is used to identify which of several status registers to
|
||||||
|
//! read when calling the CANStatusGet() function.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//! Read the full CAN controller status.
|
||||||
|
//
|
||||||
|
CAN_STS_CONTROL,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Read the full 32-bit mask of message objects with a transmit request
|
||||||
|
//! set.
|
||||||
|
//
|
||||||
|
CAN_STS_TXREQUEST,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Read the full 32-bit mask of message objects with new data available.
|
||||||
|
//
|
||||||
|
CAN_STS_NEWDAT,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Read the full 32-bit mask of message objects that are enabled.
|
||||||
|
//
|
||||||
|
CAN_STS_MSGVAL
|
||||||
|
}
|
||||||
|
tCANStsReg;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// These definitions are used to specify interrupt sources to CANIntEnable()
|
||||||
|
// and CANIntDisable().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! This flag is used to allow a CAN controller to generate error
|
||||||
|
//! interrupts.
|
||||||
|
//
|
||||||
|
#define CAN_INT_ERROR 0x00000008
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This flag is used to allow a CAN controller to generate status
|
||||||
|
//! interrupts.
|
||||||
|
//
|
||||||
|
#define CAN_INT_STATUS 0x00000004
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This flag is used to allow a CAN controller to generate any CAN
|
||||||
|
//! interrupts. If this is not set, then no interrupts will be generated
|
||||||
|
//! by the CAN controller.
|
||||||
|
//
|
||||||
|
#define CAN_INT_MASTER 0x00000002
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! This definition is used to determine the type of message object that will
|
||||||
|
//! be set up via a call to the CANMessageSet() API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//! Transmit message object.
|
||||||
|
//
|
||||||
|
MSG_OBJ_TYPE_TX,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Transmit remote request message object
|
||||||
|
//
|
||||||
|
MSG_OBJ_TYPE_TX_REMOTE,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Receive message object.
|
||||||
|
//
|
||||||
|
MSG_OBJ_TYPE_RX,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Receive remote request message object.
|
||||||
|
//
|
||||||
|
MSG_OBJ_TYPE_RX_REMOTE,
|
||||||
|
|
||||||
|
//
|
||||||
|
//! Remote frame receive remote, with auto-transmit message object.
|
||||||
|
//
|
||||||
|
MSG_OBJ_TYPE_RXTX_REMOTE
|
||||||
|
}
|
||||||
|
tMsgObjType;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following enumeration contains all error or status indicators that can
|
||||||
|
// be returned when calling the CANStatusGet() function.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! CAN controller has entered a Bus Off state.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_BUS_OFF 0x00000080
|
||||||
|
|
||||||
|
//
|
||||||
|
//! CAN controller error level has reached warning level.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_EWARN 0x00000040
|
||||||
|
|
||||||
|
//
|
||||||
|
//! CAN controller error level has reached error passive level.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_EPASS 0x00000020
|
||||||
|
|
||||||
|
//
|
||||||
|
//! A message was received successfully since the last read of this status.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_RXOK 0x00000010
|
||||||
|
|
||||||
|
//
|
||||||
|
//! A message was transmitted successfully since the last read of this
|
||||||
|
//! status.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_TXOK 0x00000008
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This is the mask for the last error code field.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_MSK 0x00000007
|
||||||
|
|
||||||
|
//
|
||||||
|
//! There was no error.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_NONE 0x00000000
|
||||||
|
|
||||||
|
//
|
||||||
|
//! A bit stuffing error has occurred.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_STUFF 0x00000001
|
||||||
|
|
||||||
|
//
|
||||||
|
//! A formatting error has occurred.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_FORM 0x00000002
|
||||||
|
|
||||||
|
//
|
||||||
|
//! An acknowledge error has occurred.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_ACK 0x00000003
|
||||||
|
|
||||||
|
//
|
||||||
|
//! The bus remained a bit level of 1 for longer than is allowed.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_BIT1 0x00000004
|
||||||
|
|
||||||
|
//
|
||||||
|
//! The bus remained a bit level of 0 for longer than is allowed.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_BIT0 0x00000005
|
||||||
|
|
||||||
|
//
|
||||||
|
//! A CRC error has occurred.
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_CRC 0x00000006
|
||||||
|
|
||||||
|
//
|
||||||
|
//! This is the mask for the CAN Last Error Code (LEC).
|
||||||
|
//
|
||||||
|
#define CAN_STATUS_LEC_MASK 0x00000007
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// API Function prototypes
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void CANBitTimingGet(unsigned long ulBase, tCANBitClkParms *pClkParms);
|
||||||
|
extern void CANBitTimingSet(unsigned long ulBase, tCANBitClkParms *pClkParms);
|
||||||
|
extern unsigned long CANBitRateSet(unsigned long ulBase,
|
||||||
|
unsigned long ulSourceClock,
|
||||||
|
unsigned long ulBitRate);
|
||||||
|
extern void CANDisable(unsigned long ulBase);
|
||||||
|
extern void CANEnable(unsigned long ulBase);
|
||||||
|
extern tBoolean CANErrCntrGet(unsigned long ulBase, unsigned long *pulRxCount,
|
||||||
|
unsigned long *pulTxCount);
|
||||||
|
extern void CANInit(unsigned long ulBase);
|
||||||
|
extern void CANIntClear(unsigned long ulBase, unsigned long ulIntClr);
|
||||||
|
extern void CANIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
|
extern void CANIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
|
extern void CANIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
|
||||||
|
extern unsigned long CANIntStatus(unsigned long ulBase,
|
||||||
|
tCANIntStsReg eIntStsReg);
|
||||||
|
extern void CANIntUnregister(unsigned long ulBase);
|
||||||
|
extern void CANMessageClear(unsigned long ulBase, unsigned long ulObjID);
|
||||||
|
extern void CANMessageGet(unsigned long ulBase, unsigned long ulObjID,
|
||||||
|
tCANMsgObject *pMsgObject, tBoolean bClrPendingInt);
|
||||||
|
extern void CANMessageSet(unsigned long ulBase, unsigned long ulObjID,
|
||||||
|
tCANMsgObject *pMsgObject, tMsgObjType eMsgType);
|
||||||
|
extern tBoolean CANRetryGet(unsigned long ulBase);
|
||||||
|
extern void CANRetrySet(unsigned long ulBase, tBoolean bAutoRetry);
|
||||||
|
extern unsigned long CANStatusGet(unsigned long ulBase, tCANStsReg eStatusReg);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Several CAN APIs have been renamed, with the original function name being
|
||||||
|
// deprecated. These defines provide backward compatibility.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define CANSetBitTiming(a, b) CANBitTimingSet(a, b)
|
||||||
|
#define CANGetBitTiming(a, b) CANBitTimingGet(a, b)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#endif // __CAN_H__
|
|
@ -0,0 +1,442 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// cpu.c - Instruction wrappers for special CPU instructions needed by the
|
||||||
|
// drivers.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include "driverlib/cpulib.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Wrapper function for the CPSID instruction. Returns the state of PRIMASK
|
||||||
|
// on entry.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||||
|
unsigned long __attribute__((naked))
|
||||||
|
CPUcpsid(void)
|
||||||
|
{
|
||||||
|
unsigned long ulRet;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" cpsid i\n"
|
||||||
|
" bx lr\n"
|
||||||
|
: "=r" (ulRet));
|
||||||
|
|
||||||
|
//
|
||||||
|
// The return is handled in the inline assembly, but the compiler will
|
||||||
|
// still complain if there is not an explicit return here (despite the fact
|
||||||
|
// that this does not result in any code being produced because of the
|
||||||
|
// naked attribute).
|
||||||
|
//
|
||||||
|
return(ulRet);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ewarm)
|
||||||
|
unsigned long
|
||||||
|
CPUcpsid(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" cpsid i\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||||
|
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||||
|
// above and a superfluous return statement here.
|
||||||
|
//
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
}
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
#endif
|
||||||
|
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||||
|
__asm unsigned long
|
||||||
|
CPUcpsid(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
mrs r0, PRIMASK;
|
||||||
|
cpsid i;
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ccs)
|
||||||
|
unsigned long
|
||||||
|
CPUcpsid(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" cpsid i\n"
|
||||||
|
" bx lr\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// The following keeps the compiler happy, because it wants to see a
|
||||||
|
// return value from this function. It will generate code to return
|
||||||
|
// a zero. However, the real return is the "bx lr" above, so the
|
||||||
|
// return(0) is never executed and the function returns with the value
|
||||||
|
// you expect in R0.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Wrapper function returning the state of PRIMASK (indicating whether
|
||||||
|
// interrupts are enabled or disabled).
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||||
|
unsigned long __attribute__((naked))
|
||||||
|
CPUprimask(void)
|
||||||
|
{
|
||||||
|
unsigned long ulRet;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" bx lr\n"
|
||||||
|
: "=r" (ulRet));
|
||||||
|
|
||||||
|
//
|
||||||
|
// The return is handled in the inline assembly, but the compiler will
|
||||||
|
// still complain if there is not an explicit return here (despite the fact
|
||||||
|
// that this does not result in any code being produced because of the
|
||||||
|
// naked attribute).
|
||||||
|
//
|
||||||
|
return(ulRet);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ewarm)
|
||||||
|
unsigned long
|
||||||
|
CPUprimask(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||||
|
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||||
|
// above and a superfluous return statement here.
|
||||||
|
//
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
}
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
#endif
|
||||||
|
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||||
|
__asm unsigned long
|
||||||
|
CPUprimask(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
mrs r0, PRIMASK;
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ccs)
|
||||||
|
unsigned long
|
||||||
|
CPUprimask(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and disable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" bx lr\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// The following keeps the compiler happy, because it wants to see a
|
||||||
|
// return value from this function. It will generate code to return
|
||||||
|
// a zero. However, the real return is the "bx lr" above, so the
|
||||||
|
// return(0) is never executed and the function returns with the value
|
||||||
|
// you expect in R0.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Wrapper function for the CPSIE instruction. Returns the state of PRIMASK
|
||||||
|
// on entry.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||||
|
unsigned long __attribute__((naked))
|
||||||
|
CPUcpsie(void)
|
||||||
|
{
|
||||||
|
unsigned long ulRet;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read PRIMASK and enable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" cpsie i\n"
|
||||||
|
" bx lr\n"
|
||||||
|
: "=r" (ulRet));
|
||||||
|
|
||||||
|
//
|
||||||
|
// The return is handled in the inline assembly, but the compiler will
|
||||||
|
// still complain if there is not an explicit return here (despite the fact
|
||||||
|
// that this does not result in any code being produced because of the
|
||||||
|
// naked attribute).
|
||||||
|
//
|
||||||
|
return(ulRet);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ewarm)
|
||||||
|
unsigned long
|
||||||
|
CPUcpsie(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and enable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" cpsie i\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||||
|
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||||
|
// above and a superfluous return statement here.
|
||||||
|
//
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
}
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
#endif
|
||||||
|
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||||
|
__asm unsigned long
|
||||||
|
CPUcpsie(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and enable interrupts.
|
||||||
|
//
|
||||||
|
mrs r0, PRIMASK;
|
||||||
|
cpsie i;
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ccs)
|
||||||
|
unsigned long
|
||||||
|
CPUcpsie(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read PRIMASK and enable interrupts.
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, PRIMASK\n"
|
||||||
|
" cpsie i\n"
|
||||||
|
" bx lr\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// The following keeps the compiler happy, because it wants to see a
|
||||||
|
// return value from this function. It will generate code to return
|
||||||
|
// a zero. However, the real return is the "bx lr" above, so the
|
||||||
|
// return(0) is never executed and the function returns with the value
|
||||||
|
// you expect in R0.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Wrapper function for the WFI instruction.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||||
|
void __attribute__((naked))
|
||||||
|
CPUwfi(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Wait for the next interrupt.
|
||||||
|
//
|
||||||
|
__asm(" wfi\n"
|
||||||
|
" bx lr\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ewarm)
|
||||||
|
void
|
||||||
|
CPUwfi(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Wait for the next interrupt.
|
||||||
|
//
|
||||||
|
__asm(" wfi\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||||
|
__asm void
|
||||||
|
CPUwfi(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Wait for the next interrupt.
|
||||||
|
//
|
||||||
|
wfi;
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ccs)
|
||||||
|
void
|
||||||
|
CPUwfi(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Wait for the next interrupt.
|
||||||
|
//
|
||||||
|
__asm(" wfi\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Wrapper function for writing the BASEPRI register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||||
|
void __attribute__((naked))
|
||||||
|
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||||
|
{
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the BASEPRI register
|
||||||
|
//
|
||||||
|
__asm(" msr BASEPRI, r0\n"
|
||||||
|
" bx lr\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ewarm)
|
||||||
|
void
|
||||||
|
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set the BASEPRI register
|
||||||
|
//
|
||||||
|
__asm(" msr BASEPRI, r0\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||||
|
__asm void
|
||||||
|
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set the BASEPRI register
|
||||||
|
//
|
||||||
|
msr BASEPRI, r0;
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ccs)
|
||||||
|
void
|
||||||
|
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set the BASEPRI register
|
||||||
|
//
|
||||||
|
__asm(" msr BASEPRI, r0\n");
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Wrapper function for reading the BASEPRI register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||||
|
unsigned long __attribute__((naked))
|
||||||
|
CPUbasepriGet(void)
|
||||||
|
{
|
||||||
|
unsigned long ulRet;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read BASEPRI
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, BASEPRI\n"
|
||||||
|
" bx lr\n"
|
||||||
|
: "=r" (ulRet));
|
||||||
|
|
||||||
|
//
|
||||||
|
// The return is handled in the inline assembly, but the compiler will
|
||||||
|
// still complain if there is not an explicit return here (despite the fact
|
||||||
|
// that this does not result in any code being produced because of the
|
||||||
|
// naked attribute).
|
||||||
|
//
|
||||||
|
return(ulRet);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ewarm)
|
||||||
|
unsigned long
|
||||||
|
CPUbasepriGet(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read BASEPRI
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, BASEPRI\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||||
|
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||||
|
// above and a superfluous return statement here.
|
||||||
|
//
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
}
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
#endif
|
||||||
|
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||||
|
__asm unsigned long
|
||||||
|
CPUbasepriGet(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read BASEPRI
|
||||||
|
//
|
||||||
|
mrs r0, BASEPRI;
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if defined(ccs)
|
||||||
|
unsigned long
|
||||||
|
CPUbasepriGet(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Read BASEPRI
|
||||||
|
//
|
||||||
|
__asm(" mrs r0, BASEPRI\n"
|
||||||
|
" bx lr\n");
|
||||||
|
|
||||||
|
//
|
||||||
|
// The following keeps the compiler happy, because it wants to see a
|
||||||
|
// return value from this function. It will generate code to return
|
||||||
|
// a zero. However, the real return is the "bx lr" above, so the
|
||||||
|
// return(0) is never executed and the function returns with the value
|
||||||
|
// you expect in R0.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
#endif
|
|
@ -0,0 +1,60 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// cpu.h - Prototypes for the CPU instruction wrapper functions.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __CPU_H__
|
||||||
|
#define __CPU_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern unsigned long CPUcpsid(void);
|
||||||
|
extern unsigned long CPUcpsie(void);
|
||||||
|
extern unsigned long CPUprimask(void);
|
||||||
|
extern void CPUwfi(void);
|
||||||
|
extern unsigned long CPUbasepriGet(void);
|
||||||
|
extern void CPUbasepriSet(unsigned long ulNewBasepri);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __CPU_H__
|
|
@ -0,0 +1,58 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// debug.h - Macros for assisting debug of the driver library.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __DEBUG_H__
|
||||||
|
#define __DEBUG_H__
|
||||||
|
|
||||||
|
|
||||||
|
#include "boot.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototype for the function that is called when an invalid argument is passed
|
||||||
|
// to an API. This is only used when doing a DEBUG build.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef NDEBUG
|
||||||
|
extern void AssertFailure(blt_char *file, blt_int32u line);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The ASSERT macro, which does the actual assertion checking. Typically, this
|
||||||
|
// will be for procedure arguments.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef NDEBUG
|
||||||
|
#define ASSERT(expr)
|
||||||
|
#else
|
||||||
|
#define ASSERT(expr) { \
|
||||||
|
if(!(expr)) \
|
||||||
|
{ \
|
||||||
|
AssertFailure(__FILE__, __LINE__); \
|
||||||
|
} \
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __DEBUG_H__
|
|
@ -0,0 +1,912 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// flash.c - Driver for programming the on-chip flash.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup flash_api
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include "inc/hw_flash.h"
|
||||||
|
#include "inc/hw_ints.h"
|
||||||
|
#include "inc/hw_sysctl.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "driverlib/debug.h"
|
||||||
|
#include "driverlib/flashlib.h"
|
||||||
|
#include "driverlib/interrupt.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// An array that maps the specified memory bank to the appropriate Flash
|
||||||
|
// Memory Protection Program Enable (FMPPE) register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static const unsigned long g_pulFMPPERegs[] =
|
||||||
|
{
|
||||||
|
FLASH_FMPPE,
|
||||||
|
FLASH_FMPPE1,
|
||||||
|
FLASH_FMPPE2,
|
||||||
|
FLASH_FMPPE3
|
||||||
|
};
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// An array that maps the specified memory bank to the appropriate Flash
|
||||||
|
// Memory Protection Read Enable (FMPRE) register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static const unsigned long g_pulFMPRERegs[] =
|
||||||
|
{
|
||||||
|
FLASH_FMPRE,
|
||||||
|
FLASH_FMPRE1,
|
||||||
|
FLASH_FMPRE2,
|
||||||
|
FLASH_FMPRE3
|
||||||
|
};
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Gets the number of processor clocks per micro-second.
|
||||||
|
//!
|
||||||
|
//! This function returns the number of clocks per micro-second, as presently
|
||||||
|
//! known by the flash controller.
|
||||||
|
//!
|
||||||
|
//! \return Returns the number of processor clocks per micro-second.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
unsigned long
|
||||||
|
FlashUsecGet(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Return the number of clocks per micro-second.
|
||||||
|
//
|
||||||
|
return(HWREG(FLASH_USECRL) + 1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the number of processor clocks per micro-second.
|
||||||
|
//!
|
||||||
|
//! \param ulClocks is the number of processor clocks per micro-second.
|
||||||
|
//!
|
||||||
|
//! This function is used to tell the flash controller the number of processor
|
||||||
|
//! clocks per micro-second. This value must be programmed correctly or the
|
||||||
|
//! flash most likely will not program correctly; it has no affect on reading
|
||||||
|
//! flash.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
FlashUsecSet(unsigned long ulClocks)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set the number of clocks per micro-second.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_USECRL) = ulClocks - 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Erases a block of flash.
|
||||||
|
//!
|
||||||
|
//! \param ulAddress is the start address of the flash block to be erased.
|
||||||
|
//!
|
||||||
|
//! This function will erase a 1 kB block of the on-chip flash. After erasing,
|
||||||
|
//! the block will be filled with 0xFF bytes. Read-only and execute-only
|
||||||
|
//! blocks cannot be erased.
|
||||||
|
//!
|
||||||
|
//! This function will not return until the block has been erased.
|
||||||
|
//!
|
||||||
|
//! \return Returns 0 on success, or -1 if an invalid block address was
|
||||||
|
//! specified or the block is write-protected.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
FlashClear(unsigned long ulAddress)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(!(ulAddress & (FLASH_ERASE_SIZE - 1)));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the flash access interrupt.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FCMISC) = FLASH_FCMISC_AMISC;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Erase the block.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FMA) = ulAddress;
|
||||||
|
HWREG(FLASH_FMC) = FLASH_FMC_WRKEY | FLASH_FMC_ERASE;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until the block has been erased.
|
||||||
|
//
|
||||||
|
while(HWREG(FLASH_FMC) & FLASH_FMC_ERASE)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return an error if an access violation occurred.
|
||||||
|
//
|
||||||
|
if(HWREG(FLASH_FCRIS) & FLASH_FCRIS_ARIS)
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Programs flash.
|
||||||
|
//!
|
||||||
|
//! \param pulData is a pointer to the data to be programmed.
|
||||||
|
//! \param ulAddress is the starting address in flash to be programmed. Must
|
||||||
|
//! be a multiple of four.
|
||||||
|
//! \param ulCount is the number of bytes to be programmed. Must be a multiple
|
||||||
|
//! of four.
|
||||||
|
//!
|
||||||
|
//! This function will program a sequence of words into the on-chip flash.
|
||||||
|
//! Programming each location consists of the result of an AND operation
|
||||||
|
//! of the new data and the existing data; in other words bits that contain
|
||||||
|
//! 1 can remain 1 or be changed to 0, but bits that are 0 cannot be changed
|
||||||
|
//! to 1. Therefore, a word can be programmed multiple times as long as these
|
||||||
|
//! rules are followed; if a program operation attempts to change a 0 bit to
|
||||||
|
//! a 1 bit, that bit will not have its value changed.
|
||||||
|
//!
|
||||||
|
//! Since the flash is programmed one word at a time, the starting address and
|
||||||
|
//! byte count must both be multiples of four. It is up to the caller to
|
||||||
|
//! verify the programmed contents, if such verification is required.
|
||||||
|
//!
|
||||||
|
//! This function will not return until the data has been programmed.
|
||||||
|
//!
|
||||||
|
//! \return Returns 0 on success, or -1 if a programming error is encountered.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
FlashProgram(unsigned long *pulData, unsigned long ulAddress,
|
||||||
|
unsigned long ulCount)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(!(ulAddress & 3));
|
||||||
|
ASSERT(!(ulCount & 3));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the flash access interrupt.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FCMISC) = FLASH_FCMISC_AMISC;
|
||||||
|
|
||||||
|
//
|
||||||
|
// See if this device has a write buffer.
|
||||||
|
//
|
||||||
|
if(HWREG(SYSCTL_NVMSTAT) & SYSCTL_NVMSTAT_FWB)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Loop over the words to be programmed.
|
||||||
|
//
|
||||||
|
while(ulCount)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set the address of this block of words.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FMA) = ulAddress & ~(0x7f);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Loop over the words in this 32-word block.
|
||||||
|
//
|
||||||
|
while(((ulAddress & 0x7c) || (HWREG(FLASH_FWBVAL) == 0)) &&
|
||||||
|
(ulCount != 0))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Write this word into the write buffer.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FWBN + (ulAddress & 0x7c)) = *pulData++;
|
||||||
|
ulAddress += 4;
|
||||||
|
ulCount -= 4;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Program the contents of the write buffer into flash.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FMC2) = FLASH_FMC2_WRKEY | FLASH_FMC2_WRBUF;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until the write buffer has been programmed.
|
||||||
|
//
|
||||||
|
while(HWREG(FLASH_FMC2) & FLASH_FMC2_WRBUF)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Loop over the words to be programmed.
|
||||||
|
//
|
||||||
|
while(ulCount)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Program the next word.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FMA) = ulAddress;
|
||||||
|
HWREG(FLASH_FMD) = *pulData;
|
||||||
|
HWREG(FLASH_FMC) = FLASH_FMC_WRKEY | FLASH_FMC_WRITE;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until the word has been programmed.
|
||||||
|
//
|
||||||
|
while(HWREG(FLASH_FMC) & FLASH_FMC_WRITE)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Increment to the next word.
|
||||||
|
//
|
||||||
|
pulData++;
|
||||||
|
ulAddress += 4;
|
||||||
|
ulCount -= 4;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return an error if an access violation occurred.
|
||||||
|
//
|
||||||
|
if(HWREG(FLASH_FCRIS) & FLASH_FCRIS_ARIS)
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Gets the protection setting for a block of flash.
|
||||||
|
//!
|
||||||
|
//! \param ulAddress is the start address of the flash block to be queried.
|
||||||
|
//!
|
||||||
|
//! This function will get the current protection for the specified 2 kB block
|
||||||
|
//! of flash. Each block can be read/write, read-only, or execute-only.
|
||||||
|
//! Read/write blocks can be read, executed, erased, and programmed. Read-only
|
||||||
|
//! blocks can be read and executed. Execute-only blocks can only be executed;
|
||||||
|
//! processor and debugger data reads are not allowed.
|
||||||
|
//!
|
||||||
|
//! \return Returns the protection setting for this block. See
|
||||||
|
//! FlashProtectSet() for possible values.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
tFlashProtection
|
||||||
|
FlashProtectGet(unsigned long ulAddress)
|
||||||
|
{
|
||||||
|
unsigned long ulFMPRE, ulFMPPE;
|
||||||
|
unsigned long ulBank;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the argument.
|
||||||
|
//
|
||||||
|
ASSERT(!(ulAddress & (FLASH_PROTECT_SIZE - 1)));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Calculate the Flash Bank from Base Address, and mask off the Bank
|
||||||
|
// from ulAddress for subsequent reference.
|
||||||
|
//
|
||||||
|
ulBank = (((ulAddress / FLASH_PROTECT_SIZE) / 32) % 4);
|
||||||
|
ulAddress &= ((FLASH_PROTECT_SIZE * 32) - 1);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read the appropriate flash protection registers for the specified
|
||||||
|
// flash bank.
|
||||||
|
//
|
||||||
|
ulFMPRE = HWREG(g_pulFMPRERegs[ulBank]);
|
||||||
|
ulFMPPE = HWREG(g_pulFMPPERegs[ulBank]);
|
||||||
|
|
||||||
|
//
|
||||||
|
// For Stellaris Sandstorm-class devices, revision C1 and C2, the upper
|
||||||
|
// bits of the FMPPE register are used for JTAG protect options, and are
|
||||||
|
// not available for the FLASH protection scheme. When Querying Block
|
||||||
|
// Protection, assume these bits are 1.
|
||||||
|
//
|
||||||
|
if(CLASS_IS_SANDSTORM && (REVISION_IS_C1 || REVISION_IS_C2))
|
||||||
|
{
|
||||||
|
ulFMPRE |= (FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the appropriate protection bits for the block of memory that
|
||||||
|
// is specified by the address.
|
||||||
|
//
|
||||||
|
switch((((ulFMPRE >> (ulAddress / FLASH_PROTECT_SIZE)) &
|
||||||
|
FLASH_FMP_BLOCK_0) << 1) |
|
||||||
|
((ulFMPPE >> (ulAddress / FLASH_PROTECT_SIZE)) & FLASH_FMP_BLOCK_0))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// This block is marked as execute only (that is, it can not be erased
|
||||||
|
// or programmed, and the only reads allowed are via the instruction
|
||||||
|
// fetch interface).
|
||||||
|
//
|
||||||
|
case 0:
|
||||||
|
case 1:
|
||||||
|
{
|
||||||
|
return(FlashExecuteOnly);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// This block is marked as read only (that is, it can not be erased or
|
||||||
|
// programmed).
|
||||||
|
//
|
||||||
|
case 2:
|
||||||
|
{
|
||||||
|
return(FlashReadOnly);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// This block is read/write; it can be read, erased, and programmed.
|
||||||
|
//
|
||||||
|
case 3:
|
||||||
|
default:
|
||||||
|
{
|
||||||
|
return(FlashReadWrite);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the protection setting for a block of flash.
|
||||||
|
//!
|
||||||
|
//! \param ulAddress is the start address of the flash block to be protected.
|
||||||
|
//! \param eProtect is the protection to be applied to the block. Can be one
|
||||||
|
//! of \b FlashReadWrite, \b FlashReadOnly, or \b FlashExecuteOnly.
|
||||||
|
//!
|
||||||
|
//! This function will set the protection for the specified 2 kB block of
|
||||||
|
//! flash. Blocks which are read/write can be made read-only or execute-only.
|
||||||
|
//! Blocks which are read-only can be made execute-only. Blocks which are
|
||||||
|
//! execute-only cannot have their protection modified. Attempts to make the
|
||||||
|
//! block protection less stringent (that is, read-only to read/write) will
|
||||||
|
//! result in a failure (and be prevented by the hardware).
|
||||||
|
//!
|
||||||
|
//! Changes to the flash protection are maintained only until the next reset.
|
||||||
|
//! This allows the application to be executed in the desired flash protection
|
||||||
|
//! environment to check for inappropriate flash access (via the flash
|
||||||
|
//! interrupt). To make the flash protection permanent, use the
|
||||||
|
//! FlashProtectSave() function.
|
||||||
|
//!
|
||||||
|
//! \return Returns 0 on success, or -1 if an invalid address or an invalid
|
||||||
|
//! protection was specified.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
FlashProtectSet(unsigned long ulAddress, tFlashProtection eProtect)
|
||||||
|
{
|
||||||
|
unsigned long ulProtectRE, ulProtectPE;
|
||||||
|
unsigned long ulBank;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the argument.
|
||||||
|
//
|
||||||
|
ASSERT(!(ulAddress & (FLASH_PROTECT_SIZE - 1)));
|
||||||
|
ASSERT((eProtect == FlashReadWrite) || (eProtect == FlashReadOnly) ||
|
||||||
|
(eProtect == FlashExecuteOnly));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Convert the address into a block number.
|
||||||
|
//
|
||||||
|
ulAddress /= FLASH_PROTECT_SIZE;
|
||||||
|
|
||||||
|
//
|
||||||
|
// ulAddress contains a "raw" block number. Derive the Flash Bank from
|
||||||
|
// the "raw" block number, and convert ulAddress to a "relative"
|
||||||
|
// block number.
|
||||||
|
//
|
||||||
|
ulBank = ((ulAddress / 32) % 4);
|
||||||
|
ulAddress %= 32;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the current protection for the specified flash bank.
|
||||||
|
//
|
||||||
|
ulProtectRE = HWREG(g_pulFMPRERegs[ulBank]);
|
||||||
|
ulProtectPE = HWREG(g_pulFMPPERegs[ulBank]);
|
||||||
|
|
||||||
|
//
|
||||||
|
// For Stellaris Sandstorm-class devices, revision C1 and C2, the upper
|
||||||
|
// bits of the FMPPE register are used for JTAG protect options, and are
|
||||||
|
// not available for the FLASH protection scheme. When setting protection,
|
||||||
|
// check to see if block 30 or 31 and protection is FlashExecuteOnly. If
|
||||||
|
// so, return an error condition.
|
||||||
|
//
|
||||||
|
if(CLASS_IS_SANDSTORM && (REVISION_IS_C1 || REVISION_IS_C2))
|
||||||
|
{
|
||||||
|
if((ulAddress >= 30) && (eProtect == FlashExecuteOnly))
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the protection based on the requested proection.
|
||||||
|
//
|
||||||
|
switch(eProtect)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Make this block execute only.
|
||||||
|
//
|
||||||
|
case FlashExecuteOnly:
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Turn off the read and program bits for this block.
|
||||||
|
//
|
||||||
|
ulProtectRE &= ~(FLASH_FMP_BLOCK_0 << ulAddress);
|
||||||
|
ulProtectPE &= ~(FLASH_FMP_BLOCK_0 << ulAddress);
|
||||||
|
|
||||||
|
//
|
||||||
|
// We're done handling this protection.
|
||||||
|
//
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Make this block read only.
|
||||||
|
//
|
||||||
|
case FlashReadOnly:
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// The block can not be made read only if it is execute only.
|
||||||
|
//
|
||||||
|
if(((ulProtectRE >> ulAddress) & FLASH_FMP_BLOCK_0) !=
|
||||||
|
FLASH_FMP_BLOCK_0)
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Make this block read only.
|
||||||
|
//
|
||||||
|
ulProtectPE &= ~(FLASH_FMP_BLOCK_0 << ulAddress);
|
||||||
|
|
||||||
|
//
|
||||||
|
// We're done handling this protection.
|
||||||
|
//
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Make this block read/write.
|
||||||
|
//
|
||||||
|
case FlashReadWrite:
|
||||||
|
default:
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// The block can not be made read/write if it is not already
|
||||||
|
// read/write.
|
||||||
|
//
|
||||||
|
if((((ulProtectRE >> ulAddress) & FLASH_FMP_BLOCK_0) !=
|
||||||
|
FLASH_FMP_BLOCK_0) ||
|
||||||
|
(((ulProtectPE >> ulAddress) & FLASH_FMP_BLOCK_0) !=
|
||||||
|
FLASH_FMP_BLOCK_0))
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// The block is already read/write, so there is nothing to do.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// For Stellaris Sandstorm-class devices, revision C1 and C2, the upper
|
||||||
|
// bits of the FMPPE register are used for JTAG options, and are not
|
||||||
|
// available for the FLASH protection scheme. When setting block
|
||||||
|
// protection, ensure that these bits are not altered.
|
||||||
|
//
|
||||||
|
if(CLASS_IS_SANDSTORM && (REVISION_IS_C1 || REVISION_IS_C2))
|
||||||
|
{
|
||||||
|
ulProtectRE &= ~(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30);
|
||||||
|
ulProtectRE |= (HWREG(g_pulFMPRERegs[ulBank]) &
|
||||||
|
(FLASH_FMP_BLOCK_31 | FLASH_FMP_BLOCK_30));
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the new protection for the specified flash bank.
|
||||||
|
//
|
||||||
|
HWREG(g_pulFMPRERegs[ulBank]) = ulProtectRE;
|
||||||
|
HWREG(g_pulFMPPERegs[ulBank]) = ulProtectPE;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Saves the flash protection settings.
|
||||||
|
//!
|
||||||
|
//! This function will make the currently programmed flash protection settings
|
||||||
|
//! permanent. This is a non-reversible operation; a chip reset or power cycle
|
||||||
|
//! will not change the flash protection.
|
||||||
|
//!
|
||||||
|
//! This function will not return until the protection has been saved.
|
||||||
|
//!
|
||||||
|
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
FlashProtectSave(void)
|
||||||
|
{
|
||||||
|
int ulTemp, ulLimit;
|
||||||
|
|
||||||
|
//
|
||||||
|
// If running on a Sandstorm-class device, only trigger a save of the first
|
||||||
|
// two protection registers (FMPRE and FMPPE). Otherwise, save the
|
||||||
|
// entire bank of flash protection registers.
|
||||||
|
//
|
||||||
|
ulLimit = CLASS_IS_SANDSTORM ? 2 : 8;
|
||||||
|
for(ulTemp = 0; ulTemp < ulLimit; ulTemp++)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Tell the flash controller to write the flash protection register.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FMA) = ulTemp;
|
||||||
|
HWREG(FLASH_FMC) = FLASH_FMC_WRKEY | FLASH_FMC_COMT;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until the write has completed.
|
||||||
|
//
|
||||||
|
while(HWREG(FLASH_FMC) & FLASH_FMC_COMT)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Gets the user registers.
|
||||||
|
//!
|
||||||
|
//! \param pulUser0 is a pointer to the location to store USER Register 0.
|
||||||
|
//! \param pulUser1 is a pointer to the location to store USER Register 1.
|
||||||
|
//!
|
||||||
|
//! This function will read the contents of user registers (0 and 1), and
|
||||||
|
//! store them in the specified locations.
|
||||||
|
//!
|
||||||
|
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
FlashUserGet(unsigned long *pulUser0, unsigned long *pulUser1)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Verify that the pointers are valid.
|
||||||
|
//
|
||||||
|
ASSERT(pulUser0 != 0);
|
||||||
|
ASSERT(pulUser1 != 0);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Verify that hardware supports user registers.
|
||||||
|
//
|
||||||
|
if(CLASS_IS_SANDSTORM)
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get and store the current value of the user registers.
|
||||||
|
//
|
||||||
|
*pulUser0 = HWREG(FLASH_USERREG0);
|
||||||
|
*pulUser1 = HWREG(FLASH_USERREG1);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the user registers.
|
||||||
|
//!
|
||||||
|
//! \param ulUser0 is the value to store in USER Register 0.
|
||||||
|
//! \param ulUser1 is the value to store in USER Register 1.
|
||||||
|
//!
|
||||||
|
//! This function will set the contents of the user registers (0 and 1) to
|
||||||
|
//! the specified values.
|
||||||
|
//!
|
||||||
|
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
FlashUserSet(unsigned long ulUser0, unsigned long ulUser1)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Verify that hardware supports user registers.
|
||||||
|
//
|
||||||
|
if(CLASS_IS_SANDSTORM)
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Save the new values into the user registers.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_USERREG0) = ulUser0;
|
||||||
|
HWREG(FLASH_USERREG1) = ulUser1;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Saves the user registers.
|
||||||
|
//!
|
||||||
|
//! This function will make the currently programmed user register settings
|
||||||
|
//! permanent. This is a non-reversible operation; a chip reset or power cycle
|
||||||
|
//! will not change this setting.
|
||||||
|
//!
|
||||||
|
//! This function will not return until the protection has been saved.
|
||||||
|
//!
|
||||||
|
//! \return Returns 0 on success, or -1 if a hardware error is encountered.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
FlashUserSave(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Verify that hardware supports user registers.
|
||||||
|
//
|
||||||
|
if(CLASS_IS_SANDSTORM)
|
||||||
|
{
|
||||||
|
return(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Setting the MSB of FMA will trigger a permanent save of a USER
|
||||||
|
// register. Bit 0 will indicate User 0 (0) or User 1 (1).
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FMA) = 0x80000000;
|
||||||
|
HWREG(FLASH_FMC) = FLASH_FMC_WRKEY | FLASH_FMC_COMT;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until the write has completed.
|
||||||
|
//
|
||||||
|
while(HWREG(FLASH_FMC) & FLASH_FMC_COMT)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Tell the flash controller to write the USER1 Register.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FMA) = 0x80000001;
|
||||||
|
HWREG(FLASH_FMC) = FLASH_FMC_WRKEY | FLASH_FMC_COMT;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until the write has completed.
|
||||||
|
//
|
||||||
|
while(HWREG(FLASH_FMC) & FLASH_FMC_COMT)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success.
|
||||||
|
//
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Registers an interrupt handler for the flash interrupt.
|
||||||
|
//!
|
||||||
|
//! \param pfnHandler is a pointer to the function to be called when the flash
|
||||||
|
//! interrupt occurs.
|
||||||
|
//!
|
||||||
|
//! This sets the handler to be called when the flash interrupt occurs. The
|
||||||
|
//! flash controller can generate an interrupt when an invalid flash access
|
||||||
|
//! occurs, such as trying to program or erase a read-only block, or trying to
|
||||||
|
//! read from an execute-only block. It can also generate an interrupt when a
|
||||||
|
//! program or erase operation has completed. The interrupt will be
|
||||||
|
//! automatically enabled when the handler is registered.
|
||||||
|
//!
|
||||||
|
//! \sa IntRegister() for important information about registering interrupt
|
||||||
|
//! handlers.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
FlashIntRegister(void (*pfnHandler)(void))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Register the interrupt handler, returning an error if an error occurs.
|
||||||
|
//
|
||||||
|
IntRegister(INT_FLASH, pfnHandler);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable the flash interrupt.
|
||||||
|
//
|
||||||
|
IntEnable(INT_FLASH);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Unregisters the interrupt handler for the flash interrupt.
|
||||||
|
//!
|
||||||
|
//! This function will clear the handler to be called when the flash interrupt
|
||||||
|
//! occurs. This will also mask off the interrupt in the interrupt controller
|
||||||
|
//! so that the interrupt handler is no longer called.
|
||||||
|
//!
|
||||||
|
//! \sa IntRegister() for important information about registering interrupt
|
||||||
|
//! handlers.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
FlashIntUnregister(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the interrupt.
|
||||||
|
//
|
||||||
|
IntDisable(INT_FLASH);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Unregister the interrupt handler.
|
||||||
|
//
|
||||||
|
IntUnregister(INT_FLASH);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enables individual flash controller interrupt sources.
|
||||||
|
//!
|
||||||
|
//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
|
||||||
|
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_ACCESS values.
|
||||||
|
//!
|
||||||
|
//! Enables the indicated flash controller interrupt sources. Only the sources
|
||||||
|
//! that are enabled can be reflected to the processor interrupt; disabled
|
||||||
|
//! sources have no effect on the processor.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
FlashIntEnable(unsigned long ulIntFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable the specified interrupts.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FCIM) |= ulIntFlags;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disables individual flash controller interrupt sources.
|
||||||
|
//!
|
||||||
|
//! \param ulIntFlags is a bit mask of the interrupt sources to be disabled.
|
||||||
|
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_ACCESS values.
|
||||||
|
//!
|
||||||
|
//! Disables the indicated flash controller interrupt sources. Only the
|
||||||
|
//! sources that are enabled can be reflected to the processor interrupt;
|
||||||
|
//! disabled sources have no effect on the processor.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
FlashIntDisable(unsigned long ulIntFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the specified interrupts.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FCIM) &= ~(ulIntFlags);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Gets the current interrupt status.
|
||||||
|
//!
|
||||||
|
//! \param bMasked is false if the raw interrupt status is required and true if
|
||||||
|
//! the masked interrupt status is required.
|
||||||
|
//!
|
||||||
|
//! This returns the interrupt status for the flash controller. Either the raw
|
||||||
|
//! interrupt status or the status of interrupts that are allowed to reflect to
|
||||||
|
//! the processor can be returned.
|
||||||
|
//!
|
||||||
|
//! \return The current interrupt status, enumerated as a bit field of
|
||||||
|
//! \b FLASH_INT_PROGRAM and \b FLASH_INT_ACCESS.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
unsigned long
|
||||||
|
FlashIntStatus(tBoolean bMasked)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Return either the interrupt status or the raw interrupt status as
|
||||||
|
// requested.
|
||||||
|
//
|
||||||
|
if(bMasked)
|
||||||
|
{
|
||||||
|
return(HWREG(FLASH_FCMISC));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return(HWREG(FLASH_FCRIS));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Clears flash controller interrupt sources.
|
||||||
|
//!
|
||||||
|
//! \param ulIntFlags is the bit mask of the interrupt sources to be cleared.
|
||||||
|
//! Can be any of the \b FLASH_INT_PROGRAM or \b FLASH_INT_AMISC values.
|
||||||
|
//!
|
||||||
|
//! The specified flash controller interrupt sources are cleared, so that they
|
||||||
|
//! no longer assert. This must be done in the interrupt handler to keep it
|
||||||
|
//! from being called again immediately upon exit.
|
||||||
|
//!
|
||||||
|
//! \note Because there is a write buffer in the Cortex-M3 processor, it may
|
||||||
|
//! take several clock cycles before the interrupt source is actually cleared.
|
||||||
|
//! Therefore, it is recommended that the interrupt source be cleared early in
|
||||||
|
//! the interrupt handler (as opposed to the very last action) to avoid
|
||||||
|
//! returning from the interrupt handler before the interrupt source is
|
||||||
|
//! actually cleared. Failure to do so may result in the interrupt handler
|
||||||
|
//! being immediately reentered (because the interrupt controller still sees
|
||||||
|
//! the interrupt source asserted).
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
FlashIntClear(unsigned long ulIntFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Clear the flash interrupt.
|
||||||
|
//
|
||||||
|
HWREG(FLASH_FCMISC) = ulIntFlags;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
|
@ -0,0 +1,106 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// flash.h - Prototypes for the flash driver.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __FLASH_H__
|
||||||
|
#define __FLASH_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to FlashProtectSet(), and returned by
|
||||||
|
// FlashProtectGet().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
FlashReadWrite, // Flash can be read and written
|
||||||
|
FlashReadOnly, // Flash can only be read
|
||||||
|
FlashExecuteOnly // Flash can only be executed
|
||||||
|
}
|
||||||
|
tFlashProtection;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values passed to FlashIntEnable(), FlashIntDisable() and FlashIntClear() and
|
||||||
|
// returned from FlashIntStatus().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_INT_PROGRAM 0x00000002 // Programming Interrupt Mask
|
||||||
|
#define FLASH_INT_ACCESS 0x00000001 // Access Interrupt Mask
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern unsigned long FlashUsecGet(void);
|
||||||
|
extern void FlashUsecSet(unsigned long ulClocks);
|
||||||
|
extern long FlashClear(unsigned long ulAddress);
|
||||||
|
extern long FlashProgram(unsigned long *pulData, unsigned long ulAddress,
|
||||||
|
unsigned long ulCount);
|
||||||
|
extern tFlashProtection FlashProtectGet(unsigned long ulAddress);
|
||||||
|
extern long FlashProtectSet(unsigned long ulAddress,
|
||||||
|
tFlashProtection eProtect);
|
||||||
|
extern long FlashProtectSave(void);
|
||||||
|
extern long FlashUserGet(unsigned long *pulUser0, unsigned long *pulUser1);
|
||||||
|
extern long FlashUserSet(unsigned long ulUser0, unsigned long ulUser1);
|
||||||
|
extern long FlashUserSave(void);
|
||||||
|
extern void FlashIntRegister(void (*pfnHandler)(void));
|
||||||
|
extern void FlashIntUnregister(void);
|
||||||
|
extern void FlashIntEnable(unsigned long ulIntFlags);
|
||||||
|
extern void FlashIntDisable(unsigned long ulIntFlags);
|
||||||
|
extern unsigned long FlashIntStatus(tBoolean bMasked);
|
||||||
|
extern void FlashIntClear(unsigned long ulIntFlags);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Deprecated function names. These definitions ensure backwards compatibility
|
||||||
|
// but new code should avoid using deprecated function names since these will
|
||||||
|
// be removed at some point in the future.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define FlashIntGetStatus FlashIntStatus
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __FLASH_H__
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,767 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// gpio.h - Defines and Macros for GPIO API.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __GPIO_H__
|
||||||
|
#define __GPIO_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following values define the bit field for the ucPins argument to several
|
||||||
|
// of the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PIN_0 0x00000001 // GPIO pin 0
|
||||||
|
#define GPIO_PIN_1 0x00000002 // GPIO pin 1
|
||||||
|
#define GPIO_PIN_2 0x00000004 // GPIO pin 2
|
||||||
|
#define GPIO_PIN_3 0x00000008 // GPIO pin 3
|
||||||
|
#define GPIO_PIN_4 0x00000010 // GPIO pin 4
|
||||||
|
#define GPIO_PIN_5 0x00000020 // GPIO pin 5
|
||||||
|
#define GPIO_PIN_6 0x00000040 // GPIO pin 6
|
||||||
|
#define GPIO_PIN_7 0x00000080 // GPIO pin 7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to GPIODirModeSet as the ulPinIO parameter, and
|
||||||
|
// returned from GPIODirModeGet.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_DIR_MODE_IN 0x00000000 // Pin is a GPIO input
|
||||||
|
#define GPIO_DIR_MODE_OUT 0x00000001 // Pin is a GPIO output
|
||||||
|
#define GPIO_DIR_MODE_HW 0x00000002 // Pin is a peripheral function
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to GPIOIntTypeSet as the ulIntType parameter, and
|
||||||
|
// returned from GPIOIntTypeGet.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_FALLING_EDGE 0x00000000 // Interrupt on falling edge
|
||||||
|
#define GPIO_RISING_EDGE 0x00000004 // Interrupt on rising edge
|
||||||
|
#define GPIO_BOTH_EDGES 0x00000001 // Interrupt on both edges
|
||||||
|
#define GPIO_LOW_LEVEL 0x00000002 // Interrupt on low level
|
||||||
|
#define GPIO_HIGH_LEVEL 0x00000007 // Interrupt on high level
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to GPIOPadConfigSet as the ulStrength parameter,
|
||||||
|
// and returned by GPIOPadConfigGet in the *pulStrength parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_STRENGTH_2MA 0x00000001 // 2mA drive strength
|
||||||
|
#define GPIO_STRENGTH_4MA 0x00000002 // 4mA drive strength
|
||||||
|
#define GPIO_STRENGTH_8MA 0x00000004 // 8mA drive strength
|
||||||
|
#define GPIO_STRENGTH_8MA_SC 0x0000000C // 8mA drive with slew rate control
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to GPIOPadConfigSet as the ulPadType parameter,
|
||||||
|
// and returned by GPIOPadConfigGet in the *pulPadType parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PIN_TYPE_STD 0x00000008 // Push-pull
|
||||||
|
#define GPIO_PIN_TYPE_STD_WPU 0x0000000A // Push-pull with weak pull-up
|
||||||
|
#define GPIO_PIN_TYPE_STD_WPD 0x0000000C // Push-pull with weak pull-down
|
||||||
|
#define GPIO_PIN_TYPE_OD 0x00000009 // Open-drain
|
||||||
|
#define GPIO_PIN_TYPE_OD_WPU 0x0000000B // Open-drain with weak pull-up
|
||||||
|
#define GPIO_PIN_TYPE_OD_WPD 0x0000000D // Open-drain with weak pull-down
|
||||||
|
#define GPIO_PIN_TYPE_ANALOG 0x00000000 // Analog comparator
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to GPIOPinConfigure as the ulPinConfig parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO pin A0
|
||||||
|
//
|
||||||
|
#define GPIO_PA0_U0RX 0x00000001
|
||||||
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
||||||
|
#define GPIO_PA0_U1RX 0x00000009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin A1
|
||||||
|
//
|
||||||
|
#define GPIO_PA1_U0TX 0x00000401
|
||||||
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
||||||
|
#define GPIO_PA1_U1TX 0x00000409
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin A2
|
||||||
|
//
|
||||||
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
||||||
|
#define GPIO_PA2_PWM4 0x00000804
|
||||||
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin A3
|
||||||
|
//
|
||||||
|
#define GPIO_PA3_SSI0FSS 0x00000c01
|
||||||
|
#define GPIO_PA3_PWM5 0x00000c04
|
||||||
|
#define GPIO_PA3_I2S0RXMCLK 0x00000c09
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin A4
|
||||||
|
//
|
||||||
|
#define GPIO_PA4_SSI0RX 0x00001001
|
||||||
|
#define GPIO_PA4_PWM6 0x00001004
|
||||||
|
#define GPIO_PA4_CAN0RX 0x00001005
|
||||||
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin A5
|
||||||
|
//
|
||||||
|
#define GPIO_PA5_SSI0TX 0x00001401
|
||||||
|
#define GPIO_PA5_PWM7 0x00001404
|
||||||
|
#define GPIO_PA5_CAN0TX 0x00001405
|
||||||
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin A6
|
||||||
|
//
|
||||||
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
||||||
|
#define GPIO_PA6_CCP1 0x00001802
|
||||||
|
#define GPIO_PA6_PWM0 0x00001804
|
||||||
|
#define GPIO_PA6_PWM4 0x00001805
|
||||||
|
#define GPIO_PA6_CAN0RX 0x00001806
|
||||||
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
||||||
|
#define GPIO_PA6_U1CTS 0x00001809
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin A7
|
||||||
|
//
|
||||||
|
#define GPIO_PA7_I2C1SDA 0x00001c01
|
||||||
|
#define GPIO_PA7_CCP4 0x00001c02
|
||||||
|
#define GPIO_PA7_PWM1 0x00001c04
|
||||||
|
#define GPIO_PA7_PWM5 0x00001c05
|
||||||
|
#define GPIO_PA7_CAN0TX 0x00001c06
|
||||||
|
#define GPIO_PA7_CCP3 0x00001c07
|
||||||
|
#define GPIO_PA7_USB0PFLT 0x00001c08
|
||||||
|
#define GPIO_PA7_U1DCD 0x00001c09
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B0
|
||||||
|
//
|
||||||
|
#define GPIO_PB0_CCP0 0x00010001
|
||||||
|
#define GPIO_PB0_PWM2 0x00010002
|
||||||
|
#define GPIO_PB0_U1RX 0x00010005
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B1
|
||||||
|
//
|
||||||
|
#define GPIO_PB1_CCP2 0x00010401
|
||||||
|
#define GPIO_PB1_PWM3 0x00010402
|
||||||
|
#define GPIO_PB1_CCP1 0x00010404
|
||||||
|
#define GPIO_PB1_U1TX 0x00010405
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B2
|
||||||
|
//
|
||||||
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
||||||
|
#define GPIO_PB2_IDX0 0x00010802
|
||||||
|
#define GPIO_PB2_CCP3 0x00010804
|
||||||
|
#define GPIO_PB2_CCP0 0x00010805
|
||||||
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B3
|
||||||
|
//
|
||||||
|
#define GPIO_PB3_I2C0SDA 0x00010c01
|
||||||
|
#define GPIO_PB3_FAULT0 0x00010c02
|
||||||
|
#define GPIO_PB3_FAULT3 0x00010c04
|
||||||
|
#define GPIO_PB3_USB0PFLT 0x00010c08
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B4
|
||||||
|
//
|
||||||
|
#define GPIO_PB4_U2RX 0x00011004
|
||||||
|
#define GPIO_PB4_CAN0RX 0x00011005
|
||||||
|
#define GPIO_PB4_IDX0 0x00011006
|
||||||
|
#define GPIO_PB4_U1RX 0x00011007
|
||||||
|
#define GPIO_PB4_EPI0S23 0x00011008
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B5
|
||||||
|
//
|
||||||
|
#define GPIO_PB5_C0O 0x00011401
|
||||||
|
#define GPIO_PB5_CCP5 0x00011402
|
||||||
|
#define GPIO_PB5_CCP6 0x00011403
|
||||||
|
#define GPIO_PB5_CCP0 0x00011404
|
||||||
|
#define GPIO_PB5_CAN0TX 0x00011405
|
||||||
|
#define GPIO_PB5_CCP2 0x00011406
|
||||||
|
#define GPIO_PB5_U1TX 0x00011407
|
||||||
|
#define GPIO_PB5_EPI0S22 0x00011408
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B6
|
||||||
|
//
|
||||||
|
#define GPIO_PB6_CCP1 0x00011801
|
||||||
|
#define GPIO_PB6_CCP7 0x00011802
|
||||||
|
#define GPIO_PB6_C0O 0x00011803
|
||||||
|
#define GPIO_PB6_FAULT1 0x00011804
|
||||||
|
#define GPIO_PB6_IDX0 0x00011805
|
||||||
|
#define GPIO_PB6_CCP5 0x00011806
|
||||||
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin B7
|
||||||
|
//
|
||||||
|
#define GPIO_PB7_NMI 0x00011c04
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C0
|
||||||
|
//
|
||||||
|
#define GPIO_PC0_TCK 0x00020003
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C1
|
||||||
|
//
|
||||||
|
#define GPIO_PC1_TMS 0x00020403
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C2
|
||||||
|
//
|
||||||
|
#define GPIO_PC2_TDI 0x00020803
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C3
|
||||||
|
//
|
||||||
|
#define GPIO_PC3_TDO 0x00020c03
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C4
|
||||||
|
//
|
||||||
|
#define GPIO_PC4_CCP5 0x00021001
|
||||||
|
#define GPIO_PC4_PHA0 0x00021002
|
||||||
|
#define GPIO_PC4_PWM6 0x00021004
|
||||||
|
#define GPIO_PC4_CCP2 0x00021005
|
||||||
|
#define GPIO_PC4_CCP4 0x00021006
|
||||||
|
#define GPIO_PC4_EPI0S2 0x00021008
|
||||||
|
#define GPIO_PC4_CCP1 0x00021009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C5
|
||||||
|
//
|
||||||
|
#define GPIO_PC5_CCP1 0x00021401
|
||||||
|
#define GPIO_PC5_C1O 0x00021402
|
||||||
|
#define GPIO_PC5_C0O 0x00021403
|
||||||
|
#define GPIO_PC5_FAULT2 0x00021404
|
||||||
|
#define GPIO_PC5_CCP3 0x00021405
|
||||||
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
||||||
|
#define GPIO_PC5_EPI0S3 0x00021408
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C6
|
||||||
|
//
|
||||||
|
#define GPIO_PC6_CCP3 0x00021801
|
||||||
|
#define GPIO_PC6_PHB0 0x00021802
|
||||||
|
#define GPIO_PC6_C2O 0x00021803
|
||||||
|
#define GPIO_PC6_PWM7 0x00021804
|
||||||
|
#define GPIO_PC6_U1RX 0x00021805
|
||||||
|
#define GPIO_PC6_CCP0 0x00021806
|
||||||
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
||||||
|
#define GPIO_PC6_EPI0S4 0x00021808
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin C7
|
||||||
|
//
|
||||||
|
#define GPIO_PC7_CCP4 0x00021c01
|
||||||
|
#define GPIO_PC7_PHB0 0x00021c02
|
||||||
|
#define GPIO_PC7_CCP0 0x00021c04
|
||||||
|
#define GPIO_PC7_U1TX 0x00021c05
|
||||||
|
#define GPIO_PC7_USB0PFLT 0x00021c06
|
||||||
|
#define GPIO_PC7_C1O 0x00021c07
|
||||||
|
#define GPIO_PC7_EPI0S5 0x00021c08
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D0
|
||||||
|
//
|
||||||
|
#define GPIO_PD0_PWM0 0x00030001
|
||||||
|
#define GPIO_PD0_CAN0RX 0x00030002
|
||||||
|
#define GPIO_PD0_IDX0 0x00030003
|
||||||
|
#define GPIO_PD0_U2RX 0x00030004
|
||||||
|
#define GPIO_PD0_U1RX 0x00030005
|
||||||
|
#define GPIO_PD0_CCP6 0x00030006
|
||||||
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
||||||
|
#define GPIO_PD0_U1CTS 0x00030009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D1
|
||||||
|
//
|
||||||
|
#define GPIO_PD1_PWM1 0x00030401
|
||||||
|
#define GPIO_PD1_CAN0TX 0x00030402
|
||||||
|
#define GPIO_PD1_PHA0 0x00030403
|
||||||
|
#define GPIO_PD1_U2TX 0x00030404
|
||||||
|
#define GPIO_PD1_U1TX 0x00030405
|
||||||
|
#define GPIO_PD1_CCP7 0x00030406
|
||||||
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
||||||
|
#define GPIO_PD1_U1DCD 0x00030409
|
||||||
|
#define GPIO_PD1_CCP2 0x0003040a
|
||||||
|
#define GPIO_PD1_PHB1 0x0003040b
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D2
|
||||||
|
//
|
||||||
|
#define GPIO_PD2_U1RX 0x00030801
|
||||||
|
#define GPIO_PD2_CCP6 0x00030802
|
||||||
|
#define GPIO_PD2_PWM2 0x00030803
|
||||||
|
#define GPIO_PD2_CCP5 0x00030804
|
||||||
|
#define GPIO_PD2_EPI0S20 0x00030808
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D3
|
||||||
|
//
|
||||||
|
#define GPIO_PD3_U1TX 0x00030c01
|
||||||
|
#define GPIO_PD3_CCP7 0x00030c02
|
||||||
|
#define GPIO_PD3_PWM3 0x00030c03
|
||||||
|
#define GPIO_PD3_CCP0 0x00030c04
|
||||||
|
#define GPIO_PD3_EPI0S21 0x00030c08
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D4
|
||||||
|
//
|
||||||
|
#define GPIO_PD4_CCP0 0x00031001
|
||||||
|
#define GPIO_PD4_CCP3 0x00031002
|
||||||
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
||||||
|
#define GPIO_PD4_U1RI 0x00031009
|
||||||
|
#define GPIO_PD4_EPI0S19 0x0003100a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D5
|
||||||
|
//
|
||||||
|
#define GPIO_PD5_CCP2 0x00031401
|
||||||
|
#define GPIO_PD5_CCP4 0x00031402
|
||||||
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
||||||
|
#define GPIO_PD5_U2RX 0x00031409
|
||||||
|
#define GPIO_PD5_EPI0S28 0x0003140a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D6
|
||||||
|
//
|
||||||
|
#define GPIO_PD6_FAULT0 0x00031801
|
||||||
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
||||||
|
#define GPIO_PD6_U2TX 0x00031809
|
||||||
|
#define GPIO_PD6_EPI0S29 0x0003180a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin D7
|
||||||
|
//
|
||||||
|
#define GPIO_PD7_IDX0 0x00031c01
|
||||||
|
#define GPIO_PD7_C0O 0x00031c02
|
||||||
|
#define GPIO_PD7_CCP1 0x00031c03
|
||||||
|
#define GPIO_PD7_I2S0TXWS 0x00031c08
|
||||||
|
#define GPIO_PD7_U1DTR 0x00031c09
|
||||||
|
#define GPIO_PD7_EPI0S30 0x00031c0a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E0
|
||||||
|
//
|
||||||
|
#define GPIO_PE0_PWM4 0x00040001
|
||||||
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
||||||
|
#define GPIO_PE0_CCP3 0x00040003
|
||||||
|
#define GPIO_PE0_EPI0S8 0x00040008
|
||||||
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E1
|
||||||
|
//
|
||||||
|
#define GPIO_PE1_PWM5 0x00040401
|
||||||
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
||||||
|
#define GPIO_PE1_FAULT0 0x00040403
|
||||||
|
#define GPIO_PE1_CCP2 0x00040404
|
||||||
|
#define GPIO_PE1_CCP6 0x00040405
|
||||||
|
#define GPIO_PE1_EPI0S9 0x00040408
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E2
|
||||||
|
//
|
||||||
|
#define GPIO_PE2_CCP4 0x00040801
|
||||||
|
#define GPIO_PE2_SSI1RX 0x00040802
|
||||||
|
#define GPIO_PE2_PHB1 0x00040803
|
||||||
|
#define GPIO_PE2_PHA0 0x00040804
|
||||||
|
#define GPIO_PE2_CCP2 0x00040805
|
||||||
|
#define GPIO_PE2_EPI0S24 0x00040808
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E3
|
||||||
|
//
|
||||||
|
#define GPIO_PE3_CCP1 0x00040c01
|
||||||
|
#define GPIO_PE3_SSI1TX 0x00040c02
|
||||||
|
#define GPIO_PE3_PHA1 0x00040c03
|
||||||
|
#define GPIO_PE3_PHB0 0x00040c04
|
||||||
|
#define GPIO_PE3_CCP7 0x00040c05
|
||||||
|
#define GPIO_PE3_EPI0S25 0x00040c08
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E4
|
||||||
|
//
|
||||||
|
#define GPIO_PE4_CCP3 0x00041001
|
||||||
|
#define GPIO_PE4_FAULT0 0x00041004
|
||||||
|
#define GPIO_PE4_U2TX 0x00041005
|
||||||
|
#define GPIO_PE4_CCP2 0x00041006
|
||||||
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E5
|
||||||
|
//
|
||||||
|
#define GPIO_PE5_CCP5 0x00041401
|
||||||
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E6
|
||||||
|
//
|
||||||
|
#define GPIO_PE6_PWM4 0x00041801
|
||||||
|
#define GPIO_PE6_C1O 0x00041802
|
||||||
|
#define GPIO_PE6_U1CTS 0x00041809
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin E7
|
||||||
|
//
|
||||||
|
#define GPIO_PE7_PWM5 0x00041c01
|
||||||
|
#define GPIO_PE7_C2O 0x00041c02
|
||||||
|
#define GPIO_PE7_U1DCD 0x00041c09
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F0
|
||||||
|
//
|
||||||
|
#define GPIO_PF0_CAN1RX 0x00050001
|
||||||
|
#define GPIO_PF0_PHB0 0x00050002
|
||||||
|
#define GPIO_PF0_PWM0 0x00050003
|
||||||
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
||||||
|
#define GPIO_PF0_U1DSR 0x00050009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F1
|
||||||
|
//
|
||||||
|
#define GPIO_PF1_CAN1TX 0x00050401
|
||||||
|
#define GPIO_PF1_IDX1 0x00050402
|
||||||
|
#define GPIO_PF1_PWM1 0x00050403
|
||||||
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
||||||
|
#define GPIO_PF1_U1RTS 0x00050409
|
||||||
|
#define GPIO_PF1_CCP3 0x0005040a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F2
|
||||||
|
//
|
||||||
|
#define GPIO_PF2_LED1 0x00050801
|
||||||
|
#define GPIO_PF2_PWM4 0x00050802
|
||||||
|
#define GPIO_PF2_PWM2 0x00050804
|
||||||
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F3
|
||||||
|
//
|
||||||
|
#define GPIO_PF3_LED0 0x00050c01
|
||||||
|
#define GPIO_PF3_PWM5 0x00050c02
|
||||||
|
#define GPIO_PF3_PWM3 0x00050c04
|
||||||
|
#define GPIO_PF3_SSI1FSS 0x00050c09
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F4
|
||||||
|
//
|
||||||
|
#define GPIO_PF4_CCP0 0x00051001
|
||||||
|
#define GPIO_PF4_C0O 0x00051002
|
||||||
|
#define GPIO_PF4_FAULT0 0x00051004
|
||||||
|
#define GPIO_PF4_EPI0S12 0x00051008
|
||||||
|
#define GPIO_PF4_SSI1RX 0x00051009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F5
|
||||||
|
//
|
||||||
|
#define GPIO_PF5_CCP2 0x00051401
|
||||||
|
#define GPIO_PF5_C1O 0x00051402
|
||||||
|
#define GPIO_PF5_EPI0S15 0x00051408
|
||||||
|
#define GPIO_PF5_SSI1TX 0x00051409
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F6
|
||||||
|
//
|
||||||
|
#define GPIO_PF6_CCP1 0x00051801
|
||||||
|
#define GPIO_PF6_C2O 0x00051802
|
||||||
|
#define GPIO_PF6_PHA0 0x00051804
|
||||||
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
||||||
|
#define GPIO_PF6_U1RTS 0x0005180a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin F7
|
||||||
|
//
|
||||||
|
#define GPIO_PF7_CCP4 0x00051c01
|
||||||
|
#define GPIO_PF7_PHB0 0x00051c04
|
||||||
|
#define GPIO_PF7_EPI0S12 0x00051c08
|
||||||
|
#define GPIO_PF7_FAULT1 0x00051c09
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G0
|
||||||
|
//
|
||||||
|
#define GPIO_PG0_U2RX 0x00060001
|
||||||
|
#define GPIO_PG0_PWM0 0x00060002
|
||||||
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
||||||
|
#define GPIO_PG0_PWM4 0x00060004
|
||||||
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
||||||
|
#define GPIO_PG0_EPI0S13 0x00060008
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G1
|
||||||
|
//
|
||||||
|
#define GPIO_PG1_U2TX 0x00060401
|
||||||
|
#define GPIO_PG1_PWM1 0x00060402
|
||||||
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
||||||
|
#define GPIO_PG1_PWM5 0x00060404
|
||||||
|
#define GPIO_PG1_EPI0S14 0x00060408
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G2
|
||||||
|
//
|
||||||
|
#define GPIO_PG2_PWM0 0x00060801
|
||||||
|
#define GPIO_PG2_FAULT0 0x00060804
|
||||||
|
#define GPIO_PG2_IDX1 0x00060808
|
||||||
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G3
|
||||||
|
//
|
||||||
|
#define GPIO_PG3_PWM1 0x00060c01
|
||||||
|
#define GPIO_PG3_FAULT2 0x00060c04
|
||||||
|
#define GPIO_PG3_FAULT0 0x00060c08
|
||||||
|
#define GPIO_PG3_I2S0RXMCLK 0x00060c09
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G4
|
||||||
|
//
|
||||||
|
#define GPIO_PG4_CCP3 0x00061001
|
||||||
|
#define GPIO_PG4_FAULT1 0x00061004
|
||||||
|
#define GPIO_PG4_EPI0S15 0x00061008
|
||||||
|
#define GPIO_PG4_PWM6 0x00061009
|
||||||
|
#define GPIO_PG4_U1RI 0x0006100a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G5
|
||||||
|
//
|
||||||
|
#define GPIO_PG5_CCP5 0x00061401
|
||||||
|
#define GPIO_PG5_IDX0 0x00061404
|
||||||
|
#define GPIO_PG5_FAULT1 0x00061405
|
||||||
|
#define GPIO_PG5_PWM7 0x00061408
|
||||||
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
||||||
|
#define GPIO_PG5_U1DTR 0x0006140a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G6
|
||||||
|
//
|
||||||
|
#define GPIO_PG6_PHA1 0x00061801
|
||||||
|
#define GPIO_PG6_PWM6 0x00061804
|
||||||
|
#define GPIO_PG6_FAULT1 0x00061808
|
||||||
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
||||||
|
#define GPIO_PG6_U1RI 0x0006180a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin G7
|
||||||
|
//
|
||||||
|
#define GPIO_PG7_PHB1 0x00061c01
|
||||||
|
#define GPIO_PG7_PWM7 0x00061c04
|
||||||
|
#define GPIO_PG7_CCP5 0x00061c08
|
||||||
|
#define GPIO_PG7_EPI0S31 0x00061c09
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H0
|
||||||
|
//
|
||||||
|
#define GPIO_PH0_CCP6 0x00070001
|
||||||
|
#define GPIO_PH0_PWM2 0x00070002
|
||||||
|
#define GPIO_PH0_EPI0S6 0x00070008
|
||||||
|
#define GPIO_PH0_PWM4 0x00070009
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H1
|
||||||
|
//
|
||||||
|
#define GPIO_PH1_CCP7 0x00070401
|
||||||
|
#define GPIO_PH1_PWM3 0x00070402
|
||||||
|
#define GPIO_PH1_EPI0S7 0x00070408
|
||||||
|
#define GPIO_PH1_PWM5 0x00070409
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H2
|
||||||
|
//
|
||||||
|
#define GPIO_PH2_IDX1 0x00070801
|
||||||
|
#define GPIO_PH2_C1O 0x00070802
|
||||||
|
#define GPIO_PH2_FAULT3 0x00070804
|
||||||
|
#define GPIO_PH2_EPI0S1 0x00070808
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H3
|
||||||
|
//
|
||||||
|
#define GPIO_PH3_PHB0 0x00070c01
|
||||||
|
#define GPIO_PH3_FAULT0 0x00070c02
|
||||||
|
#define GPIO_PH3_USB0EPEN 0x00070c04
|
||||||
|
#define GPIO_PH3_EPI0S0 0x00070c08
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H4
|
||||||
|
//
|
||||||
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
||||||
|
#define GPIO_PH4_EPI0S10 0x00071008
|
||||||
|
#define GPIO_PH4_SSI1CLK 0x0007100b
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H5
|
||||||
|
//
|
||||||
|
#define GPIO_PH5_EPI0S11 0x00071408
|
||||||
|
#define GPIO_PH5_FAULT2 0x0007140a
|
||||||
|
#define GPIO_PH5_SSI1FSS 0x0007140b
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H6
|
||||||
|
//
|
||||||
|
#define GPIO_PH6_EPI0S26 0x00071808
|
||||||
|
#define GPIO_PH6_PWM4 0x0007180a
|
||||||
|
#define GPIO_PH6_SSI1RX 0x0007180b
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin H7
|
||||||
|
//
|
||||||
|
#define GPIO_PH7_EPI0S27 0x00071c08
|
||||||
|
#define GPIO_PH7_PWM5 0x00071c0a
|
||||||
|
#define GPIO_PH7_SSI1TX 0x00071c0b
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J0
|
||||||
|
//
|
||||||
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
||||||
|
#define GPIO_PJ0_PWM0 0x0008000a
|
||||||
|
#define GPIO_PJ0_I2C1SCL 0x0008000b
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J1
|
||||||
|
//
|
||||||
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
||||||
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
||||||
|
#define GPIO_PJ1_PWM1 0x0008040a
|
||||||
|
#define GPIO_PJ1_I2C1SDA 0x0008040b
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J2
|
||||||
|
//
|
||||||
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
||||||
|
#define GPIO_PJ2_CCP0 0x00080809
|
||||||
|
#define GPIO_PJ2_FAULT0 0x0008080a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J3
|
||||||
|
//
|
||||||
|
#define GPIO_PJ3_EPI0S19 0x00080c08
|
||||||
|
#define GPIO_PJ3_U1CTS 0x00080c09
|
||||||
|
#define GPIO_PJ3_CCP6 0x00080c0a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J4
|
||||||
|
//
|
||||||
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
||||||
|
#define GPIO_PJ4_U1DCD 0x00081009
|
||||||
|
#define GPIO_PJ4_CCP4 0x0008100a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J5
|
||||||
|
//
|
||||||
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
||||||
|
#define GPIO_PJ5_U1DSR 0x00081409
|
||||||
|
#define GPIO_PJ5_CCP2 0x0008140a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J6
|
||||||
|
//
|
||||||
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
||||||
|
#define GPIO_PJ6_U1RTS 0x00081809
|
||||||
|
#define GPIO_PJ6_CCP1 0x0008180a
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO pin J7
|
||||||
|
//
|
||||||
|
#define GPIO_PJ7_U1DTR 0x00081c09
|
||||||
|
#define GPIO_PJ7_CCP0 0x00081c0a
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,
|
||||||
|
unsigned long ulPinIO);
|
||||||
|
extern unsigned long GPIODirModeGet(unsigned long ulPort, unsigned char ucPin);
|
||||||
|
extern void GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,
|
||||||
|
unsigned long ulIntType);
|
||||||
|
extern unsigned long GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin);
|
||||||
|
extern void GPIOPadConfigSet(unsigned long ulPort, unsigned char ucPins,
|
||||||
|
unsigned long ulStrength,
|
||||||
|
unsigned long ulPadType);
|
||||||
|
extern void GPIOPadConfigGet(unsigned long ulPort, unsigned char ucPin,
|
||||||
|
unsigned long *pulStrength,
|
||||||
|
unsigned long *pulPadType);
|
||||||
|
extern void GPIOPinIntEnable(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinIntDisable(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern long GPIOPinIntStatus(unsigned long ulPort, tBoolean bMasked);
|
||||||
|
extern void GPIOPinIntClear(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPortIntRegister(unsigned long ulPort,
|
||||||
|
void (*pfnIntHandler)(void));
|
||||||
|
extern void GPIOPortIntUnregister(unsigned long ulPort);
|
||||||
|
extern long GPIOPinRead(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinWrite(unsigned long ulPort, unsigned char ucPins,
|
||||||
|
unsigned char ucVal);
|
||||||
|
extern void GPIOPinConfigure(unsigned long ulPinConfig);
|
||||||
|
extern void GPIOPinTypeADC(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeCAN(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeComparator(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeEPI(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeEthernetLED(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeGPIOInput(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeGPIOOutput(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeGPIOOutputOD(unsigned long ulPort,
|
||||||
|
unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeI2C(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeI2S(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypePWM(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeQEI(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeSSI(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeTimer(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeUART(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeUSBAnalog(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
extern void GPIOPinTypeUSBDigital(unsigned long ulPort, unsigned char ucPins);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __GPIO_H__
|
|
@ -0,0 +1,723 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// interrupt.c - Driver for the NVIC Interrupt Controller.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup interrupt_api
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include "inc/hw_ints.h"
|
||||||
|
#include "inc/hw_nvic.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "driverlib/cpulib.h"
|
||||||
|
#include "driverlib/debug.h"
|
||||||
|
#include "driverlib/interrupt.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// This is a mapping between priority grouping encodings and the number of
|
||||||
|
// preemption priority bits.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static const unsigned long g_pulPriority[] =
|
||||||
|
{
|
||||||
|
NVIC_APINT_PRIGROUP_0_8, NVIC_APINT_PRIGROUP_1_7, NVIC_APINT_PRIGROUP_2_6,
|
||||||
|
NVIC_APINT_PRIGROUP_3_5, NVIC_APINT_PRIGROUP_4_4, NVIC_APINT_PRIGROUP_5_3,
|
||||||
|
NVIC_APINT_PRIGROUP_6_2, NVIC_APINT_PRIGROUP_7_1
|
||||||
|
};
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// This is a mapping between interrupt number and the register that contains
|
||||||
|
// the priority encoding for that interrupt.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static const unsigned long g_pulRegs[] =
|
||||||
|
{
|
||||||
|
0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3, NVIC_PRI0, NVIC_PRI1,
|
||||||
|
NVIC_PRI2, NVIC_PRI3, NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7,
|
||||||
|
NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11, NVIC_PRI12, NVIC_PRI13
|
||||||
|
};
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \internal
|
||||||
|
//! The default interrupt handler.
|
||||||
|
//!
|
||||||
|
//! This is the default interrupt handler for all interrupts. It simply loops
|
||||||
|
//! forever so that the system state is preserved for observation by a
|
||||||
|
//! debugger. Since interrupts should be disabled before unregistering the
|
||||||
|
//! corresponding handler, this should never be called.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static void
|
||||||
|
IntDefaultHandler(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Go into an infinite loop.
|
||||||
|
//
|
||||||
|
while(1)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The processor vector table.
|
||||||
|
//
|
||||||
|
// This contains a list of the handlers for the various interrupt sources in
|
||||||
|
// the system. The layout of this list is defined by the hardware; assertion
|
||||||
|
// of an interrupt causes the processor to start executing directly at the
|
||||||
|
// address given in the corresponding location in this list.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#if defined(ewarm)
|
||||||
|
static __no_init void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void) @ "VTABLE";
|
||||||
|
#elif defined(sourcerygxx)
|
||||||
|
static __attribute__((section(".cs3.region-head.ram")))
|
||||||
|
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
|
||||||
|
#elif defined(ccs)
|
||||||
|
#pragma DATA_SECTION(g_pfnRAMVectors, ".vtable")
|
||||||
|
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
|
||||||
|
#else
|
||||||
|
static __attribute__((section("vtable")))
|
||||||
|
void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enables the processor interrupt.
|
||||||
|
//!
|
||||||
|
//! Allows the processor to respond to interrupts. This does not affect the
|
||||||
|
//! set of interrupts enabled in the interrupt controller; it just gates the
|
||||||
|
//! single interrupt from the controller to the processor.
|
||||||
|
//!
|
||||||
|
//! \note Previously, this function had no return value. As such, it was
|
||||||
|
//! possible to include <tt>interrupt.h</tt> and call this function without
|
||||||
|
//! having included <tt>hw_types.h</tt>. Now that the return is a
|
||||||
|
//! <tt>tBoolean</tt>, a compiler error will occur in this case. The solution
|
||||||
|
//! is to include <tt>hw_types.h</tt> before including <tt>interrupt.h</tt>.
|
||||||
|
//!
|
||||||
|
//! \return Returns \b true if interrupts were disabled when the function was
|
||||||
|
//! called or \b false if they were initially enabled.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
tBoolean
|
||||||
|
IntMasterEnable(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable processor interrupts.
|
||||||
|
//
|
||||||
|
return(CPUcpsie());
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disables the processor interrupt.
|
||||||
|
//!
|
||||||
|
//! Prevents the processor from receiving interrupts. This does not affect the
|
||||||
|
//! set of interrupts enabled in the interrupt controller; it just gates the
|
||||||
|
//! single interrupt from the controller to the processor.
|
||||||
|
//!
|
||||||
|
//! \note Previously, this function had no return value. As such, it was
|
||||||
|
//! possible to include <tt>interrupt.h</tt> and call this function without
|
||||||
|
//! having included <tt>hw_types.h</tt>. Now that the return is a
|
||||||
|
//! <tt>tBoolean</tt>, a compiler error will occur in this case. The solution
|
||||||
|
//! is to include <tt>hw_types.h</tt> before including <tt>interrupt.h</tt>.
|
||||||
|
//!
|
||||||
|
//! \return Returns \b true if interrupts were already disabled when the
|
||||||
|
//! function was called or \b false if they were initially enabled.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
tBoolean
|
||||||
|
IntMasterDisable(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable processor interrupts.
|
||||||
|
//
|
||||||
|
return(CPUcpsid());
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Registers a function to be called when an interrupt occurs.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt in question.
|
||||||
|
//! \param pfnHandler is a pointer to the function to be called.
|
||||||
|
//!
|
||||||
|
//! This function is used to specify the handler function to be called when the
|
||||||
|
//! given interrupt is asserted to the processor. When the interrupt occurs,
|
||||||
|
//! if it is enabled (via IntEnable()), the handler function will be called in
|
||||||
|
//! interrupt context. Since the handler function can preempt other code, care
|
||||||
|
//! must be taken to protect memory or peripherals that are accessed by the
|
||||||
|
//! handler and other non-handler code.
|
||||||
|
//!
|
||||||
|
//! \note The use of this function (directly or indirectly via a peripheral
|
||||||
|
//! driver interrupt register function) moves the interrupt vector table from
|
||||||
|
//! flash to SRAM. Therefore, care must be taken when linking the application
|
||||||
|
//! to ensure that the SRAM vector table is located at the beginning of SRAM;
|
||||||
|
//! otherwise NVIC will not look in the correct portion of memory for the
|
||||||
|
//! vector table (it requires the vector table be on a 1 kB memory alignment).
|
||||||
|
//! Normally, the SRAM vector table is so placed via the use of linker scripts.
|
||||||
|
//! See the discussion of compile-time versus run-time interrupt handler
|
||||||
|
//! registration in the introduction to this chapter.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void))
|
||||||
|
{
|
||||||
|
unsigned long ulIdx, ulValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ulInterrupt < NUM_INTERRUPTS);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Make sure that the RAM vector table is correctly aligned.
|
||||||
|
//
|
||||||
|
ASSERT(((unsigned long)g_pfnRAMVectors & 0x000003ff) == 0);
|
||||||
|
|
||||||
|
//
|
||||||
|
// See if the RAM vector table has been initialized.
|
||||||
|
//
|
||||||
|
if(HWREG(NVIC_VTABLE) != (unsigned long)g_pfnRAMVectors)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Copy the vector table from the beginning of FLASH to the RAM vector
|
||||||
|
// table.
|
||||||
|
//
|
||||||
|
ulValue = HWREG(NVIC_VTABLE);
|
||||||
|
for(ulIdx = 0; ulIdx < NUM_INTERRUPTS; ulIdx++)
|
||||||
|
{
|
||||||
|
g_pfnRAMVectors[ulIdx] = (void (*)(void))HWREG((ulIdx * 4) +
|
||||||
|
ulValue);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Point NVIC at the RAM vector table.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_VTABLE) = (unsigned long)g_pfnRAMVectors;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Save the interrupt handler.
|
||||||
|
//
|
||||||
|
g_pfnRAMVectors[ulInterrupt] = pfnHandler;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Unregisters the function to be called when an interrupt occurs.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt in question.
|
||||||
|
//!
|
||||||
|
//! This function is used to indicate that no handler should be called when the
|
||||||
|
//! given interrupt is asserted to the processor. The interrupt source will be
|
||||||
|
//! automatically disabled (via IntDisable()) if necessary.
|
||||||
|
//!
|
||||||
|
//! \sa IntRegister() for important information about registering interrupt
|
||||||
|
//! handlers.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntUnregister(unsigned long ulInterrupt)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ulInterrupt < NUM_INTERRUPTS);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Reset the interrupt handler.
|
||||||
|
//
|
||||||
|
g_pfnRAMVectors[ulInterrupt] = IntDefaultHandler;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the priority grouping of the interrupt controller.
|
||||||
|
//!
|
||||||
|
//! \param ulBits specifies the number of bits of preemptable priority.
|
||||||
|
//!
|
||||||
|
//! This function specifies the split between preemptable priority levels and
|
||||||
|
//! subpriority levels in the interrupt priority specification. The range of
|
||||||
|
//! the grouping values are dependent upon the hardware implementation; on
|
||||||
|
//! the Stellaris family, three bits are available for hardware interrupt
|
||||||
|
//! prioritization and therefore priority grouping values of three through
|
||||||
|
//! seven have the same effect.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntPriorityGroupingSet(unsigned long ulBits)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ulBits < NUM_PRIORITY);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the priority grouping.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_APINT) = NVIC_APINT_VECTKEY | g_pulPriority[ulBits];
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Gets the priority grouping of the interrupt controller.
|
||||||
|
//!
|
||||||
|
//! This function returns the split between preemptable priority levels and
|
||||||
|
//! subpriority levels in the interrupt priority specification.
|
||||||
|
//!
|
||||||
|
//! \return The number of bits of preemptable priority.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
unsigned long
|
||||||
|
IntPriorityGroupingGet(void)
|
||||||
|
{
|
||||||
|
unsigned long ulLoop, ulValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read the priority grouping.
|
||||||
|
//
|
||||||
|
ulValue = HWREG(NVIC_APINT) & NVIC_APINT_PRIGROUP_M;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Loop through the priority grouping values.
|
||||||
|
//
|
||||||
|
for(ulLoop = 0; ulLoop < NUM_PRIORITY; ulLoop++)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Stop looping if this value matches.
|
||||||
|
//
|
||||||
|
if(ulValue == g_pulPriority[ulLoop])
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return the number of priority bits.
|
||||||
|
//
|
||||||
|
return(ulLoop);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the priority of an interrupt.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt in question.
|
||||||
|
//! \param ucPriority specifies the priority of the interrupt.
|
||||||
|
//!
|
||||||
|
//! This function is used to set the priority of an interrupt. When multiple
|
||||||
|
//! interrupts are asserted simultaneously, the ones with the highest priority
|
||||||
|
//! are processed before the lower priority interrupts. Smaller numbers
|
||||||
|
//! correspond to higher interrupt priorities; priority 0 is the highest
|
||||||
|
//! interrupt priority.
|
||||||
|
//!
|
||||||
|
//! The hardware priority mechanism will only look at the upper N bits of the
|
||||||
|
//! priority level (where N is 3 for the Stellaris family), so any
|
||||||
|
//! prioritization must be performed in those bits. The remaining bits can be
|
||||||
|
//! used to sub-prioritize the interrupt sources, and may be used by the
|
||||||
|
//! hardware priority mechanism on a future part. This arrangement allows
|
||||||
|
//! priorities to migrate to different NVIC implementations without changing
|
||||||
|
//! the gross prioritization of the interrupts.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntPrioritySet(unsigned long ulInterrupt, unsigned char ucPriority)
|
||||||
|
{
|
||||||
|
unsigned long ulTemp;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the interrupt priority.
|
||||||
|
//
|
||||||
|
ulTemp = HWREG(g_pulRegs[ulInterrupt >> 2]);
|
||||||
|
ulTemp &= ~(0xFF << (8 * (ulInterrupt & 3)));
|
||||||
|
ulTemp |= ucPriority << (8 * (ulInterrupt & 3));
|
||||||
|
HWREG(g_pulRegs[ulInterrupt >> 2]) = ulTemp;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Gets the priority of an interrupt.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt in question.
|
||||||
|
//!
|
||||||
|
//! This function gets the priority of an interrupt. See IntPrioritySet() for
|
||||||
|
//! a definition of the priority value.
|
||||||
|
//!
|
||||||
|
//! \return Returns the interrupt priority, or -1 if an invalid interrupt was
|
||||||
|
//! specified.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
long
|
||||||
|
IntPriorityGet(unsigned long ulInterrupt)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return the interrupt priority.
|
||||||
|
//
|
||||||
|
return((HWREG(g_pulRegs[ulInterrupt >> 2]) >> (8 * (ulInterrupt & 3))) &
|
||||||
|
0xFF);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enables an interrupt.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt to be enabled.
|
||||||
|
//!
|
||||||
|
//! The specified interrupt is enabled in the interrupt controller. Other
|
||||||
|
//! enables for the interrupt (such as at the peripheral level) are unaffected
|
||||||
|
//! by this function.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntEnable(unsigned long ulInterrupt)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ulInterrupt < NUM_INTERRUPTS);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Determine the interrupt to enable.
|
||||||
|
//
|
||||||
|
if(ulInterrupt == FAULT_MPU)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable the MemManage interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_MEM;
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_BUS)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable the bus fault interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_BUS;
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_USAGE)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable the usage fault interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_USAGE;
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_SYSTICK)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable the System Tick interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
|
||||||
|
}
|
||||||
|
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_EN0) = 1 << (ulInterrupt - 16);
|
||||||
|
}
|
||||||
|
else if(ulInterrupt >= 48)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_EN1) = 1 << (ulInterrupt - 48);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disables an interrupt.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt to be disabled.
|
||||||
|
//!
|
||||||
|
//! The specified interrupt is disabled in the interrupt controller. Other
|
||||||
|
//! enables for the interrupt (such as at the peripheral level) are unaffected
|
||||||
|
//! by this function.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntDisable(unsigned long ulInterrupt)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ulInterrupt < NUM_INTERRUPTS);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Determine the interrupt to disable.
|
||||||
|
//
|
||||||
|
if(ulInterrupt == FAULT_MPU)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the MemManage interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_MEM);
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_BUS)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the bus fault interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_BUS);
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_USAGE)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the usage fault interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_USAGE);
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_SYSTICK)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the System Tick interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
|
||||||
|
}
|
||||||
|
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_DIS0) = 1 << (ulInterrupt - 16);
|
||||||
|
}
|
||||||
|
else if(ulInterrupt >= 48)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_DIS1) = 1 << (ulInterrupt - 48);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Pends an interrupt.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt to be pended.
|
||||||
|
//!
|
||||||
|
//! The specified interrupt is pended in the interrupt controller. This will
|
||||||
|
//! cause the interrupt controller to execute the corresponding interrupt
|
||||||
|
//! handler at the next available time, based on the current interrupt state
|
||||||
|
//! priorities. For example, if called by a higher priority interrupt handler,
|
||||||
|
//! the specified interrupt handler will not be called until after the current
|
||||||
|
//! interrupt handler has completed execution. The interrupt must have been
|
||||||
|
//! enabled for it to be called.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntPendSet(unsigned long ulInterrupt)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ulInterrupt < NUM_INTERRUPTS);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Determine the interrupt to pend.
|
||||||
|
//
|
||||||
|
if(ulInterrupt == FAULT_NMI)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Pend the NMI interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_NMI_SET;
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_PENDSV)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Pend the PendSV interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PEND_SV;
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_SYSTICK)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Pend the SysTick interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTSET;
|
||||||
|
}
|
||||||
|
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Pend the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_PEND0) = 1 << (ulInterrupt - 16);
|
||||||
|
}
|
||||||
|
else if(ulInterrupt >= 48)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Pend the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_PEND1) = 1 << (ulInterrupt - 48);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Unpends an interrupt.
|
||||||
|
//!
|
||||||
|
//! \param ulInterrupt specifies the interrupt to be unpended.
|
||||||
|
//!
|
||||||
|
//! The specified interrupt is unpended in the interrupt controller. This will
|
||||||
|
//! cause any previously generated interrupts that have not been handled yet
|
||||||
|
//! (due to higher priority interrupts or the interrupt no having been enabled
|
||||||
|
//! yet) to be discarded.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntPendClear(unsigned long ulInterrupt)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ulInterrupt < NUM_INTERRUPTS);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Determine the interrupt to unpend.
|
||||||
|
//
|
||||||
|
if(ulInterrupt == FAULT_PENDSV)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Unpend the PendSV interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_UNPEND_SV;
|
||||||
|
}
|
||||||
|
else if(ulInterrupt == FAULT_SYSTICK)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Unpend the SysTick interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTCLR;
|
||||||
|
}
|
||||||
|
else if((ulInterrupt >= 16) && (ulInterrupt <= 47))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Unpend the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_UNPEND0) = 1 << (ulInterrupt - 16);
|
||||||
|
}
|
||||||
|
else if(ulInterrupt >= 48)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Unpend the general interrupt.
|
||||||
|
//
|
||||||
|
HWREG(NVIC_UNPEND1) = 1 << (ulInterrupt - 48);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the priority masking level
|
||||||
|
//!
|
||||||
|
//! \param ulPriorityMask is the priority level that will be masked.
|
||||||
|
//!
|
||||||
|
//! This function sets the interrupt priority masking level so that all
|
||||||
|
//! interrupts at the specified or lesser priority level is masked. This
|
||||||
|
//! can be used to globally disable a set of interrupts with priority below
|
||||||
|
//! a predetermined threshold. A value of 0 disables priority
|
||||||
|
//! masking.
|
||||||
|
//!
|
||||||
|
//! Smaller numbers correspond to higher interrupt priorities. So for example
|
||||||
|
//! a priority level mask of 4 will allow interrupts of priority level 0-3,
|
||||||
|
//! and interrupts with a numerical priority of 4 and greater will be blocked.
|
||||||
|
//!
|
||||||
|
//! The hardware priority mechanism will only look at the upper N bits of the
|
||||||
|
//! priority level (where N is 3 for the Stellaris family), so any
|
||||||
|
//! prioritization must be performed in those bits.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
IntPriorityMaskSet(unsigned long ulPriorityMask)
|
||||||
|
{
|
||||||
|
CPUbasepriSet(ulPriorityMask);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Gets the priority masking level
|
||||||
|
//!
|
||||||
|
//! This function gets the current setting of the interrupt priority masking
|
||||||
|
//! level. The value returned is the priority level such that all interrupts
|
||||||
|
//! of that and lesser priority are masked. A value of 0 means that priority
|
||||||
|
//! masking is disabled.
|
||||||
|
//!
|
||||||
|
//! Smaller numbers correspond to higher interrupt priorities. So for example
|
||||||
|
//! a priority level mask of 4 will allow interrupts of priority level 0-3,
|
||||||
|
//! and interrupts with a numerical priority of 4 and greater will be blocked.
|
||||||
|
//!
|
||||||
|
//! The hardware priority mechanism will only look at the upper N bits of the
|
||||||
|
//! priority level (where N is 3 for the Stellaris family), so any
|
||||||
|
//! prioritization must be performed in those bits.
|
||||||
|
//!
|
||||||
|
//! \return Returns the value of the interrupt priority level mask.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
unsigned long
|
||||||
|
IntPriorityMaskGet(void)
|
||||||
|
{
|
||||||
|
return(CPUbasepriGet());
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
|
@ -0,0 +1,77 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// interrupt.h - Prototypes for the NVIC Interrupt Controller Driver.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __INTERRUPT_H__
|
||||||
|
#define __INTERRUPT_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Macro to generate an interrupt priority mask based on the number of bits
|
||||||
|
// of priority supported by the hardware.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define INT_PRIORITY_MASK ((0xFF << (8 - NUM_PRIORITY_BITS)) & 0xFF)
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern tBoolean IntMasterEnable(void);
|
||||||
|
extern tBoolean IntMasterDisable(void);
|
||||||
|
extern void IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void));
|
||||||
|
extern void IntUnregister(unsigned long ulInterrupt);
|
||||||
|
extern void IntPriorityGroupingSet(unsigned long ulBits);
|
||||||
|
extern unsigned long IntPriorityGroupingGet(void);
|
||||||
|
extern void IntPrioritySet(unsigned long ulInterrupt,
|
||||||
|
unsigned char ucPriority);
|
||||||
|
extern long IntPriorityGet(unsigned long ulInterrupt);
|
||||||
|
extern void IntEnable(unsigned long ulInterrupt);
|
||||||
|
extern void IntDisable(unsigned long ulInterrupt);
|
||||||
|
extern void IntPendSet(unsigned long ulInterrupt);
|
||||||
|
extern void IntPendClear(unsigned long ulInterrupt);
|
||||||
|
extern void IntPriorityMaskSet(unsigned long ulPriorityMask);
|
||||||
|
extern unsigned long IntPriorityMaskGet(void);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __INTERRUPT_H__
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,466 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// sysctl.h - Prototypes for the system control driver.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __SYSCTL_H__
|
||||||
|
#define __SYSCTL_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the
|
||||||
|
// SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),
|
||||||
|
// SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the
|
||||||
|
// ulPeripheral parameter. The peripherals in the fourth group (upper nibble
|
||||||
|
// is 3) can only be used with the SysCtlPeripheralPresent() API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define SYSCTL_PERIPH_WDOG 0x00000008 // Watchdog
|
||||||
|
#endif
|
||||||
|
#define SYSCTL_PERIPH_WDOG0 0x00000008 // Watchdog 0
|
||||||
|
#define SYSCTL_PERIPH_HIBERNATE 0x00000040 // Hibernation module
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define SYSCTL_PERIPH_ADC 0x00100001 // ADC
|
||||||
|
#endif
|
||||||
|
#define SYSCTL_PERIPH_ADC0 0x00100001 // ADC0
|
||||||
|
#define SYSCTL_PERIPH_ADC1 0x00100002 // ADC1
|
||||||
|
#define SYSCTL_PERIPH_PWM 0x00100010 // PWM
|
||||||
|
#define SYSCTL_PERIPH_CAN0 0x00100100 // CAN 0
|
||||||
|
#define SYSCTL_PERIPH_CAN1 0x00100200 // CAN 1
|
||||||
|
#define SYSCTL_PERIPH_CAN2 0x00100400 // CAN 2
|
||||||
|
#define SYSCTL_PERIPH_WDOG1 0x00101000 // Watchdog 1
|
||||||
|
#define SYSCTL_PERIPH_UART0 0x10000001 // UART 0
|
||||||
|
#define SYSCTL_PERIPH_UART1 0x10000002 // UART 1
|
||||||
|
#define SYSCTL_PERIPH_UART2 0x10000004 // UART 2
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define SYSCTL_PERIPH_SSI 0x10000010 // SSI
|
||||||
|
#endif
|
||||||
|
#define SYSCTL_PERIPH_SSI0 0x10000010 // SSI 0
|
||||||
|
#define SYSCTL_PERIPH_SSI1 0x10000020 // SSI 1
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define SYSCTL_PERIPH_QEI 0x10000100 // QEI
|
||||||
|
#endif
|
||||||
|
#define SYSCTL_PERIPH_QEI0 0x10000100 // QEI 0
|
||||||
|
#define SYSCTL_PERIPH_QEI1 0x10000200 // QEI 1
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define SYSCTL_PERIPH_I2C 0x10001000 // I2C
|
||||||
|
#endif
|
||||||
|
#define SYSCTL_PERIPH_I2C0 0x10001000 // I2C 0
|
||||||
|
#define SYSCTL_PERIPH_I2C1 0x10004000 // I2C 1
|
||||||
|
#define SYSCTL_PERIPH_TIMER0 0x10100001 // Timer 0
|
||||||
|
#define SYSCTL_PERIPH_TIMER1 0x10100002 // Timer 1
|
||||||
|
#define SYSCTL_PERIPH_TIMER2 0x10100004 // Timer 2
|
||||||
|
#define SYSCTL_PERIPH_TIMER3 0x10100008 // Timer 3
|
||||||
|
#define SYSCTL_PERIPH_COMP0 0x10100100 // Analog comparator 0
|
||||||
|
#define SYSCTL_PERIPH_COMP1 0x10100200 // Analog comparator 1
|
||||||
|
#define SYSCTL_PERIPH_COMP2 0x10100400 // Analog comparator 2
|
||||||
|
#define SYSCTL_PERIPH_I2S0 0x10101000 // I2S0
|
||||||
|
#define SYSCTL_PERIPH_EPI0 0x10104000 // EPI0
|
||||||
|
#define SYSCTL_PERIPH_GPIOA 0x20000001 // GPIO A
|
||||||
|
#define SYSCTL_PERIPH_GPIOB 0x20000002 // GPIO B
|
||||||
|
#define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
|
||||||
|
#define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
|
||||||
|
#define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
|
||||||
|
#define SYSCTL_PERIPH_GPIOF 0x20000020 // GPIO F
|
||||||
|
#define SYSCTL_PERIPH_GPIOG 0x20000040 // GPIO G
|
||||||
|
#define SYSCTL_PERIPH_GPIOH 0x20000080 // GPIO H
|
||||||
|
#define SYSCTL_PERIPH_GPIOJ 0x20000100 // GPIO J
|
||||||
|
#define SYSCTL_PERIPH_UDMA 0x20002000 // uDMA
|
||||||
|
#define SYSCTL_PERIPH_USB0 0x20100001 // USB0
|
||||||
|
#define SYSCTL_PERIPH_ETH 0x20105000 // ETH
|
||||||
|
#define SYSCTL_PERIPH_IEEE1588 0x20100100 // IEEE1588
|
||||||
|
#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
|
||||||
|
#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
|
||||||
|
#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlPinPresent() API
|
||||||
|
// as the ulPin parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_PIN_PWM0 0x00000001 // PWM0 pin
|
||||||
|
#define SYSCTL_PIN_PWM1 0x00000002 // PWM1 pin
|
||||||
|
#define SYSCTL_PIN_PWM2 0x00000004 // PWM2 pin
|
||||||
|
#define SYSCTL_PIN_PWM3 0x00000008 // PWM3 pin
|
||||||
|
#define SYSCTL_PIN_PWM4 0x00000010 // PWM4 pin
|
||||||
|
#define SYSCTL_PIN_PWM5 0x00000020 // PWM5 pin
|
||||||
|
#define SYSCTL_PIN_PWM6 0x00000040 // PWM6 pin
|
||||||
|
#define SYSCTL_PIN_PWM7 0x00000080 // PWM7 pin
|
||||||
|
#define SYSCTL_PIN_C0MINUS 0x00000040 // C0- pin
|
||||||
|
#define SYSCTL_PIN_C0PLUS 0x00000080 // C0+ pin
|
||||||
|
#define SYSCTL_PIN_C0O 0x00000100 // C0o pin
|
||||||
|
#define SYSCTL_PIN_C1MINUS 0x00000200 // C1- pin
|
||||||
|
#define SYSCTL_PIN_C1PLUS 0x00000400 // C1+ pin
|
||||||
|
#define SYSCTL_PIN_C1O 0x00000800 // C1o pin
|
||||||
|
#define SYSCTL_PIN_C2MINUS 0x00001000 // C2- pin
|
||||||
|
#define SYSCTL_PIN_C2PLUS 0x00002000 // C2+ pin
|
||||||
|
#define SYSCTL_PIN_C2O 0x00004000 // C2o pin
|
||||||
|
#define SYSCTL_PIN_MC_FAULT0 0x00008000 // MC0 Fault pin
|
||||||
|
#define SYSCTL_PIN_ADC0 0x00010000 // ADC0 pin
|
||||||
|
#define SYSCTL_PIN_ADC1 0x00020000 // ADC1 pin
|
||||||
|
#define SYSCTL_PIN_ADC2 0x00040000 // ADC2 pin
|
||||||
|
#define SYSCTL_PIN_ADC3 0x00080000 // ADC3 pin
|
||||||
|
#define SYSCTL_PIN_ADC4 0x00100000 // ADC4 pin
|
||||||
|
#define SYSCTL_PIN_ADC5 0x00200000 // ADC5 pin
|
||||||
|
#define SYSCTL_PIN_ADC6 0x00400000 // ADC6 pin
|
||||||
|
#define SYSCTL_PIN_ADC7 0x00800000 // ADC7 pin
|
||||||
|
#define SYSCTL_PIN_CCP0 0x01000000 // CCP0 pin
|
||||||
|
#define SYSCTL_PIN_CCP1 0x02000000 // CCP1 pin
|
||||||
|
#define SYSCTL_PIN_CCP2 0x04000000 // CCP2 pin
|
||||||
|
#define SYSCTL_PIN_CCP3 0x08000000 // CCP3 pin
|
||||||
|
#define SYSCTL_PIN_CCP4 0x10000000 // CCP4 pin
|
||||||
|
#define SYSCTL_PIN_CCP5 0x20000000 // CCP5 pin
|
||||||
|
#define SYSCTL_PIN_32KHZ 0x80000000 // 32kHz pin
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlLDOSet() API as
|
||||||
|
// the ulVoltage value, or returned by the SysCtlLDOGet() API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_LDO_2_25V 0x00000005 // LDO output of 2.25V
|
||||||
|
#define SYSCTL_LDO_2_30V 0x00000004 // LDO output of 2.30V
|
||||||
|
#define SYSCTL_LDO_2_35V 0x00000003 // LDO output of 2.35V
|
||||||
|
#define SYSCTL_LDO_2_40V 0x00000002 // LDO output of 2.40V
|
||||||
|
#define SYSCTL_LDO_2_45V 0x00000001 // LDO output of 2.45V
|
||||||
|
#define SYSCTL_LDO_2_50V 0x00000000 // LDO output of 2.50V
|
||||||
|
#define SYSCTL_LDO_2_55V 0x0000001f // LDO output of 2.55V
|
||||||
|
#define SYSCTL_LDO_2_60V 0x0000001e // LDO output of 2.60V
|
||||||
|
#define SYSCTL_LDO_2_65V 0x0000001d // LDO output of 2.65V
|
||||||
|
#define SYSCTL_LDO_2_70V 0x0000001c // LDO output of 2.70V
|
||||||
|
#define SYSCTL_LDO_2_75V 0x0000001b // LDO output of 2.75V
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlLDOConfigSet() API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_LDOCFG_ARST 0x00000001 // Allow LDO failure to reset
|
||||||
|
#define SYSCTL_LDOCFG_NORST 0x00000000 // Do not reset on LDO failure
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlIntEnable(),
|
||||||
|
// SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask
|
||||||
|
// by the SysCtlIntStatus() API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_INT_MOSC_PUP 0x00000100 // MOSC power-up interrupt
|
||||||
|
#define SYSCTL_INT_USBPLL_LOCK 0x00000080 // USB PLL lock interrupt
|
||||||
|
#define SYSCTL_INT_PLL_LOCK 0x00000040 // PLL lock interrupt
|
||||||
|
#define SYSCTL_INT_CUR_LIMIT 0x00000020 // Current limit interrupt
|
||||||
|
#define SYSCTL_INT_IOSC_FAIL 0x00000010 // Internal oscillator failure int
|
||||||
|
#define SYSCTL_INT_MOSC_FAIL 0x00000008 // Main oscillator failure int
|
||||||
|
#define SYSCTL_INT_POR 0x00000004 // Power on reset interrupt
|
||||||
|
#define SYSCTL_INT_BOR 0x00000002 // Brown out interrupt
|
||||||
|
#define SYSCTL_INT_PLL_FAIL 0x00000001 // PLL failure interrupt
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlResetCauseClear()
|
||||||
|
// API or returned by the SysCtlResetCauseGet() API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_CAUSE_LDO 0x00000020 // LDO power not OK reset
|
||||||
|
#define SYSCTL_CAUSE_SW 0x00000010 // Software reset
|
||||||
|
#define SYSCTL_CAUSE_WDOG 0x00000008 // Watchdog reset
|
||||||
|
#define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset
|
||||||
|
#define SYSCTL_CAUSE_POR 0x00000002 // Power on reset
|
||||||
|
#define SYSCTL_CAUSE_EXT 0x00000001 // External reset
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlBrownOutConfigSet()
|
||||||
|
// API as the ulConfig parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_BOR_RESET 0x00000002 // Reset instead of interrupting
|
||||||
|
#define SYSCTL_BOR_RESAMPLE 0x00000001 // Resample BOR before asserting
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlPWMClockSet() API
|
||||||
|
// as the ulConfig parameter, and can be returned by the SysCtlPWMClockGet()
|
||||||
|
// API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_PWMDIV_1 0x00000000 // PWM clock is processor clock /1
|
||||||
|
#define SYSCTL_PWMDIV_2 0x00100000 // PWM clock is processor clock /2
|
||||||
|
#define SYSCTL_PWMDIV_4 0x00120000 // PWM clock is processor clock /4
|
||||||
|
#define SYSCTL_PWMDIV_8 0x00140000 // PWM clock is processor clock /8
|
||||||
|
#define SYSCTL_PWMDIV_16 0x00160000 // PWM clock is processor clock /16
|
||||||
|
#define SYSCTL_PWMDIV_32 0x00180000 // PWM clock is processor clock /32
|
||||||
|
#define SYSCTL_PWMDIV_64 0x001A0000 // PWM clock is processor clock /64
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlADCSpeedSet() API
|
||||||
|
// as the ulSpeed parameter, and can be returned by the SyCtlADCSpeedGet()
|
||||||
|
// API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_ADCSPEED_1MSPS 0x00000F00 // 1,000,000 samples per second
|
||||||
|
#define SYSCTL_ADCSPEED_500KSPS 0x00000A00 // 500,000 samples per second
|
||||||
|
#define SYSCTL_ADCSPEED_250KSPS 0x00000500 // 250,000 samples per second
|
||||||
|
#define SYSCTL_ADCSPEED_125KSPS 0x00000000 // 125,000 samples per second
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are values that can be passed to the SysCtlClockSet() API as
|
||||||
|
// the ulConfig parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SYSCTL_SYSDIV_1 0x07800000 // Processor clock is osc/pll /1
|
||||||
|
#define SYSCTL_SYSDIV_2 0x00C00000 // Processor clock is osc/pll /2
|
||||||
|
#define SYSCTL_SYSDIV_3 0x01400000 // Processor clock is osc/pll /3
|
||||||
|
#define SYSCTL_SYSDIV_4 0x01C00000 // Processor clock is osc/pll /4
|
||||||
|
#define SYSCTL_SYSDIV_5 0x02400000 // Processor clock is osc/pll /5
|
||||||
|
#define SYSCTL_SYSDIV_6 0x02C00000 // Processor clock is osc/pll /6
|
||||||
|
#define SYSCTL_SYSDIV_7 0x03400000 // Processor clock is osc/pll /7
|
||||||
|
#define SYSCTL_SYSDIV_8 0x03C00000 // Processor clock is osc/pll /8
|
||||||
|
#define SYSCTL_SYSDIV_9 0x04400000 // Processor clock is osc/pll /9
|
||||||
|
#define SYSCTL_SYSDIV_10 0x04C00000 // Processor clock is osc/pll /10
|
||||||
|
#define SYSCTL_SYSDIV_11 0x05400000 // Processor clock is osc/pll /11
|
||||||
|
#define SYSCTL_SYSDIV_12 0x05C00000 // Processor clock is osc/pll /12
|
||||||
|
#define SYSCTL_SYSDIV_13 0x06400000 // Processor clock is osc/pll /13
|
||||||
|
#define SYSCTL_SYSDIV_14 0x06C00000 // Processor clock is osc/pll /14
|
||||||
|
#define SYSCTL_SYSDIV_15 0x07400000 // Processor clock is osc/pll /15
|
||||||
|
#define SYSCTL_SYSDIV_16 0x07C00000 // Processor clock is osc/pll /16
|
||||||
|
#define SYSCTL_SYSDIV_17 0x88400000 // Processor clock is osc/pll /17
|
||||||
|
#define SYSCTL_SYSDIV_18 0x88C00000 // Processor clock is osc/pll /18
|
||||||
|
#define SYSCTL_SYSDIV_19 0x89400000 // Processor clock is osc/pll /19
|
||||||
|
#define SYSCTL_SYSDIV_20 0x89C00000 // Processor clock is osc/pll /20
|
||||||
|
#define SYSCTL_SYSDIV_21 0x8A400000 // Processor clock is osc/pll /21
|
||||||
|
#define SYSCTL_SYSDIV_22 0x8AC00000 // Processor clock is osc/pll /22
|
||||||
|
#define SYSCTL_SYSDIV_23 0x8B400000 // Processor clock is osc/pll /23
|
||||||
|
#define SYSCTL_SYSDIV_24 0x8BC00000 // Processor clock is osc/pll /24
|
||||||
|
#define SYSCTL_SYSDIV_25 0x8C400000 // Processor clock is osc/pll /25
|
||||||
|
#define SYSCTL_SYSDIV_26 0x8CC00000 // Processor clock is osc/pll /26
|
||||||
|
#define SYSCTL_SYSDIV_27 0x8D400000 // Processor clock is osc/pll /27
|
||||||
|
#define SYSCTL_SYSDIV_28 0x8DC00000 // Processor clock is osc/pll /28
|
||||||
|
#define SYSCTL_SYSDIV_29 0x8E400000 // Processor clock is osc/pll /29
|
||||||
|
#define SYSCTL_SYSDIV_30 0x8EC00000 // Processor clock is osc/pll /30
|
||||||
|
#define SYSCTL_SYSDIV_31 0x8F400000 // Processor clock is osc/pll /31
|
||||||
|
#define SYSCTL_SYSDIV_32 0x8FC00000 // Processor clock is osc/pll /32
|
||||||
|
#define SYSCTL_SYSDIV_33 0x90400000 // Processor clock is osc/pll /33
|
||||||
|
#define SYSCTL_SYSDIV_34 0x90C00000 // Processor clock is osc/pll /34
|
||||||
|
#define SYSCTL_SYSDIV_35 0x91400000 // Processor clock is osc/pll /35
|
||||||
|
#define SYSCTL_SYSDIV_36 0x91C00000 // Processor clock is osc/pll /36
|
||||||
|
#define SYSCTL_SYSDIV_37 0x92400000 // Processor clock is osc/pll /37
|
||||||
|
#define SYSCTL_SYSDIV_38 0x92C00000 // Processor clock is osc/pll /38
|
||||||
|
#define SYSCTL_SYSDIV_39 0x93400000 // Processor clock is osc/pll /39
|
||||||
|
#define SYSCTL_SYSDIV_40 0x93C00000 // Processor clock is osc/pll /40
|
||||||
|
#define SYSCTL_SYSDIV_41 0x94400000 // Processor clock is osc/pll /41
|
||||||
|
#define SYSCTL_SYSDIV_42 0x94C00000 // Processor clock is osc/pll /42
|
||||||
|
#define SYSCTL_SYSDIV_43 0x95400000 // Processor clock is osc/pll /43
|
||||||
|
#define SYSCTL_SYSDIV_44 0x95C00000 // Processor clock is osc/pll /44
|
||||||
|
#define SYSCTL_SYSDIV_45 0x96400000 // Processor clock is osc/pll /45
|
||||||
|
#define SYSCTL_SYSDIV_46 0x96C00000 // Processor clock is osc/pll /46
|
||||||
|
#define SYSCTL_SYSDIV_47 0x97400000 // Processor clock is osc/pll /47
|
||||||
|
#define SYSCTL_SYSDIV_48 0x97C00000 // Processor clock is osc/pll /48
|
||||||
|
#define SYSCTL_SYSDIV_49 0x98400000 // Processor clock is osc/pll /49
|
||||||
|
#define SYSCTL_SYSDIV_50 0x98C00000 // Processor clock is osc/pll /50
|
||||||
|
#define SYSCTL_SYSDIV_51 0x99400000 // Processor clock is osc/pll /51
|
||||||
|
#define SYSCTL_SYSDIV_52 0x99C00000 // Processor clock is osc/pll /52
|
||||||
|
#define SYSCTL_SYSDIV_53 0x9A400000 // Processor clock is osc/pll /53
|
||||||
|
#define SYSCTL_SYSDIV_54 0x9AC00000 // Processor clock is osc/pll /54
|
||||||
|
#define SYSCTL_SYSDIV_55 0x9B400000 // Processor clock is osc/pll /55
|
||||||
|
#define SYSCTL_SYSDIV_56 0x9BC00000 // Processor clock is osc/pll /56
|
||||||
|
#define SYSCTL_SYSDIV_57 0x9C400000 // Processor clock is osc/pll /57
|
||||||
|
#define SYSCTL_SYSDIV_58 0x9CC00000 // Processor clock is osc/pll /58
|
||||||
|
#define SYSCTL_SYSDIV_59 0x9D400000 // Processor clock is osc/pll /59
|
||||||
|
#define SYSCTL_SYSDIV_60 0x9DC00000 // Processor clock is osc/pll /60
|
||||||
|
#define SYSCTL_SYSDIV_61 0x9E400000 // Processor clock is osc/pll /61
|
||||||
|
#define SYSCTL_SYSDIV_62 0x9EC00000 // Processor clock is osc/pll /62
|
||||||
|
#define SYSCTL_SYSDIV_63 0x9F400000 // Processor clock is osc/pll /63
|
||||||
|
#define SYSCTL_SYSDIV_64 0x9FC00000 // Processor clock is osc/pll /64
|
||||||
|
#define SYSCTL_SYSDIV_2_5 0xC1000000 // Processor clock is pll / 2.5
|
||||||
|
#define SYSCTL_SYSDIV_3_5 0xC1800000 // Processor clock is pll / 3.5
|
||||||
|
#define SYSCTL_SYSDIV_4_5 0xC2000000 // Processor clock is pll / 4.5
|
||||||
|
#define SYSCTL_SYSDIV_5_5 0xC2800000 // Processor clock is pll / 5.5
|
||||||
|
#define SYSCTL_SYSDIV_6_5 0xC3000000 // Processor clock is pll / 6.5
|
||||||
|
#define SYSCTL_SYSDIV_7_5 0xC3800000 // Processor clock is pll / 7.5
|
||||||
|
#define SYSCTL_SYSDIV_8_5 0xC4000000 // Processor clock is pll / 8.5
|
||||||
|
#define SYSCTL_SYSDIV_9_5 0xC4800000 // Processor clock is pll / 9.5
|
||||||
|
#define SYSCTL_SYSDIV_10_5 0xC5000000 // Processor clock is pll / 10.5
|
||||||
|
#define SYSCTL_SYSDIV_11_5 0xC5800000 // Processor clock is pll / 11.5
|
||||||
|
#define SYSCTL_SYSDIV_12_5 0xC6000000 // Processor clock is pll / 12.5
|
||||||
|
#define SYSCTL_SYSDIV_13_5 0xC6800000 // Processor clock is pll / 13.5
|
||||||
|
#define SYSCTL_SYSDIV_14_5 0xC7000000 // Processor clock is pll / 14.5
|
||||||
|
#define SYSCTL_SYSDIV_15_5 0xC7800000 // Processor clock is pll / 15.5
|
||||||
|
#define SYSCTL_SYSDIV_16_5 0xC8000000 // Processor clock is pll / 16.5
|
||||||
|
#define SYSCTL_SYSDIV_17_5 0xC8800000 // Processor clock is pll / 17.5
|
||||||
|
#define SYSCTL_SYSDIV_18_5 0xC9000000 // Processor clock is pll / 18.5
|
||||||
|
#define SYSCTL_SYSDIV_19_5 0xC9800000 // Processor clock is pll / 19.5
|
||||||
|
#define SYSCTL_SYSDIV_20_5 0xCA000000 // Processor clock is pll / 20.5
|
||||||
|
#define SYSCTL_SYSDIV_21_5 0xCA800000 // Processor clock is pll / 21.5
|
||||||
|
#define SYSCTL_SYSDIV_22_5 0xCB000000 // Processor clock is pll / 22.5
|
||||||
|
#define SYSCTL_SYSDIV_23_5 0xCB800000 // Processor clock is pll / 23.5
|
||||||
|
#define SYSCTL_SYSDIV_24_5 0xCC000000 // Processor clock is pll / 24.5
|
||||||
|
#define SYSCTL_SYSDIV_25_5 0xCC800000 // Processor clock is pll / 25.5
|
||||||
|
#define SYSCTL_SYSDIV_26_5 0xCD000000 // Processor clock is pll / 26.5
|
||||||
|
#define SYSCTL_SYSDIV_27_5 0xCD800000 // Processor clock is pll / 27.5
|
||||||
|
#define SYSCTL_SYSDIV_28_5 0xCE000000 // Processor clock is pll / 28.5
|
||||||
|
#define SYSCTL_SYSDIV_29_5 0xCE800000 // Processor clock is pll / 29.5
|
||||||
|
#define SYSCTL_SYSDIV_30_5 0xCF000000 // Processor clock is pll / 30.5
|
||||||
|
#define SYSCTL_SYSDIV_31_5 0xCF800000 // Processor clock is pll / 31.5
|
||||||
|
#define SYSCTL_SYSDIV_32_5 0xD0000000 // Processor clock is pll / 32.5
|
||||||
|
#define SYSCTL_SYSDIV_33_5 0xD0800000 // Processor clock is pll / 33.5
|
||||||
|
#define SYSCTL_SYSDIV_34_5 0xD1000000 // Processor clock is pll / 34.5
|
||||||
|
#define SYSCTL_SYSDIV_35_5 0xD1800000 // Processor clock is pll / 35.5
|
||||||
|
#define SYSCTL_SYSDIV_36_5 0xD2000000 // Processor clock is pll / 36.5
|
||||||
|
#define SYSCTL_SYSDIV_37_5 0xD2800000 // Processor clock is pll / 37.5
|
||||||
|
#define SYSCTL_SYSDIV_38_5 0xD3000000 // Processor clock is pll / 38.5
|
||||||
|
#define SYSCTL_SYSDIV_39_5 0xD3800000 // Processor clock is pll / 39.5
|
||||||
|
#define SYSCTL_SYSDIV_40_5 0xD4000000 // Processor clock is pll / 40.5
|
||||||
|
#define SYSCTL_SYSDIV_41_5 0xD4800000 // Processor clock is pll / 41.5
|
||||||
|
#define SYSCTL_SYSDIV_42_5 0xD5000000 // Processor clock is pll / 42.5
|
||||||
|
#define SYSCTL_SYSDIV_43_5 0xD5800000 // Processor clock is pll / 43.5
|
||||||
|
#define SYSCTL_SYSDIV_44_5 0xD6000000 // Processor clock is pll / 44.5
|
||||||
|
#define SYSCTL_SYSDIV_45_5 0xD6800000 // Processor clock is pll / 45.5
|
||||||
|
#define SYSCTL_SYSDIV_46_5 0xD7000000 // Processor clock is pll / 46.5
|
||||||
|
#define SYSCTL_SYSDIV_47_5 0xD7800000 // Processor clock is pll / 47.5
|
||||||
|
#define SYSCTL_SYSDIV_48_5 0xD8000000 // Processor clock is pll / 48.5
|
||||||
|
#define SYSCTL_SYSDIV_49_5 0xD8800000 // Processor clock is pll / 49.5
|
||||||
|
#define SYSCTL_SYSDIV_50_5 0xD9000000 // Processor clock is pll / 50.5
|
||||||
|
#define SYSCTL_SYSDIV_51_5 0xD9800000 // Processor clock is pll / 51.5
|
||||||
|
#define SYSCTL_SYSDIV_52_5 0xDA000000 // Processor clock is pll / 52.5
|
||||||
|
#define SYSCTL_SYSDIV_53_5 0xDA800000 // Processor clock is pll / 53.5
|
||||||
|
#define SYSCTL_SYSDIV_54_5 0xDB000000 // Processor clock is pll / 54.5
|
||||||
|
#define SYSCTL_SYSDIV_55_5 0xDB800000 // Processor clock is pll / 55.5
|
||||||
|
#define SYSCTL_SYSDIV_56_5 0xDC000000 // Processor clock is pll / 56.5
|
||||||
|
#define SYSCTL_SYSDIV_57_5 0xDC800000 // Processor clock is pll / 57.5
|
||||||
|
#define SYSCTL_SYSDIV_58_5 0xDD000000 // Processor clock is pll / 58.5
|
||||||
|
#define SYSCTL_SYSDIV_59_5 0xDD800000 // Processor clock is pll / 59.5
|
||||||
|
#define SYSCTL_SYSDIV_60_5 0xDE000000 // Processor clock is pll / 60.5
|
||||||
|
#define SYSCTL_SYSDIV_61_5 0xDE800000 // Processor clock is pll / 61.5
|
||||||
|
#define SYSCTL_SYSDIV_62_5 0xDF000000 // Processor clock is pll / 62.5
|
||||||
|
#define SYSCTL_SYSDIV_63_5 0xDF800000 // Processor clock is pll / 63.5
|
||||||
|
#define SYSCTL_USE_PLL 0x00000000 // System clock is the PLL clock
|
||||||
|
#define SYSCTL_USE_OSC 0x00003800 // System clock is the osc clock
|
||||||
|
#define SYSCTL_XTAL_1MHZ 0x00000000 // External crystal is 1MHz
|
||||||
|
#define SYSCTL_XTAL_1_84MHZ 0x00000040 // External crystal is 1.8432MHz
|
||||||
|
#define SYSCTL_XTAL_2MHZ 0x00000080 // External crystal is 2MHz
|
||||||
|
#define SYSCTL_XTAL_2_45MHZ 0x000000C0 // External crystal is 2.4576MHz
|
||||||
|
#define SYSCTL_XTAL_3_57MHZ 0x00000100 // External crystal is 3.579545MHz
|
||||||
|
#define SYSCTL_XTAL_3_68MHZ 0x00000140 // External crystal is 3.6864MHz
|
||||||
|
#define SYSCTL_XTAL_4MHZ 0x00000180 // External crystal is 4MHz
|
||||||
|
#define SYSCTL_XTAL_4_09MHZ 0x000001C0 // External crystal is 4.096MHz
|
||||||
|
#define SYSCTL_XTAL_4_91MHZ 0x00000200 // External crystal is 4.9152MHz
|
||||||
|
#define SYSCTL_XTAL_5MHZ 0x00000240 // External crystal is 5MHz
|
||||||
|
#define SYSCTL_XTAL_5_12MHZ 0x00000280 // External crystal is 5.12MHz
|
||||||
|
#define SYSCTL_XTAL_6MHZ 0x000002C0 // External crystal is 6MHz
|
||||||
|
#define SYSCTL_XTAL_6_14MHZ 0x00000300 // External crystal is 6.144MHz
|
||||||
|
#define SYSCTL_XTAL_7_37MHZ 0x00000340 // External crystal is 7.3728MHz
|
||||||
|
#define SYSCTL_XTAL_8MHZ 0x00000380 // External crystal is 8MHz
|
||||||
|
#define SYSCTL_XTAL_8_19MHZ 0x000003C0 // External crystal is 8.192MHz
|
||||||
|
#define SYSCTL_XTAL_10MHZ 0x00000400 // External crystal is 10 MHz
|
||||||
|
#define SYSCTL_XTAL_12MHZ 0x00000440 // External crystal is 12 MHz
|
||||||
|
#define SYSCTL_XTAL_12_2MHZ 0x00000480 // External crystal is 12.288 MHz
|
||||||
|
#define SYSCTL_XTAL_13_5MHZ 0x000004C0 // External crystal is 13.56 MHz
|
||||||
|
#define SYSCTL_XTAL_14_3MHZ 0x00000500 // External crystal is 14.31818 MHz
|
||||||
|
#define SYSCTL_XTAL_16MHZ 0x00000540 // External crystal is 16 MHz
|
||||||
|
#define SYSCTL_XTAL_16_3MHZ 0x00000580 // External crystal is 16.384 MHz
|
||||||
|
#define SYSCTL_OSC_MAIN 0x00000000 // Osc source is main osc
|
||||||
|
#define SYSCTL_OSC_INT 0x00000010 // Osc source is int. osc
|
||||||
|
#define SYSCTL_OSC_INT4 0x00000020 // Osc source is int. osc /4
|
||||||
|
#define SYSCTL_OSC_INT30 0x00000030 // Osc source is int. 30 KHz
|
||||||
|
#define SYSCTL_OSC_EXT4_19 0x80000028 // Osc source is ext. 4.19 MHz
|
||||||
|
#define SYSCTL_OSC_EXT32 0x80000038 // Osc source is ext. 32 KHz
|
||||||
|
#define SYSCTL_INT_PIOSC_DIS 0x00000004 // Disable interal precision osc.
|
||||||
|
#define SYSCTL_INT_OSC_DIS 0x00000002 // Disable internal oscillator
|
||||||
|
#define SYSCTL_MAIN_OSC_DIS 0x00000001 // Disable main oscillator
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern unsigned long SysCtlSRAMSizeGet(void);
|
||||||
|
extern unsigned long SysCtlFlashSizeGet(void);
|
||||||
|
extern tBoolean SysCtlPinPresent(unsigned long ulPin);
|
||||||
|
extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);
|
||||||
|
extern void SysCtlPeripheralClockGating(tBoolean bEnable);
|
||||||
|
extern void SysCtlIntRegister(void (*pfnHandler)(void));
|
||||||
|
extern void SysCtlIntUnregister(void);
|
||||||
|
extern void SysCtlIntEnable(unsigned long ulInts);
|
||||||
|
extern void SysCtlIntDisable(unsigned long ulInts);
|
||||||
|
extern void SysCtlIntClear(unsigned long ulInts);
|
||||||
|
extern unsigned long SysCtlIntStatus(tBoolean bMasked);
|
||||||
|
extern void SysCtlLDOSet(unsigned long ulVoltage);
|
||||||
|
extern unsigned long SysCtlLDOGet(void);
|
||||||
|
extern void SysCtlLDOConfigSet(unsigned long ulConfig);
|
||||||
|
extern void SysCtlReset(void);
|
||||||
|
extern void SysCtlSleep(void);
|
||||||
|
extern void SysCtlDeepSleep(void);
|
||||||
|
extern unsigned long SysCtlResetCauseGet(void);
|
||||||
|
extern void SysCtlResetCauseClear(unsigned long ulCauses);
|
||||||
|
extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
|
||||||
|
unsigned long ulDelay);
|
||||||
|
extern void SysCtlDelay(unsigned long ulCount);
|
||||||
|
extern void SysCtlClockSet(unsigned long ulConfig);
|
||||||
|
extern unsigned long SysCtlClockGet(void);
|
||||||
|
extern void SysCtlPWMClockSet(unsigned long ulConfig);
|
||||||
|
extern unsigned long SysCtlPWMClockGet(void);
|
||||||
|
extern void SysCtlADCSpeedSet(unsigned long ulSpeed);
|
||||||
|
extern unsigned long SysCtlADCSpeedGet(void);
|
||||||
|
extern void SysCtlIOSCVerificationSet(tBoolean bEnable);
|
||||||
|
extern void SysCtlMOSCVerificationSet(tBoolean bEnable);
|
||||||
|
extern void SysCtlPLLVerificationSet(tBoolean bEnable);
|
||||||
|
extern void SysCtlClkVerificationClear(void);
|
||||||
|
extern void SysCtlGPIOAHBEnable(unsigned long ulGPIOPeripheral);
|
||||||
|
extern void SysCtlGPIOAHBDisable(unsigned long ulGPIOPeripheral);
|
||||||
|
extern void SysCtlUSBPLLEnable(void);
|
||||||
|
extern void SysCtlUSBPLLDisable(void);
|
||||||
|
extern unsigned long SysCtlI2SMClkSet(unsigned long ulInputClock,
|
||||||
|
unsigned long ulMClk);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __SYSCTL_H__
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,243 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// uart.h - Defines and Macros for the UART.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __UART_H__
|
||||||
|
#define __UART_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTIntEnable, UARTIntDisable, and UARTIntClear
|
||||||
|
// as the ulIntFlags parameter, and returned from UARTIntStatus.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_INT_OE 0x400 // Overrun Error Interrupt Mask
|
||||||
|
#define UART_INT_BE 0x200 // Break Error Interrupt Mask
|
||||||
|
#define UART_INT_PE 0x100 // Parity Error Interrupt Mask
|
||||||
|
#define UART_INT_FE 0x080 // Framing Error Interrupt Mask
|
||||||
|
#define UART_INT_RT 0x040 // Receive Timeout Interrupt Mask
|
||||||
|
#define UART_INT_TX 0x020 // Transmit Interrupt Mask
|
||||||
|
#define UART_INT_RX 0x010 // Receive Interrupt Mask
|
||||||
|
#define UART_INT_DSR 0x008 // DSR Modem Interrupt Mask
|
||||||
|
#define UART_INT_DCD 0x004 // DCD Modem Interrupt Mask
|
||||||
|
#define UART_INT_CTS 0x002 // CTS Modem Interrupt Mask
|
||||||
|
#define UART_INT_RI 0x001 // RI Modem Interrupt Mask
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTConfigSetExpClk as the ulConfig parameter
|
||||||
|
// and returned by UARTConfigGetExpClk in the pulConfig parameter.
|
||||||
|
// Additionally, the UART_CONFIG_PAR_* subset can be passed to
|
||||||
|
// UARTParityModeSet as the ulParity parameter, and are returned by
|
||||||
|
// UARTParityModeGet.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_CONFIG_WLEN_MASK 0x00000060 // Mask for extracting word length
|
||||||
|
#define UART_CONFIG_WLEN_8 0x00000060 // 8 bit data
|
||||||
|
#define UART_CONFIG_WLEN_7 0x00000040 // 7 bit data
|
||||||
|
#define UART_CONFIG_WLEN_6 0x00000020 // 6 bit data
|
||||||
|
#define UART_CONFIG_WLEN_5 0x00000000 // 5 bit data
|
||||||
|
#define UART_CONFIG_STOP_MASK 0x00000008 // Mask for extracting stop bits
|
||||||
|
#define UART_CONFIG_STOP_ONE 0x00000000 // One stop bit
|
||||||
|
#define UART_CONFIG_STOP_TWO 0x00000008 // Two stop bits
|
||||||
|
#define UART_CONFIG_PAR_MASK 0x00000086 // Mask for extracting parity
|
||||||
|
#define UART_CONFIG_PAR_NONE 0x00000000 // No parity
|
||||||
|
#define UART_CONFIG_PAR_EVEN 0x00000006 // Even parity
|
||||||
|
#define UART_CONFIG_PAR_ODD 0x00000002 // Odd parity
|
||||||
|
#define UART_CONFIG_PAR_ONE 0x00000082 // Parity bit is one
|
||||||
|
#define UART_CONFIG_PAR_ZERO 0x00000086 // Parity bit is zero
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTFIFOLevelSet as the ulTxLevel parameter and
|
||||||
|
// returned by UARTFIFOLevelGet in the pulTxLevel.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_FIFO_TX1_8 0x00000000 // Transmit interrupt at 1/8 Full
|
||||||
|
#define UART_FIFO_TX2_8 0x00000001 // Transmit interrupt at 1/4 Full
|
||||||
|
#define UART_FIFO_TX4_8 0x00000002 // Transmit interrupt at 1/2 Full
|
||||||
|
#define UART_FIFO_TX6_8 0x00000003 // Transmit interrupt at 3/4 Full
|
||||||
|
#define UART_FIFO_TX7_8 0x00000004 // Transmit interrupt at 7/8 Full
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTFIFOLevelSet as the ulRxLevel parameter and
|
||||||
|
// returned by UARTFIFOLevelGet in the pulRxLevel.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_FIFO_RX1_8 0x00000000 // Receive interrupt at 1/8 Full
|
||||||
|
#define UART_FIFO_RX2_8 0x00000008 // Receive interrupt at 1/4 Full
|
||||||
|
#define UART_FIFO_RX4_8 0x00000010 // Receive interrupt at 1/2 Full
|
||||||
|
#define UART_FIFO_RX6_8 0x00000018 // Receive interrupt at 3/4 Full
|
||||||
|
#define UART_FIFO_RX7_8 0x00000020 // Receive interrupt at 7/8 Full
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTDMAEnable() and UARTDMADisable().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_DMA_ERR_RXSTOP 0x00000004 // Stop DMA receive if UART error
|
||||||
|
#define UART_DMA_TX 0x00000002 // Enable DMA for transmit
|
||||||
|
#define UART_DMA_RX 0x00000001 // Enable DMA for receive
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values returned from UARTRxErrorGet().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_RXERROR_OVERRUN 0x00000008
|
||||||
|
#define UART_RXERROR_BREAK 0x00000004
|
||||||
|
#define UART_RXERROR_PARITY 0x00000002
|
||||||
|
#define UART_RXERROR_FRAMING 0x00000001
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTHandshakeOutputsSet() or returned from
|
||||||
|
// UARTHandshakeOutputGet().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_OUTPUT_RTS 0x00000800
|
||||||
|
#define UART_OUTPUT_DTR 0x00000400
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be returned from UARTHandshakeInputsGet().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_INPUT_RI 0x00000100
|
||||||
|
#define UART_INPUT_DCD 0x00000004
|
||||||
|
#define UART_INPUT_DSR 0x00000002
|
||||||
|
#define UART_INPUT_CTS 0x00000001
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTFlowControl() or returned from
|
||||||
|
// UARTFlowControlGet().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_FLOWCONTROL_TX 0x00008000
|
||||||
|
#define UART_FLOWCONTROL_RX 0x00004000
|
||||||
|
#define UART_FLOWCONTROL_NONE 0x00000000
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to UARTTxIntModeSet() or returned from
|
||||||
|
// UARTTxIntModeGet().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_TXINT_MODE_FIFO 0x00000000
|
||||||
|
#define UART_TXINT_MODE_EOT 0x00000010
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// API Function prototypes
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void UARTParityModeSet(unsigned long ulBase, unsigned long ulParity);
|
||||||
|
extern unsigned long UARTParityModeGet(unsigned long ulBase);
|
||||||
|
extern void UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel,
|
||||||
|
unsigned long ulRxLevel);
|
||||||
|
extern void UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel,
|
||||||
|
unsigned long *pulRxLevel);
|
||||||
|
extern void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
|
||||||
|
unsigned long ulBaud, unsigned long ulConfig);
|
||||||
|
extern void UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
|
||||||
|
unsigned long *pulBaud,
|
||||||
|
unsigned long *pulConfig);
|
||||||
|
extern void UARTEnable(unsigned long ulBase);
|
||||||
|
extern void UARTDisable(unsigned long ulBase);
|
||||||
|
extern void UARTFIFOEnable(unsigned long ulBase);
|
||||||
|
extern void UARTFIFODisable(unsigned long ulBase);
|
||||||
|
extern void UARTEnableSIR(unsigned long ulBase, tBoolean bLowPower);
|
||||||
|
extern void UARTDisableSIR(unsigned long ulBase);
|
||||||
|
extern tBoolean UARTCharsAvail(unsigned long ulBase);
|
||||||
|
extern tBoolean UARTSpaceAvail(unsigned long ulBase);
|
||||||
|
extern long UARTCharGetNonBlocking(unsigned long ulBase);
|
||||||
|
extern long UARTCharGet(unsigned long ulBase);
|
||||||
|
extern tBoolean UARTCharPutNonBlocking(unsigned long ulBase,
|
||||||
|
unsigned char ucData);
|
||||||
|
extern void UARTCharPut(unsigned long ulBase, unsigned char ucData);
|
||||||
|
extern void UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState);
|
||||||
|
extern tBoolean UARTBusy(unsigned long ulBase);
|
||||||
|
extern void UARTIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
|
||||||
|
extern void UARTIntUnregister(unsigned long ulBase);
|
||||||
|
extern void UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
|
extern void UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
|
extern unsigned long UARTIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||||
|
extern void UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
|
extern void UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags);
|
||||||
|
extern void UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags);
|
||||||
|
extern unsigned long UARTRxErrorGet(unsigned long ulBase);
|
||||||
|
extern void UARTRxErrorClear(unsigned long ulBase);
|
||||||
|
extern void UARTSmartCardEnable(unsigned long ulBase);
|
||||||
|
extern void UARTSmartCardDisable(unsigned long ulBase);
|
||||||
|
extern void UARTModemControlSet(unsigned long ulBase,
|
||||||
|
unsigned long ulControl);
|
||||||
|
extern void UARTModemControlClear(unsigned long ulBase,
|
||||||
|
unsigned long ulControl);
|
||||||
|
extern unsigned long UARTModemControlGet(unsigned long ulBase);
|
||||||
|
extern unsigned long UARTModemStatusGet(unsigned long ulBase);
|
||||||
|
extern void UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode);
|
||||||
|
extern unsigned long UARTFlowControlGet(unsigned long ulBase);
|
||||||
|
extern void UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode);
|
||||||
|
extern unsigned long UARTTxIntModeGet(unsigned long ulBase);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Several UART APIs have been renamed, with the original function name being
|
||||||
|
// deprecated. These defines provide backward compatibility.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#include "driverlib/sysctl.h"
|
||||||
|
#define UARTConfigSet(a, b, c) \
|
||||||
|
UARTConfigSetExpClk(a, SysCtlClockGet(), b, c)
|
||||||
|
#define UARTConfigGet(a, b, c) \
|
||||||
|
UARTConfigGetExpClk(a, SysCtlClockGet(), b, c)
|
||||||
|
#define UARTCharNonBlockingGet(a) \
|
||||||
|
UARTCharGetNonBlocking(a)
|
||||||
|
#define UARTCharNonBlockingPut(a, b) \
|
||||||
|
UARTCharPutNonBlocking(a, b)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __UART_H__
|
|
@ -0,0 +1,756 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// hw_can.h - Defines and macros used when accessing the CAN controllers.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2006-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Firmware Development Package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __HW_CAN_H__
|
||||||
|
#define __HW_CAN_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the CAN register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_O_CTL 0x00000000 // CAN Control
|
||||||
|
#define CAN_O_STS 0x00000004 // CAN Status
|
||||||
|
#define CAN_O_ERR 0x00000008 // CAN Error Counter
|
||||||
|
#define CAN_O_BIT 0x0000000C // CAN Bit Timing
|
||||||
|
#define CAN_O_INT 0x00000010 // CAN Interrupt
|
||||||
|
#define CAN_O_TST 0x00000014 // CAN Test
|
||||||
|
#define CAN_O_BRPE 0x00000018 // CAN Baud Rate Prescaler
|
||||||
|
// Extension
|
||||||
|
#define CAN_O_IF1CRQ 0x00000020 // CAN IF1 Command Request
|
||||||
|
#define CAN_O_IF1CMSK 0x00000024 // CAN IF1 Command Mask
|
||||||
|
#define CAN_O_IF1MSK1 0x00000028 // CAN IF1 Mask 1
|
||||||
|
#define CAN_O_IF1MSK2 0x0000002C // CAN IF1 Mask 2
|
||||||
|
#define CAN_O_IF1ARB1 0x00000030 // CAN IF1 Arbitration 1
|
||||||
|
#define CAN_O_IF1ARB2 0x00000034 // CAN IF1 Arbitration 2
|
||||||
|
#define CAN_O_IF1MCTL 0x00000038 // CAN IF1 Message Control
|
||||||
|
#define CAN_O_IF1DA1 0x0000003C // CAN IF1 Data A1
|
||||||
|
#define CAN_O_IF1DA2 0x00000040 // CAN IF1 Data A2
|
||||||
|
#define CAN_O_IF1DB1 0x00000044 // CAN IF1 Data B1
|
||||||
|
#define CAN_O_IF1DB2 0x00000048 // CAN IF1 Data B2
|
||||||
|
#define CAN_O_IF2CRQ 0x00000080 // CAN IF2 Command Request
|
||||||
|
#define CAN_O_IF2CMSK 0x00000084 // CAN IF2 Command Mask
|
||||||
|
#define CAN_O_IF2MSK1 0x00000088 // CAN IF2 Mask 1
|
||||||
|
#define CAN_O_IF2MSK2 0x0000008C // CAN IF2 Mask 2
|
||||||
|
#define CAN_O_IF2ARB1 0x00000090 // CAN IF2 Arbitration 1
|
||||||
|
#define CAN_O_IF2ARB2 0x00000094 // CAN IF2 Arbitration 2
|
||||||
|
#define CAN_O_IF2MCTL 0x00000098 // CAN IF2 Message Control
|
||||||
|
#define CAN_O_IF2DA1 0x0000009C // CAN IF2 Data A1
|
||||||
|
#define CAN_O_IF2DA2 0x000000A0 // CAN IF2 Data A2
|
||||||
|
#define CAN_O_IF2DB1 0x000000A4 // CAN IF2 Data B1
|
||||||
|
#define CAN_O_IF2DB2 0x000000A8 // CAN IF2 Data B2
|
||||||
|
#define CAN_O_TXRQ1 0x00000100 // CAN Transmission Request 1
|
||||||
|
#define CAN_O_TXRQ2 0x00000104 // CAN Transmission Request 2
|
||||||
|
#define CAN_O_NWDA1 0x00000120 // CAN New Data 1
|
||||||
|
#define CAN_O_NWDA2 0x00000124 // CAN New Data 2
|
||||||
|
#define CAN_O_MSG1INT 0x00000140 // CAN Message 1 Interrupt Pending
|
||||||
|
#define CAN_O_MSG2INT 0x00000144 // CAN Message 2 Interrupt Pending
|
||||||
|
#define CAN_O_MSG1VAL 0x00000160 // CAN Message 1 Valid
|
||||||
|
#define CAN_O_MSG2VAL 0x00000164 // CAN Message 2 Valid
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_CTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_CTL_TEST 0x00000080 // Test Mode Enable
|
||||||
|
#define CAN_CTL_CCE 0x00000040 // Configuration Change Enable
|
||||||
|
#define CAN_CTL_DAR 0x00000020 // Disable Automatic-Retransmission
|
||||||
|
#define CAN_CTL_EIE 0x00000008 // Error Interrupt Enable
|
||||||
|
#define CAN_CTL_SIE 0x00000004 // Status Interrupt Enable
|
||||||
|
#define CAN_CTL_IE 0x00000002 // CAN Interrupt Enable
|
||||||
|
#define CAN_CTL_INIT 0x00000001 // Initialization
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_STS register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_STS_BOFF 0x00000080 // Bus-Off Status
|
||||||
|
#define CAN_STS_EWARN 0x00000040 // Warning Status
|
||||||
|
#define CAN_STS_EPASS 0x00000020 // Error Passive
|
||||||
|
#define CAN_STS_RXOK 0x00000010 // Received a Message Successfully
|
||||||
|
#define CAN_STS_TXOK 0x00000008 // Transmitted a Message
|
||||||
|
// Successfully
|
||||||
|
#define CAN_STS_LEC_M 0x00000007 // Last Error Code
|
||||||
|
#define CAN_STS_LEC_NONE 0x00000000 // No Error
|
||||||
|
#define CAN_STS_LEC_STUFF 0x00000001 // Stuff Error
|
||||||
|
#define CAN_STS_LEC_FORM 0x00000002 // Format Error
|
||||||
|
#define CAN_STS_LEC_ACK 0x00000003 // ACK Error
|
||||||
|
#define CAN_STS_LEC_BIT1 0x00000004 // Bit 1 Error
|
||||||
|
#define CAN_STS_LEC_BIT0 0x00000005 // Bit 0 Error
|
||||||
|
#define CAN_STS_LEC_CRC 0x00000006 // CRC Error
|
||||||
|
#define CAN_STS_LEC_NOEVENT 0x00000007 // No Event
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_ERR register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_ERR_RP 0x00008000 // Received Error Passive
|
||||||
|
#define CAN_ERR_REC_M 0x00007F00 // Receive Error Counter
|
||||||
|
#define CAN_ERR_TEC_M 0x000000FF // Transmit Error Counter
|
||||||
|
#define CAN_ERR_REC_S 8
|
||||||
|
#define CAN_ERR_TEC_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_BIT register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_BIT_TSEG2_M 0x00007000 // Time Segment after Sample Point
|
||||||
|
#define CAN_BIT_TSEG1_M 0x00000F00 // Time Segment Before Sample Point
|
||||||
|
#define CAN_BIT_SJW_M 0x000000C0 // (Re)Synchronization Jump Width
|
||||||
|
#define CAN_BIT_BRP_M 0x0000003F // Baud Rate Prescaler
|
||||||
|
#define CAN_BIT_TSEG2_S 12
|
||||||
|
#define CAN_BIT_TSEG1_S 8
|
||||||
|
#define CAN_BIT_SJW_S 6
|
||||||
|
#define CAN_BIT_BRP_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_INT register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_INT_INTID_M 0x0000FFFF // Interrupt Identifier
|
||||||
|
#define CAN_INT_INTID_NONE 0x00000000 // No interrupt pending
|
||||||
|
#define CAN_INT_INTID_STATUS 0x00008000 // Status Interrupt
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_TST register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_TST_RX 0x00000080 // Receive Observation
|
||||||
|
#define CAN_TST_TX_M 0x00000060 // Transmit Control
|
||||||
|
#define CAN_TST_TX_CANCTL 0x00000000 // CAN Module Control
|
||||||
|
#define CAN_TST_TX_SAMPLE 0x00000020 // Sample Point
|
||||||
|
#define CAN_TST_TX_DOMINANT 0x00000040 // Driven Low
|
||||||
|
#define CAN_TST_TX_RECESSIVE 0x00000060 // Driven High
|
||||||
|
#define CAN_TST_LBACK 0x00000010 // Loopback Mode
|
||||||
|
#define CAN_TST_SILENT 0x00000008 // Silent Mode
|
||||||
|
#define CAN_TST_BASIC 0x00000004 // Basic Mode
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_BRPE register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_BRPE_BRPE_M 0x0000000F // Baud Rate Prescaler Extension
|
||||||
|
#define CAN_BRPE_BRPE_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1CRQ register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1CRQ_BUSY 0x00008000 // Busy Flag
|
||||||
|
#define CAN_IF1CRQ_MNUM_M 0x0000003F // Message Number
|
||||||
|
#define CAN_IF1CRQ_MNUM_RSVD 0x00000000 // 0 is not a valid message number;
|
||||||
|
// it is interpreted as 0x20, or
|
||||||
|
// object 32
|
||||||
|
#define CAN_IF1CRQ_MNUM_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1CMSK register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1CMSK_WRNRD 0x00000080 // Write, Not Read
|
||||||
|
#define CAN_IF1CMSK_MASK 0x00000040 // Access Mask Bits
|
||||||
|
#define CAN_IF1CMSK_ARB 0x00000020 // Access Arbitration Bits
|
||||||
|
#define CAN_IF1CMSK_CONTROL 0x00000010 // Access Control Bits
|
||||||
|
#define CAN_IF1CMSK_CLRINTPND 0x00000008 // Clear Interrupt Pending Bit
|
||||||
|
#define CAN_IF1CMSK_NEWDAT 0x00000004 // Access New Data
|
||||||
|
#define CAN_IF1CMSK_TXRQST 0x00000004 // Access Transmission Request
|
||||||
|
#define CAN_IF1CMSK_DATAA 0x00000002 // Access Data Byte 0 to 3
|
||||||
|
#define CAN_IF1CMSK_DATAB 0x00000001 // Access Data Byte 4 to 7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1MSK1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1MSK1_IDMSK_M 0x0000FFFF // Identifier Mask
|
||||||
|
#define CAN_IF1MSK1_IDMSK_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1MSK2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1MSK2_MXTD 0x00008000 // Mask Extended Identifier
|
||||||
|
#define CAN_IF1MSK2_MDIR 0x00004000 // Mask Message Direction
|
||||||
|
#define CAN_IF1MSK2_IDMSK_M 0x00001FFF // Identifier Mask
|
||||||
|
#define CAN_IF1MSK2_IDMSK_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1ARB1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1ARB1_ID_M 0x0000FFFF // Message Identifier
|
||||||
|
#define CAN_IF1ARB1_ID_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1ARB2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1ARB2_MSGVAL 0x00008000 // Message Valid
|
||||||
|
#define CAN_IF1ARB2_XTD 0x00004000 // Extended Identifier
|
||||||
|
#define CAN_IF1ARB2_DIR 0x00002000 // Message Direction
|
||||||
|
#define CAN_IF1ARB2_ID_M 0x00001FFF // Message Identifier
|
||||||
|
#define CAN_IF1ARB2_ID_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1MCTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1MCTL_NEWDAT 0x00008000 // New Data
|
||||||
|
#define CAN_IF1MCTL_MSGLST 0x00004000 // Message Lost
|
||||||
|
#define CAN_IF1MCTL_INTPND 0x00002000 // Interrupt Pending
|
||||||
|
#define CAN_IF1MCTL_UMASK 0x00001000 // Use Acceptance Mask
|
||||||
|
#define CAN_IF1MCTL_TXIE 0x00000800 // Transmit Interrupt Enable
|
||||||
|
#define CAN_IF1MCTL_RXIE 0x00000400 // Receive Interrupt Enable
|
||||||
|
#define CAN_IF1MCTL_RMTEN 0x00000200 // Remote Enable
|
||||||
|
#define CAN_IF1MCTL_TXRQST 0x00000100 // Transmit Request
|
||||||
|
#define CAN_IF1MCTL_EOB 0x00000080 // End of Buffer
|
||||||
|
#define CAN_IF1MCTL_DLC_M 0x0000000F // Data Length Code
|
||||||
|
#define CAN_IF1MCTL_DLC_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1DA1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1DA1_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF1DA1_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1DA2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1DA2_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF1DA2_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1DB1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1DB1_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF1DB1_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF1DB2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF1DB2_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF1DB2_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2CRQ register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2CRQ_BUSY 0x00008000 // Busy Flag
|
||||||
|
#define CAN_IF2CRQ_MNUM_M 0x0000003F // Message Number
|
||||||
|
#define CAN_IF2CRQ_MNUM_RSVD 0x00000000 // 0 is not a valid message number;
|
||||||
|
// it is interpreted as 0x20, or
|
||||||
|
// object 32
|
||||||
|
#define CAN_IF2CRQ_MNUM_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2CMSK register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2CMSK_WRNRD 0x00000080 // Write, Not Read
|
||||||
|
#define CAN_IF2CMSK_MASK 0x00000040 // Access Mask Bits
|
||||||
|
#define CAN_IF2CMSK_ARB 0x00000020 // Access Arbitration Bits
|
||||||
|
#define CAN_IF2CMSK_CONTROL 0x00000010 // Access Control Bits
|
||||||
|
#define CAN_IF2CMSK_CLRINTPND 0x00000008 // Clear Interrupt Pending Bit
|
||||||
|
#define CAN_IF2CMSK_NEWDAT 0x00000004 // Access New Data
|
||||||
|
#define CAN_IF2CMSK_TXRQST 0x00000004 // Access Transmission Request
|
||||||
|
#define CAN_IF2CMSK_DATAA 0x00000002 // Access Data Byte 0 to 3
|
||||||
|
#define CAN_IF2CMSK_DATAB 0x00000001 // Access Data Byte 4 to 7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2MSK1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2MSK1_IDMSK_M 0x0000FFFF // Identifier Mask
|
||||||
|
#define CAN_IF2MSK1_IDMSK_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2MSK2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2MSK2_MXTD 0x00008000 // Mask Extended Identifier
|
||||||
|
#define CAN_IF2MSK2_MDIR 0x00004000 // Mask Message Direction
|
||||||
|
#define CAN_IF2MSK2_IDMSK_M 0x00001FFF // Identifier Mask
|
||||||
|
#define CAN_IF2MSK2_IDMSK_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2ARB1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2ARB1_ID_M 0x0000FFFF // Message Identifier
|
||||||
|
#define CAN_IF2ARB1_ID_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2ARB2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2ARB2_MSGVAL 0x00008000 // Message Valid
|
||||||
|
#define CAN_IF2ARB2_XTD 0x00004000 // Extended Identifier
|
||||||
|
#define CAN_IF2ARB2_DIR 0x00002000 // Message Direction
|
||||||
|
#define CAN_IF2ARB2_ID_M 0x00001FFF // Message Identifier
|
||||||
|
#define CAN_IF2ARB2_ID_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2MCTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2MCTL_NEWDAT 0x00008000 // New Data
|
||||||
|
#define CAN_IF2MCTL_MSGLST 0x00004000 // Message Lost
|
||||||
|
#define CAN_IF2MCTL_INTPND 0x00002000 // Interrupt Pending
|
||||||
|
#define CAN_IF2MCTL_UMASK 0x00001000 // Use Acceptance Mask
|
||||||
|
#define CAN_IF2MCTL_TXIE 0x00000800 // Transmit Interrupt Enable
|
||||||
|
#define CAN_IF2MCTL_RXIE 0x00000400 // Receive Interrupt Enable
|
||||||
|
#define CAN_IF2MCTL_RMTEN 0x00000200 // Remote Enable
|
||||||
|
#define CAN_IF2MCTL_TXRQST 0x00000100 // Transmit Request
|
||||||
|
#define CAN_IF2MCTL_EOB 0x00000080 // End of Buffer
|
||||||
|
#define CAN_IF2MCTL_DLC_M 0x0000000F // Data Length Code
|
||||||
|
#define CAN_IF2MCTL_DLC_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2DA1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2DA1_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF2DA1_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2DA2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2DA2_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF2DA2_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2DB1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2DB1_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF2DB1_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_IF2DB2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IF2DB2_DATA_M 0x0000FFFF // Data
|
||||||
|
#define CAN_IF2DB2_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_TXRQ1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_TXRQ1_TXRQST_M 0x0000FFFF // Transmission Request Bits
|
||||||
|
#define CAN_TXRQ1_TXRQST_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_TXRQ2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_TXRQ2_TXRQST_M 0x0000FFFF // Transmission Request Bits
|
||||||
|
#define CAN_TXRQ2_TXRQST_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_NWDA1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_NWDA1_NEWDAT_M 0x0000FFFF // New Data Bits
|
||||||
|
#define CAN_NWDA1_NEWDAT_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_NWDA2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_NWDA2_NEWDAT_M 0x0000FFFF // New Data Bits
|
||||||
|
#define CAN_NWDA2_NEWDAT_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_MSG1INT register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSG1INT_INTPND_M 0x0000FFFF // Interrupt Pending Bits
|
||||||
|
#define CAN_MSG1INT_INTPND_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_MSG2INT register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSG2INT_INTPND_M 0x0000FFFF // Interrupt Pending Bits
|
||||||
|
#define CAN_MSG2INT_INTPND_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_MSG1VAL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSG1VAL_MSGVAL_M 0x0000FFFF // Message Valid Bits
|
||||||
|
#define CAN_MSG1VAL_MSGVAL_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the CAN_O_MSG2VAL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSG2VAL_MSGVAL_M 0x0000FFFF // Message Valid Bits
|
||||||
|
#define CAN_MSG2VAL_MSGVAL_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following definitions are deprecated.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the CAN register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_O_MSGINT1 0x00000140 // Intr. Pending in Msg Obj 1 reg
|
||||||
|
#define CAN_O_MSGINT2 0x00000144 // Intr. Pending in Msg Obj 2 reg
|
||||||
|
#define CAN_O_MSGVAL1 0x00000160 // Message Valid in Msg Obj 1 reg
|
||||||
|
#define CAN_O_MSGVAL2 0x00000164 // Message Valid in Msg Obj 2 reg
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_STS
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_STS_LEC_MSK 0x00000007 // Last Error Code
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_ERR
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_ERR_REC_MASK 0x00007F00 // Receive error counter status
|
||||||
|
#define CAN_ERR_TEC_MASK 0x000000FF // Transmit error counter status
|
||||||
|
#define CAN_ERR_REC_SHIFT 8 // Receive error counter bit pos
|
||||||
|
#define CAN_ERR_TEC_SHIFT 0 // Transmit error counter bit pos
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_BIT
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_BIT_TSEG2 0x00007000 // Time segment after sample point
|
||||||
|
#define CAN_BIT_TSEG1 0x00000F00 // Time segment before sample point
|
||||||
|
#define CAN_BIT_SJW 0x000000C0 // (Re)Synchronization jump width
|
||||||
|
#define CAN_BIT_BRP 0x0000003F // Baud rate prescaler
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_INT
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_INT_INTID_MSK 0x0000FFFF // Interrupt Identifier
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_TST
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_TST_TX_MSK 0x00000060 // Overide control of CAN_TX pin
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_BRPE
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_BRPE_BRPE 0x0000000F // Baud rate prescaler extension
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_TXRQ1
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_TXRQ1_TXRQST 0x0000FFFF // Transmission Request Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_TXRQ2
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_TXRQ2_TXRQST 0x0000FFFF // Transmission Request Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_NWDA1
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_NWDA1_NEWDATA 0x0000FFFF // New Data Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_NWDA2
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_NWDA2_NEWDATA 0x0000FFFF // New Data Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_MSGINT1
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSGINT1_INTPND 0x0000FFFF // Interrupt Pending Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_MSGINT2
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSGINT2_INTPND 0x0000FFFF // Interrupt Pending Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_MSGVAL1
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSGVAL1_MSGVAL 0x0000FFFF // Message Valid Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_O_MSGVAL2
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_MSGVAL2_MSGVAL 0x0000FFFF // Message Valid Bits
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the reset values of the can
|
||||||
|
// registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_RV_IF1MSK2 0x0000FFFF
|
||||||
|
#define CAN_RV_IF1MSK1 0x0000FFFF
|
||||||
|
#define CAN_RV_IF2MSK1 0x0000FFFF
|
||||||
|
#define CAN_RV_IF2MSK2 0x0000FFFF
|
||||||
|
#define CAN_RV_BIT 0x00002301
|
||||||
|
#define CAN_RV_CTL 0x00000001
|
||||||
|
#define CAN_RV_IF1CRQ 0x00000001
|
||||||
|
#define CAN_RV_IF2CRQ 0x00000001
|
||||||
|
#define CAN_RV_TXRQ2 0x00000000
|
||||||
|
#define CAN_RV_IF2DB1 0x00000000
|
||||||
|
#define CAN_RV_INT 0x00000000
|
||||||
|
#define CAN_RV_IF1DB2 0x00000000
|
||||||
|
#define CAN_RV_BRPE 0x00000000
|
||||||
|
#define CAN_RV_IF2DA2 0x00000000
|
||||||
|
#define CAN_RV_MSGVAL2 0x00000000
|
||||||
|
#define CAN_RV_TXRQ1 0x00000000
|
||||||
|
#define CAN_RV_IF1MCTL 0x00000000
|
||||||
|
#define CAN_RV_IF1DB1 0x00000000
|
||||||
|
#define CAN_RV_STS 0x00000000
|
||||||
|
#define CAN_RV_MSGINT1 0x00000000
|
||||||
|
#define CAN_RV_IF1DA2 0x00000000
|
||||||
|
#define CAN_RV_TST 0x00000000
|
||||||
|
#define CAN_RV_IF1ARB1 0x00000000
|
||||||
|
#define CAN_RV_IF1ARB2 0x00000000
|
||||||
|
#define CAN_RV_NWDA2 0x00000000
|
||||||
|
#define CAN_RV_IF2CMSK 0x00000000
|
||||||
|
#define CAN_RV_NWDA1 0x00000000
|
||||||
|
#define CAN_RV_IF1DA1 0x00000000
|
||||||
|
#define CAN_RV_IF2DA1 0x00000000
|
||||||
|
#define CAN_RV_IF2MCTL 0x00000000
|
||||||
|
#define CAN_RV_MSGVAL1 0x00000000
|
||||||
|
#define CAN_RV_IF1CMSK 0x00000000
|
||||||
|
#define CAN_RV_ERR 0x00000000
|
||||||
|
#define CAN_RV_IF2ARB2 0x00000000
|
||||||
|
#define CAN_RV_MSGINT2 0x00000000
|
||||||
|
#define CAN_RV_IF2ARB1 0x00000000
|
||||||
|
#define CAN_RV_IF2DB2 0x00000000
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1CRQ
|
||||||
|
// and CAN_IF1CRQ registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFCRQ_BUSY 0x00008000 // Busy flag status
|
||||||
|
#define CAN_IFCRQ_MNUM_MSK 0x0000003F // Message Number
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1CMSK
|
||||||
|
// and CAN_IF2CMSK registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFCMSK_WRNRD 0x00000080 // Write, not Read
|
||||||
|
#define CAN_IFCMSK_MASK 0x00000040 // Access Mask Bits
|
||||||
|
#define CAN_IFCMSK_ARB 0x00000020 // Access Arbitration Bits
|
||||||
|
#define CAN_IFCMSK_CONTROL 0x00000010 // Access Control Bits
|
||||||
|
#define CAN_IFCMSK_CLRINTPND 0x00000008 // Clear interrupt pending Bit
|
||||||
|
#define CAN_IFCMSK_TXRQST 0x00000004 // Access Tx request bit (WRNRD=1)
|
||||||
|
#define CAN_IFCMSK_NEWDAT 0x00000004 // Access New Data bit (WRNRD=0)
|
||||||
|
#define CAN_IFCMSK_DATAA 0x00000002 // DataA access - bytes 0 to 3
|
||||||
|
#define CAN_IFCMSK_DATAB 0x00000001 // DataB access - bytes 4 to 7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1MSK1
|
||||||
|
// and CAN_IF2MSK1 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFMSK1_MSK 0x0000FFFF // Identifier Mask
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1MSK2
|
||||||
|
// and CAN_IF2MSK2 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFMSK2_MXTD 0x00008000 // Mask extended identifier
|
||||||
|
#define CAN_IFMSK2_MDIR 0x00004000 // Mask message direction
|
||||||
|
#define CAN_IFMSK2_MSK 0x00001FFF // Mask identifier
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1ARB1
|
||||||
|
// and CAN_IF2ARB1 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFARB1_ID 0x0000FFFF // Identifier
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1ARB2
|
||||||
|
// and CAN_IF2ARB2 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFARB2_MSGVAL 0x00008000 // Message valid
|
||||||
|
#define CAN_IFARB2_XTD 0x00004000 // Extended identifier
|
||||||
|
#define CAN_IFARB2_DIR 0x00002000 // Message direction
|
||||||
|
#define CAN_IFARB2_ID 0x00001FFF // Message identifier
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1MCTL
|
||||||
|
// and CAN_IF2MCTL registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFMCTL_NEWDAT 0x00008000 // New Data
|
||||||
|
#define CAN_IFMCTL_MSGLST 0x00004000 // Message lost
|
||||||
|
#define CAN_IFMCTL_INTPND 0x00002000 // Interrupt pending
|
||||||
|
#define CAN_IFMCTL_UMASK 0x00001000 // Use acceptance mask
|
||||||
|
#define CAN_IFMCTL_TXIE 0x00000800 // Transmit interrupt enable
|
||||||
|
#define CAN_IFMCTL_RXIE 0x00000400 // Receive interrupt enable
|
||||||
|
#define CAN_IFMCTL_RMTEN 0x00000200 // Remote enable
|
||||||
|
#define CAN_IFMCTL_TXRQST 0x00000100 // Transmit request
|
||||||
|
#define CAN_IFMCTL_EOB 0x00000080 // End of buffer
|
||||||
|
#define CAN_IFMCTL_DLC 0x0000000F // Data length code
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1DA1
|
||||||
|
// and CAN_IF2DA1 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFDA1_DATA 0x0000FFFF // Data - bytes 1 and 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1DA2
|
||||||
|
// and CAN_IF2DA2 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFDA2_DATA 0x0000FFFF // Data - bytes 3 and 2
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1DB1
|
||||||
|
// and CAN_IF2DB1 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFDB1_DATA 0x0000FFFF // Data - bytes 5 and 4
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the CAN_IF1DB2
|
||||||
|
// and CAN_IF2DB2 registers.
|
||||||
|
// Note: All bits may not be available in all registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CAN_IFDB2_DATA 0x0000FFFF // Data - bytes 7 and 6
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HW_CAN_H__
|
|
@ -0,0 +1,381 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// hw_flash.h - Macros used when accessing the flash controller.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Firmware Development Package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __HW_FLASH_H__
|
||||||
|
#define __HW_FLASH_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the FLASH register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FMA 0x400FD000 // Flash Memory Address
|
||||||
|
#define FLASH_FMD 0x400FD004 // Flash Memory Data
|
||||||
|
#define FLASH_FMC 0x400FD008 // Flash Memory Control
|
||||||
|
#define FLASH_FCRIS 0x400FD00C // Flash Controller Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define FLASH_FCIM 0x400FD010 // Flash Controller Interrupt Mask
|
||||||
|
#define FLASH_FCMISC 0x400FD014 // Flash Controller Masked
|
||||||
|
// Interrupt Status and Clear
|
||||||
|
#define FLASH_FMC2 0x400FD020 // Flash Memory Control 2
|
||||||
|
#define FLASH_FWBVAL 0x400FD030 // Flash Write Buffer Valid
|
||||||
|
#define FLASH_FCTL 0x400FD0F8 // Flash Control
|
||||||
|
#define FLASH_FWBN 0x400FD100 // Flash Write Buffer n
|
||||||
|
#define FLASH_RMCTL 0x400FE0F0 // ROM Control
|
||||||
|
#define FLASH_FMPRE 0x400FE130 // Flash Memory Protection Read
|
||||||
|
// Enable
|
||||||
|
#define FLASH_FMPPE 0x400FE134 // Flash Memory Protection Program
|
||||||
|
// Enable
|
||||||
|
#define FLASH_USECRL 0x400FE140 // USec Reload
|
||||||
|
#define FLASH_USERDBG 0x400FE1D0 // User Debug
|
||||||
|
#define FLASH_BOOTCFG 0x400FE1D0 // Boot Configuration
|
||||||
|
#define FLASH_USERREG0 0x400FE1E0 // User Register 0
|
||||||
|
#define FLASH_USERREG1 0x400FE1E4 // User Register 1
|
||||||
|
#define FLASH_USERREG2 0x400FE1E8 // User Register 2
|
||||||
|
#define FLASH_USERREG3 0x400FE1EC // User Register 3
|
||||||
|
#define FLASH_FMPRE0 0x400FE200 // Flash Memory Protection Read
|
||||||
|
// Enable 0
|
||||||
|
#define FLASH_FMPRE1 0x400FE204 // Flash Memory Protection Read
|
||||||
|
// Enable 1
|
||||||
|
#define FLASH_FMPRE2 0x400FE208 // Flash Memory Protection Read
|
||||||
|
// Enable 2
|
||||||
|
#define FLASH_FMPRE3 0x400FE20C // Flash Memory Protection Read
|
||||||
|
// Enable 3
|
||||||
|
#define FLASH_FMPPE0 0x400FE400 // Flash Memory Protection Program
|
||||||
|
// Enable 0
|
||||||
|
#define FLASH_FMPPE1 0x400FE404 // Flash Memory Protection Program
|
||||||
|
// Enable 1
|
||||||
|
#define FLASH_FMPPE2 0x400FE408 // Flash Memory Protection Program
|
||||||
|
// Enable 2
|
||||||
|
#define FLASH_FMPPE3 0x400FE40C // Flash Memory Protection Program
|
||||||
|
// Enable 3
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FMA register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FMA_OFFSET_M 0x0003FFFF // Address Offset
|
||||||
|
#define FLASH_FMA_OFFSET_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FMD register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FMD_DATA_M 0xFFFFFFFF // Data Value
|
||||||
|
#define FLASH_FMD_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FMC register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FMC_WRKEY 0xA4420000 // FLASH write key
|
||||||
|
#define FLASH_FMC_COMT 0x00000008 // Commit Register Value
|
||||||
|
#define FLASH_FMC_MERASE 0x00000004 // Mass Erase Flash Memory
|
||||||
|
#define FLASH_FMC_ERASE 0x00000002 // Erase a Page of Flash Memory
|
||||||
|
#define FLASH_FMC_WRITE 0x00000001 // Write a Word into Flash Memory
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FCRIS register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FCRIS_PRIS 0x00000002 // Programming Raw Interrupt Status
|
||||||
|
#define FLASH_FCRIS_ARIS 0x00000001 // Access Raw Interrupt Status
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FCIM register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FCIM_PMASK 0x00000002 // Programming Interrupt Mask
|
||||||
|
#define FLASH_FCIM_AMASK 0x00000001 // Access Interrupt Mask
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FCMISC register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FCMISC_PMISC 0x00000002 // Programming Masked Interrupt
|
||||||
|
// Status and Clear
|
||||||
|
#define FLASH_FCMISC_AMISC 0x00000001 // Access Masked Interrupt Status
|
||||||
|
// and Clear
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FMC2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FMC2_WRKEY 0xA4420000 // FLASH write key
|
||||||
|
#define FLASH_FMC2_WRBUF 0x00000001 // Buffered Flash Memory Write
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FWBVAL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FWBVAL_FWB_M 0xFFFFFFFF // Flash Memory Write Buffer
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FCTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FCTL_USDACK 0x00000002 // User Shut Down Acknowledge
|
||||||
|
#define FLASH_FCTL_USDREQ 0x00000001 // User Shut Down Request
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FWBN register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FWBN_DATA_M 0xFFFFFFFF // Data
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_RMCTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_RMCTL_BA 0x00000001 // Boot Alias
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_USECRL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_USECRL_M 0x000000FF // Microsecond Reload Value
|
||||||
|
#define FLASH_USECRL_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_USERDBG register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_USERDBG_NW 0x80000000 // User Debug Not Written
|
||||||
|
#define FLASH_USERDBG_DATA_M 0x7FFFFFFC // User Data
|
||||||
|
#define FLASH_USERDBG_DBG1 0x00000002 // Debug Control 1
|
||||||
|
#define FLASH_USERDBG_DBG0 0x00000001 // Debug Control 0
|
||||||
|
#define FLASH_USERDBG_DATA_S 2
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_BOOTCFG register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_BOOTCFG_NW 0x80000000 // Not Written
|
||||||
|
#define FLASH_BOOTCFG_PORT_M 0x0000E000 // Boot GPIO Port
|
||||||
|
#define FLASH_BOOTCFG_PORT_A 0x00000000 // Port A
|
||||||
|
#define FLASH_BOOTCFG_PORT_B 0x00002000 // Port B
|
||||||
|
#define FLASH_BOOTCFG_PORT_C 0x00004000 // Port C
|
||||||
|
#define FLASH_BOOTCFG_PORT_D 0x00006000 // Port D
|
||||||
|
#define FLASH_BOOTCFG_PORT_E 0x00008000 // Port E
|
||||||
|
#define FLASH_BOOTCFG_PORT_F 0x0000A000 // Port F
|
||||||
|
#define FLASH_BOOTCFG_PORT_G 0x0000C000 // Port G
|
||||||
|
#define FLASH_BOOTCFG_PORT_H 0x0000E000 // Port H
|
||||||
|
#define FLASH_BOOTCFG_PIN_M 0x00001C00 // Boot GPIO Pin
|
||||||
|
#define FLASH_BOOTCFG_PIN_0 0x00000000 // Pin 0
|
||||||
|
#define FLASH_BOOTCFG_PIN_1 0x00000400 // Pin 1
|
||||||
|
#define FLASH_BOOTCFG_PIN_2 0x00000800 // Pin 2
|
||||||
|
#define FLASH_BOOTCFG_PIN_3 0x00000C00 // Pin 3
|
||||||
|
#define FLASH_BOOTCFG_PIN_4 0x00001000 // Pin 4
|
||||||
|
#define FLASH_BOOTCFG_PIN_5 0x00001400 // Pin 5
|
||||||
|
#define FLASH_BOOTCFG_PIN_6 0x00001800 // Pin 6
|
||||||
|
#define FLASH_BOOTCFG_PIN_7 0x00001C00 // Pin 7
|
||||||
|
#define FLASH_BOOTCFG_POL 0x00000200 // Boot GPIO Polarity
|
||||||
|
#define FLASH_BOOTCFG_EN 0x00000100 // Boot GPIO Enable
|
||||||
|
#define FLASH_BOOTCFG_DBG1 0x00000002 // Debug Control 1
|
||||||
|
#define FLASH_BOOTCFG_DBG0 0x00000001 // Debug Control 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_USERREG0 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_USERREG0_NW 0x80000000 // Not Written
|
||||||
|
#define FLASH_USERREG0_DATA_M 0x7FFFFFFF // User Data
|
||||||
|
#define FLASH_USERREG0_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_USERREG1 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_USERREG1_NW 0x80000000 // Not Written
|
||||||
|
#define FLASH_USERREG1_DATA_M 0x7FFFFFFF // User Data
|
||||||
|
#define FLASH_USERREG1_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_USERREG2 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_USERREG2_NW 0x80000000 // Not Written
|
||||||
|
#define FLASH_USERREG2_DATA_M 0x7FFFFFFF // User Data
|
||||||
|
#define FLASH_USERREG2_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_USERREG3 register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_USERREG3_NW 0x80000000 // Not Written
|
||||||
|
#define FLASH_USERREG3_DATA_M 0x7FFFFFFF // User Data
|
||||||
|
#define FLASH_USERREG3_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the FLASH_FMPRE and
|
||||||
|
// FLASH_FMPPE registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FMP_BLOCK_31 0x80000000 // Enable for block 31
|
||||||
|
#define FLASH_FMP_BLOCK_30 0x40000000 // Enable for block 30
|
||||||
|
#define FLASH_FMP_BLOCK_29 0x20000000 // Enable for block 29
|
||||||
|
#define FLASH_FMP_BLOCK_28 0x10000000 // Enable for block 28
|
||||||
|
#define FLASH_FMP_BLOCK_27 0x08000000 // Enable for block 27
|
||||||
|
#define FLASH_FMP_BLOCK_26 0x04000000 // Enable for block 26
|
||||||
|
#define FLASH_FMP_BLOCK_25 0x02000000 // Enable for block 25
|
||||||
|
#define FLASH_FMP_BLOCK_24 0x01000000 // Enable for block 24
|
||||||
|
#define FLASH_FMP_BLOCK_23 0x00800000 // Enable for block 23
|
||||||
|
#define FLASH_FMP_BLOCK_22 0x00400000 // Enable for block 22
|
||||||
|
#define FLASH_FMP_BLOCK_21 0x00200000 // Enable for block 21
|
||||||
|
#define FLASH_FMP_BLOCK_20 0x00100000 // Enable for block 20
|
||||||
|
#define FLASH_FMP_BLOCK_19 0x00080000 // Enable for block 19
|
||||||
|
#define FLASH_FMP_BLOCK_18 0x00040000 // Enable for block 18
|
||||||
|
#define FLASH_FMP_BLOCK_17 0x00020000 // Enable for block 17
|
||||||
|
#define FLASH_FMP_BLOCK_16 0x00010000 // Enable for block 16
|
||||||
|
#define FLASH_FMP_BLOCK_15 0x00008000 // Enable for block 15
|
||||||
|
#define FLASH_FMP_BLOCK_14 0x00004000 // Enable for block 14
|
||||||
|
#define FLASH_FMP_BLOCK_13 0x00002000 // Enable for block 13
|
||||||
|
#define FLASH_FMP_BLOCK_12 0x00001000 // Enable for block 12
|
||||||
|
#define FLASH_FMP_BLOCK_11 0x00000800 // Enable for block 11
|
||||||
|
#define FLASH_FMP_BLOCK_10 0x00000400 // Enable for block 10
|
||||||
|
#define FLASH_FMP_BLOCK_9 0x00000200 // Enable for block 9
|
||||||
|
#define FLASH_FMP_BLOCK_8 0x00000100 // Enable for block 8
|
||||||
|
#define FLASH_FMP_BLOCK_7 0x00000080 // Enable for block 7
|
||||||
|
#define FLASH_FMP_BLOCK_6 0x00000040 // Enable for block 6
|
||||||
|
#define FLASH_FMP_BLOCK_5 0x00000020 // Enable for block 5
|
||||||
|
#define FLASH_FMP_BLOCK_4 0x00000010 // Enable for block 4
|
||||||
|
#define FLASH_FMP_BLOCK_3 0x00000008 // Enable for block 3
|
||||||
|
#define FLASH_FMP_BLOCK_2 0x00000004 // Enable for block 2
|
||||||
|
#define FLASH_FMP_BLOCK_1 0x00000002 // Enable for block 1
|
||||||
|
#define FLASH_FMP_BLOCK_0 0x00000001 // Enable for block 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the erase size of the FLASH block that is
|
||||||
|
// erased by an erase operation, and the protect size is the size of the FLASH
|
||||||
|
// block that is protected by each protection register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_PROTECT_SIZE 0x00000800
|
||||||
|
#define FLASH_ERASE_SIZE 0x00000400
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following definitions are deprecated.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the FLASH register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_RMVER 0x400FE0F4 // ROM Version Register
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the FLASH_FMC
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FMC_WRKEY_MASK 0xFFFF0000 // FLASH write key mask
|
||||||
|
#define FLASH_FMC_WRKEY_M 0xFFFF0000 // Flash Memory Write Key
|
||||||
|
#define FLASH_FMC_WRKEY_S 16
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the FLASH_FCRIS
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FCRIS_PROGRAM 0x00000002 // Programming status
|
||||||
|
#define FLASH_FCRIS_ACCESS 0x00000001 // Invalid access status
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the FLASH_FCIM
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FCIM_PROGRAM 0x00000002 // Programming mask
|
||||||
|
#define FLASH_FCIM_ACCESS 0x00000001 // Invalid access mask
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the FLASH_FCMISC
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_FCMISC_PROGRAM 0x00000002 // Programming status
|
||||||
|
#define FLASH_FCMISC_ACCESS 0x00000001 // Invalid access status
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the FLASH_RMVER
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_RMVER_CONT_M 0xFF000000 // ROM Contents
|
||||||
|
#define FLASH_RMVER_CONT_LM 0x00000000 // Stellaris Boot Loader &
|
||||||
|
// DriverLib
|
||||||
|
#define FLASH_RMVER_CONT_LM_AES 0x02000000 // Stellaris Boot Loader &
|
||||||
|
// DriverLib with AES
|
||||||
|
#define FLASH_RMVER_CONT_LM_AES_SAFERTOS \
|
||||||
|
0x03000000 // Stellaris Boot Loader &
|
||||||
|
// DriverLib with AES and SAFERTOS
|
||||||
|
#define FLASH_RMVER_CONT_LM_AES2 \
|
||||||
|
0x05000000 // Stellaris Boot Loader &
|
||||||
|
// DriverLib with AES
|
||||||
|
#define FLASH_RMVER_VER_M 0x0000FF00 // ROM Version
|
||||||
|
#define FLASH_RMVER_REV_M 0x000000FF // ROM Revision
|
||||||
|
#define FLASH_RMVER_VER_S 8
|
||||||
|
#define FLASH_RMVER_REV_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the FLASH_USECRL
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_USECRL_MASK 0x000000FF // Clock per uSec
|
||||||
|
#define FLASH_USECRL_SHIFT 0
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HW_FLASH_H__
|
|
@ -0,0 +1,592 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// hw_gpio.h - Defines and Macros for GPIO hardware.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Firmware Development Package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __HW_GPIO_H__
|
||||||
|
#define __HW_GPIO_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the GPIO register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_O_DATA 0x00000000 // GPIO Data
|
||||||
|
#define GPIO_O_DIR 0x00000400 // GPIO Direction
|
||||||
|
#define GPIO_O_IS 0x00000404 // GPIO Interrupt Sense
|
||||||
|
#define GPIO_O_IBE 0x00000408 // GPIO Interrupt Both Edges
|
||||||
|
#define GPIO_O_IEV 0x0000040C // GPIO Interrupt Event
|
||||||
|
#define GPIO_O_IM 0x00000410 // GPIO Interrupt Mask
|
||||||
|
#define GPIO_O_RIS 0x00000414 // GPIO Raw Interrupt Status
|
||||||
|
#define GPIO_O_MIS 0x00000418 // GPIO Masked Interrupt Status
|
||||||
|
#define GPIO_O_ICR 0x0000041C // GPIO Interrupt Clear
|
||||||
|
#define GPIO_O_AFSEL 0x00000420 // GPIO Alternate Function Select
|
||||||
|
#define GPIO_O_DR2R 0x00000500 // GPIO 2-mA Drive Select
|
||||||
|
#define GPIO_O_DR4R 0x00000504 // GPIO 4-mA Drive Select
|
||||||
|
#define GPIO_O_DR8R 0x00000508 // GPIO 8-mA Drive Select
|
||||||
|
#define GPIO_O_ODR 0x0000050C // GPIO Open Drain Select
|
||||||
|
#define GPIO_O_PUR 0x00000510 // GPIO Pull-Up Select
|
||||||
|
#define GPIO_O_PDR 0x00000514 // GPIO Pull-Down Select
|
||||||
|
#define GPIO_O_SLR 0x00000518 // GPIO Slew Rate Control Select
|
||||||
|
#define GPIO_O_DEN 0x0000051C // GPIO Digital Enable
|
||||||
|
#define GPIO_O_LOCK 0x00000520 // GPIO Lock
|
||||||
|
#define GPIO_O_CR 0x00000524 // GPIO Commit
|
||||||
|
#define GPIO_O_AMSEL 0x00000528 // GPIO Analog Mode Select
|
||||||
|
#define GPIO_O_PCTL 0x0000052C // GPIO Port Control
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_O_LOCK register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_LOCK_M 0xFFFFFFFF // GPIO Lock
|
||||||
|
#define GPIO_LOCK_UNLOCKED 0x00000000 // The GPIOCR register is unlocked
|
||||||
|
// and may be modified
|
||||||
|
#define GPIO_LOCK_LOCKED 0x00000001 // The GPIOCR register is locked
|
||||||
|
// and may not be modified
|
||||||
|
#define GPIO_LOCK_KEY 0x1ACCE551 // Unlocks the GPIO_CR register
|
||||||
|
#define GPIO_LOCK_KEY_DD 0x4C4F434B // Unlocks the GPIO_CR register on
|
||||||
|
// DustDevil-class devices and
|
||||||
|
// later
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port A.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PA0_M 0x0000000F // PA0 mask
|
||||||
|
#define GPIO_PCTL_PA0_U0RX 0x00000001 // U0RX on PA0
|
||||||
|
#define GPIO_PCTL_PA0_I2C1SCL 0x00000008 // I2C1SCL on PA0
|
||||||
|
#define GPIO_PCTL_PA0_U1RX 0x00000009 // U1RX on PA0
|
||||||
|
#define GPIO_PCTL_PA1_M 0x000000F0 // PA1 mask
|
||||||
|
#define GPIO_PCTL_PA1_U0TX 0x00000010 // U0TX on PA1
|
||||||
|
#define GPIO_PCTL_PA1_I2C1SDA 0x00000080 // I2C1SDA on PA1
|
||||||
|
#define GPIO_PCTL_PA1_U1TX 0x00000090 // U1TX on PA1
|
||||||
|
#define GPIO_PCTL_PA2_M 0x00000F00 // PA2 mask
|
||||||
|
#define GPIO_PCTL_PA2_SSI0CLK 0x00000100 // SSI0CLK on PA2
|
||||||
|
#define GPIO_PCTL_PA2_PWM4 0x00000400 // PWM4 on PA2
|
||||||
|
#define GPIO_PCTL_PA2_I2S0RXSD 0x00000900 // I2S0RXSD on PA2
|
||||||
|
#define GPIO_PCTL_PA3_M 0x0000F000 // PA3 mask
|
||||||
|
#define GPIO_PCTL_PA3_SSI0FSS 0x00001000 // SSI0FSS on PA3
|
||||||
|
#define GPIO_PCTL_PA3_PWM5 0x00004000 // PWM5 on PA3
|
||||||
|
#define GPIO_PCTL_PA3_I2S0RXMCLK \
|
||||||
|
0x00009000 // I2S0RXMCLK on PA3
|
||||||
|
#define GPIO_PCTL_PA4_M 0x000F0000 // PA4 mask
|
||||||
|
#define GPIO_PCTL_PA4_SSI0RX 0x00010000 // SSI0RX on PA4
|
||||||
|
#define GPIO_PCTL_PA4_PWM6 0x00040000 // PWM6 on PA4
|
||||||
|
#define GPIO_PCTL_PA4_CAN0RX 0x00050000 // CAN0RX on PA4
|
||||||
|
#define GPIO_PCTL_PA4_I2S0TXSCK 0x00090000 // I2S0TXSCK on PA4
|
||||||
|
#define GPIO_PCTL_PA5_M 0x00F00000 // PA5 mask
|
||||||
|
#define GPIO_PCTL_PA5_SSI0TX 0x00100000 // SSI0TX on PA5
|
||||||
|
#define GPIO_PCTL_PA5_PWM7 0x00400000 // PWM7 on PA5
|
||||||
|
#define GPIO_PCTL_PA5_CAN0TX 0x00500000 // CAN0TX on PA5
|
||||||
|
#define GPIO_PCTL_PA5_I2S0TXWS 0x00900000 // I2S0TXWS on PA5
|
||||||
|
#define GPIO_PCTL_PA6_M 0x0F000000 // PA6 mask
|
||||||
|
#define GPIO_PCTL_PA6_I2C1SCL 0x01000000 // I2C1SCL on PA6
|
||||||
|
#define GPIO_PCTL_PA6_CCP1 0x02000000 // CCP1 on PA6
|
||||||
|
#define GPIO_PCTL_PA6_PWM0 0x04000000 // PWM0 on PA6
|
||||||
|
#define GPIO_PCTL_PA6_PWM4 0x05000000 // PWM4 on PA6
|
||||||
|
#define GPIO_PCTL_PA6_CAN0RX 0x06000000 // CAN0RX on PA6
|
||||||
|
#define GPIO_PCTL_PA6_USB0EPEN 0x08000000 // USB0EPEN on PA6
|
||||||
|
#define GPIO_PCTL_PA6_U1CTS 0x09000000 // U1CTS on PA6
|
||||||
|
#define GPIO_PCTL_PA7_M 0xF0000000 // PA7 mask
|
||||||
|
#define GPIO_PCTL_PA7_I2C1SDA 0x10000000 // I2C1SDA on PA7
|
||||||
|
#define GPIO_PCTL_PA7_CCP4 0x20000000 // CCP4 on PA7
|
||||||
|
#define GPIO_PCTL_PA7_PWM1 0x40000000 // PWM1 on PA7
|
||||||
|
#define GPIO_PCTL_PA7_PWM5 0x50000000 // PWM5 on PA7
|
||||||
|
#define GPIO_PCTL_PA7_CAN0TX 0x60000000 // CAN0TX on PA7
|
||||||
|
#define GPIO_PCTL_PA7_CCP3 0x70000000 // CCP3 on PA7
|
||||||
|
#define GPIO_PCTL_PA7_USB0PFLT 0x80000000 // USB0PFLT on PA7
|
||||||
|
#define GPIO_PCTL_PA7_U1DCD 0x90000000 // U1DCD on PA7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port B.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PB0_M 0x0000000F // PB0 mask
|
||||||
|
#define GPIO_PCTL_PB0_CCP0 0x00000001 // CCP0 on PB0
|
||||||
|
#define GPIO_PCTL_PB0_PWM2 0x00000002 // PWM2 on PB0
|
||||||
|
#define GPIO_PCTL_PB0_U1RX 0x00000005 // U1RX on PB0
|
||||||
|
#define GPIO_PCTL_PB1_M 0x000000F0 // PB1 mask
|
||||||
|
#define GPIO_PCTL_PB1_CCP2 0x00000010 // CCP2 on PB1
|
||||||
|
#define GPIO_PCTL_PB1_PWM3 0x00000020 // PWM3 on PB1
|
||||||
|
#define GPIO_PCTL_PB1_CCP1 0x00000040 // CCP1 on PB1
|
||||||
|
#define GPIO_PCTL_PB1_U1TX 0x00000050 // U1TX on PB1
|
||||||
|
#define GPIO_PCTL_PB2_M 0x00000F00 // PB2 mask
|
||||||
|
#define GPIO_PCTL_PB2_I2C0SCL 0x00000100 // I2C0SCL on PB2
|
||||||
|
#define GPIO_PCTL_PB2_IDX0 0x00000200 // IDX0 on PB2
|
||||||
|
#define GPIO_PCTL_PB2_CCP3 0x00000400 // CCP3 on PB2
|
||||||
|
#define GPIO_PCTL_PB2_CCP0 0x00000500 // CCP0 on PB2
|
||||||
|
#define GPIO_PCTL_PB2_USB0EPEN 0x00000800 // USB0EPEN on PB2
|
||||||
|
#define GPIO_PCTL_PB3_M 0x0000F000 // PB3 mask
|
||||||
|
#define GPIO_PCTL_PB3_I2C0SDA 0x00001000 // I2C0SDA on PB3
|
||||||
|
#define GPIO_PCTL_PB3_FAULT0 0x00002000 // FAULT0 on PB3
|
||||||
|
#define GPIO_PCTL_PB3_FAULT3 0x00004000 // FAULT3 on PB3
|
||||||
|
#define GPIO_PCTL_PB3_USB0PFLT 0x00008000 // USB0PFLT on PB3
|
||||||
|
#define GPIO_PCTL_PB4_M 0x000F0000 // PB4 mask
|
||||||
|
#define GPIO_PCTL_PB4_U2RX 0x00040000 // U2RX on PB4
|
||||||
|
#define GPIO_PCTL_PB4_CAN0RX 0x00050000 // CAN0RX on PB4
|
||||||
|
#define GPIO_PCTL_PB4_IDX0 0x00060000 // IDX0 on PB4
|
||||||
|
#define GPIO_PCTL_PB4_U1RX 0x00070000 // U1RX on PB4
|
||||||
|
#define GPIO_PCTL_PB4_EPI0S23 0x00080000 // EPI0S23 on PB4
|
||||||
|
#define GPIO_PCTL_PB5_M 0x00F00000 // PB5 mask
|
||||||
|
#define GPIO_PCTL_PB5_C0O 0x00100000 // C0O on PB5
|
||||||
|
#define GPIO_PCTL_PB5_CCP5 0x00200000 // CCP5 on PB5
|
||||||
|
#define GPIO_PCTL_PB5_CCP6 0x00300000 // CCP6 on PB5
|
||||||
|
#define GPIO_PCTL_PB5_CCP0 0x00400000 // CCP0 on PB5
|
||||||
|
#define GPIO_PCTL_PB5_CAN0TX 0x00500000 // CAN0TX on PB5
|
||||||
|
#define GPIO_PCTL_PB5_CCP2 0x00600000 // CCP2 on PB5
|
||||||
|
#define GPIO_PCTL_PB5_U1TX 0x00700000 // U1TX on PB5
|
||||||
|
#define GPIO_PCTL_PB5_EPI0S22 0x00800000 // EPI0S22 on PB5
|
||||||
|
#define GPIO_PCTL_PB6_M 0x0F000000 // PB6 mask
|
||||||
|
#define GPIO_PCTL_PB6_CCP1 0x01000000 // CCP1 on PB6
|
||||||
|
#define GPIO_PCTL_PB6_CCP7 0x02000000 // CCP7 on PB6
|
||||||
|
#define GPIO_PCTL_PB6_C0O 0x03000000 // C0O on PB6
|
||||||
|
#define GPIO_PCTL_PB6_FAULT1 0x04000000 // FAULT1 on PB6
|
||||||
|
#define GPIO_PCTL_PB6_IDX0 0x05000000 // IDX0 on PB6
|
||||||
|
#define GPIO_PCTL_PB6_CCP5 0x06000000 // CCP5 on PB6
|
||||||
|
#define GPIO_PCTL_PB6_I2S0TXSCK 0x09000000 // I2S0TXSCK on PB6
|
||||||
|
#define GPIO_PCTL_PB7_M 0xF0000000 // PB7 mask
|
||||||
|
#define GPIO_PCTL_PB7_NMI 0x40000000 // NMI on PB7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port C.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PC0_M 0x0000000F // PC0 mask
|
||||||
|
#define GPIO_PCTL_PC0_TCK 0x00000003 // TCK on PC0
|
||||||
|
#define GPIO_PCTL_PC1_M 0x000000F0 // PC1 mask
|
||||||
|
#define GPIO_PCTL_PC1_TMS 0x00000030 // TMS on PC1
|
||||||
|
#define GPIO_PCTL_PC2_M 0x00000F00 // PC2 mask
|
||||||
|
#define GPIO_PCTL_PC2_TDI 0x00000300 // TDI on PC2
|
||||||
|
#define GPIO_PCTL_PC3_M 0x0000F000 // PC3 mask
|
||||||
|
#define GPIO_PCTL_PC3_TDO 0x00003000 // TDO on PC3
|
||||||
|
#define GPIO_PCTL_PC4_M 0x000F0000 // PC4 mask
|
||||||
|
#define GPIO_PCTL_PC4_CCP5 0x00010000 // CCP5 on PC4
|
||||||
|
#define GPIO_PCTL_PC4_PHA0 0x00020000 // PHA0 on PC4
|
||||||
|
#define GPIO_PCTL_PC4_PWM6 0x00040000 // PWM6 on PC4
|
||||||
|
#define GPIO_PCTL_PC4_CCP2 0x00050000 // CCP2 on PC4
|
||||||
|
#define GPIO_PCTL_PC4_CCP4 0x00060000 // CCP4 on PC4
|
||||||
|
#define GPIO_PCTL_PC4_EPI0S2 0x00080000 // EPI0S2 on PC4
|
||||||
|
#define GPIO_PCTL_PC4_CCP1 0x00090000 // CCP1 on PC4
|
||||||
|
#define GPIO_PCTL_PC5_M 0x00F00000 // PC5 mask
|
||||||
|
#define GPIO_PCTL_PC5_CCP1 0x00100000 // CCP1 on PC5
|
||||||
|
#define GPIO_PCTL_PC5_C1O 0x00200000 // C1O on PC5
|
||||||
|
#define GPIO_PCTL_PC5_C0O 0x00300000 // C0O on PC5
|
||||||
|
#define GPIO_PCTL_PC5_FAULT2 0x00400000 // FAULT2 on PC5
|
||||||
|
#define GPIO_PCTL_PC5_CCP3 0x00500000 // CCP3 on PC5
|
||||||
|
#define GPIO_PCTL_PC5_USB0EPEN 0x00600000 // USB0EPEN on PC5
|
||||||
|
#define GPIO_PCTL_PC5_EPI0S3 0x00800000 // EPI0S3 on PC5
|
||||||
|
#define GPIO_PCTL_PC6_M 0x0F000000 // PC6 mask
|
||||||
|
#define GPIO_PCTL_PC6_CCP3 0x01000000 // CCP3 on PC6
|
||||||
|
#define GPIO_PCTL_PC6_PHB0 0x02000000 // PHB0 on PC6
|
||||||
|
#define GPIO_PCTL_PC6_C2O 0x03000000 // C2O on PC6
|
||||||
|
#define GPIO_PCTL_PC6_PWM7 0x04000000 // PWM7 on PC6
|
||||||
|
#define GPIO_PCTL_PC6_U1RX 0x05000000 // U1RX on PC6
|
||||||
|
#define GPIO_PCTL_PC6_CCP0 0x06000000 // CCP0 on PC6
|
||||||
|
#define GPIO_PCTL_PC6_USB0PFLT 0x07000000 // USB0PFLT on PC6
|
||||||
|
#define GPIO_PCTL_PC6_EPI0S4 0x08000000 // EPI0S4 on PC6
|
||||||
|
#define GPIO_PCTL_PC7_M 0xF0000000 // PC7 mask
|
||||||
|
#define GPIO_PCTL_PC7_CCP4 0x10000000 // CCP4 on PC7
|
||||||
|
#define GPIO_PCTL_PC7_PHB0 0x20000000 // PHB0 on PC7
|
||||||
|
#define GPIO_PCTL_PC7_CCP0 0x40000000 // CCP0 on PC7
|
||||||
|
#define GPIO_PCTL_PC7_U1TX 0x50000000 // U1TX on PC7
|
||||||
|
#define GPIO_PCTL_PC7_USB0PFLT 0x60000000 // USB0PFLT on PC7
|
||||||
|
#define GPIO_PCTL_PC7_C1O 0x70000000 // C1O on PC7
|
||||||
|
#define GPIO_PCTL_PC7_EPI0S5 0x80000000 // EPI0S5 on PC7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port D.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PD0_M 0x0000000F // PD0 mask
|
||||||
|
#define GPIO_PCTL_PD0_PWM0 0x00000001 // PWM0 on PD0
|
||||||
|
#define GPIO_PCTL_PD0_CAN0RX 0x00000002 // CAN0RX on PD0
|
||||||
|
#define GPIO_PCTL_PD0_IDX0 0x00000003 // IDX0 on PD0
|
||||||
|
#define GPIO_PCTL_PD0_U2RX 0x00000004 // U2RX on PD0
|
||||||
|
#define GPIO_PCTL_PD0_U1RX 0x00000005 // U1RX on PD0
|
||||||
|
#define GPIO_PCTL_PD0_CCP6 0x00000006 // CCP6 on PD0
|
||||||
|
#define GPIO_PCTL_PD0_I2S0RXSCK 0x00000008 // I2S0RXSCK on PD0
|
||||||
|
#define GPIO_PCTL_PD0_U1CTS 0x00000009 // U1CTS on PD0
|
||||||
|
#define GPIO_PCTL_PD1_M 0x000000F0 // PD1 mask
|
||||||
|
#define GPIO_PCTL_PD1_PWM1 0x00000010 // PWM1 on PD1
|
||||||
|
#define GPIO_PCTL_PD1_CAN0TX 0x00000020 // CAN0TX on PD1
|
||||||
|
#define GPIO_PCTL_PD1_PHA0 0x00000030 // PHA0 on PD1
|
||||||
|
#define GPIO_PCTL_PD1_U2TX 0x00000040 // U2TX on PD1
|
||||||
|
#define GPIO_PCTL_PD1_U1TX 0x00000050 // U1TX on PD1
|
||||||
|
#define GPIO_PCTL_PD1_CCP7 0x00000060 // CCP7 on PD1
|
||||||
|
#define GPIO_PCTL_PD1_I2S0RXWS 0x00000080 // I2S0RXWS on PD1
|
||||||
|
#define GPIO_PCTL_PD1_U1DCD 0x00000090 // U1DCD on PD1
|
||||||
|
#define GPIO_PCTL_PD1_CCP2 0x000000A0 // CCP2 on PD1
|
||||||
|
#define GPIO_PCTL_PD1_PHB1 0x000000B0 // PHB1 on PD1
|
||||||
|
#define GPIO_PCTL_PD2_M 0x00000F00 // PD2 mask
|
||||||
|
#define GPIO_PCTL_PD2_U1RX 0x00000100 // U1RX on PD2
|
||||||
|
#define GPIO_PCTL_PD2_CCP6 0x00000200 // CCP6 on PD2
|
||||||
|
#define GPIO_PCTL_PD2_PWM2 0x00000300 // PWM2 on PD2
|
||||||
|
#define GPIO_PCTL_PD2_CCP5 0x00000400 // CCP5 on PD2
|
||||||
|
#define GPIO_PCTL_PD2_EPI0S20 0x00000800 // EPI0S20 on PD2
|
||||||
|
#define GPIO_PCTL_PD3_M 0x0000F000 // PD3 mask
|
||||||
|
#define GPIO_PCTL_PD3_U1TX 0x00001000 // U1TX on PD3
|
||||||
|
#define GPIO_PCTL_PD3_CCP7 0x00002000 // CCP7 on PD3
|
||||||
|
#define GPIO_PCTL_PD3_PWM3 0x00003000 // PWM3 on PD3
|
||||||
|
#define GPIO_PCTL_PD3_CCP0 0x00004000 // CCP0 on PD3
|
||||||
|
#define GPIO_PCTL_PD3_EPI0S21 0x00008000 // EPI0S21 on PD3
|
||||||
|
#define GPIO_PCTL_PD4_M 0x000F0000 // PD4 mask
|
||||||
|
#define GPIO_PCTL_PD4_CCP0 0x00010000 // CCP0 on PD4
|
||||||
|
#define GPIO_PCTL_PD4_CCP3 0x00020000 // CCP3 on PD4
|
||||||
|
#define GPIO_PCTL_PD4_I2S0RXSD 0x00080000 // I2S0RXSD on PD4
|
||||||
|
#define GPIO_PCTL_PD4_U1RI 0x00090000 // U1RI on PD4
|
||||||
|
#define GPIO_PCTL_PD4_EPI0S19 0x000A0000 // EPI0S19 on PD4
|
||||||
|
#define GPIO_PCTL_PD5_M 0x00F00000 // PD5 mask
|
||||||
|
#define GPIO_PCTL_PD5_CCP2 0x00100000 // CCP2 on PD5
|
||||||
|
#define GPIO_PCTL_PD5_CCP4 0x00200000 // CCP4 on PD5
|
||||||
|
#define GPIO_PCTL_PD5_I2S0RXMCLK \
|
||||||
|
0x00800000 // I2S0RXMCLK on PD5
|
||||||
|
#define GPIO_PCTL_PD5_U2RX 0x00900000 // U2RX on PD5
|
||||||
|
#define GPIO_PCTL_PD5_EPI0S28 0x00A00000 // EPI0S28 on PD5
|
||||||
|
#define GPIO_PCTL_PD6_M 0x0F000000 // PD6 mask
|
||||||
|
#define GPIO_PCTL_PD6_FAULT0 0x01000000 // FAULT0 on PD6
|
||||||
|
#define GPIO_PCTL_PD6_I2S0TXSCK 0x08000000 // I2S0TXSCK on PD6
|
||||||
|
#define GPIO_PCTL_PD6_U2TX 0x09000000 // U2TX on PD6
|
||||||
|
#define GPIO_PCTL_PD6_EPI0S29 0x0A000000 // EPI0S29 on PD6
|
||||||
|
#define GPIO_PCTL_PD7_M 0xF0000000 // PD7 mask
|
||||||
|
#define GPIO_PCTL_PD7_IDX0 0x10000000 // IDX0 on PD7
|
||||||
|
#define GPIO_PCTL_PD7_C0O 0x20000000 // C0O on PD7
|
||||||
|
#define GPIO_PCTL_PD7_CCP1 0x30000000 // CCP1 on PD7
|
||||||
|
#define GPIO_PCTL_PD7_I2S0TXWS 0x80000000 // I2S0TXWS on PD7
|
||||||
|
#define GPIO_PCTL_PD7_U1DTR 0x90000000 // U1DTR on PD7
|
||||||
|
#define GPIO_PCTL_PD7_EPI0S30 0xA0000000 // EPI0S30 on PD7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port E.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PE0_M 0x0000000F // PE0 mask
|
||||||
|
#define GPIO_PCTL_PE0_PWM4 0x00000001 // PWM4 on PE0
|
||||||
|
#define GPIO_PCTL_PE0_SSI1CLK 0x00000002 // SSI1CLK on PE0
|
||||||
|
#define GPIO_PCTL_PE0_CCP3 0x00000003 // CCP3 on PE0
|
||||||
|
#define GPIO_PCTL_PE0_EPI0S8 0x00000008 // EPI0S8 on PE0
|
||||||
|
#define GPIO_PCTL_PE0_USB0PFLT 0x00000009 // USB0PFLT on PE0
|
||||||
|
#define GPIO_PCTL_PE1_M 0x000000F0 // PE1 mask
|
||||||
|
#define GPIO_PCTL_PE1_PWM5 0x00000010 // PWM5 on PE1
|
||||||
|
#define GPIO_PCTL_PE1_SSI1FSS 0x00000020 // SSI1FSS on PE1
|
||||||
|
#define GPIO_PCTL_PE1_FAULT0 0x00000030 // FAULT0 on PE1
|
||||||
|
#define GPIO_PCTL_PE1_CCP2 0x00000040 // CCP2 on PE1
|
||||||
|
#define GPIO_PCTL_PE1_CCP6 0x00000050 // CCP6 on PE1
|
||||||
|
#define GPIO_PCTL_PE1_EPI0S9 0x00000080 // EPI0S9 on PE1
|
||||||
|
#define GPIO_PCTL_PE2_M 0x00000F00 // PE2 mask
|
||||||
|
#define GPIO_PCTL_PE2_CCP4 0x00000100 // CCP4 on PE2
|
||||||
|
#define GPIO_PCTL_PE2_SSI1RX 0x00000200 // SSI1RX on PE2
|
||||||
|
#define GPIO_PCTL_PE2_PHB1 0x00000300 // PHB1 on PE2
|
||||||
|
#define GPIO_PCTL_PE2_PHA0 0x00000400 // PHA0 on PE2
|
||||||
|
#define GPIO_PCTL_PE2_CCP2 0x00000500 // CCP2 on PE2
|
||||||
|
#define GPIO_PCTL_PE2_EPI0S24 0x00000800 // EPI0S24 on PE2
|
||||||
|
#define GPIO_PCTL_PE3_M 0x0000F000 // PE3 mask
|
||||||
|
#define GPIO_PCTL_PE3_CCP1 0x00001000 // CCP1 on PE3
|
||||||
|
#define GPIO_PCTL_PE3_SSI1TX 0x00002000 // SSI1TX on PE3
|
||||||
|
#define GPIO_PCTL_PE3_PHA1 0x00003000 // PHA1 on PE3
|
||||||
|
#define GPIO_PCTL_PE3_PHB0 0x00004000 // PHB0 on PE3
|
||||||
|
#define GPIO_PCTL_PE3_CCP7 0x00005000 // CCP7 on PE3
|
||||||
|
#define GPIO_PCTL_PE3_EPI0S25 0x00008000 // EPI0S25 on PE3
|
||||||
|
#define GPIO_PCTL_PE4_M 0x000F0000 // PE4 mask
|
||||||
|
#define GPIO_PCTL_PE4_CCP3 0x00010000 // CCP3 on PE4
|
||||||
|
#define GPIO_PCTL_PE4_FAULT0 0x00040000 // FAULT0 on PE4
|
||||||
|
#define GPIO_PCTL_PE4_U2TX 0x00050000 // U2TX on PE4
|
||||||
|
#define GPIO_PCTL_PE4_CCP2 0x00060000 // CCP2 on PE4
|
||||||
|
#define GPIO_PCTL_PE4_I2S0TXWS 0x00090000 // I2S0TXWS on PE4
|
||||||
|
#define GPIO_PCTL_PE5_M 0x00F00000 // PE5 mask
|
||||||
|
#define GPIO_PCTL_PE5_CCP5 0x00100000 // CCP5 on PE5
|
||||||
|
#define GPIO_PCTL_PE5_I2S0TXSD 0x00900000 // I2S0TXSD on PE5
|
||||||
|
#define GPIO_PCTL_PE6_M 0x0F000000 // PE6 mask
|
||||||
|
#define GPIO_PCTL_PE6_PWM4 0x01000000 // PWM4 on PE6
|
||||||
|
#define GPIO_PCTL_PE6_C1O 0x02000000 // C1O on PE6
|
||||||
|
#define GPIO_PCTL_PE6_U1CTS 0x09000000 // U1CTS on PE6
|
||||||
|
#define GPIO_PCTL_PE7_M 0xF0000000 // PE7 mask
|
||||||
|
#define GPIO_PCTL_PE7_PWM5 0x10000000 // PWM5 on PE7
|
||||||
|
#define GPIO_PCTL_PE7_C2O 0x20000000 // C2O on PE7
|
||||||
|
#define GPIO_PCTL_PE7_U1DCD 0x90000000 // U1DCD on PE7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port F.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PF0_M 0x0000000F // PF0 mask
|
||||||
|
#define GPIO_PCTL_PF0_CAN1RX 0x00000001 // CAN1RX on PF0
|
||||||
|
#define GPIO_PCTL_PF0_PHB0 0x00000002 // PHB0 on PF0
|
||||||
|
#define GPIO_PCTL_PF0_PWM0 0x00000003 // PWM0 on PF0
|
||||||
|
#define GPIO_PCTL_PF0_I2S0TXSD 0x00000008 // I2S0TXSD on PF0
|
||||||
|
#define GPIO_PCTL_PF0_U1DSR 0x00000009 // U1DSR on PF0
|
||||||
|
#define GPIO_PCTL_PF1_M 0x000000F0 // PF1 mask
|
||||||
|
#define GPIO_PCTL_PF1_CAN1TX 0x00000010 // CAN1TX on PF1
|
||||||
|
#define GPIO_PCTL_PF1_IDX1 0x00000020 // IDX1 on PF1
|
||||||
|
#define GPIO_PCTL_PF1_PWM1 0x00000030 // PWM1 on PF1
|
||||||
|
#define GPIO_PCTL_PF1_I2S0TXMCLK \
|
||||||
|
0x00000080 // I2S0TXMCLK on PF1
|
||||||
|
#define GPIO_PCTL_PF1_U1RTS 0x00000090 // U1RTS on PF1
|
||||||
|
#define GPIO_PCTL_PF1_CCP3 0x000000A0 // CCP3 on PF1
|
||||||
|
#define GPIO_PCTL_PF2_M 0x00000F00 // PF2 mask
|
||||||
|
#define GPIO_PCTL_PF2_LED1 0x00000100 // LED1 on PF2
|
||||||
|
#define GPIO_PCTL_PF2_PWM4 0x00000200 // PWM4 on PF2
|
||||||
|
#define GPIO_PCTL_PF2_PWM2 0x00000400 // PWM2 on PF2
|
||||||
|
#define GPIO_PCTL_PF2_SSI1CLK 0x00000900 // SSI1CLK on PF2
|
||||||
|
#define GPIO_PCTL_PF3_M 0x0000F000 // PF3 mask
|
||||||
|
#define GPIO_PCTL_PF3_LED0 0x00001000 // LED0 on PF3
|
||||||
|
#define GPIO_PCTL_PF3_PWM5 0x00002000 // PWM5 on PF3
|
||||||
|
#define GPIO_PCTL_PF3_PWM3 0x00004000 // PWM3 on PF3
|
||||||
|
#define GPIO_PCTL_PF3_SSI1FSS 0x00009000 // SSI1FSS on PF3
|
||||||
|
#define GPIO_PCTL_PF4_M 0x000F0000 // PF4 mask
|
||||||
|
#define GPIO_PCTL_PF4_CCP0 0x00010000 // CCP0 on PF4
|
||||||
|
#define GPIO_PCTL_PF4_C0O 0x00020000 // C0O on PF4
|
||||||
|
#define GPIO_PCTL_PF4_FAULT0 0x00040000 // FAULT0 on PF4
|
||||||
|
#define GPIO_PCTL_PF4_EPI0S12 0x00080000 // EPI0S12 on PF4
|
||||||
|
#define GPIO_PCTL_PF4_SSI1RX 0x00090000 // SSI1RX on PF4
|
||||||
|
#define GPIO_PCTL_PF5_M 0x00F00000 // PF5 mask
|
||||||
|
#define GPIO_PCTL_PF5_CCP2 0x00100000 // CCP2 on PF5
|
||||||
|
#define GPIO_PCTL_PF5_C1O 0x00200000 // C1O on PF5
|
||||||
|
#define GPIO_PCTL_PF5_EPI0S15 0x00800000 // EPI0S15 on PF5
|
||||||
|
#define GPIO_PCTL_PF5_SSI1TX 0x00900000 // SSI1TX on PF5
|
||||||
|
#define GPIO_PCTL_PF6_M 0x0F000000 // PF6 mask
|
||||||
|
#define GPIO_PCTL_PF6_CCP1 0x01000000 // CCP1 on PF6
|
||||||
|
#define GPIO_PCTL_PF6_C2O 0x02000000 // C2O on PF6
|
||||||
|
#define GPIO_PCTL_PF6_PHA0 0x04000000 // PHA0 on PF6
|
||||||
|
#define GPIO_PCTL_PF6_I2S0TXMCLK \
|
||||||
|
0x09000000 // I2S0TXMCLK on PF6
|
||||||
|
#define GPIO_PCTL_PF6_U1RTS 0x0A000000 // U1RTS on PF6
|
||||||
|
#define GPIO_PCTL_PF7_M 0xF0000000 // PF7 mask
|
||||||
|
#define GPIO_PCTL_PF7_CCP4 0x10000000 // CCP4 on PF7
|
||||||
|
#define GPIO_PCTL_PF7_PHB0 0x40000000 // PHB0 on PF7
|
||||||
|
#define GPIO_PCTL_PF7_EPI0S12 0x80000000 // EPI0S12 on PF7
|
||||||
|
#define GPIO_PCTL_PF7_FAULT1 0x90000000 // FAULT1 on PF7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port G.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PG0_M 0x0000000F // PG0 mask
|
||||||
|
#define GPIO_PCTL_PG0_U2RX 0x00000001 // U2RX on PG0
|
||||||
|
#define GPIO_PCTL_PG0_PWM0 0x00000002 // PWM0 on PG0
|
||||||
|
#define GPIO_PCTL_PG0_I2C1SCL 0x00000003 // I2C1SCL on PG0
|
||||||
|
#define GPIO_PCTL_PG0_PWM4 0x00000004 // PWM4 on PG0
|
||||||
|
#define GPIO_PCTL_PG0_USB0EPEN 0x00000007 // USB0EPEN on PG0
|
||||||
|
#define GPIO_PCTL_PG0_EPI0S13 0x00000008 // EPI0S13 on PG0
|
||||||
|
#define GPIO_PCTL_PG1_M 0x000000F0 // PG1 mask
|
||||||
|
#define GPIO_PCTL_PG1_U2TX 0x00000010 // U2TX on PG1
|
||||||
|
#define GPIO_PCTL_PG1_PWM1 0x00000020 // PWM1 on PG1
|
||||||
|
#define GPIO_PCTL_PG1_I2C1SDA 0x00000030 // I2C1SDA on PG1
|
||||||
|
#define GPIO_PCTL_PG1_PWM5 0x00000040 // PWM5 on PG1
|
||||||
|
#define GPIO_PCTL_PG1_EPI0S14 0x00000080 // EPI0S14 on PG1
|
||||||
|
#define GPIO_PCTL_PG2_M 0x00000F00 // PG2 mask
|
||||||
|
#define GPIO_PCTL_PG2_PWM0 0x00000100 // PWM0 on PG2
|
||||||
|
#define GPIO_PCTL_PG2_FAULT0 0x00000400 // FAULT0 on PG2
|
||||||
|
#define GPIO_PCTL_PG2_IDX1 0x00000800 // IDX1 on PG2
|
||||||
|
#define GPIO_PCTL_PG2_I2S0RXSD 0x00000900 // I2S0RXSD on PG2
|
||||||
|
#define GPIO_PCTL_PG3_M 0x0000F000 // PG3 mask
|
||||||
|
#define GPIO_PCTL_PG3_PWM1 0x00001000 // PWM1 on PG3
|
||||||
|
#define GPIO_PCTL_PG3_FAULT2 0x00004000 // FAULT2 on PG3
|
||||||
|
#define GPIO_PCTL_PG3_FAULT0 0x00008000 // FAULT0 on PG3
|
||||||
|
#define GPIO_PCTL_PG3_I2S0RXMCLK \
|
||||||
|
0x00009000 // I2S0RXMCLK on PG3
|
||||||
|
#define GPIO_PCTL_PG4_M 0x000F0000 // PG4 mask
|
||||||
|
#define GPIO_PCTL_PG4_CCP3 0x00010000 // CCP3 on PG4
|
||||||
|
#define GPIO_PCTL_PG4_FAULT1 0x00040000 // FAULT1 on PG4
|
||||||
|
#define GPIO_PCTL_PG4_EPI0S15 0x00080000 // EPI0S15 on PG4
|
||||||
|
#define GPIO_PCTL_PG4_PWM6 0x00090000 // PWM6 on PG4
|
||||||
|
#define GPIO_PCTL_PG4_U1RI 0x000A0000 // U1RI on PG4
|
||||||
|
#define GPIO_PCTL_PG5_M 0x00F00000 // PG5 mask
|
||||||
|
#define GPIO_PCTL_PG5_CCP5 0x00100000 // CCP5 on PG5
|
||||||
|
#define GPIO_PCTL_PG5_IDX0 0x00400000 // IDX0 on PG5
|
||||||
|
#define GPIO_PCTL_PG5_FAULT1 0x00500000 // FAULT1 on PG5
|
||||||
|
#define GPIO_PCTL_PG5_PWM7 0x00800000 // PWM7 on PG5
|
||||||
|
#define GPIO_PCTL_PG5_I2S0RXSCK 0x00900000 // I2S0RXSCK on PG5
|
||||||
|
#define GPIO_PCTL_PG5_U1DTR 0x00A00000 // U1DTR on PG5
|
||||||
|
#define GPIO_PCTL_PG6_M 0x0F000000 // PG6 mask
|
||||||
|
#define GPIO_PCTL_PG6_PHA1 0x01000000 // PHA1 on PG6
|
||||||
|
#define GPIO_PCTL_PG6_PWM6 0x04000000 // PWM6 on PG6
|
||||||
|
#define GPIO_PCTL_PG6_FAULT1 0x08000000 // FAULT1 on PG6
|
||||||
|
#define GPIO_PCTL_PG6_I2S0RXWS 0x09000000 // I2S0RXWS on PG6
|
||||||
|
#define GPIO_PCTL_PG6_U1RI 0x0A000000 // U1RI on PG6
|
||||||
|
#define GPIO_PCTL_PG7_M 0xF0000000 // PG7 mask
|
||||||
|
#define GPIO_PCTL_PG7_PHB1 0x10000000 // PHB1 on PG7
|
||||||
|
#define GPIO_PCTL_PG7_PWM7 0x40000000 // PWM7 on PG7
|
||||||
|
#define GPIO_PCTL_PG7_CCP5 0x80000000 // CCP5 on PG7
|
||||||
|
#define GPIO_PCTL_PG7_EPI0S31 0x90000000 // EPI0S31 on PG7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port H.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PH0_M 0x0000000F // PH0 mask
|
||||||
|
#define GPIO_PCTL_PH0_CCP6 0x00000001 // CCP6 on PH0
|
||||||
|
#define GPIO_PCTL_PH0_PWM2 0x00000002 // PWM2 on PH0
|
||||||
|
#define GPIO_PCTL_PH0_EPI0S6 0x00000008 // EPI0S6 on PH0
|
||||||
|
#define GPIO_PCTL_PH0_PWM4 0x00000009 // PWM4 on PH0
|
||||||
|
#define GPIO_PCTL_PH1_M 0x000000F0 // PH1 mask
|
||||||
|
#define GPIO_PCTL_PH1_CCP7 0x00000010 // CCP7 on PH1
|
||||||
|
#define GPIO_PCTL_PH1_PWM3 0x00000020 // PWM3 on PH1
|
||||||
|
#define GPIO_PCTL_PH1_EPI0S7 0x00000080 // EPI0S7 on PH1
|
||||||
|
#define GPIO_PCTL_PH1_PWM5 0x00000090 // PWM5 on PH1
|
||||||
|
#define GPIO_PCTL_PH2_M 0x00000F00 // PH2 mask
|
||||||
|
#define GPIO_PCTL_PH2_IDX1 0x00000100 // IDX1 on PH2
|
||||||
|
#define GPIO_PCTL_PH2_C1O 0x00000200 // C1O on PH2
|
||||||
|
#define GPIO_PCTL_PH2_FAULT3 0x00000400 // FAULT3 on PH2
|
||||||
|
#define GPIO_PCTL_PH2_EPI0S1 0x00000800 // EPI0S1 on PH2
|
||||||
|
#define GPIO_PCTL_PH3_M 0x0000F000 // PH3 mask
|
||||||
|
#define GPIO_PCTL_PH3_PHB0 0x00001000 // PHB0 on PH3
|
||||||
|
#define GPIO_PCTL_PH3_FAULT0 0x00002000 // FAULT0 on PH3
|
||||||
|
#define GPIO_PCTL_PH3_USB0EPEN 0x00004000 // USB0EPEN on PH3
|
||||||
|
#define GPIO_PCTL_PH3_EPI0S0 0x00008000 // EPI0S0 on PH3
|
||||||
|
#define GPIO_PCTL_PH4_M 0x000F0000 // PH4 mask
|
||||||
|
#define GPIO_PCTL_PH4_USB0PFLT 0x00040000 // USB0PFLT on PH4
|
||||||
|
#define GPIO_PCTL_PH4_EPI0S10 0x00080000 // EPI0S10 on PH4
|
||||||
|
#define GPIO_PCTL_PH4_SSI1CLK 0x000B0000 // SSI1CLK on PH4
|
||||||
|
#define GPIO_PCTL_PH5_M 0x00F00000 // PH5 mask
|
||||||
|
#define GPIO_PCTL_PH5_EPI0S11 0x00800000 // EPI0S11 on PH5
|
||||||
|
#define GPIO_PCTL_PH5_FAULT2 0x00A00000 // FAULT2 on PH5
|
||||||
|
#define GPIO_PCTL_PH5_SSI1FSS 0x00B00000 // SSI1FSS on PH5
|
||||||
|
#define GPIO_PCTL_PH6_M 0x0F000000 // PH6 mask
|
||||||
|
#define GPIO_PCTL_PH6_EPI0S26 0x08000000 // EPI0S26 on PH6
|
||||||
|
#define GPIO_PCTL_PH6_PWM4 0x0A000000 // PWM4 on PH6
|
||||||
|
#define GPIO_PCTL_PH6_SSI1RX 0x0B000000 // SSI1RX on PH6
|
||||||
|
#define GPIO_PCTL_PH7_M 0xF0000000 // PH7 mask
|
||||||
|
#define GPIO_PCTL_PH7_EPI0S27 0x80000000 // EPI0S27 on PH7
|
||||||
|
#define GPIO_PCTL_PH7_PWM5 0xA0000000 // PWM5 on PH7
|
||||||
|
#define GPIO_PCTL_PH7_SSI1TX 0xB0000000 // SSI1TX on PH7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the GPIO_PCTL register for
|
||||||
|
// port J.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_PCTL_PJ0_M 0x0000000F // PJ0 mask
|
||||||
|
#define GPIO_PCTL_PJ0_EPI0S16 0x00000008 // EPI0S16 on PJ0
|
||||||
|
#define GPIO_PCTL_PJ0_PWM0 0x0000000A // PWM0 on PJ0
|
||||||
|
#define GPIO_PCTL_PJ0_I2C1SCL 0x0000000B // I2C1SCL on PJ0
|
||||||
|
#define GPIO_PCTL_PJ1_M 0x000000F0 // PJ1 mask
|
||||||
|
#define GPIO_PCTL_PJ1_EPI0S17 0x00000080 // EPI0S17 on PJ1
|
||||||
|
#define GPIO_PCTL_PJ1_USB0PFLT 0x00000090 // USB0PFLT on PJ1
|
||||||
|
#define GPIO_PCTL_PJ1_PWM1 0x000000A0 // PWM1 on PJ1
|
||||||
|
#define GPIO_PCTL_PJ1_I2C1SDA 0x000000B0 // I2C1SDA on PJ1
|
||||||
|
#define GPIO_PCTL_PJ2_M 0x00000F00 // PJ2 mask
|
||||||
|
#define GPIO_PCTL_PJ2_EPI0S18 0x00000800 // EPI0S18 on PJ2
|
||||||
|
#define GPIO_PCTL_PJ2_CCP0 0x00000900 // CCP0 on PJ2
|
||||||
|
#define GPIO_PCTL_PJ2_FAULT0 0x00000A00 // FAULT0 on PJ2
|
||||||
|
#define GPIO_PCTL_PJ3_M 0x0000F000 // PJ3 mask
|
||||||
|
#define GPIO_PCTL_PJ3_EPI0S19 0x00008000 // EPI0S19 on PJ3
|
||||||
|
#define GPIO_PCTL_PJ3_U1CTS 0x00009000 // U1CTS on PJ3
|
||||||
|
#define GPIO_PCTL_PJ3_CCP6 0x0000A000 // CCP6 on PJ3
|
||||||
|
#define GPIO_PCTL_PJ4_M 0x000F0000 // PJ4 mask
|
||||||
|
#define GPIO_PCTL_PJ4_EPI0S28 0x00080000 // EPI0S28 on PJ4
|
||||||
|
#define GPIO_PCTL_PJ4_U1DCD 0x00090000 // U1DCD on PJ4
|
||||||
|
#define GPIO_PCTL_PJ4_CCP4 0x000A0000 // CCP4 on PJ4
|
||||||
|
#define GPIO_PCTL_PJ5_M 0x00F00000 // PJ5 mask
|
||||||
|
#define GPIO_PCTL_PJ5_EPI0S29 0x00800000 // EPI0S29 on PJ5
|
||||||
|
#define GPIO_PCTL_PJ5_U1DSR 0x00900000 // U1DSR on PJ5
|
||||||
|
#define GPIO_PCTL_PJ5_CCP2 0x00A00000 // CCP2 on PJ5
|
||||||
|
#define GPIO_PCTL_PJ6_M 0x0F000000 // PJ6 mask
|
||||||
|
#define GPIO_PCTL_PJ6_EPI0S30 0x08000000 // EPI0S30 on PJ6
|
||||||
|
#define GPIO_PCTL_PJ6_U1RTS 0x09000000 // U1RTS on PJ6
|
||||||
|
#define GPIO_PCTL_PJ6_CCP1 0x0A000000 // CCP1 on PJ6
|
||||||
|
#define GPIO_PCTL_PJ7_M 0xF0000000 // PJ7 mask
|
||||||
|
#define GPIO_PCTL_PJ7_U1DTR 0x90000000 // U1DTR on PJ7
|
||||||
|
#define GPIO_PCTL_PJ7_CCP0 0xA0000000 // CCP0 on PJ7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following definitions are deprecated.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the GPIO register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_O_PeriphID4 0x00000FD0
|
||||||
|
#define GPIO_O_PeriphID5 0x00000FD4
|
||||||
|
#define GPIO_O_PeriphID6 0x00000FD8
|
||||||
|
#define GPIO_O_PeriphID7 0x00000FDC
|
||||||
|
#define GPIO_O_PeriphID0 0x00000FE0
|
||||||
|
#define GPIO_O_PeriphID1 0x00000FE4
|
||||||
|
#define GPIO_O_PeriphID2 0x00000FE8
|
||||||
|
#define GPIO_O_PeriphID3 0x00000FEC
|
||||||
|
#define GPIO_O_PCellID0 0x00000FF0
|
||||||
|
#define GPIO_O_PCellID1 0x00000FF4
|
||||||
|
#define GPIO_O_PCellID2 0x00000FF8
|
||||||
|
#define GPIO_O_PCellID3 0x00000FFC
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the GPIO Register reset values.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_RV_DEN 0x000000FF // Digital input enable reg RV
|
||||||
|
#define GPIO_RV_PUR 0x000000FF // Pull up select reg RV
|
||||||
|
#define GPIO_RV_DR2R 0x000000FF // 2ma drive select reg RV
|
||||||
|
#define GPIO_RV_PCellID1 0x000000F0
|
||||||
|
#define GPIO_RV_PCellID3 0x000000B1
|
||||||
|
#define GPIO_RV_PeriphID0 0x00000061
|
||||||
|
#define GPIO_RV_PeriphID1 0x00000010
|
||||||
|
#define GPIO_RV_PCellID0 0x0000000D
|
||||||
|
#define GPIO_RV_PCellID2 0x00000005
|
||||||
|
#define GPIO_RV_PeriphID2 0x00000004
|
||||||
|
#define GPIO_RV_LOCK 0x00000001 // Lock register RV
|
||||||
|
#define GPIO_RV_PeriphID7 0x00000000
|
||||||
|
#define GPIO_RV_PDR 0x00000000 // Pull down select reg RV
|
||||||
|
#define GPIO_RV_IC 0x00000000 // Interrupt clear reg RV
|
||||||
|
#define GPIO_RV_SLR 0x00000000 // Slew rate control enable reg RV
|
||||||
|
#define GPIO_RV_ODR 0x00000000 // Open drain select reg RV
|
||||||
|
#define GPIO_RV_IBE 0x00000000 // Interrupt both edges reg RV
|
||||||
|
#define GPIO_RV_AFSEL 0x00000000 // Mode control select reg RV
|
||||||
|
#define GPIO_RV_IS 0x00000000 // Interrupt sense reg RV
|
||||||
|
#define GPIO_RV_IM 0x00000000 // Interrupt mask reg RV
|
||||||
|
#define GPIO_RV_PeriphID4 0x00000000
|
||||||
|
#define GPIO_RV_PeriphID5 0x00000000
|
||||||
|
#define GPIO_RV_DR8R 0x00000000 // 8ma drive select reg RV
|
||||||
|
#define GPIO_RV_RIS 0x00000000 // Raw interrupt status reg RV
|
||||||
|
#define GPIO_RV_DR4R 0x00000000 // 4ma drive select reg RV
|
||||||
|
#define GPIO_RV_IEV 0x00000000 // Intterupt event reg RV
|
||||||
|
#define GPIO_RV_DIR 0x00000000 // Data direction reg RV
|
||||||
|
#define GPIO_RV_PeriphID6 0x00000000
|
||||||
|
#define GPIO_RV_PeriphID3 0x00000000
|
||||||
|
#define GPIO_RV_DATA 0x00000000 // Data register reset value
|
||||||
|
#define GPIO_RV_MIS 0x00000000 // Masked interrupt status reg RV
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HW_GPIO_H__
|
|
@ -0,0 +1,141 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// hw_ints.h - Macros that define the interrupt assignment on Stellaris.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Firmware Development Package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __HW_INTS_H__
|
||||||
|
#define __HW_INTS_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the fault assignments.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FAULT_NMI 2 // NMI fault
|
||||||
|
#define FAULT_HARD 3 // Hard fault
|
||||||
|
#define FAULT_MPU 4 // MPU fault
|
||||||
|
#define FAULT_BUS 5 // Bus fault
|
||||||
|
#define FAULT_USAGE 6 // Usage fault
|
||||||
|
#define FAULT_SVCALL 11 // SVCall
|
||||||
|
#define FAULT_DEBUG 12 // Debug monitor
|
||||||
|
#define FAULT_PENDSV 14 // PendSV
|
||||||
|
#define FAULT_SYSTICK 15 // System Tick
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the interrupt assignments.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define INT_GPIOA 16 // GPIO Port A
|
||||||
|
#define INT_GPIOB 17 // GPIO Port B
|
||||||
|
#define INT_GPIOC 18 // GPIO Port C
|
||||||
|
#define INT_GPIOD 19 // GPIO Port D
|
||||||
|
#define INT_GPIOE 20 // GPIO Port E
|
||||||
|
#define INT_UART0 21 // UART0 Rx and Tx
|
||||||
|
#define INT_UART1 22 // UART1 Rx and Tx
|
||||||
|
#define INT_SSI0 23 // SSI0 Rx and Tx
|
||||||
|
#define INT_I2C0 24 // I2C0 Master and Slave
|
||||||
|
#define INT_PWM_FAULT 25 // PWM Fault
|
||||||
|
#define INT_PWM0 26 // PWM Generator 0
|
||||||
|
#define INT_PWM1 27 // PWM Generator 1
|
||||||
|
#define INT_PWM2 28 // PWM Generator 2
|
||||||
|
#define INT_QEI0 29 // Quadrature Encoder 0
|
||||||
|
#define INT_ADC0SS0 30 // ADC0 Sequence 0
|
||||||
|
#define INT_ADC0SS1 31 // ADC0 Sequence 1
|
||||||
|
#define INT_ADC0SS2 32 // ADC0 Sequence 2
|
||||||
|
#define INT_ADC0SS3 33 // ADC0 Sequence 3
|
||||||
|
#define INT_WATCHDOG 34 // Watchdog timer
|
||||||
|
#define INT_TIMER0A 35 // Timer 0 subtimer A
|
||||||
|
#define INT_TIMER0B 36 // Timer 0 subtimer B
|
||||||
|
#define INT_TIMER1A 37 // Timer 1 subtimer A
|
||||||
|
#define INT_TIMER1B 38 // Timer 1 subtimer B
|
||||||
|
#define INT_TIMER2A 39 // Timer 2 subtimer A
|
||||||
|
#define INT_TIMER2B 40 // Timer 2 subtimer B
|
||||||
|
#define INT_COMP0 41 // Analog Comparator 0
|
||||||
|
#define INT_COMP1 42 // Analog Comparator 1
|
||||||
|
#define INT_COMP2 43 // Analog Comparator 2
|
||||||
|
#define INT_SYSCTL 44 // System Control (PLL, OSC, BO)
|
||||||
|
#define INT_FLASH 45 // FLASH Control
|
||||||
|
#define INT_GPIOF 46 // GPIO Port F
|
||||||
|
#define INT_GPIOG 47 // GPIO Port G
|
||||||
|
#define INT_GPIOH 48 // GPIO Port H
|
||||||
|
#define INT_UART2 49 // UART2 Rx and Tx
|
||||||
|
#define INT_SSI1 50 // SSI1 Rx and Tx
|
||||||
|
#define INT_TIMER3A 51 // Timer 3 subtimer A
|
||||||
|
#define INT_TIMER3B 52 // Timer 3 subtimer B
|
||||||
|
#define INT_I2C1 53 // I2C1 Master and Slave
|
||||||
|
#define INT_QEI1 54 // Quadrature Encoder 1
|
||||||
|
#define INT_CAN0 55 // CAN0
|
||||||
|
#define INT_CAN1 56 // CAN1
|
||||||
|
#define INT_CAN2 57 // CAN2
|
||||||
|
#define INT_ETH 58 // Ethernet
|
||||||
|
#define INT_HIBERNATE 59 // Hibernation module
|
||||||
|
#define INT_USB0 60 // USB 0 Controller
|
||||||
|
#define INT_PWM3 61 // PWM Generator 3
|
||||||
|
#define INT_UDMA 62 // uDMA controller
|
||||||
|
#define INT_UDMAERR 63 // uDMA Error
|
||||||
|
#define INT_ADC1SS0 64 // ADC1 Sequence 0
|
||||||
|
#define INT_ADC1SS1 65 // ADC1 Sequence 1
|
||||||
|
#define INT_ADC1SS2 66 // ADC1 Sequence 2
|
||||||
|
#define INT_ADC1SS3 67 // ADC1 Sequence 3
|
||||||
|
#define INT_I2S0 68 // I2S0
|
||||||
|
#define INT_EPI0 69 // EPI0
|
||||||
|
#define INT_GPIOJ 70 // GPIO Port J
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the total number of interrupts.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define NUM_INTERRUPTS 71
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the total number of priority levels.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define NUM_PRIORITY 8
|
||||||
|
#define NUM_PRIORITY_BITS 3
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following definitions are deprecated.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the interrupt assignments.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define INT_SSI 23 // SSI Rx and Tx
|
||||||
|
#define INT_I2C 24 // I2C Master and Slave
|
||||||
|
#define INT_QEI 29 // Quadrature Encoder
|
||||||
|
#define INT_ADC0 30 // ADC Sequence 0
|
||||||
|
#define INT_ADC1 31 // ADC Sequence 1
|
||||||
|
#define INT_ADC2 32 // ADC Sequence 2
|
||||||
|
#define INT_ADC3 33 // ADC Sequence 3
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HW_INTS_H__
|
|
@ -0,0 +1,115 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// hw_memmap.h - Macros defining the memory map of Stellaris.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Firmware Development Package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __HW_MEMMAP_H__
|
||||||
|
#define __HW_MEMMAP_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the base address of the memories and
|
||||||
|
// peripherals.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLASH_BASE 0x00000000 // FLASH memory
|
||||||
|
#define SRAM_BASE 0x20000000 // SRAM memory
|
||||||
|
#define WATCHDOG0_BASE 0x40000000 // Watchdog0
|
||||||
|
#define WATCHDOG1_BASE 0x40001000 // Watchdog1
|
||||||
|
#define GPIO_PORTA_BASE 0x40004000 // GPIO Port A
|
||||||
|
#define GPIO_PORTB_BASE 0x40005000 // GPIO Port B
|
||||||
|
#define GPIO_PORTC_BASE 0x40006000 // GPIO Port C
|
||||||
|
#define GPIO_PORTD_BASE 0x40007000 // GPIO Port D
|
||||||
|
#define SSI0_BASE 0x40008000 // SSI0
|
||||||
|
#define SSI1_BASE 0x40009000 // SSI1
|
||||||
|
#define UART0_BASE 0x4000C000 // UART0
|
||||||
|
#define UART1_BASE 0x4000D000 // UART1
|
||||||
|
#define UART2_BASE 0x4000E000 // UART2
|
||||||
|
#define I2C0_MASTER_BASE 0x40020000 // I2C0 Master
|
||||||
|
#define I2C0_SLAVE_BASE 0x40020800 // I2C0 Slave
|
||||||
|
#define I2C1_MASTER_BASE 0x40021000 // I2C1 Master
|
||||||
|
#define I2C1_SLAVE_BASE 0x40021800 // I2C1 Slave
|
||||||
|
#define GPIO_PORTE_BASE 0x40024000 // GPIO Port E
|
||||||
|
#define GPIO_PORTF_BASE 0x40025000 // GPIO Port F
|
||||||
|
#define GPIO_PORTG_BASE 0x40026000 // GPIO Port G
|
||||||
|
#define GPIO_PORTH_BASE 0x40027000 // GPIO Port H
|
||||||
|
#define PWM_BASE 0x40028000 // PWM
|
||||||
|
#define QEI0_BASE 0x4002C000 // QEI0
|
||||||
|
#define QEI1_BASE 0x4002D000 // QEI1
|
||||||
|
#define TIMER0_BASE 0x40030000 // Timer0
|
||||||
|
#define TIMER1_BASE 0x40031000 // Timer1
|
||||||
|
#define TIMER2_BASE 0x40032000 // Timer2
|
||||||
|
#define TIMER3_BASE 0x40033000 // Timer3
|
||||||
|
#define ADC0_BASE 0x40038000 // ADC0
|
||||||
|
#define ADC1_BASE 0x40039000 // ADC1
|
||||||
|
#define COMP_BASE 0x4003C000 // Analog comparators
|
||||||
|
#define GPIO_PORTJ_BASE 0x4003D000 // GPIO Port J
|
||||||
|
#define CAN0_BASE 0x40040000 // CAN0
|
||||||
|
#define CAN1_BASE 0x40041000 // CAN1
|
||||||
|
#define CAN2_BASE 0x40042000 // CAN2
|
||||||
|
#define ETH_BASE 0x40048000 // Ethernet
|
||||||
|
#define MAC_BASE 0x40048000 // Ethernet
|
||||||
|
#define USB0_BASE 0x40050000 // USB 0 Controller
|
||||||
|
#define I2S0_BASE 0x40054000 // I2S0
|
||||||
|
#define GPIO_PORTA_AHB_BASE 0x40058000 // GPIO Port A (high speed)
|
||||||
|
#define GPIO_PORTB_AHB_BASE 0x40059000 // GPIO Port B (high speed)
|
||||||
|
#define GPIO_PORTC_AHB_BASE 0x4005A000 // GPIO Port C (high speed)
|
||||||
|
#define GPIO_PORTD_AHB_BASE 0x4005B000 // GPIO Port D (high speed)
|
||||||
|
#define GPIO_PORTE_AHB_BASE 0x4005C000 // GPIO Port E (high speed)
|
||||||
|
#define GPIO_PORTF_AHB_BASE 0x4005D000 // GPIO Port F (high speed)
|
||||||
|
#define GPIO_PORTG_AHB_BASE 0x4005E000 // GPIO Port G (high speed)
|
||||||
|
#define GPIO_PORTH_AHB_BASE 0x4005F000 // GPIO Port H (high speed)
|
||||||
|
#define GPIO_PORTJ_AHB_BASE 0x40060000 // GPIO Port J (high speed)
|
||||||
|
#define EPI0_BASE 0x400D0000 // EPI0
|
||||||
|
#define HIB_BASE 0x400FC000 // Hibernation Module
|
||||||
|
#define FLASH_CTRL_BASE 0x400FD000 // FLASH Controller
|
||||||
|
#define SYSCTL_BASE 0x400FE000 // System Control
|
||||||
|
#define UDMA_BASE 0x400FF000 // uDMA Controller
|
||||||
|
#define ITM_BASE 0xE0000000 // Instrumentation Trace Macrocell
|
||||||
|
#define DWT_BASE 0xE0001000 // Data Watchpoint and Trace
|
||||||
|
#define FPB_BASE 0xE0002000 // FLASH Patch and Breakpoint
|
||||||
|
#define NVIC_BASE 0xE000E000 // Nested Vectored Interrupt Ctrl
|
||||||
|
#define TPIU_BASE 0xE0040000 // Trace Port Interface Unit
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following definitions are deprecated.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the base address of the memories
|
||||||
|
// and peripherals.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define WATCHDOG_BASE 0x40000000 // Watchdog
|
||||||
|
#define SSI_BASE 0x40008000 // SSI
|
||||||
|
#define I2C_MASTER_BASE 0x40020000 // I2C Master
|
||||||
|
#define I2C_SLAVE_BASE 0x40020800 // I2C Slave
|
||||||
|
#define QEI_BASE 0x4002C000 // QEI
|
||||||
|
#define ADC_BASE 0x40038000 // ADC
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HW_MEMMAP_H__
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,185 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// hw_types.h - Common types and macros.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Firmware Development Package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __HW_TYPES_H__
|
||||||
|
#define __HW_TYPES_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Define a boolean type, and values for true and false.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef unsigned char tBoolean;
|
||||||
|
|
||||||
|
#ifndef true
|
||||||
|
#define true 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef false
|
||||||
|
#define false 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Macros for hardware access, both direct and via the bit-band region.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define HWREG(x) \
|
||||||
|
(*((volatile unsigned long *)(x)))
|
||||||
|
#define HWREGH(x) \
|
||||||
|
(*((volatile unsigned short *)(x)))
|
||||||
|
#define HWREGB(x) \
|
||||||
|
(*((volatile unsigned char *)(x)))
|
||||||
|
#define HWREGBITW(x, b) \
|
||||||
|
HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
|
||||||
|
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
|
||||||
|
#define HWREGBITH(x, b) \
|
||||||
|
HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
|
||||||
|
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
|
||||||
|
#define HWREGBITB(x, b) \
|
||||||
|
HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
|
||||||
|
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Helper Macros for determining silicon revisions, etc.
|
||||||
|
//
|
||||||
|
// These macros will be used by Driverlib at "run-time" to create necessary
|
||||||
|
// conditional code blocks that will allow a single version of the Driverlib
|
||||||
|
// "binary" code to support multiple(all) Stellaris silicon revisions.
|
||||||
|
//
|
||||||
|
// It is expected that these macros will be used inside of a standard 'C'
|
||||||
|
// conditional block of code, e.g.
|
||||||
|
//
|
||||||
|
// if(CLASS_IS_SANDSTORM)
|
||||||
|
// {
|
||||||
|
// do some Sandstorm-class specific code here.
|
||||||
|
// }
|
||||||
|
//
|
||||||
|
// By default, these macros will be defined as run-time checks of the
|
||||||
|
// appropriate register(s) to allow creation of run-time conditional code
|
||||||
|
// blocks for a common DriverLib across the entire Stellaris family.
|
||||||
|
//
|
||||||
|
// However, if code-space optimization is required, these macros can be "hard-
|
||||||
|
// coded" for a specific version of Stellaris silicon. Many compilers will
|
||||||
|
// then detect the "hard-coded" conditionals, and appropriately optimize the
|
||||||
|
// code blocks, eliminating any "unreachable" code. This would result in
|
||||||
|
// a smaller Driverlib, thus producing a smaller final application size, but
|
||||||
|
// at the cost of limiting the Driverlib binary to a specific Stellaris
|
||||||
|
// silicon revision.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef CLASS_IS_SANDSTORM
|
||||||
|
#define CLASS_IS_SANDSTORM \
|
||||||
|
(((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_M) == SYSCTL_DID0_VER_0) || \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||||
|
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_SANDSTORM)))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CLASS_IS_FURY
|
||||||
|
#define CLASS_IS_FURY \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||||
|
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_FURY))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CLASS_IS_DUSTDEVIL
|
||||||
|
#define CLASS_IS_DUSTDEVIL \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||||
|
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_DUSTDEVIL))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CLASS_IS_TEMPEST
|
||||||
|
#define CLASS_IS_TEMPEST \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||||
|
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_TEMPEST))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_A0
|
||||||
|
#define REVISION_IS_A0 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_A1
|
||||||
|
#define REVISION_IS_A1 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_A2
|
||||||
|
#define REVISION_IS_A2 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_2))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_B0
|
||||||
|
#define REVISION_IS_B0 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_0))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_B1
|
||||||
|
#define REVISION_IS_B1 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_1))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_C0
|
||||||
|
#define REVISION_IS_C0 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_0))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_C1
|
||||||
|
#define REVISION_IS_C1 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_1))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_C2
|
||||||
|
#define REVISION_IS_C2 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_2))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef REVISION_IS_C3
|
||||||
|
#define REVISION_IS_C3 \
|
||||||
|
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||||
|
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_3))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Deprecated silicon class and revision detection macros.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
#define DEVICE_IS_SANDSTORM CLASS_IS_SANDSTORM
|
||||||
|
#define DEVICE_IS_FURY CLASS_IS_FURY
|
||||||
|
#define DEVICE_IS_REVA2 REVISION_IS_A2
|
||||||
|
#define DEVICE_IS_REVC1 REVISION_IS_C1
|
||||||
|
#define DEVICE_IS_REVC2 REVISION_IS_C2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HW_TYPES_H__
|
|
@ -0,0 +1,458 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// hw_uart.h - Macros and defines used when accessing the UART hardware.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Firmware Development Package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __HW_UART_H__
|
||||||
|
#define __HW_UART_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the UART register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_O_DR 0x00000000 // UART Data
|
||||||
|
#define UART_O_RSR 0x00000004 // UART Receive Status/Error Clear
|
||||||
|
#define UART_O_ECR 0x00000004 // UART Receive Status/Error Clear
|
||||||
|
#define UART_O_FR 0x00000018 // UART Flag
|
||||||
|
#define UART_O_ILPR 0x00000020 // UART IrDA Low-Power Register
|
||||||
|
#define UART_O_IBRD 0x00000024 // UART Integer Baud-Rate Divisor
|
||||||
|
#define UART_O_FBRD 0x00000028 // UART Fractional Baud-Rate
|
||||||
|
// Divisor
|
||||||
|
#define UART_O_LCRH 0x0000002C // UART Line Control
|
||||||
|
#define UART_O_CTL 0x00000030 // UART Control
|
||||||
|
#define UART_O_IFLS 0x00000034 // UART Interrupt FIFO Level Select
|
||||||
|
#define UART_O_IM 0x00000038 // UART Interrupt Mask
|
||||||
|
#define UART_O_RIS 0x0000003C // UART Raw Interrupt Status
|
||||||
|
#define UART_O_MIS 0x00000040 // UART Masked Interrupt Status
|
||||||
|
#define UART_O_ICR 0x00000044 // UART Interrupt Clear
|
||||||
|
#define UART_O_DMACTL 0x00000048 // UART DMA Control
|
||||||
|
#define UART_O_LCTL 0x00000090 // UART LIN Control
|
||||||
|
#define UART_O_LSS 0x00000094 // UART LIN Snap Shot
|
||||||
|
#define UART_O_LTIM 0x00000098 // UART LIN Timer
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_DR register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_DR_OE 0x00000800 // UART Overrun Error
|
||||||
|
#define UART_DR_BE 0x00000400 // UART Break Error
|
||||||
|
#define UART_DR_PE 0x00000200 // UART Parity Error
|
||||||
|
#define UART_DR_FE 0x00000100 // UART Framing Error
|
||||||
|
#define UART_DR_DATA_M 0x000000FF // Data Transmitted or Received
|
||||||
|
#define UART_DR_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_RSR register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_RSR_OE 0x00000008 // UART Overrun Error
|
||||||
|
#define UART_RSR_BE 0x00000004 // UART Break Error
|
||||||
|
#define UART_RSR_PE 0x00000002 // UART Parity Error
|
||||||
|
#define UART_RSR_FE 0x00000001 // UART Framing Error
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_ECR register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_ECR_DATA_M 0x000000FF // Error Clear
|
||||||
|
#define UART_ECR_DATA_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_FR register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_FR_RI 0x00000100 // Ring Indicator
|
||||||
|
#define UART_FR_TXFE 0x00000080 // UART Transmit FIFO Empty
|
||||||
|
#define UART_FR_RXFF 0x00000040 // UART Receive FIFO Full
|
||||||
|
#define UART_FR_TXFF 0x00000020 // UART Transmit FIFO Full
|
||||||
|
#define UART_FR_RXFE 0x00000010 // UART Receive FIFO Empty
|
||||||
|
#define UART_FR_BUSY 0x00000008 // UART Busy
|
||||||
|
#define UART_FR_DCD 0x00000004 // Data Carrier Detect
|
||||||
|
#define UART_FR_DSR 0x00000002 // Data Set Ready
|
||||||
|
#define UART_FR_CTS 0x00000001 // Clear To Send
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_ILPR register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_ILPR_ILPDVSR_M 0x000000FF // IrDA Low-Power Divisor
|
||||||
|
#define UART_ILPR_ILPDVSR_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_IBRD register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_IBRD_DIVINT_M 0x0000FFFF // Integer Baud-Rate Divisor
|
||||||
|
#define UART_IBRD_DIVINT_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_FBRD register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_FBRD_DIVFRAC_M 0x0000003F // Fractional Baud-Rate Divisor
|
||||||
|
#define UART_FBRD_DIVFRAC_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_LCRH register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_LCRH_SPS 0x00000080 // UART Stick Parity Select
|
||||||
|
#define UART_LCRH_WLEN_M 0x00000060 // UART Word Length
|
||||||
|
#define UART_LCRH_WLEN_5 0x00000000 // 5 bits (default)
|
||||||
|
#define UART_LCRH_WLEN_6 0x00000020 // 6 bits
|
||||||
|
#define UART_LCRH_WLEN_7 0x00000040 // 7 bits
|
||||||
|
#define UART_LCRH_WLEN_8 0x00000060 // 8 bits
|
||||||
|
#define UART_LCRH_FEN 0x00000010 // UART Enable FIFOs
|
||||||
|
#define UART_LCRH_STP2 0x00000008 // UART Two Stop Bits Select
|
||||||
|
#define UART_LCRH_EPS 0x00000004 // UART Even Parity Select
|
||||||
|
#define UART_LCRH_PEN 0x00000002 // UART Parity Enable
|
||||||
|
#define UART_LCRH_BRK 0x00000001 // UART Send Break
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_CTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_CTL_CTSEN 0x00008000 // Enable Clear To Send
|
||||||
|
#define UART_CTL_RTSEN 0x00004000 // Enable Request to Send
|
||||||
|
#define UART_CTL_RTS 0x00000800 // Request to Send
|
||||||
|
#define UART_CTL_DTR 0x00000400 // Data Terminal Ready
|
||||||
|
#define UART_CTL_RXE 0x00000200 // UART Receive Enable
|
||||||
|
#define UART_CTL_TXE 0x00000100 // UART Transmit Enable
|
||||||
|
#define UART_CTL_LBE 0x00000080 // UART Loop Back Enable
|
||||||
|
#define UART_CTL_LIN 0x00000040 // LIN Mode Enable
|
||||||
|
#define UART_CTL_HSE 0x00000020 // High-Speed Enable
|
||||||
|
#define UART_CTL_EOT 0x00000010 // End of Transmission
|
||||||
|
#define UART_CTL_SMART 0x00000008 // ISO 7816 Smart Card Support
|
||||||
|
#define UART_CTL_SIRLP 0x00000004 // UART SIR Low-Power Mode
|
||||||
|
#define UART_CTL_SIREN 0x00000002 // UART SIR Enable
|
||||||
|
#define UART_CTL_UARTEN 0x00000001 // UART Enable
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_IFLS register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_IFLS_RX_M 0x00000038 // UART Receive Interrupt FIFO
|
||||||
|
// Level Select
|
||||||
|
#define UART_IFLS_RX1_8 0x00000000 // RX FIFO >= 1/8 full
|
||||||
|
#define UART_IFLS_RX2_8 0x00000008 // RX FIFO >= 1/4 full
|
||||||
|
#define UART_IFLS_RX4_8 0x00000010 // RX FIFO >= 1/2 full (default)
|
||||||
|
#define UART_IFLS_RX6_8 0x00000018 // RX FIFO >= 3/4 full
|
||||||
|
#define UART_IFLS_RX7_8 0x00000020 // RX FIFO >= 7/8 full
|
||||||
|
#define UART_IFLS_TX_M 0x00000007 // UART Transmit Interrupt FIFO
|
||||||
|
// Level Select
|
||||||
|
#define UART_IFLS_TX1_8 0x00000000 // TX FIFO <= 1/8 full
|
||||||
|
#define UART_IFLS_TX2_8 0x00000001 // TX FIFO <= 1/4 full
|
||||||
|
#define UART_IFLS_TX4_8 0x00000002 // TX FIFO <= 1/2 full (default)
|
||||||
|
#define UART_IFLS_TX6_8 0x00000003 // TX FIFO <= 3/4 full
|
||||||
|
#define UART_IFLS_TX7_8 0x00000004 // TX FIFO <= 7/8 full
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_IM register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_IM_LME5IM 0x00008000 // LIN Mode Edge 5 Interrupt Mask
|
||||||
|
#define UART_IM_LME1IM 0x00004000 // LIN Mode Edge 1 Interrupt Mask
|
||||||
|
#define UART_IM_LMSBIM 0x00002000 // LIN Mode Sync Break Interrupt
|
||||||
|
// Mask
|
||||||
|
#define UART_IM_OEIM 0x00000400 // UART Overrun Error Interrupt
|
||||||
|
// Mask
|
||||||
|
#define UART_IM_BEIM 0x00000200 // UART Break Error Interrupt Mask
|
||||||
|
#define UART_IM_PEIM 0x00000100 // UART Parity Error Interrupt Mask
|
||||||
|
#define UART_IM_FEIM 0x00000080 // UART Framing Error Interrupt
|
||||||
|
// Mask
|
||||||
|
#define UART_IM_RTIM 0x00000040 // UART Receive Time-Out Interrupt
|
||||||
|
// Mask
|
||||||
|
#define UART_IM_TXIM 0x00000020 // UART Transmit Interrupt Mask
|
||||||
|
#define UART_IM_RXIM 0x00000010 // UART Receive Interrupt Mask
|
||||||
|
#define UART_IM_DSRMIM 0x00000008 // UART Data Set Ready Modem
|
||||||
|
// Interrupt Mask
|
||||||
|
#define UART_IM_DCDMIM 0x00000004 // UART Data Carrier Detect Modem
|
||||||
|
// Interrupt Mask
|
||||||
|
#define UART_IM_CTSMIM 0x00000002 // UART Clear to Send Modem
|
||||||
|
// Interrupt Mask
|
||||||
|
#define UART_IM_RIMIM 0x00000001 // UART Ring Indicator Modem
|
||||||
|
// Interrupt Mask
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_RIS register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_RIS_LME5RIS 0x00008000 // LIN Mode Edge 5 Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_LME1RIS 0x00004000 // LIN Mode Edge 1 Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_LMSBRIS 0x00002000 // LIN Mode Sync Break Raw
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_RIS_OERIS 0x00000400 // UART Overrun Error Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_BERIS 0x00000200 // UART Break Error Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_PERIS 0x00000100 // UART Parity Error Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_FERIS 0x00000080 // UART Framing Error Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_RTRIS 0x00000040 // UART Receive Time-Out Raw
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_RIS_TXRIS 0x00000020 // UART Transmit Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_RXRIS 0x00000010 // UART Receive Raw Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_RIS_DSRRIS 0x00000008 // UART Data Set Ready Modem Raw
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_RIS_DCDRIS 0x00000004 // UART Data Carrier Detect Modem
|
||||||
|
// Raw Interrupt Status
|
||||||
|
#define UART_RIS_CTSRIS 0x00000002 // UART Clear to Send Modem Raw
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_RIS_RIRIS 0x00000001 // UART Ring Indicator Modem Raw
|
||||||
|
// Interrupt Status
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_MIS register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_MIS_LME5MIS 0x00008000 // LIN Mode Edge 5 Masked Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_MIS_LME1MIS 0x00004000 // LIN Mode Edge 1 Masked Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_MIS_LMSBMIS 0x00002000 // LIN Mode Sync Break Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_OEMIS 0x00000400 // UART Overrun Error Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_BEMIS 0x00000200 // UART Break Error Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_PEMIS 0x00000100 // UART Parity Error Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_FEMIS 0x00000080 // UART Framing Error Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_RTMIS 0x00000040 // UART Receive Time-Out Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_TXMIS 0x00000020 // UART Transmit Masked Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_MIS_RXMIS 0x00000010 // UART Receive Masked Interrupt
|
||||||
|
// Status
|
||||||
|
#define UART_MIS_DSRMIS 0x00000008 // UART Data Set Ready Modem Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_DCDMIS 0x00000004 // UART Data Carrier Detect Modem
|
||||||
|
// Masked Interrupt Status
|
||||||
|
#define UART_MIS_CTSMIS 0x00000002 // UART Clear to Send Modem Masked
|
||||||
|
// Interrupt Status
|
||||||
|
#define UART_MIS_RIMIS 0x00000001 // UART Ring Indicator Modem Masked
|
||||||
|
// Interrupt Status
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_ICR register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_ICR_LME5MIC 0x00008000 // LIN Mode Edge 5 Interrupt Clear
|
||||||
|
#define UART_ICR_LME1MIC 0x00004000 // LIN Mode Edge 1 Interrupt Clear
|
||||||
|
#define UART_ICR_LMSBMIC 0x00002000 // LIN Mode Sync Break Interrupt
|
||||||
|
// Clear
|
||||||
|
#define UART_ICR_OEIC 0x00000400 // Overrun Error Interrupt Clear
|
||||||
|
#define UART_ICR_BEIC 0x00000200 // Break Error Interrupt Clear
|
||||||
|
#define UART_ICR_PEIC 0x00000100 // Parity Error Interrupt Clear
|
||||||
|
#define UART_ICR_FEIC 0x00000080 // Framing Error Interrupt Clear
|
||||||
|
#define UART_ICR_RTIC 0x00000040 // Receive Time-Out Interrupt Clear
|
||||||
|
#define UART_ICR_TXIC 0x00000020 // Transmit Interrupt Clear
|
||||||
|
#define UART_ICR_RXIC 0x00000010 // Receive Interrupt Clear
|
||||||
|
#define UART_ICR_DSRMIC 0x00000008 // UART Data Set Ready Modem
|
||||||
|
// Interrupt Clear
|
||||||
|
#define UART_ICR_DCDMIC 0x00000004 // UART Data Carrier Detect Modem
|
||||||
|
// Interrupt Clear
|
||||||
|
#define UART_ICR_CTSMIC 0x00000002 // UART Clear to Send Modem
|
||||||
|
// Interrupt Clear
|
||||||
|
#define UART_ICR_RIMIC 0x00000001 // UART Ring Indicator Modem
|
||||||
|
// Interrupt Clear
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_DMACTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_DMACTL_DMAERR 0x00000004 // DMA on Error
|
||||||
|
#define UART_DMACTL_TXDMAE 0x00000002 // Transmit DMA Enable
|
||||||
|
#define UART_DMACTL_RXDMAE 0x00000001 // Receive DMA Enable
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_LCTL register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_LCTL_BLEN_M 0x00000030 // Sync Break Length
|
||||||
|
#define UART_LCTL_BLEN_13T 0x00000000 // Sync break length is 13T bits
|
||||||
|
// (default)
|
||||||
|
#define UART_LCTL_BLEN_14T 0x00000010 // Sync break length is 14T bits
|
||||||
|
#define UART_LCTL_BLEN_15T 0x00000020 // Sync break length is 15T bits
|
||||||
|
#define UART_LCTL_BLEN_16T 0x00000030 // Sync break length is 16T bits
|
||||||
|
#define UART_LCTL_MASTER 0x00000001 // LIN Master Enable
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_LSS register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_LSS_TSS_M 0x0000FFFF // Timer Snap Shot
|
||||||
|
#define UART_LSS_TSS_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the UART_O_LTIM register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_LTIM_TIMER_M 0x0000FFFF // Timer Value
|
||||||
|
#define UART_LTIM_TIMER_S 0
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following definitions are deprecated.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifndef DEPRECATED
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the UART register offsets.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_O_LCR_H 0x0000002C // Line Control Register, HIGH byte
|
||||||
|
#define UART_O_PeriphID4 0x00000FD0
|
||||||
|
#define UART_O_PeriphID5 0x00000FD4
|
||||||
|
#define UART_O_PeriphID6 0x00000FD8
|
||||||
|
#define UART_O_PeriphID7 0x00000FDC
|
||||||
|
#define UART_O_PeriphID0 0x00000FE0
|
||||||
|
#define UART_O_PeriphID1 0x00000FE4
|
||||||
|
#define UART_O_PeriphID2 0x00000FE8
|
||||||
|
#define UART_O_PeriphID3 0x00000FEC
|
||||||
|
#define UART_O_PCellID0 0x00000FF0
|
||||||
|
#define UART_O_PCellID1 0x00000FF4
|
||||||
|
#define UART_O_PCellID2 0x00000FF8
|
||||||
|
#define UART_O_PCellID3 0x00000FFC
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the UART_O_DR
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_DR_DATA_MASK 0x000000FF // UART data
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the UART_O_IBRD
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_IBRD_DIVINT_MASK 0x0000FFFF // Integer baud-rate divisor
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the UART_O_FBRD
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_FBRD_DIVFRAC_MASK 0x0000003F // Fractional baud-rate divisor
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the UART_O_LCR_H
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_LCR_H_SPS 0x00000080 // Stick Parity Select
|
||||||
|
#define UART_LCR_H_WLEN 0x00000060 // Word length
|
||||||
|
#define UART_LCR_H_WLEN_5 0x00000000 // 5 bit data
|
||||||
|
#define UART_LCR_H_WLEN_6 0x00000020 // 6 bit data
|
||||||
|
#define UART_LCR_H_WLEN_7 0x00000040 // 7 bit data
|
||||||
|
#define UART_LCR_H_WLEN_8 0x00000060 // 8 bit data
|
||||||
|
#define UART_LCR_H_FEN 0x00000010 // Enable FIFO
|
||||||
|
#define UART_LCR_H_STP2 0x00000008 // Two Stop Bits Select
|
||||||
|
#define UART_LCR_H_EPS 0x00000004 // Even Parity Select
|
||||||
|
#define UART_LCR_H_PEN 0x00000002 // Parity Enable
|
||||||
|
#define UART_LCR_H_BRK 0x00000001 // Send Break
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the UART_O_IFLS
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_IFLS_RX_MASK 0x00000038 // RX FIFO level mask
|
||||||
|
#define UART_IFLS_TX_MASK 0x00000007 // TX FIFO level mask
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the bit fields in the UART_O_ICR
|
||||||
|
// register.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_RSR_ANY (UART_RSR_OE | UART_RSR_BE | UART_RSR_PE | \
|
||||||
|
UART_RSR_FE)
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are deprecated defines for the Reset Values for UART
|
||||||
|
// Registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define UART_RV_CTL 0x00000300
|
||||||
|
#define UART_RV_PCellID1 0x000000F0
|
||||||
|
#define UART_RV_PCellID3 0x000000B1
|
||||||
|
#define UART_RV_FR 0x00000090
|
||||||
|
#define UART_RV_PeriphID2 0x00000018
|
||||||
|
#define UART_RV_IFLS 0x00000012
|
||||||
|
#define UART_RV_PeriphID0 0x00000011
|
||||||
|
#define UART_RV_PCellID0 0x0000000D
|
||||||
|
#define UART_RV_PCellID2 0x00000005
|
||||||
|
#define UART_RV_PeriphID3 0x00000001
|
||||||
|
#define UART_RV_PeriphID4 0x00000000
|
||||||
|
#define UART_RV_LCR_H 0x00000000
|
||||||
|
#define UART_RV_PeriphID6 0x00000000
|
||||||
|
#define UART_RV_DR 0x00000000
|
||||||
|
#define UART_RV_RSR 0x00000000
|
||||||
|
#define UART_RV_ECR 0x00000000
|
||||||
|
#define UART_RV_PeriphID5 0x00000000
|
||||||
|
#define UART_RV_RIS 0x00000000
|
||||||
|
#define UART_RV_FBRD 0x00000000
|
||||||
|
#define UART_RV_IM 0x00000000
|
||||||
|
#define UART_RV_MIS 0x00000000
|
||||||
|
#define UART_RV_ICR 0x00000000
|
||||||
|
#define UART_RV_PeriphID1 0x00000000
|
||||||
|
#define UART_RV_PeriphID7 0x00000000
|
||||||
|
#define UART_RV_IBRD 0x00000000
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HW_UART_H__
|
|
@ -0,0 +1,107 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: bootloader application source file
|
||||||
|
| File Name: main.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "boot.h" /* bootloader generic header */
|
||||||
|
#include "inc/hw_ints.h"
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
#include "inc/hw_nvic.h"
|
||||||
|
#include "inc/hw_sysctl.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "driverlib/sysctl.h"
|
||||||
|
#include "driverlib/gpio.h"
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
static void Init(void);
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: main
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: program return code
|
||||||
|
** DESCRIPTION: This is the entry point for the bootloader application and is called
|
||||||
|
** by the reset interrupt vector after the C-startup routines executed.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
/* initialize the microcontroller */
|
||||||
|
Init();
|
||||||
|
/* initialize the bootloader */
|
||||||
|
BootInit();
|
||||||
|
|
||||||
|
/* start the infinite program loop */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* run the bootloader task */
|
||||||
|
BootTask();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* program should never get here */
|
||||||
|
return 0;
|
||||||
|
} /*** end of main ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: Init
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the microcontroller. The interrupts are disabled, the
|
||||||
|
** clocks are configured and the flash wait states are configured.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static void Init(void)
|
||||||
|
{
|
||||||
|
/* set the clocking to run at 50MHz from the PLL */
|
||||||
|
SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ);
|
||||||
|
#if (BOOT_COM_UART_ENABLE > 0)
|
||||||
|
#if (BOOT_COM_UART_CHANNEL_INDEX == 0)
|
||||||
|
/* enable the and configure UART0 related peripherals and pins */
|
||||||
|
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
|
||||||
|
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||||
|
#if (BOOT_COM_CAN_CHANNEL_INDEX == 0)
|
||||||
|
/* configure the CAN pins */
|
||||||
|
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
|
||||||
|
GPIOPinTypeCAN(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
} /*** end of Init ***/
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of main.c *************************************/
|
|
@ -0,0 +1,197 @@
|
||||||
|
#****************************************************************************************
|
||||||
|
#| Description: Makefile for LM3S using CodeSourcery GNU GCC compiler toolset
|
||||||
|
#| File Name: makefile
|
||||||
|
#|
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| C O P Y R I G H T
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
#|
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| L I C E N S E
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| This file is part of OpenBTL. OpenBTL is free software: you can redistribute it and/or
|
||||||
|
#| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
#| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
#| version.
|
||||||
|
#|
|
||||||
|
#| OpenBTL is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
#| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
#|
|
||||||
|
#| You should have received a copy of the GNU General Public License along with OpenBTL.
|
||||||
|
#| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
#|
|
||||||
|
#****************************************************************************************
|
||||||
|
SHELL = sh
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Configure project name |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
PROJ_NAME=openbtl_ek_lm3s8962
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Speficy project source files |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
PROJ_FILES= \
|
||||||
|
config.h \
|
||||||
|
hooks.c \
|
||||||
|
main.c \
|
||||||
|
./lib/inc/hw_flash.h \
|
||||||
|
./lib/inc/hw_gpio.h \
|
||||||
|
./lib/inc/hw_ints.h \
|
||||||
|
./lib/inc/hw_memmap.h \
|
||||||
|
./lib/inc/hw_nvic.h \
|
||||||
|
./lib/inc/hw_sysctl.h \
|
||||||
|
-./lib/inc/hw_types.h \
|
||||||
|
./lib/inc/hw_uart.h \
|
||||||
|
./lib/inc/hw_can.h \
|
||||||
|
./lib/driverlib/cpulib.c \
|
||||||
|
./lib/driverlib/flashlib.c \
|
||||||
|
./lib/driverlib/gpio.h \
|
||||||
|
./lib/driverlib/sysctl.c \
|
||||||
|
./lib/driverlib/uartlib.h \
|
||||||
|
./lib/driverlib/canlib.h \
|
||||||
|
./lib/driverlib/cpulib.h \
|
||||||
|
./lib/driverlib/flashlib.h \
|
||||||
|
./lib/driverlib/interrupt.c \
|
||||||
|
./lib/driverlib/sysctl.h \
|
||||||
|
./lib/driverlib/debug.h \
|
||||||
|
./lib/driverlib/gpio.c \
|
||||||
|
./lib/driverlib/interrupt.h \
|
||||||
|
./lib/driverlib/uartlib.c \
|
||||||
|
./lib/driverlib/canlib.c \
|
||||||
|
../../../Source/boot.c \
|
||||||
|
../../../Source/boot.h \
|
||||||
|
../../../Source/com.c \
|
||||||
|
../../../Source/com.h \
|
||||||
|
../../../Source/xcp.c \
|
||||||
|
../../../Source/xcp.h \
|
||||||
|
../../../Source/backdoor.c \
|
||||||
|
../../../Source/backdoor.h \
|
||||||
|
../../../Source/cop.c \
|
||||||
|
../../../Source/cop.h \
|
||||||
|
../../../Source/assert.c \
|
||||||
|
../../../Source/assert.h \
|
||||||
|
../../../Source/plausibility.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/types.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/cpu.c \
|
||||||
|
../../../Source/ARMCM3_LM3S/cpu.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/uart.c \
|
||||||
|
../../../Source/ARMCM3_LM3S/uart.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/can.c \
|
||||||
|
../../../Source/ARMCM3_LM3S/can.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/nvm.c \
|
||||||
|
../../../Source/ARMCM3_LM3S/nvm.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/timer.c \
|
||||||
|
../../../Source/ARMCM3_LM3S/timer.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/GCC/flash.c \
|
||||||
|
../../../Source/ARMCM3_LM3S/GCC/flash.h \
|
||||||
|
../../../Source/ARMCM3_LM3S/GCC/vectors.c \
|
||||||
|
../../../Source/ARMCM3_LM3S/GCC/cstart.c
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Compiler binaries |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
CC = arm-none-eabi-gcc
|
||||||
|
LN = arm-none-eabi-gcc
|
||||||
|
OC = arm-none-eabi-objcopy
|
||||||
|
OD = arm-none-eabi-objdump
|
||||||
|
AS = arm-none-eabi-as
|
||||||
|
SZ = arm-none-eabi-size
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Extract file names |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
PROJ_ASRCS = $(filter %.s,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||||
|
PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||||
|
PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||||
|
PROJ_CCMPL = $(patsubst %.c,%.cpl,$(PROJ_CSRCS))
|
||||||
|
PROJ_ACMPL = $(patsubst %.s,%.cpl,$(PROJ_ASRCS))
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Set important path variables |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :)
|
||||||
|
OBJ_PATH = obj
|
||||||
|
BIN_PATH = bin
|
||||||
|
INC_PATH = $(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file)))))
|
||||||
|
INC_PATH += -I. -I./lib
|
||||||
|
LIB_PATH = -L../../../Source/ARMCM3_LM3S/GCC/
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Options for compiler binaries |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
CFLAGS = -g -D inline= -mthumb -mcpu=cortex-m3 -Os -T memory.x
|
||||||
|
CFLAGS += -D PACK_STRUCT_END=__attribute\(\(packed\)\) -Wno-main
|
||||||
|
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)
|
||||||
|
CFLAGS += -ffunction-sections -fdata-sections $(INC_PATH) -D DEBUG -D gcc
|
||||||
|
CFLAGS += -Wa,-adhlns="$(OBJ_PATH)/$(subst .o,.lst,$@)"
|
||||||
|
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
|
||||||
|
LFLAGS += $(LIB_PATH) -Xlinker --gc-sections
|
||||||
|
OFLAGS = -O binary
|
||||||
|
ODFLAGS = -x
|
||||||
|
SZFLAGS = -B -d
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Specify library files |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
LIBS =
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Define targets |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
AOBJS = $(patsubst %.s,%.o,$(PROJ_ASRCS))
|
||||||
|
COBJS = $(patsubst %.c,%.o,$(PROJ_CSRCS))
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Make ALL |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
all : $(BIN_PATH)/$(PROJ_NAME).bin
|
||||||
|
|
||||||
|
|
||||||
|
$(BIN_PATH)/$(PROJ_NAME).bin : $(BIN_PATH)/$(PROJ_NAME).elf
|
||||||
|
@$(OC) $< $(OFLAGS) $@
|
||||||
|
@$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map
|
||||||
|
@echo +++ Summary of memory consumption:
|
||||||
|
@$(SZ) $(SZFLAGS) $<
|
||||||
|
@echo +++ Build complete [$(notdir $@)]
|
||||||
|
|
||||||
|
$(BIN_PATH)/$(PROJ_NAME).elf : $(AOBJS) $(COBJS)
|
||||||
|
@echo +++ Linking [$(notdir $@)]
|
||||||
|
@$(LN) $(CFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)/%.o,$(^F)) $(LIBS) $(LFLAGS)
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Compile and assemble |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
$(AOBJS): %.o: %.s $(PROJ_CHDRS)
|
||||||
|
@echo +++ Assembling [$(notdir $<)]
|
||||||
|
@$(AS) $(AFLAGS) $< -o $(OBJ_PATH)/$(@F)
|
||||||
|
|
||||||
|
$(COBJS): %.o: %.c $(PROJ_CHDRS)
|
||||||
|
@echo +++ Compiling [$(notdir $<)]
|
||||||
|
@$(CC) $(CFLAGS) -c $< -o $(OBJ_PATH)/$(@F)
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Make CLEAN |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
clean :
|
||||||
|
@echo +++ Cleaning build environment
|
||||||
|
@rm -f $(foreach file,$(AOBJS),$(OBJ_PATH)/$(file))
|
||||||
|
@rm -f $(foreach file,$(COBJS),$(OBJ_PATH)/$(file))
|
||||||
|
@rm -f $(patsubst %.o,%.lst,$(foreach file,$(COBJS),$(OBJ_PATH)/$(file)))
|
||||||
|
@rm -f $(BIN_PATH)/$(PROJ_NAME).elf $(BIN_PATH)/$(PROJ_NAME).map
|
||||||
|
@rm -f $(BIN_PATH)/$(PROJ_NAME).bin
|
||||||
|
@echo +++ Clean complete
|
||||||
|
|
||||||
|
|
Binary file not shown.
|
@ -0,0 +1,149 @@
|
||||||
|
|
||||||
|
bin/demoprog_ek_lm3s8962.elf: file format elf32-littlearm
|
||||||
|
bin/demoprog_ek_lm3s8962.elf
|
||||||
|
architecture: arm, flags 0x00000112:
|
||||||
|
EXEC_P, HAS_SYMS, D_PAGED
|
||||||
|
start address 0x00002000
|
||||||
|
|
||||||
|
Program Header:
|
||||||
|
LOAD off 0x00000000 vaddr 0x00000000 paddr 0x00000000 align 2**15
|
||||||
|
filesz 0x00003514 memsz 0x00003514 flags r-x
|
||||||
|
LOAD off 0x00008000 vaddr 0x20000000 paddr 0x20000000 align 2**15
|
||||||
|
filesz 0x00000000 memsz 0x0000015c flags rw-
|
||||||
|
private flags = 5000002: [Version5 EABI] [has entry point]
|
||||||
|
|
||||||
|
Sections:
|
||||||
|
Idx Name Size VMA LMA File off Algn
|
||||||
|
0 .text 00001514 00002000 00002000 00002000 2**2
|
||||||
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||||
|
1 .bss 0000015c 20000000 20000000 00008000 2**2
|
||||||
|
ALLOC
|
||||||
|
2 .debug_abbrev 00001cdb 00000000 00000000 00003514 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
3 .debug_info 000093f8 00000000 00000000 000051ef 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
4 .debug_line 00005bd6 00000000 00000000 0000e5e7 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
5 .debug_loc 0000ccca 00000000 00000000 000141bd 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
6 .debug_pubnames 000031b7 00000000 00000000 00020e87 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
7 .debug_pubtypes 0000039c 00000000 00000000 0002403e 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
8 .debug_aranges 00001510 00000000 00000000 000243da 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
9 .debug_ranges 000013b0 00000000 00000000 000258ea 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
10 .debug_str 0000377c 00000000 00000000 00026c9a 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
11 .comment 0000002a 00000000 00000000 0002a416 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
12 .ARM.attributes 00000031 00000000 00000000 0002a440 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
13 .debug_frame 00003bb0 00000000 00000000 0002a474 2**2
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
SYMBOL TABLE:
|
||||||
|
00002000 l d .text 00000000 .text
|
||||||
|
20000000 l d .bss 00000000 .bss
|
||||||
|
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
||||||
|
00000000 l d .debug_info 00000000 .debug_info
|
||||||
|
00000000 l d .debug_line 00000000 .debug_line
|
||||||
|
00000000 l d .debug_loc 00000000 .debug_loc
|
||||||
|
00000000 l d .debug_pubnames 00000000 .debug_pubnames
|
||||||
|
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
|
||||||
|
00000000 l d .debug_aranges 00000000 .debug_aranges
|
||||||
|
00000000 l d .debug_ranges 00000000 .debug_ranges
|
||||||
|
00000000 l d .debug_str 00000000 .debug_str
|
||||||
|
00000000 l d .comment 00000000 .comment
|
||||||
|
00000000 l d .ARM.attributes 00000000 .ARM.attributes
|
||||||
|
00000000 l d .debug_frame 00000000 .debug_frame
|
||||||
|
00000000 l df *ABS* 00000000 vectors.c
|
||||||
|
00000000 l df *ABS* 00000000 boot.c
|
||||||
|
000020f4 l F .text 00000024 UartReceiveByte
|
||||||
|
20000000 l O .bss 00000041 xcpCtoReqPacket.1738
|
||||||
|
20000044 l O .bss 00000001 xcpCtoRxInProgress.1740
|
||||||
|
20000045 l O .bss 00000001 xcpCtoRxLength.1739
|
||||||
|
00000000 l df *ABS* 00000000 cstart.c
|
||||||
|
00002276 l F .text 00000000 zero_loop
|
||||||
|
00000000 l df *ABS* 00000000 irq.c
|
||||||
|
00000000 l df *ABS* 00000000 led.c
|
||||||
|
20000048 l O .bss 00000004 timer_counter_last.1732
|
||||||
|
2000004c l O .bss 00000001 led_toggle_state.1731
|
||||||
|
00000000 l df *ABS* 00000000 main.c
|
||||||
|
20000050 l O .bss 00000004 assert_failure_file.1738
|
||||||
|
20000054 l O .bss 00000004 assert_failure_line.1739
|
||||||
|
00000000 l df *ABS* 00000000 time.c
|
||||||
|
20000058 l O .bss 00000004 millisecond_counter
|
||||||
|
00000000 l df *ABS* 00000000 cpu.c
|
||||||
|
00000000 l df *ABS* 00000000 gpio.c
|
||||||
|
00002474 l F .text 00000188 GPIOBaseValid
|
||||||
|
00000000 l df *ABS* 00000000 interrupt.c
|
||||||
|
00000000 l df *ABS* 00000000 sysctl.c
|
||||||
|
000028d4 l F .text 0000039c SysCtlPeripheralValid
|
||||||
|
00003464 l O .text 0000005c g_pulXtals
|
||||||
|
000034d8 l O .text 0000000c g_pulRCGCRegs
|
||||||
|
00000000 l df *ABS* 00000000 systick.c
|
||||||
|
00000000 l df *ABS* 00000000 uart.c
|
||||||
|
00003200 l F .text 0000003c UARTBaseValid
|
||||||
|
00000000 l df *ABS* 00000000 adc.c
|
||||||
|
00000000 l df *ABS* 00000000 can.c
|
||||||
|
00000000 l df *ABS* 00000000 comp.c
|
||||||
|
00000000 l df *ABS* 00000000 epi.c
|
||||||
|
00000000 l df *ABS* 00000000 ethernet.c
|
||||||
|
00000000 l df *ABS* 00000000 flash.c
|
||||||
|
00000000 l df *ABS* 00000000 hibernate.c
|
||||||
|
00000000 l df *ABS* 00000000 i2c.c
|
||||||
|
00000000 l df *ABS* 00000000 i2s.c
|
||||||
|
00000000 l df *ABS* 00000000 mpu.c
|
||||||
|
00000000 l df *ABS* 00000000 pwm.c
|
||||||
|
00000000 l df *ABS* 00000000 qei.c
|
||||||
|
00000000 l df *ABS* 00000000 ssi.c
|
||||||
|
00000000 l df *ABS* 00000000 timer.c
|
||||||
|
00000000 l df *ABS* 00000000 udma.c
|
||||||
|
00000000 l df *ABS* 00000000 usb.c
|
||||||
|
00000000 l df *ABS* 00000000 watchdog.c
|
||||||
|
000023c0 g F .text 00000016 __error__
|
||||||
|
00002230 g F .text 0000005c reset_handler
|
||||||
|
00002cb8 g F .text 00000006 SysCtlDelay
|
||||||
|
00002298 g F .text 0000000e IrqInterruptEnable
|
||||||
|
000023f0 g F .text 0000000c TimeSet
|
||||||
|
00003514 g .text 00000000 _etext
|
||||||
|
000027ec g F .text 00000030 GPIOPinWrite
|
||||||
|
00002c70 g F .text 00000048 SysCtlPeripheralEnable
|
||||||
|
2000005c g .bss 00000000 _ebss
|
||||||
|
00003194 g F .text 00000012 SysTickDisable
|
||||||
|
00000100 g *ABS* 00000000 __STACKSIZE__
|
||||||
|
00002468 g F .text 00000002 UnusedISR
|
||||||
|
000022a8 g F .text 00000042 LedInit
|
||||||
|
00002454 g F .text 00000012 TimeISRHandler
|
||||||
|
00003414 g F .text 00000036 UARTCharGetNonBlocking
|
||||||
|
20000000 g .bss 00000000 _bss
|
||||||
|
000031bc g F .text 00000012 SysTickIntDisable
|
||||||
|
000031d0 g F .text 0000002e SysTickPeriodSet
|
||||||
|
0000236c g F .text 00000052 main
|
||||||
|
00002e9c g F .text 000002e2 SysCtlClockGet
|
||||||
|
00003278 g F .text 00000044 UARTDisable
|
||||||
|
00002118 g F .text 0000005c BootComInit
|
||||||
|
000028c4 g F .text 00000010 IntMasterEnable
|
||||||
|
000023fc g F .text 0000004a TimeInit
|
||||||
|
000023d8 g F .text 00000018 TimeDeinit
|
||||||
|
20000000 g .text 00000000 _data
|
||||||
|
000022ec g F .text 00000080 LedToggle
|
||||||
|
2000015c g .bss 00000000 _estack
|
||||||
|
20000000 g .text 00000000 _edata
|
||||||
|
00002000 g O .text 000000f4 _vectab
|
||||||
|
00002870 g F .text 00000052 GPIOPinTypeUART
|
||||||
|
0000281c g F .text 00000052 GPIOPinTypeGPIOOutput
|
||||||
|
00002174 g F .text 000000bc BootComCheckActivationRequest
|
||||||
|
00002448 g F .text 0000000c TimeGet
|
||||||
|
0000246c g F .text 00000008 CPUcpsie
|
||||||
|
000025fc g F .text 00000070 GPIODirModeSet
|
||||||
|
2000005c g .bss 00000000 _stack
|
||||||
|
00003180 g F .text 00000012 SysTickEnable
|
||||||
|
000031a8 g F .text 00000012 SysTickIntEnable
|
||||||
|
000032bc g F .text 00000158 UARTConfigSetExpClk
|
||||||
|
00002cc0 g F .text 000001da SysCtlClockSet
|
||||||
|
0000266c g F .text 00000180 GPIOPadConfigSet
|
||||||
|
0000323c g F .text 0000003c UARTEnable
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,340 @@
|
||||||
|
S020000062696E2F64656D6F70726F675F656B5F6C6D3373383936322E7372656359
|
||||||
|
S11320005C010020312200006924000069240000E2
|
||||||
|
S11320106924000069240000692400006924000088
|
||||||
|
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|
||||||
|
S1132ED0602900F0E580702900F0DF80302908BF08
|
||||||
|
S1132EE047F2305040F04781DCE043F26441C0F2E5
|
||||||
|
S1132EF00001C3F3841051F82000D3E04FF4604183
|
||||||
|
S1132F00C4F20F01096811F0E04F04BF4EF2C01083
|
||||||
|
S1132F10C0F2E40000F0C6804FF46041C4F20F0137
|
||||||
|
S1132F2008684FF00001C7F2FF0100EA0101B1F1A6
|
||||||
|
S1132F30805F04BF4EF2C010C0F2E40000F0B28023
|
||||||
|
S1132F404FF46041C4F20F0108684FF00001C7F26A
|
||||||
|
S1132F50FF0100EA01014FF00000C1F201008142CB
|
||||||
|
S1132F600DD14FF46041C4F20F01096889B20229FE
|
||||||
|
S1132F7004BF4FF4D850C0F2B70000F093804FF470
|
||||||
|
S1132F806041C4F20F0108684FF00001C7F2FF016D
|
||||||
|
S1132F9000EA01014FF00000C1F2030081421CBFAE
|
||||||
|
S1132FA04FF41050C0F2F4007CD14FF46041C4F2ED
|
||||||
|
S1132FB00F010C68A4B24FF4D850C0F2B7004FF41C
|
||||||
|
S1132FC01051C0F2F401002C18BF08466AE04FF417
|
||||||
|
S1132FD06041C4F20F01096811F0E04F04BF43F6E9
|
||||||
|
S1132FE07000C0F239005DD04FF46041C4F20F01AB
|
||||||
|
S1132FF008684FF00001C7F2FF0100EA0101B1F1D6
|
||||||
|
S1133000805F04BF43F67000C0F239004AD04FF429
|
||||||
|
S11330106041C4F20F0108684FF00001C7F2FF01DC
|
||||||
|
S113302000EA01014FF00000C1F2010081420CD11D
|
||||||
|
S11330304FF46041C4F20F01096889B2022904BF48
|
||||||
|
S11330404CF2C060C0F22D002CD04FF46041C4F2A9
|
||||||
|
S11330500F0108684FF00001C7F2FF0100EA010107
|
||||||
|
S11330604FF00000C1F2030081421CBF4FF4106016
|
||||||
|
S1133070C0F23D0016D14FF46041C4F20F010C6858
|
||||||
|
S1133080A4B24CF2C060C0F22D004FF41061C0F243
|
||||||
|
S11330903D01002C18BF084604E04FF4004001E055
|
||||||
|
S11330A04FF48000002A03DA12F4006F03D040E0EA
|
||||||
|
S11330B013F4006F3DD14EF26401C4F20F010968AC
|
||||||
|
S11330C04FF46044C4F20F04246814F0E04F0DD0B0
|
||||||
|
S11330D04FF46044C4F20F0425684FF00004C7F2B3
|
||||||
|
S11330E0FF0405EA0404B4F1805F0CD1C1F3481471
|
||||||
|
S11330F004F1020404FB00F001F01F0404F10204D3
|
||||||
|
S1133100B0FBF4F00BE0C1F3481404FB00F001F051
|
||||||
|
S11331101F0404F101044FEA4404B0FBF4F011F479
|
||||||
|
S1133120804F18BF400811F4004F18BF800843F4C3
|
||||||
|
S1133130800313F4800F20D0002A15DA12F0804F98
|
||||||
|
S11331400BD012F4006F08D14FEA4000C2F386524C
|
||||||
|
S113315002F10102B0FBF2F00FE0C2F3C55202F13A
|
||||||
|
S11331600102B0FBF2F008E0C3F3C35303F101031F
|
||||||
|
S1133170B0FBF3F001E04FF0000030BC704700BF3B
|
||||||
|
S11331804EF21003CEF200031A6842F005021A60F0
|
||||||
|
S1133190704700BF4EF21003CEF200031A6822F00B
|
||||||
|
S11331A001021A60704700BF4EF21003CEF2000312
|
||||||
|
S11331B01A6842F002021A60704700BF4EF2100310
|
||||||
|
S11331C0CEF200031A6822F002021A60704700BFB0
|
||||||
|
S11331D010B500F1FF34B4F1807F0AD343F2E44028
|
||||||
|
S11331E0C0F200004FF0D00142F2C133C0F200033C
|
||||||
|
S11331F098474EF21403CEF200031C6010BD00BFCA
|
||||||
|
S11332004FF44043C4F200034FF45042C4F20002AE
|
||||||
|
S1133210904214BF00220122984214BF134642F088
|
||||||
|
S1133220010343B94FF46043C4F20003984214BF4E
|
||||||
|
S11332300020012070474FF00100704710B504468C
|
||||||
|
S113324043F20123C0F20003984750B943F2FC4013
|
||||||
|
S1133250C0F200004FF4CF7142F2C133C0F2000358
|
||||||
|
S11332609847E36A43F01003E362236B43F440732B
|
||||||
|
S113327043F00103236310BD10B5044643F2012358
|
||||||
|
S1133280C0F20003984750B943F2FC40C0F200007A
|
||||||
|
S11332904FF4DF7142F2C133C0F200039847A369CF
|
||||||
|
S11332A013F0080FFBD1E36A23F01003E362236BEE
|
||||||
|
S11332B023F4407323F00103236310BDF8B50446DF
|
||||||
|
S11332C00E4615461F4643F20123C0F200039847F9
|
||||||
|
S11332D050B943F2FC40C0F2000040F20D1142F23A
|
||||||
|
S11332E0C133C0F20003984755B943F2FC40C0F221
|
||||||
|
S11332F000004FF4877142F2C133C0F200039847D3
|
||||||
|
S11333004FF46043C4F20F031B6813F0E04F08BF8F
|
||||||
|
S1133310102347D04FF46043C4F20F031A684FF0F0
|
||||||
|
S11333200003C7F2FF0302EA0303B3F1805F08BF9F
|
||||||
|
S1133330102337D04FF46043C4F20F031A684FF0E0
|
||||||
|
S11333400003C7F2FF0302EA03034FF00002C1F2D5
|
||||||
|
S11333500102934209D14FF46043C4F20F031B6886
|
||||||
|
S11333609BB2022B08BF10231CD04FF46043C4F25D
|
||||||
|
S11333700F031A684FF00003C7F2FF0302EA0303C6
|
||||||
|
S11333804FF00002C1F20302934218BF082309D18F
|
||||||
|
S11333904FF46043C4F20F031B689BB2002B0CBFB5
|
||||||
|
S11333A01023082305FB03F3B3420AD943F2FC407C
|
||||||
|
S11333B0C0F2000040F20F1142F2C133C0F2000328
|
||||||
|
S11333C09847204643F27923C0F200039847B6EBAE
|
||||||
|
S11333D0051F236B3DBF43F0200323636D0823F0D7
|
||||||
|
S11333E0200328BF23634FEAC606B6FBF5F505F1B3
|
||||||
|
S11333F001054FEAD5136362C5F34505A562E7628B
|
||||||
|
S11334004FF00003A361204643F23D23C0F20003C2
|
||||||
|
S11334109847F8BD10B5044643F20123C0F20003F7
|
||||||
|
S1133420984750B943F2FC40C0F2000040F2094111
|
||||||
|
S113343042F2C133C0F200039847A36913F0100F9E
|
||||||
|
S11334400CBF20684FF0FF3010BD00BF6C69622FC5
|
||||||
|
S11334506472697665726C69622F6770696F2E6336
|
||||||
|
S11334600000000040420F0000201C0080841E0069
|
||||||
|
S113347000802500999E36000040380000093D0078
|
||||||
|
S113348000803E0000004B00404B4C0000204E00EA
|
||||||
|
S1133490808D5B0000C05D000080700000127A0027
|
||||||
|
S11334A000007D0080969800001BB7000080BB00E0
|
||||||
|
S11334B0C0E8CE00647ADA000024F4000000FA00C8
|
||||||
|
S11334C06C69622F6472697665726C69622F7379B4
|
||||||
|
S11334D07363746C2E63000000E10F4004E10F403D
|
||||||
|
S11334E008E10F406C69622F6472697665726C69D9
|
||||||
|
S11334F0622F7379737469636B2E63006C69622F36
|
||||||
|
S11335006472697665726C69622F756172742E6378
|
||||||
|
S107351000000000B3
|
||||||
|
S9032000DC
|
|
@ -0,0 +1,315 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: demo program bootloader interface source file
|
||||||
|
| File Name: boot.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootActivate
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Bootloader activation function.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static void BootActivate(void)
|
||||||
|
{
|
||||||
|
void (*pEntryFromProgFnc)(void);
|
||||||
|
|
||||||
|
/* stop the timer from generating interrupts */
|
||||||
|
TimeDeinit();
|
||||||
|
/* set pointer to the address of function EntryFromProg in the bootloader. note that
|
||||||
|
* 1 is added to this address to enable a switch from Thumb2 to Thumb mode
|
||||||
|
*/
|
||||||
|
pEntryFromProgFnc = (void*)0x000000F0 + 1;
|
||||||
|
/* call EntryFromProg to activate the bootloader. */
|
||||||
|
pEntryFromProgFnc();
|
||||||
|
} /*** end of BootActivate ***/
|
||||||
|
|
||||||
|
|
||||||
|
#if (BOOT_COM_UART_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
* U N I V E R S A L A S Y N C H R O N O U S R X T X I N T E R F A C E
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char UartReceiveByte(unsigned char *data);
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComInit
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the UART communication interface
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComInit(void)
|
||||||
|
{
|
||||||
|
/* enable the UART0 peripheral */
|
||||||
|
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
|
||||||
|
/* enable the and configure UART0 related peripherals and pins */
|
||||||
|
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
|
||||||
|
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
|
||||||
|
/* configure the UART0 baudrate and communication parameters */
|
||||||
|
UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), BOOT_COM_UART_BAUDRATE,
|
||||||
|
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
|
||||||
|
UART_CONFIG_PAR_NONE));
|
||||||
|
} /*** end of BootComInit ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComCheckActivationRequest
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Receives the CONNECT request from the host, which indicates that the
|
||||||
|
** bootloader should be activated and, if so, activates it.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComCheckActivationRequest(void)
|
||||||
|
{
|
||||||
|
static unsigned char xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1];
|
||||||
|
static unsigned char xcpCtoRxLength;
|
||||||
|
static unsigned char xcpCtoRxInProgress = 0;
|
||||||
|
|
||||||
|
/* start of cto packet received? */
|
||||||
|
if (xcpCtoRxInProgress == 0)
|
||||||
|
{
|
||||||
|
/* store the message length when received */
|
||||||
|
if (UartReceiveByte(&xcpCtoReqPacket[0]) == 1)
|
||||||
|
{
|
||||||
|
/* indicate that a cto packet is being received */
|
||||||
|
xcpCtoRxInProgress = 1;
|
||||||
|
|
||||||
|
/* reset packet data count */
|
||||||
|
xcpCtoRxLength = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* store the next packet byte */
|
||||||
|
if (UartReceiveByte(&xcpCtoReqPacket[xcpCtoRxLength+1]) == 1)
|
||||||
|
{
|
||||||
|
/* increment the packet data count */
|
||||||
|
xcpCtoRxLength++;
|
||||||
|
|
||||||
|
/* check to see if the entire packet was received */
|
||||||
|
if (xcpCtoRxLength == xcpCtoReqPacket[0])
|
||||||
|
{
|
||||||
|
/* done with cto packet reception */
|
||||||
|
xcpCtoRxInProgress = 0;
|
||||||
|
|
||||||
|
/* check if this was an XCP CONNECT command */
|
||||||
|
if ((xcpCtoReqPacket[1] == 0xff) && (xcpCtoReqPacket[2] == 0x00))
|
||||||
|
{
|
||||||
|
/* connection request received so start the bootloader */
|
||||||
|
BootActivate();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} /*** end of BootComCheckActivationRequest ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: UartReceiveByte
|
||||||
|
** PARAMETER: data pointer to byte where the data is to be stored.
|
||||||
|
** RETURN VALUE: 1 if a byte was received, 0 otherwise.
|
||||||
|
** DESCRIPTION: Receives a communication interface byte if one is present.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char UartReceiveByte(unsigned char *data)
|
||||||
|
{
|
||||||
|
signed long result;
|
||||||
|
|
||||||
|
/* try to read a newly received byte */
|
||||||
|
result = UARTCharGetNonBlocking(UART0_BASE);
|
||||||
|
/* check if a new byte was received */
|
||||||
|
if(result != -1)
|
||||||
|
{
|
||||||
|
/* store the received byte */
|
||||||
|
*data = (unsigned char)result;
|
||||||
|
/* inform caller of the newly received byte */
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
/* inform caller that no new data was received */
|
||||||
|
return 0;
|
||||||
|
} /*** end of UartReceiveByte ***/
|
||||||
|
#endif /* BOOT_COM_UART_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
* C O N T R O L L E R A R E A N E T W O R K I N T E R F A C E
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Macro definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
/* index of the used reception message objects */
|
||||||
|
#define CAN_RX_MSGOBJECT_IDX (0)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Local constant declarations
|
||||||
|
****************************************************************************************/
|
||||||
|
/* lookup table to quickly and efficiently convert a bit number to a bit mask */
|
||||||
|
static const unsigned short canBitNum2Mask[] =
|
||||||
|
{
|
||||||
|
0x0001, /* bit 0 */
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: CanSetBittiming
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: 1 if a valid bittiming configuration was found and set. 0 otherwise.
|
||||||
|
** DESCRIPTION: Attempts to match the bittiming parameters to the requested baudrate
|
||||||
|
** for a sample point between 65 and 75%, through a linear search
|
||||||
|
** algorithm. It is based on the equation:
|
||||||
|
** baudrate = CAN Clock Freq/((1+PropSeg+Phase1Seg+Phase2Seg)*Prescaler)
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char CanSetBittiming(void)
|
||||||
|
{
|
||||||
|
tCANBitClkParms bitClkParms;
|
||||||
|
unsigned char samplepoint;
|
||||||
|
|
||||||
|
/* init SJW to maximum value */
|
||||||
|
bitClkParms.uSJW = 4;
|
||||||
|
|
||||||
|
/* use a double loop to iterate through all possible settings of uSyncPropPhase1Seg
|
||||||
|
* and uPhase2Seg.
|
||||||
|
*/
|
||||||
|
for (bitClkParms.uSyncPropPhase1Seg = 16; bitClkParms.uSyncPropPhase1Seg >= 1; bitClkParms.uSyncPropPhase1Seg--)
|
||||||
|
{
|
||||||
|
for (bitClkParms.uPhase2Seg = 8; bitClkParms.uPhase2Seg >= 1; bitClkParms.uPhase2Seg--)
|
||||||
|
{
|
||||||
|
samplepoint = ((1+bitClkParms.uSyncPropPhase1Seg) * 100) / (1+bitClkParms.uSyncPropPhase1Seg+bitClkParms.uPhase2Seg);
|
||||||
|
/* check that sample points is within the preferred range */
|
||||||
|
if ( (samplepoint >= 65) && (samplepoint <= 75) )
|
||||||
|
{
|
||||||
|
/* does a prescaler exist to get the exact baudrate with these bittiming
|
||||||
|
* settings?
|
||||||
|
*/
|
||||||
|
if ((((BOOT_CPU_XTAL_SPEED_KHZ*1000)/BOOT_COM_CAN_BAUDRATE) % (1+bitClkParms.uSyncPropPhase1Seg+bitClkParms.uPhase2Seg)) == 0)
|
||||||
|
{
|
||||||
|
/* bittiming configuration found. now update SJW to that it is never greater
|
||||||
|
* than one of the phase segments. Giving the fact that the sample point is
|
||||||
|
* rather high, only phase seg 2 need to be considered for this.
|
||||||
|
*/
|
||||||
|
if (bitClkParms.uPhase2Seg < 4)
|
||||||
|
{
|
||||||
|
bitClkParms.uSJW = bitClkParms.uPhase2Seg;
|
||||||
|
}
|
||||||
|
/* calculate the actual prescaler value */
|
||||||
|
bitClkParms.uQuantumPrescaler = ((BOOT_CPU_XTAL_SPEED_KHZ*1000)/BOOT_COM_CAN_BAUDRATE)/(1+bitClkParms.uSyncPropPhase1Seg+bitClkParms.uPhase2Seg);
|
||||||
|
/* apply this bittiming configuration */
|
||||||
|
CANSetBitTiming(CAN0_BASE, &bitClkParms);
|
||||||
|
/* break loop and return from function */
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* no valid bittiming configuration found */
|
||||||
|
return 0;
|
||||||
|
} /*** end of CanSetBittiming ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComInit
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the CAN communication interface
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComInit(void)
|
||||||
|
{
|
||||||
|
tCANMsgObject rxMsgObject;
|
||||||
|
|
||||||
|
/* configure the CAN pins */
|
||||||
|
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
|
||||||
|
GPIOPinTypeCAN(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1);
|
||||||
|
/* enable the CAN controller */
|
||||||
|
SysCtlPeripheralEnable(SYSCTL_PERIPH_CAN0);
|
||||||
|
/* reset the state of the CAN controller, including the message objects */
|
||||||
|
CANInit(CAN0_BASE);
|
||||||
|
/* set the bittiming */
|
||||||
|
CanSetBittiming();
|
||||||
|
/* take the CAN controller out of the initialization state */
|
||||||
|
CANEnable(CAN0_BASE);
|
||||||
|
/* setup message object 1 to receive the BOOT_COM_CAN_RX_MSG_ID message*/
|
||||||
|
rxMsgObject.ulMsgID = BOOT_COM_CAN_RX_MSG_ID;
|
||||||
|
rxMsgObject.ulMsgIDMask = 0x7ff;
|
||||||
|
rxMsgObject.ulFlags = MSG_OBJ_USE_ID_FILTER;
|
||||||
|
rxMsgObject.ulMsgLen = 8;
|
||||||
|
CANMessageSet(CAN0_BASE, CAN_RX_MSGOBJECT_IDX+1, &rxMsgObject, MSG_OBJ_TYPE_RX);
|
||||||
|
} /*** end of BootComInit ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComCheckActivationRequest
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Receives the CONNECT request from the host, which indicates that the
|
||||||
|
** bootloader should be activated and, if so, activates it.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComCheckActivationRequest(void)
|
||||||
|
{
|
||||||
|
unsigned long status;
|
||||||
|
tCANMsgObject msgObject;
|
||||||
|
unsigned char msgData[8];
|
||||||
|
|
||||||
|
/* get bitmask of message objects with new data */
|
||||||
|
status = CANStatusGet(CAN0_BASE, CAN_STS_NEWDAT);
|
||||||
|
/* check if the BOOT_COM_CAN_RX_MSG_ID message was received */
|
||||||
|
if ((status & canBitNum2Mask[CAN_RX_MSGOBJECT_IDX]) != 0)
|
||||||
|
{
|
||||||
|
/* read the message data */
|
||||||
|
msgObject.pucMsgData = msgData;
|
||||||
|
CANMessageGet(CAN0_BASE, CAN_RX_MSGOBJECT_IDX+1, &msgObject, true);
|
||||||
|
/* check if this was an XCP CONNECT command */
|
||||||
|
if ((msgData[0] == 0xff) && (msgData[1] == 0x00))
|
||||||
|
{
|
||||||
|
/* connection request received so start the bootloader */
|
||||||
|
BootActivate();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} /*** end of BootComCheckActivationRequest ***/
|
||||||
|
#endif /* BOOT_COM_CAN_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of boot.c *************************************/
|
|
@ -0,0 +1,42 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: demo program bootloader interface header file
|
||||||
|
| File Name: boot.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef BOOT_H
|
||||||
|
#define BOOT_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComInit(void);
|
||||||
|
void BootComCheckActivationRequest(void);
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* BOOT_H */
|
||||||
|
/*********************************** end of boot.h *************************************/
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ all
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ clean
|
|
@ -0,0 +1,94 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: Demo program C startup source file
|
||||||
|
| File Name: cstart.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* External function protoypes
|
||||||
|
****************************************************************************************/
|
||||||
|
extern int main(void);
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* External data declarations
|
||||||
|
****************************************************************************************/
|
||||||
|
/* these externals are declared by the linker */
|
||||||
|
extern unsigned long _etext;
|
||||||
|
extern unsigned long _data;
|
||||||
|
extern unsigned long _edata;
|
||||||
|
extern unsigned long _bss;
|
||||||
|
extern unsigned long _ebss;
|
||||||
|
extern unsigned long _estack;
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: reset_handler
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Reset interrupt service routine. Configures the stack, initializes
|
||||||
|
** RAM and jumps to function main.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void reset_handler(void)
|
||||||
|
{
|
||||||
|
unsigned long *pSrc, *pDest;
|
||||||
|
|
||||||
|
/* initialize stack pointer */
|
||||||
|
__asm(" ldr r1, =_estack\n"
|
||||||
|
" mov sp, r1");
|
||||||
|
/* copy the data segment initializers from flash to SRAM */
|
||||||
|
pSrc = &_etext;
|
||||||
|
for(pDest = &_data; pDest < &_edata; )
|
||||||
|
{
|
||||||
|
*pDest++ = *pSrc++;
|
||||||
|
}
|
||||||
|
/* zero fill the bss segment. this is done with inline assembly since this will
|
||||||
|
* clear the value of pDest if it is not kept in a register.
|
||||||
|
*/
|
||||||
|
__asm(" ldr r0, =_bss\n"
|
||||||
|
" ldr r1, =_ebss\n"
|
||||||
|
" mov r2, #0\n"
|
||||||
|
" .thumb_func\n"
|
||||||
|
"zero_loop:\n"
|
||||||
|
" cmp r0, r1\n"
|
||||||
|
" it lt\n"
|
||||||
|
" strlt r2, [r0], #4\n"
|
||||||
|
" blt zero_loop");
|
||||||
|
/* start the software application by calling its entry point */
|
||||||
|
main();
|
||||||
|
} /*** end of reset_handler ***/
|
||||||
|
|
||||||
|
|
||||||
|
/************************************ end of cstart.c **********************************/
|
|
@ -0,0 +1,57 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: generic header file
|
||||||
|
| File Name: header.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef HEADER_H
|
||||||
|
#define HEADER_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "../Boot/config.h" /* bootloader configuration */
|
||||||
|
#include "boot.h" /* bootloader interface driver */
|
||||||
|
#include "irq.h" /* IRQ driver */
|
||||||
|
#include "led.h" /* LED driver */
|
||||||
|
#include "time.h" /* Timer driver */
|
||||||
|
#include "inc/hw_ints.h"
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
#include "inc/hw_nvic.h"
|
||||||
|
#include "inc/hw_sysctl.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "driverlib/sysctl.h"
|
||||||
|
#include "driverlib/gpio.h"
|
||||||
|
#include "driverlib/uart.h"
|
||||||
|
#include "driverlib/can.h"
|
||||||
|
#include "driverlib/interrupt.h"
|
||||||
|
#include "driverlib/systick.h"
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* HEADER_H */
|
||||||
|
/*********************************** end of header.h ***********************************/
|
|
@ -0,0 +1,180 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Project Name="DemoProg" InternalType="">
|
||||||
|
<VirtualDirectory Name="Demo">
|
||||||
|
<VirtualDirectory Name="ARMCM3_LM3S_EK_LM3S8962_GCC">
|
||||||
|
<VirtualDirectory Name="Prog">
|
||||||
|
<VirtualDirectory Name="lib">
|
||||||
|
<VirtualDirectory Name="driverlib">
|
||||||
|
<File Name="../lib/driverlib/adc.c"/>
|
||||||
|
<File Name="../lib/driverlib/adc.h"/>
|
||||||
|
<File Name="../lib/driverlib/can.c"/>
|
||||||
|
<File Name="../lib/driverlib/can.h"/>
|
||||||
|
<File Name="../lib/driverlib/comp.c"/>
|
||||||
|
<File Name="../lib/driverlib/comp.h"/>
|
||||||
|
<File Name="../lib/driverlib/cpu.c"/>
|
||||||
|
<File Name="../lib/driverlib/cpu.h"/>
|
||||||
|
<File Name="../lib/driverlib/debug.h"/>
|
||||||
|
<File Name="../lib/driverlib/epi.c"/>
|
||||||
|
<File Name="../lib/driverlib/epi.h"/>
|
||||||
|
<File Name="../lib/driverlib/ethernet.c"/>
|
||||||
|
<File Name="../lib/driverlib/ethernet.h"/>
|
||||||
|
<File Name="../lib/driverlib/flash.c"/>
|
||||||
|
<File Name="../lib/driverlib/flash.h"/>
|
||||||
|
<File Name="../lib/driverlib/gpio.c"/>
|
||||||
|
<File Name="../lib/driverlib/gpio.h"/>
|
||||||
|
<File Name="../lib/driverlib/hibernate.c"/>
|
||||||
|
<File Name="../lib/driverlib/hibernate.h"/>
|
||||||
|
<File Name="../lib/driverlib/i2c.c"/>
|
||||||
|
<File Name="../lib/driverlib/i2c.h"/>
|
||||||
|
<File Name="../lib/driverlib/i2s.c"/>
|
||||||
|
<File Name="../lib/driverlib/i2s.h"/>
|
||||||
|
<File Name="../lib/driverlib/interrupt.c"/>
|
||||||
|
<File Name="../lib/driverlib/interrupt.h"/>
|
||||||
|
<File Name="../lib/driverlib/mpu.c"/>
|
||||||
|
<File Name="../lib/driverlib/mpu.h"/>
|
||||||
|
<File Name="../lib/driverlib/pin_map.h"/>
|
||||||
|
<File Name="../lib/driverlib/pwm.c"/>
|
||||||
|
<File Name="../lib/driverlib/pwm.h"/>
|
||||||
|
<File Name="../lib/driverlib/qei.c"/>
|
||||||
|
<File Name="../lib/driverlib/qei.h"/>
|
||||||
|
<File Name="../lib/driverlib/rom.h"/>
|
||||||
|
<File Name="../lib/driverlib/rom_map.h"/>
|
||||||
|
<File Name="../lib/driverlib/ssi.c"/>
|
||||||
|
<File Name="../lib/driverlib/ssi.h"/>
|
||||||
|
<File Name="../lib/driverlib/sysctl.c"/>
|
||||||
|
<File Name="../lib/driverlib/sysctl.h"/>
|
||||||
|
<File Name="../lib/driverlib/systick.c"/>
|
||||||
|
<File Name="../lib/driverlib/systick.h"/>
|
||||||
|
<File Name="../lib/driverlib/timer.c"/>
|
||||||
|
<File Name="../lib/driverlib/timer.h"/>
|
||||||
|
<File Name="../lib/driverlib/uart.c"/>
|
||||||
|
<File Name="../lib/driverlib/uart.h"/>
|
||||||
|
<File Name="../lib/driverlib/udma.c"/>
|
||||||
|
<File Name="../lib/driverlib/udma.h"/>
|
||||||
|
<File Name="../lib/driverlib/usb.c"/>
|
||||||
|
<File Name="../lib/driverlib/usb.h"/>
|
||||||
|
<File Name="../lib/driverlib/watchdog.c"/>
|
||||||
|
<File Name="../lib/driverlib/watchdog.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="inc">
|
||||||
|
<File Name="../lib/inc/asmdefs.h"/>
|
||||||
|
<File Name="../lib/inc/hw_adc.h"/>
|
||||||
|
<File Name="../lib/inc/hw_can.h"/>
|
||||||
|
<File Name="../lib/inc/hw_comp.h"/>
|
||||||
|
<File Name="../lib/inc/hw_epi.h"/>
|
||||||
|
<File Name="../lib/inc/hw_ethernet.h"/>
|
||||||
|
<File Name="../lib/inc/hw_flash.h"/>
|
||||||
|
<File Name="../lib/inc/hw_gpio.h"/>
|
||||||
|
<File Name="../lib/inc/hw_hibernate.h"/>
|
||||||
|
<File Name="../lib/inc/hw_i2c.h"/>
|
||||||
|
<File Name="../lib/inc/hw_i2s.h"/>
|
||||||
|
<File Name="../lib/inc/hw_ints.h"/>
|
||||||
|
<File Name="../lib/inc/hw_memmap.h"/>
|
||||||
|
<File Name="../lib/inc/hw_nvic.h"/>
|
||||||
|
<File Name="../lib/inc/hw_pwm.h"/>
|
||||||
|
<File Name="../lib/inc/hw_qei.h"/>
|
||||||
|
<File Name="../lib/inc/hw_ssi.h"/>
|
||||||
|
<File Name="../lib/inc/hw_sysctl.h"/>
|
||||||
|
<File Name="../lib/inc/hw_timer.h"/>
|
||||||
|
<File Name="../lib/inc/hw_types.h"/>
|
||||||
|
<File Name="../lib/inc/hw_uart.h"/>
|
||||||
|
<File Name="../lib/inc/hw_udma.h"/>
|
||||||
|
<File Name="../lib/inc/hw_usb.h"/>
|
||||||
|
<File Name="../lib/inc/hw_watchdog.h"/>
|
||||||
|
<File Name="../lib/inc/lm3s6965.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../boot.c"/>
|
||||||
|
<File Name="../boot.h"/>
|
||||||
|
<File Name="../cstart.c"/>
|
||||||
|
<File Name="../header.h"/>
|
||||||
|
<File Name="../irq.c"/>
|
||||||
|
<File Name="../irq.h"/>
|
||||||
|
<File Name="../led.c"/>
|
||||||
|
<File Name="../led.h"/>
|
||||||
|
<File Name="../main.c"/>
|
||||||
|
<File Name="../time.c"/>
|
||||||
|
<File Name="../time.h"/>
|
||||||
|
<File Name="../vectors.c"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<Plugins>
|
||||||
|
<Plugin Name="qmake">
|
||||||
|
<![CDATA[00010001N0005Debug000000000000]]>
|
||||||
|
</Plugin>
|
||||||
|
</Plugins>
|
||||||
|
<Description/>
|
||||||
|
<Dependencies/>
|
||||||
|
<Settings Type="Dynamic Library">
|
||||||
|
<GlobalSettings>
|
||||||
|
<Compiler Options="" C_Options="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="">
|
||||||
|
<LibraryPath Value="."/>
|
||||||
|
</Linker>
|
||||||
|
<ResourceCompiler Options=""/>
|
||||||
|
</GlobalSettings>
|
||||||
|
<Configuration Name="Debug" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="-g" C_Options="-g" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="../obj" Command="demoprog_olimex_lpc_l2294_20mhz.elf" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(WorkspacePath)/../bin" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="yes" RemoteHostName="localhost" RemoteHostPort="3333" DebuggerPath="C:\Program Files (x86)\CodeSourcery\Sourcery G++ Lite\bin\arm-none-eabi-gdb.exe">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands>break main
|
||||||
|
continue
|
||||||
|
</StartupCommands>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)/..</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
<Configuration Name="Release" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="" C_Options="" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="-O2" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="./Release" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands/>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
</Settings>
|
||||||
|
</CodeLite_Project>
|
|
@ -0,0 +1,12 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Workspace Name="DemoProg" Database="./DemoProg.tags">
|
||||||
|
<Project Name="DemoProg" Path="DemoProg.project" Active="Yes"/>
|
||||||
|
<BuildMatrix>
|
||||||
|
<WorkspaceConfiguration Name="Debug" Selected="yes">
|
||||||
|
<Project Name="DemoProg" ConfigName="Debug"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
<WorkspaceConfiguration Name="Release" Selected="yes">
|
||||||
|
<Project Name="DemoProg" ConfigName="Release"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
</BuildMatrix>
|
||||||
|
</CodeLite_Workspace>
|
|
@ -0,0 +1,4 @@
|
||||||
|
Integrated Development Environment
|
||||||
|
----------------------------------
|
||||||
|
Codelite was used as the editor during the development of this software program. This directory contains the Codelite
|
||||||
|
workspace and project files. Codelite is a cross platform open source C/C++ IDE, available at http://www.codelite.org/.
|
|
@ -0,0 +1,97 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: IRQ driver source file
|
||||||
|
| File Name: irq.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Local data definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char interruptNesting = 0; /* used for global interrupt en/disable */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: IrqInterruptEnable
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Enables the generation IRQ interrupts. Typically called once during
|
||||||
|
** software startup after completion of the initialization.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptEnable(void)
|
||||||
|
{
|
||||||
|
IntMasterEnable();
|
||||||
|
} /*** end of IrqInterruptEnable ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: HwInterruptDisable
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Disables the generation IRQ interrupts and stores information on
|
||||||
|
** whether or not the interrupts were already disabled before explicitly
|
||||||
|
** disabling them with this function. Normally used as a pair together
|
||||||
|
** with IrqInterruptRestore during a critical section.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptDisable(void)
|
||||||
|
{
|
||||||
|
if (interruptNesting == 0)
|
||||||
|
{
|
||||||
|
IntMasterDisable();
|
||||||
|
}
|
||||||
|
interruptNesting++;
|
||||||
|
} /*** end of IrqInterruptDisable ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: IrqInterruptRestore
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Restore the generation IRQ interrupts to the setting it had prior to
|
||||||
|
** calling IrqInterruptDisable. Normally used as a pair together with
|
||||||
|
** IrqInterruptDisable during a critical section.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptRestore(void)
|
||||||
|
{
|
||||||
|
interruptNesting--;
|
||||||
|
if (interruptNesting == 0)
|
||||||
|
{
|
||||||
|
IntMasterEnable();
|
||||||
|
}
|
||||||
|
} /*** end of IrqInterruptRestore ***/
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of irq.c **************************************/
|
|
@ -0,0 +1,43 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: IRQ driver header file
|
||||||
|
| File Name: irq.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef IRQ_H
|
||||||
|
#define IRQ_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptEnable(void);
|
||||||
|
void IrqInterruptDisable(void);
|
||||||
|
void IrqInterruptRestore(void);
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* IRQ_H */
|
||||||
|
/*********************************** end of irq.h **************************************/
|
|
@ -0,0 +1,101 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: LED driver source file
|
||||||
|
| File Name: led.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Macro definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
#define LED_TOGGLE_MS (500) /* toggle interval time in millisecodns */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: LedInit
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the LED.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void LedInit(void)
|
||||||
|
{
|
||||||
|
/* enable the peripherals used by the LED driver */
|
||||||
|
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
|
||||||
|
/* configure the LED as digital output and turn off the LED */
|
||||||
|
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, 0x01);
|
||||||
|
GPIOPinWrite(GPIO_PORTF_BASE, 0x01, 0);
|
||||||
|
} /*** end of LedInit ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: LedToggle
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Toggles the LED at a fixed time interval.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void LedToggle(void)
|
||||||
|
{
|
||||||
|
static unsigned char led_toggle_state = 0;
|
||||||
|
static unsigned long timer_counter_last = 0;
|
||||||
|
unsigned long timer_counter_now;
|
||||||
|
|
||||||
|
/* check if toggle interval time passed */
|
||||||
|
timer_counter_now = TimeGet();
|
||||||
|
if ( (timer_counter_now - timer_counter_last) < LED_TOGGLE_MS)
|
||||||
|
{
|
||||||
|
/* not yet time to toggle */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* determine toggle action */
|
||||||
|
if (led_toggle_state == 0)
|
||||||
|
{
|
||||||
|
led_toggle_state = 1;
|
||||||
|
/* turn the LED on */
|
||||||
|
GPIOPinWrite(GPIO_PORTF_BASE, 0x01, 1);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
led_toggle_state = 0;
|
||||||
|
/* turn the LED off */
|
||||||
|
GPIOPinWrite(GPIO_PORTF_BASE, 0x01, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* store toggle time to determine next toggle interval */
|
||||||
|
timer_counter_last = timer_counter_now;
|
||||||
|
} /*** end of LedToggle ***/
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of led.c **************************************/
|
|
@ -0,0 +1,42 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: LED driver header file
|
||||||
|
| File Name: led.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef LED_H
|
||||||
|
#define LED_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
void LedInit(void);
|
||||||
|
void LedToggle(void);
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* LED_H */
|
||||||
|
/*********************************** end of led.h **************************************/
|
|
@ -0,0 +1,400 @@
|
||||||
|
License Agreement
|
||||||
|
|
||||||
|
Important - This is a legally binding agreement. Read it carefully. After you
|
||||||
|
read the following terms, you will be asked whether you are authorized to
|
||||||
|
commit your company to abide by the following terms. THIS AGREEMENT IS
|
||||||
|
DISPLAYED FOR YOU TO READ PRIOR TO DOWNLOADING OR USING THE "LICENSED
|
||||||
|
MATERIALS".
|
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|
|
||||||
|
DO NOT DOWNLOAD OR INSTALL the software programs unless you agree on behalf of
|
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|
yourself and your company to be bound by the terms of this License Agreement.
|
||||||
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|
||||||
|
DO NOT CLICK "I AGREE" UNLESS:
|
||||||
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|
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|
1. YOU ARE AUTHORIZED TO AGREE TO THE TERMS OF THIS LICENSE ON BEHALF OF
|
||||||
|
YOURSELF AND YOUR COMPANY; AND
|
||||||
|
|
||||||
|
2. YOU INTEND TO ENTER THIS LEGALLY BINDING AGREEMENT ON BEHALF OF YOURSELF AND
|
||||||
|
YOUR COMPANY.
|
||||||
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|
||||||
|
Important - Read carefully: This software license agreement ("Agreement") is a
|
||||||
|
legal agreement between you (either an individual or entity) and Texas
|
||||||
|
Instruments Incorporated ("TI"). The "Licensed Materials" subject to this
|
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Agreement include the software programs TI has granted you access to download
|
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and any "on-line" or electronic documentation associated with these programs,
|
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or any portion thereof, and may also include hardware, reference designs and
|
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associated documentation. The Licensed Materials are specifically designed and
|
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licensed for use solely and exclusively with microprocessor/microcontroller
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devices manufactured by or for TI ("TI Devices"). By installing, copying or
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otherwise using the Licensed Materials you agree to abide by the provisions set
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forth herein. This Agreement is displayed for you to read prior to using the
|
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Licensed Materials. If you choose not to accept or agree with these provisions,
|
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do not download or install the Licensed Materials.
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1. Delivery. TI may deliver the Licensed Materials, or portions thereof, to you
|
||||||
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electronically.
|
||||||
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|
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2. License Grant and Use Restrictions.
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a. Limited Source Code License. Subject to the terms of this Agreement, and
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commencing as of the Effective Date and continuing for the term of this
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Agreement, TI hereby grants to you a limited, free, non-transferable,
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non-exclusive, non-assignable, non-sub-licensable license to make copies,
|
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prepare derivative works, display internally and use internally the Licensed
|
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Materials provided to you in source code for the sole purposes of designing and
|
||||||
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developing object and executable versions of such Licensed Materials or any
|
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derivative thereof, that execute solely and exclusively on TI Devices used in
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Customer Product(s), and maintaining and supporting such Licensed Materials, or
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any derivative thereof, and Customer Product(s). "Customer Product" means a
|
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final product distributed by or for you that consists of both hardware,
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including one or more TI Devices, and software components, including only
|
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executable versions of the Licensed Materials that execute solely and
|
||||||
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exclusively on or with such TI Devices and not on devices manufactured by or
|
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for an entity other than TI.
|
||||||
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|
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b. Production and Distribution License. Subject to the terms of this Agreement,
|
||||||
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and commencing as of the Effective Date and continuing for the term of this
|
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Agreement, TI hereby grants to you a free, non-exclusive, non-transferable,
|
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non-assignable, worldwide license to:
|
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|
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(i). Use object code versions of the Licensed Materials, or any derivative
|
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thereof, to make copies, display internally, evaluate, test, distribute
|
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internally and use internally for the sole purposes of designing and developing
|
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Customer Product(s), and maintaining and supporting the Licensed Materials and
|
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Customer Product(s);
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|
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(ii). Make copies, use, sell, offer to sell, and otherwise distribute object
|
||||||
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code and executable versions of the Licensed Materials, or any derivative
|
||||||
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thereof, for use in or with Customer Product(s), provided that such Licensed
|
||||||
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Materials are embedded in or only used with Customer Product(s), and provided
|
||||||
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further that such Licensed Materials execute solely and exclusively on a TI
|
||||||
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Device and not on any device manufactured by or for an entity other than TI.
|
||||||
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|
||||||
|
c. Demonstration License. Subject to the terms of this Agreement, and
|
||||||
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commencing as of the Effective Date and continuing for the term of this
|
||||||
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Agreement, TI grants to you a free, non-transferable, non-exclusive,
|
||||||
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non-assignable, non-sub-licensable worldwide license to demonstrate to third
|
||||||
|
parties the Licensed Materials as they are used in Customer Products executing
|
||||||
|
solely and exclusively on TI Devices, provided that such Licensed Materials are
|
||||||
|
demonstrated in object or executable versions only.
|
||||||
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|
||||||
|
d. Reference Design Use License. Subject to the terms of this Agreement, and
|
||||||
|
commencing as of the Effective Date and continuing for the term of this
|
||||||
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Agreement, TI hereby grants to you a free, non-transferable, non-exclusive,
|
||||||
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non-assignable, non-sub-licensable worldwide license to:
|
||||||
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|
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(i). use the Licensed Materials to design, develop, manufacture or have
|
||||||
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manufactured, sell, offer to sell, or otherwise distribute Customer Product(s)
|
||||||
|
or product designs, including portions or derivatives of the Licensed Materials
|
||||||
|
as they are incorporated in or used with Customer Product(s), provided such
|
||||||
|
Customer Products or product designs utilize a TI Device.
|
||||||
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|
||||||
|
e. Contractors and Suppliers. The licenses granted to you hereunder shall
|
||||||
|
include your on-site and off-site suppliers and independent contractors, while
|
||||||
|
such suppliers and independent contractors are performing work for or providing
|
||||||
|
services to you, provided that such suppliers and independent contractors have
|
||||||
|
executed work-for-hire agreements with you containing terms and conditions not
|
||||||
|
inconsistent with the terms and conditions set forth is this Agreement and
|
||||||
|
provided further that such contractors may provide work product to only you
|
||||||
|
under such work-for-hire agreements.
|
||||||
|
|
||||||
|
f. No Other License. Notwithstanding anything to the contrary, nothing in this
|
||||||
|
Agreement shall be construed as a license to any intellectual property rights
|
||||||
|
of TI other than those rights embodied in the Licensed Materials provided to
|
||||||
|
you by TI. EXCEPT AS PROVIDED HEREIN, NO OTHER LICENSE, EXPRESS OR IMPLIED, BY
|
||||||
|
ESTOPPEL OR OTHERWISE, TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHTS IS GRANTED
|
||||||
|
HEREIN.
|
||||||
|
|
||||||
|
g. Restrictions. You shall maintain the source code versions of the Licensed
|
||||||
|
Materials under password control protection and shall not disclose such source
|
||||||
|
code versions of the Licensed Materials, or any derivative thereof, to any
|
||||||
|
person other than your employees and contractors whose job performance requires
|
||||||
|
access. You shall not use the Licensed Materials with a processing device
|
||||||
|
manufactured by or for an entity other than TI, and you agree that any such
|
||||||
|
unauthorized use of the Licensed Materials is a material breach of this
|
||||||
|
Agreement. Except as expressly provided in this Agreement, you shall not copy,
|
||||||
|
publish, disclose, display, provide, transfer or make available the Licensed
|
||||||
|
Materials to any third party and you shall not sublicense, transfer, or assign
|
||||||
|
the Licensed Materials or your rights under this Agreement to any third party.
|
||||||
|
You shall not mortgage, pledge or encumber the Licensed Materials in any way.
|
||||||
|
You shall not (i) incorporate, combine, or distribute the Licensed Materials,
|
||||||
|
or any derivative thereof, with any Public Software, or (ii) use Public
|
||||||
|
Software in the development of any derivatives of the Licensed Materials, each
|
||||||
|
in such a way that would cause the Licensed Materials, or any derivative
|
||||||
|
thereof, to be subject to all or part of the license obligations or other
|
||||||
|
intellectual property related terms with respect to such Public Software,
|
||||||
|
including but not limited to, the obligations that the Licensed Materials, or
|
||||||
|
any derivative thereof, incorporated into, combined, or distributed with such
|
||||||
|
Public Software (x) be disclosed or distributed in source code form, be
|
||||||
|
licensed for the purpose of making derivatives of such software, or be
|
||||||
|
redistributed free of charge, contrary to the terms and conditions of this
|
||||||
|
Agreement, (y) be used with devices other than TI Devices, or (z) be otherwise
|
||||||
|
used or distributed in a manner contrary to the terms and conditions of this
|
||||||
|
Agreement. As used in this Section 2(g), "Public Software" means any software
|
||||||
|
that contains, or is derived in whole or in part from, any software distributed
|
||||||
|
as open source software, including but not limited to software licensed under
|
||||||
|
the following or similar models: (A) GNU's General Public License (GPL) or
|
||||||
|
Lesser/Library GPL (LGPL), (B) the Artistic License (e.g., PERL), (C) the
|
||||||
|
Mozilla Public License, (D) the Netscape Public License, (E) the Sun Community
|
||||||
|
Source License (SCSL), (F) the Sun Industry Standards Source License (SISL),
|
||||||
|
(G) the Apache Server license, (H) QT Free Edition License, (I) IBM Public
|
||||||
|
License, and (J) BitKeeper.
|
||||||
|
|
||||||
|
h. Termination. This Agreement is effective until terminated. You may terminate
|
||||||
|
this Agreement at any time by written notice to TI. Without prejudice to any
|
||||||
|
other rights, if you fail to comply with the terms of this Agreement, TI may
|
||||||
|
terminate your right to use the Licensed Materials upon written notice to you.
|
||||||
|
Upon termination of this Agreement, you will destroy any and all copies of the
|
||||||
|
Licensed Materials in your possession, custody or control and provide to TI a
|
||||||
|
written statement signed by your authorized representative certifying such
|
||||||
|
destruction. The following sections will survive any expiration or termination
|
||||||
|
of this Agreement: 2(h) (Termination), 3 (Licensed Materials Ownership), 6
|
||||||
|
(Warranties and Limitations), 7 (Indemnification Disclaimer), 10 (Export
|
||||||
|
Control), 11 (Governing Law and Severability), 12 (PRC Provisions), and 13
|
||||||
|
(Entire Agreement). The obligations set forth in Section 5 (Confidential
|
||||||
|
Information) will survive any expiration or termination of this Agreement for
|
||||||
|
three (3) years after such expiration or termination.
|
||||||
|
|
||||||
|
3. Licensed Materials Ownership. The Licensed Materials are licensed, not sold
|
||||||
|
to you, and can only be used in accordance with the terms of this Agreement.
|
||||||
|
Subject to the licenses granted to you pursuant to this Agreement, TI and TI's
|
||||||
|
licensors own and shall continue to own all right, title, and interest in and
|
||||||
|
to the Licensed Materials, including all copies thereof. The parties agree that
|
||||||
|
all fixes, modifications and improvements to the Licensed Materials conceived
|
||||||
|
of or made by TI that are based, either in whole or in part, on your feedback,
|
||||||
|
suggestions or recommendations are the exclusive property of TI and all right,
|
||||||
|
title and interest in and to such fixes, modifications or improvements to the
|
||||||
|
Licensed Materials will vest solely in TI. Moreover, you acknowledge and agree
|
||||||
|
that when your independently developed software or hardware components are
|
||||||
|
combined, in whole or in part, with the Licensed Materials, your right to use
|
||||||
|
the Licensed Materials embodied in such resulting combined work shall remain
|
||||||
|
subject to the terms and conditions of this Agreement.
|
||||||
|
|
||||||
|
4. Intellectual Property Rights.
|
||||||
|
|
||||||
|
a. The Licensed Materials contain copyrighted material, trade secrets and other
|
||||||
|
proprietary information of TI and TI's licensors and are protected by copyright
|
||||||
|
laws, international copyright treaties, and trade secret laws, as well as other
|
||||||
|
intellectual property laws. To protect TI's and TI's licensors' rights in the
|
||||||
|
Licensed Materials, you agree, except as specifically permitted by statute by a
|
||||||
|
provision that cannot be waived by contract, not to "unlock", decompile,
|
||||||
|
reverse engineer, disassemble or otherwise translate any portions of the
|
||||||
|
Licensed Materials to a human-perceivable form nor to permit any person or
|
||||||
|
entity to do so. You shall not remove, alter, cover, or obscure any
|
||||||
|
confidentiality, trade secret, proprietary, or copyright notices, trade-marks,
|
||||||
|
proprietary, patent, or other identifying marks or designs from any component
|
||||||
|
of the Licensed Materials and you shall reproduce and include in all copies of
|
||||||
|
the Licensed Materials the copyright notice(s) and proprietary legend(s) of TI
|
||||||
|
and TI's licensors as they appear in the Licensed Materials. TI reserves all
|
||||||
|
rights not specifically granted under this Agreement.
|
||||||
|
|
||||||
|
b. Third parties may claim to own patents, copyrights, or other intellectual
|
||||||
|
property rights that cover the implementation of certain Licensed Materials.
|
||||||
|
Certain Licensed Materials may also be based on industry recognized standards,
|
||||||
|
including but not limited to specifically the ISO MPEG and ITU standards, and
|
||||||
|
software programs published by industry recognized standards bodies and certain
|
||||||
|
third parties claim to own patents, copyrights, and other intellectual property
|
||||||
|
rights that cover implementation of those standards. You acknowledge and agree
|
||||||
|
that this Agreement does not convey a license to any such third party patents,
|
||||||
|
copyrights, and other intellectual property rights and that you are solely
|
||||||
|
responsible for any patent, copyright, or other intellectual property right
|
||||||
|
claims that relate to your use and distribution of the Licensed Materials, and
|
||||||
|
your use and distribution of your products that include or incorporate the
|
||||||
|
Licensed Materials.
|
||||||
|
|
||||||
|
5. Confidential Information. You acknowledge and agree that the Licensed
|
||||||
|
Materials contain trade secrets and other confidential information of TI and
|
||||||
|
TI's licensors. You agree to use the Licensed Materials solely within the scope
|
||||||
|
of the licenses set forth herein, to maintain the Licensed Materials in strict
|
||||||
|
confidence, to use at least the same procedures and degree of care that you use
|
||||||
|
to prevent disclosure of your own confidential information of like importance
|
||||||
|
but in no instance less than reasonable care, and to prevent disclosure of the
|
||||||
|
Licensed Materials to any third party, except as may be necessary and required
|
||||||
|
in connection with your rights and obligations hereunder. You agree to obtain
|
||||||
|
executed confidentiality agreements with your employees and contractors having
|
||||||
|
access to the Licensed Materials and to diligently take steps to enforce such
|
||||||
|
agreements in this respect. TI agrees that the employment agreements used in
|
||||||
|
the normal course of your business shall satisfy the requirements of this
|
||||||
|
section. TI may disclose your contact information to TI's applicable licensors.
|
||||||
|
|
||||||
|
6. Warranties and Limitations. YOU ACKNOWLEDGE AND AGREE THAT THE LICENSED
|
||||||
|
MATERIALS MAY NOT BE INTENDED FOR PRODUCTION APPLICATIONS AND MAY CONTAIN
|
||||||
|
IRREGULARITIES AND DEFECTS NOT FOUND IN PRODUCTION SOFTWARE. FURTHERMORE, YOU
|
||||||
|
ACKNOWLEDGE AND AGREE THAT THE LICENSED MATERIALS HAVE NOT BEEN TESTED OR
|
||||||
|
CERTIFIED BY ANY GOVERNMENT AGENCY OR INDUSTRY REGULATORY ORGANIZATION OR ANY
|
||||||
|
OTHER THIRD PARTY ORGANIZATION. YOU AGREE THAT PRIOR TO USING, INCORPORATING OR
|
||||||
|
DISTRIBUTING THE LICENSED MATERIALS IN OR WITH ANY COMMERCIAL PRODUCT THAT YOU
|
||||||
|
WILL THOROUGHLY TEST THE PRODUCT AND THE FUNCTIONALITY OF THE LICENSED
|
||||||
|
MATERIALS IN OR WITH THAT PRODUCT AND BE SOLELY RESPONSIBLE FOR ANY PROBLEMS OR
|
||||||
|
FAILURES.
|
||||||
|
|
||||||
|
THE LICENSED MATERIALS AND ANY REALTED DOCUMENTATION ARE PROVIDED "AS IS" AND
|
||||||
|
WITH ALL FAULTS. TI MAKES NO WARRANTY OR REPRESENTATION, WHETHER EXPRESS,
|
||||||
|
IMPLIED OR STATUTORY, REGARDING THE LICENSED MATERIALS, INCLUDING BUT NOT
|
||||||
|
LIMITED TO, ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
|
||||||
|
PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS OF RESPONSES,
|
||||||
|
RESULTS AND LACK OF NEGLIGENCE. TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET
|
||||||
|
ENJOYMENT, QUIET POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS,
|
||||||
|
COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. YOU AGREE TO
|
||||||
|
USE YOUR INDEPENDENT JUDGMENT IN DEVELOPING YOUR PRODUCTS. NOTHING CONTAINED IN
|
||||||
|
THIS AGREEMENT WILL BE CONSTRUED AS A WARRANTY OR REPRESENTATION BY TI TO
|
||||||
|
MAINTAIN PRODUCTION OF ANY TI SEMICONDUCTOR DEVICE OR OTHER HARDWARE OR
|
||||||
|
SOFTWARE WITH WHICH THE LICENSED MATERIALS MAY BE USED.
|
||||||
|
|
||||||
|
IN NO EVENT SHALL TI, OR ANY APPLICABLE LICENSOR, BE LIABLE FOR ANY SPECIAL,
|
||||||
|
INDIRECT, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES, HOWEVER CAUSED, ON ANY
|
||||||
|
THEORY OF LIABILITY, IN CONNECTION WITH OR ARISING OUT OF THIS AGREEMENT OR THE
|
||||||
|
USE OF THE LICENSED MATERIALS, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE
|
||||||
|
POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO,
|
||||||
|
COST OF REMOVAL OR REINSTALLATION, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF
|
||||||
|
DATA, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF USE OR
|
||||||
|
INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S AGGREGATE LIABILITY UNDER THIS
|
||||||
|
AGREEMENT OR ARISING OUT OF YOUR USE OF THE LICENSED MATERIALS EXCEED FIVE
|
||||||
|
HUNDRED U.S. DOLLARS (US$500). THE EXISTENCE OF MORE THAN ONE CLAIM WILL NOT
|
||||||
|
ENLARGE OR EXTEND THESE LIMITS.
|
||||||
|
|
||||||
|
Because some jurisdictions do not allow the exclusion or limitation of
|
||||||
|
incidental or consequential damages or limitation on how long an implied
|
||||||
|
warranty lasts, the above limitations or exclusions may not apply to you.
|
||||||
|
|
||||||
|
7. Indemnification Disclaimer. YOU ACKNOWLEDGE AND AGREE THAT TI SHALL NOT BE
|
||||||
|
LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY THIRD PARTY
|
||||||
|
INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON YOUR MANUFACTURE, USE, OR
|
||||||
|
DISTRIBUTION OF THE LICENSED MATERIALS OR YOUR MANUFACTURE, USE, OFFER FOR
|
||||||
|
SALE, SALE, IMPORTATION OR DISTRIBUTION OF YOUR PRODUCTS THAT INCLUDE OR
|
||||||
|
INCORPORATE THE LICENSED MATERIALS.
|
||||||
|
|
||||||
|
You will defend and indemnify TI in the event of claim, liability or costs
|
||||||
|
(including reasonable attorney's fees related to Your use or any sub-licensee's
|
||||||
|
use of the Licensed Materials) relating in any way to Your violation of the
|
||||||
|
terms of the License Grants set forth in Section 2, or any other violation of
|
||||||
|
other terms and conditions of this Agreement.
|
||||||
|
|
||||||
|
8. No Technical Support. TI and TI's licensors are under no obligation to
|
||||||
|
install, maintain or support the Licensed Materials.
|
||||||
|
|
||||||
|
9. Notices. All notices to TI hereunder shall be delivered to Texas Instruments
|
||||||
|
Incorporated, AEC Software Operations, 12203 Southwest Freeway, Mail Station
|
||||||
|
701, Stafford, Texas 77477, Attention: Administrator, AEC Software Operations,
|
||||||
|
with a copy to Texas Instruments Incorporated, 12203 Southwest Freeway, Mail
|
||||||
|
Station 725, Stafford, Texas 77477, Attention: Legal Department. All notices
|
||||||
|
shall be deemed served when received by TI.
|
||||||
|
|
||||||
|
10. Export Control. You hereby acknowledge that the Licensed Materials are
|
||||||
|
subject to export control under the U.S. Commerce Department's Export
|
||||||
|
Administration Regulations ("EAR"). You further hereby acknowledge and agree
|
||||||
|
that unless prior authorization is obtained from the U.S. Commerce Department,
|
||||||
|
neither you nor your customers will export, re-export, or release, directly or
|
||||||
|
indirectly, any technology, software, or software source code (as defined in
|
||||||
|
Part 772 of the EAR), received from TI, or export, directly or indirectly, any
|
||||||
|
direct product of such technology, software, or software source code (as
|
||||||
|
defined in Part 734 of the EAR), to any destination or country to which the
|
||||||
|
export, re-export, or release of the technology, software, or software source
|
||||||
|
code, or direct product is prohibited by the EAR. You agree that none of the
|
||||||
|
Licensed Materials may be downloaded or otherwise exported or reexported (i)
|
||||||
|
into (or to a national or resident of) Cuba, Iran, North Korea, Sudan and Syria
|
||||||
|
or any other country the U.S. has embargoed goods; or (ii) to anyone on the
|
||||||
|
U.S. Treasury Department's List of Specially Designated Nationals or the U.S.
|
||||||
|
Commerce Department's Denied Persons List or Entity List. You represent and
|
||||||
|
warrant that you are not located in, under the control of, or a national or
|
||||||
|
resident of any such country or on any such list and you will not use or
|
||||||
|
transfer the Licensed Materials for use in any sensitive nuclear, chemical or
|
||||||
|
biological weapons, or missile technology end-uses unless authorized by the
|
||||||
|
U.S. Government by regulation or specific license or for a military end-use in,
|
||||||
|
or by any military entity of Albania, Armenia, Azerbaijan, Belarus, Cambodia,
|
||||||
|
China, Georgia, Iran, Iraq, Kazakhstan, Kyrgyzstan, Laos, Libya, Macau,
|
||||||
|
Moldova, Mongolia, Russia, Tajikistan, Turkmenistan, Ukraine, Uzbekistan, and
|
||||||
|
Vietnam. Any software export classification made by TI shall be for TI's
|
||||||
|
internal use only and shall not be construed as a representation or warranty
|
||||||
|
regarding the proper export classification for such software or whether an
|
||||||
|
export license or other documentation is required for the exportation of such
|
||||||
|
software.
|
||||||
|
|
||||||
|
11. Governing Law and Severability. This Agreement will be governed by and
|
||||||
|
interpreted in accordance with the laws of the State of Texas, without
|
||||||
|
reference to conflict of laws principles. If for any reason a court of
|
||||||
|
competent jurisdiction finds any provision of the Agreement to be
|
||||||
|
unenforceable, that provision will be enforced to the maximum extent possible
|
||||||
|
to effectuate the intent of the parties, and the remainder of the Agreement
|
||||||
|
shall continue in full force and effect. This Agreement shall not be governed
|
||||||
|
by the United Nations Convention on Contracts for the International Sale of
|
||||||
|
Goods, or by the Uniform Computer Information Transactions Act (UCITA), as it
|
||||||
|
may be enacted in the State of Texas. The parties agree that non-exclusive
|
||||||
|
jurisdiction for any dispute arising out of or relating to this Agreement lies
|
||||||
|
within the courts located in the State of Texas. Notwithstanding the foregoing,
|
||||||
|
any judgment may be enforced in any United States or foreign court, and either
|
||||||
|
party may seek injunctive relief in any United States or foreign court.
|
||||||
|
|
||||||
|
12. PRC Provisions. If you are located in the People's Republic of China
|
||||||
|
("PRC") or if the Licensed Materials will be sent to the PRC, the following
|
||||||
|
provisions shall apply and shall supersede any other provisions in this
|
||||||
|
Agreement concerning the same subject matter as the following provisions:
|
||||||
|
|
||||||
|
a. Registration Requirements. You shall be solely responsible for performing
|
||||||
|
all acts and obtaining all approvals that may be required in connection with
|
||||||
|
this Agreement by the government of the PRC, including but not limited to
|
||||||
|
registering pursuant to, and otherwise complying with, the PRC Measures on the
|
||||||
|
Administration of Software Products, Management Regulations on Technology
|
||||||
|
Import-Export, and Technology Import and Export Contract Registration
|
||||||
|
Management Rules. Upon receipt of such approvals from the government
|
||||||
|
authorities, you shall forward evidence of all such approvals to TI for its
|
||||||
|
records. In the event that you fail to obtain any such approval or
|
||||||
|
registration, you shall be solely responsible for any and all losses, damages
|
||||||
|
or costs resulting therefrom, and shall indemnify TI for all such losses,
|
||||||
|
damages or costs.
|
||||||
|
|
||||||
|
b. Governing Language. This Agreement is written and executed in the English
|
||||||
|
language. If a translation of this Agreement is required for any purpose,
|
||||||
|
including but not limited to registration of the Agreement pursuant to any
|
||||||
|
governmental laws, regulations or rules, you shall be solely responsible for
|
||||||
|
creating such translation. Any translation of this Agreement into a language
|
||||||
|
other than English is intended solely in order to comply with such laws or for
|
||||||
|
reference purposes, and the English language version shall be authoritative and
|
||||||
|
controlling.
|
||||||
|
|
||||||
|
c. Export Control.
|
||||||
|
|
||||||
|
(i). Diversions of Technology. You hereby agree that unless prior authorization
|
||||||
|
is obtained from the U.S. Department of Commerce, neither you nor your
|
||||||
|
subsidiaries or affiliates shall knowingly export, re-export, or release,
|
||||||
|
directly or indirectly, any technology, software, or software source code (as
|
||||||
|
defined in Part 772 of the Export Administration Regulations of the U.S.
|
||||||
|
Department of Commerce ("EAR")), received from TI or any of its affiliated
|
||||||
|
companies, or export, directly or indirectly, any direct product of such
|
||||||
|
technology, software, or software source code (as defined in Part 734 of the
|
||||||
|
EAR), to any destination or country to which the export, re-export, or release
|
||||||
|
of the technology, software, software source code, or direct product is
|
||||||
|
prohibited by the EAR.
|
||||||
|
|
||||||
|
(ii). Assurance of Compliance. You understand and acknowledge that products,
|
||||||
|
technology (regardless of the form in which it is provided), software or
|
||||||
|
software source code, received from TI or any of its affiliates under this
|
||||||
|
Agreement may be under export control of the United States or other countries.
|
||||||
|
You shall comply with the United States and other applicable non-U.S. laws and
|
||||||
|
regulations governing the export, re-export and release of any products,
|
||||||
|
technology, software, or software source code received under this Agreement
|
||||||
|
from TI or its affiliates. You shall not undertake any action that is
|
||||||
|
prohibited by the EAR. Without limiting the generality of the foregoing, you
|
||||||
|
specifically agree that you shall not transfer or release products, technology,
|
||||||
|
software, or software source code of TI or its affiliates to, or for use by,
|
||||||
|
military end users or for use in military, missile, nuclear, biological, or
|
||||||
|
chemical weapons end uses.
|
||||||
|
|
||||||
|
(iii). Licenses. Each party shall secure at its own expense, such licenses and
|
||||||
|
export and import documents as are necessary for each respective party to
|
||||||
|
fulfill its obligations under this Agreement. If such licenses or government
|
||||||
|
approvals cannot be obtained, TI may terminate this Agreement, or shall
|
||||||
|
otherwise be excused from the performance of any obligations it may have under
|
||||||
|
this Agreement for which the licenses or government approvals are required.
|
||||||
|
|
||||||
|
13. Entire Agreement. This is the entire Agreement between you and TI, and
|
||||||
|
absent a signed and effective software license agreement related to the subject
|
||||||
|
matter of this Agreement, this Agreement supersedes any prior agreement between
|
||||||
|
the parties related to the subject matter of this Agreement. Notwithstanding
|
||||||
|
the foregoing, any signed and effective software license agreement relating to
|
||||||
|
the subject matter hereof will supersede the terms of this Agreement. No
|
||||||
|
amendment or modification of this Agreement will be effective unless in writing
|
||||||
|
and signed by a duly authorized representative of TI. You hereby warrant and
|
||||||
|
represent that you have obtained all authorizations and other applicable
|
||||||
|
consents required empowering you to enter into this Agreement.
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,258 @@
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// adc.h - ADC headers for using the ADC driver functions.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2005-2011 Texas Instruments Incorporated. All rights reserved.
|
||||||
|
// Software License Agreement
|
||||||
|
//
|
||||||
|
// Texas Instruments (TI) is supplying this software for use solely and
|
||||||
|
// exclusively on TI's microcontroller products. The software is owned by
|
||||||
|
// TI and/or its suppliers, and is protected under applicable copyright
|
||||||
|
// laws. You may not combine this software with "viral" open-source
|
||||||
|
// software in order to form a larger program.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||||
|
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||||
|
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||||
|
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||||
|
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
//
|
||||||
|
// This is part of revision 6852 of the Stellaris Peripheral Driver Library.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#ifndef __ADC_H__
|
||||||
|
#define __ADC_H__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to ADCSequenceConfigure as the ulTrigger
|
||||||
|
// parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define ADC_TRIGGER_PROCESSOR 0x00000000 // Processor event
|
||||||
|
#define ADC_TRIGGER_COMP0 0x00000001 // Analog comparator 0 event
|
||||||
|
#define ADC_TRIGGER_COMP1 0x00000002 // Analog comparator 1 event
|
||||||
|
#define ADC_TRIGGER_COMP2 0x00000003 // Analog comparator 2 event
|
||||||
|
#define ADC_TRIGGER_EXTERNAL 0x00000004 // External event
|
||||||
|
#define ADC_TRIGGER_TIMER 0x00000005 // Timer event
|
||||||
|
#define ADC_TRIGGER_PWM0 0x00000006 // PWM0 event
|
||||||
|
#define ADC_TRIGGER_PWM1 0x00000007 // PWM1 event
|
||||||
|
#define ADC_TRIGGER_PWM2 0x00000008 // PWM2 event
|
||||||
|
#define ADC_TRIGGER_PWM3 0x00000009 // PWM3 event
|
||||||
|
#define ADC_TRIGGER_ALWAYS 0x0000000F // Always event
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to ADCSequenceStepConfigure as the ulConfig
|
||||||
|
// parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define ADC_CTL_TS 0x00000080 // Temperature sensor select
|
||||||
|
#define ADC_CTL_IE 0x00000040 // Interrupt enable
|
||||||
|
#define ADC_CTL_END 0x00000020 // Sequence end select
|
||||||
|
#define ADC_CTL_D 0x00000010 // Differential select
|
||||||
|
#define ADC_CTL_CH0 0x00000000 // Input channel 0
|
||||||
|
#define ADC_CTL_CH1 0x00000001 // Input channel 1
|
||||||
|
#define ADC_CTL_CH2 0x00000002 // Input channel 2
|
||||||
|
#define ADC_CTL_CH3 0x00000003 // Input channel 3
|
||||||
|
#define ADC_CTL_CH4 0x00000004 // Input channel 4
|
||||||
|
#define ADC_CTL_CH5 0x00000005 // Input channel 5
|
||||||
|
#define ADC_CTL_CH6 0x00000006 // Input channel 6
|
||||||
|
#define ADC_CTL_CH7 0x00000007 // Input channel 7
|
||||||
|
#define ADC_CTL_CH8 0x00000008 // Input channel 8
|
||||||
|
#define ADC_CTL_CH9 0x00000009 // Input channel 9
|
||||||
|
#define ADC_CTL_CH10 0x0000000A // Input channel 10
|
||||||
|
#define ADC_CTL_CH11 0x0000000B // Input channel 11
|
||||||
|
#define ADC_CTL_CH12 0x0000000C // Input channel 12
|
||||||
|
#define ADC_CTL_CH13 0x0000000D // Input channel 13
|
||||||
|
#define ADC_CTL_CH14 0x0000000E // Input channel 14
|
||||||
|
#define ADC_CTL_CH15 0x0000000F // Input channel 15
|
||||||
|
#define ADC_CTL_CMP0 0x00080000 // Select Comparator 0
|
||||||
|
#define ADC_CTL_CMP1 0x00090000 // Select Comparator 1
|
||||||
|
#define ADC_CTL_CMP2 0x000A0000 // Select Comparator 2
|
||||||
|
#define ADC_CTL_CMP3 0x000B0000 // Select Comparator 3
|
||||||
|
#define ADC_CTL_CMP4 0x000C0000 // Select Comparator 4
|
||||||
|
#define ADC_CTL_CMP5 0x000D0000 // Select Comparator 5
|
||||||
|
#define ADC_CTL_CMP6 0x000E0000 // Select Comparator 6
|
||||||
|
#define ADC_CTL_CMP7 0x000F0000 // Select Comparator 7
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to ADCComparatorConfigure as part of the
|
||||||
|
// ulConfig parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define ADC_COMP_TRIG_NONE 0x00000000 // Trigger Disabled
|
||||||
|
#define ADC_COMP_TRIG_LOW_ALWAYS \
|
||||||
|
0x00001000 // Trigger Low Always
|
||||||
|
#define ADC_COMP_TRIG_LOW_ONCE 0x00001100 // Trigger Low Once
|
||||||
|
#define ADC_COMP_TRIG_LOW_HALWAYS \
|
||||||
|
0x00001200 // Trigger Low Always (Hysteresis)
|
||||||
|
#define ADC_COMP_TRIG_LOW_HONCE 0x00001300 // Trigger Low Once (Hysteresis)
|
||||||
|
#define ADC_COMP_TRIG_MID_ALWAYS \
|
||||||
|
0x00001400 // Trigger Mid Always
|
||||||
|
#define ADC_COMP_TRIG_MID_ONCE 0x00001500 // Trigger Mid Once
|
||||||
|
#define ADC_COMP_TRIG_HIGH_ALWAYS \
|
||||||
|
0x00001C00 // Trigger High Always
|
||||||
|
#define ADC_COMP_TRIG_HIGH_ONCE 0x00001D00 // Trigger High Once
|
||||||
|
#define ADC_COMP_TRIG_HIGH_HALWAYS \
|
||||||
|
0x00001E00 // Trigger High Always (Hysteresis)
|
||||||
|
#define ADC_COMP_TRIG_HIGH_HONCE \
|
||||||
|
0x00001F00 // Trigger High Once (Hysteresis)
|
||||||
|
|
||||||
|
#define ADC_COMP_INT_NONE 0x00000000 // Interrupt Disabled
|
||||||
|
#define ADC_COMP_INT_LOW_ALWAYS \
|
||||||
|
0x00000010 // Interrupt Low Always
|
||||||
|
#define ADC_COMP_INT_LOW_ONCE 0x00000011 // Interrupt Low Once
|
||||||
|
#define ADC_COMP_INT_LOW_HALWAYS \
|
||||||
|
0x00000012 // Interrupt Low Always
|
||||||
|
// (Hysteresis)
|
||||||
|
#define ADC_COMP_INT_LOW_HONCE 0x00000013 // Interrupt Low Once (Hysteresis)
|
||||||
|
#define ADC_COMP_INT_MID_ALWAYS \
|
||||||
|
0x00000014 // Interrupt Mid Always
|
||||||
|
#define ADC_COMP_INT_MID_ONCE 0x00000015 // Interrupt Mid Once
|
||||||
|
#define ADC_COMP_INT_HIGH_ALWAYS \
|
||||||
|
0x0000001C // Interrupt High Always
|
||||||
|
#define ADC_COMP_INT_HIGH_ONCE 0x0000001D // Interrupt High Once
|
||||||
|
#define ADC_COMP_INT_HIGH_HALWAYS \
|
||||||
|
0x0000001E // Interrupt High Always
|
||||||
|
// (Hysteresis)
|
||||||
|
#define ADC_COMP_INT_HIGH_HONCE \
|
||||||
|
0x0000001F // Interrupt High Once (Hysteresis)
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be used to modify the sequence number passed to
|
||||||
|
// ADCProcessorTrigger in order to get cross-module synchronous processor
|
||||||
|
// triggers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define ADC_TRIGGER_WAIT 0x08000000 // Wait for the synchronous trigger
|
||||||
|
#define ADC_TRIGGER_SIGNAL 0x80000000 // Signal the synchronous trigger
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to ADCPhaseDelaySet as the ulPhase parameter and
|
||||||
|
// returned from ADCPhaseDelayGet.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define ADC_PHASE_0 0x00000000 // 0 degrees
|
||||||
|
#define ADC_PHASE_22_5 0x00000001 // 22.5 degrees
|
||||||
|
#define ADC_PHASE_45 0x00000002 // 45 degrees
|
||||||
|
#define ADC_PHASE_67_5 0x00000003 // 67.5 degrees
|
||||||
|
#define ADC_PHASE_90 0x00000004 // 90 degrees
|
||||||
|
#define ADC_PHASE_112_5 0x00000005 // 112.5 degrees
|
||||||
|
#define ADC_PHASE_135 0x00000006 // 135 degrees
|
||||||
|
#define ADC_PHASE_157_5 0x00000007 // 157.5 degrees
|
||||||
|
#define ADC_PHASE_180 0x00000008 // 180 degrees
|
||||||
|
#define ADC_PHASE_202_5 0x00000009 // 202.5 degrees
|
||||||
|
#define ADC_PHASE_225 0x0000000A // 225 degrees
|
||||||
|
#define ADC_PHASE_247_5 0x0000000B // 247.5 degrees
|
||||||
|
#define ADC_PHASE_270 0x0000000C // 270 degrees
|
||||||
|
#define ADC_PHASE_292_5 0x0000000D // 292.5 degrees
|
||||||
|
#define ADC_PHASE_315 0x0000000E // 315 degrees
|
||||||
|
#define ADC_PHASE_337_5 0x0000000F // 337.5 degrees
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to ADCReferenceSet as the ulRef parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define ADC_REF_INT 0x00000000 // Internal reference
|
||||||
|
#define ADC_REF_EXT_3V 0x00000001 // External 3V reference
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void ADCIntRegister(unsigned long ulBase, unsigned long ulSequenceNum,
|
||||||
|
void (*pfnHandler)(void));
|
||||||
|
extern void ADCIntUnregister(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern void ADCIntDisable(unsigned long ulBase, unsigned long ulSequenceNum);
|
||||||
|
extern void ADCIntEnable(unsigned long ulBase, unsigned long ulSequenceNum);
|
||||||
|
extern unsigned long ADCIntStatus(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum,
|
||||||
|
tBoolean bMasked);
|
||||||
|
extern void ADCIntClear(unsigned long ulBase, unsigned long ulSequenceNum);
|
||||||
|
extern void ADCSequenceEnable(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern void ADCSequenceDisable(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern void ADCSequenceConfigure(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum,
|
||||||
|
unsigned long ulTrigger,
|
||||||
|
unsigned long ulPriority);
|
||||||
|
extern void ADCSequenceStepConfigure(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum,
|
||||||
|
unsigned long ulStep,
|
||||||
|
unsigned long ulConfig);
|
||||||
|
extern long ADCSequenceOverflow(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern void ADCSequenceOverflowClear(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern long ADCSequenceUnderflow(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern void ADCSequenceUnderflowClear(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern long ADCSequenceDataGet(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum,
|
||||||
|
unsigned long *pulBuffer);
|
||||||
|
extern void ADCProcessorTrigger(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern void ADCSoftwareOversampleConfigure(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum,
|
||||||
|
unsigned long ulFactor);
|
||||||
|
extern void ADCSoftwareOversampleStepConfigure(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum,
|
||||||
|
unsigned long ulStep,
|
||||||
|
unsigned long ulConfig);
|
||||||
|
extern void ADCSoftwareOversampleDataGet(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum,
|
||||||
|
unsigned long *pulBuffer,
|
||||||
|
unsigned long ulCount);
|
||||||
|
extern void ADCHardwareOversampleConfigure(unsigned long ulBase,
|
||||||
|
unsigned long ulFactor);
|
||||||
|
extern void ADCComparatorConfigure(unsigned long ulBase, unsigned long ulComp,
|
||||||
|
unsigned long ulConfig);
|
||||||
|
extern void ADCComparatorRegionSet(unsigned long ulBase, unsigned long ulComp,
|
||||||
|
unsigned long ulLowRef,
|
||||||
|
unsigned long ulHighRef);
|
||||||
|
extern void ADCComparatorReset(unsigned long ulBase, unsigned long ulComp,
|
||||||
|
tBoolean bTrigger, tBoolean bInterrupt);
|
||||||
|
extern void ADCComparatorIntDisable(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern void ADCComparatorIntEnable(unsigned long ulBase,
|
||||||
|
unsigned long ulSequenceNum);
|
||||||
|
extern unsigned long ADCComparatorIntStatus(unsigned long ulBase);
|
||||||
|
extern void ADCComparatorIntClear(unsigned long ulBase,
|
||||||
|
unsigned long ulStatus);
|
||||||
|
extern void ADCReferenceSet(unsigned long ulBase, unsigned long ulRef);
|
||||||
|
extern unsigned long ADCReferenceGet(unsigned long ulBase);
|
||||||
|
extern void ADCPhaseDelaySet(unsigned long ulBase, unsigned long ulPhase);
|
||||||
|
extern unsigned long ADCPhaseDelayGet(unsigned long ulBase);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __ADC_H__
|
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