From e669c91547d358767781295f3e30f4deedf3f163 Mon Sep 17 00:00:00 2001 From: Frank Voorburg Date: Fri, 21 Oct 2016 22:29:25 +0000 Subject: [PATCH] Refs #123. - Upgraded the XMClib to 2.1.8 in the XMC4700 Relax Kit demo programs. git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@164 5dc33758-31d5-4daf-9ae8-b24bf3d40d73 --- .../Boot/bin/openblt_xmc4700.elf | Bin 890024 -> 893128 bytes .../Boot/bin/openblt_xmc4700.map | 2289 +++++++++++------ .../Boot/bin/openblt_xmc4700.srec | 610 +++-- .../Boot/ide/xmc4700.depend | 234 +- .../Boot/ide/xmc4700.ebp | 52 + .../Boot/ide/xmc4700.elay | 94 +- .../Boot/lib/XMC4700.h | 303 +-- .../Boot/lib/cmsis/cmsis_gcc.h | 566 ++-- .../Boot/lib/cmsis/core_cm4.h | 536 ++-- .../Boot/lib/cmsis/core_cmFunc.h | 43 +- .../Boot/lib/cmsis/core_cmInstr.h | 41 +- .../Boot/lib/cmsis/core_cmSimd.h | 46 +- .../Boot/lib/system_XMC4700.c | 128 +- .../Boot/lib/system_XMC4700.h | 65 +- .../Boot/lib/xmclib/inc/xmc4_ccu4_map.h | 110 +- .../Boot/lib/xmclib/inc/xmc4_ccu8_map.h | 60 +- .../Boot/lib/xmclib/inc/xmc4_eru_map.h | 97 +- .../Boot/lib/xmclib/inc/xmc4_flash.h | 29 +- .../Boot/lib/xmclib/inc/xmc4_gpio.h | 6 +- .../Boot/lib/xmclib/inc/xmc4_gpio_map.h | 1231 ++++++--- .../Boot/lib/xmclib/inc/xmc4_rtc.h | 6 +- .../Boot/lib/xmclib/inc/xmc4_scu.h | 987 ++++++- .../Boot/lib/xmclib/inc/xmc4_usic_map.h | 95 +- .../Boot/lib/xmclib/inc/xmc_acmp.h | 424 +++ .../Boot/lib/xmclib/inc/xmc_bccu.h | 1976 ++++++++++++++ .../Boot/lib/xmclib/inc/xmc_can.h | 31 +- .../Boot/lib/xmclib/inc/xmc_can_map.h | 22 +- .../Boot/lib/xmclib/inc/xmc_ccu4.h | 38 +- .../Boot/lib/xmclib/inc/xmc_ccu8.h | 36 +- .../Boot/lib/xmclib/inc/xmc_common.h | 72 +- .../Boot/lib/xmclib/inc/xmc_dac.h | 6 +- .../Boot/lib/xmclib/inc/xmc_device.h | 201 +- .../Boot/lib/xmclib/inc/xmc_dma.h | 6 +- .../Boot/lib/xmclib/inc/xmc_dma_map.h | 6 +- .../Boot/lib/xmclib/inc/xmc_dsd.h | 6 +- .../Boot/lib/xmclib/inc/xmc_ebu.h | 24 +- .../Boot/lib/xmclib/inc/xmc_ecat.h | 462 ++++ .../Boot/lib/xmclib/inc/xmc_ecat_map.h | 287 +++ .../Boot/lib/xmclib/inc/xmc_eru.h | 23 +- .../Boot/lib/xmclib/inc/xmc_eth_mac.h | 129 +- .../Boot/lib/xmclib/inc/xmc_eth_mac_map.h | 6 +- .../Boot/lib/xmclib/inc/xmc_eth_phy.h | 52 +- .../Boot/lib/xmclib/inc/xmc_fce.h | 6 +- .../Boot/lib/xmclib/inc/xmc_flash.h | 10 +- .../Boot/lib/xmclib/inc/xmc_gpio.h | 6 +- .../Boot/lib/xmclib/inc/xmc_hrpwm.h | 6 +- .../Boot/lib/xmclib/inc/xmc_hrpwm_map.h | 6 +- .../Boot/lib/xmclib/inc/xmc_i2c.h | 74 +- .../Boot/lib/xmclib/inc/xmc_i2s.h | 84 +- .../Boot/lib/xmclib/inc/xmc_ledts.h | 6 +- .../Boot/lib/xmclib/inc/xmc_math.h | 1088 ++++++++ .../Boot/lib/xmclib/inc/xmc_pau.h | 396 +++ .../Boot/lib/xmclib/inc/xmc_posif.h | 20 +- .../Boot/lib/xmclib/inc/xmc_prng.h | 285 ++ .../Boot/lib/xmclib/inc/xmc_rtc.h | 44 +- .../Boot/lib/xmclib/inc/xmc_scu.h | 20 +- .../Boot/lib/xmclib/inc/xmc_sdmmc.h | 149 +- .../Boot/lib/xmclib/inc/xmc_spi.h | 100 +- .../Boot/lib/xmclib/inc/xmc_uart.h | 47 +- .../Boot/lib/xmclib/inc/xmc_usbd.h | 6 +- .../Boot/lib/xmclib/inc/xmc_usbd_regs.h | 6 +- .../Boot/lib/xmclib/inc/xmc_usbh.h | 416 +++ .../Boot/lib/xmclib/inc/xmc_usic.h | 46 +- .../Boot/lib/xmclib/inc/xmc_vadc.h | 418 ++- .../Boot/lib/xmclib/inc/xmc_vadc_map.h | 370 +-- .../Boot/lib/xmclib/inc/xmc_wdt.h | 6 +- .../Boot/lib/xmclib/src/xmc4_eru.c | 6 +- .../Boot/lib/xmclib/src/xmc4_flash.c | 113 +- .../Boot/lib/xmclib/src/xmc4_gpio.c | 6 +- .../Boot/lib/xmclib/src/xmc4_rtc.c | 11 +- .../Boot/lib/xmclib/src/xmc4_scu.c | 621 ++++- .../Boot/lib/xmclib/src/xmc_acmp.c | 119 + .../Boot/lib/xmclib/src/xmc_bccu.c | 577 +++++ .../Boot/lib/xmclib/src/xmc_can.c | 27 +- .../Boot/lib/xmclib/src/xmc_ccu4.c | 6 +- .../Boot/lib/xmclib/src/xmc_ccu8.c | 6 +- .../Boot/lib/xmclib/src/xmc_common.c | 8 +- .../Boot/lib/xmclib/src/xmc_dac.c | 6 +- .../Boot/lib/xmclib/src/xmc_dma.c | 65 +- .../Boot/lib/xmclib/src/xmc_dsd.c | 6 +- .../Boot/lib/xmclib/src/xmc_ebu.c | 6 +- .../Boot/lib/xmclib/src/xmc_ecat.c | 198 ++ .../Boot/lib/xmclib/src/xmc_eru.c | 17 +- .../Boot/lib/xmclib/src/xmc_eth_mac.c | 120 +- .../Boot/lib/xmclib/src/xmc_fce.c | 6 +- .../Boot/lib/xmclib/src/xmc_gpio.c | 6 +- .../Boot/lib/xmclib/src/xmc_hrpwm.c | 6 +- .../Boot/lib/xmclib/src/xmc_i2c.c | 6 +- .../Boot/lib/xmclib/src/xmc_i2s.c | 38 +- .../Boot/lib/xmclib/src/xmc_ledts.c | 6 +- .../Boot/lib/xmclib/src/xmc_math.c | 463 ++++ .../Boot/lib/xmclib/src/xmc_pau.c | 109 + .../Boot/lib/xmclib/src/xmc_posif.c | 6 +- .../Boot/lib/xmclib/src/xmc_prng.c | 107 + .../Boot/lib/xmclib/src/xmc_rtc.c | 47 +- .../Boot/lib/xmclib/src/xmc_sdmmc.c | 22 +- .../Boot/lib/xmclib/src/xmc_spi.c | 13 +- .../Boot/lib/xmclib/src/xmc_uart.c | 32 +- .../Boot/lib/xmclib/src/xmc_usbd.c | 6 +- .../Boot/lib/xmclib/src/xmc_usbh.c | 1487 +++++++++++ .../Boot/lib/xmclib/src/xmc_usic.c | 6 +- .../Boot/lib/xmclib/src/xmc_vadc.c | 157 +- .../Boot/lib/xmclib/src/xmc_wdt.c | 6 +- .../Prog/bin/demoprog_xmc4700.elf | Bin 769424 -> 772252 bytes .../Prog/bin/demoprog_xmc4700.map | 1845 ++++++++----- .../Prog/bin/demoprog_xmc4700.srec | 334 ++- .../Prog/ide/xmc4700.ebp | 52 + .../Prog/ide/xmc4700.elay | 49 +- .../Prog/lib/XMC4700.h | 303 +-- .../Prog/lib/cmsis/cmsis_gcc.h | 566 ++-- .../Prog/lib/cmsis/core_cm4.h | 536 ++-- .../Prog/lib/cmsis/core_cmFunc.h | 43 +- .../Prog/lib/cmsis/core_cmInstr.h | 41 +- .../Prog/lib/cmsis/core_cmSimd.h | 46 +- .../Prog/lib/system_XMC4700.c | 128 +- .../Prog/lib/system_XMC4700.h | 65 +- .../Prog/lib/xmclib/inc/xmc4_ccu4_map.h | 110 +- .../Prog/lib/xmclib/inc/xmc4_ccu8_map.h | 60 +- .../Prog/lib/xmclib/inc/xmc4_eru_map.h | 97 +- .../Prog/lib/xmclib/inc/xmc4_flash.h | 29 +- .../Prog/lib/xmclib/inc/xmc4_gpio.h | 6 +- .../Prog/lib/xmclib/inc/xmc4_gpio_map.h | 1231 ++++++--- .../Prog/lib/xmclib/inc/xmc4_rtc.h | 6 +- .../Prog/lib/xmclib/inc/xmc4_scu.h | 987 ++++++- .../Prog/lib/xmclib/inc/xmc4_usic_map.h | 95 +- .../Prog/lib/xmclib/inc/xmc_acmp.h | 424 +++ .../Prog/lib/xmclib/inc/xmc_bccu.h | 1976 ++++++++++++++ .../Prog/lib/xmclib/inc/xmc_can.h | 31 +- .../Prog/lib/xmclib/inc/xmc_can_map.h | 22 +- .../Prog/lib/xmclib/inc/xmc_ccu4.h | 38 +- .../Prog/lib/xmclib/inc/xmc_ccu8.h | 36 +- .../Prog/lib/xmclib/inc/xmc_common.h | 72 +- .../Prog/lib/xmclib/inc/xmc_dac.h | 6 +- .../Prog/lib/xmclib/inc/xmc_device.h | 201 +- .../Prog/lib/xmclib/inc/xmc_dma.h | 6 +- .../Prog/lib/xmclib/inc/xmc_dma_map.h | 6 +- .../Prog/lib/xmclib/inc/xmc_dsd.h | 6 +- .../Prog/lib/xmclib/inc/xmc_ebu.h | 24 +- .../Prog/lib/xmclib/inc/xmc_ecat.h | 462 ++++ .../Prog/lib/xmclib/inc/xmc_ecat_map.h | 287 +++ .../Prog/lib/xmclib/inc/xmc_eru.h | 23 +- .../Prog/lib/xmclib/inc/xmc_eth_mac.h | 129 +- .../Prog/lib/xmclib/inc/xmc_eth_mac_map.h | 6 +- .../Prog/lib/xmclib/inc/xmc_eth_phy.h | 52 +- .../Prog/lib/xmclib/inc/xmc_fce.h | 6 +- .../Prog/lib/xmclib/inc/xmc_flash.h | 10 +- .../Prog/lib/xmclib/inc/xmc_gpio.h | 6 +- .../Prog/lib/xmclib/inc/xmc_hrpwm.h | 6 +- .../Prog/lib/xmclib/inc/xmc_hrpwm_map.h | 6 +- .../Prog/lib/xmclib/inc/xmc_i2c.h | 74 +- .../Prog/lib/xmclib/inc/xmc_i2s.h | 84 +- .../Prog/lib/xmclib/inc/xmc_ledts.h | 6 +- .../Prog/lib/xmclib/inc/xmc_math.h | 1088 ++++++++ .../Prog/lib/xmclib/inc/xmc_pau.h | 396 +++ .../Prog/lib/xmclib/inc/xmc_posif.h | 20 +- .../Prog/lib/xmclib/inc/xmc_prng.h | 285 ++ .../Prog/lib/xmclib/inc/xmc_rtc.h | 44 +- .../Prog/lib/xmclib/inc/xmc_scu.h | 20 +- .../Prog/lib/xmclib/inc/xmc_sdmmc.h | 149 +- .../Prog/lib/xmclib/inc/xmc_spi.h | 100 +- .../Prog/lib/xmclib/inc/xmc_uart.h | 47 +- .../Prog/lib/xmclib/inc/xmc_usbd.h | 6 +- .../Prog/lib/xmclib/inc/xmc_usbd_regs.h | 6 +- .../Prog/lib/xmclib/inc/xmc_usbh.h | 416 +++ .../Prog/lib/xmclib/inc/xmc_usic.h | 46 +- .../Prog/lib/xmclib/inc/xmc_vadc.h | 418 ++- .../Prog/lib/xmclib/inc/xmc_vadc_map.h | 370 +-- .../Prog/lib/xmclib/inc/xmc_wdt.h | 6 +- .../Prog/lib/xmclib/src/xmc4_eru.c | 6 +- .../Prog/lib/xmclib/src/xmc4_flash.c | 113 +- .../Prog/lib/xmclib/src/xmc4_gpio.c | 6 +- .../Prog/lib/xmclib/src/xmc4_rtc.c | 11 +- .../Prog/lib/xmclib/src/xmc4_scu.c | 621 ++++- .../Prog/lib/xmclib/src/xmc_acmp.c | 119 + .../Prog/lib/xmclib/src/xmc_bccu.c | 577 +++++ .../Prog/lib/xmclib/src/xmc_can.c | 27 +- .../Prog/lib/xmclib/src/xmc_ccu4.c | 6 +- .../Prog/lib/xmclib/src/xmc_ccu8.c | 6 +- .../Prog/lib/xmclib/src/xmc_common.c | 8 +- .../Prog/lib/xmclib/src/xmc_dac.c | 6 +- .../Prog/lib/xmclib/src/xmc_dma.c | 65 +- .../Prog/lib/xmclib/src/xmc_dsd.c | 6 +- .../Prog/lib/xmclib/src/xmc_ebu.c | 6 +- .../Prog/lib/xmclib/src/xmc_ecat.c | 198 ++ .../Prog/lib/xmclib/src/xmc_eru.c | 17 +- .../Prog/lib/xmclib/src/xmc_eth_mac.c | 120 +- .../Prog/lib/xmclib/src/xmc_fce.c | 6 +- .../Prog/lib/xmclib/src/xmc_gpio.c | 6 +- .../Prog/lib/xmclib/src/xmc_hrpwm.c | 6 +- .../Prog/lib/xmclib/src/xmc_i2c.c | 6 +- .../Prog/lib/xmclib/src/xmc_i2s.c | 38 +- .../Prog/lib/xmclib/src/xmc_ledts.c | 6 +- .../Prog/lib/xmclib/src/xmc_math.c | 463 ++++ .../Prog/lib/xmclib/src/xmc_pau.c | 109 + .../Prog/lib/xmclib/src/xmc_posif.c | 6 +- .../Prog/lib/xmclib/src/xmc_prng.c | 107 + .../Prog/lib/xmclib/src/xmc_rtc.c | 47 +- .../Prog/lib/xmclib/src/xmc_sdmmc.c | 22 +- .../Prog/lib/xmclib/src/xmc_spi.c | 13 +- .../Prog/lib/xmclib/src/xmc_uart.c | 32 +- .../Prog/lib/xmclib/src/xmc_usbd.c | 6 +- .../Prog/lib/xmclib/src/xmc_usbh.c | 1487 +++++++++++ .../Prog/lib/xmclib/src/xmc_usic.c | 6 +- .../Prog/lib/xmclib/src/xmc_vadc.c | 157 +- .../Prog/lib/xmclib/src/xmc_wdt.c | 6 +- 205 files changed, 31428 insertions(+), 6567 deletions(-) create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_acmp.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_bccu.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat_map.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_math.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_pau.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_prng.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbh.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_acmp.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_bccu.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ecat.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_math.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_pau.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_prng.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbh.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_acmp.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_bccu.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_ecat.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_ecat_map.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_math.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_pau.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_prng.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/inc/xmc_usbh.h create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/src/xmc_acmp.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/src/xmc_bccu.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/src/xmc_ecat.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/src/xmc_math.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/src/xmc_pau.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/src/xmc_prng.c create mode 100644 Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/lib/xmclib/src/xmc_usbh.c diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/bin/openblt_xmc4700.elf b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/bin/openblt_xmc4700.elf index 74697a4a3602fef5a896d0c741bc3417d6103949..ebdea43f72a8b8f58e6123f2b1baed7110eb9ef4 100644 GIT binary patch delta 174182 zcmd44cX$+4`!{~h%DR8&+@6ja2rv7@3Q zB7+(Qtk}EAqgWAnEC|YD!G@xU*idOIlHccZ&+KNge8128yWT(ET-RjIUC({$+~>?a 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..\obj\lib\xmclib\src\xmc_dma.o event_handler_list 0x80 ..\obj\lib\xmclib\src\xmc4_scu.o +is_nack 0xe ..\obj\lib\xmclib\src\xmc_usbh.o usbd_init 0x4 ..\obj\lib\xmclib\src\xmc_usbd.o xmc_device 0x208 ..\obj\lib\xmclib\src\xmc_usbd.o @@ -147,17 +149,17 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\led.o .debug_macro 0x00000000 0x10 ..\obj\led.o .debug_macro 0x00000000 0x35 ..\obj\led.o - .debug_macro 0x00000000 0x162 ..\obj\led.o + .debug_macro 0x00000000 0x16e ..\obj\led.o .debug_macro 0x00000000 0x2d ..\obj\led.o .debug_macro 0x00000000 0x3b ..\obj\led.o .debug_macro 0x00000000 0x50 ..\obj\led.o .debug_macro 0x00000000 0xe66 ..\obj\led.o .debug_macro 0x00000000 0x16 ..\obj\led.o - .debug_macro 0x00000000 0x166f2 ..\obj\led.o - .debug_macro 0x00000000 0x12 ..\obj\led.o + .debug_macro 0x00000000 0x165d5 ..\obj\led.o + .debug_macro 0x00000000 0x19 ..\obj\led.o .debug_macro 0x00000000 0x4c ..\obj\led.o .debug_macro 0x00000000 0x22 ..\obj\led.o - .debug_macro 0x00000000 0xd4d ..\obj\led.o + .debug_macro 0x00000000 0xdc4 ..\obj\led.o .debug_macro 0x00000000 0xba ..\obj\led.o .group 0x00000000 0x8 ..\obj\lib\system_xmc4700.o .group 0x00000000 0x8 ..\obj\lib\system_xmc4700.o @@ -207,7 +209,7 @@ Discarded input sections .debug_macro 0x00000000 0x50 ..\obj\lib\system_xmc4700.o .debug_macro 0x00000000 0xe66 ..\obj\lib\system_xmc4700.o .debug_macro 0x00000000 0x16 ..\obj\lib\system_xmc4700.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\system_xmc4700.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\system_xmc4700.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_eru.o @@ -283,14 +285,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_eru.o @@ -303,9 +305,9 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x2a1 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_line 0x00000000 0x45b ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_str 0x00000000 0x778d2 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_str 0x00000000 0x7730b ..\obj\lib\xmclib\src\xmc4_eru.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc4_eru.o .debug_frame 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_eru.o .ARM.attributes @@ -369,21 +371,21 @@ Discarded input sections .text.XMC_FLASH_lRepairPhysicalSectorCommand 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_ErasePhysicalSector - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_RepairPhysicalSector 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_EraseUCB - 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_Reset 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_InstallProtection - 0x00000000 0x60 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_ConfirmProtection - 0x00000000 0x54 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x64 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_VerifyReadProtection - 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_VerifyWriteProtection - 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x6c ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_ResumeProtection 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_flash.o .rodata.str1.4 @@ -408,14 +410,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_flash.o @@ -492,14 +494,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_gpio.o @@ -511,7 +513,7 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0xd4d ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0xdc4 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0xba ..\obj\lib\xmclib\src\xmc4_gpio.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_rtc.o @@ -579,10 +581,10 @@ Discarded input sections .text.XMC_RTC_DisableEvent 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_rtc.o .text.XMC_RTC_ClearEvent - 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_info 0x00000000 0x6f6 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_abbrev 0x00000000 0x1da ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_loc 0x00000000 0x9a ..\obj\lib\xmclib\src\xmc4_rtc.o + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_info 0x00000000 0x6f4 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_abbrev 0x00000000 0x1e9 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_loc 0x00000000 0x79 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_aranges 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_ranges 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_rtc.o @@ -607,14 +609,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_rtc.o @@ -636,9 +638,9 @@ Discarded input sections .debug_macro 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0xd7 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_line 0x00000000 0x5d1 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_str 0x00000000 0x76d0a ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_str 0x00000000 0x76743 ..\obj\lib\xmclib\src\xmc4_rtc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_frame 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc4_rtc.o .ARM.attributes @@ -696,7 +698,7 @@ Discarded input sections .text.XMC_SCU_INTERUPT_GetEventStatus 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_INTERRUPT_ClearEventStatus - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_GetBootMode 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_SetBootMode @@ -706,9 +708,9 @@ Discarded input sections .text.XMC_SCU_WriteGPR 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_EnableOutOfRangeComparator - 0x00000000 0x3c ..\obj\lib\xmclib\src\xmc4_scu.o - .text.XMC_SCU_DisableOutOfRangeComparator 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_DisableOutOfRangeComparator + 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CalibrateTemperatureSensor 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_EnableTemperatureSensor @@ -719,7 +721,7 @@ Discarded input sections 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_IsTemperatureSensorReady 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .text.XMC_SCU_GetTemperature + .text.XMC_SCU_GetTemperatureMeasurement 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_IsTemperatureSensorBusy 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o @@ -728,7 +730,7 @@ Discarded input sections .text.XMC_SCU_WriteToRetentionMemory 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_ReadFromRetentionMemory - 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_Enable 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_Disable @@ -736,9 +738,9 @@ Discarded input sections .text.XMC_SCU_TRAP_GetStatus 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_Trigger - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_ClearStatus - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_PARITY_ClearStatus 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_PARITY_GetStatus @@ -758,7 +760,7 @@ Discarded input sections .text.XMC_SCU_RESET_AssertPeripheralReset 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_RESET_IsPeripheralResetAsserted - 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_GetSystemPllClockFrequency @@ -814,7 +816,11 @@ Discarded input sections .text.XMC_SCU_CLOCK_GatePeripheralClock 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_IsPeripheralClockGated - 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_POWER_GetEVR13Voltage + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_POWER_GetEVR33Voltage + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableUsbPll 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableUsbPll @@ -826,29 +832,67 @@ Discarded input sections .text.XMC_SCU_CLOCK_SetBackupClockCalibrationMode 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_POWER_EnableUsb - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_POWER_DisableUsb - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_IsUsbPllLocked 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_EnableHibernateDomain - 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_DisableHibernateDomain - 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_IsHibernateDomainEnabled 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_EnableInternalSlowClock 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_DisableInternalSlowClock 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_ClearEventStatus + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_TriggerEvent + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_EnableEvent + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_DisableEvent + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_EnterHibernateState + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_EnterHibernateStateEx + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetWakeupTriggerInput + 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetPinMode + 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetPinOutputLevel + 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetInput0 + 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetSR0Input + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_IsLowPowerOscillatorStable + 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableLowPowerOscillator - 0x00000000 0x5c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x48 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableLowPowerOscillator 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableHighPerformanceOscillator - 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableHighPerformanceOscillator 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableSystemPll 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableSystemPll @@ -858,25 +902,17 @@ Discarded input sections .text.XMC_SCU_CLOCK_StepSystemPllFrequency 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_StartSystemPll - 0x00000000 0x124 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x10c ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_Init - 0x00000000 0x14c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x15c ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_IsSystemPllLocked 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_INTERRUPT_SetEventHandler 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_IRQHandler 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.clear_peripheral_gate.7785 - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.clear_peripheral_reset.7664 - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .rodata.str1.4 0x00000000 0x1d ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.set_peripheral_gate.7773 - 0x00000000 0x10 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..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x65 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_line 0x00000000 0x40a ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_str 0x00000000 0x753d1 ..\obj\lib\xmclib\src\xmc_bccu.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_bccu.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_bccu.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_can.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_can.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_can.o @@ -988,7 +1202,7 @@ Discarded input sections .text.XMC_CAN_MO_UpdateData 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_can.o .text.XMC_CAN_MO_Config - 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_can.o + 0x00000000 0x94 ..\obj\lib\xmclib\src\xmc_can.o .text.XMC_CAN_MO_Transmit 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc_can.o .text.XMC_CAN_MO_ReceiveData @@ -1011,9 +1225,9 @@ Discarded input sections 0x00000000 0x5c ..\obj\lib\xmclib\src\xmc_can.o .rodata.str1.4 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_can.o - .debug_info 0x00000000 0x13f7 ..\obj\lib\xmclib\src\xmc_can.o - .debug_abbrev 0x00000000 0x3a3 ..\obj\lib\xmclib\src\xmc_can.o - .debug_loc 0x00000000 0xcfa ..\obj\lib\xmclib\src\xmc_can.o + .debug_info 0x00000000 0x1448 ..\obj\lib\xmclib\src\xmc_can.o + .debug_abbrev 0x00000000 0x3a4 ..\obj\lib\xmclib\src\xmc_can.o + .debug_loc 0x00000000 0xd21 ..\obj\lib\xmclib\src\xmc_can.o .debug_aranges 0x00000000 0xd8 ..\obj\lib\xmclib\src\xmc_can.o .debug_ranges 0x00000000 0xe0 ..\obj\lib\xmclib\src\xmc_can.o @@ -1038,14 +1252,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_can.o @@ -1056,11 +1270,11 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x70a ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_can.o - .debug_line 0x00000000 0x77d ..\obj\lib\xmclib\src\xmc_can.o - .debug_str 0x00000000 0x7a27b ..\obj\lib\xmclib\src\xmc_can.o + .debug_line 0x00000000 0x788 ..\obj\lib\xmclib\src\xmc_can.o + .debug_str 0x00000000 0x79cd0 ..\obj\lib\xmclib\src\xmc_can.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_can.o .debug_frame 0x00000000 0x20c ..\obj\lib\xmclib\src\xmc_can.o .ARM.attributes @@ -1197,14 +1411,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ccu4.o @@ -1216,9 +1430,9 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x740 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_line 0x00000000 0xc42 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_str 0x00000000 0x79ba7 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_str 0x00000000 0x795e0 ..\obj\lib\xmclib\src\xmc_ccu4.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_frame 0x00000000 0x358 ..\obj\lib\xmclib\src\xmc_ccu4.o .ARM.attributes @@ -1276,9 +1490,9 @@ Discarded input sections .text.XMC_CCU8_SetModuleClock 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_CompareInit - 0x00000000 0x1a0 ..\obj\lib\xmclib\src\xmc_ccu8.o + 0x00000000 0x19c ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_CaptureInit - 0x00000000 0x18c ..\obj\lib\xmclib\src\xmc_ccu8.o + 0x00000000 0x188 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_SetOutPath 0x00000000 0xc8 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SetMultiChannelShadowTransferMode @@ -1323,8 +1537,8 @@ Discarded input sections 0x00000000 0xd4 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_GetLastCapturedTimerValue 0x00000000 0x114 ..\obj\lib\xmclib\src\xmc_ccu8.o - .text.XMC_CCU8_GetCapturedValueFromFifo - 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_ccu8.o + .text.XMC_CCU8_SLICE_GetCapturedValueFromFifo + 0x00000000 0xd8 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_EnableDithering 0x00000000 0x184 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_SetPrescaler @@ -1349,9 +1563,9 @@ Discarded input sections 0x00000000 0xdc ..\obj\lib\xmclib\src\xmc_ccu8.o .rodata.str1.4 0x00000000 0x3d ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_info 0x00000000 0x31f4 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_info 0x00000000 0x31d1 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_abbrev 0x00000000 0x2c8 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_loc 0x00000000 0x2df6 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_loc 0x00000000 0x2e85 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_aranges 0x00000000 0x158 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_ranges 0x00000000 0x148 ..\obj\lib\xmclib\src\xmc_ccu8.o @@ -1376,14 +1590,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ccu8.o @@ -1396,9 +1610,9 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x3e3 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_line 0x00000000 0xd89 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_str 0x00000000 0x79da3 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_line 0x00000000 0xd96 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_str 0x00000000 0x797c0 ..\obj\lib\xmclib\src\xmc_ccu8.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_frame 0x00000000 0x474 ..\obj\lib\xmclib\src\xmc_ccu8.o .ARM.attributes @@ -1461,13 +1675,13 @@ Discarded input sections .text.XMC_PRIOARRAY_Init 0x00000000 0x78 ..\obj\lib\xmclib\src\xmc_common.o .text.XMC_PRIOARRAY_Add - 0x00000000 0xb0 ..\obj\lib\xmclib\src\xmc_common.o + 0x00000000 0xb4 ..\obj\lib\xmclib\src\xmc_common.o .text.XMC_PRIOARRAY_Remove 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_common.o .rodata.str1.4 0x00000000 0x3f ..\obj\lib\xmclib\src\xmc_common.o - .debug_info 0x00000000 0x565 ..\obj\lib\xmclib\src\xmc_common.o - .debug_abbrev 0x00000000 0x187 ..\obj\lib\xmclib\src\xmc_common.o + .debug_info 0x00000000 0x569 ..\obj\lib\xmclib\src\xmc_common.o + .debug_abbrev 0x00000000 0x18a ..\obj\lib\xmclib\src\xmc_common.o .debug_loc 0x00000000 0x312 ..\obj\lib\xmclib\src\xmc_common.o .debug_aranges 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_common.o @@ -1493,14 +1707,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_common.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_common.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_common.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_common.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_common.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_common.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_common.o @@ -1511,8 +1725,8 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_common.o - .debug_line 0x00000000 0x519 ..\obj\lib\xmclib\src\xmc_common.o - .debug_str 0x00000000 0x75ac7 ..\obj\lib\xmclib\src\xmc_common.o + .debug_line 0x00000000 0x51a ..\obj\lib\xmclib\src\xmc_common.o + .debug_str 0x00000000 0x75594 ..\obj\lib\xmclib\src\xmc_common.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_common.o .debug_frame 0x00000000 0xe0 ..\obj\lib\xmclib\src\xmc_common.o .ARM.attributes @@ -1613,14 +1827,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dac.o @@ -1632,9 +1846,9 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x51 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_dac.o .debug_line 0x00000000 0x69b ..\obj\lib\xmclib\src\xmc_dac.o - .debug_str 0x00000000 0x7741a ..\obj\lib\xmclib\src\xmc_dac.o + .debug_str 0x00000000 0x76e53 ..\obj\lib\xmclib\src\xmc_dac.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_dac.o .debug_frame 0x00000000 0x168 ..\obj\lib\xmclib\src\xmc_dac.o .ARM.attributes @@ -1700,7 +1914,7 @@ Discarded input sections .text.XMC_DMA_GetOverrunStatus 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_ClearOverrunStatus - 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_Disable 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_IsEnabled @@ -1712,9 +1926,9 @@ Discarded input sections .text.XMC_DMA_CH_IsSuspended 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_EnableEvent - 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_DisableEvent - 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_ClearEventStatus 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_Init @@ -1750,10 +1964,10 @@ Discarded input sections .text.XMC_DMA_CH_ClearDestinationPeripheralRequest 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_IRQHandler - 0x00000000 0x124 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_info 0x00000000 0x18db ..\obj\lib\xmclib\src\xmc_dma.o - .debug_abbrev 0x00000000 0x30e ..\obj\lib\xmclib\src\xmc_dma.o - .debug_loc 0x00000000 0xcdd ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x120 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_info 0x00000000 0x18bc ..\obj\lib\xmclib\src\xmc_dma.o + .debug_abbrev 0x00000000 0x317 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_loc 0x00000000 0xc89 ..\obj\lib\xmclib\src\xmc_dma.o .debug_aranges 0x00000000 0x128 ..\obj\lib\xmclib\src\xmc_dma.o .debug_ranges 0x00000000 0x118 ..\obj\lib\xmclib\src\xmc_dma.o @@ -1778,14 +1992,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dma.o @@ -1798,11 +2012,11 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x3c2 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_line 0x00000000 0x820 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_str 0x00000000 0x79cc4 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_line 0x00000000 0x81d ..\obj\lib\xmclib\src\xmc_dma.o + .debug_str 0x00000000 0x796fd ..\obj\lib\xmclib\src\xmc_dma.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_dma.o - .debug_frame 0x00000000 0x2dc ..\obj\lib\xmclib\src\xmc_dma.o + .debug_frame 0x00000000 0x2d4 ..\obj\lib\xmclib\src\xmc_dma.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_dma.o COMMON 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o @@ -1908,14 +2122,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dsd.o @@ -1926,10 +2140,10 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_line 0x00000000 0x696 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_str 0x00000000 0x76fec ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_str 0x00000000 0x76a25 ..\obj\lib\xmclib\src\xmc_dsd.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_dsd.o .debug_frame 0x00000000 0x190 ..\obj\lib\xmclib\src\xmc_dsd.o .ARM.attributes @@ -1985,7 +2199,7 @@ Discarded input sections 0x00000000 0x54 ..\obj\lib\xmclib\src\xmc_ebu.o .rodata.str1.4 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_info 0x00000000 0xd27 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_info 0x00000000 0xd57 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_abbrev 0x00000000 0x21a ..\obj\lib\xmclib\src\xmc_ebu.o .debug_loc 0x00000000 0x11b ..\obj\lib\xmclib\src\xmc_ebu.o .debug_aranges @@ -2012,14 +2226,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ebu.o @@ -2030,14 +2244,103 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_line 0x00000000 0x49a ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_str 0x00000000 0x76ca6 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_str 0x00000000 0x7672e ..\obj\lib\xmclib\src\xmc_ebu.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ebu.o .debug_frame 0x00000000 0x64 ..\obj\lib\xmclib\src\xmc_ebu.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_ebu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .text 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_ecat.o + .data 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_ecat.o + .bss 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_info 0x00000000 0xa4 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_abbrev 0x00000000 0x4e ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_aranges + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x21c ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x87 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0xfd ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x5e ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x1df ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x1f ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x43 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x187 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x65 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_line 0x00000000 0x40a ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_str 0x00000000 0x753d1 ..\obj\lib\xmclib\src\xmc_ecat.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ecat.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_ecat.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eru.o @@ -2091,6 +2394,8 @@ Discarded input sections 0x00000000 0x6c ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_ETL_SetEdgeDetection 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_eru.o + .text.XMC_ERU_ETL_GetEdgeDetection + 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_ETL_SetStatusFlagMode 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_ETL_EnableOutputTrigger @@ -2102,19 +2407,19 @@ Discarded input sections .text.XMC_ERU_OGU_DisablePatternDetection 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_OGU_EnablePeripheralTrigger - 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_eru.o + 0x00000000 0x5c ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_OGU_DisablePeripheralTrigger 0x00000000 0x48 ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_OGU_SetServiceRequestMode 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_eru.o .rodata.str1.4 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eru.o - .debug_info 0x00000000 0xe3a ..\obj\lib\xmclib\src\xmc_eru.o - .debug_abbrev 0x00000000 0x1fd ..\obj\lib\xmclib\src\xmc_eru.o - .debug_loc 0x00000000 0x56a ..\obj\lib\xmclib\src\xmc_eru.o + .debug_info 0x00000000 0xeae ..\obj\lib\xmclib\src\xmc_eru.o + .debug_abbrev 0x00000000 0x219 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_loc 0x00000000 0x5b7 ..\obj\lib\xmclib\src\xmc_eru.o .debug_aranges - 0x00000000 0x80 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_ranges 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_eru.o + 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_ranges 0x00000000 0x78 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x272 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_eru.o @@ -2136,14 +2441,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eru.o @@ -2156,10 +2461,10 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x2a1 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_line 0x00000000 0x648 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_str 0x00000000 0x77eca ..\obj\lib\xmclib\src\xmc_eru.o + .debug_line 0x00000000 0x66a ..\obj\lib\xmclib\src\xmc_eru.o + .debug_str 0x00000000 0x779b4 ..\obj\lib\xmclib\src\xmc_eru.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_eru.o - .debug_frame 0x00000000 0x180 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_frame 0x00000000 0x19c ..\obj\lib\xmclib\src\xmc_eru.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eth_mac.o @@ -2211,7 +2516,7 @@ Discarded input sections .text.XMC_ETH_MAC_InitRxDescriptors 0x00000000 0x78 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_InitTxDescriptors - 0x00000000 0x74 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_SetAddressPerfectFilter 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_SetAddressHashFilter @@ -2221,13 +2526,13 @@ Discarded input sections .text.XMC_ETH_MAC_ReadFrame 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_GetRxFrameSize - 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_SetManagmentClockDivider 0x00000000 0x8c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_Enable 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_Init - 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0xac ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_Disable 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ReadPhy @@ -2243,17 +2548,15 @@ Discarded input sections .text.XMC_ETH_MAC_EnableEvent 0x00000000 0x54 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_DisableEvent - 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ClearEventStatus 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_GetEventStatus 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ReturnRxDescriptor - 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ReturnTxDescriptor - 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .text.XMC_ETH_MAC_IsTxDescriptorOwnedByDma - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_SetVLANTag 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_InitPTP @@ -2274,13 +2577,13 @@ Discarded input sections 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc_eth_mac.o .rodata.str1.4 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_info 0x00000000 0x1dd5 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_abbrev 0x00000000 0x333 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_loc 0x00000000 0xbfe ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_info 0x00000000 0x1daa ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_abbrev 0x00000000 0x315 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_loc 0x00000000 0xc37 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_aranges - 0x00000000 0x118 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_ranges 0x00000000 0x108 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x3f9 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x110 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_ranges 0x00000000 0x100 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x2e9 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_eth_mac.o @@ -2301,14 +2604,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eth_mac.o @@ -2319,15 +2622,15 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x131 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x29 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_line 0x00000000 0x8a8 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_str 0x00000000 0x78b74 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_line 0x00000000 0x8aa ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_str 0x00000000 0x785b0 ..\obj\lib\xmclib\src\xmc_eth_mac.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_frame 0x00000000 0x344 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_frame 0x00000000 0x334 ..\obj\lib\xmclib\src\xmc_eth_mac.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_eth_mac.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_fce.o @@ -2420,14 +2723,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_fce.o @@ -2439,9 +2742,9 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_fce.o .debug_line 0x00000000 0x586 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_str 0x00000000 0x7699a ..\obj\lib\xmclib\src\xmc_fce.o + .debug_str 0x00000000 0x763d3 ..\obj\lib\xmclib\src\xmc_fce.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_fce.o .debug_frame 0x00000000 0x130 ..\obj\lib\xmclib\src\xmc_fce.o .ARM.attributes @@ -2512,14 +2815,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_gpio.o @@ -2531,7 +2834,7 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0xd4d ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0xdc4 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0xba ..\obj\lib\xmclib\src\xmc_gpio.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_hrpwm.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_hrpwm.o @@ -2599,14 +2902,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_hrpwm.o @@ -2618,7 +2921,7 @@ Discarded input sections .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_line 0x00000000 0x40c ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_str 0x00000000 0x75902 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_str 0x00000000 0x753cf ..\obj\lib\xmclib\src\xmc_hrpwm.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_hrpwm.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_hrpwm.o @@ -2696,7 +2999,7 @@ Discarded input sections 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_i2c.o .text.XMC_I2C_CH_DisableEvent 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_info 0x00000000 0xc42 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_info 0x00000000 0xc43 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_abbrev 0x00000000 0x2db ..\obj\lib\xmclib\src\xmc_i2c.o .debug_loc 0x00000000 0x4a9 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_aranges @@ -2723,14 +3026,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_i2c.o @@ -2741,11 +3044,11 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x8b ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x2e ..\obj\lib\xmclib\src\xmc_i2c.o .debug_line 0x00000000 0x654 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_str 0x00000000 0x7711e ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_str 0x00000000 0x76c28 ..\obj\lib\xmclib\src\xmc_i2c.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_i2c.o .debug_frame 0x00000000 0x12c ..\obj\lib\xmclib\src\xmc_i2c.o .ARM.attributes @@ -2797,10 +3100,10 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+ .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_pau.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_pau.o + .debug_macro 0x00000000 0x65 ..\obj\lib\xmclib\src\xmc_pau.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_pau.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_pau.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_pau.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_pau.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_pau.o + .debug_line 0x00000000 0x408 ..\obj\lib\xmclib\src\xmc_pau.o + .debug_str 0x00000000 0x753cf ..\obj\lib\xmclib\src\xmc_pau.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_pau.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_pau.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_posif.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_posif.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_posif.o @@ -3046,7 +3527,7 @@ Discarded input sections .text.XMC_POSIF_Disable 0x00000000 0x48 ..\obj\lib\xmclib\src\xmc_posif.o .text.XMC_POSIF_Init - 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc_posif.o + 0x00000000 0x48 ..\obj\lib\xmclib\src\xmc_posif.o .text.XMC_POSIF_HSC_Init 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_posif.o .text.XMC_POSIF_QD_Init @@ -3086,14 +3567,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_posif.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_posif.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_posif.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_posif.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_posif.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_posif.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_posif.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_posif.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_posif.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_posif.o - .debug_macro 0x00000000 0x166f2 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0x00000000 0x76864 ..\obj\lib\xmclib\src\xmc_posif.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_posif.o .debug_frame 0x00000000 0xec ..\obj\lib\xmclib\src\xmc_posif.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_posif.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 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.debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x87 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0xfd ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x5e ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x1df ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x1f ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x43 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x187 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x65 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_line 0x00000000 0x40a ..\obj\lib\xmclib\src\xmc_prng.o + .debug_str 0x00000000 0x753d1 ..\obj\lib\xmclib\src\xmc_prng.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_prng.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_prng.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_rtc.o @@ -3175,24 +3745,28 @@ Discarded input sections 0x00000000 0xb4 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetTime 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o + .text.XMC_RTC_SetTimeStdFormat + 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetTimeStdFormat 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_SetAlarm 0x00000000 0xa4 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetAlarm 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o + .text.XMC_RTC_SetAlarmStdFormat + 0x00000000 0x64 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetAlarmStdFormat 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetEventStatus 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_rtc.o .rodata.str1.4 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_info 0x00000000 0x8e8 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_abbrev 0x00000000 0x1ec ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_loc 0x00000000 0x79 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_info 0x00000000 0x985 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_abbrev 0x00000000 0x233 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_loc 0x00000000 0xbb ..\obj\lib\xmclib\src\xmc_rtc.o .debug_aranges - 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_ranges 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_rtc.o + 0x00000000 0x78 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_ranges 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x317 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_rtc.o @@ -3214,14 +3788,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_rtc.o @@ -3232,7 +3806,7 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o @@ -3244,10 +3818,10 @@ Discarded input sections .debug_macro 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0xd7 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_line 0x00000000 0x674 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_str 0x00000000 0x76dc2 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_line 0x00000000 0x6a5 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_str 0x00000000 0x7682e ..\obj\lib\xmclib\src\xmc_rtc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_frame 0x00000000 0xd8 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_frame 0x00000000 0x110 ..\obj\lib\xmclib\src\xmc_rtc.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_sdmmc.o @@ -3310,7 +3884,7 @@ Discarded input sections .text.XMC_SDMMC_DisableEvent 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_ClearEvent - 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_sdmmc.o + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_GetEvent 0x00000000 0xa8 ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_GetR2Response @@ -3318,16 +3892,16 @@ Discarded input sections .text.XMC_SDMMC_SendCommand 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_SetDataTransferMode - 0x00000000 0x8c ..\obj\lib\xmclib\src\xmc_sdmmc.o + 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_sdmmc.o .rodata.str1.4 - 0x00000000 0x3e ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_info 0x00000000 0xe93 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_abbrev 0x00000000 0x270 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_loc 0x00000000 0x468 ..\obj\lib\xmclib\src\xmc_sdmmc.o + 0x00000000 0x1e ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_info 0x00000000 0xdbc ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_abbrev 0x00000000 0x238 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_loc 0x00000000 0x441 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_aranges 0x00000000 0x80 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_ranges 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x25f ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x260 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_sdmmc.o @@ -3348,14 +3922,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_sdmmc.o @@ -3366,10 +3940,10 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_line 0x00000000 0x644 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_str 0x00000000 0x77d76 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x47 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_line 0x00000000 0x63a ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_str 0x00000000 0x77566 ..\obj\lib\xmclib\src\xmc_sdmmc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_frame 0x00000000 0x170 ..\obj\lib\xmclib\src\xmc_sdmmc.o .ARM.attributes @@ -3466,14 +4040,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_spi.o @@ -3484,12 +4058,12 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x8e ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x91 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x2a ..\obj\lib\xmclib\src\xmc_spi.o .debug_line 0x00000000 0x580 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_str 0x00000000 0x7770d ..\obj\lib\xmclib\src\xmc_spi.o + .debug_str 0x00000000 0x77183 ..\obj\lib\xmclib\src\xmc_spi.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_spi.o .debug_frame 0x00000000 0xe4 ..\obj\lib\xmclib\src\xmc_spi.o .ARM.attributes @@ -3542,7 +4116,7 @@ Discarded input sections .text.XMC_UART_CH_SetBaudrate 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc_uart.o .text.XMC_UART_CH_Stop - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_uart.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc_uart.o .text.XMC_UART_CH_EnableEvent 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_uart.o .text.XMC_UART_CH_DisableEvent @@ -3567,14 +4141,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_uart.o @@ -3585,9 +4159,9 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x8e ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x91 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_uart.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbd.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbd.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbd.o @@ -3751,14 +4325,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbd.o @@ -3773,15 +4347,178 @@ Discarded input sections .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x29 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x2c3 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0xc5 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_line 0x00000000 0xa51 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_str 0x00000000 0x79675 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_str 0x00000000 0x790ae ..\obj\lib\xmclib\src\xmc_usbd.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_usbd.o .debug_frame 0x00000000 0x3d4 ..\obj\lib\xmclib\src\xmc_usbd.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_usbd.o COMMON 0x00000000 0x20c ..\obj\lib\xmclib\src\xmc_usbd.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbh.o + .text 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_usbh.o + .data 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_usbh.o + .bss 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_lStartTransfer + 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_GetVersion + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_GetCapabilities + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PortSuspend + 0x00000000 0x3c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PortGetState + 0x00000000 0x3c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeModify + 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeReset + 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeTransfer + 0x00000000 0xb8 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeTransferGetResult + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_GetFrameNumber + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PortVbusOnOff + 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_Initialize + 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeDelete + 0x00000000 0x54 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeCreate + 0x00000000 0xdc ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_HandleIrq + 0x00000000 0x4a8 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_GetInterruptStatus + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_Select_VBUS + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_TurnOffResumeBit + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_osDelay + 0x00000000 0x4 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeTransferAbort + 0x00000000 0xb4 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PortResume + 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PortReset + 0x00000000 0x6c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PowerControl + 0x00000000 0x168 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_Uninitialize + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_usbh.o + .data.XMC_USBH0_device + 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_usbh.o + .bss.XMC_USBH0_dfifo_ptr + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_usbh.o + .data.VBUS_pin + 0x00000000 0x4 ..\obj\lib\xmclib\src\xmc_usbh.o + .data.VBUS_port + 0x00000000 0x4 ..\obj\lib\xmclib\src\xmc_usbh.o + .rodata.xmc_usbh_driver_version + 0x00000000 0x4 ..\obj\lib\xmclib\src\xmc_usbh.o + .rodata.Driver_USBH0 + 0x00000000 0x48 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_info 0x00000000 0x2287 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_abbrev 0x00000000 0x42d ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_loc 0x00000000 0x1685 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_aranges + 0x00000000 0xd8 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_ranges 0x00000000 0xc8 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x27f ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x87 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0xfd ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x5e ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x1df ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x35 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.debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x65 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0xdc4 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0xba ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_macro 0x00000000 0x1f8 ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_line 0x00000000 0x96c ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_str 0x00000000 0x7e390 ..\obj\lib\xmclib\src\xmc_usbh.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_usbh.o + .debug_frame 0x00000000 0x248 ..\obj\lib\xmclib\src\xmc_usbh.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_usbh.o + COMMON 0x00000000 0x1ce ..\obj\lib\xmclib\src\xmc_usbh.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usic.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usic.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usic.o @@ -3862,14 +4599,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usic.o @@ -3880,9 +4617,9 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x8b ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_usic.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_vadc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_vadc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_vadc.o @@ -3961,8 +4698,10 @@ Discarded input sections .text.XMC_VADC_GROUP_SetSyncMaster 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_vadc.o .text.XMC_VADC_GROUP_CheckSlaveReadiness - 0x00000000 0x74 ..\obj\lib\xmclib\src\xmc_vadc.o + 0x00000000 0x90 ..\obj\lib\xmclib\src\xmc_vadc.o .text.XMC_VADC_GROUP_IgnoreSlaveReadiness + 0x00000000 0x90 ..\obj\lib\xmclib\src\xmc_vadc.o + .text.XMC_VADC_GROUP_SetSyncSlaveReadySignal 0x00000000 0x74 ..\obj\lib\xmclib\src\xmc_vadc.o .text.XMC_VADC_GROUP_EnableChannelSyncRequest 0x00000000 0x74 ..\obj\lib\xmclib\src\xmc_vadc.o @@ -4068,13 +4807,13 @@ Discarded input sections 0x00000000 0x3d ..\obj\lib\xmclib\src\xmc_vadc.o .rodata.g_xmc_vadc_group_array 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_info 0x00000000 0x4774 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_abbrev 0x00000000 0x32a ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_loc 0x00000000 0x2b4a ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_info 0x00000000 0x4833 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_abbrev 0x00000000 0x30c ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_loc 0x00000000 0x2bdf ..\obj\lib\xmclib\src\xmc_vadc.o .debug_aranges - 0x00000000 0x240 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_ranges 0x00000000 0x290 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x25b ..\obj\lib\xmclib\src\xmc_vadc.o + 0x00000000 0x248 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_ranges 0x00000000 0x298 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x261 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_vadc.o @@ -4095,14 +4834,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_vadc.o @@ -4113,12 +4852,12 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x66 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_line 0x00000000 0x1209 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_str 0x00000000 0x78c7b ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x74 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_line 0x00000000 0x1262 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_str 0x00000000 0x78759 ..\obj\lib\xmclib\src\xmc_vadc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_frame 0x00000000 0x790 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_frame 0x00000000 0x7ac ..\obj\lib\xmclib\src\xmc_vadc.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_vadc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_wdt.o @@ -4196,14 +4935,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_wdt.o @@ -4214,9 +4953,9 @@ Discarded input sections .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_line 0x00000000 0x45c ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_str 0x00000000 0x7677a ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_str 0x00000000 0x761b3 ..\obj\lib\xmclib\src\xmc_wdt.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_wdt.o .debug_frame 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_wdt.o .ARM.attributes @@ -4295,20 +5034,20 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\main.o .debug_macro 0x00000000 0x10 ..\obj\main.o .debug_macro 0x00000000 0x35 ..\obj\main.o - .debug_macro 0x00000000 0x162 ..\obj\main.o + .debug_macro 0x00000000 0x16e ..\obj\main.o .debug_macro 0x00000000 0x2d ..\obj\main.o .debug_macro 0x00000000 0x3b ..\obj\main.o .debug_macro 0x00000000 0x50 ..\obj\main.o .debug_macro 0x00000000 0xe66 ..\obj\main.o .debug_macro 0x00000000 0x16 ..\obj\main.o - .debug_macro 0x00000000 0x166f2 ..\obj\main.o - .debug_macro 0x00000000 0x12 ..\obj\main.o + .debug_macro 0x00000000 0x165d5 ..\obj\main.o + .debug_macro 0x00000000 0x19 ..\obj\main.o .debug_macro 0x00000000 0x4c ..\obj\main.o .debug_macro 0x00000000 0x22 ..\obj\main.o - .debug_macro 0x00000000 0xd4d ..\obj\main.o + .debug_macro 0x00000000 0xdc4 ..\obj\main.o .debug_macro 0x00000000 0xba ..\obj\main.o - .debug_macro 0x00000000 0x8e ..\obj\main.o - .debug_macro 0x00000000 0x2da ..\obj\main.o + .debug_macro 0x00000000 0x91 ..\obj\main.o + .debug_macro 0x00000000 0x2ef ..\obj\main.o .debug_macro 0x00000000 0x28 ..\obj\main.o .group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o .group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o @@ -4402,16 +5141,16 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0x10 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0x35 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_macro 0x00000000 0x162 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_macro 0x00000000 0x16e ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0x2d ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0x3b ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0x50 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0xe66 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0x16 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_macro 0x00000000 0x166f2 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_macro 0x00000000 0x12 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_macro 0x00000000 0x165d5 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_macro 0x00000000 0x19 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_macro 0x00000000 0x4c ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_macro 0x00000000 0xda ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_macro 0x00000000 0xdd ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o .group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o .group 0x00000000 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o @@ -4548,17 +5287,17 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x10 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x35 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_macro 0x00000000 0x162 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_macro 0x00000000 0x16e ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x2d ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x3b ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x50 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0xe66 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x16 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_macro 0x00000000 0x166f2 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_macro 0x00000000 0x12 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_macro 0x00000000 0x165d5 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_macro 0x00000000 0x19 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x4c ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_macro 0x00000000 0x88 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_macro 0x00000000 0x2da ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_macro 0x00000000 0x8b ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_macro 0x00000000 0x2ef ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_macro 0x00000000 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .group 0x00000000 0x8 ..\obj\~#\~#\~#\source\assert.o .group 0x00000000 0x8 ..\obj\~#\~#\~#\source\assert.o @@ -4827,7 +5566,7 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x00000000 __HEAP_SIZE = 0x0 0x00000800 __STACK_SIZE = 0x800 -.text 0x08000000 0x1cbc +.text 0x08000000 0x1c9c *(.isr_vector) .isr_vector 0x08000000 0x200 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o 0x08000000 __isr_vector @@ -4865,35 +5604,35 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x080003d8 0x8c ..\obj\lib\system_xmc4700.o 0x080003d8 SystemCoreClockUpdate .text.SystemCoreClockSetup - 0x08000464 0x1bc ..\obj\lib\system_xmc4700.o + 0x08000464 0x198 ..\obj\lib\system_xmc4700.o 0x08000464 SystemCoreClockSetup .text.SystemInit - 0x08000620 0x1c ..\obj\lib\system_xmc4700.o - 0x08000620 SystemInit + 0x080005fc 0x1c ..\obj\lib\system_xmc4700.o + 0x080005fc SystemInit .text.XMC_FLASH_lEnterPageModeCommand - 0x0800063c 0xc ..\obj\lib\xmclib\src\xmc4_flash.o - 0x0800063c XMC_FLASH_lEnterPageModeCommand + 0x08000618 0xc ..\obj\lib\xmclib\src\xmc4_flash.o + 0x08000618 XMC_FLASH_lEnterPageModeCommand .text.XMC_FLASH_lLoadPageCommand - 0x08000648 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o - 0x08000648 XMC_FLASH_lLoadPageCommand + 0x08000624 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x08000624 XMC_FLASH_lLoadPageCommand .text.XMC_FLASH_lWritePageCommand - 0x08000658 0x24 ..\obj\lib\xmclib\src\xmc4_flash.o - 0x08000658 XMC_FLASH_lWritePageCommand + 0x08000634 0x24 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x08000634 XMC_FLASH_lWritePageCommand .text.XMC_FLASH_lEraseSectorCommand - 0x0800067c 0x28 ..\obj\lib\xmclib\src\xmc4_flash.o - 0x0800067c XMC_FLASH_lEraseSectorCommand + 0x08000658 0x28 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x08000658 XMC_FLASH_lEraseSectorCommand .text.XMC_FLASH_lClearStatusCommand - 0x080006a4 0xc ..\obj\lib\xmclib\src\xmc4_flash.o - 0x080006a4 XMC_FLASH_lClearStatusCommand + 0x08000680 0xc ..\obj\lib\xmclib\src\xmc4_flash.o + 0x08000680 XMC_FLASH_lClearStatusCommand .text.XMC_FLASH_GetStatus - 0x080006b0 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o - 0x080006b0 XMC_FLASH_GetStatus + 0x0800068c 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x0800068c XMC_FLASH_GetStatus .text.XMC_FLASH_ProgramPage - 0x080006c0 0x30 ..\obj\lib\xmclib\src\xmc4_flash.o - 0x080006c0 XMC_FLASH_ProgramPage + 0x0800069c 0x40 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x0800069c XMC_FLASH_ProgramPage .text.XMC_FLASH_EraseSector - 0x080006f0 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o - 0x080006f0 XMC_FLASH_EraseSector + 0x080006dc 0x24 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x080006dc XMC_FLASH_EraseSector .text.XMC_GPIO_Init 0x08000700 0x1a0 ..\obj\lib\xmclib\src\xmc4_gpio.o 0x08000700 XMC_GPIO_Init @@ -4910,228 +5649,228 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x080008e8 0x138 ..\obj\lib\xmclib\src\xmc_gpio.o 0x080008e8 XMC_GPIO_SetMode .text.XMC_UART_CH_Init - 0x08000a20 0x68 ..\obj\lib\xmclib\src\xmc_uart.o + 0x08000a20 0x6c ..\obj\lib\xmclib\src\xmc_uart.o 0x08000a20 XMC_UART_CH_Init .text.XMC_UART_CH_Transmit - 0x08000a88 0x24 ..\obj\lib\xmclib\src\xmc_uart.o - 0x08000a88 XMC_UART_CH_Transmit + 0x08000a8c 0x24 ..\obj\lib\xmclib\src\xmc_uart.o + 0x08000a8c XMC_UART_CH_Transmit .text.XMC_UART_CH_GetReceivedData - 0x08000aac 0x18 ..\obj\lib\xmclib\src\xmc_uart.o - 0x08000aac XMC_UART_CH_GetReceivedData + 0x08000ab0 0x18 ..\obj\lib\xmclib\src\xmc_uart.o + 0x08000ab0 XMC_UART_CH_GetReceivedData .text.XMC_USIC_CH_SetBaudrate - 0x08000ac4 0x8c ..\obj\lib\xmclib\src\xmc_usic.o - 0x08000ac4 XMC_USIC_CH_SetBaudrate + 0x08000ac8 0x8c ..\obj\lib\xmclib\src\xmc_usic.o + 0x08000ac8 XMC_USIC_CH_SetBaudrate .text.XMC_USIC_CH_TXFIFO_Configure - 0x08000b50 0x30 ..\obj\lib\xmclib\src\xmc_usic.o - 0x08000b50 XMC_USIC_CH_TXFIFO_Configure + 0x08000b54 0x30 ..\obj\lib\xmclib\src\xmc_usic.o + 0x08000b54 XMC_USIC_CH_TXFIFO_Configure .text.XMC_USIC_CH_RXFIFO_Configure - 0x08000b80 0x34 ..\obj\lib\xmclib\src\xmc_usic.o - 0x08000b80 XMC_USIC_CH_RXFIFO_Configure + 0x08000b84 0x34 ..\obj\lib\xmclib\src\xmc_usic.o + 0x08000b84 XMC_USIC_CH_RXFIFO_Configure .text.XMC_USIC_Enable - 0x08000bb4 0x6c ..\obj\lib\xmclib\src\xmc_usic.o - 0x08000bb4 XMC_USIC_Enable + 0x08000bb8 0x6c ..\obj\lib\xmclib\src\xmc_usic.o + 0x08000bb8 XMC_USIC_Enable .text.XMC_USIC_CH_Enable - 0x08000c20 0xe0 ..\obj\lib\xmclib\src\xmc_usic.o - 0x08000c20 XMC_USIC_CH_Enable - .text.Init 0x08000d00 0x2c ..\obj\main.o + 0x08000c24 0xe0 ..\obj\lib\xmclib\src\xmc_usic.o + 0x08000c24 XMC_USIC_CH_Enable + .text.Init 0x08000d04 0x2c ..\obj\main.o .text.PostInit - 0x08000d2c 0x50 ..\obj\main.o - .text.main 0x08000d7c 0x14 ..\obj\main.o - 0x08000d7c main - .text.CpuInit 0x08000d90 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o - 0x08000d90 CpuInit + 0x08000d30 0x50 ..\obj\main.o + .text.main 0x08000d80 0x14 ..\obj\main.o + 0x08000d80 main + .text.CpuInit 0x08000d94 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + 0x08000d94 CpuInit .text.CpuStartUserProgram - 0x08000d98 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o - 0x08000d98 CpuStartUserProgram + 0x08000d9c 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + 0x08000d9c CpuStartUserProgram .text.CpuMemCopy - 0x08000dd0 0x20 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o - 0x08000dd0 CpuMemCopy + 0x08000dd4 0x20 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + 0x08000dd4 CpuMemCopy .text.FlashTranslateToNonCachedAddress - 0x08000df0 0xc ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000df4 0xc ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashGetSector - 0x08000dfc 0x48 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000e00 0x48 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashGetSectorBaseAddr - 0x08000e44 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000e48 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashInitBlock - 0x08000e7c 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000e80 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashWriteBlock - 0x08000ea4 0x90 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000ea8 0x90 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashSwitchBlock - 0x08000f34 0x40 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000f38 0x40 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashAddToBlock - 0x08000f74 0x7c ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000f78 0x7c ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashEraseSectors - 0x08000ff0 0x80 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08000ff4 0x80 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .text.FlashInit - 0x08001070 0x18 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - 0x08001070 FlashInit + 0x08001074 0x18 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08001074 FlashInit .text.FlashWrite - 0x08001088 0x60 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - 0x08001088 FlashWrite + 0x0800108c 0x60 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x0800108c FlashWrite .text.FlashErase - 0x080010e8 0x34 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - 0x080010e8 FlashErase + 0x080010ec 0x34 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x080010ec FlashErase .text.FlashWriteChecksum - 0x0800111c 0x50 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - 0x0800111c FlashWriteChecksum + 0x08001120 0x50 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08001120 FlashWriteChecksum .text.FlashVerifyChecksum - 0x0800116c 0x58 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - 0x0800116c FlashVerifyChecksum + 0x08001170 0x58 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08001170 FlashVerifyChecksum .text.FlashDone - 0x080011c4 0x40 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - 0x080011c4 FlashDone + 0x080011c8 0x40 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x080011c8 FlashDone .text.FlashGetUserProgBaseAddress - 0x08001204 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - 0x08001204 FlashGetUserProgBaseAddress + 0x08001208 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08001208 FlashGetUserProgBaseAddress .text.CpuIrqDisable - 0x0800120c 0x4 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o - 0x0800120c CpuIrqDisable - .text.CpuIrqEnable 0x08001210 0x4 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o - 0x08001210 CpuIrqEnable - .text 0x08001214 0x12c ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o - 0x08001214 Reset_Handler - 0x0800125a NMI_Handler - 0x0800125c HardFault_Handler - 0x0800125e MemManage_Handler - 0x08001260 BusFault_Handler - 0x08001262 UsageFault_Handler - 0x08001264 SVC_Handler - 0x08001266 DebugMon_Handler - 0x08001268 PendSV_Handler - 0x0800126a SysTick_Handler - 0x0800126c Default_Handler - 0x0800126e SCU_0_IRQHandler - 0x08001270 ERU0_0_IRQHandler - 0x08001272 ERU0_1_IRQHandler - 0x08001274 ERU0_2_IRQHandler - 0x08001276 ERU0_3_IRQHandler - 0x08001278 ERU1_0_IRQHandler - 0x0800127a ERU1_1_IRQHandler - 0x0800127c ERU1_2_IRQHandler - 0x0800127e ERU1_3_IRQHandler - 0x08001280 PMU0_0_IRQHandler - 0x08001282 VADC0_C0_0_IRQHandler - 0x08001284 VADC0_C0_1_IRQHandler - 0x08001286 VADC0_C0_2_IRQHandler - 0x08001288 VADC0_C0_3_IRQHandler - 0x0800128a VADC0_G0_0_IRQHandler - 0x0800128c VADC0_G0_1_IRQHandler - 0x0800128e VADC0_G0_2_IRQHandler - 0x08001290 VADC0_G0_3_IRQHandler - 0x08001292 VADC0_G1_0_IRQHandler - 0x08001294 VADC0_G1_1_IRQHandler - 0x08001296 VADC0_G1_2_IRQHandler - 0x08001298 VADC0_G1_3_IRQHandler - 0x0800129a VADC0_G2_0_IRQHandler - 0x0800129c VADC0_G2_1_IRQHandler - 0x0800129e VADC0_G2_2_IRQHandler - 0x080012a0 VADC0_G2_3_IRQHandler - 0x080012a2 VADC0_G3_0_IRQHandler - 0x080012a4 VADC0_G3_1_IRQHandler - 0x080012a6 VADC0_G3_2_IRQHandler - 0x080012a8 VADC0_G3_3_IRQHandler - 0x080012aa DSD0_0_IRQHandler - 0x080012ac DSD0_1_IRQHandler - 0x080012ae DSD0_2_IRQHandler - 0x080012b0 DSD0_3_IRQHandler - 0x080012b2 DSD0_4_IRQHandler - 0x080012b4 DSD0_5_IRQHandler - 0x080012b6 DSD0_6_IRQHandler - 0x080012b8 DSD0_7_IRQHandler - 0x080012ba DAC0_0_IRQHandler - 0x080012bc DAC0_1_IRQHandler - 0x080012be CCU40_0_IRQHandler - 0x080012c0 CCU40_1_IRQHandler - 0x080012c2 CCU40_2_IRQHandler - 0x080012c4 CCU40_3_IRQHandler - 0x080012c6 CCU41_0_IRQHandler - 0x080012c8 CCU41_1_IRQHandler - 0x080012ca CCU41_2_IRQHandler - 0x080012cc CCU41_3_IRQHandler - 0x080012ce CCU42_0_IRQHandler - 0x080012d0 CCU42_1_IRQHandler - 0x080012d2 CCU42_2_IRQHandler - 0x080012d4 CCU42_3_IRQHandler - 0x080012d6 CCU43_0_IRQHandler - 0x080012d8 CCU43_1_IRQHandler - 0x080012da CCU43_2_IRQHandler - 0x080012dc CCU43_3_IRQHandler - 0x080012de CCU80_0_IRQHandler - 0x080012e0 CCU80_1_IRQHandler - 0x080012e2 CCU80_2_IRQHandler - 0x080012e4 CCU80_3_IRQHandler - 0x080012e6 CCU81_0_IRQHandler - 0x080012e8 CCU81_1_IRQHandler - 0x080012ea CCU81_2_IRQHandler - 0x080012ec CCU81_3_IRQHandler - 0x080012ee POSIF0_0_IRQHandler - 0x080012f0 POSIF0_1_IRQHandler - 0x080012f2 POSIF1_0_IRQHandler - 0x080012f4 POSIF1_1_IRQHandler - 0x080012f6 CAN0_0_IRQHandler - 0x080012f8 CAN0_1_IRQHandler - 0x080012fa CAN0_2_IRQHandler - 0x080012fc CAN0_3_IRQHandler - 0x080012fe CAN0_4_IRQHandler - 0x08001300 CAN0_5_IRQHandler - 0x08001302 CAN0_6_IRQHandler - 0x08001304 CAN0_7_IRQHandler - 0x08001306 USIC0_0_IRQHandler - 0x08001308 USIC0_1_IRQHandler - 0x0800130a USIC0_2_IRQHandler - 0x0800130c USIC0_3_IRQHandler - 0x0800130e USIC0_4_IRQHandler - 0x08001310 USIC0_5_IRQHandler - 0x08001312 USIC1_0_IRQHandler - 0x08001314 USIC1_1_IRQHandler - 0x08001316 USIC1_2_IRQHandler - 0x08001318 USIC1_3_IRQHandler - 0x0800131a USIC1_4_IRQHandler - 0x0800131c USIC1_5_IRQHandler - 0x0800131e USIC2_0_IRQHandler - 0x08001320 USIC2_1_IRQHandler - 0x08001322 USIC2_2_IRQHandler - 0x08001324 USIC2_3_IRQHandler - 0x08001326 USIC2_4_IRQHandler - 0x08001328 USIC2_5_IRQHandler - 0x0800132a LEDTS0_0_IRQHandler - 0x0800132c FCE0_0_IRQHandler - 0x0800132e GPDMA0_0_IRQHandler - 0x08001330 SDMMC0_0_IRQHandler - 0x08001332 USB0_0_IRQHandler - 0x08001334 ETH0_0_IRQHandler - 0x08001336 GPDMA1_0_IRQHandler - .text.NvmInit 0x08001340 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - 0x08001340 NvmInit + 0x08001210 CpuIrqDisable + .text.CpuIrqEnable + 0x08001214 0x4 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o + 0x08001214 CpuIrqEnable + .text 0x08001218 0x12c ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o + 0x08001218 Reset_Handler + 0x0800125e NMI_Handler + 0x08001260 HardFault_Handler + 0x08001262 MemManage_Handler + 0x08001264 BusFault_Handler + 0x08001266 UsageFault_Handler + 0x08001268 SVC_Handler + 0x0800126a DebugMon_Handler + 0x0800126c PendSV_Handler + 0x0800126e SysTick_Handler + 0x08001270 Default_Handler + 0x08001272 SCU_0_IRQHandler + 0x08001274 ERU0_0_IRQHandler + 0x08001276 ERU0_1_IRQHandler + 0x08001278 ERU0_2_IRQHandler + 0x0800127a ERU0_3_IRQHandler + 0x0800127c ERU1_0_IRQHandler + 0x0800127e ERU1_1_IRQHandler + 0x08001280 ERU1_2_IRQHandler + 0x08001282 ERU1_3_IRQHandler + 0x08001284 PMU0_0_IRQHandler + 0x08001286 VADC0_C0_0_IRQHandler + 0x08001288 VADC0_C0_1_IRQHandler + 0x0800128a VADC0_C0_2_IRQHandler + 0x0800128c VADC0_C0_3_IRQHandler + 0x0800128e VADC0_G0_0_IRQHandler + 0x08001290 VADC0_G0_1_IRQHandler + 0x08001292 VADC0_G0_2_IRQHandler + 0x08001294 VADC0_G0_3_IRQHandler + 0x08001296 VADC0_G1_0_IRQHandler + 0x08001298 VADC0_G1_1_IRQHandler + 0x0800129a VADC0_G1_2_IRQHandler + 0x0800129c VADC0_G1_3_IRQHandler + 0x0800129e VADC0_G2_0_IRQHandler + 0x080012a0 VADC0_G2_1_IRQHandler + 0x080012a2 VADC0_G2_2_IRQHandler + 0x080012a4 VADC0_G2_3_IRQHandler + 0x080012a6 VADC0_G3_0_IRQHandler + 0x080012a8 VADC0_G3_1_IRQHandler + 0x080012aa VADC0_G3_2_IRQHandler + 0x080012ac VADC0_G3_3_IRQHandler + 0x080012ae DSD0_0_IRQHandler + 0x080012b0 DSD0_1_IRQHandler + 0x080012b2 DSD0_2_IRQHandler + 0x080012b4 DSD0_3_IRQHandler + 0x080012b6 DSD0_4_IRQHandler + 0x080012b8 DSD0_5_IRQHandler + 0x080012ba DSD0_6_IRQHandler + 0x080012bc DSD0_7_IRQHandler + 0x080012be DAC0_0_IRQHandler + 0x080012c0 DAC0_1_IRQHandler + 0x080012c2 CCU40_0_IRQHandler + 0x080012c4 CCU40_1_IRQHandler + 0x080012c6 CCU40_2_IRQHandler + 0x080012c8 CCU40_3_IRQHandler + 0x080012ca CCU41_0_IRQHandler + 0x080012cc CCU41_1_IRQHandler + 0x080012ce CCU41_2_IRQHandler + 0x080012d0 CCU41_3_IRQHandler + 0x080012d2 CCU42_0_IRQHandler + 0x080012d4 CCU42_1_IRQHandler + 0x080012d6 CCU42_2_IRQHandler + 0x080012d8 CCU42_3_IRQHandler + 0x080012da CCU43_0_IRQHandler + 0x080012dc CCU43_1_IRQHandler + 0x080012de CCU43_2_IRQHandler + 0x080012e0 CCU43_3_IRQHandler + 0x080012e2 CCU80_0_IRQHandler + 0x080012e4 CCU80_1_IRQHandler + 0x080012e6 CCU80_2_IRQHandler + 0x080012e8 CCU80_3_IRQHandler + 0x080012ea CCU81_0_IRQHandler + 0x080012ec CCU81_1_IRQHandler + 0x080012ee CCU81_2_IRQHandler + 0x080012f0 CCU81_3_IRQHandler + 0x080012f2 POSIF0_0_IRQHandler + 0x080012f4 POSIF0_1_IRQHandler + 0x080012f6 POSIF1_0_IRQHandler + 0x080012f8 POSIF1_1_IRQHandler + 0x080012fa CAN0_0_IRQHandler + 0x080012fc CAN0_1_IRQHandler + 0x080012fe CAN0_2_IRQHandler + 0x08001300 CAN0_3_IRQHandler + 0x08001302 CAN0_4_IRQHandler + 0x08001304 CAN0_5_IRQHandler + 0x08001306 CAN0_6_IRQHandler + 0x08001308 CAN0_7_IRQHandler + 0x0800130a USIC0_0_IRQHandler + 0x0800130c USIC0_1_IRQHandler + 0x0800130e USIC0_2_IRQHandler + 0x08001310 USIC0_3_IRQHandler + 0x08001312 USIC0_4_IRQHandler + 0x08001314 USIC0_5_IRQHandler + 0x08001316 USIC1_0_IRQHandler + 0x08001318 USIC1_1_IRQHandler + 0x0800131a USIC1_2_IRQHandler + 0x0800131c USIC1_3_IRQHandler + 0x0800131e USIC1_4_IRQHandler + 0x08001320 USIC1_5_IRQHandler + 0x08001322 USIC2_0_IRQHandler + 0x08001324 USIC2_1_IRQHandler + 0x08001326 USIC2_2_IRQHandler + 0x08001328 USIC2_3_IRQHandler + 0x0800132a USIC2_4_IRQHandler + 0x0800132c USIC2_5_IRQHandler + 0x0800132e LEDTS0_0_IRQHandler + 0x08001330 FCE0_0_IRQHandler + 0x08001332 GPDMA0_0_IRQHandler + 0x08001334 SDMMC0_0_IRQHandler + 0x08001336 USB0_0_IRQHandler + 0x08001338 ETH0_0_IRQHandler + 0x0800133a GPDMA1_0_IRQHandler + .text.NvmInit 0x08001344 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + 0x08001344 NvmInit .text.NvmWrite - 0x08001348 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - 0x08001348 NvmWrite + 0x0800134c 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + 0x0800134c NvmWrite .text.NvmErase - 0x08001350 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - 0x08001350 NvmErase + 0x08001354 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + 0x08001354 NvmErase .text.NvmVerifyChecksum - 0x08001358 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - 0x08001358 NvmVerifyChecksum + 0x0800135c 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + 0x0800135c NvmVerifyChecksum .text.NvmGetUserProgBaseAddress - 0x08001360 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - 0x08001360 NvmGetUserProgBaseAddress - .text.NvmDone 0x08001368 0x14 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - 0x08001368 NvmDone + 0x08001364 0x8 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + 0x08001364 NvmGetUserProgBaseAddress + .text.NvmDone 0x0800136c 0x14 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + 0x0800136c NvmDone .text.TimerReset - 0x0800137c 0xc ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - 0x0800137c TimerReset + 0x08001380 0xc ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + 0x08001380 TimerReset .text.TimerInit - 0x08001388 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - 0x08001388 TimerInit + 0x0800138c 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + 0x0800138c TimerInit .text.TimerUpdate - 0x080013b0 0x1c ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - 0x080013b0 TimerUpdate + 0x080013b4 0x1c ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + 0x080013b4 TimerUpdate .text.TimerGet - 0x080013cc 0x10 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - 0x080013cc TimerGet + 0x080013d0 0x10 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + 0x080013d0 TimerGet .text.UartTransmitByte - 0x080013dc 0x3c ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + 0x080013e0 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .text.UartReceiveByte 0x08001418 0x24 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .text.UartInit @@ -5262,62 +6001,58 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- .rodata.str1.4 0x08001b4c 0x1e ..\obj\lib\xmclib\src\xmc4_gpio.o *fill* 0x08001b6a 0x2 - .rodata.clear_peripheral_gate.7779 - 0x08001b6c 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.clear_peripheral_reset.7658 - 0x08001b7c 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .rodata.str1.4 - 0x08001b8c 0x1d ..\obj\lib\xmclib\src\xmc_gpio.o + 0x08001b6c 0x1d ..\obj\lib\xmclib\src\xmc_gpio.o + *fill* 0x08001b89 0x3 + .rodata.str1.4 + 0x08001b8c 0x1d ..\obj\lib\xmclib\src\xmc_usic.o *fill* 0x08001ba9 0x3 - .rodata.str1.4 - 0x08001bac 0x1d ..\obj\lib\xmclib\src\xmc_usic.o - *fill* 0x08001bc9 0x3 .rodata.flashLayout - 0x08001bcc 0xb4 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x08001bac 0xb4 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .rodata.str1.4 - 0x08001c80 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + 0x08001c60 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o 0x26 (size before relaxing) .rodata.xcpStationId - 0x08001ca8 0x8 ..\obj\~#\~#\~#\source\xcp.o + 0x08001c88 0x8 ..\obj\~#\~#\~#\source\xcp.o .rodata.str1.1 - 0x08001cb0 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) - *fill* 0x08001cb2 0x2 + 0x08001c90 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) + *fill* 0x08001c92 0x2 .rodata._global_impure_ptr - 0x08001cb4 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) - 0x08001cb4 _global_impure_ptr + 0x08001c94 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) + 0x08001c94 _global_impure_ptr *(.eh_frame*) - .eh_frame 0x08001cb8 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o - .eh_frame 0x08001cb8 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtend.o + .eh_frame 0x08001c98 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o + .eh_frame 0x08001c98 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtend.o -.glue_7 0x08001cbc 0x0 - .glue_7 0x08001cbc 0x0 linker stubs +.glue_7 0x08001c9c 0x0 + .glue_7 0x08001c9c 0x0 linker stubs -.glue_7t 0x08001cbc 0x0 - .glue_7t 0x08001cbc 0x0 linker stubs +.glue_7t 0x08001c9c 0x0 + .glue_7t 0x08001c9c 0x0 linker stubs -.vfp11_veneer 0x08001cbc 0x0 - .vfp11_veneer 0x08001cbc 0x0 linker stubs +.vfp11_veneer 0x08001c9c 0x0 + .vfp11_veneer 0x08001c9c 0x0 linker stubs -.v4_bx 0x08001cbc 0x0 - .v4_bx 0x08001cbc 0x0 linker stubs +.v4_bx 0x08001c9c 0x0 + .v4_bx 0x08001c9c 0x0 linker stubs -.iplt 0x08001cbc 0x0 - .iplt 0x08001cbc 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o +.iplt 0x08001c9c 0x0 + .iplt 0x08001c9c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08001cbc __exidx_start = . + 0x08001c9c __exidx_start = . -.ARM.exidx 0x08001cbc 0x8 +.ARM.exidx 0x08001c9c 0x8 *(.ARM.exidx* .gnu.linkonce.armexidx.*) - .ARM.exidx 0x08001cbc 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu/crt0.o - 0x08001cc4 __exidx_end = . - 0x08001cc4 __etext = . + .ARM.exidx 0x08001c9c 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu/crt0.o + 0x08001ca4 __exidx_end = . + 0x08001ca4 __etext = . -.rel.dyn 0x08001cc4 0x0 - .rel.iplt 0x08001cc4 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o +.rel.dyn 0x08001ca4 0x0 + .rel.iplt 0x08001ca4 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o -.data 0x20000000 0x6c load address 0x08001cc4 +.data 0x20000000 0x6c load address 0x08001ca4 0x20000000 __data_start__ = . *(vtable) *(.data*) @@ -5345,26 +6080,26 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x2000006c . = ALIGN (0x4) 0x2000006c __data_end__ = . -.jcr 0x2000006c 0x0 load address 0x08001d30 +.jcr 0x2000006c 0x0 load address 0x08001d10 .jcr 0x2000006c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o -.igot.plt 0x2000006c 0x0 load address 0x08001d30 +.igot.plt 0x2000006c 0x0 load address 0x08001d10 .igot.plt 0x2000006c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o -.no_init 0x2000006c 0x14 load address 0x08001d30 +.no_init 0x2000006c 0x14 load address 0x08001d10 .no_init 0x2000006c 0x14 ..\obj\lib\system_xmc4700.o 0x2000006c SystemCoreClock 0x20000070 g_chipid -.bss 0x20000080 0x910 load address 0x08001d44 +.bss 0x20000080 0x914 load address 0x08001d24 0x20000080 __bss_start__ = . *(.bss*) .bss 0x20000080 0x1c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o - .bss.nextBlinkEvent.7158 + .bss.nextBlinkEvent.7154 0x2000009c 0x4 ..\obj\led.o .bss.ledBlinkIntervalMs 0x200000a0 0x2 ..\obj\led.o - .bss.ledOn.7157 + .bss.ledOn.7153 0x200000a2 0x1 ..\obj\led.o *fill* 0x200000a3 0x1 .bss.bootBlockInfo @@ -5373,38 +6108,39 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x200004a8 0x404 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .bss.millisecond_counter 0x200008ac 0x4 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - .bss.xcpCtoReqPacket.7652 - 0x200008b0 0x41 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .bss.xcpCtoRxLength.7653 - 0x200008f1 0x1 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .bss.xcpCtoRxInProgress.7654 - 0x200008f2 0x1 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - *fill* 0x200008f3 0x1 - .bss.xcpCtoRxStartTime.7655 - 0x200008f4 0x4 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .bss.xcpCtoRxLength.7660 + 0x200008b0 0x1 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + *fill* 0x200008b1 0x3 + .bss.xcpCtoReqPacket.7659 + 0x200008b4 0x41 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .bss.xcpCtoRxInProgress.7661 + 0x200008f5 0x1 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + *fill* 0x200008f6 0x2 + .bss.xcpCtoRxStartTime.7662 + 0x200008f8 0x4 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .bss.assert_failure_line - 0x200008f8 0x4 ..\obj\~#\~#\~#\source\assert.o + 0x200008fc 0x4 ..\obj\~#\~#\~#\source\assert.o .bss.backdoorOpen - 0x200008fc 0x1 ..\obj\~#\~#\~#\source\backdoor.o - *fill* 0x200008fd 0x3 + 0x20000900 0x1 ..\obj\~#\~#\~#\source\backdoor.o + *fill* 0x20000901 0x3 .bss.backdoorOpenTime - 0x20000900 0x4 ..\obj\~#\~#\~#\source\backdoor.o + 0x20000904 0x4 ..\obj\~#\~#\~#\source\backdoor.o .bss.xcpCtoReqPacket.4270 - 0x20000904 0x40 ..\obj\~#\~#\~#\source\com.o - .bss.xcpInfo 0x20000944 0x4c ..\obj\~#\~#\~#\source\xcp.o + 0x20000908 0x40 ..\obj\~#\~#\~#\source\com.o + .bss.xcpInfo 0x20000948 0x4c ..\obj\~#\~#\~#\source\xcp.o *(COMMON) - 0x20000990 __bss_end__ = . + 0x20000994 __bss_end__ = . -.heap 0x20000990 0x0 - 0x20000990 __end__ = . - 0x20000990 end = __end__ +.heap 0x20000998 0x0 + 0x20000998 __end__ = . + 0x20000998 end = __end__ *(.heap*) - .heap 0x20000990 0x0 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o - 0x20000990 __HeapLimit = . + .heap 0x20000998 0x0 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o + 0x20000998 __HeapLimit = . -.stack_dummy 0x20000990 0x800 +.stack_dummy 0x20000998 0x800 *(.stack) - .stack 0x20000990 0x800 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o + .stack 0x20000998 0x800 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o 0x20006000 __StackTop = (ORIGIN (RAM) + LENGTH (RAM)) 0x20005800 __StackLimit = (__StackTop - SIZEOF (.stack_dummy)) 0x20006000 PROVIDE (__stack, __StackTop) @@ -5417,6 +6153,8 @@ LOAD ..\obj\lib\xmclib\src\xmc4_flash.o LOAD ..\obj\lib\xmclib\src\xmc4_gpio.o LOAD ..\obj\lib\xmclib\src\xmc4_rtc.o LOAD ..\obj\lib\xmclib\src\xmc4_scu.o +LOAD ..\obj\lib\xmclib\src\xmc_acmp.o +LOAD ..\obj\lib\xmclib\src\xmc_bccu.o LOAD ..\obj\lib\xmclib\src\xmc_can.o LOAD ..\obj\lib\xmclib\src\xmc_ccu4.o LOAD ..\obj\lib\xmclib\src\xmc_ccu8.o @@ -5425,6 +6163,7 @@ LOAD ..\obj\lib\xmclib\src\xmc_dac.o LOAD ..\obj\lib\xmclib\src\xmc_dma.o LOAD ..\obj\lib\xmclib\src\xmc_dsd.o LOAD ..\obj\lib\xmclib\src\xmc_ebu.o +LOAD ..\obj\lib\xmclib\src\xmc_ecat.o LOAD ..\obj\lib\xmclib\src\xmc_eru.o LOAD ..\obj\lib\xmclib\src\xmc_eth_mac.o LOAD ..\obj\lib\xmclib\src\xmc_fce.o @@ -5433,12 +6172,16 @@ LOAD ..\obj\lib\xmclib\src\xmc_hrpwm.o LOAD ..\obj\lib\xmclib\src\xmc_i2c.o LOAD ..\obj\lib\xmclib\src\xmc_i2s.o LOAD ..\obj\lib\xmclib\src\xmc_ledts.o +LOAD ..\obj\lib\xmclib\src\xmc_math.o +LOAD ..\obj\lib\xmclib\src\xmc_pau.o LOAD ..\obj\lib\xmclib\src\xmc_posif.o +LOAD ..\obj\lib\xmclib\src\xmc_prng.o LOAD ..\obj\lib\xmclib\src\xmc_rtc.o LOAD ..\obj\lib\xmclib\src\xmc_sdmmc.o LOAD ..\obj\lib\xmclib\src\xmc_spi.o LOAD ..\obj\lib\xmclib\src\xmc_uart.o LOAD ..\obj\lib\xmclib\src\xmc_usbd.o +LOAD ..\obj\lib\xmclib\src\xmc_usbh.o LOAD ..\obj\lib\xmclib\src\xmc_usic.o LOAD ..\obj\lib\xmclib\src\xmc_vadc.o LOAD ..\obj\lib\xmclib\src\xmc_wdt.o @@ -5566,76 +6309,76 @@ OUTPUT(..\bin\openblt_xmc4700.elf elf32-littlearm) .comment 0x0000006e 0x6f ..\obj\~#\~#\~#\source\cop.o .comment 0x0000006e 0x6f ..\obj\~#\~#\~#\source\xcp.o -.debug_info 0x00000000 0x8dc3 +.debug_info 0x00000000 0x90ad .debug_info 0x00000000 0x318 ..\obj\hooks.o .debug_info 0x00000318 0x3db ..\obj\led.o - .debug_info 0x000006f3 0x99a ..\obj\lib\system_xmc4700.o - .debug_info 0x0000108d 0xa00 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_info 0x00001a8d 0x4cf ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_info 0x00001f5c 0x22bb ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_info 0x00004217 0x44b ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_info 0x00004662 0x8c2 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_info 0x00004f24 0xe63 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_info 0x00005d87 0x872 ..\obj\main.o - .debug_info 0x000065f9 0x211 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o - .debug_info 0x0000680a 0x999 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_info 0x000071a3 0x84 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o - .debug_info 0x00007227 0xa4 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o - .debug_info 0x000072cb 0x228 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - .debug_info 0x000074f3 0x11f ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - .debug_info 0x00007612 0x987 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_info 0x00007f99 0xf2 ..\obj\~#\~#\~#\source\assert.o - .debug_info 0x0000808b 0x114 ..\obj\~#\~#\~#\source\backdoor.o - .debug_info 0x0000819f 0x156 ..\obj\~#\~#\~#\source\boot.o - .debug_info 0x000082f5 0x289 ..\obj\~#\~#\~#\source\com.o - .debug_info 0x0000857e 0xb6 ..\obj\~#\~#\~#\source\cop.o - .debug_info 0x00008634 0x78f ..\obj\~#\~#\~#\source\xcp.o + .debug_info 0x000006f3 0x943 ..\obj\lib\system_xmc4700.o + .debug_info 0x00001036 0xa38 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_info 0x00001a6e 0x4cf ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_info 0x00001f3d 0x2588 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_info 0x000044c5 0x44b ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_info 0x00004910 0x8fd ..\obj\lib\xmclib\src\xmc_uart.o + .debug_info 0x0000520d 0xe63 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_info 0x00006070 0x872 ..\obj\main.o + .debug_info 0x000068e2 0x211 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + .debug_info 0x00006af3 0x999 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_info 0x0000748c 0x84 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o + .debug_info 0x00007510 0xa4 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o + .debug_info 0x000075b4 0x228 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + .debug_info 0x000077dc 0x11f ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + .debug_info 0x000078fb 0x988 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_info 0x00008283 0xf2 ..\obj\~#\~#\~#\source\assert.o + .debug_info 0x00008375 0x114 ..\obj\~#\~#\~#\source\backdoor.o + .debug_info 0x00008489 0x156 ..\obj\~#\~#\~#\source\boot.o + .debug_info 0x000085df 0x289 ..\obj\~#\~#\~#\source\com.o + .debug_info 0x00008868 0xb6 ..\obj\~#\~#\~#\source\cop.o + .debug_info 0x0000891e 0x78f ..\obj\~#\~#\~#\source\xcp.o -.debug_abbrev 0x00000000 0x2063 +.debug_abbrev 0x00000000 0x205c .debug_abbrev 0x00000000 0x16d ..\obj\hooks.o .debug_abbrev 0x0000016d 0x188 ..\obj\led.o .debug_abbrev 0x000002f5 0x1c1 ..\obj\lib\system_xmc4700.o - .debug_abbrev 0x000004b6 0x212 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_abbrev 0x000006c8 0x196 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_abbrev 0x0000085e 0x317 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_abbrev 0x00000b75 0x17e ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_abbrev 0x00000cf3 0x265 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_abbrev 0x00000f58 0x2bc ..\obj\lib\xmclib\src\xmc_usic.o - .debug_abbrev 0x00001214 0x217 ..\obj\main.o - .debug_abbrev 0x0000142b 0xc8 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o - .debug_abbrev 0x000014f3 0x1ff ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_abbrev 0x000016f2 0x45 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o - .debug_abbrev 0x00001737 0x14 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o - .debug_abbrev 0x0000174b 0xca ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - .debug_abbrev 0x00001815 0xd4 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - .debug_abbrev 0x000018e9 0x285 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_abbrev 0x00001b6e 0xae ..\obj\~#\~#\~#\source\assert.o - .debug_abbrev 0x00001c1c 0x7f ..\obj\~#\~#\~#\source\backdoor.o - .debug_abbrev 0x00001c9b 0x63 ..\obj\~#\~#\~#\source\boot.o - .debug_abbrev 0x00001cfe 0x144 ..\obj\~#\~#\~#\source\com.o - .debug_abbrev 0x00001e42 0x63 ..\obj\~#\~#\~#\source\cop.o - .debug_abbrev 0x00001ea5 0x1be ..\obj\~#\~#\~#\source\xcp.o + .debug_abbrev 0x000004b6 0x221 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_abbrev 0x000006d7 0x196 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_abbrev 0x0000086d 0x301 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_abbrev 0x00000b6e 0x17e ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_abbrev 0x00000cec 0x265 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_abbrev 0x00000f51 0x2bc ..\obj\lib\xmclib\src\xmc_usic.o + .debug_abbrev 0x0000120d 0x217 ..\obj\main.o + .debug_abbrev 0x00001424 0xc8 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + .debug_abbrev 0x000014ec 0x1ff ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_abbrev 0x000016eb 0x45 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o + .debug_abbrev 0x00001730 0x14 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o + .debug_abbrev 0x00001744 0xca ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + .debug_abbrev 0x0000180e 0xd4 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + .debug_abbrev 0x000018e2 0x285 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_abbrev 0x00001b67 0xae ..\obj\~#\~#\~#\source\assert.o + .debug_abbrev 0x00001c15 0x7f ..\obj\~#\~#\~#\source\backdoor.o + .debug_abbrev 0x00001c94 0x63 ..\obj\~#\~#\~#\source\boot.o + .debug_abbrev 0x00001cf7 0x144 ..\obj\~#\~#\~#\source\com.o + .debug_abbrev 0x00001e3b 0x63 ..\obj\~#\~#\~#\source\cop.o + .debug_abbrev 0x00001e9e 0x1be ..\obj\~#\~#\~#\source\xcp.o -.debug_loc 0x00000000 0x3119 +.debug_loc 0x00000000 0x324e .debug_loc 0x00000000 0x2c ..\obj\hooks.o .debug_loc 0x0000002c 0xc4 ..\obj\led.o .debug_loc 0x000000f0 0xa8 ..\obj\lib\system_xmc4700.o - .debug_loc 0x00000198 0x627 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_loc 0x000007bf 0x298 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_loc 0x00000a57 0xe63 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_loc 0x000018ba 0xef ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_loc 0x000019a9 0x24b ..\obj\lib\xmclib\src\xmc_uart.o - .debug_loc 0x00001bf4 0x580 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_loc 0x00002174 0x6c ..\obj\main.o - .debug_loc 0x000021e0 0xdb ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o - .debug_loc 0x000022bb 0x727 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_loc 0x000029e2 0xa5 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - .debug_loc 0x00002a87 0x1e6 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_loc 0x00002c6d 0x42 ..\obj\~#\~#\~#\source\assert.o - .debug_loc 0x00002caf 0x42 ..\obj\~#\~#\~#\source\com.o - .debug_loc 0x00002cf1 0x428 ..\obj\~#\~#\~#\source\xcp.o + .debug_loc 0x00000198 0x6df ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_loc 0x00000877 0x298 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_loc 0x00000b0f 0xeb4 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_loc 0x000019c3 0xef ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_loc 0x00001ab2 0x277 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_loc 0x00001d29 0x580 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_loc 0x000022a9 0x6c ..\obj\main.o + .debug_loc 0x00002315 0xdb ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + .debug_loc 0x000023f0 0x727 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_loc 0x00002b17 0xa5 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + .debug_loc 0x00002bbc 0x1e6 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_loc 0x00002da2 0x42 ..\obj\~#\~#\~#\source\assert.o + .debug_loc 0x00002de4 0x42 ..\obj\~#\~#\~#\source\com.o + .debug_loc 0x00002e26 0x428 ..\obj\~#\~#\~#\source\xcp.o -.debug_aranges 0x00000000 0x968 +.debug_aranges 0x00000000 0xa10 .debug_aranges 0x00000000 0x30 ..\obj\hooks.o .debug_aranges @@ -5647,67 +6390,67 @@ OUTPUT(..\bin\openblt_xmc4700.elf elf32-littlearm) .debug_aranges 0x00000188 0x28 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_aranges - 0x000001b0 0x308 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x000001b0 0x3b0 ..\obj\lib\xmclib\src\xmc4_scu.o .debug_aranges - 0x000004b8 0x28 ..\obj\lib\xmclib\src\xmc_gpio.o + 0x00000560 0x28 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_aranges - 0x000004e0 0x50 ..\obj\lib\xmclib\src\xmc_uart.o + 0x00000588 0x50 ..\obj\lib\xmclib\src\xmc_uart.o .debug_aranges - 0x00000530 0x80 ..\obj\lib\xmclib\src\xmc_usic.o + 0x000005d8 0x80 ..\obj\lib\xmclib\src\xmc_usic.o .debug_aranges - 0x000005b0 0x30 ..\obj\main.o + 0x00000658 0x30 ..\obj\main.o .debug_aranges - 0x000005e0 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + 0x00000688 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o .debug_aranges - 0x00000618 0x90 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + 0x000006c0 0x90 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o .debug_aranges - 0x000006a8 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o + 0x00000750 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o .debug_aranges - 0x000006d0 0x20 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o + 0x00000778 0x20 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cstart.o .debug_aranges - 0x000006f0 0x48 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + 0x00000798 0x48 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o .debug_aranges - 0x00000738 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + 0x000007e0 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o .debug_aranges - 0x00000770 0x40 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + 0x00000818 0x40 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o .debug_aranges - 0x000007b0 0x20 ..\obj\~#\~#\~#\source\assert.o + 0x00000858 0x20 ..\obj\~#\~#\~#\source\assert.o .debug_aranges - 0x000007d0 0x28 ..\obj\~#\~#\~#\source\backdoor.o + 0x00000878 0x28 ..\obj\~#\~#\~#\source\backdoor.o .debug_aranges - 0x000007f8 0x28 ..\obj\~#\~#\~#\source\boot.o + 0x000008a0 0x28 ..\obj\~#\~#\~#\source\boot.o .debug_aranges - 0x00000820 0x50 ..\obj\~#\~#\~#\source\com.o + 0x000008c8 0x50 ..\obj\~#\~#\~#\source\com.o .debug_aranges - 0x00000870 0x28 ..\obj\~#\~#\~#\source\cop.o + 0x00000918 0x28 ..\obj\~#\~#\~#\source\cop.o .debug_aranges - 0x00000898 0xd0 ..\obj\~#\~#\~#\source\xcp.o + 0x00000940 0xd0 ..\obj\~#\~#\~#\source\xcp.o -.debug_ranges 0x00000000 0x7e8 +.debug_ranges 0x00000000 0x890 .debug_ranges 0x00000000 0x20 ..\obj\hooks.o .debug_ranges 0x00000020 0x20 ..\obj\led.o .debug_ranges 0x00000040 0x38 ..\obj\lib\system_xmc4700.o .debug_ranges 0x00000078 0xd0 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_ranges 0x00000148 0x18 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_ranges 0x00000160 0x2f8 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_ranges 0x00000458 0x18 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_ranges 0x00000470 0x40 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_ranges 0x000004b0 0x70 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_ranges 0x00000520 0x20 ..\obj\main.o - .debug_ranges 0x00000540 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o - .debug_ranges 0x00000568 0x80 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o - .debug_ranges 0x000005e8 0x18 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o - .debug_ranges 0x00000600 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o - .debug_ranges 0x00000638 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o - .debug_ranges 0x00000660 0x30 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o - .debug_ranges 0x00000690 0x10 ..\obj\~#\~#\~#\source\assert.o - .debug_ranges 0x000006a0 0x18 ..\obj\~#\~#\~#\source\backdoor.o - .debug_ranges 0x000006b8 0x18 ..\obj\~#\~#\~#\source\boot.o - .debug_ranges 0x000006d0 0x40 ..\obj\~#\~#\~#\source\com.o - .debug_ranges 0x00000710 0x18 ..\obj\~#\~#\~#\source\cop.o - .debug_ranges 0x00000728 0xc0 ..\obj\~#\~#\~#\source\xcp.o + .debug_ranges 0x00000160 0x3a0 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_ranges 0x00000500 0x18 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_ranges 0x00000518 0x40 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_ranges 0x00000558 0x70 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_ranges 0x000005c8 0x20 ..\obj\main.o + .debug_ranges 0x000005e8 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\cpu.o + .debug_ranges 0x00000610 0x80 ..\obj\~#\~#\~#\source\armcm4_xmc4\flash.o + .debug_ranges 0x00000690 0x18 ..\obj\~#\~#\~#\source\armcm4_xmc4\gcc\cpu_comp.o + .debug_ranges 0x000006a8 0x38 ..\obj\~#\~#\~#\source\armcm4_xmc4\nvm.o + .debug_ranges 0x000006e0 0x28 ..\obj\~#\~#\~#\source\armcm4_xmc4\timer.o + .debug_ranges 0x00000708 0x30 ..\obj\~#\~#\~#\source\armcm4_xmc4\uart.o + .debug_ranges 0x00000738 0x10 ..\obj\~#\~#\~#\source\assert.o + .debug_ranges 0x00000748 0x18 ..\obj\~#\~#\~#\source\backdoor.o + .debug_ranges 0x00000760 0x18 ..\obj\~#\~#\~#\source\boot.o + .debug_ranges 0x00000778 0x40 ..\obj\~#\~#\~#\source\com.o + .debug_ranges 0x000007b8 0x18 ..\obj\~#\~#\~#\source\cop.o + .debug_ranges 0x000007d0 0xc0 ..\obj\~#\~#\~#\source\xcp.o -.debug_macro 0x00000000 0x1c2a1 +.debug_macro 0x00000000 0x1c234 .debug_macro 0x00000000 0x23f ..\obj\hooks.o .debug_macro 0x0000023f 0x892 ..\obj\hooks.o .debug_macro 0x00000ad1 0x1c ..\obj\hooks.o @@ -5737,141 +6480,141 @@ OUTPUT(..\bin\openblt_xmc4700.elf elf32-littlearm) .debug_macro 0x000015fe 0x30d ..\obj\hooks.o .debug_macro 0x0000190b 0x10 ..\obj\hooks.o .debug_macro 0x0000191b 0x35 ..\obj\hooks.o - .debug_macro 0x00001950 0x162 ..\obj\hooks.o - .debug_macro 0x00001ab2 0x2d ..\obj\hooks.o - .debug_macro 0x00001adf 0x3b ..\obj\hooks.o - .debug_macro 0x00001b1a 0x50 ..\obj\hooks.o - .debug_macro 0x00001b6a 0xe66 ..\obj\hooks.o - .debug_macro 0x000029d0 0x16 ..\obj\hooks.o - .debug_macro 0x000029e6 0x166f2 ..\obj\hooks.o - .debug_macro 0x000190d8 0x12 ..\obj\hooks.o - .debug_macro 0x000190ea 0x4c ..\obj\hooks.o - .debug_macro 0x00019136 0x22 ..\obj\hooks.o - .debug_macro 0x00019158 0xd4d ..\obj\hooks.o - .debug_macro 0x00019ea5 0xba ..\obj\hooks.o - .debug_macro 0x00019f5f 0x23f ..\obj\led.o - .debug_macro 0x0001a19e 0x317 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-S31508001D1400000000000000000000000000000000B1 -S31108001D240000000025020008010200086B -S31508001D300000000000000000000000000000000095 -S30908001D400000000091 +S31108001D040000000025020008010200088B +S31508001D1000000000000000000000000000000000B5 +S30908001D2000000000B1 S70508000000F2 diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.depend b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.depend index f198f302..9816c7d3 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.depend +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.depend @@ -1064,60 +1064,60 @@ "led.h" "xmc_gpio.h" -1477087008 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\system_xmc4700.c +1477087956 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\system_xmc4700.c "system_XMC4700.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmc4700.h +1473064960 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmc4700.h "core_cm4.h" "system_XMC4700.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cm4.h +1465289978 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cm4.h "core_cmInstr.h" "core_cmFunc.h" "core_cmSimd.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cminstr.h - - - +1465289978 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cminstr.h + "cmsis_armcc.h" + "cmsis_armcc_V6.h" + "cmsis_gcc.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\cmsis_gcc.h +1465289978 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\cmsis_gcc.h -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cmfunc.h - - - +1465289978 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cmfunc.h + "cmsis_armcc.h" + "cmsis_armcc_V6.h" + "cmsis_gcc.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cmsimd.h - - - +1465289978 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\cmsis\core_cmsimd.h + "cmsis_armcc.h" + "cmsis_armcc_V6.h" + "cmsis_gcc.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\system_xmc4700.h +1468487305 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\system_xmc4700.h -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_eru.c +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_eru.c "xmc_eru.h" "xmc_scu.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_eru.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_eru.h "xmc_common.h" "xmc1_eru_map.h" "xmc4_eru_map.h" -1476977853 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_common.h +1477088188 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_common.h @@ -1126,9 +1126,10 @@ "boot.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_device.h +1469781874 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_device.h "XMC4500.h" "XMC4400.h" + "XMC4300.h" "XMC4200.h" "XMC4100.h" "XMC4700.h" @@ -1138,251 +1139,251 @@ "XMC1300.h" "XMC1400.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_eru_map.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_eru_map.h -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_scu.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_scu.h -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_scu.h +1467383079 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_scu.h "xmc_common.h" -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_flash.c +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_flash.c "xmc_flash.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_flash.h +1471242129 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_flash.h "xmc_common.h" "xmc1_flash.h" "xmc4_flash.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_flash.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_flash.h "xmc_common.h" -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_gpio.c +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_gpio.c "xmc_gpio.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_gpio.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_gpio.h "xmc_common.h" "xmc1_gpio.h" "xmc4_gpio.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_gpio.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_gpio.h "xmc_common.h" "xmc4_gpio_map.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_gpio_map.h +1471903247 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_gpio_map.h -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_rtc.c +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_rtc.c -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_rtc.h +1467378878 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_rtc.h "xmc1_rtc.h" "xmc4_rtc.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_rtc.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc4_rtc.h -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_scu.c +1467379907 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc4_scu.c -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_can.c +1467378878 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_can.c "xmc_can.h" "xmc_scu.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_can.h +1470204177 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c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_usbd_regs.h -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_usic.c +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_usic.c "xmc_usic.h" "xmc_scu.h" -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_vadc.c +1470204802 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_vadc.c -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_vadc.h +1470205055 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_vadc.h -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_vadc_map.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_vadc_map.h -1447665730 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_wdt.c +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_wdt.c "xmc_wdt.h" "xmc_scu.h" -1447665730 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_wdt.h +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_wdt.h "xmc_common.h" "xmc_scu.h" @@ -1458,3 +1459,56 @@ 1476787063 source:c:\work\software\openblt\target\source\xcp.c "boot.h" +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_acmp.c + + +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_acmp.h + + +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_bccu.c + + + +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_bccu.h + + +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_ecat.c + + + +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_ecat.h + "xmc_common.h" + "xmc_ecat_map.h" + +1469014958 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_ecat_map.h + +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_math.c + + +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_math.h + + + +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_pau.c + "xmc_pau.h" + +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_pau.h + "xmc_common.h" + +1470204177 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_prng.c + "xmc_prng.h" + +1470204177 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_prng.h + "xmc_common.h" + +1473236602 source:c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\src\xmc_usbh.c + + + "xmc_usbh.h" + +1473236602 c:\work\software\openblt\target\demo\armcm4_xmc4_xcm4700_relax_kit_gcc\boot\lib\xmclib\inc\xmc_usbh.h + + "xmc_common.h" + "xmc_scu.h" + "xmc_gpio.h" + diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.ebp b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.ebp index 0f2cc4f6..768a0433 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.ebp +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/ide/xmc4700.ebp @@ -123,6 +123,12 @@ + + + + @@ -156,6 +162,12 @@ + + + + @@ -192,9 +204,18 @@ + + + + + + @@ -216,6 +237,9 @@ + + @@ -248,6 +272,14 @@

    + *
  1. Initializes an instance of analog comparator module with the @ref XMC_ACMP_CONFIG_t configuration structure + * using the API XMC_ACMP_Init().
    2. + *
  2. Programs the source of input(INP) specified by @ref XMC_ACMP_INP_SOURCE_t parameter using the API + * XMC_ACMP_SetInput().
    3. + *
  3. Sets the low power mode of operation using XMC_ACMP_SetLowPowerMode() API.
    4. + *
+ * @{ + */ + +/********************************************************************************************************************* + * HEADER FILES + ********************************************************************************************************************/ +#include + +/********************************************************************************************************************* + * MACROS + ********************************************************************************************************************/ +/* If ACMP is available*/ +#if defined (COMPARATOR) + +#define XMC_ACMP0 (XMC_ACMP_t*)COMPARATOR /**< Comparator module base address defined*/ + +#if UC_SERIES == XMC14 +#define XMC_ACMP_MAX_INSTANCES (4U) /* Maximum number of Analog Comparators available*/ +#else +#define XMC_ACMP_MAX_INSTANCES (3U) /* Maximum number of Analog Comparators available*/ +#endif + +/* Checks if the pointer being passed is valid*/ +#define XMC_ACMP_CHECK_MODULE_PTR(PTR) (((PTR)== (XMC_ACMP_t*)COMPARATOR)) + +/* Checks if the instance being addressed is valid*/ +#define XMC_ACMP_CHECK_INSTANCE(INST) (((INST)< XMC_ACMP_MAX_INSTANCES)) + +/********************************************************************************************************************* + * ENUMS + ********************************************************************************************************************/ + +/** + * Defines the return value of an API. + */ +typedef enum XMC_ACMP_STATUS +{ + XMC_ACMP_STATUS_SUCCESS = 0U, /**< API completes the execution successfully */ + XMC_ACMP_STATUS_ERROR , /**< API cannot fulfill the request */ +} XMC_ACMP_STATUS_t; + +/** + * Defines the hysteresis voltage levels to reduce noise sensitivity. + */ +typedef enum XMC_ACMP_HYSTERESIS +{ + XMC_ACMP_HYSTERESIS_OFF = 0U, /**< No hysteresis */ + XMC_ACMP_HYSTERESIS_10 , /**< Hysteresis = 10mv */ + XMC_ACMP_HYSTERESIS_15 , /**< Hysteresis = 15mv */ + XMC_ACMP_HYSTERESIS_20 /**< Hysteresis = 20mv */ +} XMC_ACMP_HYSTERESIS_t; + +/** + * Defines the comparator output status options. + */ +typedef enum XMC_ACMP_COMP_OUT +{ + XMC_ACMP_COMP_OUT_NO_INVERSION = 0U, /**< ACMP output is HIGH when, Input Positive(INP) greater than Input + Negative(INN). Vplus > Vminus */ + XMC_ACMP_COMP_OUT_INVERSION /**< ACMP output is HIGH when, Input Negative(INN) greater than Input + Positive(INP). Vminus > Vplus*/ +} XMC_ACMP_COMP_OUT_t; + +/** + * Defines the analog comparator input connection method. + */ +typedef enum XMC_ACMP_INP_SOURCE +{ + XMC_ACMP_INP_SOURCE_STANDARD_PORT = 0U, /**< Input is connected to port */ + XMC_ACMP_INP_SOURCE_ACMP1_INP_PORT = (uint16_t)(COMPARATOR_ANACMP0_ACMP0_SEL_Msk) /**< Input is connected to port + and ACMP1 INP */ +} XMC_ACMP_INP_SOURCE_t; + +/********************************************************************************************************************* + * DATA STRUCTURES + ********************************************************************************************************************/ + + +/*Anonymous structure/union guard start*/ +#if defined(__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined(__TASKING__) + #pragma warning 586 +#endif + +/** + * ACMP module + */ +typedef struct { + __IO uint32_t ORCCTRL; + __I uint32_t RESERVED[726]; + __IO uint32_t ANACMP[XMC_ACMP_MAX_INSTANCES]; +} XMC_ACMP_t; + +/** + * Structure for initializing the ACMP module. It configures the ANACMP register of the respective input. + */ +typedef struct XMC_ACMP_CONFIG +{ + union + { + struct + { + uint32_t : 1; + uint32_t filter_disable : 1; /**< Comparator filter option for removing glitches. By default this option + is selected in ANACMP register. Setting this option disables the filter */ + uint32_t : 1; + uint32_t output_invert : 1; /**< Option to invert the comparator output. Use XMC_@ref XMC_ACMP_COMP_OUT_t type*/ + uint32_t hysteresis : 2; /**< Hysteresis voltage to reduce noise sensitivity. Select the voltage levels + from the values defined in @ref XMC_ACMP_HYSTERESIS_t. */ + uint32_t : 26; + }; + uint32_t anacmp; + }; +} XMC_ACMP_CONFIG_t; + +/*Anonymous structure/union guard end*/ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__TASKING__) + #pragma warning restore +#endif + +#ifdef __cplusplus + extern "C" { +#endif + +/********************************************************************************************************************* + * API Prototypes + ********************************************************************************************************************/ + +/** + * @param peripheral Constant pointer to analog comparator module, of @ref XMC_ACMP_t type. Use @ref XMC_ACMP0 macro. + * @param instance ACMP instance number.
+ * Range:
0 - ACMP0
+ * 1 - ACMP1
+ * 2 - ACMP2
+ * 3 - ACMP3 - Only applicable for XMC1400 devices
+ * + * @param config Pointer to configuration data. Refer data structure @ref XMC_ACMP_CONFIG_t for settings. + * @return + * None
+ * + * \parDescription:
+ * Initializes an instance of analog comparator module.
\n + * Configures the ANACMP resister with hysteresis, comparator filter and inverted comparator output. + * + * \parRelated APIs:
+ * None. + */ +void XMC_ACMP_Init(XMC_ACMP_t *const peripheral, uint32_t instance, const XMC_ACMP_CONFIG_t *const config); + +/** + * @param peripheral Constant pointer to analog comparator module, of @ref XMC_ACMP_t type. Use @ref XMC_ACMP0 macro. + * @param instance ACMP instance number.
+ * Range:
0 - ACMP0
+ * 1 - ACMP1
+ * 2 - ACMP2
+ * 3 - ACMP3 - Only applicable for XMC1400 devices
+ * @return + * None
+ * + * \parDescription:
+ * Enables an instance of ACMP module.
\n + * Starts the comparator by setting CMP_EN bit of respective ANACMP \a instance register. The \a instance number + * determines which analog comparator to be switched on. Call this API after the successful completion of the comparator + * initilization and input selection. + * + * \parRelated APIs:
+ * XMC_ACMP_DisableComparator().
+ */ +__STATIC_INLINE void XMC_ACMP_EnableComparator(XMC_ACMP_t *const peripheral, uint32_t instance) +{ + XMC_ASSERT("XMC_ACMP_EnableComparator:Wrong module pointer", XMC_ACMP_CHECK_MODULE_PTR(peripheral)) + XMC_ASSERT("XMC_ACMP_EnableComparator:Wrong instance number", XMC_ACMP_CHECK_INSTANCE(instance) ) + + peripheral->ANACMP[instance] |= (uint16_t)COMPARATOR_ANACMP0_CMP_EN_Msk; + +} + + +/** + * @param peripheral Constant pointer to analog comparator module, of @ref XMC_ACMP_t type. Use @ref XMC_ACMP0 macro. + * @param instance ACMP instance number.
+ * Range:
0 - ACMP0
+ * 1 - ACMP1
+ * 2 - ACMP2
+ * 3 - ACMP3 - Only applicable for XMC1400 devices
+ * @return + * None
+ * \parDescription:
+ * Disables an instance of ACMP module.
\n + * Stops the comparator by resetting CMP_EN bit of respective ANACMP \a instance register. The \a instance number + * determines which analog comparator to be switched off. + * + * \parRelated APIs:
+ * XMC_ACMP_EnableComparator(). + */ +__STATIC_INLINE void XMC_ACMP_DisableComparator(XMC_ACMP_t *const peripheral, uint32_t instance) +{ + XMC_ASSERT("XMC_ACMP_DisableComparator:Wrong module pointer", XMC_ACMP_CHECK_MODULE_PTR(peripheral)) + XMC_ASSERT("XMC_ACMP_DisableComparator:Wrong instance number", XMC_ACMP_CHECK_INSTANCE(instance) ) + + peripheral->ANACMP[instance] &= (uint16_t)(~((uint32_t)COMPARATOR_ANACMP0_CMP_EN_Msk)); +} + +/** + * @param None + * @return + * None
+ * + * \parDescription:
+ * Enables the reference divider for analog comparator instance 1.
\n + * ACMP1 input INP is driven by an internal reference voltage by setting DIV_EN bit of ANACMP1 register. + * Other comparator instances can also share this reference divider option by calling the XMC_ACMP_SetInput() API. + * + * \parRelated APIs:
+ * XMC_ACMP_SetInput(). + */ +__STATIC_INLINE void XMC_ACMP_EnableReferenceDivider(void) +{ + /* Enable the divider switch and connect the divided reference to ACMP1.INP */ + COMPARATOR->ANACMP1 |= (uint16_t)(COMPARATOR_ANACMP1_REF_DIV_EN_Msk); +} + +/** + * @param None + * @return + * None
+ * + * \parDescription:
+ * Disables the reference divider for analog comparator instance 1.
\n + * ACMP1 input INP is disconnected from the reference divider. This is achieved by reseting DIV_EN bit of ANACMP1 + * register. + * + * \parRelated APIs:
+ * None. + */ +__STATIC_INLINE void XMC_ACMP_DisableReferenceDivider(void) +{ + /* Disable the divider switch and use ACMP1.INP as standard port*/ + COMPARATOR->ANACMP1 &= (uint16_t)(~(COMPARATOR_ANACMP1_REF_DIV_EN_Msk)); +} + +/** + * @param peripheral Constant pointer to analog comparator module, of @ref XMC_ACMP_t type. Use @ref XMC_ACMP0 macro. + * @param instance ACMP instance number.
+ * Range:
0 - ACMP0
+ * 2 - ACMP2
+ * 3 - ACMP3 - Only applicable for XMC1400 devices
+ * @param source ACMP input source selection options.
+ * Range:
XMC_ACMP_INP_SOURCE_STANDARD_PORT - Input is connected to port
+ * XMC_ACMP_INP_SOURCE_ACMP1_INP_PORT - Input is connected to port and ACMP1 INP
+ * @return + * None
+ * + * \parDescription:
+ * Sets the analog comparartor input selection for ACMP0, ACMP2 instances.
\n + * Apart from ACMP1 instance, each ACMP instances can be connected to its own port and ACMP1 INP. + * Calling @ref XMC_ACMP_EnableReferenceDivider() API, after this API can share the reference divider to one of the + * comparartor input as explained in the following options.
+ * The hardware options to set input are listed below.
+ *
    + *
  1. The comparator inputs aren't connected to other ACMP1 comparator inputs.
    2. + *
  2. Can program the comparator-0 to connect ACMP0.INP to ACMP1.INP in XMC1200 AA or XMC1300 AA
    3. + *
  3. Can program the comparator-0 to connect ACMP0.INN to ACMP1.INP in XMC1200 AB or XMC1300 AB or XMC1400 AA
    4. + *
  4. Can program the comparator-2 to connect ACMP2.INP to ACMP1.INP
    5. + *

+ * Directly accessed registers are ANACMP0, ANACMP2 according to the availability of instance in the devices. + * + * \parRelated APIs:
+ * @ref XMC_ACMP_EnableReferenceDivider.
+ * @ref XMC_ACMP_DisableReferenceDivider. + */ +void XMC_ACMP_SetInput(XMC_ACMP_t *const peripheral, uint32_t instance, const XMC_ACMP_INP_SOURCE_t source); + + +/** + * @param None + * @return + * None
+ * + * \parDescription:
+ * Set the comparartors to operate in low power mode, by setting the LPWR bit of ANACMP0 register.
\n + * The low power mode is controlled by ACMP0 instance. Low power mode is applicable for all instances of the + * comparator. In low power mode, blanking time will be introduced to ensure the stability of comparartor output. This + * will slow down the comparator operation. + * + * \parRelated APIs:
+ * XMC_ACMP_ClearLowPowerMode(). + */ +__STATIC_INLINE void XMC_ACMP_SetLowPowerMode(void) +{ + COMPARATOR->ANACMP0 |= (uint16_t)COMPARATOR_ANACMP0_CMP_LPWR_Msk; +} + +/** + * @param None + * @return + * None
+ * + * \parDescription:
+ * Exits the low power mode by reseting LPWR bit of ANACMP0 register.
\n + * The low power mode is controlled by ACMP0 module. Low power mode is applicable for all instances of the + * comparator. To re-enable the low power mode, call the related API @ref XMC_ACMP_SetLowPowerMode(). + * + * \parRelated APIs:
+ * XMC_ACMP_SetLowPowerMode(). + */ +__STATIC_INLINE void XMC_ACMP_ClearLowPowerMode(void) +{ + COMPARATOR->ANACMP0 &= (uint16_t)(~(uint16_t)COMPARATOR_ANACMP0_CMP_LPWR_Msk); +} + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* If ACMP is available*/ + +#endif /* XMC_ACMP_H */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_bccu.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_bccu.h new file mode 100644 index 00000000..5ad833c8 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_bccu.h @@ -0,0 +1,1976 @@ +/** + * @file xmc_bccu.h + * @date 2015-06-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-02-19: + * - Initial draft
+ * - Documentation improved
+ * + * 2015-05-08: + * - Minor bug fix in XMC_BCCU_ClearEventFlag(). + * - New APIs are added: XMC_BCCU_DIM_ReadDimDivider(), XMC_BCCU_DIM_GetDimCurve(), XMC_BCCU_IsDitherEnable()
+ * + * 2015-06-20: + * - Removed version macros and declaration of GetDriverVersion API + * + * Detailed description of file:
+ * APIs for the functional blocks of BCCU have been defined:
+ * -- GLOBAL configuration
+ * -- Clock configuration, Function/Event configuration, Interrupt configuration
+ * + * @endcond + * + */ + +#ifndef XMC_BCCU_H +#define XMC_BCCU_H + +/********************************************************************************************************************* + * HEADER FILES + ********************************************************************************************************************/ +#include + +/** + * @addtogroup XMClib XMC Peripheral Library + * @{ + */ + +/** + * @addtogroup BCCU + * @brief Brightness and Color Control Unit (BCCU) driver for the XMC1 microcontroller family. + * + * The Brightness and Color Control Unit (BCCU) is a dimming control peripheral for LED lighting applications. The BCCU + * module can be used to control multiple LED channels. Every channel generates one-bit sigma-delta bit stream with a + * user adjustable 12-bit average value. The dimming engine changes the brightness gradually (exponential curve) to appear + * natural to the human eye. It supports color control by adjusting the relative intensity of selected channels using a + * linear walk scheme for smooth color changes. It also supports high-power multi-channel LED lamps by optionally packing + * the bitstream. The optional packer which decreases the average rate of output switching by enforcing a defined on-time. + * The BCCU module generates two trigger signals to the ADC (BCCU_TRIGOUT0 and BCCU_TRIGOU1) to start conversions in a + * synchronized manner. The module can also be used as a multi-channel digital-analog converter with low-pass filters on the + * outputs. The BCCU module supports 3 independent dimming engines, 9 independent channels, Trap functions and 2 ADC + * triggering modes. + * + * The driver is divided into global control (BCCU), channel control (BCCU_CH) and dimming control (BCCU_DIM). + * + * BCCU features: + * -# Configuration structure XMC_BCCU_GLOBAL_CONFIG_t and initialization function XMC_BCCU_GlobalInit() + * -# Allows configuring of clock settings (Fast clock, Bit clock and Dimming clock). XMC_BCCU_SetFastClockPrescaler(), + * -# XMC_BCCU_SelectBitClock(), XMC_BCCU_SetDimClockPrescaler(). + * -# Allows configuring global trigger settings. XMC_BCCU_ConfigGlobalTrigger() + * -# Allows enabling multiple channels together. XMC_BCCU_ConcurrentEnableChannels() + * -# Allows enabling single channel. XMC_BCCU_EnableChannel() + * -# Allows configuring global dimming level. XMC_BCCU_SetGlobalDimmingLevel() + * -# Starts linear walk for multiple channels together. XMC_BCCU_ConcurrentStartLinearWalk(). + * -# Starts linear walk for single channel. XMC_BCCU_StartLinearWalk(). + * -# Starts dimming for multiple dimming engines together. XMC_BCCU_ConcurrentStartDimming(). + * -# Starts dimming for single dimming engine. XMC_BCCU_StartDimming(). + * + * BCCU_CH features: + * -# Configuration structure (XMC_BCCU_CH_t and initialization function XMC_BCCU_CH_Init() + * -# Allows selecting dimming engine. XMC_BCCU_CH_SelectDimEngine(). + * -# Allows setting target channel intensity. XMC_BCCU_CH_SetTargetIntensity(). + * -# Allows knowing the status of linear walk completion. XMC_BCCU_IsLinearWalkComplete() + * -# Allows setting flicker watchdog. XMC_BCCU_CH_EnableFlickerWatchdog(). + * -# Allows configuring packer settings. XMC_BCCU_CH_EnablePacker(), XMC_BCCU_CH_SetPackerThreshold(), + * XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOffCounte(), XMC_BCCU_CH_SetPackerOnCounter() + * -# Allows selecting dimming bypass. XMC_BCCU_CH_DisableDimmingBypass() + * + * BCCU_DIM features: + * -# Configuration structure (XMC_BCCU_DIM_t and initialization function XMC_BCCU_DIM_Init() + * -# Allows setting target dimming engine intensity. XMC_BCCU_DIM_SetTargetDimmingLevel(). + * XMC_BCCU_DIM_SetTargetDimmingLevel + * -# Allows knowing the status of dimming completion. XMC_BCCU_IsDimmingFinished() + * -# Allows configuring dimming divider. XMC_BCCU_DIM_SetDimDivider() + * -# Allows configuring dimming curve. XMC_BCCU_DIM_ConfigDimCurve() + * + * Recommended programming sequence: + * -# Set output passive and active levels using XMC_BCCU_ConcurrentSetOutputPassiveLevel() or XMC_BCCU_SetOutputPassiveLevel() + * -# Initializes global features using XMC_BCCU_GlobalInit() + * -# Initializes channel features using XMC_BCCU_CH_Init() + * -# Initializes dimming engine using XMC_BCCU_DIM_Init() + * -# Enable channels using XMC_BCCU_ConcurrentEnableChannels() or XMC_BCCU_EnableChannel() + * -# Enable dimming engines using XMC_BCCU_ConcurrentEnableDimmingEngine() or XMC_BCCU_EnableDimmingEngine() + * -# Configure channel linear walk prescaler using XMC_BCCU_CH_SetLinearWalkPrescaler() + * -# Configure dimming divider using XMC_BCCU_DIM_SetDimDivider() + * -# Set target intensities of channels using XMC_BCCU_CH_SetTargetIntensity() + * -# Set target dim levels of dimming engines using XMC_BCCU_DIM_SetTargetDimmingLevel() + * -# Start linear walk of the channels using XMC_BCCU_ConcurrentStartLinearWalk() or XMC_BCCU_StartLinearWalk() + * -# Start dimming of the dimming engines using XMC_BCCU_ConcurrentStartDimming() or XMC_BCCU_StartDimming() + * -# Check the status of linear walk completion using XMC_BCCU_IsLinearWalkComplete() + * -# Check the status of dimming completion XMC_BCCU_IsDimmingFinished() + * @{ + */ + +#if defined (BCCU0) + +/********************************************************************************************************************* + * MACROS + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * ENUMS + ********************************************************************************************************************/ +/** + * Defines the status of BCCU driver, to verify the related API calls. Use type \a XMC_BCCU_STATUS_t for this enum. + */ + typedef enum { + XMC_BCCU_STATUS_SUCCESS = 0U, /**< Operation completed successfully */ + XMC_BCCU_STATUS_ERROR = 1U, /**< Operation has some errors */ +} XMC_BCCU_STATUS_t; + +/** + * Provides the options to select bit clock mode. + */ +typedef enum { + XMC_BCCU_BCLK_MODE_NORMAL = 0U, /**< Normal Mode: Bit clock runs at 1/4 of fast clock */ + XMC_BCCU_BCLK_MODE_FAST = 1U, /**< Fast Mode: Bit clock runs at same as fast clock */ +} XMC_BCCU_BCLK_MODE_t; + +/** + * Provides the options to select trigger mode. + */ +typedef enum { + XMC_BCCU_TRIGMODE0 = 0U, /**< Mode0: Trigger on Any Channel using OR logic */ + XMC_BCCU_TRIGMODE1 = 1U, /**< Mode1: Trigger on Active channel using round-robin*/ +} XMC_BCCU_TRIGMODE_t; + +/** + * Provides the options to select trigger delay, and only be used if Bit clock in Normal mode + */ +typedef enum { + XMC_BCCU_TRIGDELAY_NO_DELAY = 0U, /**< BCCU trigger occurs on channel trigger(without delay) */ + XMC_BCCU_TRIGDELAY_QUARTER_BIT = 1U, /**< BCCU trigger occurs on 1/4 bit time delayed after channel trigger */ + XMC_BCCU_TRIGDELAY_HALF_BIT = 2U, /**< BCCU trigger occurs on 1/2 bit time delayed after channel trigger */ +} XMC_BCCU_TRIGDELAY_t; + +/** + * Provides the options to select suspend mode + */ +typedef enum { + XMC_BCCU_SUSPEND_MODE_IGNORE = 0U, /**< Request ignored, and module cannot get suspended */ + XMC_BCCU_SUSPEND_MODE_FREEZE = 1U, /**< All running channels gets stopped, and freeze into a last state (without safe stop) + */ + XMC_BCCU_SUSPEND_MODE_SAFE_FREEZE = 2U, /**< All running channels gets stopped, and freeze into a last state (with safe + stop) */ +} XMC_BCCU_SUSPEND_MODE_t; + +/** + * Provides the options to select trap edge + */ +typedef enum { + XMC_BCCU_TRAPEDGE_RISING = 0U, /**< Trap on rising edge of the BCCU.TRAPL signal */ + XMC_BCCU_TRAPEDGE_FALLING = 1U, /**< Trap on falling edge of the BCCU.TRAPL signal */ +} XMC_BCCU_TRAPEDGE_t; + +/** + * Provides the options to enable/disable the events. + * The members can be combined using 'OR' operator for multiple selection.
+ */ +typedef enum { + XMC_BCCU_EVENT_TRIGGER0 = 0x1U, /**< Trigger 0 event */ + XMC_BCCU_EVENT_TRIGGER1 = 0x2U, /**< Trigger 1 event */ + XMC_BCCU_EVENT_FIFOFULL = 0x4U, /**< FIFO Full event */ + XMC_BCCU_EVENT_FIFOEMPTY = 0x8U, /**< FIFO Empty event */ + XMC_BCCU_EVENT_TRAP = 0x10U, /**< Trap event */ +} XMC_BCCU_EVENT_t; + +/** + * Provides the options to know the status of the event flags. + * The members can be combined using 'OR' operator for multiple selection.
+ */ +typedef enum { + XMC_BCCU_EVENT_STATUS_TRIGGER0 = 0x1U, /**< Trigger 0 Event flag status */ + XMC_BCCU_EVENT_STATUS_TRIGGER1 = 0x2U, /**< Trigger 1 Event flag status */ + XMC_BCCU_EVENT_STATUS_FIFOFULL = 0x4U, /**< FIFO Full Event flag status */ + XMC_BCCU_EVENT_STATUS_FIFOEMPTY = 0x8U, /**< FIFO Empty Event flag status */ + XMC_BCCU_EVENT_STATUS_TRAP = 0x10U, /**< Trap Event flag status (Without Trap Set) */ + XMC_BCCU_EVENT_STATUS_TRAP_STATE = 0x40U, /**< Trap state flag status */ +} XMC_BCCU_EVENT_STATUS_t; + +/** + * Provides the options to know the status of trap occurrence + */ +typedef enum { + XMC_BCCU_TRAP_STATUS_DEACTIVE = 0x0U, /**< BCCU module is not in a Trap State */ + XMC_BCCU_TRAP_STATUS_ACTIVE = 0x1U, /**< BCCU module is in a Trap State */ +} XMC_BCCU_TRAP_STATUS_t; + +/** + * Provides the options to know the current level of trap + */ +typedef enum { + XMC_BCCU_TRAP_LEVEL_LOW = 0x0U, /**< BCCU.TRAPL is Low */ + XMC_BCCU_TRAP_LEVEL_HIGH = 0x1U, /**< BCCU.TRAPL is High */ +} XMC_BCCU_TRAP_LEVEL_t; + +/** + * Provides the options to select flicker watchdog enable/disable + */ +typedef enum { + XMC_BCCU_CH_FLICKER_WD_DS = 0U, /**< Disable: No control over a sigma-delta modulator output */ + XMC_BCCU_CH_FLICKER_WD_EN = 1U, /**< Enable: Limit consecutive zeros at sigma-delta modulator output */ +} XMC_BCCU_CH_FLICKER_WD_t; + +/** + * Provides the options to select gating functionality enable/disable, and be used for peak-current control + */ +typedef enum { + XMC_BCCU_CH_GATING_FUNC_DISABLE = 0U, /**< Disable: No control over a BCCU module output */ + XMC_BCCU_CH_GATING_FUNC_ENABLE = 1U, /**< Enable: External gating signal which controls BCCU module output */ +} XMC_BCCU_CH_GATING_FUNC_t; + +/** + * Provides the options to bypass dimming engine + */ +typedef enum { + XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_DISABLE = 0U, /**< Disable: Brightness = Dimming Level * Intensity */ + XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_ENABLE = 1U, /**< Enable: Brightness = Intensity */ +} XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_t; + +/** + * Provides the options to select passive level of the channel output + */ +typedef enum{ + XMC_BCCU_CH_ACTIVE_LEVEL_HIGH = 0U, /**< Default passive level of the channel is low */ + XMC_BCCU_CH_ACTIVE_LEVEL_LOW = 1U, /**< Default passive level of the channel is high */ +} XMC_BCCU_CH_ACTIVE_LEVEL_t; + +/** + * Provides the options to select trigger edge + */ +typedef enum +{ + XMC_BCCU_CH_TRIG_EDGE_PASS_TO_ACT = 0U, /**< Trigger on output transition from passive to active */ + XMC_BCCU_CH_TRIG_EDGE_ACT_TO_PASS = 1U, /**< Trigger on output transition from active to passive */ +} XMC_BCCU_CH_TRIG_EDGE_t; + +/** + * Provides the options to select source of trap input + */ +typedef enum +{ + XMC_BCCU_CH_TRAP_INA = 0x0U, /**< Trap INA */ + XMC_BCCU_CH_TRAP_INB = 0x1U, /**< Trap INB */ + XMC_BCCU_CH_TRAP_INC = 0x2U, /**< Trap INC */ + XMC_BCCU_CH_TRAP_IND = 0x3U, /**< Trap IND */ + XMC_BCCU_CH_TRAP_INE = 0x4U, /**< Trap INE */ + XMC_BCCU_CH_TRAP_INF = 0x5U, /**< Trap INF */ + XMC_BCCU_CH_TRAP_ING = 0x6U, /**< Trap ING */ + XMC_BCCU_CH_TRAP_INH = 0x7U, /**< Trap INH */ + XMC_BCCU_CH_TRAP_INI = 0x8U, /**< Trap INI */ + XMC_BCCU_CH_TRAP_INJ = 0x9U, /**< Trap INJ */ + XMC_BCCU_CH_TRAP_INK = 0xAU, /**< Trap INK */ + XMC_BCCU_CH_TRAP_INL = 0xBU, /**< Trap INL */ + XMC_BCCU_CH_TRAP_INM = 0xCU, /**< Trap INM */ + XMC_BCCU_CH_TRAP_INN = 0xDU, /**< Trap INN */ + XMC_BCCU_CH_TRAP_INO = 0xEU, /**< Trap INO */ + XMC_BCCU_CH_TRAP_INP = 0xFU, /**< Trap INP */ +} XMC_BCCU_CH_TRAP_IN_t; + +/** + * Provides the options to select edge for trap occurrence + */ +typedef enum +{ + XMC_BCCU_CH_TRAP_EDGE_RISING = 0U, /**< Trap on rising edge of the BCCU.TRAPL signal */ + XMC_BCCU_CH_TRAP_EDGE_FALLING = 1U /**< Trap on falling edge of the BCCU.TRAPL signal */ +} XMC_BCCU_CH_TRAP_EDGE_t; + +/** + * Provides the options to select trigger output, and only be used in XMC_BCCU_TRIGMODE1 + */ +typedef enum { + XMC_BCCU_CH_TRIGOUT0 = 0U, /**< Trigger occurrence on BCCU_TRIGOUT0 signal */ + XMC_BCCU_CH_TRIGOUT1 = 1U, /**< Trigger occurrence on BCCU_TRIGOUT1 signal */ +} XMC_BCCU_CH_TRIGOUT_t; + +/** + * Provides the options to select dimming source of the channel + */ +typedef enum { + XMC_BCCU_CH_DIMMING_SOURCE_GLOBAL = 7U, /**< Global Dimming Engine */ + XMC_BCCU_CH_DIMMING_SOURCE_DE0 = 0U, /**< Dimming Engine 0 */ + XMC_BCCU_CH_DIMMING_SOURCE_DE1 = 1U, /**< Dimming Engine 1 */ + XMC_BCCU_CH_DIMMING_SOURCE_DE2 = 2U, /**< Dimming Engine 2 */ +} XMC_BCCU_CH_DIMMING_SOURCE_t; + +/** + * Provides the options to select exponential dimming curve + */ +typedef enum { + XMC_BCCU_DIM_CURVE_COARSE = 0U, /**< Coarse curve: Slope of the linear pieces doubles every time, when it passes specific + thresholds of 16, 32, 64, 128, 256, 512, 1024, 2048 */ + XMC_BCCU_DIM_CURVE_FINE = 1U, /**< Fine Curve: More pieces and different line slopes */ +} XMC_BCCU_DIM_CURVE_t; + +/********************************************************************************************************************* + * DATA STRUCTURES + ********************************************************************************************************************/ +/** + * Redefinition of BCCU module structure; pointer to bccu module base address + */ +typedef BCCU_Type XMC_BCCU_t; + +/** + * Redefinition of BCCU module channel structure; pointer to bccu module channel Base address + */ +typedef BCCU_CH_Type XMC_BCCU_CH_t; + +/** + * Redefinition of BCCU module dimming engine structure; pointer to bccu module dimming engine base address + */ +typedef BCCU_DE_Type XMC_BCCU_DIM_t; + +/*Anonymous structure/union guard start*/ +#if defined(__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined(__TASKING__) + #pragma warning 586 +#endif + +/** + * Configures a global setting of the BCCU module. + */ +typedef struct XMC_BCCU_GLOBAL_CONFIG +{ + union{ + struct{ + uint32_t trig_mode:1; /**< Selects trigger Mode. Use type @ref XMC_BCCU_TRIGMODE_t */ + uint32_t : 1; + uint32_t trig_delay:2; /**< Selects trigger delay between channel & module trigger. \n Use type @ref + XMC_BCCU_TRIGDELAY_t */ + uint32_t : 12; + uint32_t maxzero_at_output:12; /**< Configures maximum 0's allowed at modulator output */ + }; + uint32_t globcon; /* Not to use */ + }; + union{ + struct{ + uint32_t fclk_ps:12; /**< Configures the ratio between fast clock and module clock */ + uint32_t : 3; + uint32_t bclk_sel:1; /**< Selects the bit clock. Use type @ref XMC_BCCU_BCLK_MODE_t */ + uint32_t dclk_ps:12; /**< Configures the ratio between dimmer clock and module clock */ + }; + uint32_t globclk; /* Not to use */ + }; + uint32_t global_dimlevel; /**< Configures global dimming engine dimming level */ +} XMC_BCCU_GLOBAL_CONFIG_t; + + +/** + * Configures global trigger settings of the BCCU module. + */ +typedef struct XMC_BCCU_TRIG_CONFIG +{ + XMC_BCCU_TRIGMODE_t mode; /**< Selects global trigger mode which decides when to occur BCCU trigger */ + XMC_BCCU_TRIGDELAY_t delay; /**< Selects global trigger delay between channel trigger & BCCU trigger */ + uint16_t mask_chans; /**< Channel mask to configure trigger settings for multiple channels For example: + If channel 0 and 7, wants to configure then the channel mask is 01000 0001 = 0x81\n*/ + uint16_t mask_trig_lines; /**< Trigger line mask */ +} XMC_BCCU_TRIG_CONFIG_t; + +/** + * Configures channel settings of the BCCU module. + */ +#ifdef DOXYGEN +typedef struct XMC_BCCU_CH_CONFIG +{ + uint32_t pack_thresh:3; /**< Configures packer threshold value of FIFO */ + uint32_t pack_en:1; /**< Enables a packed output bitstream */ + uint32_t dim_sel:3; /**< Selects a dimming engine source of the channel. \n Use type @ref XMC_BCCU_CH_DIMMING_SOURCE_t */ + uint32_t dim_bypass:1; /**< Selects dimming engine bypass enable. \n Use type @ref XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_t */ + uint32_t gate_en:1; /**< Selects gating enable. Use type @ref XMC_BCCU_CH_GATING_FUNC_t */ + uint32_t flick_wd_en:1; /**< Selects flicker watchdog enable. Use type @ref XMC_BCCU_CH_FLICKER_WD_t */ + uint32_t trig_edge:1; /**< Selects trigger edge. Use type @ref XMC_BCCU_CH_TRIG_EDGE_t */ + uint32_t force_trig_en:1; /**< Selects force trigger enable; generates a trigger if modulator output do not change\n for + 256 bclk cycles */ + uint32_t pack_offcmp_lev:8; /**< Configures a packer off-time compare level. When the off-time counter reaches this, the + measured on & off time counters are stored into FIFO */ + uint32_t pack_oncmp_lev:8; /**< Configures a packer on-time compare level. When the on-time counter reaches this,\n + the measured on & off time counters are stored into FIFO */ + uint32_t pack_offcnt_val:8; /**< Configures an initial packer off-time counter level, only if channel is disabled.
+ Controls phase shift of the modulator output */ + uint32_t pack_oncnt_val:8; /**< Configures an initial packer on-time counter level, only if channel is disabled.
+ Controls phase shift of the modulator output */ +}XMC_BCCU_CH_CONFIG_t; +#endif + +typedef struct XMC_BCCU_CH_CONFIG +{ + union{ + struct{ + uint32_t pack_thresh:3; /**< Configures packer threshold value of FIFO */ + uint32_t pack_en:1; /**< Enables a packed output bitstream */ + uint32_t dim_sel:3; /**< Selects a dimming engine source of the channel. \n Use type @ref XMC_BCCU_CH_DIMMING_SOURCE_t + */ + uint32_t dim_bypass:1; /**< Selects dimming engine bypass enable. \n Use type @ref XMC_BCCU_CH_DIMMING_ENGINE_BYPASS_t */ + uint32_t gate_en:1; /**< Selects gating enable. Use type @ref XMC_BCCU_CH_GATING_FUNC_t */ + uint32_t flick_wd_en:1; /**< Selects flicker watchdog enable. Use type @ref XMC_BCCU_CH_FLICKER_WD_t */ + uint32_t trig_edge:1; /**< Selects trigger edge. Use type @ref XMC_BCCU_CH_TRIG_EDGE_t */ + uint32_t force_trig_en:1; /**< Selects force trigger enable; generates a trigger if modulator output do not change\n + for 256 bclk cycles */ + }; + uint32_t chconfig; /* Not to use */ + }; + union{ + struct{ + uint32_t pack_offcmp_lev:8; /**< Configures a packer off-time compare level. When the off-time counter reaches \n + this, the measured on & off time counters are stored into FIFO */ + uint32_t : 8; + uint32_t pack_oncmp_lev:8; /**< Configures a packer on-time compare level. When the on-time counter reaches this,\n + the measured on & off time counters are stored into FIFO */ + }; + uint32_t pkcmp; /* Not to use */ + }; + union{ + struct{ + uint32_t pack_offcnt_val:8; /**< Configures an initial packer off-time counter level, only if channel is disabled.
+ Controls phase shift of the modulator output */ + uint32_t : 8; + uint32_t pack_oncnt_val:8; /**< Configures an initial packer on-time counter level, only if channel is disabled.
+ Controls phase shift of the modulator output */ + }; + uint32_t pkcntr; /* Not to use */ + }; +}XMC_BCCU_CH_CONFIG_t; + +/** + * Configures dimming engine settings of the BCCU module. + */ +#ifdef DOXYGEN +typedef struct XMC_BCCU_DIM_CONFIG +{ + uint32_t dim_div:10; /**< Configures a dimming clock divider, used to adjust the fade rate. If 0, the dimming level
+ as same as target dimming level on shadow transfer */ + uint32_t dither_en:1; /**< Selects a dither enable. Dithering added for every dimming step if dimming level < 128. */ + uint32_t cur_sel:1; /**< Selects a type of exponential curve. Use type @ref XMC_BCCU_DIM_CURVE_t. If dither
+ enabled, the configuration is being ignored */ +}XMC_BCCU_DIM_CONFIG_t; +#endif + +typedef struct XMC_BCCU_DIM_CONFIG +{ + union{ + struct{ + uint32_t dim_div:10; /**< Configures a dimming clock divider, used to adjust the fade rate. If 0, the dimming level
+ as same as target dimming level on shadow transfer */ + uint32_t : 6; + uint32_t dither_en:1; /**< Selects a dither enable. Dithering added for every dimming step if dimming level < 128. */ + uint32_t cur_sel:1; /**< Selects a type of exponential curve. Use type @ref XMC_BCCU_DIM_CURVE_t. If dither
+ enabled, the configuration is being ignored */ + }; + uint32_t dtt; /* Not to use */ + }; +}XMC_BCCU_DIM_CONFIG_t; + +/*Anonymous structure/union guard end*/ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__TASKING__) + #pragma warning restore +#endif +/********************************************************************************************************************* + * API PROTOTYPES + ********************************************************************************************************************/ +#ifdef __cplusplus +extern "C" { +#endif + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param config Pointer to constant bccu global configuration data structure. Use type @ref XMC_BCCU_GLOBAL_CONFIG_t. + * + * @return None + * + * \parDescription:
+ * Initializes three main clocks (fast clock, bit clock, dimmer clock) by using \a fclk_ps \a bclk_sel \a dclk_ps parameters + * and writing into a GLOBCLK register.\n + * And also configures a trigger mode, trigger delay, maximum 0's allowed at modulator output by writing into a GLOBCON + * register.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_Init(), XMC_BCCU_DIM_Init()\n\n\n +*/ +void XMC_BCCU_GlobalInit (XMC_BCCU_t *const bccu, const XMC_BCCU_GLOBAL_CONFIG_t *const config); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mode Trigger mode selection. \b Range: XMC_BCCU_TRIGMODE0, XMC_BCCU_TRIGMODE1.\n + * 1. XMC_BCCU_TRIGMODE0 - Trigger on Any Channel + * 2. XMC_BCCU_TRIGMODE1 - Trigger on Active channel + * @param delay Delay to avoid sampling during switching noise. Use type @ref XMC_BCCU_TRIGDELAY_t. \n + * \b Range: XMC_BCCU_NO_DELAY, XMC_BCCU_QUARTER_BIT_DELAY, XMC_BCCU_HALF_BIT_DELAY. + * + * @return None + * + * \parDescription:
+ * Configures trigger mode and trigger delay by writing register bits GLOBCON.TM, GLOBCON.TRDEL. \a mode and \a delay + * parameters which decides when to trigger a conversion of vadc module for voltage measurement. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableChannelTrigger(), XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), XMC_BCCU_GlobalInit(), + * XMC_BCCU_ReadLastTrigChanNr(), XMC_BCCU_GetChannelOutputLvlAtLastTrigger(), XMC_BCCU_CH_ConfigTrigger()\n\n\n + */ +void XMC_BCCU_ConfigGlobalTrigger(XMC_BCCU_t *const bccu, XMC_BCCU_TRIGMODE_t mode, XMC_BCCU_TRIGDELAY_t delay); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Source of Trigger mode. \b Range: 0 or 1 \n + * 0 - Trigger mode 0 (Trigger on Any Channel) \n + * 1 - Trigger mode 1 (Trigger on Active Channel)\n\n + * \parDescription:
+ * Retrieves global trigger mode of the BCCU module by reading the register bit GLOBCON_TM. Use XMC_BCCU_TRIGMODE_t type to + * validate a returned value.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), XMC_BCCU_GlobalInit()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadGlobalTrigger (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(bccu->GLOBCON & BCCU_GLOBCON_TM_Msk); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param input Trap input selection. Use type @ref XMC_BCCU_TRIGDELAY_t. + * \b Range: XMC_BCCU_TRIGDELAY_NO_DELAY, XMC_BCCU_TRIGDELAY_QUARTER_BIT, XMC_BCCU_TRIGDELAY_HALF_BIT. + * + * @return None + * + * \parDescription:
+ * Selects input of trap functionality by writing register bit GLOBCON_TRAPIS. The trap functionality is used to switch + * off the connected power devices when trap input becomes active.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetTrapEdge(), XMC_BCCU_ReadTrapInput(), XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentEnableTrap()\n\n\n + */ +void XMC_BCCU_SelectTrapInput (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_IN_t input); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Source of trap input. \b Range: 0 to 15 \n + * 0 - TRAPINA \n + * 1 - TRAPINB and so on. \n + * \parDescription:
+ * Retrieves trap input of the channel by reading the register bit GLOBCON_TRAPIS. Use XMC_BCCU_CH_TRAP_IN_t type to + * validate a returned value.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SelectTrapInput()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadTrapInput (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(( (bccu->GLOBCON) & BCCU_GLOBCON_TRAPIS_Msk) >> BCCU_GLOBCON_TRAPIS_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param edge Trap edge selection. Use type @ref XMC_BCCU_CH_TRAP_EDGE_t. \n + * \b Range: XMC_BCCU_CH_TRAP_EDGE_RISING, XMC_BCCU_CH_TRAP_EDGE_FALLING. + * + * @return None + * + * \parDescription:
+ * Selects active edge which detects trap on TRAPL signal by writing register bit GLOBCON_TRAPED.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SelectTrapInput(), XMC_BCCU_ReadTrapEdge(), XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentEnableTrap()\n\n\n + */ +void XMC_BCCU_SetTrapEdge (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_EDGE_t edge); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Trap edge selection. \b Range: 0 or 1 \n + * 0 - XMC_BCCU_CH_TRAP_EDGE_RISING \n + * 1 - XMC_BCCU_CH_TRAP_EDGE_FALLING. \n + * \parDescription:
+ * Retrieves trap edge by reading the register bit GLOBCON_TRAPED. Use XMC_BCCU_CH_TRAP_EDGE_t type to + * validate a returned value.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetTrapEdge()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadTrapEdge (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(( (bccu->GLOBCON) & BCCU_GLOBCON_TRAPED_Msk) >> BCCU_GLOBCON_TRAPED_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mode Suspend mode selection. Use type @ref XMC_BCCU_SUSPEND_MODE_t. \n + * \b Range: XMC_BCCU_SUSPEND_MODE_IGNORE, XMC_BCCU_SUSPEND_MODE_FREEZE, XMC_BCCU_USPEND_MODE_SAFE_FREEZE. \n + * + * @return None + * + * \parDescription:
+ * Configures suspend mode by writing register bit GLOBCON_SUSCFG.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ReadSuspendMode()\n\n\n + */ +void XMC_BCCU_ConfigSuspendMode (XMC_BCCU_t *const bccu, XMC_BCCU_SUSPEND_MODE_t mode); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Trap edge selection. \b Range: 0, 1, 2 \n + * 0 - XMC_BCCU_SUSPEND_MODE_IGNORE \n + * 1 - XMC_BCCU_SUSPEND_MODE_FREEZE. \n + * 2 - XMC_BCCU_USPEND_MODE_SAFE_FREEZE. \n + * \parDescription:
+ * Retrieves the state of suspend mode by reading the register bit GLOBCON_TRAPIS. Use XMC_BCCU_SUSPEND_MODE_t type to + * validate a returned value.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConfigSuspendMode()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadSuspendMode (XMC_BCCU_t *const bccu) +{ + return (uint32_t)( ((bccu->GLOBCON) & BCCU_GLOBCON_SUSCFG_Msk) >> BCCU_GLOBCON_SUSCFG_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Last triggered channel number. \b Range: 0 to 8\n + * 0 - BCCU Channel 0\n + * 1 - BCCU Channel 1 and so on.\n + * \parDescription:
+ * Retrieves last triggered channel number of a BCCU module by reading the register bit GLOBCON_LTRS.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_GetChannelOutputLvlAtLastTrigger(), XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), + * XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_GlobalInit()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadLastTrigChanNr (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(( (bccu->GLOBCON) & BCCU_GLOBCON_LTRS_Msk) >> BCCU_GLOBCON_LTRS_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param threshold_no Number of consecutive zeroes at modulator output. \b Range: 0 to 4095. + * + * @return None + * + * \parDescription:
+ * Configures number of consecutive zeroes allowed at modulator output (flicker watch-dog number) by writing register + * bit GLOBCON_WDMBN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_EnableFlickerWatchdog(), XMC_BCCU_ReadFlickerWDThreshold(), XMC_BCCU_CH_Init(), XMC_BCCU_CH_DisableFlickerWatchdog()\n\n\n + */ +void XMC_BCCU_SetFlickerWDThreshold (XMC_BCCU_t *const bccu, uint32_t threshold_no); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Number of consecutive zeroes at modulator output. \b Range: 0 to 4095 \n + * \parDescription:
+ * Retrieves number of consecutive zeroes at modulator output (flicker watchdog number) by reading the register bit + * GLOBCON_WDMBN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetFlickerWDThreshold(), XMC_BCCU_CH_EnableFlickerWatchdog(), XMC_BCCU_CH_Init(), XMC_BCCU_CH_DisableFlickerWatchdog()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadFlickerWDThreshold (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(( (bccu->GLOBCON) & BCCU_GLOBCON_WDMBN_Msk) >> BCCU_GLOBCON_WDMBN_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param div Prescaler factor. \b Range: 0 to 4095. + * + * @return None + * + * \parDescription:
+ * Configures trigger functionality clock prescaler factor of a BCCU module by writing register bit GLOBCLK_FCLK_PS.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_SelectBitClock(), XMC_BCCU_ReadFastClock()\n\n\n +*/ +void XMC_BCCU_SetFastClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Prescaler factor. \b Range: 0 to 4095 + * \parDescription:
+ * Retrieves fast clock prescaler factor of a BCCU module by reading the register bit GLOBCLK_FCLK_PS. The fast clock is + * derived from the bccu clock by prescaler factor i.e. fdclk = fbccu_clk / prescaler factor.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetFastClockPrescaler(), XMC_BCCU_ReadBitClock(), XMC_BCCU_ReadDimClock()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadFastClock (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(((bccu->GLOBCLK) & BCCU_GLOBCLK_FCLK_PS_Msk) >> BCCU_GLOBCLK_FCLK_PS_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param div Prescaler factor. \b Range: 0 to 4095. + * + * @return None + * + * \parDescription:
+ * Configures dimmer clock prescaler factor of a BCCU module by writing register bit GLOBCLK_DCLK_PS.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_SetDimDivider(), XMC_BCCU_SetFastClockPrescaler(), XMC_BCCU_SelectBitClock(), XMC_BCCU_ReadDimClock()\n\n\n + */ +void XMC_BCCU_SetDimClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Prescaler factor. \b Range: 0 to 4095 + * \parDescription:
+ * Retrieves dimmer clock prescaler factor of a BCCU module by reading the register bit GLOBCLK_DCLK_PS. The dim clock is + * derived from the bccu clock by prescaler factor. \n i.e. fdclk = fbccu_clk / prescaler factor.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_ReadBitClock(), XMC_BCCU_ReadFastClock()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadDimClock (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(((bccu->GLOBCLK) & BCCU_GLOBCLK_DCLK_PS_Msk) >> BCCU_GLOBCLK_DCLK_PS_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param div Prescaler factor. Use type @ref XMC_BCCU_BCLK_MODE_t. \n + * \b Range: XMC_BCCU_BCLK_MODE_NORMAL or XMC_BCCU_BCLK_MODE_FAST. \n + * @return None + * + * \parDescription:
+ * Configures modulator output (bit-time) clock prescaler factor of a BCCU module by writing register bit GLOBCLK_BCS.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetFastClockPrescaler(), XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_ReadBitClock()\n\n\n + */ +void XMC_BCCU_SelectBitClock (XMC_BCCU_t *const bccu, XMC_BCCU_BCLK_MODE_t div); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Prescaler factor. \b Range: 0 or 1 \n + * 0 - XMC_BCCU_BCLK_MODE_NORMAL \n + * 1 - XMC_BCCU_BCLK_MODE_FAST \n + * \parDescription:
+ * Retrieves modulator output (bit-time) clock prescaler factor of a BCCU module by reading the register bit GLOBCLK_BCS. + * Use XMC_BCCU_BCLK_MODE_t type to validate a returned value.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SelectBitClock(), XMC_BCCU_ReadDimClock(), XMC_BCCU_ReadFastClock()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadBitClock (XMC_BCCU_t *const bccu) +{ + return (uint32_t)(((bccu->GLOBCLK) & BCCU_GLOBCLK_BCS_Msk) >> BCCU_GLOBCLK_BCS_Pos); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Channel mask to enable multiple channels.\n + * For example: If channel 0, channel 7, channel 1 wants to enable at a same time, \n + * then channel mask is 01000 0011 = 0x83\n + * ------------------------------------------------------------------------------------------------------\n + * | Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |\n + * ------------------------------------------------------------------------------------------------------\n + * + * @return None + * + * \parDescription:
+ * Enables multiple channels at a same time using \a mask by writing a register CHEN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableChannel(), XMC_BCCU_ConcurrentDisableChannels()\n\n\n + */ +void XMC_BCCU_ConcurrentEnableChannels (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Channel mask to disable multiple channels.\n + * For example: If channel 0, channel 7, channel 1 wants to disable at a same time, \n + * then channel mask is 01000 0011 = 0x83\n + * ------------------------------------------------------------------------------------------------------\n + * | Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |\n + * ------------------------------------------------------------------------------------------------------\n + * + * @return None + * + * \parDescription:
+ * Disables multiple channels at a same time using \a mask by writing a register CHEN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConcurrentEnableChannels(), XMC_BCCU_DisableChannel()\n\n\n + */ +void XMC_BCCU_ConcurrentDisableChannels (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_mask Channel mask to enable multiple channels.\n + * For example: If channel 0, channel 7, channel 1 wants to enable at a same time, \n + * then channel mask is 01000 0011 = 0x83\n + * ------------------------------------------------------------------------------------------------------\n + * | Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |\n + * ------------------------------------------------------------------------------------------------------\n + * @param level Passive level selection. Use type @ref XMC_BCCU_CH_ACTIVE_LEVEL_t.\n + * \b Range: XMC_BCCU_CH_ACTIVE_LEVEL_HIGH or XMC_BCCU_CH_ACTIVE_LEVEL_LOW + * + * @return None + * + * \parDescription:
+ * Configures passive levels of multiple channels at a same time using \a mask by writing a register bit CHOCON_CHyOP.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetOutputPassiveLevel()\n\n\n + */ +void XMC_BCCU_ConcurrentSetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_mask, XMC_BCCU_CH_ACTIVE_LEVEL_t level); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Channel mask to enable multiple channels trap functionality.\n + * For example: If channel 0, channel 7, channel 1 wants to enable a trap functionality at a same time, \n + * then channel mask is 01000 0011 = 0x83\n + * ------------------------------------------------------------------------------------------------------\n + * | Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |\n + * ------------------------------------------------------------------------------------------------------\n + * + * @return None + * + * \parDescription:
+ * Enables multiple channels trap functionality at the same time using \a mask by writing a register bit CHOCON_CHyTPE.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentDisableTrap(), XMC_BCCU_SelectTrapInput(), XMC_BCCU_SetTrapEdge()\n\n\n + */ +void XMC_BCCU_ConcurrentEnableTrap (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Channel mask to disable multiple channels trap functionality. + * For example: If channel 0, channel 7, channel 1 wants to disable a trap functionality at a same time, \n + * then channel mask is 01000 0011 = 0x83\n + * ------------------------------------------------------------------------------------------------------\n + * | Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |\n + * ------------------------------------------------------------------------------------------------------\n + * + * @return None + * + * \parDescription:
+ * Disables multiple channels trap functionality at the same time using \a mask by writing a register bit CHOCON_CHyTPE.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DisableTrap(), XMC_BCCU_ConcurrentEnableTrap()\n\n\n + */ +void XMC_BCCU_ConcurrentDisableTrap (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param trig Pointer to a trigger configuration data structure. Use type @ref XMC_BCCU_TRIG_CONFIG_t. + * + * @return None + * + * \parDescription:
+ * Configures global trigger settings: trigger mode, trigger delay, individual trigger lines and channel mask by writing a \n + * registers GLOBCON and CHTRIG. Trigger mode decides when to generate a BCCU trigger, trigger delay postpones the channel \n + * trigger by 1/4, or 1/2 bclk cycles\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ReadLastTrigChanNr(), XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_GlobalInit()\n\n\n + */ +void XMC_BCCU_ConcurrentConfigTrigger (XMC_BCCU_t *const bccu, XMC_BCCU_TRIG_CONFIG_t *trig); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Channel mask to start a linear walk for multiple channels at a same time.\n + * For example: If channel 0, channel 7, channel 1 wants to start a linear walk at a same time, \n + * then channel mask is 01000 0011 = 0x83\n + * ------------------------------------------------------------------------------------------------------\n + * | Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |\n + * ------------------------------------------------------------------------------------------------------\n + * + * @return None + * + * \parDescription:
+ * After channel initialization, the outcome of executing the API starts changing the color smoothly towards to target \n + * for multiple channels at a same time using \a mask by writing a register CHSTRCON.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_StartLinearWalk(), XMC_BCCU_ConcurrentAbortLinearWalk()\n\n\n + */ +void XMC_BCCU_ConcurrentStartLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Channel mask to stop a linear walk for multiple channels at a same time.\n + * For example: If channel 0, channel 7, channel 1 wants to abort a linear walk at a same time, \n + * then channel mask is 01000 0011 = 0x83\n + * ------------------------------------------------------------------------------------------------------\n + * | Chan8 | Chan7 | Chan6 | Chan5 | Chan4 | Chan3 | Chan2 | Chan1 | Chan0 |\n + * ------------------------------------------------------------------------------------------------------\n + * + * @return None + * + * \parDescription:
+ * When the linear walk in progress, the outcome of executing the API is stopping the linear walk (i.e. color change) + * immediately for multiple channels at a same time using \a mask by writing a register CHSTRCON.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_AbortLinearWalk(), XMC_BCCU_ConcurrentStartLinearWalk()\n\n\n + */ +void XMC_BCCU_ConcurrentAbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Dimming engine mask to enable multiple dimming engine at a same time.\n + * For example: If dimming engine 0, channel 2 wants to enable a dimming at a same time, + * then dimming engine mask is 0101 = 0x03\n + * --------------------------\n + * | DE2 | DE1 | DE0 |\n + * --------------------------\n + * + * @return None + * + * \parDescription:
+ * Enables multiple dimming engines at a same time using \a mask by writing a register DEEN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableDimmingEngine(), XMC_BCCU_ConcurrentDisableDimmingEngine()\n\n\n + */ +void XMC_BCCU_ConcurrentEnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Dimming engine mask to disable multiple dimming engine at a same time.\n + * For example: If dimming engine 0, channel 2 wants to disable a dimming at a same time, + * then dimming engine mask is 0101 = 0x03\n + * --------------------------\n + * | DE2 | DE1 | DE0 |\n + * --------------------------\n + * + * @return None + * + * \parDescription:
+ * Disables multiple dimming engines at a same time using \a mask by writing a register DEEN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DisableDimmingEngine(), XMC_BCCU_ConcurrentEnableDimmingEngine()\n\n\n + */ +void XMC_BCCU_ConcurrentDisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Dimming engine mask to start a dimming for multiple dimming engines at a same time.\n + * For example: If dimming engine 0, channel 2 wants to start a dimming at a same time, + * then dimming engine mask is 0101 = 0x03\n + * --------------------------\n + * | DE2 | DE1 | DE0 |\n + * --------------------------\n + * + * @return None + * + * \parDescription:
+ * After dimming engine initialization, the outcome of executing the API starts changing the brightness towards to target + * for multiple dimming engines at a same time using \a mask by writing a register DESTRCON.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_StartDimming(), XMC_BCCU_ConcurrentAbortDimming()\n\n\n + */ +void XMC_BCCU_ConcurrentStartDimming (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param mask Dimming engine mask to abort a dimming for multiple dimming engines at a same time.\n + * For example: If dimming engine 0, channel 2 wants to abort a dimming at a same time, + * then dimming engine mask is 0101 = 0x03\n + * --------------------------\n + * | DE2 | DE1 | DE0 |\n + * --------------------------\n + * + * @return None + * + * \parDescription:
+ * When the dimming in progress, the outcome of executing the API is stopping the dimming (i.e. fading) + * immediately for specific dimming engine number \a dim_no by writing a register DESTRCON.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_AbortDimming(), XMC_BCCU_ConcurrentStartDimming()\n\n\n + */ +void XMC_BCCU_ConcurrentAbortDimming (XMC_BCCU_t *const bccu, uint32_t mask); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param level Dimming level of global dimming engine. \b Range: 0 to 4095\n + * + * @return None + * + * \parDescription:
+ * Configures a global dimming level by writing a register GLOBDIM. This is useful only if global dimming engine selected. + * Otherwise the configuration is ignored. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_SetTargetDimmingLevel()\n\n\n + */ +void XMC_BCCU_SetGlobalDimmingLevel (XMC_BCCU_t *const bccu, uint32_t level); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param event Event mask to enable multiple events at a time using ORed values of @ref XMC_BCCU_EVENT_t.\n + * For example: If XMC_BCCU_EVENT_TRIGGER0, XMC_BCCU_EVENT_TRIGGER1, XMC_BCCU_EVENT_FIFOEMPTY wants to enable + * at a same time,\n then event mask is = (XMC_BCCU_EVENT_TRIGGER0 | XMC_BCCU_EVENT_TRIGGER1 | + * XMC_BCCU_EVENT_FIFOEMPTY) \n + * + * @return None + * + * \parDescription:
+ * Enables multiple interrupt events at a same time using ORed values of @ref XMC_BCCU_EVENT_t by writing a register EVIER.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DisableInterrupt()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_EnableInterrupt (XMC_BCCU_t *const bccu, uint32_t event) +{ + bccu->EVIER |= event; +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param event Event mask to disable multiple events at a time using ORed values of @ref XMC_BCCU_EVENT_t.\n + * For example: If XMC_BCCU_EVENT_TRIGGER0, XMC_BCCU_EVENT_TRIGGER1, XMC_BCCU_EVENT_FIFOEMPTY wants to disable\n + * at a same time, then event mask is = (XMC_BCCU_EVENT_TRIGGER0 | XMC_BCCU_EVENT_TRIGGER1 | + * XMC_BCCU_EVENT_FIFOEMPTY) \n + * + * @return None + * + * \parDescription:
+ * Disables multiple interrupt events at a same time using ORed values of @ref XMC_BCCU_EVENT_t by writing a register EVIER.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableInterrupt()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_DisableInterrupt (XMC_BCCU_t *const bccu, uint32_t event) +{ + bccu->EVIER &= (uint32_t)~(event); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * + * @return Interrupt events flags at a same time using ORed values of @ref XMC_BCCU_EVENT_t. + * \parDescription:
+ * Retrieves interrupt event flags at the same time using ORed values of @ref XMC_BCCU_EVENT_t by reading the register \n + * EVFR. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetEventFlag()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_ReadEventFlag (XMC_BCCU_t *const bccu) +{ + return (bccu->EVFR); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param flag_type Event flag mask to configure multiple events at a time using ORed values of @ref + * XMC_BCCU_EVENT_STATUS_t.\n + * For example: If XMC_BCCU_EVENT_STATUS_TRIGGER0, XMC_BCCU_EVENT_STATUS_TRIGGER1, XMC_BCCU_EVENT_STATUS_FIFOEMPTY + * wants to configure at a same time, then event mask is = (XMC_BCCU_EVENT_STATUS_TRIGGER0 | XMC_BCCU_EVENT_STATUS_TRIGGER1 | + * XMC_BCCU_EVENT_STATUS_FIFOEMPTY) \n + * + * @return None + * + * \parDescription:
+ * Configures multiple interrupt event flags at a same time using ORed values of @ref XMC_BCCU_EVENT_STATUS_t by writing a register EVFSR.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ClearEventFlag(), XMC_BCCU_ReadEventFlag()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_SetEventFlag (XMC_BCCU_t *const bccu, uint32_t flag_type) +{ + bccu->EVFSR = flag_type; +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param flag_type event flag mask to clear multiple events at a time using ORed values of @ref + * XMC_BCCU_EVENT_STATUS_t.\n + * For example: If XMC_BCCU_EVENT_STATUS_TRIGGER0, XMC_BCCU_EVENT_STATUS_TRIGGER1, XMC_BCCU_EVENT_STATUS_FIFOEMPTY + * wants to clear at a same time, then event mask is = (XMC_BCCU_EVENT_STATUS_TRIGGER0 | XMC_BCCU_EVENT_STATUS_TRIGGER1 | + * XMC_BCCU_EVENT_STATUS_FIFOEMPTY) \n + * + * @return None + * + * \parDescription:
+ * Clears multiple interrupt event flags at a same time using ORed values of @ref XMC_BCCU_EVENT_STATUS_t by writing a + * register EVFSR.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetEventFlag()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_ClearEventFlag (XMC_BCCU_t *const bccu, uint32_t flag_type) +{ + bccu->EVFCR = flag_type; +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Specific channel number to enable. \b Range: 0 to 8\n + * + * @return None + * + * \parDescription:
+ * Enables a specific channel number using \a chan_no by writing a register CHEN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConcurrentEnableChannels(), XMC_BCCU_DisableChannel()\n\n\n + */ +void XMC_BCCU_EnableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Specific channel number to disable. \b Range: 0 to 8\n + * + * @return None + * + * \parDescription:
+ * Disables a specific channel number using \a chan_no by writing a register CHEN.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConcurrentDisableChannels(), XMC_BCCU_EnableChannel()\n\n\n + */ +void XMC_BCCU_DisableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Specific channel number to enable specific channel. \b Range: 0 to 8\n + * @param level Passive level selection. Use type @ref XMC_BCCU_CH_ACTIVE_LEVEL_t.\n + * \b Range: XMC_BCCU_CH_ACTIVE_LEVEL_HIGH or XMC_BCCU_CH_ACTIVE_LEVEL_LOW + * + * @return None + * + * \parDescription:
+ * Configures passive level of specific channel using \a chan_no by writing a register bit CHOCON_CHyOP.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConcurrentSetOutputPassiveLevel()\n\n\n + */ +void XMC_BCCU_SetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_ACTIVE_LEVEL_t level); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Channel number to enable specific channel trap functionality. \b Range: 0 to 8 + * + * @return None + * + * \parDescription:
+ * Enables specific channel trap functionality using \a chan_no by writing a register bit CHOCON_CHyTPE.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DisableTrap(), XMC_BCCU_ConcurrentEnableTrap(), XMC_BCCU_SelectTrapInput(), XMC_BCCU_SetTrapEdge()\n\n\n + */ +void XMC_BCCU_EnableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Channel number to disable specific channel trap functionality. \b Range: 0 to 8 + * + * @return None + * + * \parDescription:
+ * Disables specific channel trap functionality using \a chan_no by writing a register bit CHOCON_CHyTPE.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableTrap(), XMC_BCCU_ConcurrentDisableTrap()\n\n\n + */ +void XMC_BCCU_DisableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Channel number to trigger a specific channel. \b Range: 0 to 8 + * @param trig_line Trigger line number to trigger a vadc. Use type @ref XMC_BCCU_CH_TRIGOUT_t.\n + * \b Range: XMC_BCCU_CH_TRIGOUT0 or XMC_BCCU_CH_TRIGOUT1 + * + * @return None + * + * \parDescription:
+ * Enables specific channel trigger using \a chan_no by writing a register bit CHOCON_CHyTPE.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_DisableChannelTrigger(), XMC_BCCU_CH_ConfigTrigger()\n\n\n + */ +void XMC_BCCU_EnableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_TRIGOUT_t trig_line); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Channel number to trigger a specific channel. \b Range: 0 to 8 + * + * @return None + * + * \parDescription:
+ * Disables specific channel trigger using \a chan_no by writing a register bit CHOCON_CHyTPE.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableChannelTrigger()\n\n\n + */ +void XMC_BCCU_DisableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param config Pointer to constant bccu channel configuration data structure. Use type @ref XMC_BCCU_CH_CONFIG_t. + * + * @return None + * + * \parDescription:
+ * Configures dimming engine source, dimming bypass selection, channel trigger edge, flicker watchdog selection and force + * trigger selection by using \a dim_sel, \a dim_bypass, \a trig_edge, \a flick_wd_en, \a force_trig_en by writing into a + * CHCONFIG register. And also configures packer settings: threshold, off and on compare levels, initial values of off & on + * counters, by writing into a CHCONFIG, PKCMP and PKCNTR registers.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_GlobalInit(), XMC_BCCU_DIM_Init()\n\n\n + */ +void XMC_BCCU_CH_Init (XMC_BCCU_CH_t *const channel, const XMC_BCCU_CH_CONFIG_t *const config); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param edge Output transition selection. Use type @ref XMC_BCCU_CH_TRIG_EDGE_t. \n + * \b Range: XMC_BCCU_CH_TRIG_EDGE_PASS_TO_ACT or XMC_BCCU_CH_TRIG_EDGE_ACT_TO_PASS\n + * @param force_trig_en Forcing a trigger at output. \b Range: 0 or 1\n + * Generates a trigger if modulator output do not change for 256 bclk cycles\n + * + * @return None + * + * \parDescription:
+ * Configures global trigger settings: trigger edge, force trigger enable by writing a register CHCONFIG. + * And also configures force trigger enable, generates a trigger if modulator output do not change for 256 bclk cycles + * + * \parRelated APIs:
+ * XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_EnableChannelTrigger()\n\n\n + */ +void XMC_BCCU_CH_ConfigTrigger (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_TRIG_EDGE_t edge, uint32_t force_trig_en); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Specific channel number to start color change \b Range: 0 to 8\n + * + * @return None + * + * \parDescription:
+ * After channel initialization, the outcome of executing the API starts changing the color smoothly towards to target + * by writing a register bit CHSTRCON_CHyS.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_AbortLinearWalk(), XMC_BCCU_CH_SetTargetIntensity(), XMC_BCCU_IsLinearWalkComplete(), + * XMC_BCCU_ConcurrentStartLinearWalk()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_StartLinearWalk (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + bccu->CHSTRCON |= (uint32_t)(BCCU_CHSTRCON_CH0S_Msk << chan_no); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Specific channel number to stop color change \b Range: 0 to 8\n + * + * @return None + * + * \parDescription:
+ * When the linear walk in progress, the outcome of executing the API is stopping the linear walk (i.e. color change) + * immediately for specific channels number using \a mask by writing a register CHSTRCON_CHyA.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_StartLinearWalk(), XMC_BCCU_ConcurrentAbortLinearWalk()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_AbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + bccu->CHSTRCON |= (uint32_t)(BCCU_CHSTRCON_CH0A_Msk << chan_no); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Specific channel number to get an output level on last trigger. \b Range: 0 to 8\n + * + * @return Trap channel output level. \b Range: 0 or 1 + * \parDescription:
+ * Retrieves output level of specific channel number when last trigger occurred by reading the register bit LTCHOL_LTOLy. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_ReadLastTrigChanNr(), XMC_BCCU_ConfigGlobalTrigger(), XMC_BCCU_ConcurrentConfigTrigger(), + * XMC_BCCU_ReadGlobalTrigger(), XMC_BCCU_GlobalInit()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_GetChannelOutputLvlAtLastTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + return (uint32_t)((bccu->LTCHOL & (BCCU_LTCHOL_LTOL0_Msk << chan_no)) >> chan_no); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param clk_div Prescaler factor. \b Range: 0 to 1023 + * + * @return None + * + * \parDescription:
+ * configure the linear walker clock prescaler factor by writing register bit CHCONFIG_LINPRES.\n\n + * + */ +void XMC_BCCU_CH_SetLinearWalkPrescaler (XMC_BCCU_CH_t *const channel, uint32_t clk_div); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param chan_no Channel number to know the linear walk completion status. \b Range: 0 to 8\n + * + * @return Linear walk completion status. \b Range: 0-Completed or 1-intensity start changing towards the target + * \parDescription:
+ * Retrieves linear walk completion status for specific channel using \a chan_no by reading the register bit CHSTRCON_CHyS. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetTargetIntensity(), XMC_BCCU_StartLinearWalk()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_IsLinearWalkComplete (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + return (uint32_t)((bccu->CHSTRCON & (BCCU_CHSTRCON_CH0S_Msk << chan_no)) >> chan_no); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param ch_int Target channel intensity. \b Range: 0 to 4095 + * + * @return None + * + * \parDescription:
+ * Configures target channel intensity by writing register INTS, only be written if no shadow transfer of linear walk. + * Use XMC_BCCU_IsLinearWalkComplete() to know shadow transfer finished \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_IsLinearWalkComplete(), XMC_BCCU_StartLinearWalk(), XMC_BCCU_CH_ReadIntensity()\n\n\n + */ +void XMC_BCCU_CH_SetTargetIntensity (XMC_BCCU_CH_t *const channel, uint32_t ch_int); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return Current channel intensity. \b Range: 0 or 4095 + * \parDescription:
+ * Retrieves current channel intensity by reading the register INT.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetTargetIntensity()\n\n\n + */ +uint32_t XMC_BCCU_CH_ReadIntensity (XMC_BCCU_CH_t *const channel); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param thresh Packer threshold value of FIFO. It defines number of queue stages must be filled before output generator + * starts generating the pulses. Until that, only off-bits are generated at the output.\n + * @param off_comp Packer off-time compare level. When the off-time counter reaches this, the measured on off time + * counters are stored into FIFO + * @param on_comp Packer on-time compare level. When the on-time counter reaches this, the measured on & off time + * counters are stored into FIFO + * + * @return None + * + * \parDescription:
+ * Enables packer by writing register bit CHCONFIG_PEN. And also configures packer threshold, off and on compare levels + * by writing register PKCMP. The main purpose of the packer is to decrease the average rate of switching of the output + * signal, to decrease the load on external switching circuits and improve EMC behavior\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_DisablePacker(), XMC_BCCU_CH_SetPackerThreshold(), XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOnCompare\n\n\n + */ +void XMC_BCCU_CH_EnablePacker (XMC_BCCU_CH_t *const channel, uint32_t thresh, uint32_t off_comp, uint32_t on_comp); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param val Packer threshold value of FIFO + * + * @return None + * + * \parDescription:
+ * Configures packer threshold by writing register bit CHCONFIG_PKTH\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOnCompare, XMC_BCCU_CH_ReadPackerThreshold()\n\n\n + */ +void XMC_BCCU_CH_SetPackerThreshold (XMC_BCCU_CH_t *const channel, uint32_t val); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param level Packer off-time compare level. When the off-time counter reaches this, the measured on & off time counters + * are stored into FIFO + * + * @return None + * + * \parDescription:
+ * Configures packer off compare level by writing register bit PKCMP_OFFCMP\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerThreshold(), XMC_BCCU_CH_SetPackerOnCompare(), XMC_BCCU_CH_SetPackerOffCounter(), + * XMC_BCCU_CH_ReadPackerOffCompare()\n\n\n + */ +void XMC_BCCU_CH_SetPackerOffCompare (XMC_BCCU_CH_t *const channel, uint32_t level); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param level Packer on-time compare level. When the on-time counter reaches this, the measured on & off time counters + * are stored into FIFO + * + * @return None + * + * \parDescription:
+ * Configures packer on compare level by writing register bit PKCMP_ONCMP\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerThreshold(), XMC_BCCU_CH_SetPackerOffCompare(), XMC_BCCU_CH_SetPackerOnCounter(), + * XMC_BCCU_CH_ReadPackerOnCompare()\n\n\n + */ +void XMC_BCCU_CH_SetPackerOnCompare (XMC_BCCU_CH_t *const channel, uint32_t level); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return Packer threshold value of FIFO + * \parDescription:
+ * Retrieves packer threshold value by reading the register bit CHCONFIG_PKTH.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerThreshold()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_CH_ReadPackerThreshold (XMC_BCCU_CH_t *const channel) +{ + return (uint32_t)((channel->CHCONFIG) & BCCU_CH_CHCONFIG_PKTH_Msk); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return Packer off-time compare level. When the off-time counter reaches this, the measured on & off time counters + * are stored into FIFO + * \parDescription:
+ * Retrieves packer off compare level by reading the register bit PKCMP_OFFCMP.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerOffCompare()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_CH_ReadPackerOffCompare (XMC_BCCU_CH_t *const channel) +{ + return (uint32_t)((channel->PKCMP) & BCCU_CH_PKCMP_OFFCMP_Msk); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return Packer on-time compare level. When the on-time counter reaches this,
+ * the measured on & off time counters are stored into FIFO + * \parDescription:
+ * Retrieves packer on compare level by reading the register bit PKCMP_ONCMP.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerOnCompare()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_CH_ReadPackerOnCompare (XMC_BCCU_CH_t *const channel) +{ + return (uint32_t)(((channel->PKCMP) & BCCU_CH_PKCMP_ONCMP_Msk) >> BCCU_CH_PKCMP_ONCMP_Pos); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return None + * + * \parDescription:
+ * Disables packer by clearing writing register bit CHCONFIG_PEN. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_EnablePacker()\n\n\n + */ +void XMC_BCCU_CH_DisablePacker (XMC_BCCU_CH_t *const channel); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param cnt_val Configures an initial packer off-time counter level, only if channel is disabled. Controls phase + * shift of the modulator output + * + * @return None + * + * \parDescription:
+ * Configures packer initial off counter value by writing register bit PKCNTR_OFFCNTVAL\n + * Note: Shall only be called if channel disabled.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerOnCounter(), XMC_BCCU_CH_SetPackerOffCompare()\n\n\n + */ +void XMC_BCCU_CH_SetPackerOffCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param cnt_val Configures an initial packer on-time counter level, only if channel is disabled. Controls phase shift + * of the modulator output + * + * @return None + * + * \parDescription:
+ * Configures packer initial on counter value by writing register bit PKCNTR_ONCNTVAL\n + * Note: Shall only be called if channel disabled.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SetPackerOffCounter(), XMC_BCCU_CH_SetPackerOnCompare()\n\n\n + */ +void XMC_BCCU_CH_SetPackerOnCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * @param sel Selects a dimming engine source of the channel. Use type @ref XMC_BCCU_CH_DIMMING_SOURCE_t + * + * @return None + * + * \parDescription:
+ * Configures dimming engine source by writing register bit CHCONFIG_DSEL\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_EnableDimmingBypass()\n\n\n + */ +void XMC_BCCU_CH_SelectDimEngine (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_DIMMING_SOURCE_t sel); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return None + * + * \parDescription:
+ * Enables dimming engine bypass by writing register bit CHCONFIG_DBP. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_SelectDimEngine(), XMC_BCCU_CH_DisableDimmingBypass()\n\n\n + */ +void XMC_BCCU_CH_EnableDimmingBypass (XMC_BCCU_CH_t *const channel); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return None + * + * \parDescription:
+ * Disables dimming engine bypass by clearing register bit CHCONFIG_DBP. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_EnableDimmingBypass()\n\n\n + */ +void XMC_BCCU_CH_DisableDimmingBypass (XMC_BCCU_CH_t *const channel); + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return None + * + * \parDescription:
+ * Enables gating feature by writing register bit CHCONFIG_GEN. The gating feature is used to enable fast control schemes, + * such as peak-current control and this has been controlled by Analog Comparator module.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_DisableGating()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_CH_EnableGating (XMC_BCCU_CH_t *const channel) +{ + channel->CHCONFIG |= (uint32_t)(BCCU_CH_CHCONFIG_GEN_Msk); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return None + * + * \parDescription:
+ * Disables gating feature by writing register bit CHCONFIG_GEN. The gating feature is used to enable/disable fast control + * schemes, such as peak-current control and this has been controlled by Analog Comparator module. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_CH_EnableGating()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_CH_DisableGating (XMC_BCCU_CH_t *const channel) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_GEN_Msk); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return None + * + * \parDescription:
+ * Enables flicker watchdog by writing register bit CHCONFIG_WEN. And limits the sigma-delta modulator output\n + * according to Watchdog threshold\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetFlickerWDThreshold(), XMC_BCCU_ReadFlickerWDThreshold(), XMC_BCCU_CH_Init(), + * XMC_BCCU_CH_DisableFlickerWatchdog()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_CH_EnableFlickerWatchdog (XMC_BCCU_CH_t *const channel) +{ + channel->CHCONFIG |= (uint32_t)(BCCU_CH_CHCONFIG_WEN_Msk); +} + +/** + * + * @param channel Base address of the bccu channel. \b Range: BCCU0_CH0, BCCU0_CH1.. + * + * @return None + * + * \parDescription:
+ * Disables flicker watchdog by writing register bit CHCONFIG_WEN. No limits the sigma-delta modulator output + * according to Watchdog threshold\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetFlickerWDThreshold(), XMC_BCCU_ReadFlickerWDThreshold(), XMC_BCCU_CH_Init(), + * XMC_BCCU_CH_EnableFlickerWatchdog()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_CH_DisableFlickerWatchdog (XMC_BCCU_CH_t *const channel) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_WEN_Msk); +} + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * @param config Pointer to constant dimming engine configuration data structure. Use type @ref XMC_BCCU_DIM_CONFIG_t. + * + * @return None + * + * \parDescription:
+ * Configures dimming clock divider to adjust the fade rate, dither selection and exponential curve selection using \a + * dim_div, \a dither_en, \a cur_sel parameters and by writing into a DTT register.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_GlobalInit(), XMC_BCCU_CH_Init()\n\n\n + */ +void XMC_BCCU_DIM_Init (XMC_BCCU_DIM_t *const dim_engine, const XMC_BCCU_DIM_CONFIG_t *const config); + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param dim_no Specific dimming engine number to enable. \b Range: 0 to 2\n + * + * @return None + * + * \parDescription:
+ * Enables a specific dimming engine number using \a dim_no by writing a register bit DEEN_EDEy.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DisableDimmingEngine(), XMC_BCCU_ConcurrentEnableDimmingEngine()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_EnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t dim_no) +{ + bccu->DEEN |= (uint32_t)(BCCU_DEEN_EDE0_Msk << dim_no); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param dim_no Specific dimming engine number to disable. \b Range: 0 to 2\n + * + * @return None + * + * \parDescription:
+ * Disables a specific dimming engine number using \a dim_no by clearing a register bit DEEN_EDEy.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_EnableDimmingEngine(), XMC_BCCU_ConcurrentDisableDimmingEngine()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_DisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t dim_no) +{ + bccu->DEEN &= ~(uint32_t)(BCCU_DEEN_EDE0_Msk << dim_no); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param dim_no Specific dimming engine number to start dimming process \b Range: 0 to 2\n + * + * @return None + * + * \parDescription:
+ * After dimming engine initialization, the outcome of executing the API starts changing the brightness towards to target + * by writing a register bit DESTRCON_DEyS.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_AbortDimming(), XMC_BCCU_ConcurrentStartDimming()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_StartDimming (XMC_BCCU_t *const bccu, uint32_t dim_no) +{ + bccu->DESTRCON = (uint32_t)(BCCU_DESTRCON_DE0S_Msk << dim_no); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param dim_no Specific dimming engine number to stop dimming process \b Range: 0 to 2\n + * + * @return None + * + * \parDescription:
+ * When the dimming in progress, the outcome of executing the API is stopping the dimming (i.e. fading) + * immediately for specific dimming engine number \a dim_no by writing a register bit DESTRCON_DEyA.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_StartDimming(), XMC_BCCU_ConcurrentAbortDimming()\n\n\n + */ +__STATIC_INLINE void XMC_BCCU_AbortDimming (XMC_BCCU_t *const bccu, uint32_t dim_no) +{ + bccu->DESTRCON = (uint32_t)(BCCU_DESTRCON_DE0A_Msk << dim_no); +} + +/** + * + * @param bccu Base address of the bccu module. \b Range: BCCU0 + * @param dim_no Specific dimming engine number to know the dimming status. \b Range: 0 to 2\n + * + * @return Dimming completion status. \b Range: 0-Completed or 1-start change towards the target + * \parDescription:
+ * Retrieves dimming completion status for specific dimming engine number using \a dim_no by reading the register bit + * DESTRCON_DEyS. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_SetTargetDimmingLevel(), XMC_BCCU_StartDimming()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_IsDimmingFinished (XMC_BCCU_t *const bccu, uint32_t dim_no) +{ + return (uint32_t)((bccu->DESTRCON & (BCCU_DESTRCON_DE0S_Msk << dim_no)) >> dim_no); +} + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * @param level Target dimming level. \b Range: 0 to 4095 + * + * @return None + * + * \parDescription:
+ * Configures target dimming level by writing register DLS, only be written if no shadow transfer of dimming. + * Use XMC_BCCU_IsDimmingFinished() to know shadow transfer finished \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_StartDimming(), XMC_BCCU_IsDimmingFinished(), XMC_BCCU_SetGlobalDimmingLevel(), \n + * XMC_BCCU_DIM_ReadDimmingLevel()\n\n\n + */ +void XMC_BCCU_DIM_SetTargetDimmingLevel (XMC_BCCU_DIM_t *const dim_engine, uint32_t level); + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * + * @return Current dimming level. \b Range: 0 or 4095 + * \parDescription:
+ * Retrieves current dimming level by reading the register DE_DL_DLEV.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_SetTargetDimmingLevel()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_DIM_ReadDimmingLevel (XMC_BCCU_DIM_t *const dim_engine) +{ + return (uint32_t)(dim_engine->DL & BCCU_DE_DL_DLEV_Msk); +} + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * @param div Dimming clock divider, used to adjust the fade rate. If 0, the dimming level + as same as target dimming level on shadow transfer\n + * + * @return None + * + * \parDescription:
+ * Configures dimming clock divider by writing register bit DE_DTT_DIMDIV.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_SetDimClockPrescaler(), XMC_BCCU_DIM_ReadDimDivider()\n\n\n + */ +void XMC_BCCU_DIM_SetDimDivider (XMC_BCCU_DIM_t *const dim_engine, uint32_t div); + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * + * @return Dimming clock divider value. \b Range: 0 to 1023 + * \parDescription:
+ * Retrieves dimming clock divider value by reading the register BCCU_DE_DTT_DIMDIV.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_SetDimDivider()\n\n\n + */ + __STATIC_INLINE uint32_t XMC_BCCU_DIM_ReadDimDivider(XMC_BCCU_DIM_t *const dim_engine) +{ + return (uint32_t)(dim_engine->DTT & BCCU_DE_DTT_DIMDIV_Msk); +} + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * @param dither_en Dither enable. Dithering added for every dimming step if dimming level < 128.
+ * @param sel Type of exponential curve. Use type @ref XMC_BCCU_DIM_CURVE_t. Note: If dither + enabled, the configuration is being ignored\n + * + * @return None + * + * \parDescription:
+ * Configures dimming clock curve by writing register bit DE_DTT_CSEL.\n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_Init()\n\n\n + */ +void XMC_BCCU_DIM_ConfigDimCurve (XMC_BCCU_DIM_t *const dim_engine, uint32_t dither_en, XMC_BCCU_DIM_CURVE_t sel); + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * + * @return Type of exponential curve \b Range: XMC_BCCU_DIM_CURVE_COARSE or XMC_BCCU_DIM_CURVE_FINE + * \parDescription:
+ * Retrieves exponential curve type by reading the register bit BCCU_DE_DTT_CSEL. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_ConfigDimCurve(), XMC_BCCU_IsDitherEnable()\n\n\n + */ +__STATIC_INLINE XMC_BCCU_DIM_CURVE_t XMC_BCCU_DIM_GetDimCurve (XMC_BCCU_DIM_t *const dim_engine) +{ + return (XMC_BCCU_DIM_CURVE_t)((dim_engine->DTT & BCCU_DE_DTT_CSEL_Msk) >> BCCU_DE_DTT_CSEL_Pos); +} + +/** + * + * @param dim_engine Base address of the bccu dimming engine. \b Range: BCCU0_DE0, BCCU0_DE1, BCCU0_DE2 + * + * @return Dither enable status. \b Range: 1-Enabled or 0-Disabled + * \parDescription:
+ * Retrieves dither enable status by reading the register bit BCCU_DE_DTT_DTEN. \n\n + * + * \parRelated APIs:
+ * XMC_BCCU_DIM_ConfigDimCurve(), XMC_BCCU_DIM_GetDimCurve()\n\n\n + */ +__STATIC_INLINE uint32_t XMC_BCCU_IsDitherEnable(XMC_BCCU_DIM_t *const dim_engine) +{ + return (uint32_t)((dim_engine->DTT & BCCU_DE_DTT_DTEN_Msk) >> BCCU_DE_DTT_DTEN_Pos); +} + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* BCCU0 */ + +#endif /* XMC_BCCU_H */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can.h index 73962299..a72ad65e 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can.h @@ -1,12 +1,12 @@ /** * @file xmc_can.h - * @date 2015-10-27 + * @date 2016-06-07 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -57,6 +57,10 @@ * * 2015-09-15: * - Added "xmc_can_map.h" include
+ * + * 2016-06-07: + * - Added XMC_CAN_IsPanelControlReady() + * * Details of use for node configuration related APIs
* Please use the XMC_CAN_NODE_SetInitBit() and XMC_CAN_NODE_EnableConfigurationChange() before calling node configuration * related APIs. @@ -80,6 +84,8 @@ * XMC_CAN_NODE_ResetInitBit(CAN_NODE0) * @endcode * + * 2016-06-20: + * - Fixed bug in XMC_CAN_MO_Config()
* @endcond * */ @@ -641,6 +647,25 @@ void XMC_CAN_Enable(XMC_CAN_t *const obj); void XMC_CAN_AllocateMOtoNodeList(XMC_CAN_t *const obj, const uint8_t node_num, const uint8_t mo_num); +/** + * + * @param obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef + * for details. + * + * @return Ready status of list controller + * + * \parDescription:
+ * Returns ready status of the list controller + * + * \parRelated APIs:
+ * XMC_CAN_PanelControl() + * + */ +__STATIC_INLINE bool XMC_CAN_IsPanelControlReady(XMC_CAN_t *const obj) +{ + return (bool)((obj->PANCTR & (CAN_PANCTR_BUSY_Msk | CAN_PANCTR_RBUSY_Msk)) == 0); +} + /** * * @param obj Pointer pointing to XMC_CAN Global Initialization structure. Defines CAN global registers,refer CAN_NODE_TypeDef diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can_map.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can_map.h index c00f1476..c689f0ff 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can_map.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_can_map.h @@ -1,12 +1,12 @@ /** * @file xmc_can_map.h - * @date 2015-10-27 + * @date 2015-10-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -351,7 +351,17 @@ #define CAN_NODE5_RXD_P8_0 XMC_CAN_NODE_RECEIVE_INPUT_RXDCC #endif -#if (UC_SERIES == XMC47) || (UC_SERIES == XMC48) || (UC_SERIES == XMC14) +#if (UC_DEVICE == XMC4300) && (UC_PACKAGE == LQFP100) +#define CAN_NODE0_RXD_P1_5 XMC_CAN_NODE_RECEIVE_INPUT_RXDCA +#define CAN_NODE0_RXD_P14_3 XMC_CAN_NODE_RECEIVE_INPUT_RXDCB +#define CAN_NODE0_RXD_P3_12 XMC_CAN_NODE_RECEIVE_INPUT_RXDCC +#define CAN_NODE1_RXD_P2_6 XMC_CAN_NODE_RECEIVE_INPUT_RXDCA +#define CAN_NODE1_RXD_P1_13 XMC_CAN_NODE_RECEIVE_INPUT_RXDCC +#define CAN_NODE1_RXD_P1_4 XMC_CAN_NODE_RECEIVE_INPUT_RXDCD +#define CAN_NODE1_RXD_CAN0INS XMC_CAN_NODE_RECEIVE_INPUT_RXDCF +#endif + +#if (UC_SERIES == XMC47) || (UC_SERIES == XMC48) || (UC_SERIES == XMC43)|| (UC_SERIES == XMC14) #define CAN_MO0 ((CAN_MO_TypeDef *)&(CAN_MO->MO[0])) #define CAN_MO1 ((CAN_MO_TypeDef *)&(CAN_MO->MO[1])) #define CAN_MO2 ((CAN_MO_TypeDef *)&(CAN_MO->MO[2])) @@ -387,7 +397,7 @@ #endif -#if (UC_SERIES == XMC47) || (UC_SERIES == XMC48) +#if (UC_SERIES == XMC47) || (UC_SERIES == XMC48)|| (UC_SERIES == XMC43) #define CAN_MO32 ((CAN_MO_TypeDef *)&(CAN_MO->MO[32])) #define CAN_MO33 ((CAN_MO_TypeDef *)&(CAN_MO->MO[33])) #define CAN_MO34 ((CAN_MO_TypeDef *)&(CAN_MO->MO[34])) @@ -420,6 +430,7 @@ #define CAN_MO61 ((CAN_MO_TypeDef *)&(CAN_MO->MO[61])) #define CAN_MO62 ((CAN_MO_TypeDef *)&(CAN_MO->MO[62])) #define CAN_MO63 ((CAN_MO_TypeDef *)&(CAN_MO->MO[63])) +#if (UC_SERIES != XMC43) #define CAN_MO64 ((CAN_MO_TypeDef *)&(CAN_MO->MO[64])) #define CAN_MO65 ((CAN_MO_TypeDef *)&(CAN_MO->MO[65])) #define CAN_MO66 ((CAN_MO_TypeDef *)&(CAN_MO->MO[66])) @@ -613,5 +624,6 @@ #define CAN_MO254 ((CAN_MO_TypeDef *)&(CAN_MO->MO[254])) #define CAN_MO255 ((CAN_MO_TypeDef *)&(CAN_MO->MO[255])) #endif +#endif #endif /* XMC_CAN_MAP_H*/ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu4.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu4.h index 7851f24c..d2b6e862 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu4.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu4.h @@ -1,12 +1,12 @@ /** * @file xmc_ccu4.h - * @date 2015-10-27 + * @date 2016-05-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -60,7 +60,14 @@ * - XMC_CCU4_SLICE_MULTI_IRQ_ID_t is added to support the XMC_CCU4_SLICE_EnableMultipleEvents() and * XMC_CCU4_SLICE_DisableMultipleEvents() APIs. * - DOC updates for the newly added APIs. - * + * + * 2016-03-09: + * - Optimization of write only registers + * + * 2016-05-20: + * - Added XMC_CCU4_SLICE_StopClearTimer() + * - Changed implementation of XMC_CCU4_SLICE_StopTimer() and XMC_CCU4_SLICE_ClearTimer() to avoid RMW access + * * @endcond */ @@ -1443,7 +1450,7 @@ __STATIC_INLINE void XMC_CCU4_SLICE_StartTimer(XMC_CCU4_SLICE_t *const slice) __STATIC_INLINE void XMC_CCU4_SLICE_StopTimer(XMC_CCU4_SLICE_t *const slice) { XMC_ASSERT("XMC_CCU4_SLICE_StopTimer:Invalid Slice Pointer", XMC_CCU4_IsValidSlice(slice)); - slice->TCCLR |= (uint32_t) CCU4_CC4_TCCLR_TRBC_Msk; + slice->TCCLR = (uint32_t) CCU4_CC4_TCCLR_TRBC_Msk; } /** @@ -1462,7 +1469,24 @@ __STATIC_INLINE void XMC_CCU4_SLICE_StopTimer(XMC_CCU4_SLICE_t *const slice) __STATIC_INLINE void XMC_CCU4_SLICE_ClearTimer(XMC_CCU4_SLICE_t *const slice) { XMC_ASSERT("XMC_CCU4_SLICE_ClearTimer:Invalid Slice Pointer", XMC_CCU4_IsValidSlice(slice)); - slice->TCCLR |= (uint32_t) CCU4_CC4_TCCLR_TCC_Msk; + slice->TCCLR = (uint32_t) CCU4_CC4_TCCLR_TCC_Msk; +} + +/** + * @param slice Constant pointer to CC4 Slice + * @return
+ * None
+ * + * \parDescription:
+ * Stops and resets the timer count to zero, by setting CC4yTCCLR.TCC and CC4yTCCLR.TRBC bit.\n\n + * + * \parRelated APIs:
+ * XMC_CCU4_SLICE_StartTimer(). + */ +__STATIC_INLINE void XMC_CCU4_SLICE_StopClearTimer(XMC_CCU4_SLICE_t *const slice) +{ + XMC_ASSERT("XMC_CCU4_SLICE_StopClearTimer:Invalid Slice Pointer", XMC_CCU4_IsValidSlice(slice)); + slice->TCCLR = CCU4_CC4_TCCLR_TRBC_Msk | CCU4_CC4_TCCLR_TCC_Msk; } /** @@ -1682,7 +1706,7 @@ __STATIC_INLINE uint16_t XMC_CCU4_SLICE_GetTimerCompareMatch(const XMC_CCU4_SLIC __STATIC_INLINE void XMC_CCU4_EnableShadowTransfer(XMC_CCU4_MODULE_t *const module, const uint32_t shadow_transfer_msk) { XMC_ASSERT("XMC_CCU4_EnableShadowTransfer:Invalid Slice Pointer", XMC_CCU4_IsValidModule(module)); - module->GCSS |= (uint32_t)shadow_transfer_msk; + module->GCSS = (uint32_t)shadow_transfer_msk; } /** diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu8.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu8.h index c98aaa09..69f5c3c8 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu8.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ccu8.h @@ -1,12 +1,12 @@ /** * @file xmc_ccu8.h - * @date 2015-10-27 + * @date 2016-05-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -75,6 +75,13 @@ * XMC_CCU8_SLICE_DisableMultipleEvents() APIs. * - DOC updates for the newly added APIs. * + * 2016-03-09: + * - Optimization of write only registers + * + * 2016-05-20: + * - Added XMC_CCU8_SLICE_StopClearTimer() + * - Changed XMC_CCU8_SLICE_StopTimer() and XMC_CCU8_SLICE_ClearTimer() + * * @endcond */ @@ -1780,7 +1787,7 @@ __STATIC_INLINE void XMC_CCU8_SLICE_StartTimer(XMC_CCU8_SLICE_t *const slice) __STATIC_INLINE void XMC_CCU8_SLICE_StopTimer(XMC_CCU8_SLICE_t *const slice) { XMC_ASSERT("XMC_CCU8_SLICE_StopTimer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice)); - slice->TCCLR |= (uint32_t) CCU8_CC8_TCCLR_TRBC_Msk; + slice->TCCLR = (uint32_t) CCU8_CC8_TCCLR_TRBC_Msk; } /** @@ -1799,7 +1806,24 @@ __STATIC_INLINE void XMC_CCU8_SLICE_StopTimer(XMC_CCU8_SLICE_t *const slice) __STATIC_INLINE void XMC_CCU8_SLICE_ClearTimer(XMC_CCU8_SLICE_t *const slice) { XMC_ASSERT("XMC_CCU8_SLICE_ClearTimer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice)); - slice->TCCLR |= (uint32_t) CCU8_CC8_TCCLR_TCC_Msk; + slice->TCCLR = (uint32_t) CCU8_CC8_TCCLR_TCC_Msk; +} + +/** + * @param slice Constant pointer to CC8 Slice + * @return
+ * None
+ * + * \parDescription:
+ * Stops and resets the timer count to zero, by setting CC8yTCCLR.TCC and CC8yTCCLR.TRBC bit.\n\n + * + * \parRelated APIs:
+ * XMC_CCU8_SLICE_StartTimer(). + */ +__STATIC_INLINE void XMC_CCU8_SLICE_StopClearTimer(XMC_CCU8_SLICE_t *const slice) +{ + XMC_ASSERT("XMC_CCU8_SLICE_StopClearTimer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice)); + slice->TCCLR = CCU8_CC8_TCCLR_TRBC_Msk | CCU8_CC8_TCCLR_TCC_Msk; } /** @@ -2056,7 +2080,7 @@ uint16_t XMC_CCU8_SLICE_GetTimerCompareMatch(const XMC_CCU8_SLICE_t *const slice __STATIC_INLINE void XMC_CCU8_EnableShadowTransfer(XMC_CCU8_MODULE_t *const module, const uint32_t shadow_transfer_msk) { XMC_ASSERT("XMC_CCU8_EnableShadowTransfer:Invalid module Pointer", XMC_CCU8_IsValidModule(module)); - module->GCSS |= (uint32_t)shadow_transfer_msk; + module->GCSS = (uint32_t)shadow_transfer_msk; } /** diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_common.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_common.h index cfda3361..f2a05047 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_common.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_common.h @@ -1,36 +1,36 @@ /** * @file xmc_common.h - * @date 2015-10-27 + * @date 2016-05-30 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the - * following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided with the distribution. - * - * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with - * Infineon Technologies AG dave@infineon.com). + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). ********************************************************************************************************************* * * Change History @@ -41,7 +41,13 @@ * - Brief section updated * - Added XMC_LIB_VERSION macro * - * @endcond + * 2016-02-26: + * - Updated XMC_LIB_VERSION macro to v2.1.6 + * + * 2016-05-30: + * - Updated XMC_LIB_VERSION macro to v2.1.8 + * + * @endcond * */ @@ -62,7 +68,7 @@ /** * @addtogroup COMMON - * @brief Common APIs to all peripherals for XMC microcontroller family + * @brief Common APIs to all peripherals for XMC microcontroller family * @{ */ @@ -70,9 +76,9 @@ * MACROS *********************************************************************************************************************/ #define XMC_LIB_MAJOR_VERSION (2U) -#define XMC_LIB_MINOR_VERSION (0U) -#define XMC_LIB_PATCH_VERSION (2U) - +#define XMC_LIB_MINOR_VERSION (1U) +#define XMC_LIB_PATCH_VERSION (8U) + #define XMC_LIB_VERSION ((XMC_LIB_MAJOR_VERSION << 16U) + (XMC_LIB_MINOR_VERSION << 8U) + XMC_LIB_PATCH_VERSION) /* Define WEAK attribute */ @@ -124,7 +130,7 @@ XMC_PRIOARRAY_t prioarray_def_##name = {(size), (prioarray_m_##name)}; /* * */ -typedef struct XMC_DRIVER_VERSION +typedef struct XMC_DRIVER_VERSION { uint8_t major; uint8_t minor; diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dac.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dac.h index a76e4be6..fba5a0ad 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dac.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dac.h @@ -1,12 +1,12 @@ /** * @file xmc_dac.h - * @date 2015-10-27 + * @date 2015-08-31 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_device.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_device.h index e812c195..7ce1c923 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_device.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_device.h @@ -1,12 +1,12 @@ /** * @file xmc_device.h - * @date 2015-10-27 + * @date 2016-07-21 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -42,6 +42,17 @@ * 2015-09-23: * - Added XMC14 and XMC48/47 * + * 2015-11-19: + * - Added XMC43 + * + * 2016-02-26: + * - Fixed CCU8 version for XMC43/47/48 + * + * 2016-06-14: + * - Added XMC1201_T028x0016, XMC1202_T016x0064, XMC1301_T016x0032, XMC1302_Q040x0200, + * XMC1302_T028x0016, XMC1402_T038x0032, XMC1402_T038x0064, XMC1402_T038x0128, + * XMC1403_Q040x0064, XMC1403_Q040x0128, XMC1403_Q040x0200, XMC1402_T038x0200 + * XMC1402_Q040x0200, XMC1402_Q048x0200, XMC1201_T028x0032 * @endcond * */ @@ -58,6 +69,7 @@ #define XMC47 (47) #define XMC45 (45) #define XMC44 (44) +#define XMC43 (43) #define XMC42 (42) #define XMC41 (41) #define XMC14 (14) @@ -73,6 +85,7 @@ #define XMC4504 (4504) #define XMC4400 (4400) #define XMC4402 (4402) +#define XMC4300 (4300) #define XMC4200 (4200) #define XMC4100 (4100) #define XMC4104 (4104) @@ -113,7 +126,7 @@ #define UC_FLASH (2048UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_F144x2048) #define UC_FAMILY XMC4 @@ -123,7 +136,7 @@ #define UC_FLASH (2048UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_F100x2048) #define UC_FAMILY XMC4 @@ -133,7 +146,7 @@ #define UC_FLASH (2048UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_E196x1536) #define UC_FAMILY XMC4 @@ -143,7 +156,7 @@ #define UC_FLASH (1536UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_F144x1536) #define UC_FAMILY XMC4 @@ -153,7 +166,7 @@ #define UC_FLASH (1536UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_F100x1536) #define UC_FAMILY XMC4 @@ -163,7 +176,7 @@ #define UC_FLASH (1536UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_E196x1024) #define UC_FAMILY XMC4 @@ -173,7 +186,7 @@ #define UC_FLASH (1024UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_F144x1024) #define UC_FAMILY XMC4 @@ -183,7 +196,7 @@ #define UC_FLASH (1024UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4800_F100x1024) #define UC_FAMILY XMC4 @@ -193,7 +206,7 @@ #define UC_FLASH (1024UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4700_E196x2048) #define UC_FAMILY XMC4 @@ -203,7 +216,7 @@ #define UC_FLASH (2048UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4700_F144x2048) #define UC_FAMILY XMC4 @@ -213,7 +226,7 @@ #define UC_FLASH (2048UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4700_F100x2048) #define UC_FAMILY XMC4 @@ -223,7 +236,7 @@ #define UC_FLASH (2048UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4700_E196x1536) #define UC_FAMILY XMC4 @@ -233,7 +246,7 @@ #define UC_FLASH (1536UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4700_F144x1536) #define UC_FAMILY XMC4 @@ -243,7 +256,7 @@ #define UC_FLASH (1536UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4700_F100x1536) #define UC_FAMILY XMC4 @@ -253,7 +266,7 @@ #define UC_FLASH (1536UL) #define MULTICAN_PLUS #define CCU4V2 -#define CCU8V1 +#define CCU8V2 #elif defined(XMC4500_E144x1024) #define UC_FAMILY XMC4 @@ -381,6 +394,16 @@ #define CCU4V1 #define CCU8V1 +#elif defined(XMC4300_F100x256) +#define UC_FAMILY XMC4 +#define UC_SERIES XMC43 +#define UC_DEVICE XMC4300 +#define UC_PACKAGE LQFP100 +#define UC_FLASH (256UL) +#define MULTICAN_PLUS +#define CCU4V2 +#define CCU8V2 + #elif defined(XMC4200_E64x256) #define UC_FAMILY XMC4 #define UC_SERIES XMC42 @@ -699,6 +722,22 @@ #define UC_FLASH (200UL) #define CCU4V2 +#elif defined(XMC1201_T028x0032) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC12 +#define UC_DEVICE XMC1201 +#define UC_PACKAGE TSSOP28 +#define UC_FLASH (32UL) +#define CCU4V2 + +#elif defined(XMC1201_T028x0016) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC12 +#define UC_DEVICE XMC1201 +#define UC_PACKAGE TSSOP28 +#define UC_FLASH (16UL) +#define CCU4V2 + #elif defined(XMC1202_Q024x0016) #define UC_FAMILY XMC1 #define UC_SERIES XMC12 @@ -747,6 +786,14 @@ #define UC_FLASH (32UL) #define CCU4V2 +#elif defined(XMC1202_T016x0064) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC12 +#define UC_DEVICE XMC1202 +#define UC_PACKAGE TSSOP16 +#define UC_FLASH (64UL) +#define CCU4V2 + #elif defined(XMC1202_T028x0016) #define UC_FAMILY XMC1 #define UC_SERIES XMC12 @@ -842,6 +889,15 @@ #define CCU4V2 #define CCU8V2 +#elif defined(XMC1301_T016x0032) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC13 +#define UC_DEVICE XMC1301 +#define UC_PACKAGE TSSOP16 +#define UC_FLASH (32UL) +#define CCU4V2 +#define CCU8V2 + #elif defined(XMC1301_T038x0008) #define UC_FAMILY XMC1 #define UC_SERIES XMC13 @@ -939,6 +995,15 @@ #define CCU4V2 #define CCU8V2 +#elif defined(XMC1302_Q040x0200) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC13 +#define UC_DEVICE XMC1302 +#define UC_PACKAGE VQFN40 +#define UC_FLASH (200UL) +#define CCU4V2 +#define CCU8V2 + #elif defined(XMC1302_T038x0016) #define UC_FAMILY XMC1 #define UC_SERIES XMC13 @@ -984,6 +1049,15 @@ #define CCU4V2 #define CCU8V2 +#elif defined(XMC1302_T028x0016) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC13 +#define UC_DEVICE XMC1302 +#define UC_PACKAGE TSSOP28 +#define UC_FLASH (16UL) +#define CCU4V2 +#define CCU8V2 + #elif defined(XMC1302_T016x0008) #define UC_FAMILY XMC1 #define UC_SERIES XMC13 @@ -1043,6 +1117,42 @@ #define UC_FLASH (128UL) #define CCU4V3 +#elif defined(XMC1402_T038x0032) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1402 +#define UC_PACKAGE TSSOP38 +#define UC_FLASH (32UL) +#define CCU4V3 +#define CCU8V3 + +#elif defined(XMC1402_T038x0064) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1402 +#define UC_PACKAGE TSSOP38 +#define UC_FLASH (64UL) +#define CCU4V3 +#define CCU8V3 + +#elif defined(XMC1402_T038x0128) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1402 +#define UC_PACKAGE TSSOP38 +#define UC_FLASH (128UL) +#define CCU4V3 +#define CCU8V3 + +#elif defined(XMC1402_T038x0200) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1402 +#define UC_PACKAGE TSSOP38 +#define UC_FLASH (200UL) +#define CCU4V3 +#define CCU8V3 + #elif defined(XMC1402_Q040x0032) #define UC_FAMILY XMC1 #define UC_SERIES XMC14 @@ -1070,6 +1180,15 @@ #define CCU4V3 #define CCU8V3 +#elif defined(XMC1402_Q040x0200) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1402 +#define UC_PACKAGE VQFN40 +#define UC_FLASH (200UL) +#define CCU4V3 +#define CCU8V3 + #elif defined(XMC1402_Q048x0032) #define UC_FAMILY XMC1 #define UC_SERIES XMC14 @@ -1097,6 +1216,15 @@ #define CCU4V3 #define CCU8V3 +#elif defined(XMC1402_Q048x0200) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1402 +#define UC_PACKAGE VQFN48 +#define UC_FLASH (200UL) +#define CCU4V3 +#define CCU8V3 + #elif defined(XMC1402_Q064x0064) #define UC_FAMILY XMC1 #define UC_SERIES XMC14 @@ -1179,6 +1307,33 @@ #define MULTICAN_PLUS #define CCU4V3 +#elif defined(XMC1403_Q040x0064) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1403 +#define UC_PACKAGE VQFN40 +#define UC_FLASH (64UL) +#define MULTICAN_PLUS +#define CCU4V3 + +#elif defined(XMC1403_Q040x0128) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1403 +#define UC_PACKAGE VQFN40 +#define UC_FLASH (128UL) +#define MULTICAN_PLUS +#define CCU4V3 + +#elif defined(XMC1403_Q040x0200) +#define UC_FAMILY XMC1 +#define UC_SERIES XMC14 +#define UC_DEVICE XMC1403 +#define UC_PACKAGE VQFN40 +#define UC_FLASH (200UL) +#define MULTICAN_PLUS +#define CCU4V3 + #elif defined(XMC1403_Q064x0064) #define UC_FAMILY XMC1 #define UC_SERIES XMC14 @@ -1303,11 +1458,19 @@ #if UC_SERIES == XMC45 #include "XMC4500.h" #define PERIPHERAL_RESET_SUPPORTED +#define USB_OTG_SUPPORTED #elif UC_SERIES == XMC44 #include "XMC4400.h" #define CLOCK_GATING_SUPPORTED #define PERIPHERAL_RESET_SUPPORTED +#define USB_OTG_SUPPORTED + +#elif UC_SERIES == XMC43 +#include "XMC4300.h" +#define CLOCK_GATING_SUPPORTED +#define PERIPHERAL_RESET_SUPPORTED +#define USB_OTG_SUPPORTED #elif UC_SERIES == XMC42 #include "XMC4200.h" @@ -1323,11 +1486,13 @@ #include "XMC4700.h" #define CLOCK_GATING_SUPPORTED #define PERIPHERAL_RESET_SUPPORTED +#define USB_OTG_SUPPORTED #elif UC_SERIES == XMC48 #include "XMC4800.h" #define CLOCK_GATING_SUPPORTED #define PERIPHERAL_RESET_SUPPORTED +#define USB_OTG_SUPPORTED #elif UC_SERIES == XMC11 #include "XMC1100.h" diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma.h index 505ea26c..a42a9c61 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma.h @@ -1,13 +1,13 @@ /** * @file xmc_dma.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma_map.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma_map.h index 25c639d3..e8054f7d 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma_map.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dma_map.h @@ -1,13 +1,13 @@ /** * @file xmc_dma_map.h - * @date 2015-10-27 + * @date 2015-05-07 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dsd.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dsd.h index dc7a28b1..98222a5f 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dsd.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_dsd.h @@ -1,12 +1,12 @@ /** * @file xmc_dsd.h - * @date 2015-10-27 + * @date 2015-09-18 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ebu.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ebu.h index a16aded2..280ef89f 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ebu.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ebu.h @@ -1,12 +1,12 @@ /** * @file xmc_ebu.h - * @date 2015-10-27 + * @date 2016-03-30 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -38,7 +38,10 @@ * * 2015-06-20: * - Initial - * - Description of changes 2 + * + * 2016-03-30: + * - Added ebu_data_hold_cycles_for_read_accesses to XMC_EBU_BUS_READ_CONFIG_t + * - Added ebu_device_addressing_mode and ebu_data_hold_cycles_for_write_accesses to XMC_EBU_BUS_WRITE_CONFIG_t * * @endcond * @@ -625,7 +628,10 @@ typedef struct XMC_EBU_BUS_READ_CONFIG * 11111B: 31 wait states
*/ uint32_t ebu_programmed_wait_states_for_read_accesses : 5; - uint32_t : 4; + /** + * + */ + uint32_t ebu_data_hold_cycles_for_read_accesses: 4; /** * Frequency of external clock at pin BFCLKO */ @@ -688,7 +694,7 @@ typedef struct XMC_EBU_BUS_WRITE_CONFIG uint32_t : 1; uint32_t ebu_wait_signal_polarity : 1; /**< Reversed polarity at WAIT */ uint32_t ebu_byte_control : 2; /**< Byte control signal control */ - uint32_t : 2; + uint32_t ebu_device_addressing_mode : 2; /**< Device addressing mode */ uint32_t ebu_wait_control : 2; /**< External wait control */ uint32_t ebu_asynchronous_address_phase : 1; /**< Asynchronous address phase */ uint32_t ebu_lock_chip_select : 1; /**< Lock chip select */ @@ -731,7 +737,11 @@ typedef struct XMC_EBU_BUS_WRITE_CONFIG * 11111B: 31 wait states
*/ uint32_t ebu_programmed_wait_states_for_write_accesses : 5; - uint32_t : 4; + + /** + * + */ + uint32_t ebu_data_hold_cycles_for_write_accesses : 4; /**< * Frequency of external clock at pin BFCLKO */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat.h new file mode 100644 index 00000000..4c4a6e87 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat.h @@ -0,0 +1,462 @@ + +/** + * @file xmc_ecat.h + * @date 2015-12-27 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-12-27: + * - Initial Version
+ * + * @endcond + */ + +/** + * @addtogroup XMClib XMC Peripheral Library + * @{ + */ + +/** + * @addtogroup ECAT + * @brief EtherCAT Low level driver for XMC4800/XMC4300 series. + * + * EtherCAT is an Ethernet-based fieldbus system. + * The EtherCAT Slave Controller (ECAT) read the data addressed to them while the telegram passes through the device. + * An EtherCAT Slave Controller (ESC) takes care of the EtherCAT communication as an interface between the EtherCAT + * fieldbus and the slave application. EtherCAT uses standard IEEE 802.3 Ethernet frames, thus a standard network + * controller can be used and no special hardware is required on master side. EtherCAT has a reserved EtherType of + * 0x88A4 that distinguishes it from other Ethernet frames. Thus, EtherCAT can run in parallel to other Ethernet + * protocols. EtherCAT does not require the IP protocol, however it can be encapsulated in IP/UDP. The EtherCAT + * Slave Controller processes the frame in hardware. Thus, communication performance is independent from processor + * power. + * + * The XMC_ECAT low level driver provides functions to configure and initialize the ECAT hardware peripheral. + * For EHTERCAT stack integration, the necessary hardware accees layer APIs shall be explicitly implemented depending + * upon the stack provider. The XMC_ECAT lld layer provides only the hardware initialization functions for start up and + * basic functionalities. + * @{ + */ + +#ifndef XMC_ECAT_H +#define XMC_ECAT_H + +/********************************************************************************************************************** + * HEADER FILES + *********************************************************************************************************************/ + +#include "xmc_common.h" + +#if defined (ECAT0) + +#include "xmc_ecat_map.h" + +/********************************************************************************************************************** + * MACROS + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * ENUMS + *********************************************************************************************************************/ + +/** + * ECAT status return values + */ +typedef enum XMC_ECAT_STATUS +{ + XMC_ECAT_STATUS_OK = 0U, /**< Driver accepted application request */ + XMC_ECAT_STATUS_BUSY = 1U, /**< Driver is busy and cannot handle request */ + XMC_ECAT_STATUS_ERROR = 2U /**< Driver could not fulfil application request */ +} XMC_ECAT_STATUS_t; + +/** + * EtherCAT event enumeration types + */ +typedef enum XMC_ECAT_EVENT +{ + XMC_ECAT_EVENT_AL_CONTROL = ECAT_AL_EVENT_MASK_AL_CE_MASK_Msk, /**< Application control event mask */ + XMC_ECAT_EVENT_DC_LATCH = ECAT_AL_EVENT_MASK_DC_LE_MASK_Msk, /**< Distributed Clock latch event mask */ + XMC_ECAT_EVENT_DC_SYNC0 = ECAT_AL_EVENT_MASK_ST_S0_MASK_Msk, /**< State of distributed clock sync-0 event mask */ + XMC_ECAT_EVENT_DC_SYNC1 = ECAT_AL_EVENT_MASK_ST_S1_MASK_Msk, /**< State of distributed clock sync-1 event mask */ + XMC_ECAT_EVENT_SM_ACTIVATION_REGISTER = ECAT_AL_EVENT_MASK_SM_A_MASK_Msk, /**< SyncManager activation register mask*/ + XMC_ECAT_EVENT_EEPROM = ECAT_AL_EVENT_MASK_EEP_E_MASK_Msk, /**< EEPROM Emulation event mask*/ + XMC_ECAT_EVENT_WATCHDOG = ECAT_AL_EVENT_MASK_WP_D_MASK_Msk, /**< WATCHDOG process data event mask*/ + XMC_ECAT_EVENT_SM0 = ECAT_AL_EVENT_MASK_SMI_0_MASK_Msk, /**< Sync Manager 0 event mask*/ + XMC_ECAT_EVENT_SM1 = ECAT_AL_EVENT_MASK_SMI_1_MASK_Msk, /**< Sync Manager 1 event mask*/ + XMC_ECAT_EVENT_SM2 = ECAT_AL_EVENT_MASK_SMI_2_MASK_Msk, /**< Sync Manager 2 event mask*/ + XMC_ECAT_EVENT_SM3 = ECAT_AL_EVENT_MASK_SMI_3_MASK_Msk, /**< Sync Manager 3 event mask*/ + XMC_ECAT_EVENT_SM4 = ECAT_AL_EVENT_MASK_SMI_4_MASK_Msk, /**< Sync Manager 4 event mask*/ + XMC_ECAT_EVENT_SM5 = ECAT_AL_EVENT_MASK_SMI_5_MASK_Msk, /**< Sync Manager 5 event mask*/ + XMC_ECAT_EVENT_SM6 = ECAT_AL_EVENT_MASK_SMI_6_MASK_Msk, /**< Sync Manager 6 event mask*/ + XMC_ECAT_EVENT_SM7 = ECAT_AL_EVENT_MASK_SMI_7_MASK_Msk /**< Sync Manager 7 event mask*/ +} XMC_ECAT_EVENT_t; + +/********************************************************************************************************************** + * DATA STRUCTURES + *********************************************************************************************************************/ + +/* Anonymous structure/union guard start */ +#if defined (__CC_ARM) +#pragma push +#pragma anon_unions +#elif defined (__TASKING__) +#pragma warning 586 +#endif + +/** + * ECAT port control data structure + */ +typedef struct XMC_ECAT_PORT_CTRL +{ + union + { + struct + { + uint32_t enable_rstreq: 1; /**< Master can trigger a reset of the XMC4700 / XMC4800 (::bool) */ + uint32_t: 7; /**< Reserved bits */ + uint32_t latch_input0: 2; /**< Latch input 0 selection (::XMC_ECAT_PORT_LATCHIN0_t) */ + uint32_t: 2; /**< Reserved bits */ + uint32_t latch_input1: 2; /**< Latch input 1 selection (::XMC_ECAT_PORT_LATCHIN1_t) */ + uint32_t: 2; /**< Reserved bits */ + uint32_t phyaddr_offset: 5; /**< Ethernet PHY address offset, address of port 0 */ + uint32_t: 1; /**< Reserved bits */ + uint32_t mdio: 2; /**< Bidirectional, push-pull management data I/O line (::XMC_ETH_MAC_PORT_CTRL_MDIO_t) */ + uint32_t: 8; /**< Reserved bits */ + }; + + uint32_t raw; + } common; + + union + { + struct + { + uint32_t rxd0: 2; /**< Receive data bit 0 (::XMC_ECAT_PORT0_CTRL_RXD0_t) */ + uint32_t rxd1: 2; /**< Receive data bit 1 (::XMC_ECAT_PORT0_CTRL_RXD1_t) */ + uint32_t rxd2: 2; /**< Receive data bit 2 (::XMC_ECAT_PORT0_CTRL_RXD2_t) */ + uint32_t rxd3: 2; /**< Receive data bit 3 (::XMC_ECAT_PORT0_CTRL_RXD3_t) */ + uint32_t rx_err: 2; /**< RX Error (::XMC_ECAT_PORT0_CTRL_RX_ERR_t) */ + uint32_t rx_dv: 2; /**< RX Data valid (::XMC_ECAT_PORT0_CTRL_RX_DV_t) */ + uint32_t rx_clk: 2; /**< RX Clock (::XMC_ECAT_PORT0_CTRL_RX_CLK_t) */ + uint32_t: 2; /**< Reserved bits */ + uint32_t link: 2; /**< Link status (::XMC_ECAT_PORT0_CTRL_LINK_t) */ + uint32_t: 10; /**< Reserved bits */ + uint32_t tx_clk: 2; /**< TX Clock (::XMC_ECAT_PORT0_CTRL_TX_CLK_t) */ + uint32_t tx_shift: 2; /**< TX signal delay (::XMC_ECAT_PORT0_CTRL_TX_SHIFT_t) */ + }; + + uint32_t raw; + } port0; + + union + { + struct + { + uint32_t rxd0: 2; /**< Receive data bit 0 (::XMC_ECAT_PORT_CTRL_RXD0_t) */ + uint32_t rxd1: 2; /**< Receive data bit 1 (::XMC_ECAT_PORT_CTRL_RXD1_t) */ + uint32_t rxd2: 2; /**< Receive data bit 2 (::XMC_ECAT_PORT_CTRL_RXD2_t) */ + uint32_t rxd3: 2; /**< Receive data bit 3 (::XMC_ECAT_PORT_CTRL_RXD3_t) */ + uint32_t rx_err: 2; /**< RX Error (::XMC_ECAT_PORT_CTRL_RX_ERR_t) */ + uint32_t rx_dv: 2; /**< RX Data valid (::XMC_ECAT_PORT_CTRL_RX_DV_t) */ + uint32_t rx_clk: 2; /**< RX Clock (::XMC_ECAT_PORT_CTRL_RX_CLK_t) */ + uint32_t: 2; /**< Reserved bits */ + uint32_t link: 2; /**< Link status (::XMC_ECAT_PORT_CTRL_LINK_t) */ + uint32_t: 10; /**< Reserved bits */ + uint32_t tx_clk: 2; /**< TX Clock (::XMC_ECAT_PORT_CTRL_TX_CLK_t) */ + uint32_t tx_shift: 2; /**< TX signal delay (::XMC_ECAT_PORT1_CTRL_TX_SHIFT_t) */ + }; + + uint32_t raw; + } port1; + +} XMC_ECAT_PORT_CTRL_t; + +/** + * ECAT EEPROM configuration area data structure + */ +typedef union XMC_ECAT_CONFIG +{ + struct + { + uint32_t : 8; + + uint32_t : 2; + uint32_t enable_dc_sync_out : 1; + uint32_t enable_dc_latch_in : 1; + uint32_t enable_enhanced_link_p0 : 1; + uint32_t enable_enhanced_link_p1 : 1; + uint32_t : 2; + + uint32_t : 16; + + uint16_t sync_pulse_length; /**< Initialization value for Pulse Length of SYNC Signals register*/ + + uint32_t : 16; + + uint16_t station_alias; /**< Initialization value for Configured Station Alias Address register */ + + uint16_t : 16; + + uint16_t : 16; + + uint16_t checksum; + }; + + uint32_t dword[4]; /**< Four 32 bit double word equivalent to 8 16 bit configuration area word. */ +} XMC_ECAT_CONFIG_t; + +/* Anonymous structure/union guard end */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__TASKING__) +#pragma warning restore +#endif + +/********************************************************************************************************************** + * API PROTOTYPES + *********************************************************************************************************************/ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @param config XMC_ECAT_CONFIG_t + * @return XMC_ECAT_STATUS_t ECAT Initialization status + * + * \parDescription:
+ * Initialize the Ethernet MAC peripheral
+ * + * \par + * The function sets the link speed, applies the duplex mode, sets auto-negotiation + * and loop-back settings. + */ +void XMC_ECAT_Init(XMC_ECAT_CONFIG_t *const config); + +/** + * @param None + * @return None + * + * \parDescription:
+ * Enable the EtherCAT peripheral
+ * + * \par + * The function de-asserts the peripheral reset. + */ +void XMC_ECAT_Enable(void); + +/** + * @param None + * @return None + * + * \parDescription:
+ * Disable the EtherCAT peripheral
+ * + * \par + * The function asserts the peripheral reset. + */ +void XMC_ECAT_Disable(void); + +/** + * @param phy_addr PHY address + * @param reg_addr Register address + * @param data The destination to which the read data needs to be copied to. + * + * @return XMC_ECAT_STATUS_t EtherCAT Read PHY API return status + * + * \parDescription:
+ * Read a PHY register
+ * + * \par + * The function reads a PHY register. It essentially polls busy bit during max + * PHY_TIMEOUT time and reads the information into 'data' when not busy. + */ +XMC_ECAT_STATUS_t XMC_ECAT_ReadPhy(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); + +/** + * @param phy_addr PHY address + * @param reg_addr Register address + * @param data The data to write + * @return XMC_ECAT_STATUS_t EtherCAT Write PHY API return status + * + * \parDescription:
+ * Write a PHY register
+ * + * \par + * The function reads a PHY register. It essentially writes the data and polls + * the busy bit until it is no longer busy. + */ +XMC_ECAT_STATUS_t XMC_ECAT_WritePhy(uint8_t phy_addr, uint8_t reg_addr, uint16_t data); + +/** + * @param port_ctrl Port control configuration + * @return None + * + * \parDescription:
+ * Set port control configuration
+ * + * \par + * The function sets the port control by writing the configuration into the ECAT CON register. + * + */ +__STATIC_INLINE void XMC_ECAT_SetPortControl(const XMC_ECAT_PORT_CTRL_t port_ctrl) +{ + ECAT0_CON->CON = (uint32_t)port_ctrl.common.raw; + ECAT0_CON->CONP0 = (uint32_t)port_ctrl.port0.raw; + ECAT0_CON->CONP1 = (uint32_t)port_ctrl.port1.raw; +} + +/** + * @param event Single or logically OR'd events specified in the enum type @refXMC_ECAT_EVENT_t + * @return None + * + * \parDescription:
+ * Enable ECAT event(s)
+ * + * \par + * The function can be used to enable ECAT event(s). + */ +void XMC_ECAT_EnableEvent(uint32_t event); + +/** + * @param event Single or logically OR'd events specified in the enum type @refXMC_ECAT_EVENT_t + * @return None + * + * \parDescription:
+ * Disable an ECAT event(s)
+ * + * \par + * The function can be used to disable ECAT event(s). + */ +void XMC_ECAT_DisableEvent(uint32_t event); + +/** + * @param None + * @return uint32_t Event status + * + * \parDescription:
+ * Get event status
+ * + * \par + * The function returns the ECAT status and interrupt status as a single word. The user + * can then check the status of the events by using an appropriate mask. + */ +uint32_t XMC_ECAT_GetEventStatus(void); + + +/** + * @param channel SyncManager channel number. + * @return None + * + * \parDescription:
+ * Disables selected SyncManager channel
+ * + * \par + * Sets bit 0 of the corresponding 0x807 register. + */ +void XMC_ECAT_DisableSyncManChannel(const uint8_t channel); + +/** + * @param channel SyncManager channel number. + * @return None + * + * \parDescription:
+ * Enables selected SyncManager channel
+ * + * \par + * Resets bit 0 of the corresponding 0x807 register. + */ +void XMC_ECAT_EnableSyncManChannel(const uint8_t channel); + +/** + * @param None + * @return uint16_t Content of register 0x220-0x221 + * + * \parDescription:
+ * Get content of AL event register
+ * + * \par + * Get the first two bytes of the AL Event register (0x220-0x221). + */ +__STATIC_INLINE uint16_t XMC_ECAT_GetALEventRegister(void) +{ + return ((uint16_t)ECAT0->AL_EVENT_REQ); +} + +/** + * @param None + * @return uint16_t Content of register 0x220-0x221 + * + * \parDescription:
+ * Get content of AL event register
+ * + * \par + * Get the first two bytes of the AL Event register (0x220-0x221). + */ +__STATIC_INLINE uint16_t XMC_ECAT_GetALEventMask(void) +{ + return ((uint16_t)ECAT0->AL_EVENT_MASK); +} + +/** + * @param intMask Interrupt mask (disabled interrupt shall be zero) + * @return None + * + * \parDescription:
+ * Sets application event mask register
+ * + * \par + * Performs a logical OR with the AL Event Mask register (0x0204 : 0x0205). + */ +__STATIC_INLINE void XMC_ECAT_SetALEventMask(uint16_t intMask) +{ + ECAT0->AL_EVENT_MASK |= (uint32_t)(intMask); +} + + +#ifdef __cplusplus +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined (ECAT) */ + +#endif /* XMC_ECAT_H */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat_map.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat_map.h new file mode 100644 index 00000000..2df504dc --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ecat_map.h @@ -0,0 +1,287 @@ +/** + * @file xmc_ecat_map.h + * @date 2016-07-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-09-09: + * - Initial + * + * 2015-07-20: + * - Added XMC_ECAT_PORT_CTRL_LATCHIN0_P9_0 and XMC_ECAT_PORT_CTRL_LATCHIN0_P9_1 + * + * @endcond + */ + +#ifndef XMC_ECAT_MAP_H +#define XMC_ECAT_MAP_H + +/** + * ECAT PORT 0 receive data 0 line + */ +typedef enum XMC_ECAT_PORT0_CTRL_RXD0 +{ + XMC_ECAT_PORT0_CTRL_RXD0_P1_4 = 0U, /**< RXD0A receive data line */ + XMC_ECAT_PORT0_CTRL_RXD0_P5_0 = 1U, /**< RXD0B receive data line */ + XMC_ECAT_PORT0_CTRL_RXD0_P7_4 = 2U, /**< RXD0C receive data line */ +} XMC_ECAT_PORT0_CTRL_RXD0_t; + +/** + * ECAT PORT 0 receive data 1 line + */ +typedef enum XMC_ECAT_PORT0_CTRL_RXD1 +{ + XMC_ECAT_PORT0_CTRL_RXD1_P1_5 = 0U, /**< RXD1A receive data line */ + XMC_ECAT_PORT0_CTRL_RXD1_P5_1 = 1U, /**< RXD1B receive data line */ + XMC_ECAT_PORT0_CTRL_RXD1_P7_5 = 2U, /**< RXD1C receive data line */ +} XMC_ECAT_PORT0_CTRL_RXD1_t; + +/** + * ECAT PORT 0 receive data 2 line + */ +typedef enum XMC_ECAT_PORT0_CTRL_RXD2 +{ + XMC_ECAT_PORT0_CTRL_RXD2_P1_10 = 0U, /**< RXD2A receive data line */ + XMC_ECAT_PORT0_CTRL_RXD2_P5_2 = 1U, /**< RXD2B receive data line */ + XMC_ECAT_PORT0_CTRL_RXD2_P7_6 = 2U /**< RXD2C receive data line */ +} XMC_ECAT_PORT0_CTRL_RXD2_t; + +/** + * ECAT PORT 0 receive data 3 line + */ +typedef enum XMC_ECAT_PORT0_CTRL_RXD3 +{ + XMC_ECAT_PORT0_CTRL_RXD3_P1_11 = 0U, /**< RXD3A Receive data line */ + XMC_ECAT_PORT0_CTRL_RXD3_P5_7 = 1U, /**< RXD3B Receive data line */ + XMC_ECAT_PORT0_CTRL_RXD3_P7_7 = 2U /**< RXD3C Receive data line */ +} XMC_ECAT_PORT0_CTRL_RXD3_t; + +/** + * ECAT PORT 0 receive error line + */ +typedef enum XMC_ECAT_PORT0_CTRL_RX_ERR +{ + XMC_ECAT_PORT0_CTRL_RX_ERR_P4_0 = 0U, /**< RX_ERRA Receive error line */ + XMC_ECAT_PORT0_CTRL_RX_ERR_P2_6 = 1U, /**< RX_ERRB Receive error line */ + XMC_ECAT_PORT0_CTRL_RX_ERR_P7_9 = 2U /**< RX_ERRC Receive error line */ +} XMC_ECAT_PORT0_CTRL_RX_ERR_t; + +/** + * ECAT PORT 0 receive clock line + */ +typedef enum XMC_ECAT_PORT0_CTRL_RX_CLK +{ + XMC_ECAT_PORT0_CTRL_RX_CLK_P1_1 = 0U, /**< RX_CLKA Recevive clock */ + XMC_ECAT_PORT0_CTRL_RX_CLK_P5_4 = 1U, /**< RX_CLKB Recevive clock */ + XMC_ECAT_PORT0_CTRL_RX_CLK_P7_10 = 2U, /**< RX_CLKC Recevive clock */ +} XMC_ECAT_PORT0_CTRL_RX_CLK_t; + +/** + * ECAT PORT 0 data valid + */ +typedef enum XMC_ECAT_PORT0_CTRL_RX_DV +{ + XMC_ECAT_PORT0_CTRL_RX_DV_P1_9 = 0U, /**< RX_DVA Receive data valid */ + XMC_ECAT_PORT0_CTRL_RX_DV_P5_6 = 1U, /**< RX_DVB Receive data valid */ + XMC_ECAT_PORT0_CTRL_RX_DV_P7_11 = 2U, /**< RX_DVC Receive data valid */ +} XMC_ECAT_PORT0_CTRL_RX_DV_t; + +/** + * ECAT PORT 0 link status + */ +typedef enum XMC_ECAT_PORT0_CTRL_LINK +{ + XMC_ECAT_PORT0_CTRL_LINK_P4_1 = 0U, /**< LINKA Link status */ + XMC_ECAT_PORT0_CTRL_LINK_P1_15 = 1U, /**< LINKB Link status */ + XMC_ECAT_PORT0_CTRL_LINK_P9_10 = 2U, /**< LINKC Link status */ +} XMC_ECAT_PORT0_CTRL_LINK_t; + +/** + * ECAT PORT 0 transmit clock + */ +typedef enum XMC_ECAT_PORT0_CTRL_TX_CLK +{ + XMC_ECAT_PORT0_CTRL_TX_CLK_P1_0 = 0U, /**< TX_CLKA transmit clock */ + XMC_ECAT_PORT0_CTRL_TX_CLK_P5_5 = 1U, /**< TX_CLKB transmit clock */ + XMC_ECAT_PORT0_CTRL_TX_CLK_P9_1 = 2U, /**< TX_CLKC transmit clock */ +} XMC_ECAT_PORT0_CTRL_TX_CLK_t; + +/** + * ECAT PORT 1 receive data 0 line + */ +typedef enum XMC_ECAT_PORT1_CTRL_RXD0 +{ + XMC_ECAT_PORT1_CTRL_RXD0_P0_11 = 0U, /**< RXD0A receive data line */ + XMC_ECAT_PORT1_CTRL_RXD0_P14_7 = 1U, /**< RXD0B receive data line */ + XMC_ECAT_PORT1_CTRL_RXD0_P8_4 = 2U, /**< RXD0C receive data line */ +} XMC_ECAT_PORT1_CTRL_RXD0_t; + +/** + * ECAT PORT 1 receive data 1 line + */ +typedef enum XMC_ECAT_PORT1_CTRL_RXD1 +{ + XMC_ECAT_PORT1_CTRL_RXD1_P0_6 = 0U, /**< RXD1A receive data line */ + XMC_ECAT_PORT1_CTRL_RXD1_P14_12 = 1U, /**< RXD1B receive data line */ + XMC_ECAT_PORT1_CTRL_RXD1_P8_5 = 2U, /**< RXD1C receive data line */ +} XMC_ECAT_PORT1_CTRL_RXD1_t; + +/** + * ECAT PORT 1 receive data 2 line + */ +typedef enum XMC_ECAT_PORT1_CTRL_RXD2 +{ + XMC_ECAT_PORT1_CTRL_RXD2_P0_5 = 0U, /**< RXD2A receive data line */ + XMC_ECAT_PORT1_CTRL_RXD2_P14_13 = 1U, /**< RXD2B receive data line */ + XMC_ECAT_PORT1_CTRL_RXD2_P8_6 = 2U /**< RXD2C receive data line */ +} XMC_ECAT_PORT1_CTRL_RXD2_t; + +/** + * ECAT PORT 1 receive data 3 line + */ +typedef enum XMC_ECAT_PORT1_CTRL_RXD3 +{ + XMC_ECAT_PORT1_CTRL_RXD3_P0_4 = 0U, /**< RXD3A Receive data line */ + XMC_ECAT_PORT1_CTRL_RXD3_P14_14 = 1U, /**< RXD3B Receive data line */ + XMC_ECAT_PORT1_CTRL_RXD3_P8_7 = 2U /**< RXD3C Receive data line */ +} XMC_ECAT_PORT1_CTRL_RXD3_t; + +/** + * ECAT PORT 1 receive error line + */ +typedef enum XMC_ECAT_PORT1_CTRL_RX_ERR +{ + XMC_ECAT_PORT1_CTRL_RX_ERR_P3_5 = 0U, /**< RX_ERRA Receive error line */ + XMC_ECAT_PORT1_CTRL_RX_ERR_P15_2 = 1U, /**< RX_ERRB Receive error line */ + XMC_ECAT_PORT1_CTRL_RX_ERR_P8_9 = 2U /**< RX_ERRC Receive error line */ +} XMC_ECAT_PORT1_CTRL_RX_ERR_t; + +/** + * ECAT PORT 1 receive clock line + */ +typedef enum XMC_ECAT_PORT1_CTRL_RX_CLK +{ + XMC_ECAT_PORT1_CTRL_RX_CLK_P0_1 = 0U, /**< RX_CLKA Recevive clock */ + XMC_ECAT_PORT1_CTRL_RX_CLK_P14_6 = 1U, /**< RX_CLKB Recevive clock */ + XMC_ECAT_PORT1_CTRL_RX_CLK_P8_10 = 2U, /**< RX_CLKC Recevive clock */ +} XMC_ECAT_PORT1_CTRL_RX_CLK_t; + +/** + * ECAT PORT 1 data valid + */ +typedef enum XMC_ECAT_PORT1_CTRL_RX_DV +{ + XMC_ECAT_PORT1_CTRL_RX_DV_P0_9 = 0U, /**< RX_DVA Receive data valid */ + XMC_ECAT_PORT1_CTRL_RX_DV_P14_15 = 1U, /**< RX_DVB Receive data valid */ + XMC_ECAT_PORT1_CTRL_RX_DV_P8_11 = 2U, /**< RX_DVC Receive data valid */ +} XMC_ECAT_PORT1_CTRL_RX_DV_t; + +/** + * ECAT PORT 0 link status + */ +typedef enum XMC_ECAT_PORT1_CTRL_LINK +{ + XMC_ECAT_PORT1_CTRL_LINK_P3_4 = 0U, /**< LINKA Link status */ + XMC_ECAT_PORT1_CTRL_LINK_P15_3 = 1U, /**< LINKB Link status */ + XMC_ECAT_PORT1_CTRL_LINK_P9_11 = 2U, /**< LINKC Link status */ +} XMC_ECAT_PORT1_CTRL_LINK_t; + +/** + * ECAT PORT 1 transmit clock + */ +typedef enum XMC_ECAT_PORT1_CTRL_TX_CLK +{ + XMC_ECAT_PORT1_CTRL_TX_CLK_P0_10 = 0U, /**< TX_CLKA transmit clock */ + XMC_ECAT_PORT1_CTRL_TX_CLK_P5_9 = 1U, /**< TX_CLKB transmit clock */ + XMC_ECAT_PORT1_CTRL_TX_CLK_P9_0 = 2U, /**< TX_CLKC transmit clock */ +} XMC_ECAT_PORT1_CTRL_TX_CLK_t; + +/** + * ECAT management data I/O + */ +typedef enum XMC_ECAT_PORT_CTRL_MDIO +{ + XMC_ECAT_PORT_CTRL_MDIO_P0_12 = 0U, /**< MDIOA management data I/O */ + XMC_ECAT_PORT_CTRL_MDIO_P4_2 = 1U, /**< MDIOB management data I/O */ + XMC_ECAT_PORT_CTRL_MDIO_P9_7 = 2U /**< MDIOC management data I/O */ +} XMC_ECAT_PORT_CTRL_MDIO_t; + +/** + * ECAT latch 0 + */ +typedef enum XMC_ECAT_PORT_CTRL_LATCHIN0 +{ + XMC_ECAT_PORT_CTRL_LATCHIN0_P14_5 = 0U, /**< LATCH0A line */ + XMC_ECAT_PORT_CTRL_LATCHIN0_9_0 = 1U, /**< LATCH0B line @deprecated Please use instead XMC_ECAT_PORT_CTRL_LATCHIN0_P9_0 */ + XMC_ECAT_PORT_CTRL_LATCHIN0_P9_0 = 1U, /**< LATCH0B line */ + XMC_ECAT_PORT_CTRL_LATCHIN0_ERU0_PDOUT0 = 2U, /**< LATCH0C line */ + XMC_ECAT_PORT_CTRL_LATCHIN0_ERU1_PDOUT0 = 3U, /**< LATCH0D line */ +} XMC_ECAT_PORT_CTRL_LATCHIN0_t; + +/** + * ECAT latch 1 + */ +typedef enum XMC_ECAT_PORT_CTRL_LATCHIN1 +{ + XMC_ECAT_PORT_CTRL_LATCHIN1_P14_4 = 0U, /**< LATCH1 A line */ + XMC_ECAT_PORT_CTRL_LATCHIN1_9_1 = 1U, /**< LATCH1 B line @deprecated Please use instead XMC_ECAT_PORT_CTRL_LATCHIN1_P9_1 */ + XMC_ECAT_PORT_CTRL_LATCHIN1_P9_1 = 1U, /**< LATCH1 B line */ + XMC_ECAT_PORT_CTRL_LATCHIN1_ERU0_PDOUT1 = 2U, /**< LATCH1C line */ + XMC_ECAT_PORT_CTRL_LATCHIN1_ERU1_PDOUT1 = 3U, /**< LATCH1D line */ +} XMC_ECAT_PORT_CTRL_LATCHIN1_t; + +/** + * ECAT Port 0 Manual TX Shift configuration + */ +typedef enum XMC_ECAT_PORT0_CTRL_TX_SHIFT +{ + XMC_ECAT_PORT0_CTRL_TX_SHIFT_0NS = 0U, /**< ECAT Port 0 Manual TX Shift compensation 0 nanoseconds */ + XMC_ECAT_PORT0_CTRL_TX_SHIFT_10NS = 1U, /**< ECAT Port 0 Manual TX Shift compensation 10 nanoseconds */ + XMC_ECAT_PORT0_CTRL_TX_SHIFT_20NS = 2U, /**< ECAT Port 0 Manual TX Shift compensation 20 nanoseconds */ + XMC_ECAT_PORT0_CTRL_TX_SHIFT_30NS = 3U /**< ECAT Port 0 Manual TX Shift compensation 30 nanoseconds */ +} XMC_ECAT_PORT0_CTRL_TX_SHIFT_t; + +/** + * ECAT Port 1 Manual TX Shift configuration + */ +typedef enum XMC_ECAT_PORT1_CTRL_TX_SHIFT +{ + XMC_ECAT_PORT1_CTRL_TX_SHIFT_0NS = 0U, /**< ECAT Port 0 Manual TX Shift compensation 0 nanoseconds */ + XMC_ECAT_PORT1_CTRL_TX_SHIFT_10NS = 1U, /**< ECAT Port 0 Manual TX Shift compensation 10 nanoseconds */ + XMC_ECAT_PORT1_CTRL_TX_SHIFT_20NS = 2U, /**< ECAT Port 0 Manual TX Shift compensation 20 nanoseconds */ + XMC_ECAT_PORT1_CTRL_TX_SHIFT_30NS = 3U /**< ECAT Port 0 Manual TX Shift compensation 30 nanoseconds */ +} XMC_ECAT_PORT1_CTRL_TX_SHIFT_t; + +#endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eru.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eru.h index 851dc97a..3eb06c2c 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eru.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eru.h @@ -1,12 +1,12 @@ /** * @file xmc_eru.h - * @date 2015-10-27 + * @date 2016-03-10 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -46,6 +46,9 @@ * 2015-10-07: * - Doc update for XMC_ERU_ETL_CONFIG_t field
* + * 2016-03-10: + * - XMC_ERU_ETL_GetEdgeDetection() API is added to get the configured edge for event generation.
+ * * @endcond */ @@ -564,6 +567,20 @@ void XMC_ERU_ETL_SetEdgeDetection(XMC_ERU_t *const eru, const uint8_t channel, const XMC_ERU_ETL_EDGE_DETECTION_t edge_detection); +/** + * @param eru A constant pointer to XMC_ERU_t, pointing to the ERU base address. + * @param channel ERU_ETLx(Event trigger logic unit) channel. + * Range : [0 to 3] + * + * @return XMC_ERU_ETL_EDGE_DETECTION_t indicate which egde/s is configured for event generation + * + * \parDescription:
+ * Return event trigger edge/s by reading (RE, FE) bits of EXICONx(x = [0 to 3]) register.
+ * \par + * Rising edge, falling edge or either edges can be selected to generate the event. + * Call this to get the configured trigger edge. */ +XMC_ERU_ETL_EDGE_DETECTION_t XMC_ERU_ETL_GetEdgeDetection(XMC_ERU_t *const eru, + const uint8_t channel); /** * @param eru A constant pointer to XMC_ERU_t, pointing to the ERU base address. * @param channel ERU_ETLx(Event trigger logic unit) channel. diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac.h index 0f26d305..7e2f8b09 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac.h @@ -1,13 +1,13 @@ /** * @file xmc_eth_mac.h - * @date 2015-10-27 + * @date 2016-06-08 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -38,8 +38,18 @@ * -------------- * * 2015-06-20: - * - Initial
+ * - Initial * + * 2016-04-25: + * - Change XMC_ETH_MAC_BUF_SIZE to 1524 to allow for Tagged MAC frame format + * + * 2016-05-19: + * - Added XMC_ETH_MAC_GetTxBuffer() and XMC_ETH_MAC_GetRxBuffer() + * - Added XMC_ETH_MAC_SetTxBufferSize() + * + * 2016-06-08: + * - Added XMC_ETH_MAC_IsRxDescriptorOwnedByDma() + * * @endcond */ @@ -80,10 +90,62 @@ * MACROS *********************************************************************************************************************/ -#define XMC_ETH_MAC_BUF_SIZE (1518) /**< ETH MAC buffer size */ +#define XMC_ETH_MAC_BUF_SIZE (1524) /**< ETH MAC buffer size */ #define XMC_ETH_MAC_PHY_MAX_RETRIES (0xffffUL) /**< Maximum retries */ #define XMC_ETH_WAKEUP_REGISTER_LENGTH (8U) /**< Remote wakeup frame reg length */ +/** + * TDES0 Descriptor TX Packet Control/Status + */ +#define ETH_MAC_DMA_TDES0_OWN (0x80000000U) /**< Own bit 1=DMA, 0=CPU */ +#define ETH_MAC_DMA_TDES0_IC (0x40000000U) /**< Interrupt on competition */ +#define ETH_MAC_DMA_TDES0_LS (0x20000000U) /**< Last segment */ +#define ETH_MAC_DMA_TDES0_FS (0x10000000U) /**< First segment */ +#define ETH_MAC_DMA_TDES0_DC (0x08000000U) /**< Disable CRC */ +#define ETH_MAC_DMA_TDES0_DP (0x04000000U) /**< Disable pad */ +#define ETH_MAC_DMA_TDES0_TTSE (0x02000000U) /**< Transmit time stamp enable */ +#define ETH_MAC_DMA_TDES0_CIC (0x00C00000U) /**< Checksum insertion control */ +#define ETH_MAC_DMA_TDES0_TER (0x00200000U) /**< Transmit end of ring */ +#define ETH_MAC_DMA_TDES0_TCH (0x00100000U) /**< Second address chained */ +#define ETH_MAC_DMA_TDES0_TTSS (0x00020000U) /**< Transmit time stamp status */ +#define ETH_MAC_DMA_TDES0_IHE (0x00010000U) /**< IP header error */ +#define ETH_MAC_DMA_TDES0_ES (0x00008000U) /**< Error summary */ +#define ETH_MAC_DMA_TDES0_JT (0x00004000U) /**< Jabber timeout */ +#define ETH_MAC_DMA_TDES0_FF (0x00002000U) /**< Frame flushed */ +#define ETH_MAC_DMA_TDES0_IPE (0x00001000U) /**< IP payload error */ +#define ETH_MAC_DMA_TDES0_LOC (0x00000800U) /**< Loss of carrier */ +#define ETH_MAC_DMA_TDES0_NC (0x00000400U) /**< No carrier */ +#define ETH_MAC_DMA_TDES0_LC (0x00000200U) /**< Late collision */ +#define ETH_MAC_DMA_TDES0_EC (0x00000100U) /**< Excessive collision */ +#define ETH_MAC_DMA_TDES0_VF (0x00000080U) /**< VLAN frame */ +#define ETH_MAC_DMA_TDES0_CC (0x00000078U) /**< Collision count */ +#define ETH_MAC_DMA_TDES0_ED (0x00000004U) /**< Excessive deferral */ +#define ETH_MAC_DMA_TDES0_UF (0x00000002U) /**< Underflow error */ +#define ETH_MAC_DMA_TDES0_DB (0x00000001U) /**< Deferred bit */ + +/** + * RDES0 Descriptor RX Packet Status + */ +#define ETH_MAC_DMA_RDES0_OWN (0x80000000U) /**< Own bit 1=DMA, 0=CPU */ +#define ETH_MAC_DMA_RDES0_AFM (0x40000000U) /**< Destination address filter fail */ +#define ETH_MAC_DMA_RDES0_FL (0x3FFF0000U) /**< Frame length mask */ +#define ETH_MAC_DMA_RDES0_ES (0x00008000U) /**< Error summary */ +#define ETH_MAC_DMA_RDES0_DE (0x00004000U) /**< Descriptor error */ +#define ETH_MAC_DMA_RDES0_SAF (0x00002000U) /**< Source address filter fail */ +#define ETH_MAC_DMA_RDES0_LE (0x00001000U) /**< Length error */ +#define ETH_MAC_DMA_RDES0_OE (0x00000800U) /**< Overflow error */ +#define ETH_MAC_DMA_RDES0_VLAN (0x00000400U) /**< VLAN tag */ +#define ETH_MAC_DMA_RDES0_FS (0x00000200U) /**< First descriptor */ +#define ETH_MAC_DMA_RDES0_LS (0x00000100U) /**< Last descriptor */ +#define ETH_MAC_DMA_RDES0_TSA (0x00000080U) /**< Timestamp available */ +#define ETH_MAC_DMA_RDES0_LC (0x00000040U) /**< Late collision */ +#define ETH_MAC_DMA_RDES0_FT (0x00000020U) /**< Frame type */ +#define ETH_MAC_DMA_RDES0_RWT (0x00000010U) /**< Receive watchdog timeout */ +#define ETH_MAC_DMA_RDES0_RE (0x00000008U) /**< Receive error */ +#define ETH_MAC_DMA_RDES0_DBE (0x00000004U) /**< Dribble bit error */ +#define ETH_MAC_DMA_RDES0_CE (0x00000002U) /**< CRC error */ +#define ETH_MAC_DMA_RDES0_ESA (0x00000001U) /**< Extended Status/Rx MAC address */ + /********************************************************************************************************************** * ENUMS *********************************************************************************************************************/ @@ -1132,6 +1194,21 @@ __STATIC_INLINE void XMC_ETH_MAC_SetLink(XMC_ETH_MAC_t *const eth_mac, */ void XMC_ETH_MAC_ReturnRxDescriptor(XMC_ETH_MAC_t *const eth_mac); +/** + * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address + * @return bool true if RX descriptor is owned by DMA, false otherwise + * + * \parDescription:
+ * Is RX descriptor owned by DMA?
+ * + * \par + * The function checks if the RX descriptor is owned by the DMA. + */ +__STATIC_INLINE bool XMC_ETH_MAC_IsRxDescriptorOwnedByDma(XMC_ETH_MAC_t *const eth_mac) +{ + return ((eth_mac->rx_desc[eth_mac->rx_index].status & ETH_MAC_DMA_RDES0_OWN) != 0U); +} + /** * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address * @return None @@ -1154,7 +1231,10 @@ void XMC_ETH_MAC_ReturnTxDescriptor(XMC_ETH_MAC_t *const eth_mac); * \par * The function checks if the TX descriptor is owned by the DMA. */ -bool XMC_ETH_MAC_IsTxDescriptorOwnedByDma(XMC_ETH_MAC_t *const eth_mac); +__STATIC_INLINE bool XMC_ETH_MAC_IsTxDescriptorOwnedByDma(XMC_ETH_MAC_t *const eth_mac) +{ + return ((eth_mac->tx_desc[eth_mac->tx_index].status & ETH_MAC_DMA_TDES0_OWN) != 0U); +} /** * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address @@ -1286,6 +1366,43 @@ __STATIC_INLINE void XMC_ETH_MAC_ResumeRx(XMC_ETH_MAC_t *const eth_mac) eth_mac->regs->RECEIVE_POLL_DEMAND = 0U; } +/** + * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address + * @return Pointer to current TX buffer + * + * \parDescription:
+ * Returns the current TX buffer. + */ +__STATIC_INLINE uint8_t *XMC_ETH_MAC_GetTxBuffer(XMC_ETH_MAC_t *const eth_mac) +{ + return (uint8_t *)(eth_mac->tx_desc[eth_mac->tx_index].buffer1); +} + +/** + * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address + * @return Pointer to current RX buffer + * + * \parDescription:
+ * Returns the current RX buffer. + */ +__STATIC_INLINE uint8_t *XMC_ETH_MAC_GetRxBuffer(XMC_ETH_MAC_t *const eth_mac) +{ + return (uint8_t *)(eth_mac->rx_desc[eth_mac->rx_index].buffer1); +} + +/** + * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address + * @param size Size of buffer + * @return None + * + * \parDescription:
+ * Sets the current TX buffer size. + */ +__STATIC_INLINE void XMC_ETH_MAC_SetTxBufferSize(XMC_ETH_MAC_t *const eth_mac, uint32_t size) +{ + eth_mac->tx_desc[eth_mac->tx_index].length = size; +} + /** * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address * @param event A valid ETH PMT event (XMC_ETH_MAC_PMT_EVENT_t) or a valid combination diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac_map.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac_map.h index 56483727..84260ed1 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac_map.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_mac_map.h @@ -1,12 +1,12 @@ /** * @file xmc_eth_mac_map.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_phy.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_phy.h index 0c97e74f..3c6ae2a1 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_phy.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_eth_phy.h @@ -1,12 +1,12 @@ /** * @file xmc_eth_phy.h - * @date 2015-10-27 + * @date 2015-12-15 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -37,7 +37,10 @@ * -------------- * * 2015-06-20: - * - Initial
+ * - Initial + * + * 2015-12-15: + * - Added XMC_ETH_PHY_ExitPowerDown and XMC_ETH_PHY_Reset * * @endcond */ @@ -95,7 +98,7 @@ extern "C" { * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address * @param phy_addr Physical address * @param config A constant pointer to XMC_ETH_PHY_CONFIG_t, pointing to a physical layer config - * @return int32_t ETH physical layer initialization status + * @return int32_t return status XMC_ETH_PHY_STATUS_t * * \parDescription:
* Initialize the ETH physical layer interface
@@ -109,17 +112,36 @@ int32_t XMC_ETH_PHY_Init(XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, const X /** * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address * @param phy_addr Physical address - * @return int32_t ETH MAC return status + * @return int32_t return status XMC_ETH_PHY_STATUS_t * * \parDescription:
- * Enable power down mode
+ * Enter power down mode
* - * \par - * Power-down mode is used to power down the KSZ8021/31RNL device (on the XMC4500 relax kit) - * when it is not in use after power-up. It is enabled by writing a 1 to register 0h, bit [11]. */ int32_t XMC_ETH_PHY_PowerDown(XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr); +/** + * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address + * @param phy_addr Physical address + * @return int32_t return status XMC_ETH_PHY_STATUS_t + * + * \parDescription:
+ * Exit power down mode
+ * + */ +int32_t XMC_ETH_PHY_ExitPowerDown(XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr); + +/** + * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address + * @param phy_addr Physical address + * @return int32_t return status XMC_ETH_PHY_STATUS_t + * + * \parDescription:
+ * Reset transciver
+ * + */ +int32_t XMC_ETH_PHY_Reset(XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr); + /** * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address * @param phy_addr Physical address @@ -162,6 +184,16 @@ XMC_ETH_LINK_SPEED_t XMC_ETH_PHY_GetLinkSpeed(XMC_ETH_MAC_t *const eth_mac, uint */ XMC_ETH_LINK_DUPLEX_t XMC_ETH_PHY_GetLinkDuplex(XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr); +/** + * @param eth_mac A constant pointer to XMC_ETH_MAC_t, pointing to the ETH MAC base address + * @param phy_addr Physical address + * @return bool True if autonegotiation process is finished otherwise false + * + * \parDescription:
+ * Get status of autonegotiation
+ */ +bool XMC_ETH_PHY_IsAutonegotiationCompleted(XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr); + #ifdef __cplusplus } #endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_fce.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_fce.h index 1e7b4753..4f1f1049 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_fce.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_fce.h @@ -1,12 +1,12 @@ /** * @file xmc_fce.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_flash.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_flash.h index c72a837f..69b8d552 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_flash.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_flash.h @@ -1,12 +1,12 @@ /** * @file xmc_flash.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -191,7 +191,7 @@ void XMC_FLASH_DisableEvent(const uint32_t event_msk); * Programs a single flash page associated with the specified \a address.\n\n XMC1000 Flash can be programmed with one * page (256 bytes) using this API. It calls the Flash Firmware routine \a XMC1000_NvmProgVerify(unsigned long pageAddr) * to perform the programming. Refer XMC1000 reference manual of for more details on flash firmware routines - * (Section 25.3). Call XMC_FLASH_GetStatus() API after calling this API, to verify the erase operation. + * (Section 25.3). Call XMC_FLASH_GetStatus() API after calling this API, to verify the programming operation. * \endif * \if XMC4 * Programs a single flash page associated with the specified \a address.\n\n XMC4000 flash can be programmed with a @@ -199,7 +199,7 @@ void XMC_FLASH_DisableEvent(const uint32_t event_msk); * bits inside status register. It starts the write process by issuing the page mode command followed by the load page * command which loads the targeted \a data blocks into internal assembly buffer. Finally, it issues the write page * command which programs the \a data into flash. Call XMC_FLASH_GetStatus() API after calling this API, to verify the - * erase operation.\n + * programming operation.\n * \endif * * \parNote:
diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_gpio.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_gpio.h index 6d31e4f9..66667db1 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_gpio.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_gpio.h @@ -1,12 +1,12 @@ /** * @file xmc_gpio.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm.h index 7881cbb1..8c30bd8f 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm.h @@ -1,13 +1,13 @@ /** * @file xmc_hrpwm.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm_map.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm_map.h index 85d0efd2..04fa35d4 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm_map.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_hrpwm_map.h @@ -1,13 +1,13 @@ /** * @file xmc_hrpwm_map.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2c.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2c.h index 7dad6a5e..31ac22b6 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2c.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2c.h @@ -1,12 +1,12 @@ /** * @file xmc_i2c.h - * @date 2015-10-27 + * @date 2016-05-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -64,6 +64,12 @@ * - Naming of APIs modified: from XMC_I2C_CH_EnableSlaveAcknowledgeTo00() to XMC_I2C_CH_EnableAcknowledgeAddress0() * and from XMC_I2C_CH_DisableSlaveAcknowledgeTo00() to XMC_I2C_CH_DisableAcknowledgeAddress0(). * + * 2016-05-20: + * - Added XMC_I2C_CH_EnableDataTransmission() and XMC_I2C_CH_DisableDataTransmission() + * + * 2016-08-17: + * - Improved documentation of slave address passing + * * @endcond * */ @@ -359,8 +365,8 @@ __STATIC_INLINE void XMC_I2C_CH_SetInterruptNodePointer(XMC_USIC_CH_t *const cha * @param channel Pointer to USIC channel handler of type @ref XMC_USIC_CH_t \n * \b Range: @ref XMC_I2C0_CH0, @ref XMC_I2C0_CH1,@ref XMC_I2C1_CH0,@ref XMC_I2C1_CH1,@ref XMC_I2C2_CH0,@ref XMC_I2C2_CH1 @note Availability of I2C1 and I2C2 depends on device selection * @param interrupt_node Interrupt node pointer to be configured. \n - * \b Range: @ref XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, - * @ref XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc. + * \b Range: @ref XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT, + * @ref XMC_I2C_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER etc. * @param service_request Service request number.\n * \b Range: 0 to 5. * @return None @@ -434,7 +440,10 @@ __STATIC_INLINE void XMC_I2C_CH_SetInputSource(XMC_USIC_CH_t *const channel, con * * \par * Address is set in PCR_IICMode register by checking if it is in 10-bit address group or 7-bit address group. - * (If first five bits of address are assigned with 0xF0, then address mode is 10-bit mode otherwise it is 7-bit mode) + * (If first five bits of address are assigned with 0xF0, then address mode is 10-bit mode otherwise it is 7-bit mode)\n + * @note A 7-bit address should include an additional bit at the LSB for read/write indication. For example, address 0x05 should + * be provided as 0x0a. A 10-bit address should be provided with the identifier 0b11110xx at the most significant bits. For example, + * address 0x305 should be provided as 0x7b05(bitwise OR with 0x7800). * * \parRelated APIs:
* XMC_I2C_CH_GetSlaveAddress()\n\n @@ -450,7 +459,9 @@ void XMC_I2C_CH_SetSlaveAddress(XMC_USIC_CH_t *const channel, const uint16_t add * * \par * Returns the address using PCR_IICMode register by checking if it is in 10-bit address group or 7-bit address group.
- * (If first five bits of address are assigned with 0xF0, then address mode is considered as 10-bit mode otherwise it is 7-bit mode) + * (If first five bits of address are assigned with 0xF0, then address mode is considered as 10-bit mode otherwise it is 7-bit mode)\n + * @note A 7-bit address will include an additional bit at the LSB. For example, address 0x05 will be returned as 0x0a. + * 10-bit address will not include the 10-bit address identifier 0b11110xx at the most signifcant bits. * * \parRelated APIs:
* XMC_I2C_CH_SetSlaveAddress()\n\n @@ -467,7 +478,11 @@ uint16_t XMC_I2C_CH_GetSlaveAddress(const XMC_USIC_CH_t *const channel); * Starts the I2C master \a channel.
* * \par - * Sends the Start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes. + * Sends the Start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes.\n + * @note Address(addr) should reserve an additional bit at the LSB for read/write indication. For example, address 0x05 should + * be provided as 0x0a. If the address is 10-bit, only most significant bits with the 10-bit identifier should be sent using this function. + * For example, if the 10-bit address is 0x305, the address should be provided as 0xf6(prepend with 0b11110, upper two bits of address 0b11, + * followed by 1-bit field for read/write). * * \parRelated APIs:
* XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()\n\n @@ -484,7 +499,11 @@ void XMC_I2C_CH_MasterStart(XMC_USIC_CH_t *const channel, const uint16_t addr, c * Sends the repeated start condition from I2C master \a channel.
* * \par - * Sends the repeated start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes. + * Sends the repeated start condition with read/write command by updating IN/TBUF register based on FIFO/non-FIFO modes.\n + * @note Address(addr) should reserve an additional bit at the LSB for read/write indication. For example, address 0x05 should + * be provided as 0x0a. If the address is 10-bit, only most significant bits with the 10-bit identifier should be sent using this function. + * For example, if the 10-bit address is 0x305, the address should be provided as 0xf6(prepend with 0b11110, upper two bits of address 0b11, + * followed by 1-bit field for read/write). * * \parRelated APIs:
* XMC_I2C_CH_MasterTransmit(), XMC_USIC_CH_GetTransmitBufferStatus()\n\n @@ -711,6 +730,43 @@ __STATIC_INLINE void XMC_I2C_CH_DisableAcknowledgeAddress0(XMC_USIC_CH_t *const channel->PCR_IICMode &= ~USIC_CH_PCR_IICMode_ACK00_Msk; } +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_I2C0_CH0, @ref XMC_I2C0_CH1,@ref XMC_I2C1_CH0,@ref XMC_I2C1_CH1,@ref XMC_I2C2_CH0,@ref XMC_I2C2_CH1 @note Availability of I2C1 and I2C2 depends on device selection + * @return None + * + * \parDescription
+ * Enable data transmission.\n\n + * Use this function in combination with XMC_I2C_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * @note If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode() + * + * \parRelated APIs:
+ * XMC_I2C_CH_DisableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_I2C_CH_EnableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_ON_TDV); +} + +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_I2C0_CH0, @ref XMC_I2C0_CH1,@ref XMC_I2C1_CH0,@ref XMC_I2C1_CH1,@ref XMC_I2C2_CH0,@ref XMC_I2C2_CH1 @note Availability of I2C1 and I2C2 depends on device selection + * @return None + * + * \parDescription
+ * Disable data transmission.\n\n + * Use this function in combination with XMC_I2C_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * + * \parRelated APIs:
+ * XMC_I2C_CH_EnableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_I2C_CH_DisableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_DISABLED); +} + #ifdef __cplusplus } #endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2s.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2s.h index 01b22448..77c18076 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2s.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_i2s.h @@ -1,12 +1,12 @@ /** * @file xmc_i2s.h - * @date 2015-10-27 + * @date 2016-06-30 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -51,6 +51,12 @@ * 2015-09-14: * - Modified XMC_I2S_CH_SetSystemWordLength for supporting up to 63 system word length
* + * 2016-05-20: + * - Added XMC_I2S_CH_EnableDataTransmission() and XMC_I2S_CH_DisableDataTransmission() + * + * 2016-06-30: + * - Documentation updates. + * * @endcond * */ @@ -222,13 +228,15 @@ typedef enum XMC_I2S_CH_BUS_MODE */ typedef struct XMC_I2S_CH_CONFIG { - uint32_t baudrate; /**< Module baud rate for communication */ - uint8_t data_bits; /**< Number of bits for the data field. Value configured as USIC channel word length. \n + uint32_t baudrate; /**< Module baud rate for communication */ + uint8_t data_bits; /**< Data word length. A data frame can consists of several data words. \n + Value configured as USIC channel word length. \n \b Range: minimum= 1, maximum= 16*/ - uint8_t frame_length; /**< Indicates number of bits in a frame. Configured as USIC channel frame length. \n + uint8_t frame_length; /**< Number of data bits transferred after a change of signal WA (data frame). \n + Configured as USIC channel frame length. \n \b Range: minimum= 1, maximum= 63*/ - uint8_t data_delayed_sclk_periods; /**< Data delay defined in sclk periods*/ - XMC_I2S_CH_WA_POLARITY_t wa_inversion; /**< Enable inversion of Slave select signal relative to the internal WA*/ + uint8_t data_delayed_sclk_periods; /**< Data delay defined in sclk periods */ + XMC_I2S_CH_WA_POLARITY_t wa_inversion; /**< Enable inversion of Slave select signal relative to the internal WA */ XMC_I2S_CH_BUS_MODE_t bus_mode; /**< Bus mode MASTER/SLAVE */ } XMC_I2S_CH_CONFIG_t; @@ -239,6 +247,29 @@ typedef struct XMC_I2S_CH_CONFIG #ifdef __cplusplus extern "C" { #endif + +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_I2S0_CH0, XMC_I2S0_CH1,XMC_I2S1_CH0, XMC_I2S1_CH1,XMC_I2S2_CH0, XMC_I2S2_CH1 @note Availability of I2S1 and I2S2 depends on device selection + * @param config Constant pointer to I2S configuration structure of type @ref XMC_I2S_CH_CONFIG_t. + * @return XMC_I2S_CH_STATUS_t Status of initializing the USIC channel for I2S protocol.\n + * \b Range: @ref XMC_I2S_CH_STATUS_OK if initialization is successful.\n + * @ref XMC_I2S_CH_STATUS_ERROR if configuration of baudrate failed. + * + * \parDescription
+ * Initializes the USIC channel for I2S protocol.\n\n + * During the initialization, USIC channel is enabled and baudrate is configured. + * After each change of the WA signal, a complete data frame is intended to be transferred (frame length <= system word length). + * The number of data bits transferred after a change of signal WA is defined by config->frame_length. + * A data frame can consist of several data words with a data word length defined by config->data_bits. + * The changes of signal WA define the system word length as the number of SCLK cycles between two changes of WA. + * The system word length is set by default to the frame length defined by config->frame_length. + * + * XMC_I2S_CH_Start() should be invoked after the initialization to enable the channel. + * + * \parRelated APIs:
+ * XMC_I2S_CH_Start(), XMC_I2S_CH_Stop(), XMC_I2S_CH_Transmit(), XMC_I2S_CH_SetSystemWordLength()\n\n\n + */ void XMC_I2S_CH_Init(XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CONFIG_t *const config); /** @@ -755,6 +786,43 @@ __STATIC_INLINE void XMC_I2S_CH_DisableDelayCompensation(XMC_USIC_CH_t *const ch XMC_USIC_CH_DisableDelayCompensation(channel); } +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_I2S0_CH0, @ref XMC_I2S0_CH1,@ref XMC_I2S1_CH0,@ref XMC_I2S1_CH1,@ref XMC_I2S2_CH0,@ref XMC_I2S2_CH1 @note Availability of I2S1 and I2S2 depends on device selection + * @return None + * + * \parDescription
+ * Enable data transmission.\n\n + * Use this function in combination with XMC_I2S_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * @note If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode() + * + * \parRelated APIs:
+ * XMC_I2S_CH_DisableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_I2S_CH_EnableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_ON_TDV); +} + +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_I2S0_CH0, @ref XMC_I2S0_CH1,@ref XMC_I2S1_CH0,@ref XMC_I2S1_CH1,@ref XMC_I2S2_CH0,@ref XMC_I2S2_CH1 @note Availability of I2S1 and I2S2 depends on device selection + * @return None + * + * \parDescription
+ * Disable data transmission.\n\n + * Use this function in combination with XMC_I2S_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * + * \parRelated APIs:
+ * XMC_I2S_CH_EnableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_I2S_CH_DisableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_DISABLED); +} + #ifdef __cplusplus } #endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ledts.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ledts.h index 11458490..65df18a1 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ledts.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_ledts.h @@ -1,12 +1,12 @@ /** * @file xmc_ledts.h - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_math.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_math.h new file mode 100644 index 00000000..5cd606a6 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_math.h @@ -0,0 +1,1088 @@ +/** + * @file xmc_math.h + * @date 2015-10-08 + * + * @cond + ********************************************************************************** + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification,are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share + * modifications, enhancements or bug fixes with Infineon Technologies AG + * dave@infineon.com). + ********************************************************************************** + * + * Change History + * -------------- + * + * 2015-06-20: + * - Removed version macros and declaration of GetDriverVersion API
+ * - Updated copyright and change history section. + * + * 2015-08-25: + * - XMC_MATH_ClearEvent() API is updated to set the event clear flag bit.
+ * + * 2015-09-23: + * - Added SQRT functions + * + * 2015-10-08: + * - Return values for sin(), cos(), sinh(), cosh(), arctan() are corrected. + * + * @endcond + * + */ + +#ifndef XMC_MATH_H +#define XMC_MATH_H + +#ifdef __cplusplus +extern "C" { +#endif + +/********************************************************************************************************************* + * HEADER FILES + ********************************************************************************************************************/ +#include + +#if defined(MATH) +#include + +/** + * @addtogroup XMClib + * @{ + */ + +/** + * @addtogroup MATH + * @{ + * @brief MATH Coprocessor (MATH) driver for the XMC1302 microcontroller family
+ * + * The MATH Coprocessor (MATH) module comprises of two independent sub-blocks to support the CPU in math-intensive + * computations: a Divider Unit (DIV) for signed and unsigned 32-bit division operations and a CORDIC + * (COrdinate Rotation DIgital Computer) Coprocessor for computation of trigonometric, linear or hyperbolic functions.
+ * + * MATH driver features: + * -# CORDIC Coprocessor is used for computation of trigonometric and hyperbolic functions + * -# Supports result chaining between the Divider Unit and CORDIC Coprocessor + * -# All MATH APIs are available in Blocking and non-blocking modes. Non-blocking APIs are suffixed with NB. + * -# 32bit signed and unsigned division implementations available for __aeabi_uidiv(), __aeabi_idiv(), __aeabi_uidivmod(), __aeabi_idivmod() + * -# Divider and CORDIC unit busy status can be checked by XMC_MATH_DIV_IsBusy() and XMC_MATH_CORDIC_IsBusy() + * -# Individual APIs available to return the result of each non-blocking MATH function + * + * Note:
+ * All non-blocking MATH APIs are not atomic and hence occurence of interrupts during the normal execution of + * these APIs may lead to erroneous results. User has to exercise caution while using these APIs. + * + * Example: + * Execution of divide instruction (/) in an ISR during the normal execution of non-blocking APIs may give erroneous results. + * + */ + + +/********************************************************************************************************************* + * TYPE DEFINITIONS + ********************************************************************************************************************/ +/** + * @brief This typedef is used for Input and Output Data representation in blocking & non-blocking functions. + * XMC_MATH_Q0_23_t => 1 Signed bit, 0 Integer bits, 23 fraction bits. + */ +typedef int32_t XMC_MATH_Q0_23_t; + +/** + * @brief This typedef is used for Input Data representation in blocking & non-blocking functions. + * XMC_MATH_Q8_15_t => 1 Signed bit, 8 Integer bits, 15 fraction bits. + */ +typedef int32_t XMC_MATH_Q8_15_t; + +/** + * @brief This typedef is used for Output Data representation in blocking & non-blocking functions. + * XMC_MATH_Q1_22_t => 1 Signed bit, 1 Integer bits, 22 fraction bits. + */ +typedef int32_t XMC_MATH_Q1_22_t; + +/** + * @brief This typedef is used for Output Data representation in blocking & non-blocking functions. + * XMC_MATH_Q0_11_t => 1 Signed bit, 0 Integer bits, 11 fraction bits. + */ +typedef int32_t XMC_MATH_Q0_11_t; + +/********************************************************************************************************************* + * MACROS + ********************************************************************************************************************/ +/* Utility macros */ +#define XMC_MATH_Q0_23(x) ((XMC_MATH_Q0_23_t)(((x) >= 0) ? ((x) * (1 << 23) + 0.5) : ((x) * (1 << 23) - 0.5))) /**< Converts the given number to XMC_MATH_Q0_23_t format */ +#define XMC_MATH_Q0_11(x) ((XMC_MATH_Q0_11_t)(((x) >= 0) ? ((x) * (1 << 11) + 0.5) : ((x) * (1 << 11) - 0.5))) /**< Converts the given number to XMC_MATH_Q0_11_t format */ + +/********************************************************************************************************************* + * ENUMS + ********************************************************************************************************************/ + +/** + * @brief Service request events for the DIV and CORDIC modules + */ +typedef enum XMC_MATH_EVENT +{ + XMC_MATH_EVENT_DIV_END_OF_CALC = 1U, /**< Divider end of calculation event */ + XMC_MATH_EVENT_DIV_ERROR = 2U, /**< Divider error event */ + XMC_MATH_EVENT_CORDIC_END_OF_CALC = 4U, /**< CORDIC end of calculation event */ + XMC_MATH_EVENT_CORDIC_ERROR = 8U /**< CORDIC error event */ +} XMC_MATH_EVENT_t; + +/** + * @brief Dividend Register Result Chaining + */ +typedef enum XMC_MATH_DIV_DVDRC +{ + XMC_MATH_DIV_DVDRC_DISABLED = 0U << MATH_GLBCON_DVDRC_Pos, /**< No result chaining is selected */ + XMC_MATH_DIV_DVDRC_QUOT_IS_SOURCE = 1U << MATH_GLBCON_DVDRC_Pos, /**< QUOT register is the selected source */ + XMC_MATH_DIV_DVDRC_RMD_IS_SOURCE = 2U << MATH_GLBCON_DVDRC_Pos, /**< RMD register is the selected source */ + XMC_MATH_DIV_DVDRC_CORRX_IS_SOURCE = 3U << MATH_GLBCON_DVDRC_Pos, /**< CORRX is the selected source */ + XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE = 4U << MATH_GLBCON_DVDRC_Pos, /**< CORRY is the selected source */ + XMC_MATH_DIV_DVDRC_CORRZ_IS_SOURCE = 5U << MATH_GLBCON_DVDRC_Pos /**< CORRZ is the selected source */ +} XMC_MATH_DIV_DVDRC_t; + +/** + * @brief Divisor Register Result Chaining + */ +typedef enum XMC_MATH_DIV_DVSRC +{ + XMC_MATH_DIV_DVSRC_DISABLED = 0U << MATH_GLBCON_DVSRC_Pos, /**< No result chaining is selected */ + XMC_MATH_DIV_DVSRC_QUOT_IS_SOURCE = 1U << MATH_GLBCON_DVSRC_Pos, /**< QUOT register is the selected source */ + XMC_MATH_DIV_DVSRC_RMD_IS_SOURCE = 2U << MATH_GLBCON_DVSRC_Pos, /**< RMD register is the selected source */ + XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE = 3U << MATH_GLBCON_DVSRC_Pos, /**< CORRX is the selected source */ + XMC_MATH_DIV_DVSRC_CORRY_IS_SOURCE = 4U << MATH_GLBCON_DVSRC_Pos, /**< CORRY is the selected source */ + XMC_MATH_DIV_DVSRC_CORRZ_IS_SOURCE = 5U << MATH_GLBCON_DVSRC_Pos /**< CORRZ is the selected source */ +} XMC_MATH_DIV_DVSRC_t; + +/** + * @brief CORDX Register Result Chaining + */ +typedef enum XMC_MATH_CORDIC_CORDXRC +{ + XMC_MATH_CORDIC_CORDXRC_DISABLED = 0U << MATH_GLBCON_CORDXRC_Pos, /**< No result chaining is selected */ + XMC_MATH_CORDIC_CORDXRC_QUOT_IS_SOURCE = 1U << MATH_GLBCON_CORDXRC_Pos, /**< QUOT register is the selected source */ + XMC_MATH_CORDIC_CORDXRC_RMD_IS_SOURCE = 2U << MATH_GLBCON_CORDXRC_Pos /**< RMD register is the selected source */ +} XMC_MATH_CORDIC_CORDXRC_t; + +/** + * @brief CORDY Register Result Chaining + */ +typedef enum XMC_MATH_CORDIC_CORDYRC +{ + XMC_MATH_CORDIC_CORDYRC_DISABLED = 0U << MATH_GLBCON_CORDYRC_Pos, /**< No result chaining is selected */ + XMC_MATH_CORDIC_CORDYRC_QUOT_IS_SOURCE = 1U << MATH_GLBCON_CORDYRC_Pos, /**< QUOT register is the selected source */ + XMC_MATH_CORDIC_CORDYRC_RMD_IS_SOURCE = 2U << MATH_GLBCON_CORDYRC_Pos /**< RMD register is the selected source */ +} XMC_MATH_CORDIC_CORDYRC_t; + +/** + * @brief CORDZ Register Result Chaining + */ +typedef enum XMC_MATH_CORDIC_CORDZRC +{ + XMC_MATH_CORDIC_CORDZRC_DISABLED = 0U << MATH_GLBCON_CORDZRC_Pos, /**< No result chaining is selected */ + XMC_MATH_CORDIC_CORDZRC_QUOT_IS_SOURCE = 1U << MATH_GLBCON_CORDZRC_Pos, /**< QUOT register is the selected source */ + XMC_MATH_CORDIC_CORDZRC_RMD_IS_SOURCE = 2U << MATH_GLBCON_CORDZRC_Pos /**< RMD register is the selected source */ +} XMC_MATH_CORDIC_CORDZRC_t; +/** + * @brief CORDIC operating mode + */ +typedef enum XMC_MATH_CORDIC_OPERATING_MODE +{ + XMC_MATH_CORDIC_OPERATING_MODE_LINEAR = 0U << MATH_CON_MODE_Pos, /**< Linear mode */ + XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR = 1U << MATH_CON_MODE_Pos, /**< Circular mode */ + XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC = 3U << MATH_CON_MODE_Pos /**< Hyperbolic mode */ +} XMC_MATH_CORDIC_OPERATING_MODE_t; + +/** + * @brief Rotation vectoring selection + */ +typedef enum XMC_MATH_CORDIC_ROTVEC_MODE +{ + XMC_MATH_CORDIC_ROTVEC_MODE_VECTORING = 0U << MATH_CON_ROTVEC_Pos, /**< Vectoring mode */ + XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION = 1U << MATH_CON_ROTVEC_Pos /**< Rotation mode */ +} XMC_MATH_CORDIC_ROTVEC_MODE_t; + +/** + * @brief Calculated value of CORRX and CORRY are each divided by this factor to yield the result. + */ +typedef enum XMC_MATH_CORDIC_MAGNITUDE +{ + XMC_MATH_CORDIC_MAGNITUDE_DIVBY1 = 0U << MATH_CON_MPS_Pos, /**< Divide by 1 */ + XMC_MATH_CORDIC_MAGNITUDE_DIVBY2 = 1U << MATH_CON_MPS_Pos, /**< Divide by 2 */ + XMC_MATH_CORDIC_MAGNITUDE_DIVBY4 = 2U << MATH_CON_MPS_Pos, /**< Divide by 4 */ +} XMC_MATH_CORDIC_MAGNITUDE_t; + +/********************************************************************************************************************* + * DATA STRUCTURES + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * API Prototypes - General + ********************************************************************************************************************/ + +/** + * + * @return None + * + * \parDescription:
+ * Enables the Math module by un-gating the clock. + * + * \par + * MATH coprocessor's clock is enabled by setting \a MATH bit of \a CGATCLR0 register. + * + * \parRelated APIs:
+ * XMC_MATH_Disable()\n\n\n + * + */ +__STATIC_INLINE void XMC_MATH_Enable(void) +{ + /* Un-gates clock to the MATH kernel */ + XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_MATH); +} + +/** + * + * @return None + * + * \parDescription:
+ * Disables the Math module by gating the clock. + * + * \par + * MATH coprocessor's clock is disabled by setting \a MATH bit of \a CGATSET0 register. + * + * \parRelated APIs:
+ * XMC_MATH_Disable()\n\n\n + * + */ +__STATIC_INLINE void XMC_MATH_Disable(void) +{ + /* Gates clock to the MATH kernel */ + XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_MATH); +} + +/** + * + * @return bool \n + * true - if DIV unit is busy + * false - if DIV unit is not busy + * + * \parDescription:
+ * Utility function to check if the DIV unit is busy. + * + * \par + * Divider unit status is determined by reading \a BSY bit of \a DIVST register. + * + */ +bool XMC_MATH_DIV_IsBusy(void); + +/** + * + * @return bool \n + * true - if CORDIC unit is busy\n + * false - if CORDIC unit is not busy + * + * \parDescription:
+ * Utility function to check if the DIV unit is busy. + * + * \par + * CORDIC coprocessor's status is determined by reading \a BSY bit of \a STATC register. + * + */ +bool XMC_MATH_CORDIC_IsBusy(void); + +/** + * @param event Event of type XMC_MATH_EVENT_t + * + * @return bool\n + * true - if status is set\n + * false - if status is not set + * + * \parDescription:
+ * Returns the status of the requested event. + * + * \par + * Status of DIV & CORDIC unit's event (end of calculation & error) status is determined by reading \a EVFR register. + * + * \parRelated APIs:
+ * XMC_MATH_EnableEvent(), XMC_MATH_DisableEvent(), XMC_MATH_SetEvent(), XMC_MATH_ClearEvent()\n\n\n + * + */ +bool XMC_MATH_GetEventStatus(const XMC_MATH_EVENT_t event); + +/** + * @param event Event of type XMC_MATH_EVENT_t + * + * @return None + * + * \parDescription:
+ * Enables the requested event. + * + * \par + * DIV & CORDIC unit's event (end of calculation & error) is enabled by setting bit-fields of \a EVIER register. + * + * \parRelated APIs:
+ * XMC_MATH_GetEventStatus(), XMC_MATH_DisableEvent()\n\n\n + * + */ +__STATIC_INLINE void XMC_MATH_EnableEvent(const XMC_MATH_EVENT_t event) +{ + MATH->EVIER |= (uint32_t) event; +} + +/** + * @param event Event of type XMC_MATH_EVENT_t + * + * @return None + * + * \parDescription:
+ * Disables the requested event. + * + * \par + * DIV & CORDIC unit's event (end of calculation & error) is disabled by clearing bit-fields of \a EVIER register. + * + * \parRelated APIs:
+ * XMC_MATH_GetEventStatus(), XMC_MATH_EnableEvent()\n\n\n + * + */ +__STATIC_INLINE void XMC_MATH_DisableEvent(const XMC_MATH_EVENT_t event) +{ + MATH->EVIER &= ~((uint32_t) event); +} + +/** + * @param event Event of type XMC_MATH_EVENT_t + * + * @return None + * + * \parDescription:
+ * Sets the requested event. This is a software setting for the event. + * + * \par + * DIV & CORDIC unit's event (end of calculation & error) is set by setting bit-fields of \a EVFSR register. + * + * \parRelated APIs:
+ * XMC_MATH_ClearEvent()\n\n\n + * + */ +__STATIC_INLINE void XMC_MATH_SetEvent(const XMC_MATH_EVENT_t event) +{ + MATH->EVFSR |= (uint32_t) event; +} + +/** + * @param event Event of type XMC_MATH_EVENT_t + * + * @return None + * + * \parDescription:
+ * Clears the requested event. + * + * \par + * DIV & CORDIC unit's event (end of calculation & error) is cleared by setting bit-fields of \a EVFCR register. + * + * \parRelated APIs:
+ * XMC_MATH_SetEvent()\n\n\n + * + */ +__STATIC_INLINE void XMC_MATH_ClearEvent(const XMC_MATH_EVENT_t event) +{ + MATH->EVFCR |= (uint32_t) event; +} + +/** + * @return XMC_MATH_Q0_23_t + * + * \parDescription:
+ * Returns result of a Cosine operation. + * + * \par + * Most significant 24 bits of \a CORRX register returns the result of Cosine operation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_CosNB()\n\n\n + * + */ +__STATIC_INLINE XMC_MATH_Q0_23_t XMC_MATH_CORDIC_GetCosResult(void) +{ + return ((XMC_MATH_Q0_23_t) (((int32_t)MATH->CORRX) >> MATH_CORRX_RESULT_Pos)); +} + +/** + * @return XMC_MATH_Q0_23_t + * + * \parDescription:
+ * Returns result of a Sine operation. + * + * \par + * Most significant 24 bits of \a CORRY register returns the result of Sine operation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_SinNB()\n\n\n + * + */ +__STATIC_INLINE XMC_MATH_Q0_23_t XMC_MATH_CORDIC_GetSinResult(void) +{ + return ((XMC_MATH_Q0_23_t) (((int32_t)MATH->CORRY) >> MATH_CORRY_RESULT_Pos)); +} + +/** + * @return XMC_MATH_Q0_11_t + * + * \parDescription:
+ * Returns result of a Tangent operation. + * + * \par + * \a QUOT register returns the result of Tangent operation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_TanNB()\n\n\n + * + */ +__STATIC_INLINE XMC_MATH_Q0_11_t XMC_MATH_CORDIC_GetTanResult(void) +{ + return ((XMC_MATH_Q0_11_t) MATH->QUOT); +} + +/** + * @return XMC_MATH_Q0_23_t + * + * \parDescription:
+ * Returns result of a Arc Tangent operation. + * + * \par + * Most significant 24 bits of \a CORRZ register returns the result of Arc Tangent operation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_ArcTanNB()\n\n\n + * + */ +__STATIC_INLINE XMC_MATH_Q0_23_t XMC_MATH_CORDIC_GetArcTanResult(void) +{ + return ((XMC_MATH_Q0_23_t) (((int32_t)MATH->CORRZ) >> MATH_CORRZ_RESULT_Pos)); +} + +/** + * @return XMC_MATH_Q1_22_t + * + * \parDescription:
+ * Returns result of a Hyperbolic Cosine operation. + * + * \par + * Most significant 24 bits of \a CORRX register returns the result of Hyperbolic Cosine operation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_CoshNB()\n\n\n + * + */ +__STATIC_INLINE XMC_MATH_Q1_22_t XMC_MATH_CORDIC_GetCoshResult(void) +{ + return ((XMC_MATH_Q1_22_t) (((int32_t)MATH->CORRX) >> MATH_CORRX_RESULT_Pos)); +} + +/** + * @return XMC_MATH_Q1_22_t + * + * \parDescription:
+ * Returns result of a Hyperbolic Sine operation. + * + * \par + * Most significant 24 bits of \a CORRY register returns the result of Hyperbolic Sine operation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_SinhNB()\n\n\n + * + */ +__STATIC_INLINE XMC_MATH_Q1_22_t XMC_MATH_CORDIC_GetSinhResult(void) +{ + return ((XMC_MATH_Q1_22_t) (((int32_t)MATH->CORRY) >> MATH_CORRY_RESULT_Pos)); +} + +/** + * @return XMC_MATH_Q0_11_t + * + * \parDescription:
+ * Returns result of a Hyperbolic Tangent operation. + * + * \par + * \a QUOT register returns the result of Hyperbolic Tangent operation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_TanhNB()\n\n\n + * + */ +__STATIC_INLINE XMC_MATH_Q0_11_t XMC_MATH_CORDIC_GetTanhResult(void) +{ + return ((XMC_MATH_Q0_11_t) MATH->QUOT); +} + +/** + * @return uint32_t + * + * \parDescription:
+ * Returns result of a Unsigned Division operation. + * + * \par + * \a QUOT register returns the result of Unsigned Division operation. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_UnsignedDivNB()\n\n\n + * + */ +__STATIC_INLINE uint32_t XMC_MATH_DIV_GetUnsignedDivResult(void) +{ + return ((uint32_t) MATH->QUOT); +} + +/** + * @return uint32_t + * + * \parDescription:
+ * Returns result of a Unsigned Modulo operation. + * + * \par + * \a RMD register returns the result of Unsigned Modulo operation. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_UnsignedModNB()\n\n\n + * + */ +__STATIC_INLINE uint32_t XMC_MATH_DIV_GetUnsignedModResult(void) +{ + return ((uint32_t) MATH->RMD); +} + +/** + * @return int32_t + * + * \parDescription:
+ * Returns result of a Signed Division operation. + * + * \par + * \a QUOT register returns the result of Signed Division operation. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_SignedDivNB()\n\n\n + * + */ +__STATIC_INLINE int32_t XMC_MATH_DIV_GetSignedDivResult(void) +{ + return ((int32_t) MATH->QUOT); +} + +/** + * @return int32_t + * + * \parDescription:
+ * Returns result of a Signed Modulo operation. + * + * \par + * \a RMD register returns the result of Signed Modulo operation. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_SignedModNB()\n\n\n + * + */ +__STATIC_INLINE int32_t XMC_MATH_DIV_GetSignedModResult(void) +{ + return ((int32_t) MATH->RMD); +} + +/*********************************************************************************************************************** + * API Prototypes - Blocking functions + **********************************************************************************************************************/ +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return XMC_MATH_Q0_23_t
+ * + * \parDescription:
+ * Computes the cosine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * + * \par + * This function programs CORDIC to rotation & circular mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. + * Most significant 24 bits of \a CORRX register returns the result of the operation. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_Sin(), XMC_MATH_CORDIC_Tan()\n\n\n + * + */ +XMC_MATH_Q0_23_t XMC_MATH_CORDIC_Cos(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return XMC_MATH_Q0_23_t
+ * + * \parDescription:
+ * Computes the sine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * + * \par + * This function programs CORDIC to rotation & circular mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. + * Most significant 24 bits of \a CORRY register returns the result of the operation. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_Cos(), XMC_MATH_CORDIC_Tan()\n\n\n + * + */ +XMC_MATH_Q0_23_t XMC_MATH_CORDIC_Sin(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return XMC_MATH_Q0_11_t
+ * + * \parDescription:
+ * Computes the tangent for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * + * \par + * This function programs CORDIC to rotation & circular mode. + * Chains the results of Cosine (\a CORRX) and Sine (\a CORRY) as a dividend and divisor by configuring \a GLBCON register. + * \a CORDZ register is programmed with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. + * Most significant 24 bits of \a CORRY register returns the result of the operation. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_Sin(), XMC_MATH_CORDIC_Cos()\n\n\n + * + */ +XMC_MATH_Q0_11_t XMC_MATH_CORDIC_Tan(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * + * @param x Value representing the proportion of the x-coordinate (XMC_MATH_Q8_15_t format) + * @param y Value representing the proportion of the y-coordinate (XMC_MATH_Q8_15_t format) + * + * @return XMC_MATH_Q0_23_t
+ * + * \parDescription:
+ * Computes the principal value arc tangent of an angle of y/x expressed in radians. + * The input radians must be in XMC_MATH_Q8_15_t format. + * + * \par + * This function programs CORDIC as circular mode. + * \a CORDY register is programmed with input \a y and \a CORDX register is programmed with input \a x. + * Most significant 24 bits of \a CORRZ register returns the result of the operation. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + */ +XMC_MATH_Q0_23_t XMC_MATH_CORDIC_ArcTan(XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return XMC_MATH_Q1_22_t
+ * + * \parDescription:
+ * Computes the hyperbolic cosine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * + * \par + * This function programs CORDIC to rotation & hyperbolic mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. + * Most significant 24 bits of \a CORRX register returns the result of the operation. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_Sinh(), XMC_MATH_CORDIC_Tanh()\n\n\n + * + */ +XMC_MATH_Q1_22_t XMC_MATH_CORDIC_Cosh(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return XMC_MATH_Q1_22_t
+ * + * \parDescription:
+ * Computes the hyperbolic sine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * + * \par + * This function programs CORDIC to rotation & hyperbolic mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. + * Most significant 24 bits of \a CORRY register returns the result of the operation. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_Cosh(), XMC_MATH_CORDIC_Tanh()\n\n\n + * + */ +XMC_MATH_Q1_22_t XMC_MATH_CORDIC_Sinh(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return XMC_MATH_Q0_11_t
+ * + * \parDescription:
+ * Computes the hyperbolic tangent for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * + * \par + * This function programs CORDIC to rotation & hyperbolic mode. + * Chains the results of Cosine (\a CORRX) and Sine (\a CORRY) as a dividend and divisor by configuring \a GLBCON register. + * \a CORDZ register is programmed with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. + * \a QUOT register returns the result of the operation. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_Sinh(), XMC_MATH_CORDIC_Cosh()()\n\n\n + * + */ +XMC_MATH_Q0_11_t XMC_MATH_CORDIC_Tanh(XMC_MATH_Q0_23_t angle_in_radians); + +/*********************************************************************************************************************** + * API Prototypes - Non blocking functions + **********************************************************************************************************************/ +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return None
+ * + * \parDescription:
+ * Computes the cosine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * Call XMC_MATH_CORDIC_GetCosResult() API to get the result. + * + * \par + * This function programs CORDIC to rotation & circular mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_GetCosResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_CORDIC_CosNB(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return None
+ * + * \parDescription:
+ * Computes the sine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * Call XMC_MATH_CORDIC_GetSinResult() API to get the result. + * + * \par + * This function programs CORDIC to rotation & circular mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_GetSinResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_CORDIC_SinNB(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return None
+ * + * \parDescription:
+ * Computes the tangent for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * Call XMC_MATH_CORDIC_GetTanResult() API to get the result. + * + * \par + * This function programs CORDIC to rotation & circular mode. + * Chains the results of Cosine (\a CORRX) and Sine (\a CORRY) as a dividend and divisor by configuring \a GLBCON register. + * \a CORDZ register is programmed with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_GetTanResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_CORDIC_TanNB(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * + * @param x Value representing the proportion of the x-coordinate (XMC_MATH_Q8_15_t format) + * @param y Value representing the proportion of the y-coordinate (XMC_MATH_Q8_15_t format) + * + * @return None
+ * + * \parDescription:
+ * Computes the principal value arc tangent of an angle of y/x expressed in radians. + * The input radians must be in XMC_MATH_Q8_15_t format. + * Call XMC_MATH_CORDIC_GetArcTanResult() API to get the result. + * + * \par + * This function programs CORDIC as circular mode. + * \a CORDY register is programmed with input \a y and \a CORDX register is programmed with input \a x. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_GetArcTanResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_CORDIC_ArcTanNB(XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return None
+ * + * \parDescription:
+ * Computes the hyperbolic cosine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * Call XMC_MATH_CORDIC_GetCoshResult() API to get the result. + * + * \par + * This function programs CORDIC to rotation & hyperbolic mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_GetCoshResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_CORDIC_CoshNB(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return None
+ * + * \parDescription:
+ * Computes the hyperbolic sine for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * Call XMC_MATH_CORDIC_GetSinhResult() API to get the result. + * + * \par + * This function programs CORDIC to rotation & hyperbolic mode. + * Configures \a CORDZ register with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_GetSinhResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_CORDIC_SinhNB(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param angle_in_radians - Normalised Angle in Radians (XMC_MATH_Q0_23_t format) + * + * @return None
+ * + * \parDescription:
+ * Computes the hyperbolic tangent for an angle in radians \e angle_in_radians. + * The input angle in radians must be in XMC_MATH_Q0_23_t format. + * Call XMC_MATH_CORDIC_GetTanhResult() API to get the result. + * + * \par + * This function programs CORDIC to rotation & hyperbolic mode. + * Chains the results of Cosine (\a CORRX) and Sine (\a CORRY) as a dividend and divisor by configuring \a GLBCON register. + * \a CORDZ register is programmed with input \a angle_in_radians and \a CORDX register with gain \a XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22. + * + * \parNote:
+ * Loading of \a CORDX register triggers the start of computation. + * + * \parRelated APIs:
+ * XMC_MATH_CORDIC_GetTanhResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_CORDIC_TanhNB(XMC_MATH_Q0_23_t angle_in_radians); + +/** + * @param dividend - Dividend + * @param divisor - Divisor + * + * @return None
+ * + * \parDescription:
+ * Performs unsigned integer division and computes quotient of the division. + * Call XMC_MATH_DIV_GetUnsignedDivResult() API to get the result. + * + * \par + * Divider unit is configured for unsigned division. + * \a DVD & \a DVS registers are programmed with \a dividend and \a divisor values. + * The division is started with the write to DVS register. + * + * \parNote:
+ * Ensure \e divisor is smaller than \e dividend. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_GetUnsignedDivResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_DIV_UnsignedDivNB(uint32_t dividend, uint32_t divisor); + +/** + * @param dividend - Dividend + * @param divisor - Divisor + * + * @return None
+ * + * \parDescription:
+ * Performs signed integer division and computes quotient of the division. + * Call XMC_MATH_DIV_GetSignedDivResult() API to get the result. + * + * \par + * Divider unit is configured for signed division. + * \a DVD & \a DVS registers are programmed with \a dividend and \a divisor values. + * The division is started with the write to DVS register. + * + * \parNote:
+ * Ensure \e divisor is smaller than \e dividend. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_GetSignedDivResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_DIV_SignedDivNB(int32_t dividend, int32_t divisor); + +/** + * @param dividend - Dividend + * @param divisor - Divisor + * + * @return None
+ * + * \parDescription:
+ * Performs unsigned modulo operation and computes remainder of the division. + * Call XMC_MATH_DIV_GetUnsignedModResult() API to get the result. + * + * \par + * Divider unit is configured for unsigned division. + * \a DVD & \a DVS registers are programmed with \a dividend and \a divisor values. + * The division is started with the write to DVS register. + * + * \parNote:
+ * Ensure \e divisor is smaller than \e dividend. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_GetUnsignedModResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_DIV_UnsignedModNB(uint32_t dividend, uint32_t divisor); + +/** + * @param dividend - Dividend + * @param divisor - Divisor + * + * @return None
+ * + * \parDescription:
+ * Performs signed modulo operation and computes remainder of the division. + * Call XMC_MATH_DIV_GetSignedModResult() API to get the result. + * + * \par + * Divider unit is configured for signed division. + * \a DVD & \a DVS registers are programmed with \a dividend and \a divisor values. + * The division is started with the write to DVS register. + * + * \parNote:
+ * Ensure \e divisor is smaller than \e dividend. + * + * \parRelated APIs:
+ * XMC_MATH_DIV_GetSignedModResult(), XMC_MATH_EnableEvent(), XMC_MATH_GetEventStatus(), XMC_MATH_ClearEvent()\n\n\n + * + */ +void XMC_MATH_DIV_SignedModNB(int32_t dividend, int32_t divisor); + +/** + * @param x - Value whose square root is computed + * + * @return Square root of x
+ * + * \parDescription:
+ * Computes square root of Q15 number + * + * \parNote:
+ * x > 0 + * + */ +int16_t XMC_MATH_CORDIC_Q15_Sqrt(int16_t x); + +/** + * @param x - Value whose square root is computed + * + * @return Square root of x
+ * + * \parDescription:
+ * Computes square root of Q31 number + * + * \parNote:
+ * x > 0 + * + */ +int32_t XMC_MATH_CORDIC_Q31_Sqrt(int32_t x); +/** + * @} + */ + +/** + * @} + */ + +#endif /* end of #if defined(MATH) */ + +#ifdef __cplusplus +} +#endif + +#endif /* XMC_MATH_H */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_pau.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_pau.h new file mode 100644 index 00000000..12fa65e2 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_pau.h @@ -0,0 +1,396 @@ +/** + * @file xmc_pau.h + * @date 2015-06-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-02-20: + * - Initial version + * + * 2015-05-20: + * - Documentation updated + * + * 2015-06-20: + * - Removed version macros and declaration of GetDriverVersion API + * @endcond + * + */ + +#ifndef XMC_PAU_H +#define XMC_PAU_H + +/********************************************************************************************************************* + * HEADER FILES + *********************************************************************************************************************/ + +#include "xmc_common.h" + +#if defined(PAU) + +/** + * @addtogroup XMClib XMC Peripheral Library + * @{ + */ + +/** + * @addtogroup PAU + * @brief Peripheral Access Unit (PAU) driver for the XMC1000 microcontroller family + * + * The Peripheral Access Unit (PAU) supports access control of memories and peripherals. + * It allows user application to enable/disable the access to the registers of a peripheral. + * It generates a HardFault exception when there is an access to a disabled or unassigned + * address location. It also provides information on the availability of peripherals and + * sizes of memories. + * + * The PAU low level driver provides functions to check the availability of peripherals + * and to enable/disable peripheral access. + * @{ + */ + +/********************************************************************************************************************* + * MACROS + *********************************************************************************************************************/ + +/** + * A convenient symbol for the PAU peripheral base address + */ +#define XMC_PAU ((XMC_PAU_t *) PAU_BASE) + +/* + * This macro is used in the LLD for assertion checks (XMC_ASSERT) + */ +#define XMC_PAU_CHECK_MODULE_PTR(p) ((p) == XMC_PAU) + +/********************************************************************************************************************* + * ENUMS + *********************************************************************************************************************/ + +/** + * Status return values for PAU low level driver + */ +typedef enum XMC_PAU_STATUS +{ + XMC_PAU_STATUS_OK = 0U, /**< Operation successful */ + XMC_PAU_STATUS_BUSY = 1U, /**< Busy with a previous request */ + XMC_PAU_STATUS_ERROR = 2U /**< Operation unsuccessful */ +} XMC_PAU_STATUS_t; + +/** + * PAU peripheral select + */ +typedef enum XMC_PAU_PERIPHERAL +{ + XMC_PAU_PERIPHERAL_FLASH = PAU_PRIVDIS0_PDIS2_Msk, /**< Flash SFRs Privilege Disable Flag */ + XMC_PAU_PERIPHERAL_RAM_BLOCK1 = PAU_PRIVDIS0_PDIS5_Msk, /**< RAM Block 1 Privilege Disable Flag */ + XMC_PAU_PERIPHERAL_RAM_BLOCK2 = PAU_PRIVDIS0_PDIS6_Msk, /**< RAM Block 2 Privilege Disable Flag */ + XMC_PAU_PERIPHERAL_RAM_BLOCK3 = PAU_PRIVDIS0_PDIS7_Msk, /**< RAM Block 3 Privilege Disable Flag */ + #if defined(WDT) + XMC_PAU_PERIPHERAL_WDT = PAU_PRIVDIS0_PDIS19_Msk, /**< WDT Privilege Disable Flag */ + #endif + #if defined(MATH) + XMC_PAU_PERIPHERAL_MATH_GLOBAL_AND_DIV = PAU_PRIVDIS0_PDIS20_Msk, /**< MATH Global SFRs and Divider Privilege Disable Flag */ + #endif + #if defined(MATH) + XMC_PAU_PERIPHERAL_MATH_CORDIC = PAU_PRIVDIS0_PDIS21_Msk, /**< MATH CORDIC Privilege Disable Flag */ + #endif + #if defined(PORT0) + XMC_PAU_PERIPHERAL_PORT0 = PAU_PRIVDIS0_PDIS22_Msk, /**< Port 0 Privilege Disable Flag */ + #endif + #if defined(PORT1) + XMC_PAU_PERIPHERAL_PORT1 = PAU_PRIVDIS0_PDIS23_Msk, /**< Port 1 Privilege Disable Flag */ + #endif + #if defined(PORT2) + XMC_PAU_PERIPHERAL_PORT2 = PAU_PRIVDIS0_PDIS24_Msk, /**< Port 2 Privilege Disable Flag */ +#endif +#if defined(PORT3) + XMC_PAU_PERIPHERAL_PORT3 = PAU_PRIVDIS0_PDIS25_Msk, /**< Port 3 Privilege Disable Flag */ +#endif +#if defined(PORT4) + XMC_PAU_PERIPHERAL_PORT4 = PAU_PRIVDIS0_PDIS26_Msk, /**< Port 4 Privilege Disable Flag */ +#endif +#if defined(USIC0) + XMC_PAU_PERIPHERAL_USIC0_CH0 = PAU_PRIVDIS1_PDIS0_Msk | 0x10000000U, /**< USIC0 Channel 0 Privilege Disable Flag */ + XMC_PAU_PERIPHERAL_USIC0_CH1 = PAU_PRIVDIS1_PDIS1_Msk | 0x10000000U, /**< USIC0 Channel 1 Privilege Disable Flag */ +#endif +#if defined(USIC1) + XMC_PAU_PERIPHERAL_USIC1_CH0 = PAU_PRIVDIS1_PDIS16_Msk | 0x10000000U, /**< USIC1 Channel 0 Privilege Disable Flag */ + XMC_PAU_PERIPHERAL_USIC1_CH1 = PAU_PRIVDIS1_PDIS17_Msk | 0x10000000U, /**< USIC1 Channel 1 Privilege Disable Flag */ +#endif +#if defined(PRNG) + XMC_PAU_PERIPHERAL_PRNG = PAU_AVAIL1_AVAIL4_Msk | 0x10000000U, /**< PRNG Availability Flag*/ +#endif +#if defined(VADC) + XMC_PAU_PERIPHERAL_VADC_GLOBAL = PAU_PRIVDIS1_PDIS5_Msk | 0x10000000U, /**< VADC0 Basic SFRs Privilege Disable Flag */ +#if defined(VADC_G0) + XMC_PAU_PERIPHERAL_VADC_GROUP0 = PAU_PRIVDIS1_PDIS6_Msk | 0x10000000U, /**< VADC0 Group 0 SFRs Privilege Disable Flag */ +#endif +#if defined(VADC_G1) + XMC_PAU_PERIPHERAL_VADC_GROUP1 = PAU_PRIVDIS1_PDIS7_Msk | 0x10000000U, /**< VADC0 Group 1 SFRs Privilege Disable Flag */ +#endif +#endif +#if defined(SHS0) + XMC_PAU_PERIPHERAL_VADC_SHS0 = PAU_PRIVDIS1_PDIS8_Msk | 0x10000000U, /**< SHS0 Privilege Disable Flag */ +#endif +#if defined(CCU40) + XMC_PAU_PERIPHERAL_CCU40_CC40_AND_GLOBAL = PAU_PRIVDIS1_PDIS9_Msk | 0x10000000U, /**< CCU40_CC40 and CCU40 Kernel SFRs Privilege Disable Flag */ +#if defined(CCU40_CC41) + XMC_PAU_PERIPHERAL_CCU40_CC41 = PAU_PRIVDIS1_PDIS10_Msk | 0x10000000U, /**< CCU40_CC41 Privilege Disable Flag */ +#endif +#if defined(CCU40_CC42) + XMC_PAU_PERIPHERAL_CCU40_CC42 = PAU_PRIVDIS1_PDIS11_Msk | 0x10000000U, /**< CCU40_CC42 Privilege Disable Flag */ +#endif +#if defined(CCU40_CC43) + XMC_PAU_PERIPHERAL_CCU40_CC43 = PAU_PRIVDIS1_PDIS12_Msk | 0x10000000U, /**< CCU40_CC43 Privilege Disable Flag */ +#endif +#endif +#if defined(CCU41) + XMC_PAU_PERIPHERAL_CCU41_CC40_AND_GLOBAL = PAU_PRIVDIS1_PDIS25_Msk | 0x10000000U, /**< CCU41_CC40 and CCU41 Kernel SFRs Privilege Disable Flag */ +#if defined(CCU41_CC41) + XMC_PAU_PERIPHERAL_CCU41_CC41 = PAU_PRIVDIS1_PDIS26_Msk | 0x10000000U, /**< CCU41_CC41 Privilege Disable Flag */ +#endif +#if defined(CCU41_CC42) + XMC_PAU_PERIPHERAL_CCU41_CC42 = PAU_PRIVDIS1_PDIS27_Msk | 0x10000000U, /**< CCU41_CC42 Privilege Disable Flag */ +#endif +#if defined(CCU41_CC43) + XMC_PAU_PERIPHERAL_CCU41_CC43 = PAU_PRIVDIS1_PDIS28_Msk | 0x10000000U, /**< CCU41_CC43 Privilege Disable Flag */ +#endif +#endif +#if defined(CCU80) + XMC_PAU_PERIPHERAL_CCU80_CC80_AND_GLOBAL = PAU_PRIVDIS2_PDIS0_Msk | 0x20000000U, /**< CCU80_CC80 and CCU80 Kernel SFRs Privilege Disable Flag */ +#if defined(CCU80_CC81) + XMC_PAU_PERIPHERAL_CCU80_CC81 = PAU_PRIVDIS2_PDIS1_Msk | 0x20000000U, /**< CCU80_CC81 Privilege Disable Flag */ +#endif +#if defined(CCU80_CC82) + XMC_PAU_PERIPHERAL_CCU80_CC82 = PAU_PRIVDIS2_PDIS2_Msk | 0x20000000U, /**< CCU80_CC82 Privilege Disable Flag */ +#endif +#if defined(CCU80_CC83) + XMC_PAU_PERIPHERAL_CCU80_CC83 = PAU_PRIVDIS2_PDIS3_Msk | 0x20000000U, /**< CCU80_CC83 Privilege Disable Flag */ +#endif +#endif +#if defined(CCU81) + XMC_PAU_PERIPHERAL_CCU81_CC80_AND_GLOBAL = PAU_PRIVDIS2_PDIS16_Msk | 0x20000000U, /**< CCU81_CC80 and CCU81 Kernel SFRs Privilege Disable Flag */ +#if defined(CCU81_CC81) + XMC_PAU_PERIPHERAL_CCU81_CC81 = PAU_PRIVDIS2_PDIS17_Msk | 0x20000000U, /**< CCU81_CC81 Privilege Disable Flag */ +#endif +#if defined(CCU81_CC82) + XMC_PAU_PERIPHERAL_CCU81_CC82 = PAU_PRIVDIS2_PDIS18_Msk | 0x20000000U, /**< CCU81_CC82 Privilege Disable Flag */ +#endif +#if defined(CCU81_CC83) + XMC_PAU_PERIPHERAL_CCU81_CC83 = PAU_PRIVDIS2_PDIS19_Msk | 0x20000000U, /**< CCU81_CC83 Privilege Disable Flag */ +#endif +#endif +#if defined(POSIF0) + XMC_PAU_PERIPHERAL_POSIF0 = PAU_PRIVDIS2_PDIS12_Msk | 0x20000000U, /**< POSIF0 Privilege Disable Flag */ +#endif +#if defined(POSIF1) + XMC_PAU_PERIPHERAL_POSIF1 = PAU_PRIVDIS2_PDIS28_Msk | 0x20000000U, /**< POSIF1 Privilege Disable Flag */ +#endif +#if defined(LEDTS0) + XMC_PAU_PERIPHERAL_LEDTS0 = PAU_PRIVDIS2_PDIS13_Msk | 0x20000000U, /**< LEDTS0 Privilege Disable Flag */ +#endif +#if defined(LEDTS1) + XMC_PAU_PERIPHERAL_LEDTS1 = PAU_PRIVDIS2_PDIS14_Msk | 0x20000000U, /**< LEDTS1 Privilege Disable Flag */ +#endif +#if defined(LEDTS2) + XMC_PAU_PERIPHERAL_LEDTS2 = PAU_PRIVDIS2_PDIS29_Msk | 0x20000000U, /**< LEDTS2 Privilege Disable Flag */ +#endif +#if defined(BCCU0) + XMC_PAU_PERIPHERAL_BCCU0 = PAU_PRIVDIS2_PDIS15_Msk | 0x20000000U, /**< BCCU0 Privilege Disable Flag */ +#endif +#if defined(CAN) +#if defined(CAN_NODE0) + XMC_PAU_PERIPHERAL_MCAN_NODE0_AND_GLOBAL = PAU_PRIVDIS2_PDIS21_Msk | 0x20000000U, /**< MCAN NODE0 and Global SFRs Privilege */ +#endif +#if defined(CAN_NODE1) + XMC_PAU_PERIPHERAL_MCAN_NODE1_AND_GLOBAL = PAU_PRIVDIS2_PDIS23_Msk | 0x20000000U, /**< MCAN NODE1 Privilege Disable Flag */ +#endif + XMC_PAU_PERIPHERAL_MCAN_OBJECTS = PAU_PRIVDIS2_PDIS28_Msk | 0x20000000U, /**< MCAN Message Objects Privilege Disable Flag */ +#endif +} XMC_PAU_PERIPHERAL_t; + + +/********************************************************************************************************************* + * DATA STRUCTURES + *********************************************************************************************************************/ + + +/** + * External Peripheral Access Unit (PAU) device structure
+ * + * The structure represents a collection of all hardware registers + * used to configure the PAU peripheral on the XMC microcontroller. + * The registers can be accessed with ::XMC_PAU. + */ +typedef struct +{ + __I uint32_t RESERVED0[16]; + __I uint32_t AVAIL[3]; + __I uint32_t RESERVED1[13]; + __IO uint32_t PRIVDIS[3]; + __I uint32_t RESERVED2[221]; + __I uint32_t ROMSIZE; + __I uint32_t FLSIZE; + __I uint32_t RESERVED3[2]; + __I uint32_t RAM0SIZE; +} XMC_PAU_t; + +/********************************************************************************************************************* + * API PROTOTYPES + *********************************************************************************************************************/ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @param peripheral Peripheral of type ::XMC_PAU_PERIPHERAL_t for which access needs to be enabled + * @return None + * + * \parDescription:
+ * Enable the peripheral access
+ * + * \par + * The function resets the PRIVDISx.PDISy bit to enable the access to the registers of a peripheral + * during run time. + * + * \parRelated APIs:
+ * XMC_PAU_DisablePeripheralAccess() + */ +void XMC_PAU_EnablePeripheralAccess(XMC_PAU_PERIPHERAL_t peripheral); + +/** + * @param peripheral Peripheral of type ::XMC_PAU_PERIPHERAL_t for which access needs to be disabled + * @return None + * + * \parDescription:
+ * Disable the peripheral access
+ * + * \par + * The function sets the PRIVDISx.PDISy bit to disable the access to the registers of a peripheral + * during run time. An access to a disabled or unassigned address location generates a hardfault + * exception. + * + * \parRelated APIs:
+ * XMC_PAU_EnablePeripheralAccess() + */ +void XMC_PAU_DisablePeripheralAccess(XMC_PAU_PERIPHERAL_t peripheral); + +/** + * @param peripheral Peripheral of type ::XMC_PAU_PERIPHERAL_t for which access enabled status to be checked + * @return bool "false" if peripheral access is enabled, "true" otherwise + * + * \parDescription:
+ * Checks if the peripheral access is enabled or not
+ * + * \par + * The function checks the PRIVDISx.PDISy bit to know whether the access to the registers of a peripheral + * during run time is enabled or not. + * + * \parRelated APIs:
+ * XMC_PAU_DisablePeripheralAccess(), XMC_PAU_EnablePeripheralAccess() + */ +bool XMC_PAU_IsPeripheralAccessEnabled(XMC_PAU_PERIPHERAL_t peripheral); + +/** + * @param peripheral Peripheral of type ::XMC_PAU_PERIPHERAL_t for which access needs to be disabled + * @return bool Returns "true" if peripheral is available, "false" otherwise + * + * \parDescription:
+ * Checks if a peripheral is available or not
+ * + * \par + * The function checks the AVAILx.AVAILy bit to know whether the peripheral + * is available or not for the particular device variant. + */ +bool XMC_PAU_IsPeripheralAvailable(XMC_PAU_PERIPHERAL_t peripheral); + +/** + * @return uint32_t Returns ROM size + * + * \parDescription:
+ * Gets the ROM size
+ * + * \par + * The function checks the ROMSIZE.ADDR bitfield to indicate the available size of ROM in the device in bytes. + */ +__STATIC_INLINE uint32_t XMC_PAU_GetROMSize(void) +{ + return (uint32_t)(((XMC_PAU->ROMSIZE & PAU_ROMSIZE_ADDR_Msk) >> PAU_ROMSIZE_ADDR_Pos) * 256U); +} + +/** + * @return uint32_t Returns flash size + * + * \parDescription:
+ * Gets the flash size
+ * + * \par + * The function checks the FLSIZE.ADDR bitfield to indicate the available size of FLASH in the device in Kbytes. + */ +__STATIC_INLINE uint32_t XMC_PAU_GetFlashSize(void) +{ + return (uint32_t)((((XMC_PAU->FLSIZE & PAU_FLSIZE_ADDR_Msk) >> PAU_FLSIZE_ADDR_Pos) - 1U) * 4U); +} + +/** + * @return uint32_t Returns RAM size + * + * \parDescription:
+ * Gets RAM size
+ * + * \par + * The function checks the RAM0SIZE.ADDR bitfield to indicate the available size of RAM in the device in bytes. + */ +__STATIC_INLINE uint32_t XMC_PAU_GetRAMSize(void) +{ + return (uint32_t)(((XMC_PAU->RAM0SIZE & PAU_RAM0SIZE_ADDR_Msk) >> PAU_RAM0SIZE_ADDR_Pos) * 256U); +} + +#ifdef __cplusplus +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +#endif /* defined(PAU) */ + +#endif /* XMC_PAU_H */ + diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_posif.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_posif.h index fdf322dc..b92bdc09 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_posif.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_posif.h @@ -1,12 +1,12 @@ /** * @file xmc_posif.h - * @date 2015-10-27 + * @date 2016-03-09 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -54,6 +54,10 @@ * * 2015-07-02: * - Updated XMC_POSIF_QD_GetDirection API + * + * 2016-03-09: + * - Optimization of write only registers + * * @endcond * */ @@ -558,7 +562,7 @@ void XMC_POSIF_SelectInputSource(XMC_POSIF_t *const peripheral, const XMC_POSIF_ */ __STATIC_INLINE void XMC_POSIF_Start(XMC_POSIF_t *const peripheral) { - peripheral->PRUNS |= (uint32_t)POSIF_PRUNS_SRB_Msk; + peripheral->PRUNS = (uint32_t)POSIF_PRUNS_SRB_Msk; } /** @@ -575,7 +579,7 @@ __STATIC_INLINE void XMC_POSIF_Start(XMC_POSIF_t *const peripheral) */ __STATIC_INLINE void XMC_POSIF_Stop(XMC_POSIF_t *const peripheral) { - peripheral->PRUNC |= (uint32_t)(POSIF_PRUNC_CRB_Msk | POSIF_PRUNC_CSM_Msk); + peripheral->PRUNC = (uint32_t)(POSIF_PRUNC_CRB_Msk | POSIF_PRUNC_CSM_Msk); } /** @@ -744,7 +748,7 @@ __STATIC_INLINE void XMC_POSIF_HSC_SetHallPatterns(XMC_POSIF_t *const peripheral */ __STATIC_INLINE void XMC_POSIF_HSC_UpdateHallPattern(XMC_POSIF_t *const peripheral) { - peripheral->MCMS |= (uint32_t)POSIF_MCMS_STHR_Msk; + peripheral->MCMS = (uint32_t)POSIF_MCMS_STHR_Msk; } /** @@ -976,7 +980,7 @@ __STATIC_INLINE void XMC_POSIF_DisableEvent(XMC_POSIF_t *const peripheral, const */ __STATIC_INLINE void XMC_POSIF_SetEvent(XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event) { - peripheral->SPFLG |= (uint32_t)1 << (uint8_t)event; + peripheral->SPFLG = (uint32_t)1 << (uint8_t)event; } /** @@ -993,7 +997,7 @@ __STATIC_INLINE void XMC_POSIF_SetEvent(XMC_POSIF_t *const peripheral, const XMC */ __STATIC_INLINE void XMC_POSIF_ClearEvent(XMC_POSIF_t *const peripheral, const XMC_POSIF_IRQ_EVENT_t event) { - peripheral->RPFLG |= (uint32_t)1 << (uint8_t)event; + peripheral->RPFLG = (uint32_t)1 << (uint8_t)event; } /** diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_prng.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_prng.h new file mode 100644 index 00000000..9e3020e3 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_prng.h @@ -0,0 +1,285 @@ + +/** + * @file xmc_prng.h + * @date 2015-06-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-02-20: + * - Initial
+ * - Documentation updates
+ * + * 2015-06-20: + * - Removed version macros and declaration of GetDriverVersion API
+ * + * @endcond + */ + +#ifndef XMC_PRNG_H +#define XMC_PRNG_H + +/********************************************************************************************************************* + * HEADER FILES + *********************************************************************************************************************/ + +#include "xmc_common.h" + +#if defined (PRNG) + +/** + * @addtogroup XMClib XMC Peripheral Library + * @{ + */ + +/** + * @addtogroup PRNG + * @brief Pseudo Random Number Generator (PRNG) driver for XMC1000 microcontroller family + * + * The pseudo random bit generator (PRNG) provides random data with fast generation times. + * PRNG has to be initialized by the user software before use. The initialization consists + * of two basic phases: key-loading and warm-up. + * + * The PRNG low level driver provides functions to configure and initialize the PRNG hardware + * peripheral. + * @{ + */ + +/********************************************************************************************************************* + * MACROS + *********************************************************************************************************************/ + +/** + * Byte mask value for random data block size + */ +#define XMC_PRNG_RDBS_BYTE_READ_MASK (0x00FFU) + +/********************************************************************************************************************* + * ENUMS + *********************************************************************************************************************/ + +/** + * PRNG key load operation modes + */ +typedef enum XMC_PRNG_KEY_LOAD_OP_MODE { + XMC_PRNG_STRM_MODE = 0U, /**< Streaming mode (default) */ + XMC_PRNG_KLD_MODE = 1U /**< Loading mode */ +} XMC_PRNG_KEY_LOAD_OP_MODE_t; + +/** + * PRNG data block size + */ +typedef enum XMC_PRNG_DATA_BLOCK_SIZE { + XMC_PRNG_RDBS_RESET = 0U, /**< Reset state (no random data block size defined) */ + XMC_PRNG_RDBS_BYTE = 1U, /**< BYTE (8-bit) */ + XMC_PRNG_RDBS_WORD = 2U /**< WORD (16-bit) */ +} XMC_PRNG_DATA_BLOCK_SIZE_t; + +/** + * PRNG driver initialization status + */ +typedef enum XMC_PRNG_INIT_STATUS { + XMC_PRNG_NOT_INITIALIZED = 0U, /**< Reset state or Non-initialized state (Same as XMC_PRNG_RDBS_RESET) */ + XMC_PRNG_INITIALIZED = 1U /**< Initialized state */ +} XMC_PRNG_INIT_STATUS_t; + +/********************************************************************************************************************* + * DATA STRUCTURES + *********************************************************************************************************************/ + +/** + * Key words and data block size configuration values of PRNG
+ * + * The structure presents a convenient way to set/obtain the key word and data block configuration + * values of PRNG. + * The XMC_PRNG_Init() can be used to populate the structure with the key word and data block + * configuration values of the PRNG module. + */ +typedef struct XMC_PRNG_INIT +{ + uint16_t key_words[5]; /**< Keywords */ + XMC_PRNG_DATA_BLOCK_SIZE_t block_size; /**< Block size */ +} XMC_PRNG_INIT_t; + +/********************************************************************************************************************* + * API PROTOTYPES + *********************************************************************************************************************/ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @param prng Pointer to a constant instance of ::XMC_PRNG_INIT_t, pointing to + * the initialization configuration. + * @return XMC_PRNG_INIT_STATUS_t XMC_PRNG_INITIALIZED if initialized, + * XMC_PRNG_NOT_INITIALIZED otherwise. + * + * \parDescription:
+ * Initialize the PRNG peripheral with the configured key words and block size
+ * + * \par + * The function configures block size for key loading mode, enables key loading mode, + * loads key words (80 bits) and wait till RDV is set, enables the streaming mode and + * waits for warmup phase. This function programmes the CTRL and WORD registers. + */ +XMC_PRNG_INIT_STATUS_t XMC_PRNG_Init(const XMC_PRNG_INIT_t *prng); + + + +/** + * @param block_size Block size of type ::XMC_PRNG_DATA_BLOCK_SIZE_t for read access + * @return None + * + * \parDescription:
+ * Programming Random Block Size
+ * + * \par + * The function sets the random data block size as byte or word by programming CTRL.RDBS bitfield. + * block_size = 0 for Reset state, block_size = 1 for 'byte' and block_size = 2 for 'word'. + */ +__STATIC_INLINE void XMC_PRNG_SetRandomDataBlockSize(XMC_PRNG_DATA_BLOCK_SIZE_t block_size) +{ + PRNG->CTRL = (uint16_t)((PRNG->CTRL & (uint32_t)~PRNG_CTRL_RDBS_Msk) | + ((uint32_t)block_size << (uint32_t)PRNG_CTRL_RDBS_Pos)); +} + +/** + * @return None + * + * \parDescription:
+ * Checks the validity (CHK.RDV bit) of the generated random data
+ * + * \par + * The function checks the validity (CHK.RDV bit) of the generated random data. + * In key loading mode, this value indicates if the next partial key word can be written + * to PRNG_WORD or not. + */ +__STATIC_INLINE uint16_t XMC_PRNG_CheckValidStatus(void) +{ + return (PRNG->CHK & PRNG_CHK_RDV_Msk); +} + +/** + * @return None + * + * \parDescription:
+ * Enables the PRNG key loading mode
+ * + * \par + * The function initializes the key loading by setting the bit CTRL.KLD. In this mode, Register WORD + * acts as always as a 16 bit destination register. After the complete key has been loaded, the CTRL.KLD + * must be set to '0' to prepare the following warmup phase. + * + * \parRelated APIs:
+ * XMC_PRNG_EnableStreamingMode() + */ +__STATIC_INLINE void XMC_PRNG_EnableKeyLoadingMode(void) +{ + PRNG->CTRL |= (uint16_t)PRNG_CTRL_KLD_Msk; +} + +/** + * @return None + * + * \parDescription:
+ * Enables the Streaming mode
+ * + * \par + * The function enables the streaming mode and disables the PRNG key loading mode by resetting the + * CTRL.KLD bit. + * + * \parRelated APIs:
+ * XMC_PRNG_EnableKeyLoadingMode() + */ +__STATIC_INLINE void XMC_PRNG_EnableStreamingMode(void) +{ + PRNG->CTRL &= (uint16_t)~PRNG_CTRL_KLD_Msk; +} + +/** + * @param key Key word to load into PRNG WORD register + * @return None + * + * \parDescription:
+ * Loads a partial key word to the PRNG WORD register
+ * + * \par + * The function loads partial key word to WORD registr. These partial + * words are sequentially written and loading a key word will take 16 clock + * cycles. The CHK.RDV bit is set to '0' while loading is in progress. '1' indicates + * that the next partial key word can be written to WORD register. + */ +__STATIC_INLINE void XMC_PRNG_LoadKeyWords(uint16_t key) +{ + PRNG->WORD = key; +} + +/** + * @param None + * @return uint16_t Generated random number + * + * \parDescription:
+ * Gets the generated random number
+ * + * \par + * The function gives the generated random number by returning the content of WORD + * register. Before reading the WORD register to get the generated random number it is + * required to check the bit CHK.RDV is set which indicates that the next random data block + * can be read from WORD register. After a word has been read the bit CHK.RDV is reset + * by the hardware and generation of new random bits starts. + * + * \parRelated APIs:
+ * XMC_PRNG_CheckValidStatus() + */ +__STATIC_INLINE uint16_t XMC_PRNG_GetPseudoRandomNumber(void) +{ + return PRNG->WORD; +} + +#ifdef __cplusplus +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +#endif /* #if defined (PRNG) */ + +#endif /* XMC_PRNG_H */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_rtc.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_rtc.h index 9167974a..31627f2a 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_rtc.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_rtc.h @@ -1,12 +1,12 @@ /** * @file xmc_rtc.h - * @date 2015-10-27 + * @date 2016-05-19 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -46,6 +46,10 @@ * * 2015-06-20: * - Removed version macros and declaration of GetDriverVersion API + * + * 2016-05-19: + * - Added XMC_RTC_SetTimeStdFormat() and XMC_RTC_SetAlarmStdFormat() + * * @endcond * */ @@ -463,6 +467,23 @@ void XMC_RTC_SetTime(const XMC_RTC_TIME_t *const timeval); */ void XMC_RTC_GetTime(XMC_RTC_TIME_t *const time); +/** + * @param stdtime Pointer to a ::tm structure containing the time parameters seconds, + * minutes, hours, days, daysofweek, month, year(since 1900) and days in a + * year in standard format. + * @return None + * + * \parDescription:
+ * Sets the RTC module time value in standard format
+ * + * \par + * The function sets the time values from TIM0, TIM1 registers. + * + * \parRelated APIs:
+ * XMC_RTC_SetTime(), XMC_RTC_GetTime() + */ +void XMC_RTC_SetTimeStdFormat(const struct tm *const stdtime); + /** * @param stdtime Pointer to a constant ::tm structure containing the time parameters seconds, * minutes, hours, days, daysofweek, month, year(since 1900) and days in a @@ -519,6 +540,23 @@ void XMC_RTC_SetAlarm(const XMC_RTC_ALARM_t *const alarm); */ void XMC_RTC_GetAlarm(XMC_RTC_ALARM_t *const alarm); +/** + * @param stdtime Pointer to a ::tm structure containing the time parameters alarm seconds, + * alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month, + * alarm year(since 1900) and alarm days in a year in standard format. + * @return None + * + * \parDescription:
+ * Sets the RTC module alarm time value in standard format
+ * + * \par + * The function sets the alarm time values from ATIM0, ATIM1 registers. + * + * \parRelated APIs:
+ * XMC_RTC_SetAlarm(), XMC_RTC_GetAlarm() + */ +void XMC_RTC_SetAlarmStdFormat(const struct tm *const stdtime); + /** * @param stdtime Pointer to a constant ::tm structure containing the time parameters alarm seconds, * alarm minutes, alarm hours, alarm days, alarm daysofweek, alarm month, diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_scu.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_scu.h index 31e5cc1b..89871243 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_scu.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_scu.h @@ -1,12 +1,12 @@ /** * @file xmc_scu.h - * @date 2015-10-27 + * @date 2016-03-09 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -49,6 +49,12 @@ * XMC_SCU_INTERRUPT_EnableEvent, XMC_SCU_INTERRUPT_DisableEvent, * XMC_SCU_INTERRUPT_TriggerEvent, XMC_SCU_INTERUPT_GetEventStatus, * XMC_SCU_INTERUPT_ClearEventStatus + * + * 2015-11-30: + * - Documentation improved
+ * + * 2016-03-09: + * - Optimization of write only registers * * @endcond * @@ -176,7 +182,7 @@ typedef enum XMC_SCU_STATUS ********************************************************************************************************************/ /** - * Function pointer type used for registering callback functions on SCU event occurence. + * Function pointer type used for registering callback functions on SCU event occurrence. */ typedef void (*XMC_SCU_INTERRUPT_EVENT_HANDLER_t)(void); @@ -309,7 +315,7 @@ void XMC_SCU_INTERRUPT_EnableEvent(const XMC_SCU_INTERRUPT_EVENT_t event); * @return None * * \parDescription
- * Disables generation of interrupt on occurence of the input event.\n\n + * Disables generation of interrupt on occurrence of the input event.\n\n * The events are disabled by resetting the respective bit fields in the SRMSK register. \n * \parRelated APIs:
* NVIC_DisableIRQ(), XMC_SCU_INTERRUPT_EnableEvent()\n\n\n @@ -400,7 +406,7 @@ __STATIC_INLINE uint32_t XMC_SCU_RESET_GetDeviceResetReason(void) __STATIC_INLINE void XMC_SCU_RESET_ClearDeviceResetReason(void) { /* Clear RSTSTAT.RSTSTAT bitfield */ - SCU_RESET->RSTCLR |= (uint32_t)SCU_RESET_RSTCLR_RSCLR_Msk; + SCU_RESET->RSTCLR = (uint32_t)SCU_RESET_RSTCLR_RSCLR_Msk; } /** @@ -548,7 +554,7 @@ __STATIC_INLINE uint32_t XMC_SCU_GetMirrorStatus(void) * \b Range: \a XMC_SCU_STATUS_OK if the event handler is successfully configured.\n * \a XMC_SCU_STATUS_ERROR if the input event is invalid.\n * \parDescription
- * Assigns the event handler function to be executed on occurence of the selected event.\n\n + * Assigns the event handler function to be executed on occurrence of the selected event.\n\n * If the input event is valid, the handler function will be assigned to a table to be executed * when the interrupt is generated and the event status is set in the event status register. By using this API, * polling for a particular event can be avoided. This way the CPU utilization will be optimized. Multiple SCU events diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_sdmmc.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_sdmmc.h index 7da7dd00..e8a3683a 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_sdmmc.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_sdmmc.h @@ -1,13 +1,13 @@ /** * @file xmc_sdmmc.h - * @date 2015-10-27 + * @date 2016-07-11 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -44,6 +44,23 @@ * 2015-06-20: * - Removed version macros and declaration of GetDriverVersion API
* + * 2016-01-16: + * - Added the following APIs to the XMC_SDMMC low level driver
+ * 1) XMC_SDMMC_EnableDelayCmdDatLines
+ * 2) XMC_SDMMC_DisableDelayCmdDatLines
+ * 3) XMC_SDMMC_SetDelay
+ * 4) XMC_SDMMC_EnableHighSpeed
+ * 5) XMC_SDMMC_DisableHighSpeed
+ * + * 2016-04-07: + * - Added XMC_SDMMC_COMMAND_RESPONSE_t
+ * + * 2016-07-11: + * - Adjust masks for the following functions:
+ * 1) XMC_SDMMC_SetBusVoltage
+ * 2) XMC_SDMMC_SetDataLineTimeout
+ * 3) XMC_SDMMC_SDClockFreqSelect
+ * * @endcond */ @@ -178,6 +195,14 @@ ((d == XMC_SDMMC_DATA_TRANSFER_HOST_TO_CARD) ||\ (d == XMC_SDMMC_DATA_TRANSFER_CARD_TO_HOST)) +/* + * Min and max number of delay elements
+ * + * This macro is used in the LLD for assertion checks (XMC_ASSERT). + */ +#define XMC_SDMMC_MIN_DELAY_ELEMENTS (0U) +#define XMC_SDMMC_MAX_DELAY_ELEMENTS (15U) + /******************************************************************************* * ENUMS *******************************************************************************/ @@ -291,6 +316,17 @@ typedef enum XMC_SDMMC_RESPONSE_TYPE_R7 /**< Response type: R7 */ } XMC_SDMMC_RESPONSE_TYPE_t; +/** +* Command response selection +*/ +typedef enum XMC_SDMMC_COMMAND_RESPONSE +{ + XMC_SDMMC_COMMAND_RESPONSE_NONE = 0, /**< No Response */ + XMC_SDMMC_COMMAND_RESPONSE_LONG = 1, /**< Response length 136 */ + XMC_SDMMC_COMMAND_RESPONSE_SHORT = 2, /**< Response length 48 */ + XMC_SDMMC_COMMAND_RESPONSE_SHORT_BUSY = 3, /**< Response length 48 check Busy after response */ +} XMC_SDMMC_COMMAND_RESPONSE_t; + /** * Types of SDMMC commands */ @@ -474,14 +510,14 @@ typedef union { struct { - uint16_t response_type_sel : 2; /**< Response type select */ - uint16_t : 1; /**< Reserved bit */ + uint16_t response_type_sel : 2; /**< Response type select ::XMC_SDMMC_COMMAND_RESPONSE_t */ + uint16_t : 1; uint16_t crc_check_en : 1; /**< Command CRC check enable */ uint16_t index_check_en : 1; /**< Command index check enable */ uint16_t dat_present_sel : 1; /**< Data present select */ - uint16_t cmd_type : 2; /**< Command type */ + uint16_t cmd_type : 2; /**< Command type ::XMC_SDMMC_COMMAND_TYPE_t */ uint16_t cmd_index : 6; /**< Command index */ - uint16_t : 2; /**< Reserved bits */ + uint16_t : 2; }; uint16_t cmd; } XMC_SDMMC_COMMAND_t; @@ -1366,8 +1402,8 @@ __STATIC_INLINE void XMC_SDMMC_SDClockFreqSelect(XMC_SDMMC_t *const sdmmc, XMC_S XMC_ASSERT("XMC_SDMMC_SDClockFreqSelect: Invalid module pointer", XMC_SDMMC_CHECK_MODULE_PTR(sdmmc)); XMC_ASSERT("XMC_SDMMC_SDClockFreqSelect: Invalid clock frequency selection", XMC_SDMMC_CHECK_SDCLK_FREQ(clk)); - sdmmc->CLOCK_CTRL |= (uint16_t)((uint32_t)SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Msk & - (uint32_t)((uint32_t)clk << SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Pos)); + sdmmc->CLOCK_CTRL = (uint16_t)((sdmmc->CLOCK_CTRL & (uint32_t)~SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Msk) | + (uint32_t)(clk << SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Pos)); } /** @@ -1388,7 +1424,8 @@ __STATIC_INLINE void XMC_SDMMC_SetBusVoltage(XMC_SDMMC_t *const sdmmc, XMC_SDMMC XMC_ASSERT("XMC_SDMMC_SetBusVoltage: Invalid module pointer", XMC_SDMMC_CHECK_MODULE_PTR(sdmmc)); XMC_ASSERT("XMC_SDMMC_SetBusVoltage: Invalid bus voltage", XMC_SDMMC_CHECK_BUS_VOLTAGE(bus_voltage)); - sdmmc->POWER_CTRL |= (uint8_t)((uint32_t)bus_voltage << SDMMC_POWER_CTRL_SD_BUS_VOLTAGE_SEL_Pos); + sdmmc->POWER_CTRL = (uint8_t)((sdmmc->POWER_CTRL & (uint32_t)~SDMMC_POWER_CTRL_SD_BUS_VOLTAGE_SEL_Msk) | + (uint32_t)(bus_voltage << SDMMC_POWER_CTRL_SD_BUS_VOLTAGE_SEL_Pos)); } /** @@ -1409,8 +1446,8 @@ __STATIC_INLINE void XMC_SDMMC_SetDataLineTimeout(XMC_SDMMC_t *const sdmmc, XMC_ XMC_ASSERT("XMC_SDMMC_SetDataLineTimeout: Invalid module pointer", XMC_SDMMC_CHECK_MODULE_PTR(sdmmc)); XMC_ASSERT("XMC_SDMMC_SetDataLineTimeout: Invalid timeout", XMC_SDMMC_CHECK_DAT_TIMEOUT_COUNTER(timeout)); - sdmmc->TIMEOUT_CTRL |= (uint8_t)(((uint32_t)timeout << SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Pos) & - (uint32_t)SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Msk); + sdmmc->TIMEOUT_CTRL = (uint8_t)((sdmmc->TIMEOUT_CTRL & (uint32_t)~SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Msk) | + (uint32_t)(timeout << SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Pos)); } /** @@ -1457,6 +1494,94 @@ __STATIC_INLINE void XMC_SDMMC_SetDataTransferDirection(XMC_SDMMC_t *const sdmmc (uint16_t)((uint16_t)dir << SDMMC_TRANSFER_MODE_TX_DIR_SELECT_Pos)); } +/** + * @param None + * @return None + * + * \parDescription:
+ * Enable delay on the command/data out lines
+ * + * \par + * Use the function to enable delay on the command/data out lines. Invoke this function + * before selecting the number of delay elements. + */ +__STATIC_INLINE void XMC_SDMMC_EnableDelayCmdDatLines(void) +{ + SCU_GENERAL->SDMMCDEL |= (uint32_t)SCU_GENERAL_SDMMCDEL_TAPEN_Msk; +} + +/** + * @param None + * @return None + * + * \parDescription:
+ * Disable delay on the command/data out lines
+ * + * \par + * Use the function to disable delay on the command/data out lines. + */ +__STATIC_INLINE void XMC_SDMMC_DisableDelayCmdDatLines(void) +{ + SCU_GENERAL->SDMMCDEL &= (uint32_t)~SCU_GENERAL_SDMMCDEL_TAPEN_Msk; +} + +/** + * @param tapdel Number of delay elements to select + * @return None + * + * \parDescription:
+ * Set number of delay elements on the command/data out lines
+ * + * \par + * Use the function to set the number of delay elements on the command/data out lines. + * The function writes the delay value to the SDMMC delay control register (SDMMCDEL) + * within the realm of the SCU peripheral. A delay of tapdel + 1 is considered as the + * final selected number of delay elements. + */ +__STATIC_INLINE void XMC_SDMMC_SetDelay(uint8_t tapdel) +{ + SCU_GENERAL->SDMMCDEL = (uint32_t)((SCU_GENERAL->SDMMCDEL & (uint32_t)~SCU_GENERAL_SDMMCDEL_TAPDEL_Msk) | + (uint32_t)(tapdel << SCU_GENERAL_SDMMCDEL_TAPDEL_Pos)); +} + +/** + * @param None + * @return None + * + * \parDescription:
+ * High speed enable
+ * + * \par + * Use the function to enable high speed operation. The default is a normal speed operation. + * Once enabled, the host controller outputs command and data lines at the rising edge of the + * SD clock (up to 50 MHz for SD). + */ +__STATIC_INLINE void XMC_SDMMC_EnableHighSpeed(XMC_SDMMC_t *const sdmmc) +{ + XMC_ASSERT("XMC_SDMMC_EnableHighSpeed: Invalid module pointer", XMC_SDMMC_CHECK_MODULE_PTR(sdmmc)); + + sdmmc->HOST_CTRL |= (uint8_t)SDMMC_HOST_CTRL_HIGH_SPEED_EN_Msk; +} + +/** + * @param None + * @return None + * + * \parDescription:
+ * High speed disable
+ * + * \par + * Use the function to disable high speed operation. The host controller will switch back + * to a normal speed mode. In this mode, the host controller outputs command and data lines + * at 25 MHz for SD. + */ +__STATIC_INLINE void XMC_SDMMC_DisableHighSpeed(XMC_SDMMC_t *const sdmmc) +{ + XMC_ASSERT("XMC_SDMMC_DisableHighSpeed: Invalid module pointer", XMC_SDMMC_CHECK_MODULE_PTR(sdmmc)); + + sdmmc->HOST_CTRL &= (uint8_t)~SDMMC_HOST_CTRL_HIGH_SPEED_EN_Msk; +} + #ifdef __cplusplus } #endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_spi.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_spi.h index 1be71951..32966d10 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_spi.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_spi.h @@ -1,12 +1,12 @@ /** * @file xmc_spi.h - * @date 2015-10-27 + * @date 2016-05-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -62,6 +62,13 @@ * * 2015-09-08: * - Adding API for configuring the receiving clock phase in the slave:XMC_SPI_CH_DataLatchedInTrailingEdge() and XMC_SPI_CH_DataLatchedInLeadingEdge()
+ * + * 2016-04-10: + * - Added an API for configuring the transmit mode:XMC_SPI_CH_SetTransmitMode()
+ * + * 2016-05-20: + * - Added XMC_SPI_CH_EnableDataTransmission() and XMC_SPI_CH_DisableDataTransmission() + * * @endcond * */ @@ -438,6 +445,27 @@ void XMC_SPI_CH_EnableSlaveSelect(XMC_USIC_CH_t *const channel, const XMC_SPI_CH */ void XMC_SPI_CH_DisableSlaveSelect(XMC_USIC_CH_t *const channel); +/** + * @param channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address. + * @param mode Communication mode of the SPI, based on this mode TCI(Transmit control information)is updated.\n + * Refer @ref XMC_SPI_CH_MODE_t for valid values. + * + * @return None + * + * \parDescription:
+ * In Dual and Quad modes, hardware port control(CCR.HPCEN) mode is enabled. \n\n + * By enabling this the direction of the data pin is updated by hardware itself. Before transmitting the data set the + * mode to ensure the proper communication. + * + * \parRelated APIs:
+ * XMC_SPI_CH_Transmit() + */ +__STATIC_INLINE void XMC_SPI_CH_SetTransmitMode(XMC_USIC_CH_t *const channel, const XMC_SPI_CH_MODE_t mode) +{ + channel->CCR = (channel->CCR & (uint32_t)(~USIC_CH_CCR_HPCEN_Msk)) | + (((uint32_t) mode << USIC_CH_CCR_HPCEN_Pos) & (uint32_t)USIC_CH_CCR_HPCEN_Msk); +} + /** * @param channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address. * @param data Data to be transmitted @@ -1170,6 +1198,72 @@ __STATIC_INLINE void XMC_SPI_CH_ConfigExternalInputSignalToBRG(XMC_USIC_CH_t *co XMC_USIC_CH_ConfigExternalInputSignalToBRG(channel,pdiv,2U,combination_mode); } +/** + * @param channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address. + * + * @return None + * + * \parDescription
+ * The SELOx lines (with x = 1-7) can be used as addresses for an external address + * decoder to increase the number of external slave devices. + */ +__STATIC_INLINE void XMC_SPI_CH_EnableSlaveSelectCodedMode(XMC_USIC_CH_t *const channel) +{ + /* Configuration of Protocol Control Register */ + channel->PCR_SSCMode = (uint32_t)(channel->PCR_SSCMode & (~USIC_CH_PCR_SSCMode_SELCTR_Msk)); +} + +/** + * @param channel A constant pointer to XMC_USIC_CH_t, pointing to the USIC channel base address. + * + * @return None + * + * \parDescription
+ * Each SELOx line (with x = 0-7) can be directly connected to an external slave device. + */ +__STATIC_INLINE void XMC_SPI_CH_DisableSlaveSelectCodedMode(XMC_USIC_CH_t *const channel) +{ + /* Configuration of Protocol Control Register */ + channel->PCR_SSCMode |= (uint32_t)USIC_CH_PCR_SSCMode_SELCTR_Msk; +} + +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_SPI0_CH0, @ref XMC_SPI0_CH1,@ref XMC_SPI1_CH0,@ref XMC_SPI1_CH1,@ref XMC_SPI2_CH0,@ref XMC_SPI2_CH1 @note Availability of SPI1 and SPI2 depends on device selection + * @return None + * + * \parDescription
+ * Enable data transmission.\n\n + * Use this function in combination with XMC_SPI_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * @note If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode() + * + * \parRelated APIs:
+ * XMC_SPI_CH_DisableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_SPI_CH_EnableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_ON_TDV); +} + +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_SPI0_CH0, @ref XMC_SPI0_CH1,@ref XMC_SPI1_CH0,@ref XMC_SPI1_CH1,@ref XMC_SPI2_CH0,@ref XMC_SPI2_CH1 @note Availability of SPI1 and SPI2 depends on device selection + * @return None + * + * \parDescription
+ * Disable data transmission.\n\n + * Use this function in combination with XMC_SPI_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * + * \parRelated APIs:
+ * XMC_SPI_CH_EnableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_SPI_CH_DisableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_DISABLED); +} + #ifdef __cplusplus } #endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_uart.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_uart.h index 2b6fc874..10ab45de 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_uart.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_uart.h @@ -1,12 +1,12 @@ /** * @file xmc_uart.h - * @date 2015-10-27 + * @date 2016-05-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -50,6 +50,10 @@ * - Modified XMC_UART_CH_SetInputSource() for avoiding complete DXCR register overwriting.
* - Modified XMC_UART_CH_EVENT_t enum for supporting XMC_UART_CH_EnableEvent() and XMC_UART_CH_DisableEvent() * for supporting multiple events configuration
+ * + * 2016-05-20: + * - Added XMC_UART_CH_EnableDataTransmission() and XMC_UART_CH_DisableDataTransmission() + * * @endcond * */ @@ -754,6 +758,43 @@ __STATIC_INLINE void XMC_UART_CH_SetInputSamplingFreq(XMC_USIC_CH_t *const chann XMC_USIC_CH_SetInputSamplingFreq(channel, (XMC_USIC_CH_INPUT_t)input, (XMC_USIC_CH_INPUT_SAMPLING_FREQ_t)sampling_freq); } +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_UART0_CH0, @ref XMC_UART0_CH1,@ref XMC_UART1_CH0,@ref XMC_UART1_CH1,@ref XMC_UART2_CH0,@ref XMC_UART2_CH1 @note Availability of UART1 and UART2 depends on device selection + * @return None + * + * \parDescription
+ * Enable data transmission.\n\n + * Use this function in combination with XMC_UART_CH_DisableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * @note If you need more control over the start of transmission use XMC_USIC_CH_SetStartTransmisionMode() + * + * \parRelated APIs:
+ * XMC_UART_CH_DisableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_UART_CH_EnableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_ON_TDV); +} + +/** + * @param channel Constant pointer to USIC channel handle of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_UART0_CH0, @ref XMC_UART0_CH1,@ref XMC_UART1_CH0,@ref XMC_UART1_CH1,@ref XMC_UART2_CH0,@ref XMC_UART2_CH1 @note Availability of UART1 and UART2 depends on device selection + * @return None + * + * \parDescription
+ * Disable data transmission.\n\n + * Use this function in combination with XMC_UART_CH_EnableDataTransmission() to fill the FIFO and send the FIFO content without gaps in the transmission. + * FIFO is filled using XMC_USIC_CH_TXFIFO_PutData(). + * + * \parRelated APIs:
+ * XMC_UART_CH_EnableDataTransmission()\n\n\n + */ +__STATIC_INLINE void XMC_UART_CH_DisableDataTransmission(XMC_USIC_CH_t *const channel) +{ + XMC_USIC_CH_SetStartTransmisionMode(channel, XMC_USIC_CH_START_TRANSMISION_DISABLED); +} + #ifdef __cplusplus } #endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd.h index 90da62b0..cf54ac09 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd.h @@ -1,11 +1,11 @@ /** * @file xmc_usbd.h - * @date 2015-10-27 + * @date 2015-06-20 * ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd_regs.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd_regs.h index 55db5d09..4b0525e2 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd_regs.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbd_regs.h @@ -33,13 +33,13 @@ /* * @file xmc_usbd_regs.h - * @date 2015-10-27 + * @date 2015-02-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbh.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbh.h new file mode 100644 index 00000000..9254edab --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usbh.h @@ -0,0 +1,416 @@ +/** + * @file xmc_usbh.h + * @date 2016-06-30 + * + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2016-06-30: + * - Initial Version.
+ * 2016-09-01: + * - Removed Keil specific inclusions and macros
+ * + * @endcond + * + */ + +#ifndef XMC_USBH_H +#define XMC_USBH_H + +#include +#include "xmc_common.h" +#include "xmc_scu.h" +#include "xmc_gpio.h" + +#if((UC_SERIES == XMC45) || (UC_SERIES == XMC44) || (UC_SERIES == XMC43) || (UC_SERIES == XMC47) || (UC_SERIES == XMC48) || defined(DOXYGEN)) +/** + * @addtogroup XMClib XMC Peripheral Library + * @{ + */ + +/** + * @addtogroup USBH + * @brief Universal Serial Bus Host (USBH) driver for the XMC4000 microcontroller family. + * + * The USBH is the host mode device driver for the USB0 hardware module on XMC4000 family of microcontrollers. + * The USB0 module can be used to establish a USB interface between outside world and XMC4000 family of controllers. + * The USB module includes the following features in host mode: + * -# Complies with the USB 2.0 Specification. + * -# Supports up to 14 bidirectional pipes, including control pipe 0. + * -# Supports SOFs in Full-Speed modes. + * -# Supports clock gating for power saving. + * -# Supports FIFO mode data transaction. + * + * The below figure shows the overview of USB0 module in XMC4 microntroller. + * @image html USB_module_overview.png + * @image latex ../images/USB_module_overview.png + * + * + * The USBH device driver supports the following features:\n + * -# Initialize/Uninitialize the USB0 module on XMC4000 device. + * -# Control VBUS state. + * -# Reset USB port. + * -# Set the USB device address. + * -# Allocate pipe for new endpoint communication. + * -# Modify an existing pipe. + * -# Transfer data on selected pipe. + * -# Abort ongoing data transaction. + * -# Handle multi packet data transaction by updating toggle information. + * + * The USBH device driver expects registration of callback functions ::XMC_USBH_SignalPortEvent_t and ::XMC_USBH_SignalPipeEvent_t to be executed + * when there is port event interrupt and pipe event interrupt respectively.\n + * The USBH driver is CMSIS API compatible. Please use Driver_USBH0 to access the USBH API.\n + * For example, to initialize the USB host controller, use Driver_USBH0.Initialize().\n + * + * @{ + */ + +/********************************************************************************************************************** + * MACROS + *********************************************************************************************************************/ +/*Drive VBUS*/ +#define XMC_USB_DRIVE_PORT1 P3_2 /**< Default port(PORT3, pin 2) used to enable VBUS voltage regulator on the board */ +#define XMC_USB_DRIVE_PORT2 P0_1 /**< Alternate port that can be used to enable VBUS voltage regulator(PORT0, pin 1) */ + +#ifndef USBH0_MAX_PIPE_NUM +#define USBH0_MAX_PIPE_NUM (14U) /**< Representation of number of pipes available */ +#endif +#if (USBH0_MAX_PIPE_NUM > 14U) +#error Too many Pipes, maximum Pipes that this driver supports is 14 !!! +#endif + +#define XMC_USBH_CLOCK_GATING_ENABLE 1 /**< Used to enable clock gating when the driver is powered down*/ +#define XMC_USBH_CLOCK_GATING_DISABLE 0 /**< Used to disable clock gating when the driver is fully powered*/ + +#define USB_CH_HCCHARx_MPS(x) (((uint32_t) x ) & (uint32_t)USB_CH_HCCHAR_MPS_Msk) /**< Masks maximum packet size information from the HCCHAR register value provided as input */ +#define USB_CH_HCCHARx_EPNUM(x) (((uint32_t) x << USB_CH_HCCHAR_EPNum_Pos) & (uint32_t)USB_CH_HCCHAR_EPNum_Msk) /**< Shifts the value to the position of endpoint number(EPNum) in the HCCHAR register*/ +#define USB_CH_HCCHARx_EPTYPE(x) (((uint32_t) x << USB_CH_HCCHAR_EPType_Pos) & (uint32_t)USB_CH_HCCHAR_EPType_Msk) /**< Shifts the value to the position of endpoint type(EPType) in the HCCHAR register*/ +#define USB_CH_HCCHARx_MCEC(x) (((uint32_t) x << USB_CH_HCCHAR_MC_EC_Pos) & (uint32_t)USB_CH_HCCHAR_MC_EC_Msk) /**< Shifts the value to the position of multi-count(MC_EC) field in the HCCHAR register*/ +#define USB_CH_HCCHARx_DEVADDR(x) (((uint32_t) x << USB_CH_HCCHAR_DevAddr_Pos) & (uint32_t)USB_CH_HCCHAR_DevAddr_Msk) /**< Shifts the value to the position of endpoint type(EPType) in the HCCHAR register*/ +#define USB_CH_HCCHARx_EPDIR(x) (((uint32_t) x << USB_CH_HCCHAR_EPDir_Pos) & (uint32_t)USB_CH_HCCHAR_EPDir_Msk) /**< Shifts the value to the position of endpoint direction(EPDir) in the HCCHAR register*/ +#define USB_CH_HCCHAR_LSDEV_Msk (((uint32_t) 0x1 << 15U) & 0x1U) +#define USB_CH_HCTSIZx_DPID(x) (((uint32_t) x << USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos) & (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk) /**< Shifts the value to the position of packet ID (PID) in the HCTSIZ register*/ +#define USB_CH_HCTSIZx_DPID_DATA0 (USB_CH_HCTSIZx_DPID(0U)) /**< Represents DATA toggle DATA0 as in HCTSIZ register*/ +#define USB_CH_HCTSIZx_DPID_DATA2 (USB_CH_HCTSIZx_DPID(1U)) /**< Represents DATA toggle DATA2 as in HCTSIZ register*/ +#define USB_CH_HCTSIZx_DPID_DATA1 (USB_CH_HCTSIZx_DPID(2U)) /**< Represents DATA toggle DATA1 as in HCTSIZ register*/ +#define USB_CH_HCTSIZx_DPID_MDATA (USB_CH_HCTSIZx_DPID(3U)) /**< Represents DATA toggle MDATA as in HCTSIZ register*/ +#define USB_CH_HCTSIZx_DPID_SETUP (USB_CH_HCTSIZx_DPID(3U)) /**< Represents SETUP token as in HCTSIZ register*/ +#define USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT 0x2 /**< Represents IN data token as in receive status pop register(GRXSTSP)*/ +#define USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL 0x3 /**< Represents paket status information as in receive status pop register(GRXSTSP)*/ + + +#define USB_CH_HCFG_FSLSSUP(x) (((uint32_t) x << USB_HCFG_FSLSSupp_Pos) & USB_HCFG_FSLSSupp_Msk) /**< Provides register value to update USB full speed related mask FLSSupp of register HCFG*/ +#define USB_CH_HCFG_FSLSPCS(x) (((uint32_t) x ) & USB_HCFG_FSLSPclkSel_Msk) /**< Provides register value to update PHY clock selection in register HCFG*/ + +#define USB_CH_HCINTx_ALL (USB_CH_HCINTMSK_XferComplMsk_Msk | \ + USB_CH_HCINTMSK_ChHltdMsk_Msk | \ + USB_CH_HCINTMSK_StallMsk_Msk | \ + USB_CH_HCINTMSK_NakMsk_Msk | \ + USB_CH_HCINTMSK_AckMsk_Msk | \ + USB_CH_HCINTMSK_XactErrMsk_Msk | \ + USB_CH_HCINTMSK_BblErrMsk_Msk | \ + USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \ + USB_CH_HCINTMSK_DataTglErrMsk_Msk) /**< Mask for selecting all channel related events*/ + +#define USB_CH_HCINTx_ERRORS (USB_CH_HCINTMSK_XactErrMsk_Msk | \ + USB_CH_HCINTMSK_BblErrMsk_Msk | \ + USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \ + USB_CH_HCINTMSK_DataTglErrMsk_Msk) /**< Mask for selecting all channel error related events*/ +/*Macro to find pipe index using handle*/ +#define USBH_PIPE_GET_INDEX(handle) (((uint32_t)handle - (uint32_t)USB0_CH0_BASE)/(0x20U)) /**< Macro provides index of the USB channel based on its base address*/ + +#define XMC_USBH_API_VERSION ((uint16_t)((uint16_t)XMC_LIB_MAJOR_VERSION << 8U) |XMC_LIB_MINOR_VERSION) /**< USBH low level driver API version */ + +/* General return codes */ +#define XMC_USBH_DRIVER_OK 0 /**< Operation succeeded */ +#define XMC_USBH_DRIVER_ERROR -1 /**< Unspecified error */ +#define XMC_USBH_DRIVER_ERROR_BUSY -2 /**< Driver is busy*/ +#define XMC_USBH_DRIVER_ERROR_TIMEOUT -3 /**< Timeout occurred */ +#define XMC_USBH_DRIVER_ERROR_UNSUPPORTED -4 /**< Operation not supported*/ +#define XMC_USBH_DRIVER_ERROR_PARAMETER -5 /**< Parameter error*/ +#define XMC_USBH_DRIVER_ERROR_SPECIFIC -6 /**< Start of driver specific errors*/ + +/* USB Speed */ +#define XMC_USBH_SPEED_LOW 0U /**< Low-speed USB*/ +#define XMC_USBH_SPEED_FULL 1U /**< Full-speed USB*/ +#define XMC_USBH_SPEED_HIGH 2U /**< High-speed USB*/ + +/* USB Endpoint Type */ +#define XMC_USBH_ENDPOINT_CONTROL 0 /**< Control Endpoint*/ +#define XMC_USBH_ENDPOINT_ISOCHRONOUS 1 /**< Isochronous Endpoint*/ +#define XMC_USBH_ENDPOINT_BULK 2 /**< Bulk Endpoint*/ +#define XMC_USBH_ENDPOINT_INTERRUPT 3 /**< Interrupt Endpoint*/ + +#define XMC_USBH_SignalEndpointEvent_t XMC_USBH_SignalPipeEvent_t /**< Legacy name for the pipe event handler*/ + +/****** USB Host Packet Information *****/ +#define XMC_USBH_PACKET_TOKEN_Pos 0 /**< Packet token position*/ +#define XMC_USBH_PACKET_TOKEN_Msk (0x0FUL << XMC_USBH_PACKET_TOKEN_Pos) /**< Packet token mask*/ +#define XMC_USBH_PACKET_SETUP (0x01UL << XMC_USBH_PACKET_TOKEN_Pos) /**< SETUP Packet*/ +#define XMC_USBH_PACKET_OUT (0x02UL << XMC_USBH_PACKET_TOKEN_Pos) /**< OUT Packet*/ +#define XMC_USBH_PACKET_IN (0x03UL << XMC_USBH_PACKET_TOKEN_Pos) /**< IN Packet*/ +#define XMC_USBH_PACKET_PING (0x04UL << XMC_USBH_PACKET_TOKEN_Pos) /**< PING Packet*/ + +#define XMC_USBH_PACKET_DATA_Pos 4 /**< Packet data PID position*/ +#define XMC_USBH_PACKET_DATA_Msk (0x0FUL << XMC_USBH_PACKET_DATA_Pos) /**< Packet data PID mask*/ +#define XMC_USBH_PACKET_DATA0 (0x01UL << XMC_USBH_PACKET_DATA_Pos) /**< DATA0 PID */ +#define XMC_USBH_PACKET_DATA1 (0x02UL << XMC_USBH_PACKET_DATA_Pos) /**< DATA1 PID */ + +#define XMC_USBH_PACKET_SPLIT_Pos 8 +#define XMC_USBH_PACKET_SPLIT_Msk (0x0FUL << XMC_USBH_PACKET_SPLIT_Pos) +#define XMC_USBH_PACKET_SSPLIT (0x08UL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet */ +#define XMC_USBH_PACKET_SSPLIT_S (0x09UL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet: Data Start */ +#define XMC_USBH_PACKET_SSPLIT_E (0x0AUL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet: Data End */ +#define XMC_USBH_PACKET_SSPLIT_S_E (0x0BUL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet: Data All */ +#define XMC_USBH_PACKET_CSPLIT (0x0CUL << XMC_USBH_PACKET_SPLIT_Pos) /**< CSPLIT Packet */ + +#define XMC_USBH_PACKET_PRE (1UL << 12) /**< PRE Token */ + + +/****** USB Host Port Event *****/ +#define XMC_USBH_EVENT_CONNECT (1UL << 0) /**< USB Device Connected to Port */ +#define XMC_USBH_EVENT_DISCONNECT (1UL << 1) /**< USB Device Disconnected from Port */ +#define XMC_USBH_EVENT_OVERCURRENT (1UL << 2) /**< USB Device caused Overcurrent */ +#define XMC_USBH_EVENT_RESET (1UL << 3) /**< USB Reset completed */ +#define XMC_USBH_EVENT_SUSPEND (1UL << 4) /**< USB Suspend occurred */ +#define XMC_USBH_EVENT_RESUME (1UL << 5) /**< USB Resume occurred */ +#define XMC_USBH_EVENT_REMOTE_WAKEUP (1UL << 6) /**< USB Device activated Remote Wakeup */ + +/****** USB Host Pipe Event *****/ +#define XMC_USBH_EVENT_TRANSFER_COMPLETE (1UL << 0) /**< Transfer completed */ +#define XMC_USBH_EVENT_HANDSHAKE_NAK (1UL << 1) /**< NAK Handshake received */ +#define XMC_USBH_EVENT_HANDSHAKE_NYET (1UL << 2) /**< NYET Handshake received */ +#define XMC_USBH_EVENT_HANDSHAKE_MDATA (1UL << 3) /**< MDATA Handshake received */ +#define XMC_USBH_EVENT_HANDSHAKE_STALL (1UL << 4) /**< STALL Handshake received */ +#define XMC_USBH_EVENT_HANDSHAKE_ERR (1UL << 5) /**< ERR Handshake received */ +#define XMC_USBH_EVENT_BUS_ERROR (1UL << 6) /**< Bus Error detected */ +/******************************************************************************* + * ENUMS + *******************************************************************************/ +/** + * @brief General power states of USB peripheral driver +*/ +typedef enum XMC_USBH_POWER_STATE { + XMC_USBH_POWER_OFF, /**< Power off: no operation possible */ + XMC_USBH_POWER_LOW, /**< Low Power mode: retain state, detect and signal wake-up events */ + XMC_USBH_POWER_FULL /**< Power on: full operation at maximum performance */ +} XMC_USBH_POWER_STATE_t; +/******************************************************************************* + * DATA STRUCTURES + *******************************************************************************/ +/** + * @brief USB host Driver Version +*/ +typedef struct XMC_USBH_DRIVER_VERSION { + uint16_t api; /**< API version */ + uint16_t drv; /**< Driver version */ +} XMC_USBH_DRIVER_VERSION_t; + + +/** + * @brief USB Host Port State +*/ +typedef struct XMC_USBH_PORT_STATE { + uint32_t connected : 1; /**< USB Host Port connected flag */ + uint32_t overcurrent : 1; /**< USB Host Port overcurrent flag */ + uint32_t speed : 2; /**< USB Host Port speed setting (ARM_USB_SPEED_xxx) */ +} XMC_USBH_PORT_STATE_t; + +/** + * @brief USB Host Pipe Handle. It represents the physical address of a USB channel +*/ +typedef uint32_t XMC_USBH_PIPE_HANDLE; +#define XMC_USBH_EP_HANDLE XMC_USBH_PIPE_HANDLE /**< Legacy name for pipe handle used by CMSIS*/ + +/** + * @brief USB Host Driver Capabilities. +*/ +typedef struct XMC_USBH_CAPABILITIES { + uint32_t port_mask : 15; /**< Root HUB available Ports Mask */ + uint32_t auto_split : 1; /**< Automatic SPLIT packet handling */ + uint32_t event_connect : 1; /**< Signal Connect event */ + uint32_t event_disconnect : 1; /**< Signal Disconnect event */ + uint32_t event_overcurrent : 1; /**< Signal Overcurrent event */ +} XMC_USBH_CAPABILITIES_t; + + +typedef void (*XMC_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event); /**< Pointer to \ref ARM_USBH_SignalPortEvent : Signal Root HUB Port Event. */ +typedef void (*XMC_USBH_SignalPipeEvent_t) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t event); /**< Pointer to \ref ARM_USBH_SignalPipeEvent : Signal Pipe Event. */ + +/** + * @brief Access structure of USB Host Driver. +*/ +typedef struct XMC_USBH_DRIVER { + XMC_USBH_DRIVER_VERSION_t (*GetVersion) (void); /**< Pointer to \ref ARM_USBH_GetVersion : Get driver version. */ + XMC_USBH_CAPABILITIES_t (*GetCapabilities) (void); /**< Pointer to \ref ARM_USBH_GetCapabilities : Get driver capabilities. */ + int32_t (*Initialize) (XMC_USBH_SignalPortEvent_t cb_port_event, + XMC_USBH_SignalPipeEvent_t cb_pipe_event); /**< Pointer to \ref ARM_USBH_Initialize : Initialize USB Host Interface. */ + int32_t (*Uninitialize) (void); /**< Pointer to \ref ARM_USBH_Uninitialize : De-initialize USB Host Interface. */ + int32_t (*PowerControl) (XMC_USBH_POWER_STATE_t state); /**< Pointer to \ref ARM_USBH_PowerControl : Control USB Host Interface Power. */ + int32_t (*PortVbusOnOff) (uint8_t port, bool vbus); /**< Pointer to \ref ARM_USBH_PortVbusOnOff : Root HUB Port VBUS on/off. */ + int32_t (*PortReset) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortReset : Do Root HUB Port Reset. */ + int32_t (*PortSuspend) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortSuspend : Suspend Root HUB Port (stop generating SOFs). */ + int32_t (*PortResume) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortResume : Resume Root HUB Port (start generating SOFs). */ + XMC_USBH_PORT_STATE_t (*PortGetState) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortGetState : Get current Root HUB Port State. */ + XMC_USBH_PIPE_HANDLE (*PipeCreate) (uint8_t dev_addr, + uint8_t dev_speed, + uint8_t hub_addr, + uint8_t hub_port, + uint8_t ep_addr, + uint8_t ep_type, + uint16_t ep_max_packet_size, + uint8_t ep_interval); /**< Pointer to \ref ARM_USBH_PipeCreate : Create Pipe in System. */ + int32_t (*PipeModify) (XMC_USBH_PIPE_HANDLE pipe_hndl, + uint8_t dev_addr, + uint8_t dev_speed, + uint8_t hub_addr, + uint8_t hub_port, + uint16_t ep_max_packet_size); /**< Pointer to \ref ARM_USBH_PipeModify : Modify Pipe in System. */ + int32_t (*PipeDelete) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeDelete : Delete Pipe from System. */ + int32_t (*PipeReset) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeReset : Reset Pipe. */ + int32_t (*PipeTransfer) (XMC_USBH_PIPE_HANDLE pipe_hndl, + uint32_t packet, + uint8_t *data, + uint32_t num); /**< Pointer to \ref ARM_USBH_PipeTransfer : Transfer packets through USB Pipe. */ + uint32_t (*PipeTransferGetResult) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeTransferGetResult : Get result of USB Pipe transfer. */ + int32_t (*PipeTransferAbort) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeTransferAbort : Abort current USB Pipe transfer. */ + uint16_t (*GetFrameNumber) (void); /**< Pointer to \ref ARM_USBH_GetFrameNumber : Get current USB Frame Number. */ +} const XMC_USBH_DRIVER_t; + + +/** + * @brief Structure to handle various states of USB host driver. An instance exists for each USB channel + */ +typedef struct XMC_USBH0_pipe { + uint32_t packet; /**< Holds packet token and PID information of ongoing data packet transaction*/ + uint8_t *data; /**< Holds address of data buffer. It represents source buffer for OUT or SETUP transfer and + destination address for IN transfer*/ + uint32_t num; /**< Number of bytes of data to be transmitted*/ + uint32_t num_transferred_total; /**< Number of bytes transmitted or received at the moment*/ + uint32_t num_transferring; /**< Number of bytes being transmitted currently*/ + uint16_t ep_max_packet_size; /**< Maximum packet size for the selected pipe*/ + uint16_t interval_reload; /**< For INTERRUPT or ISOCHRONOUS pipe, it represents the period for repeated transfer*/ + uint16_t interval; /**< For INTERRUPT or ISOCHRONOUS pipe, it represents the decrementing count to reach 0 for initiating retransmission*/ + uint8_t ep_type; /**< Endpoint type for selected pipe*/ + uint8_t in_use; /**< Set to true when transfer is in progress and reset only after the /ref num of bytes is transferred*/ + uint8_t transfer_active; /**< Set to true when a transfer has been initiated and reset when event for transfer complete occurs*/ + uint8_t interrupt_triggered; /**< For INTERRUPT or ISOCHRONOUS pipe, indicates if retransmit timeout has occurred*/ + uint8_t event; /**< Holds pipe specific event flags*/ +} XMC_USBH0_pipe_t; + + +typedef struct xmc_usb_host_device { + USB0_GLOBAL_TypeDef *global_register; /**< Global register interface */ + USB0_CH_TypeDef *host_channel_registers; /**< Host channel interface */ + XMC_USBH_SignalPortEvent_t SignalPortEvent_cb; /**< Port event callback; set during init */ + XMC_USBH_SignalPipeEvent_t SignalPipeEvent_cb; /**< Pipe event callback; set during init */ + bool init_done; /**< init status */ + XMC_USBH_POWER_STATE_t power_state; /**< USB Power status */ + bool port_reset_active; /**< Port reset state */ +} XMC_USBH0_DEVICE_t; + +/******************************************************************************* + * API PROTOTYPES + *******************************************************************************/ +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @param gintsts USB global interrupt status. + * @return None. + * + * \parDescription:
+ * Updates logical state of the USB host driver based on the input status value. It handles port interrupt + * and channel interrupt. It responsible for updating data toggle information for multi-packet data transmission. + * It executes the callback function on transfer completion and reception of data. It also does error management and + * calls the relevant callback functions to indicate it to the application. + */ +void XMC_USBH_HandleIrq (uint32_t gintsts); +/** + * @param ms Delay in milliseconds. + * @return uint8_t Value has no significance for the low level driver. + * + * \parDescription:
+ * Function implements time delay logic. The USB host low level driver provides a weak definition + * for delay which has to re-implemented with time delay logic. The low level driver expects blocking + * implementation of the delay. + */ + uint8_t XMC_USBH_osDelay(uint32_t ms); + +/** + * @param port Address of the port which has the pin used to enable VBUS charge pump. + * @param pin Pin number in the port selected in previous argument using which the VBUS charge pump has to be enabled. + * @return None + * + * \parDescription:
+ * Configures the port pin with alternate output function 1. VBUS enabling pins work with alternate output function 1. \n + * Note:The input port pin should support USB VBUS as an alternate function. \n + * Typical ports that support VBUS enable are: P3_2 and P0_1. + * + */ +void XMC_USBH_Select_VBUS(XMC_GPIO_PORT_t* port, uint32_t pin); + +/** + * @return USB host mode interrupt status. Bit field USB0_BASE->GINTSTS_HOSTMODE + * + * \parDescription:
+ * Provides USB host global interrupt status. \n + * This value can be used to provide interrupt status to the IRQ handler function XMC_USBH_HandleIrq(). + * + */ +uint32_t XMC_USBH_GetInterruptStatus(void); + +/** + * @return None + * + * \parDescription:
+ * De-asserts resume bit. \n + * The function shall be called 20ms after detecting port remote wakeup event. \n + * + */ +void XMC_USBH_TurnOffResumeBit(void); +#ifdef __cplusplus +} +#endif +/** + * @} + */ + +/** + * @} + */ +#endif +#endif /* XMC_USBH_H */ + + diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usic.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usic.h index 32507565..682bb74f 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usic.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_usic.h @@ -1,12 +1,12 @@ /** * @file xmc_usic.h - * @date 2015-10-27 + * @date 2016-04-10 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -67,6 +67,12 @@ * - Added API for enabling the transfer trigger unit to set bit TCSR.TE if the trigger signal DX2T becomes active. Feature used for RS-232 * Clear to Send (CTS) signal: XMC_USIC_CH_EnableTBUFDataValidTrigger() and XMC_USIC_CH_DisableTBUFDataValidTrigger(). * + * 2016-03-09: + * - Optimization of write only registers + * + * 2016-04-10: + * - Added an API to put the data into FIFO when hardware port control is enabled: XMC_USIC_CH_TXFIFO_PutDataHPCMode()
+ * * @endcond * */ @@ -1269,7 +1275,7 @@ __STATIC_INLINE void XMC_USIC_CH_DisableTBUFDataValidTrigger(XMC_USIC_CH_t *cons */ __STATIC_INLINE void XMC_USIC_CH_TriggerServiceRequest(XMC_USIC_CH_t *const channel, const uint32_t service_request_line) { - channel->FMR |= (uint32_t)(USIC_CH_FMR_SIO0_Msk << service_request_line); + channel->FMR = (uint32_t)(USIC_CH_FMR_SIO0_Msk << service_request_line); } /** @@ -1480,6 +1486,30 @@ __STATIC_INLINE void XMC_USIC_CH_TXFIFO_PutDataFLEMode(XMC_USIC_CH_t *const chan channel->IN[frame_length] = data; } +/** + * @param channel Pointer to USIC channel handler of type @ref XMC_USIC_CH_t \n + * \b Range: @ref XMC_USIC0_CH0, @ref XMC_USIC0_CH1 to @ref XMC_USIC2_CH1 based on device support. + * @param data Data to be transmitted. + * @param frame_length Frame length to be configured while transmitting the data. \n + * \b Range: minimum= 0, maximum= 31. e.g: For a frame length of 16, set \a frame_length as 15. + * @return None + * + * \parDescription
+ * Writes data to the transmit FIFO in hardware port control mode. \n\n + * When hardware port control is enabled for dynamic update of frame length, this API can be used. + * \a frame_length represents the frame length to be updated by the peripheral. + * \a frame_length is used as index for the IN[] register array. + * + * \parRelated APIs:
+ * XMC_USIC_CH_EnableFrameLengthControl() \n\n\n + */ +__STATIC_INLINE void XMC_USIC_CH_TXFIFO_PutDataHPCMode(XMC_USIC_CH_t *const channel, + const uint16_t data, + const uint32_t frame_length) +{ + channel->IN[frame_length] = data; +} + /** * @param channel Pointer to USIC channel handler of type @ref XMC_USIC_CH_t \n * \b Range: @ref XMC_USIC0_CH0, @ref XMC_USIC0_CH1 to @ref XMC_USIC2_CH1 based on device support. @@ -1494,7 +1524,7 @@ __STATIC_INLINE void XMC_USIC_CH_TXFIFO_PutDataFLEMode(XMC_USIC_CH_t *const chan */ __STATIC_INLINE void XMC_USIC_CH_TXFIFO_Flush(XMC_USIC_CH_t *const channel) { - channel->TRBSCR |= (uint32_t)USIC_CH_TRBSCR_FLUSHTB_Msk; + channel->TRBSCR = (uint32_t)USIC_CH_TRBSCR_FLUSHTB_Msk; } /** @@ -1599,7 +1629,7 @@ __STATIC_INLINE uint32_t XMC_USIC_CH_TXFIFO_GetEvent(XMC_USIC_CH_t *const channe __STATIC_INLINE void XMC_USIC_CH_TXFIFO_ClearEvent(XMC_USIC_CH_t *const channel, const uint32_t event) { - channel->TRBSCR |= event; + channel->TRBSCR = event; } /** @@ -1760,7 +1790,7 @@ __STATIC_INLINE uint16_t XMC_USIC_CH_RXFIFO_GetData(XMC_USIC_CH_t *const channel */ __STATIC_INLINE void XMC_USIC_CH_RXFIFO_Flush(XMC_USIC_CH_t *const channel) { - channel->TRBSCR |= (uint32_t)USIC_CH_TRBSCR_FLUSHRB_Msk; + channel->TRBSCR = (uint32_t)USIC_CH_TRBSCR_FLUSHRB_Msk; } /** @@ -1870,7 +1900,7 @@ __STATIC_INLINE uint32_t XMC_USIC_CH_RXFIFO_GetEvent(XMC_USIC_CH_t *const channe __STATIC_INLINE void XMC_USIC_CH_RXFIFO_ClearEvent(XMC_USIC_CH_t *const channel, const uint32_t event) { - channel->TRBSCR |= event; + channel->TRBSCR = event; } /** diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc.h index 7859c604..b6a30f25 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc.h @@ -1,12 +1,12 @@ /** * @file xmc_vadc.h - * @date 2015-10-27 + * @date 2016-06-17 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -66,6 +66,42 @@ * - XMC_VADC_GROUP_ChannelGetResultAlignment * - XMC_VADC_GROUP_ChannelGetInputClass * - XMC_VADC_GROUP_SetResultSubtractionValue + * + * 2015-12-01: + * - Added: + * - XMC4300 device supported + * + * - Fixed: + * - XMC_VADC_GLOBAL_TriggerEvent API updated. OR operation removed. + * - XMC_VADC_GLOBAL_ClearEvent API updated. Multiple events triggering on clearing the event is fixed. + * - Wrong MACRO name defined in xmc_vadc_map.h file corrected for XMC4200/4100 devices. + * XMC_VADC_G3_SAMPLE renamed to XMC_VADC_G1_SAMPLE + * + * 2015-12-01: + * - New APIs Created. + * - XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled + * - XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled + * - Fixed the analog calibration voltage for XMC1100 to external reference upper supply range. + * - Fixed the XMC_VADC_GLOBAL_StartupCalibration() for XMC1100. + * + * 2016-03-09: + * - Optimization of write only registers + * + * 2016-03-18: + * - Fixed XMC_VADC_GLOBAL_SHS_IsConverterReady(): API checks the STEPCFG register for the ready bit instead of + * SHSCFG SFR. + * + * 2016-06-17: + * - New macros added XMC_VADC_SHS_FULL_SET_REG, XMC_VADC_RESULT_PRIORITY_AVAILABLE + * - New Enum added XMC_VADC_SHS_GAIN_LEVEL_t and XMC_VADC_SYNCTR_EVAL_t + * - New APIs added are: + * - XMC_VADC_GROUP_SetSyncSlaveReadySignal + * - XMC_VADC_GROUP_ChannelGetAssertedEvents + * - XMC_VADC_GROUP_GetAssertedResultEvents + * - XMC_VADC_GROUP_SetResultRegPriority + * - XMC_VADC_GROUP_SetSyncReadySignal + * - XMC_VADC_GROUP_GetSyncReadySignal + * - XMC_VADC_GROUP_GetResultRegPriority * @endcond * */ @@ -145,20 +181,22 @@ * MACROS ********************************************************************************************************************/ -#if ((UC_SERIES == XMC42)||(UC_SERIES == XMC41)) -#define XMC_VADC_GROUP_AVAILABLE (1U) /* Defines the availability of group resource in a device*/ -#define XMC_VADC_GSCAN_AVAILABLE (1U) /* Defines the availability of scan request resource in a device*/ -#define XMC_VADC_QUEUE_AVAILABLE (1U) /* Defines the availability of queue request resource in a device*/ -#define XMC_VADC_EMUX_AVAILABLE (1U) /* Defines the availability of external multiplexer support in a +#if ((UC_SERIES == XMC42)||(UC_SERIES == XMC41) || (UC_SERIES == XMC43)) +#define XMC_VADC_GROUP_AVAILABLE (1U) /* Defines the availability of group resource in a device*/ +#define XMC_VADC_GSCAN_AVAILABLE (1U) /* Defines the availability of scan request resource in a device*/ +#define XMC_VADC_QUEUE_AVAILABLE (1U) /* Defines the availability of queue request resource in a device*/ +#define XMC_VADC_EMUX_AVAILABLE (1U) /* Defines the availability of external multiplexer support in a device*/ -#define XMC_VADC_BOUNDARY_AVAILABLE (1U) /* Defines the availability of boundary check support in a device*/ -#define XMC_VADC_MULTIPLE_SLAVEGROUPS (1U) /* Defines the availability of synchronous request source in device*/ -#define XMC_VADC_MAXIMUM_NUM_GROUPS (2U) /* Defines the maximum number of groups available in a device*/ -#define XMC_VADC_BOUNDARY_FLAG_SELECT (1U) /* Defines the availability of boundary flags in a device*/ -#define XMC_VADC_EMUX_CH_SEL_STYLE (1U) /* Defines the external multiplexer channel selection mode of +#define XMC_VADC_BOUNDARY_AVAILABLE (1U) /* Defines the availability of boundary check support in a device*/ +#define XMC_VADC_MULTIPLE_SLAVEGROUPS (1U) /* Defines the availability of synchronous request source in device*/ +#define XMC_VADC_MAXIMUM_NUM_GROUPS (2U) /* Defines the maximum number of groups available in a device*/ +#define XMC_VADC_BOUNDARY_FLAG_SELECT (1U) /* Defines the availability of boundary flags in a device*/ +#define XMC_VADC_EMUX_CH_SEL_STYLE (1U) /* Defines the external multiplexer channel selection mode of operation for a particular device*/ -#define XMC_VADC_SHS_AVAILABLE (0U) /* Defines the availability of sample and hold module*/ -#define XMC_VADC_GROUP_SRCREG_AVAILABLE (1U) /* Define the availability of a source specific result register */ +#define XMC_VADC_SHS_AVAILABLE (0U) /* Defines the availability of sample and hold module*/ +#define XMC_VADC_SHS_FULL_SET_REG (0U) /* Defines the availability of sample and hold module*/ +#define XMC_VADC_GROUP_SRCREG_AVAILABLE (1U) /* Define the availability of a source specific result register */ +#define XMC_VADC_RESULT_PRIORITY_AVAILABLE (0U) /* Define the availability of a priority for result register */ #endif #if (UC_SERIES == XMC44 || UC_SERIES == XMC47 || UC_SERIES == XMC48) @@ -174,7 +212,9 @@ #define XMC_VADC_EMUX_CH_SEL_STYLE (1U) /* Defines the external multiplexer channel selection mode of operation for a particular device*/ #define XMC_VADC_SHS_AVAILABLE (0U) /* Defines the availability of sample and hold module*/ +#define XMC_VADC_SHS_FULL_SET_REG (0U) /* Defines the availability of sample and hold module*/ #define XMC_VADC_GROUP_SRCREG_AVAILABLE (1U) /* Define the availability of a source specific result register */ +#define XMC_VADC_RESULT_PRIORITY_AVAILABLE (0U) /* Define the availability of a priority for result register */ #endif #if (UC_SERIES == XMC45) @@ -190,7 +230,9 @@ #define XMC_VADC_EMUX_CH_SEL_STYLE (0U) /* Defines the external multiplexer channel selection mode of operation for a particular device*/ #define XMC_VADC_SHS_AVAILABLE (0U) /* Defines the availability of sample and hold module*/ +#define XMC_VADC_SHS_FULL_SET_REG (0U) /* Defines the availability of sample and hold module*/ #define XMC_VADC_GROUP_SRCREG_AVAILABLE (0U) /* Define the availability of a source specific result register */ +#define XMC_VADC_RESULT_PRIORITY_AVAILABLE (0U) /* Define the availability of a priority for result register */ #endif #if (UC_SERIES == XMC14 || UC_SERIES == XMC13 || UC_SERIES == XMC12) @@ -206,7 +248,9 @@ #define XMC_VADC_EMUX_CH_SEL_STYLE (1U) /* Defines the external multiplexer channel selection mode of operation for a particular device*/ #define XMC_VADC_SHS_AVAILABLE (1U) /* Defines the availability of sample and hold module*/ +#define XMC_VADC_SHS_FULL_SET_REG (1U) /* Defines the availability of sample and hold module*/ #define XMC_VADC_GROUP_SRCREG_AVAILABLE (1U) /* Define the availability of a source specific result register */ +#define XMC_VADC_RESULT_PRIORITY_AVAILABLE (1U) /* Define the availability of a priority for result register */ #endif #if (UC_SERIES == XMC11) @@ -225,8 +269,10 @@ XMC1100 device for effective working*/ #define XMC_VADC_EMUX_CH_SEL_STYLE (0U) /* Defines the external multiplexer channel selection mode of operation for a particular device*/ -#define XMC_VADC_SHS_AVAILABLE (0U) /* Defines the availability of sample and hold module*/ +#define XMC_VADC_SHS_AVAILABLE (1U) /* Defines the availability of sample and hold module*/ +#define XMC_VADC_SHS_FULL_SET_REG (0U) /* Defines the availability of sample and hold module*/ #define XMC_VADC_GROUP_SRCREG_AVAILABLE (0U) /* Define the availability of a source specific result register */ +#define XMC_VADC_RESULT_PRIORITY_AVAILABLE (0U) /* Define the availability of a priority for result register */ #endif #define XMC_VADC_NUM_PORTS (16U) /* Defines the number of hardware ports that can be configured @@ -652,6 +698,8 @@ typedef enum XMC_VADC_CHANNEL_ALIAS } XMC_VADC_CHANNEL_ALIAS_t; #if(XMC_VADC_SHS_AVAILABLE == 1U) + +#if(XMC_VADC_SHS_FULL_SET_REG == 1U) /** * Defines the gain calibration selection. */ @@ -662,6 +710,7 @@ typedef enum XMC_VADC_SHS_GAIN_LEVEL XMC_VADC_SHS_GAIN_LEVEL_2 = SHS_CALOC0_CALOFFVAL2_Pos, /**< Select the calibration value for gain level 2 */ XMC_VADC_SHS_GAIN_LEVEL_3 = SHS_CALOC0_CALOFFVAL3_Pos /**< Select the calibration value for gain level 3 */ }XMC_VADC_SHS_GAIN_LEVEL_t; +#endif /** * Defines the Delta sigma loop. @@ -698,6 +747,20 @@ typedef enum XMC_VADC_BOUNDARY_NODE XMC_VADC_BOUNDARY_NODE_COMMON_SR_LINE_3 /** 2U) + XMC_VADC_SYNCTR_EVAL_2 = VADC_G_SYNCTR_EVALR2_Msk, /**GLOBEFLAG |= event_type; + global_ptr->GLOBEFLAG = event_type; } /** @@ -1760,7 +1824,7 @@ __STATIC_INLINE void XMC_VADC_GLOBAL_ClearEvent(XMC_VADC_GLOBAL_t *const global_ XMC_ASSERT("XMC_VADC_GLOBAL_ClearEvent:Wrong Global Event", ((XMC_VADC_GLOBAL_EVENT_BKGNDSOURCE == event_type) || (XMC_VADC_GLOBAL_EVENT_RESULT == event_type))) - global_ptr->GLOBEFLAG |= ((uint32_t)(event_type << (uint32_t)16)); + global_ptr->GLOBEFLAG = ((uint32_t)(event_type << (uint32_t)16)); } /** @@ -1813,6 +1877,7 @@ void XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode(XMC_VADC_GLOBAL_t *co */ void XMC_VADC_GLOBAL_SHS_Init(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const XMC_VADC_GLOBAL_SHS_CONFIG_t *config); +#if(XMC_VADC_SHS_FULL_SET_REG == 1U) /** * @param shs_ptr Constant pointer to the VADC Sample and hold module * @param config Struct consisting of various step configurations. @@ -1837,7 +1902,7 @@ void XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode(XMC_VADC_GLOBAL_t *co shs_ptr->STEPCFG = (uint32_t) config->stepcfg; } - +#endif /** * @param shs_ptr Constant pointer to the VADC Sample and hold module @@ -1856,10 +1921,10 @@ void XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode(XMC_VADC_GLOBAL_t *co { XMC_ASSERT("XMC_VADC_GLOBAL_SHS_IsConverterReady:Wrong SHS Pointer",(shs_ptr == (XMC_VADC_GLOBAL_SHS_t*)(void*)SHS0)) - return((bool)((shs_ptr->STEPCFG >> (uint32_t)SHS_SHSCFG_ANRDY_Pos) & (uint32_t)0x1)); + return((bool)((shs_ptr->SHSCFG >> (uint32_t)SHS_SHSCFG_ANRDY_Pos) & (uint32_t)0x1)); } - +#if(XMC_VADC_SHS_FULL_SET_REG == 1U) /** * @param shs_ptr Constant pointer to the VADC Sample and hold module * @param group_num group number for which the accelerated mode needs to be enabled.
Range: [0x0 to 0x1] @@ -1914,7 +1979,7 @@ void XMC_VADC_GLOBAL_SHS_SetShortSampleTime(XMC_VADC_GLOBAL_SHS_t *const shs_ptr XMC_VADC_GROUP_INDEX_t group_num, uint8_t sst_value); - +#endif /** * @param shs_ptr Constant pointer to the VADC Sample and hold module * @param divs_value The clock divider value that is possible @@ -1960,7 +2025,7 @@ void XMC_VADC_GLOBAL_SHS_SetGainFactor(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_GROUP_INDEX_t group_num, uint8_t ch_num); - +#if(XMC_VADC_SHS_FULL_SET_REG == 1U) /** * @param shs_ptr Constant pointer to the VADC Sample and hold module * @param max_calibration_time calibration time @@ -2053,6 +2118,7 @@ void XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t *const XMC_VADC_GROUP_INDEX_t group_num, XMC_VADC_SHS_GAIN_LEVEL_t gain_level, uint8_t offset_calibration_value); +#endif /** * @param shs_ptr Constant pointer to the VADC Sample and hold module @@ -2269,6 +2335,81 @@ void XMC_VADC_GROUP_CheckSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint3 */ void XMC_VADC_GROUP_IgnoreSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group); +/** + * + * @param group_ptr Constant Pointer to the VADC Group waiting for ready signal + * @param eval_waiting_group The VADC Group which expects a ready signal to start it's conversion. + * @param eval_origin_group The VADC Group from which the eval_waiting_group will expect a ready signal + * @return None + * + * \parDescription:
+ * Sets the ready signal in the eval_waiting_group .
\n + * For Synchronized conversion all the slaves participating need to configure the ready signal. + * A slave group will also need to configure the ready signals coming from the other slave groups. + * A call to this API would configure the Sync.slave's EVAL Bits (GxSYNCTR.EVALy). + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
+ */ +void XMC_VADC_GROUP_SetSyncSlaveReadySignal(XMC_VADC_GROUP_t *const group_ptr, + uint32_t eval_waiting_group, + uint32_t eval_origin_group); + +/** + * + * @param group_ptr Constant Pointer to the VADC Group + * @return + * uint32_t EVAL bits for the group + * + * \parDescription:
+ * Get the Eval bits of the group.
\n + * For Synchronized conversion the master's ready signal configuration must be copied onto the slaves. + * A call to this API would return the Sync EVAL Bits (GxSYNCTR.EVALy) which can be used to set in the slaves. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
+ */ +__STATIC_INLINE uint32_t XMC_VADC_GROUP_GetSyncReadySignal(XMC_VADC_GROUP_t *const group_ptr) +{ + uint32_t eval_mask; + XMC_ASSERT("XMC_VADC_GROUP_GetSyncReadySignal:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + +#if (XMC_VADC_MAXIMUM_NUM_GROUPS > 2U) + eval_mask = VADC_G_SYNCTR_EVALR1_Msk | VADC_G_SYNCTR_EVALR2_Msk | VADC_G_SYNCTR_EVALR3_Msk; +#else + eval_mask = VADC_G_SYNCTR_EVALR1_Msk; +#endif + return( group_ptr->SYNCTR & eval_mask); +} + +/** + * @param group_ptr Constant Pointer to the VADC Group + * @param eval_mask mask to configure the eval bits + * Use XMC_VADC_SYNCTR_EVAL_t to create the mask. + * @return None + * + * \parDescription:
+ * Set the Eval bits of the group.
\n + * For Synchronized conversion the master's ready signal configuration must be copied onto the slaves. + * A call to this API would configure the Sync EVAL Bits (GxSYNCTR.EVALy). + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_CheckSlaveReadiness()
XMC_VADC_GROUP_IgnoreSlaveReadiness()
+ */ +__STATIC_INLINE void XMC_VADC_GROUP_SetSyncReadySignal(XMC_VADC_GROUP_t *const group_ptr, uint32_t mask) +{ + uint32_t eval_mask; + XMC_ASSERT("XMC_VADC_GROUP_SetSyncReadySignal:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + +#if (XMC_VADC_MAXIMUM_NUM_GROUPS > 2U) + eval_mask = VADC_G_SYNCTR_EVALR1_Msk | VADC_G_SYNCTR_EVALR2_Msk | VADC_G_SYNCTR_EVALR3_Msk; +#else + eval_mask = VADC_G_SYNCTR_EVALR1_Msk; +#endif + group_ptr->SYNCTR &= ~(eval_mask); + group_ptr->SYNCTR |= mask; +} + /** * * @param group_ptr Constant pointer to the master VADC Group @@ -2439,7 +2580,7 @@ __STATIC_INLINE void XMC_VADC_GROUP_ExternalMuxControlInit(XMC_VADC_GROUP_t *con void XMC_VADC_GROUP_SetBoundaryEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr, const uint8_t boundary_flag_num, const XMC_VADC_BOUNDARY_NODE_t node); -#endif /* XMC_VADC_BOUNDARY_FLAG_SELECT */ +#endif /** * @param group_ptr Constant pointer to the VADC group @@ -2488,7 +2629,7 @@ __STATIC_INLINE XMC_VADC_GROUP_CLASS_t XMC_VADC_GROUP_GetInputClass(XMC_VADC_GRO return (input_value); } -#endif /* XMC_VADC_GROUP_AVAILABLE */ +#endif #if (XMC_VADC_GSCAN_AVAILABLE == 1U) /** @@ -2553,6 +2694,28 @@ __STATIC_INLINE void XMC_VADC_GROUP_ScanDisableArbitrationSlot(XMC_VADC_GROUP_t group_ptr->ARBPR &= ~((uint32_t)VADC_G_ARBPR_ASEN1_Msk); } +/** + * @param group_ptr Constant pointer to the VADC group + * @return + * bool returns true if the arbitration is enabled else returns false. + * + * \parDescription:
+ * Returns the arbitration status of the scan request source.
\n + * If the scan request source must have its conversion request considered by the arbiter, it must participate in + * the arbitration rounds. Even if a load event occurs the scan channel can only be converted when the arbiter comes + * to the scan slot. A call to this API would return the status of the arbitration slot of scan. + * A call to this API would read the register bit field GxARBPR.ASEN1. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_ScanEnableArbitrationSlot(),
XMC_VADC_GROUP_ScanDisableArbitrationSlot()
+ */ +__STATIC_INLINE bool XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled(XMC_VADC_GROUP_t *const group_ptr) +{ + XMC_ASSERT("XMC_VADC_GROUP_ScanIsArbitrationSlotEnabled:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + + return ((group_ptr->ARBPR & (uint32_t)VADC_G_ARBPR_ASEN1_Msk) >> VADC_G_ARBPR_ASEN1_Pos); +} + /** * @param group_ptr Constant pointer to the VADC group * @param trigger_input Choice of the input earmarked as a trigger line @@ -2946,6 +3109,48 @@ __STATIC_INLINE void XMC_VADC_GROUP_ScanDisableExternalTrigger(XMC_VADC_GROUP_t * None. */ void XMC_VADC_GROUP_ScanRemoveChannel(XMC_VADC_GROUP_t *const group_ptr, const uint32_t channel_num); + +/** + * @param group_ptr Constant pointer to the VADC group + * @return + * None + * + * \parDescription:
+ * Enables the scan request source event .
+ * By using this API the request source event will be activated for the scan request source. + * Other configurations w.r.t service node pointer are not done in this API. + * A call to this API would configure the register bit field GxASMR.ENSI. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_ScanDisableEvent(),
XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode()
+ */ +__STATIC_INLINE void XMC_VADC_GROUP_ScanEnableEvent(XMC_VADC_GROUP_t *const group_ptr) +{ + XMC_ASSERT("XMC_VADC_GROUP_ScanEnableEvent:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + + group_ptr->ASMR |= ((uint32_t)VADC_G_ASMR_ENSI_Msk); +} + +/** + * @param group_ptr Constant pointer to the VADC group + * @return + * None + * + * \parDescription:
+ * Disables the scan request source event .
+ * By using this API the request source event will be deactivated for the scan request source. + * Other configurations w.r.t service node pointer are not done in this API. + * A call to this API would configure the register bit field GxASMR.ENSI. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_ScanEnableEvent(),
XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode()
+ */ +__STATIC_INLINE void XMC_VADC_GROUP_ScanDisableEvent(XMC_VADC_GROUP_t *const group_ptr) +{ + XMC_ASSERT("XMC_VADC_GROUP_ScanDisableEvent:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + + group_ptr->ASMR &= ~((uint32_t)VADC_G_ASMR_ENSI_Msk); +} #endif /** @@ -3366,7 +3571,7 @@ __STATIC_INLINE bool XMC_VADC_GLOBAL_BackgroundGetReqSrcEventStatus(XMC_VADC_GLO */ __STATIC_INLINE void XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger(XMC_VADC_GLOBAL_t *const global_ptr) { - XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger:Wrong Group Pointer", (global_ptr == VADC)) + XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger:Wrong Module Pointer", (global_ptr == VADC)) global_ptr->BRSMR |= (uint32_t)VADC_BRSMR_ENTR_Msk; } @@ -3388,11 +3593,53 @@ __STATIC_INLINE void XMC_VADC_GLOBAL_BackgroundEnableExternalTrigger(XMC_VADC_GL */ __STATIC_INLINE void XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger(XMC_VADC_GLOBAL_t *const global_ptr) { - XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger:Wrong Group Pointer", (global_ptr == VADC)) + XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundDisableExternalTrigger:Wrong Module Pointer", (global_ptr == VADC)) global_ptr->BRSMR &= ~((uint32_t)VADC_BRSMR_ENTR_Msk); } +/** + * @param global_ptr Pointer to the VADC module + * @return + * None + * + * \parDescription:
+ * Enables the background scan request source event .
+ * By using this API the request source event will be activated for the background scan request source. + * Other configurations w.r.t service node pointer are not done in this API. + * A call to this API would configure the register bit field BRSMR.ENSI. + * + * \parRelated APIs:
+ * XMC_VADC_GLOBAL_BackgroundEnableEvent(),
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
+ */ +__STATIC_INLINE void XMC_VADC_GLOBAL_BackgroundEnableEvent(XMC_VADC_GLOBAL_t *const global_ptr) +{ + XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundEnableEvent:Wrong Module Pointer", (global_ptr == VADC)) + + global_ptr->BRSMR |= ((uint32_t)VADC_BRSMR_ENSI_Msk); +} + +/** + * @param global_ptr Pointer to the VADC module + * @return + * None + * + * \parDescription:
+ * Disables the background scan request source event .
+ * By using this API the request source event will be deactivated for the background scan request source. + * Other configurations w.r.t service node pointer are not done in this API. + * A call to this API would configure the register bit field BRSMR.ENSI. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_BackgroundEnableEvent(),
XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode()
+ */ +__STATIC_INLINE void XMC_VADC_GLOBAL_BackgroundDisableEvent(XMC_VADC_GLOBAL_t *const global_ptr) +{ + XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundDisableEvent:Wrong Module Pointer", (global_ptr == VADC)) + + global_ptr->BRSMR &= ~((uint32_t)VADC_BRSMR_ENSI_Msk); +} + #if (XMC_VADC_QUEUE_AVAILABLE == 1U) /** * @param group_ptr Pointer to the VADC group @@ -3458,6 +3705,29 @@ __STATIC_INLINE void XMC_VADC_GROUP_QueueDisableArbitrationSlot(XMC_VADC_GROUP_t group_ptr->ARBPR &= ~((uint32_t)VADC_G_ARBPR_ASEN0_Msk); } + +/** + * @param group_ptr Constant pointer to the VADC group + * @return + * bool returns true if the arbitration is enabled else returns false. + * + * \parDescription:
+ * Returns the arbitration status of the queue request source.
\n + * If the queue request source must have its conversion request considered by the arbiter, it must participate in + * the arbitration rounds. Even if a load event occurs the queue channel can only be converted when the arbiter comes + * to the queue slot. A call to this API would return the status of the arbitration slot of queue. + * A call to this API would read the register bit field GxARBPR.ASEN1. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_QueueEnableArbitrationSlot(),
XMC_VADC_GROUP_QueueDisableArbitrationSlot()
+ */ +__STATIC_INLINE bool XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled(XMC_VADC_GROUP_t *const group_ptr) +{ + XMC_ASSERT("XMC_VADC_GROUP_QueueIsArbitrationSlotEnabled:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + + return ((group_ptr->ARBPR & (uint32_t)VADC_G_ARBPR_ASEN0_Msk) >> VADC_G_ARBPR_ASEN0_Pos); +} + /** * @param group_ptr Constant pointer to the VADC group * @param input_num Choice of the input earmarked as a trigger line @@ -3756,7 +4026,7 @@ __STATIC_INLINE void XMC_VADC_GROUP_QueueTriggerReqSrcEvent(XMC_VADC_GROUP_t *co __STATIC_INLINE void XMC_VADC_GROUP_QueueClearReqSrcEvent(XMC_VADC_GROUP_t *const group_ptr) { XMC_ASSERT("XMC_VADC_GROUP_QueueClearReqSrcEvent:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) - group_ptr->SEFCLR |= (uint32_t)VADC_G_SEFCLR_SEV0_Msk; + group_ptr->SEFCLR = (uint32_t)VADC_G_SEFCLR_SEV0_Msk; } /** @@ -4072,6 +4342,25 @@ uint8_t XMC_VADC_GROUP_ChannelGetResultRegister(XMC_VADC_GROUP_t *const group_pt */ void XMC_VADC_GROUP_ChannelTriggerEvent(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num); +/** + * @param group_ptr Constant pointer to the VADC group + * @return + * uint32_t returns the asserted channel events + * + * \parDescription:
+ * Returns the Channel event flag register.
\n + * The return is merely the channel events which are asserted. + * A call to this API would read the register bit fields of GxCEFLAG. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_ChannelClearEvent(). + */ +__STATIC_INLINE uint32_t XMC_VADC_GROUP_ChannelGetAssertedEvents(XMC_VADC_GROUP_t *const group_ptr) +{ + XMC_ASSERT("XMC_VADC_GROUP_ChannelGetAssertedEvents:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + return(group_ptr->CEFLAG); +} + /** * @param group_ptr Constant pointer to the VADC group * @param ch_num Channel whose channel event is to be acknowledged @@ -4093,7 +4382,7 @@ __STATIC_INLINE void XMC_VADC_GROUP_ChannelClearEvent(XMC_VADC_GROUP_t *const gr XMC_ASSERT("XMC_VADC_GROUP_ChannelClearEvent:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) XMC_ASSERT("XMC_VADC_GROUP_ChannelClearEvent:Wrong Channel Number", ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP)) - group_ptr->CEFCLR |= (uint32_t)((uint32_t)1 << ch_num); + group_ptr->CEFCLR = (uint32_t)((uint32_t)1 << ch_num); } /** @@ -4404,6 +4693,25 @@ __STATIC_INLINE void XMC_VADC_GROUP_TriggerResultEvent(XMC_VADC_GROUP_t *const g group_ptr->REFLAG = (uint32_t)((uint32_t)1 << res_reg); } +/** + * @param group_ptr Constant pointer to the VADC group + * @return + * uint32_t returns the asserted result events + * + * \parDescription:
+ * Returns the Result event flag register.
\n + * The return is merely the result events which are asserted. + * A call to this API would read the register bit fields of GxREFLAG. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_TriggerResultEvent(). + */ +__STATIC_INLINE uint32_t XMC_VADC_GROUP_GetAssertedResultEvents(XMC_VADC_GROUP_t *const group_ptr) +{ + XMC_ASSERT("XMC_VADC_GROUP_GetAssertedResultEvents:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + return(group_ptr->REFLAG); +} + /** * @param group_ptr Constant pointer to the VADC group * @param res_reg Result Register for which the result event is being acknowledged @@ -4529,6 +4837,50 @@ __STATIC_INLINE bool XMC_VADC_GROUP_IsResultRegisterInFifo(XMC_VADC_GROUP_t *con ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS)) return( (bool)(group_ptr->RCR[res_reg] & (uint32_t)VADC_G_RCR_FEN_Msk)); } + +#if XMC_VADC_RESULT_PRIORITY_AVAILABLE == 1U +/** + * @param group_ptr Constant pointer to the VADC group + * @param res_reg Result Registers which need to be set for priority conversions + * Bit location 0..15 represents Result Register-0..15 respectively. + * To add the result register as priority. + * Passing a 0x0 will clear all the selected channels + *
Range: [0x0 to 0xFFFF] + * @return + * None + * + * \parDescription:
+ * Prioritize a Result register for group conversions.
\n + * Applications that need to reserve certain result registers only for Queue and scan request sources should + * use this API. A call to this API would access the register bit fields of GxRRASS. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_GetResultRegPriority(). + */ +__STATIC_INLINE void XMC_VADC_GROUP_SetResultRegPriority(XMC_VADC_GROUP_t *const group_ptr, const uint32_t res_mask) +{ + XMC_ASSERT("XMC_VADC_GROUP_SetResultRegPriority:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + group_ptr->RRASS = (uint32_t)res_mask; +} + +/** + * @param group_ptr Constant pointer to the VADC group + * @return + * None + * + * \parDescription:
+ * Get the priority of all Result register.
\n + * A call to this API would access the register bit fields of GxRRASS. + * + * \parRelated APIs:
+ * XMC_VADC_GROUP_SetResultRegPriority(). + */ +__STATIC_INLINE uint32_t XMC_VADC_GROUP_GetResultRegPriority(XMC_VADC_GROUP_t *const group_ptr) +{ + XMC_ASSERT("XMC_VADC_GROUP_GetResultRegPriority:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + return(group_ptr->RRASS); +} +#endif #endif #ifdef __cplusplus @@ -4544,4 +4896,4 @@ __STATIC_INLINE bool XMC_VADC_GROUP_IsResultRegisterInFifo(XMC_VADC_GROUP_t *con */ -#endif /* XMC_VADC_H */ +#endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc_map.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc_map.h index aa2219f4..074e3dcb 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc_map.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_vadc_map.h @@ -1,12 +1,12 @@ /** * @file xmc_vadc_map.h - * @date 2015-10-27 + * @date 2015-12-01 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -39,6 +39,13 @@ * 2015-02-15: * - Initial version * + * 2015-12-01: + * - Added: + * - XMC4300 device supported + * + * - Fixed: + * - Wrong MACRO name corrected for XMC4200/4100 devices. + * XMC_VADC_G3_SAMPLE renamed to XMC_VADC_G1_SAMPLE * @endcond * */ @@ -56,23 +63,23 @@ extern "C" { * MACROS *********************************************************************************************************************/ /* Group request source Gating input connection mappings */ -#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A -#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B -#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C -#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D -#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K -#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L -#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O -#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P +#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A +#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B +#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C +#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D +#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K +#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L +#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O +#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P /* Group request source Trigger input connection mappings */ -#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A -#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B -#define XMC_ERU_0_IOUT2 XMC_VADC_REQ_TR_G -#define XMC_ERU_0_IOUT3 XMC_VADC_REQ_TR_H -#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M -#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N -#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P +#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A +#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B +#define XMC_ERU_0_IOUT2 XMC_VADC_REQ_TR_G +#define XMC_ERU_0_IOUT3 XMC_VADC_REQ_TR_H +#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M +#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N +#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P #endif @@ -80,57 +87,57 @@ extern "C" { #if (UC_SERIES == XMC12) /* Group request source Gating input connection mappings */ -#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A -#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B -#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C -#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D -#define XMC_LEDTS_0_FN XMC_VADC_REQ_GT_I -#define XMC_LEDTS_1_FN XMC_VADC_REQ_GT_J -#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K -#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L -#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O -#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P +#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A +#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B +#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C +#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D +#define XMC_LEDTS_0_FN XMC_VADC_REQ_GT_I +#define XMC_LEDTS_1_FN XMC_VADC_REQ_GT_J +#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K +#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L +#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O +#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P /* Group request source Trigger input connection mappings */ -#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A -#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B +#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A +#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B #define XMC_BCCU0_TRIGOUT XMC_VADC_REQ_TR_F #define XMC_ERU_0_IOUT2 XMC_VADC_REQ_TR_G #define XMC_ERU_0_IOUT3 XMC_VADC_REQ_TR_H -#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M -#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N -#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P +#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M +#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N +#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P #endif #if (UC_SERIES == XMC13) /* Group request source Gating input connection mappings */ -#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A -#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B -#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C -#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D -#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E -#define XMC_CCU_81_ST3 XMC_VADC_REQ_GT_F -#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K -#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L -#define XMC_CCU_80_ST0 XMC_VADC_REQ_GT_M -#define XMC_CCU_80_ST1 XMC_VADC_REQ_GT_N -#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O -#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P +#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A +#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B +#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C +#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D +#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E +#define XMC_CCU_81_ST3 XMC_VADC_REQ_GT_F +#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K +#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L +#define XMC_CCU_80_ST0 XMC_VADC_REQ_GT_M +#define XMC_CCU_80_ST1 XMC_VADC_REQ_GT_N +#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O +#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P /* Group request source Trigger input connection mappings */ -#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A -#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B +#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A +#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B #define XMC_BCCU0_TRIGOUT XMC_VADC_REQ_TR_F #define XMC_ERU_0_IOUT2 XMC_VADC_REQ_TR_G #define XMC_ERU_0_IOUT3 XMC_VADC_REQ_TR_H -#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I -#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J -#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M -#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N -#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O -#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P +#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I +#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J +#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M +#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N +#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O +#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P #endif @@ -138,163 +145,168 @@ extern "C" { #if (UC_SERIES == XMC14) /* Group request source Gating input connection mappings */ -#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A -#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B -#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C -#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D -#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E -#define XMC_CCU_81_ST3 XMC_VADC_REQ_GT_F -#define XMC_LEDTS0_FN XMC_VADC_REQ_GT_I -#define XMC_LEDTS1_FN XMC_VADC_REQ_GT_J -#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K -#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L -#define XMC_CCU_80_ST0 XMC_VADC_REQ_GT_M -#define XMC_CCU_80_ST1 XMC_VADC_REQ_GT_N -#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O -#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P +#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A +#define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B +#define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C +#define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D +#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E +#define XMC_CCU_81_ST3 XMC_VADC_REQ_GT_F +#define XMC_LEDTS0_FN XMC_VADC_REQ_GT_I +#define XMC_LEDTS1_FN XMC_VADC_REQ_GT_J +#define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K +#define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L +#define XMC_CCU_80_ST0 XMC_VADC_REQ_GT_M +#define XMC_CCU_80_ST1 XMC_VADC_REQ_GT_N +#define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O +#define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P /* Group request source Trigger input connection mappings */ -#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A -#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B +#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A +#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B #define XMC_BCCU0_TRIGOUT XMC_VADC_REQ_TR_F #define XMC_ERU_0_IOUT2 XMC_VADC_REQ_TR_G #define XMC_ERU_0_IOUT3 XMC_VADC_REQ_TR_H -#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I -#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J -#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M -#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N -#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O -#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P +#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I +#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J +#define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M +#define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N +#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O +#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P #endif -#if ( (UC_SERIES == XMC42)||(UC_SERIES == XMC41) ) +#if ( (UC_SERIES == XMC42)||(UC_SERIES == XMC41) || (UC_SERIES == XMC43) ) /* Group request source Gating input connection mappings */ -#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A -#define XMC_CCU_41_ST2 XMC_VADC_REQ_GT_B -#define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C -#define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D -#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E -#define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F -#define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I -#define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I -#define XMC_LEDTS_FN XMC_VADC_REQ_GT_J -#define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_VADC_G3_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M -#define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N -#define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O -#define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P +#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A +#define XMC_CCU_41_ST2 XMC_VADC_REQ_GT_B +#define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C +#define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D +#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E +#define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F +#define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I +#define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I +#define XMC_LEDTS_FN XMC_VADC_REQ_GT_J +#define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_VADC_G1_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M +#define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N +#define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O +#define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P /* Group request source Trigger input connection mappings */ -#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A -#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B -#define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C -#define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D -#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I -#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J -#define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M -#define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N -#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O -#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P +#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A +#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B +#define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C +#define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D +#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I +#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J +#define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M +#define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N +#if (UC_SERIES == XMC43) +#define XMC_ERU_1_IOUT2 XMC_VADC_REQ_TR_N +#endif +#if (UC_SERIES != XMC43) +#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O +#endif +#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P #endif #if ( UC_SERIES == XMC44 ) || ( UC_SERIES == XMC48) /* Group request source Gating input connection mappings */ -#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A -#define XMC_CCU_41_ST2 XMC_VADC_REQ_GT_B -#define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C -#define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D -#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E -#define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F -#define XMC_CCU_81_ST3_A XMC_VADC_REQ_GT_G -#define XMC_CCU_81_ST3_B XMC_VADC_REQ_GT_H -#define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I -#define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I -#define XMC_LEDTS_FN XMC_VADC_REQ_GT_J -#define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G2_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G3_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_VADC_G1_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_VADC_G2_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_VADC_G3_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M -#define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N -#define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O -#define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P +#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A +#define XMC_CCU_41_ST2 XMC_VADC_REQ_GT_B +#define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C +#define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D +#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E +#define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F +#define XMC_CCU_81_ST3_A XMC_VADC_REQ_GT_G +#define XMC_CCU_81_ST3_B XMC_VADC_REQ_GT_H +#define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I +#define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I +#define XMC_LEDTS_FN XMC_VADC_REQ_GT_J +#define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G2_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G3_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_VADC_G1_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_VADC_G2_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_VADC_G3_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M +#define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N +#define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O +#define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P /* Group request source Trigger input connection mappings */ -#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A -#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B -#define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C -#define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D -#define XMC_CCU_42_SR3 XMC_VADC_REQ_TR_E +#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A +#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B +#define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C +#define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D +#define XMC_CCU_42_SR3 XMC_VADC_REQ_TR_E #define XMC_CCU_43_SR3 XMC_VADC_REQ_TR_F -#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I -#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J -#define XMC_CCU_81_SR2 XMC_VADC_REQ_TR_K -#define XMC_CCU_81_SR3 XMC_VADC_REQ_TR_L -#define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M -#define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N -#define XMC_ERU_1_IOUT2 XMC_VADC_REQ_TR_N -#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O -#define XMC_POSIF_1_SR1 XMC_VADC_REQ_TR_O -#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P +#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I +#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J +#define XMC_CCU_81_SR2 XMC_VADC_REQ_TR_K +#define XMC_CCU_81_SR3 XMC_VADC_REQ_TR_L +#define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M +#define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N +#define XMC_ERU_1_IOUT2 XMC_VADC_REQ_TR_N +#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O +#define XMC_POSIF_1_SR1 XMC_VADC_REQ_TR_O +#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P #endif #if ( UC_SERIES == XMC45 ) /* Group request source Gating input connection mappings */ -#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A -#define XMC_CCU_41_ST2 XMC_VADC_REQ_GT_B -#define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C -#define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D -#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E -#define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F -#define XMC_CCU_81_ST3_A XMC_VADC_REQ_GT_G -#define XMC_CCU_81_ST3_B XMC_VADC_REQ_GT_H -#define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I -#define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I -#define XMC_LEDTS_FN XMC_VADC_REQ_GT_J -#define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G2_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G3_BLOUT0 XMC_VADC_REQ_GT_K -#define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_VADC_G1_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_VADC_G2_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_VADC_G3_SAMPLE XMC_VADC_REQ_GT_L -#define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M -#define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N -#define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O -#define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P +#define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A +#define XMC_CCU_41_ST2 XMC_VADC_REQ_GT_B +#define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C +#define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D +#define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E +#define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F +#define XMC_CCU_81_ST3_A XMC_VADC_REQ_GT_G +#define XMC_CCU_81_ST3_B XMC_VADC_REQ_GT_H +#define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I +#define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I +#define XMC_LEDTS_FN XMC_VADC_REQ_GT_J +#define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G2_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G3_BLOUT0 XMC_VADC_REQ_GT_K +#define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_VADC_G1_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_VADC_G2_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_VADC_G3_SAMPLE XMC_VADC_REQ_GT_L +#define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M +#define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N +#define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O +#define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P /* Group request source Trigger input connection mappings */ -#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A -#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B -#define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C -#define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D -#define XMC_CCU_42_SR3 XMC_VADC_REQ_TR_E +#define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A +#define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B +#define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C +#define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D +#define XMC_CCU_42_SR3 XMC_VADC_REQ_TR_E #define XMC_CCU_43_SR3 XMC_VADC_REQ_TR_F -#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I -#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J -#define XMC_CCU_81_SR2 XMC_VADC_REQ_TR_K -#define XMC_CCU_81_SR3 XMC_VADC_REQ_TR_L -#define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M -#define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N -#define XMC_ERU_1_IOUT2 XMC_VADC_REQ_TR_N -#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O -#define XMC_POSIF_1_SR1 XMC_VADC_REQ_TR_O -#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P +#define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I +#define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J +#define XMC_CCU_81_SR2 XMC_VADC_REQ_TR_K +#define XMC_CCU_81_SR3 XMC_VADC_REQ_TR_L +#define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M +#define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N +#define XMC_ERU_1_IOUT2 XMC_VADC_REQ_TR_N +#define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O +#define XMC_POSIF_1_SR1 XMC_VADC_REQ_TR_O +#define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P #endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_wdt.h b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_wdt.h index 92947168..856178c5 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_wdt.h +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/inc/xmc_wdt.h @@ -1,12 +1,12 @@ /** * @file xmc_wdt.h - * @date 2015-10-27 + * @date 2015-08-06 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_eru.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_eru.c index 82a1fe3e..efd5590e 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_eru.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_eru.c @@ -1,12 +1,12 @@ /** * @file xmc4_eru.c - * @date 2015-10-27 + * @date 2015-02-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_flash.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_flash.c index a3f181b8..4dbd005b 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_flash.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_flash.c @@ -1,12 +1,12 @@ /** * @file xmc4_flash.c - * @date 2015-10-27 + * @date 2016-01-08 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -49,6 +49,17 @@ * 3. XMC_FLASH_EraseUCB * 4. XMC_FLASH_ResumeProtection * 5. XMC_FLASH_RepairPhysicalSector + * + * 2016-01-08: + * - Wait until operation is finished for the next functions: + * 1. XMC_FLASH_InstallProtection + * 2. XMC_FLASH_ConfirmProtection + * 3. XMC_FLASH_ProgramPage + * 4. XMC_FLASH_EraseSector + * 5. XMC_FLASH_ErasePhysicalSector + * 6. XMC_FLASH_EraseUCB + * - Fix XMC_FLASH_VerifyReadProtection and XMC_FLASH_VerifyWriteProtection + * * @endcond * */ @@ -63,13 +74,23 @@ #define XMC_FLASH_PROTECTION_CONFIGURATION_WORDS (8UL) /* Used to upadte the assembly buffer during protection configuration */ -#define XMC_FLASH_PROTECTION_CONFIRMATION_OFFSET (512UL) /* Offset address for UCB page */ -#define XMC_FLASH_PROTECTION_CONFIRMATION_WORDS (4UL) -#define XMC_FLASH_PROTECTION_CONFIRMATION_CODE (0x8AFE15C3UL) +#define XMC_FLASH_PROT_CONFIRM_OFFSET (512UL) /* Offset address for UCB page */ +#define XMC_FLASH_PROT_CONFIRM_WORDS (4UL) +#define XMC_FLASH_PROT_CONFIRM_CODE (0x8AFE15C3UL) /********************************************************************************************************************* * LOCAL FUNCTIONS ********************************************************************************************************************/ +void XMC_FLASH_lEnterPageModeCommand(void); +void XMC_FLASH_lLoadPageCommand(uint32_t low_word, uint32_t high_word); +void XMC_FLASH_lWritePageCommand(uint32_t *page_start_address); +void XMC_FLASH_lWriteUCBPageCommand(uint32_t *page_start_address); +void XMC_FLASH_lEraseSectorCommand(uint32_t *sector_start_address); +void XMC_FLASH_lDisableSectorWriteProtectionCommand(uint32_t user, uint32_t password_0, uint32_t password_1); +void XMC_FLASH_lDisableReadProtectionCommand(uint32_t password_0, uint32_t password_1); +void XMC_FLASH_lRepairPhysicalSectorCommand(void); +void XMC_FLASH_lErasePhysicalSectorCommand(uint32_t *sector_start_address); +void XMC_FLASH_lClearStatusCommand(void); /* * Command to program the PFLASH in to page mode, so that assembly buffer is used @@ -79,7 +100,7 @@ void XMC_FLASH_lEnterPageModeCommand(void) volatile uint32_t *address; address = (uint32_t *)(XMC_FLASH_UNCACHED_BASE + 0x5554U); - *address = 0x50; + *address = (uint32_t)0x50U; } /* @@ -247,17 +268,20 @@ void XMC_FLASH_DisableEvent(const uint32_t event_msk) */ void XMC_FLASH_ProgramPage(uint32_t *address, const uint32_t *data) { - uint32_t index; + uint32_t idx; XMC_FLASH_lClearStatusCommand(); XMC_FLASH_lEnterPageModeCommand(); - for (index = 0; index < XMC_FLASH_WORDS_PER_PAGE; index += 2) + for (idx = 0U; idx < XMC_FLASH_WORDS_PER_PAGE; idx += 2U) { - XMC_FLASH_lLoadPageCommand(data[index], data[index + 1]); + XMC_FLASH_lLoadPageCommand(data[idx], data[idx + 1U]); } XMC_FLASH_lWritePageCommand(address); + + /* wait until the operation is completed */ + while ((FLASH0->FSR & (uint32_t)FLASH_FSR_PBUSY_Msk) != 0U){} } /* @@ -267,6 +291,9 @@ void XMC_FLASH_EraseSector(uint32_t *address) { XMC_FLASH_lClearStatusCommand(); XMC_FLASH_lEraseSectorCommand(address); + + /* wait until the operation is completed */ + while ((FLASH0->FSR & (uint32_t)FLASH_FSR_PBUSY_Msk) != 0U){} } /* @@ -319,6 +346,9 @@ void XMC_FLASH_ErasePhysicalSector(uint32_t *address) { XMC_FLASH_lClearStatusCommand(); XMC_FLASH_lErasePhysicalSectorCommand(address); + + /* wait until the operation is completed */ + while ((FLASH0->FSR & (uint32_t)FLASH_FSR_PBUSY_Msk) != 0U){} } /* @@ -349,6 +379,9 @@ void XMC_FLASH_EraseUCB(uint32_t *ucb_sector_start_address) *address = 0x55U; address = ucb_sector_start_address; *address = 0xc0U; + + /* wait until the operation is completed */ + while ((FLASH0->FSR & (uint32_t)FLASH_FSR_PBUSY_Msk) != 0U){} } /* @@ -370,9 +403,9 @@ void XMC_FLASH_InstallProtection(uint8_t user, uint32_t password_0, uint32_t password_1) { - uint32_t index; + uint32_t idx; - XMC_ASSERT(" XMC_FLASH_ConfigureProtection: User level out of range", (user < 3U)); + XMC_ASSERT(" XMC_FLASH_ConfigureProtection: User level out of range", (user < 3U)) XMC_FLASH_lEnterPageModeCommand(); @@ -381,12 +414,15 @@ void XMC_FLASH_InstallProtection(uint8_t user, XMC_FLASH_lLoadPageCommand(password_0, password_1); XMC_FLASH_lLoadPageCommand(password_0, password_1); - for (index = 0; index < (XMC_FLASH_WORDS_PER_PAGE - XMC_FLASH_PROTECTION_CONFIGURATION_WORDS); index += 2) + for (idx = 0U; idx < (XMC_FLASH_WORDS_PER_PAGE - XMC_FLASH_PROTECTION_CONFIGURATION_WORDS); idx += 2U) { XMC_FLASH_lLoadPageCommand(0UL, 0UL); } XMC_FLASH_lWriteUCBPageCommand((uint32_t *)((uint32_t)XMC_FLASH_UCB0 + (user * XMC_FLASH_BYTES_PER_UCB))); + + /* wait until the operation is completed */ + while ((FLASH0->FSR & (uint32_t)FLASH_FSR_PBUSY_Msk) != 0U){} } /* @@ -394,23 +430,26 @@ void XMC_FLASH_InstallProtection(uint8_t user, */ void XMC_FLASH_ConfirmProtection(uint8_t user) { - uint32_t index; + uint32_t idx; - XMC_ASSERT(" XMC_FLASH_ConfirmProtection: User level out of range", (user < 3U)); + XMC_ASSERT(" XMC_FLASH_ConfirmProtection: User level out of range", (user < 3U)) XMC_FLASH_lEnterPageModeCommand(); - XMC_FLASH_lLoadPageCommand(XMC_FLASH_PROTECTION_CONFIRMATION_CODE, 0U); - XMC_FLASH_lLoadPageCommand(XMC_FLASH_PROTECTION_CONFIRMATION_CODE, 0U); + XMC_FLASH_lLoadPageCommand(XMC_FLASH_PROT_CONFIRM_CODE, 0U); + XMC_FLASH_lLoadPageCommand(XMC_FLASH_PROT_CONFIRM_CODE, 0U); /* Fill the rest of page buffer with zeros*/ - for (index = 0UL; index < (XMC_FLASH_WORDS_PER_PAGE - XMC_FLASH_PROTECTION_CONFIRMATION_WORDS); index += 2) + for (idx = 0UL; idx < (XMC_FLASH_WORDS_PER_PAGE - XMC_FLASH_PROT_CONFIRM_WORDS); idx += 2U) { XMC_FLASH_lLoadPageCommand(0UL, 0UL); } XMC_FLASH_lWriteUCBPageCommand((uint32_t *)((uint32_t)XMC_FLASH_UCB0 + - (user * XMC_FLASH_BYTES_PER_UCB) + XMC_FLASH_PROTECTION_CONFIRMATION_OFFSET)); + (user * XMC_FLASH_BYTES_PER_UCB) + XMC_FLASH_PROT_CONFIRM_OFFSET)); + + /* wait until the operation is completed */ + while ((FLASH0->FSR & (uint32_t)FLASH_FSR_PBUSY_Msk) != 0U){} } /* @@ -418,11 +457,18 @@ void XMC_FLASH_ConfirmProtection(uint8_t user) */ bool XMC_FLASH_VerifyReadProtection(uint32_t password_0, uint32_t password_1) { - XMC_FLASH_lClearStatusCommand(); - XMC_FLASH_lDisableReadProtectionCommand(password_0, password_1); + bool status = false; + + /* Check if read protection is installed */ + if ((XMC_FLASH_GetStatus() & (uint32_t)XMC_FLASH_STATUS_READ_PROTECTION_INSTALLED) != 0U) + { + XMC_FLASH_lClearStatusCommand(); + XMC_FLASH_lDisableReadProtectionCommand(password_0, password_1); - return (bool)((XMC_FLASH_GetStatus() & XMC_FLASH_STATUS_READ_PROTECTION_INSTALLED) && - (FLASH0->PROCON0 & XMC_FLASH_PROTECTION_READ_GLOBAL)); + status = (bool)(XMC_FLASH_GetStatus() & (uint32_t)XMC_FLASH_STATUS_READ_PROTECTION_DISABLED_STATE); + } + + return status; } /* @@ -434,17 +480,22 @@ bool XMC_FLASH_VerifyWriteProtection(uint32_t user, uint32_t password_0, uint32_t password_1) { - uint32_t *flash_procon_ptr; + bool status = false; + uint32_t *flash_procon_ptr = (uint32_t *)(void*)(&(FLASH0->PROCON0) + user); - XMC_ASSERT(" XMC_FLASH_VerifyWriteProtection: User level out of range", (user < 3U)); + XMC_ASSERT(" XMC_FLASH_VerifyWriteProtection: User level out of range", (user < 2U)) - flash_procon_ptr = (uint32_t *)(&(FLASH0->PROCON0) + user); + /* Check if write protection for selected user is installed */ + if ((XMC_FLASH_GetStatus() & (uint32_t)((uint32_t)1U << (uint32_t)((uint32_t)FLASH_FSR_WPROIN0_Pos + user))) != 0U) + { + XMC_FLASH_lClearStatusCommand(); + XMC_FLASH_lDisableSectorWriteProtectionCommand(user, password_0, password_1); + + status = (bool)((XMC_FLASH_GetStatus() & (uint32_t)((uint32_t)1U << (uint32_t)((uint32_t)FLASH_FSR_WPRODIS0_Pos + user)))) && + (*flash_procon_ptr == (protection_mask & (uint32_t)(~(uint32_t)XMC_FLASH_PROTECTION_READ_GLOBAL))); + } - XMC_FLASH_lClearStatusCommand(); - XMC_FLASH_lDisableSectorWriteProtectionCommand(user, password_0, password_1); - - return (bool)((XMC_FLASH_GetStatus() & (1U << (FLASH_FSR_WPRODIS0_Pos + user))) && - (*flash_procon_ptr == (protection_mask & ~XMC_FLASH_PROTECTION_READ_GLOBAL))); + return status; } /* diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_gpio.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_gpio.c index 2d825083..4d686761 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_gpio.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_gpio.c @@ -1,12 +1,12 @@ /** * @file xmc4_gpio.c - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_rtc.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_rtc.c index 2d4fbc34..94383a98 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_rtc.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_rtc.c @@ -1,12 +1,12 @@ /** * @file xmc4_rtc.c - * @date 2015-10-27 + * @date 2016-03-09 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -39,6 +39,9 @@ * 2015-02-20: * - Initial
* + * 2016-03-09: + * - Optimize write only registers + * * @endcond * */ @@ -161,7 +164,7 @@ void XMC_RTC_ClearEvent(const uint32_t event) { /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ } - RTC->CLRSR |= event; + RTC->CLRSR = event; } #endif /* UC_FAMILY == XMC4 */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_scu.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_scu.c index e6924c29..19439157 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_scu.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc4_scu.c @@ -1,12 +1,12 @@ /** * @file xmc4_scu.c - * @date 2015-10-27 + * @date 2016-06-15 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -48,6 +48,43 @@ * - XMC_SCU_INTERRUPT_TriggerEvent,XMC_SCU_INTERUPT_GetEventStatus, * - XMC_SCU_INTERRUPT_ClearEventStatus are added * - Added Weak implementation for OSCHP_GetFrequency() + * + * 2015-11-30: + * - Documentation improved
+ * - Following API functionalities are improved + * XMC_SCU_CLOCK_GatePeripheralClock, XMC_SCU_CLOCK_UngatePeripheralClock, XMC_SCU_CLOCK_IsPeripheralClockGated + * XMC_SCU_RESET_AssertPeripheralReset, XMC_SCU_RESET_DeassertPeripheralReset, XMC_SCU_RESET_IsPeripheralResetAsserted + * + * 2015-12-08: + * - XMC_SCU_GetTemperature renamed to XMC_SCU_GetTemperatureMeasurement + * + * 2016-03-09: + * - Optimize write only registers + * - Added XMC_SCU_HIB_SetPinMode + * - Added XMC_SCU_HIB_GetHibernateControlStatus, + * XMC_SCU_HIB_GetEventStatus, XMC_SCU_HIB_ClearEventStatus, XMC_SCU_HIB_TriggerEvent, + * XMC_SCU_HIB_EnableEvent, XMC_SCU_HIB_DisableEvent + * - Added XMC_SCU_HIB_SetWakeupTriggerInput, XMC_SCU_HIB_SetPinMode, XMC_SCU_HIB_SetOutputPinLevel, + * XMC_SCU_HIB_SetInput0, XMC_SCU_HIB_EnterHibernateState + * + * 2016-04-06: + * - Fixed XMC_SCU_ReadFromRetentionMemory functionality + * + * 2016-05-19: + * - Changed XMC_SCU_CLOCK_StartSystemPll to avoid using floating point calculation which might have an impact on interrupt latency if ISR uses also the FPU + * - Added XMC_SCU_CLOCK_IsLowPowerOscillatorStable() and XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable() + * - Added XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput(), + * XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput(), + * XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus() + * - Added XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput(), + * XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput(), + * XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus() + * + * 2016-06-15: + * - Added XMC_SCU_HIB_EnterHibernateStateEx() which allows to select between external or internal hibernate mode. This last mode only available in XMC44, XMC42 and XMC41 series. + * - Extended wakeup hibernate events using LPAC wakeup on events. Only available in XMC44, XMC42 and XMC41 series + * - Added LPAC APIs. Only available in XMC44, XMC42 and XMC41 series. + * * @endcond * */ @@ -85,24 +122,25 @@ /********************************************************************************************************************* * MACROS ********************************************************************************************************************/ -#define FOSCREF (2500000UL) -#define FREQ_1MHZ (1000000UL) +#define FOSCREF (2500000UL) /**< Oscillator reference frequency (fOSCREF) monitored by Oscillator watchdog */ +#define FREQ_1MHZ (1000000UL) /**< Used during calculation. */ #ifndef OFI_FREQUENCY -#define OFI_FREQUENCY (24000000UL) +#define OFI_FREQUENCY (24000000UL) /**< Fast internal backup clock source. */ #endif #ifndef OSI_FREQUENCY -#define OSI_FREQUENCY (32768UL) +#define OSI_FREQUENCY (32768UL) /**< Internal slow clock source. */ #endif #ifndef OSCHP_FREQUENCY -#define OSCHP_FREQUENCY (12000000U) +#define OSCHP_FREQUENCY (12000000U) /**< External crystal High Precision Oscillator. */ #endif #define XMC_SCU_PLL_PLLSTAT_OSC_USABLE (SCU_PLL_PLLSTAT_PLLHV_Msk | \ SCU_PLL_PLLSTAT_PLLLV_Msk | \ - SCU_PLL_PLLSTAT_PLLSP_Msk) + SCU_PLL_PLLSTAT_PLLSP_Msk) /**< Used to verify the OSC frequency is + usable or not.*/ #define XMC_SCU_ORC_ADC_START_GROUP (0UL) /**< The ADC group whose channel input is compared by Out of Range Comparator (ORC) to serves the purpose of overvoltage monitoring @@ -133,29 +171,40 @@ within specified ADC start and end channel number or not. */ -#define XMC_SCU_INTERRUPT_EVENT_MAX (32U) +#define XMC_SCU_INTERRUPT_EVENT_MAX (32U) /**< Maximum supported SCU events. */ + +#define SCU_HIBERNATE_HDCR_HIBIOSEL_Size (4U) + +#define SCU_HIBERNATE_OSCULCTRL_MODE_OSC_POWER_DOWN (0x2U) + +#define XMC_SCU_POWER_LSB13V (0.0058F) +#define XMC_SCU_POWER_LSB33V (0.0225F) /********************************************************************************************************************* * LOCAL DATA ********************************************************************************************************************/ -XMC_SCU_INTERRUPT_EVENT_HANDLER_t event_handler_list[XMC_SCU_INTERRUPT_EVENT_MAX]; +XMC_SCU_INTERRUPT_EVENT_HANDLER_t event_handler_list[XMC_SCU_INTERRUPT_EVENT_MAX]; /**< For registering callback + functions on SCU event + occurrence. */ /********************************************************************************************************************* * LOCAL ROUTINES ********************************************************************************************************************/ #if defined(UC_ID) +/* This is a non-weak function, which retrieves high precision external oscillator frequency. */ __WEAK uint32_t OSCHP_GetFrequency(void) { return (OSCHP_FREQUENCY); } #endif +/* This is a local function used to generate the delay until register get updated with new configured value. */ static void XMC_SCU_lDelay(uint32_t cycles); /********************************************************************************************************************* * API IMPLEMENTATION ********************************************************************************************************************/ - +/* This is a local function used to generate the delay until register get updated with new configured value. */ void XMC_SCU_lDelay(uint32_t delay) { uint32_t i; @@ -196,7 +245,7 @@ XMC_SCU_INTERRUPT_EVENT_t XMC_SCU_INTERUPT_GetEventStatus(void) /* API to clear the SCU event status */ void XMC_SCU_INTERRUPT_ClearEventStatus(const XMC_SCU_INTERRUPT_EVENT_t event) { - SCU_INTERRUPT->SRCLR |= (uint32_t)event; + SCU_INTERRUPT->SRCLR = (uint32_t)event; } @@ -250,22 +299,25 @@ void XMC_SCU_CalibrateTemperatureSensor(uint32_t offset, uint32_t gain) (uint32_t)(0x4UL << SCU_GENERAL_DTSCON_REFTRIM_Pos) | (uint32_t)(0x8UL << SCU_GENERAL_DTSCON_BGTRIM_Pos)); } - +/* API to enable die temperature measurement by powering the DTS module. */ void XMC_SCU_EnableTemperatureSensor(void) { SCU_GENERAL->DTSCON &= (uint32_t)~(SCU_GENERAL_DTSCON_PWD_Msk); } +/* API to disable die temperature measurement by powering the DTS module off. */ void XMC_SCU_DisableTemperatureSensor(void) { SCU_GENERAL->DTSCON |= (uint32_t)SCU_GENERAL_DTSCON_PWD_Msk; } +/* API to provide the die temperature sensor power status. */ bool XMC_SCU_IsTemperatureSensorEnabled(void) { return ((SCU_GENERAL->DTSCON & SCU_GENERAL_DTSCON_PWD_Msk) == 0U); } +/* API to check if the die temperature sensor is ready to start a measurement. */ bool XMC_SCU_IsTemperatureSensorReady(void) { return ((SCU_GENERAL->DTSSTAT & SCU_GENERAL_DTSSTAT_RDY_Msk) != 0U); @@ -292,7 +344,7 @@ XMC_SCU_STATUS_t XMC_SCU_StartTemperatureMeasurement(void) } /* API to retrieve the temperature measured */ -uint32_t XMC_SCU_GetTemperature(void) +uint32_t XMC_SCU_GetTemperatureMeasurement(void) { uint32_t temperature; @@ -315,8 +367,8 @@ bool XMC_SCU_IsTemperatureSensorBusy(void) } -/* API to determine if device temperature has gone past the ceiling */ #if defined(SCU_GENERAL_DTEMPLIM_LOWER_Msk) && defined(SCU_GENERAL_DTEMPLIM_UPPER_Msk) +/* API to determine if device temperature has gone past the ceiling */ bool XMC_SCU_HighTemperature(void) { bool ret_val; @@ -430,7 +482,7 @@ uint32_t XMC_SCU_ReadFromRetentionMemory(uint32_t address) rmacr = ((uint32_t)(address << SCU_GENERAL_RMACR_ADDR_Pos) & (uint32_t)SCU_GENERAL_RMACR_ADDR_Msk); /* Transfer from RMDATA to Retention memory */ - rmacr |= (uint32_t)(SCU_GENERAL_RMACR_RDWR_Msk); + rmacr &= ~((uint32_t)(SCU_GENERAL_RMACR_RDWR_Msk)); /* Writing an adress & direction of transfer into RMACR register */ SCU_GENERAL->RMACR = rmacr; @@ -474,6 +526,7 @@ void XMC_SCU_CLOCK_Init(const XMC_SCU_CLOCK_CONFIG_t *const config) if (config->enable_osculp == true) { XMC_SCU_CLOCK_EnableLowPowerOscillator(); + while(XMC_SCU_CLOCK_IsLowPowerOscillatorStable() == false); } XMC_SCU_HIB_SetStandbyClockSource(config->fstdby_clksrc); @@ -487,6 +540,7 @@ void XMC_SCU_CLOCK_Init(const XMC_SCU_CLOCK_CONFIG_t *const config) if (config->enable_oschp == true) { XMC_SCU_CLOCK_EnableHighPerformanceOscillator(); + while(XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable() == false); } if (config->syspll_config.mode == XMC_SCU_CLOCK_SYSPLL_MODE_DISABLED) @@ -533,13 +587,13 @@ uint32_t XMC_SCU_TRAP_GetStatus(void) /* API to manually trigger a trap event */ void XMC_SCU_TRAP_Trigger(const uint32_t trap) { - SCU_TRAP->TRAPSET |= (uint32_t)trap; + SCU_TRAP->TRAPSET = (uint32_t)trap; } /* API to clear a trap event */ void XMC_SCU_TRAP_ClearStatus(const uint32_t trap) { - SCU_TRAP->TRAPCLR |= (uint32_t)trap; + SCU_TRAP->TRAPCLR = (uint32_t)trap; } /* API to clear parity error event */ @@ -554,21 +608,25 @@ uint32_t XMC_SCU_PARITY_GetStatus(void) return (SCU_PARITY->PEFLAG); } +/* API to enable parity error checking for the selected on-chip RAM type */ void XMC_SCU_PARITY_Enable(const uint32_t memory) { SCU_PARITY->PEEN |= (uint32_t)memory; } +/* API to disable parity error checking for the selected on-chip RAM type */ void XMC_SCU_PARITY_Disable(const uint32_t memory) { SCU_PARITY->PEEN &= (uint32_t)~memory; } +/* API to enable trap assertion for the parity error source */ void XMC_SCU_PARITY_EnableTrapGeneration(const uint32_t memory) { SCU_PARITY->PETE |= (uint32_t)memory; } +/* API to disable the assertion of trap for the parity error source */ void XMC_SCU_PARITY_DisableTrapGeneration(const uint32_t memory) { SCU_PARITY->PETE &= (uint32_t)~memory; @@ -591,18 +649,8 @@ void XMC_SCU_RESET_AssertPeripheralReset(const XMC_SCU_PERIPHERAL_RESET_t periph { uint32_t index = (uint32_t)((((uint32_t)peripheral) & 0xf0000000UL) >> 28UL); uint32_t mask = (((uint32_t)peripheral) & ((uint32_t)~0xf0000000UL)); -#if UC_SERIES == XMC45 || UC_SERIES == XMC48 || UC_SERIES == XMC47 - static __O uint32_t *const set_peripheral_reset[] = {&(SCU_RESET->PRSET0), - &(SCU_RESET->PRSET1), - &(SCU_RESET->PRSET2), - &(SCU_RESET->PRSET3)}; -#else - static __O uint32_t *const set_peripheral_reset[] = {&(SCU_RESET->PRSET0), - &(SCU_RESET->PRSET1), - &(SCU_RESET->PRSET2)}; -#endif - *set_peripheral_reset[index] |= (uint32_t)mask; + *(uint32_t *)(&(SCU_RESET->PRSET0) + (index * 3U)) = (uint32_t)mask; } /* API to manually de-assert a reset request */ @@ -610,18 +658,8 @@ void XMC_SCU_RESET_DeassertPeripheralReset(const XMC_SCU_PERIPHERAL_RESET_t peri { uint32_t index = (uint32_t)((((uint32_t)peripheral) & 0xf0000000UL) >> 28UL); uint32_t mask = (((uint32_t)peripheral) & ((uint32_t)~0xf0000000UL)); -#if UC_SERIES == XMC45 || UC_SERIES == XMC48 || UC_SERIES == XMC47 - static __O uint32_t *const clear_peripheral_reset[] = {&(SCU_RESET->PRCLR0), - &(SCU_RESET->PRCLR1), - &(SCU_RESET->PRCLR2), - &(SCU_RESET->PRCLR3)}; -#else - static __O uint32_t *const clear_peripheral_reset[] = {&(SCU_RESET->PRCLR0), - &(SCU_RESET->PRCLR1), - &(SCU_RESET->PRCLR2)}; -#endif - *clear_peripheral_reset[index] |= (uint32_t)mask; + *(uint32_t *)(&(SCU_RESET->PRCLR0) + (index * 3U)) = (uint32_t)mask; } /* Find out if the peripheral reset is asserted */ @@ -629,18 +667,8 @@ bool XMC_SCU_RESET_IsPeripheralResetAsserted(const XMC_SCU_PERIPHERAL_RESET_t pe { uint32_t index = (uint32_t)((((uint32_t)peripheral) & 0xf0000000UL) >> 28UL); uint32_t mask = (((uint32_t)peripheral) & ((uint32_t)~0xf0000000UL)); -#if UC_SERIES == XMC45 || UC_SERIES == XMC48 || UC_SERIES == XMC47 - static __I uint32_t *const clear_peripheral_reset[] = {&(SCU_RESET->PRSTAT0), - &(SCU_RESET->PRSTAT1), - &(SCU_RESET->PRSTAT2), - &(SCU_RESET->PRSTAT3)}; -#else - static __I uint32_t *const clear_peripheral_reset[] = {&(SCU_RESET->PRSTAT0), - &(SCU_RESET->PRSTAT1), - &(SCU_RESET->PRSTAT2)}; -#endif - return (bool)(*clear_peripheral_reset[index] & mask); + return ((*(uint32_t *)(&(SCU_RESET->PRSTAT0) + (index * 3U)) & mask) != 0U); } /* @@ -712,6 +740,9 @@ uint32_t XMC_SCU_CLOCK_GetUsbPllClockFrequency(void) return (clock_frequency); } +/* + * API to retrieve frequency of CCU clock frequency + */ uint32_t XMC_SCU_CLOCK_GetCcuClockFrequency(void) { uint32_t frequency = 0UL; @@ -761,6 +792,9 @@ uint32_t XMC_SCU_CLOCK_GetEbuClockFrequency(void) #endif #if defined(ECAT0) +/* + * API to retrieve ECAT clock frequency + */ uint32_t XMC_SCU_CLOCK_GetECATClockFrequency(void) { uint32_t frequency; @@ -1000,6 +1034,7 @@ void XMC_SCU_CLOCK_SetExternalOutputClockDivider(const uint32_t divider) } #if defined(ECAT0) +/* API to configure the ECAT clock by setting the clock divider for the ECAT clock source */ void XMC_SCU_CLOCK_SetECATClockDivider(const uint32_t divider) { SCU_CLK->ECATCLKCR = (SCU_CLK->ECATCLKCR & ~SCU_CLK_ECATCLKCR_ECADIV_Msk) | @@ -1026,21 +1061,13 @@ bool XMC_SCU_CLOCK_IsClockEnabled(const XMC_SCU_CLOCK_t clock) } #if defined(CLOCK_GATING_SUPPORTED) +/* API to gate a given module clock */ void XMC_SCU_CLOCK_GatePeripheralClock(const XMC_SCU_PERIPHERAL_CLOCK_t peripheral) { uint32_t index = (peripheral & 0xf0000000UL) >> 28UL; uint32_t mask = (peripheral & (uint32_t)~0xf0000000UL); -#if (UC_SERIES == XMC48 || UC_SERIES == XMC47) - static __O uint32_t *const set_peripheral_gate[] = {&(SCU_CLK->CGATSET0), - &(SCU_CLK->CGATSET1), - &(SCU_CLK->CGATSET2), - &(SCU_CLK->CGATSET3)}; -#else - static __O uint32_t *const set_peripheral_gate[] = {&(SCU_CLK->CGATSET0), - &(SCU_CLK->CGATSET1), - &(SCU_CLK->CGATSET2)}; -#endif - *set_peripheral_gate[index] |= (uint32_t)mask; + + *(uint32_t *)((&(SCU_CLK->CGATSET0)) + (index * 3U)) = (uint32_t)mask; } /* API to ungate a given module clock */ @@ -1048,17 +1075,8 @@ void XMC_SCU_CLOCK_UngatePeripheralClock(const XMC_SCU_PERIPHERAL_CLOCK_t periph { uint32_t index = (uint32_t)((peripheral & 0xf0000000UL) >> 28UL); uint32_t mask = (peripheral & (uint32_t)~0xf0000000UL); -#if (UC_SERIES == XMC48 || UC_SERIES == XMC47) - static __O uint32_t *const clear_peripheral_gate[] = {&(SCU_CLK->CGATCLR0), - &(SCU_CLK->CGATCLR1), - &(SCU_CLK->CGATCLR2), - &(SCU_CLK->CGATCLR3)}; -#else - static __O uint32_t *const clear_peripheral_gate[] = {&(SCU_CLK->CGATCLR0), - &(SCU_CLK->CGATCLR1), - &(SCU_CLK->CGATCLR2)}; -#endif - *clear_peripheral_gate[index] |= (uint32_t)mask; + + *(uint32_t *)(&(SCU_CLK->CGATCLR0) + (index * 3U)) = (uint32_t)mask; } /* API to ungate a given module clock */ @@ -1066,25 +1084,28 @@ bool XMC_SCU_CLOCK_IsPeripheralClockGated(const XMC_SCU_PERIPHERAL_CLOCK_t perip { uint32_t index = ((peripheral & 0xf0000000UL) >> 28UL); uint32_t mask = (peripheral & (uint32_t)~0xf0000000UL); -#if (UC_SERIES == XMC48 || UC_SERIES == XMC47) - static __I uint32_t *const clear_peripheral_gate[] = {&(SCU_CLK->CGATSTAT0), - &(SCU_CLK->CGATSTAT1), - &(SCU_CLK->CGATSTAT2), - &(SCU_CLK->CGATSTAT3)}; -#else - static __I uint32_t *const clear_peripheral_gate[] = {&(SCU_CLK->CGATSTAT0), - &(SCU_CLK->CGATSTAT1), - &(SCU_CLK->CGATSTAT2)}; -#endif - return (bool)(*clear_peripheral_gate[index] & mask); + + return ((*(uint32_t *)(&(SCU_CLK->CGATSTAT0) + (index * 3U)) & mask) != 0U); } #endif +float XMC_SCU_POWER_GetEVR13Voltage(void) +{ + return (SCU_POWER->EVRVADCSTAT & SCU_POWER_EVRVADCSTAT_VADC13V_Msk) * XMC_SCU_POWER_LSB13V; +} + +float XMC_SCU_POWER_GetEVR33Voltage(void) +{ + return ((SCU_POWER->EVRVADCSTAT & SCU_POWER_EVRVADCSTAT_VADC33V_Msk) >> SCU_POWER_EVRVADCSTAT_VADC33V_Pos) * XMC_SCU_POWER_LSB33V; +} + +/* API to enable USB PLL for USB clock */ void XMC_SCU_CLOCK_EnableUsbPll(void) { SCU_PLL->USBPLLCON &= (uint32_t)~(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk); } +/* API to disable USB PLL for USB clock */ void XMC_SCU_CLOCK_DisableUsbPll(void) { SCU_PLL->USBPLLCON |= (uint32_t)(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk); @@ -1119,12 +1140,14 @@ void XMC_SCU_CLOCK_StartUsbPll(uint32_t pdiv, uint32_t ndiv) } +/* API to disable USB PLL operation */ void XMC_SCU_CLOCK_StopUsbPll(void) { SCU_PLL->USBPLLCON = (uint32_t)(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk | SCU_PLL_USBPLLCON_VCOBYP_Msk); } +/* API to onfigure the calibration mode for internal oscillator */ void XMC_SCU_CLOCK_SetBackupClockCalibrationMode(XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t mode) { /* Enable factory calibration based trimming */ @@ -1143,24 +1166,29 @@ void XMC_SCU_CLOCK_SetBackupClockCalibrationMode(XMC_SCU_CLOCK_FOFI_CALIBRATION_ XMC_SCU_lDelay(100UL); } + + /* API to enable USB Phy and comparator */ void XMC_SCU_POWER_EnableUsb(void) { - SCU_POWER->PWRSET |= (uint32_t)SCU_POWER_PWRSET_USBPHYPDQ_Msk; -#if ((UC_SERIES == XMC45) || (UC_SERIES == XMC44) || UC_SERIES == XMC48 || UC_SERIES == XMC47) - SCU_POWER->PWRSET |= (uint32_t)SCU_POWER_PWRSET_USBOTGEN_Msk; -#endif +#if defined(USB_OTG_SUPPORTED) + SCU_POWER->PWRSET = (uint32_t)(SCU_POWER_PWRSET_USBOTGEN_Msk | SCU_POWER_PWRSET_USBPHYPDQ_Msk); +#else + SCU_POWER->PWRSET = (uint32_t)SCU_POWER_PWRSET_USBPHYPDQ_Msk; +#endif } /* API to power down USB Phy and comparator */ void XMC_SCU_POWER_DisableUsb(void) { - SCU_POWER->PWRCLR |= (uint32_t)SCU_POWER_PWRSET_USBPHYPDQ_Msk; -#if ((UC_SERIES == XMC45) || (UC_SERIES == XMC44) || UC_SERIES == XMC48 || UC_SERIES == XMC47) - SCU_POWER->PWRCLR |= (uint32_t)SCU_POWER_PWRSET_USBOTGEN_Msk; -#endif +#if defined(USB_OTG_SUPPORTED) + SCU_POWER->PWRCLR = (uint32_t)(SCU_POWER_PWRCLR_USBOTGEN_Msk | SCU_POWER_PWRSET_USBPHYPDQ_Msk); +#else + SCU_POWER->PWRCLR = (uint32_t)SCU_POWER_PWRCLR_USBPHYPDQ_Msk; +#endif } +/* API to check USB PLL is locked or not */ bool XMC_SCU_CLOCK_IsUsbPllLocked(void) { return (bool)((SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk) != 0UL); @@ -1172,7 +1200,7 @@ void XMC_SCU_HIB_EnableHibernateDomain(void) /* Power up HIB domain if and only if it is currently powered down */ if((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0UL) { - SCU_POWER->PWRSET |= (uint32_t)SCU_POWER_PWRSET_HIB_Msk; + SCU_POWER->PWRSET = (uint32_t)SCU_POWER_PWRSET_HIB_Msk; while((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0UL) { @@ -1183,8 +1211,11 @@ void XMC_SCU_HIB_EnableHibernateDomain(void) /* Remove the reset only if HIB domain were in a state of reset */ if((SCU_RESET->RSTSTAT) & SCU_RESET_RSTSTAT_HIBRS_Msk) { - SCU_RESET->RSTCLR |= (uint32_t)SCU_RESET_RSTCLR_HIBRS_Msk; - XMC_SCU_lDelay(150U); + SCU_RESET->RSTCLR = (uint32_t)SCU_RESET_RSTCLR_HIBRS_Msk; + while((SCU_RESET->RSTSTAT & SCU_RESET_RSTSTAT_HIBRS_Msk) != 0UL) + { + /* wait until HIB domain is enabled */ + } } } @@ -1192,11 +1223,12 @@ void XMC_SCU_HIB_EnableHibernateDomain(void) void XMC_SCU_HIB_DisableHibernateDomain(void) { /* Disable hibernate domain */ - SCU_POWER->PWRCLR |= (uint32_t)SCU_POWER_PWRCLR_HIB_Msk; + SCU_POWER->PWRCLR = (uint32_t)SCU_POWER_PWRCLR_HIB_Msk; /* Reset of hibernate domain reset */ - SCU_RESET->RSTSET |= (uint32_t)SCU_RESET_RSTSET_HIBRS_Msk; + SCU_RESET->RSTSET = (uint32_t)SCU_RESET_RSTSET_HIBRS_Msk; } +/* API to check the hibernation domain is enabled or not */ bool XMC_SCU_HIB_IsHibernateDomainEnabled(void) { return ((bool)(SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) && @@ -1206,66 +1238,367 @@ bool XMC_SCU_HIB_IsHibernateDomainEnabled(void) /* API to enable internal slow clock - fOSI (32.768kHz) in hibernate domain */ void XMC_SCU_HIB_EnableInternalSlowClock(void) { - SCU_HIBERNATE->OSCSICTRL &= (uint32_t)~(SCU_HIBERNATE_OSCSICTRL_PWD_Msk); - /* Wait until the update of OSCSICTRL register in hibernate domain is completed */ while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCSICTRL_Msk) { + /* Wait until OSCSICTRL register in hibernate domain is ready to accept a write */ } + SCU_HIBERNATE->OSCSICTRL &= (uint32_t)~(SCU_HIBERNATE_OSCSICTRL_PWD_Msk); } /* API to disable internal slow clock - fOSI (32.768kHz) in hibernate domain */ void XMC_SCU_HIB_DisableInternalSlowClock(void) { - SCU_HIBERNATE->OSCSICTRL |= (uint32_t)SCU_HIBERNATE_OSCSICTRL_PWD_Msk; - /* Wait until the update of OSCSICTRL register in hibernate domain is completed */ while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCSICTRL_Msk) { + /* Wait until OSCSICTRL register in hibernate domain is ready to accept a write */ } + SCU_HIBERNATE->OSCSICTRL |= (uint32_t)SCU_HIBERNATE_OSCSICTRL_PWD_Msk; +} + +void XMC_SCU_HIB_ClearEventStatus(int32_t event) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCLR_Msk) + { + /* Wait until HDCLR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDCLR = event; +} + +void XMC_SCU_HIB_TriggerEvent(int32_t event) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDSET_Msk) + { + /* Wait until HDSET register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDSET = event; +} + +void XMC_SCU_HIB_EnableEvent(int32_t event) +{ +#if (defined(DOXYGEN) || (UC_SERIES == XMC44) || (UC_SERIES == XMC42) || (UC_SERIES == XMC41)) + event = ((event & XMC_SCU_HIB_EVENT_LPAC_VBAT_POSEDGE) << (SCU_HIBERNATE_HDCR_VBATHI_Pos - SCU_HIBERNATE_HDSTAT_VBATPEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_VBAT_POSEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_VBAT_NEGEDGE) << (SCU_HIBERNATE_HDCR_VBATLO_Pos - SCU_HIBERNATE_HDSTAT_VBATNEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_VBAT_NEGEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_POSEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO0HI_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO0PEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_POSEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_NEGEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO0LO_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO0NEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_NEGEDGE); +#if (defined(DOXYGEN) || ((UC_SERIES == XMC44) && (UC_PACKAGE == LQFP100))) + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_POSEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO1HI_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO1PEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_POSEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_NEGEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO1LO_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO1NEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_NEGEDGE); +#endif +#endif + + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDCR |= event; +} + +void XMC_SCU_HIB_DisableEvent(int32_t event) +{ +#if (defined(DOXYGEN) || (UC_SERIES == XMC44) || (UC_SERIES == XMC42) || (UC_SERIES == XMC41)) + event = ((event & XMC_SCU_HIB_EVENT_LPAC_VBAT_POSEDGE) << (SCU_HIBERNATE_HDCR_VBATHI_Pos - SCU_HIBERNATE_HDSTAT_VBATPEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_VBAT_POSEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_VBAT_NEGEDGE) << (SCU_HIBERNATE_HDCR_VBATLO_Pos - SCU_HIBERNATE_HDSTAT_VBATNEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_VBAT_NEGEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_POSEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO0HI_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO0PEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_POSEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_NEGEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO0LO_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO0NEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_0_NEGEDGE); +#if (defined(DOXYGEN) || ((UC_SERIES == XMC44) && (UC_PACKAGE == LQFP100))) + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_POSEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO1HI_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO1PEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_POSEDGE); + event = ((event & XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_NEGEDGE) << (SCU_HIBERNATE_HDCR_AHIBIO1LO_Pos - SCU_HIBERNATE_HDSTAT_AHIBIO1NEV_Pos)) | (event & (uint32_t)~XMC_SCU_HIB_EVENT_LPAC_HIB_IO_1_NEGEDGE); +#endif +#endif + + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDCR &= ~event; +} + +void XMC_SCU_HIB_EnterHibernateState(void) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_HIB_Msk; +} + +void XMC_SCU_HIB_EnterHibernateStateEx(XMC_SCU_HIB_HIBERNATE_MODE_t mode) +{ + if (mode == XMC_SCU_HIB_HIBERNATE_MODE_EXTERNAL) + { + XMC_SCU_HIB_EnterHibernateState(); + } +#if ((UC_SERIES == XMC44) || (UC_SERIES == XMC42) || (UC_SERIES == XMC41)) + if (mode == XMC_SCU_HIB_HIBERNATE_MODE_INTERNAL) + { + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HINTSET_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HINTSET = SCU_HIBERNATE_HINTSET_HIBNINT_Msk; + } +#endif +} + +void XMC_SCU_HIB_SetWakeupTriggerInput(XMC_SCU_HIB_IO_t pin) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + + if (pin == XMC_SCU_HIB_IO_0) + { + SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_WKUPSEL_Msk; + } + else + { + SCU_HIBERNATE->HDCR &= ~SCU_HIBERNATE_HDCR_WKUPSEL_Msk; + } +} + +void XMC_SCU_HIB_SetPinMode(XMC_SCU_HIB_IO_t pin, XMC_SCU_HIB_PIN_MODE_t mode) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDCR = (SCU_HIBERNATE->HDCR & ~(SCU_HIBERNATE_HDCR_HIBIO0SEL_Msk << (SCU_HIBERNATE_HDCR_HIBIOSEL_Size * pin))) | + (mode << (SCU_HIBERNATE_HDCR_HIBIOSEL_Size * pin)); +} + +void XMC_SCU_HIB_SetPinOutputLevel(XMC_SCU_HIB_IO_t pin, XMC_SCU_HIB_IO_OUTPUT_LEVEL_t level) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDCR = (SCU_HIBERNATE->HDCR & ~(SCU_HIBERNATE_HDCR_HIBIO0POL_Msk << pin)) | + (level << pin); +} + +void XMC_SCU_HIB_SetInput0(XMC_SCU_HIB_IO_t pin) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + + if (pin == XMC_SCU_HIB_IO_0) + { + SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_GPI0SEL_Msk; + } + else + { + SCU_HIBERNATE->HDCR &= ~SCU_HIBERNATE_HDCR_GPI0SEL_Msk; + } +} + +void XMC_SCU_HIB_SetSR0Input(XMC_SCU_HIB_SR0_INPUT_t input) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } +#if ((UC_SERIES == XMC44) || (UC_SERIES == XMC42) || (UC_SERIES == XMC41)) + SCU_HIBERNATE->HDCR = (SCU_HIBERNATE->HDCR & (uint32_t)~(SCU_HIBERNATE_HDCR_GPI0SEL_Msk | SCU_HIBERNATE_HDCR_ADIG0SEL_Msk)) | +#else + SCU_HIBERNATE->HDCR = (SCU_HIBERNATE->HDCR & (uint32_t)~(SCU_HIBERNATE_HDCR_GPI0SEL_Msk)) | +#endif + input; +} + +#if ((UC_SERIES == XMC44) || (UC_SERIES == XMC42) || (UC_SERIES == XMC41)) + +#if ((UC_SERIES == XMC44) && (UC_PACKAGE == LQFP100)) +void XMC_SCU_HIB_SetSR1Input(XMC_SCU_HIB_SR1_INPUT_t input) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->HDCR = (SCU_HIBERNATE->HDCR & (uint32_t)~(SCU_HIBERNATE_HDCR_GPI0SEL_Msk | SCU_HIBERNATE_HDCR_ADIG0SEL_Msk | SCU_HIBERNATE_HDCR_XTALGPI1SEL_Msk)) | + input; +} +#endif + +void XMC_SCU_HIB_LPAC_SetInput(XMC_SCU_HIB_LPAC_INPUT_t input) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCONF_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->LPACCONF = (SCU_HIBERNATE->LPACCONF & (uint32_t)~SCU_HIBERNATE_LPACCONF_CMPEN_Msk) | + input; +} + +void XMC_SCU_HIB_LPAC_SetTrigger(XMC_SCU_HIB_LPAC_TRIGGER_t trigger) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCONF_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->LPACCONF = (SCU_HIBERNATE->LPACCONF & (uint32_t)~SCU_HIBERNATE_LPACCONF_TRIGSEL_Msk) | + trigger; +} + +void XMC_SCU_HIB_LPAC_SetTiming(bool enable_delay, uint16_t interval_count, uint8_t settle_count) +{ + uint32_t config = 0; + + if (enable_delay) + { + config = SCU_HIBERNATE_LPACCONF_CONVDEL_Msk; + } + + config |= interval_count << SCU_HIBERNATE_LPACCONF_INTERVCNT_Pos; + config |= settle_count << SCU_HIBERNATE_LPACCONF_SETTLECNT_Pos; + + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCONF_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + + SCU_HIBERNATE->LPACCONF = (SCU_HIBERNATE->LPACCONF & (uint32_t)~(SCU_HIBERNATE_LPACCONF_CONVDEL_Msk | + SCU_HIBERNATE_LPACCONF_INTERVCNT_Msk | + SCU_HIBERNATE_LPACCONF_SETTLECNT_Msk)) | + config; + +} + +void XMC_SCU_HIB_LPAC_SetVBATThresholds(uint8_t lower, uint8_t upper) +{ + + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACTH0_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + + SCU_HIBERNATE->LPACTH0 = (lower << SCU_HIBERNATE_LPACTH0_VBATLO_Pos) | (upper << SCU_HIBERNATE_LPACTH0_VBATHI_Pos); + + + +} + +void XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds(uint8_t lower, uint8_t upper) +{ + + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACTH1_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + + SCU_HIBERNATE->LPACTH1 = (SCU_HIBERNATE->LPACTH1 & (uint32_t)~(SCU_HIBERNATE_LPACTH1_AHIBIO0LO_Msk | SCU_HIBERNATE_LPACTH1_AHIBIO0HI_Msk)) | + (lower << SCU_HIBERNATE_LPACTH1_AHIBIO0LO_Pos) | + (upper << SCU_HIBERNATE_LPACTH1_AHIBIO0HI_Pos); + +} +#if ((UC_SERIES == XMC44) && (UC_PACKAGE == LQFP100)) +void XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds(uint8_t lower, uint8_t upper) +{ + + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACTH1_Msk) + { + /* Wait until HDCR register in hibernate domain is ready to accept a write */ + } + + SCU_HIBERNATE->LPACTH1 = (SCU_HIBERNATE->LPACTH1 & (uint32_t)~(SCU_HIBERNATE_LPACTH1_AHIBIO1LO_Msk | SCU_HIBERNATE_LPACTH1_AHIBIO1HI_Msk)) | + (lower << SCU_HIBERNATE_LPACTH1_AHIBIO1LO_Pos) | + (upper << SCU_HIBERNATE_LPACTH1_AHIBIO1HI_Pos); + +} +#endif +int32_t XMC_SCU_HIB_LPAC_GetStatus(void) +{ + return SCU_HIBERNATE->LPACST; +} + +void XMC_SCU_HIB_LPAC_ClearStatus(int32_t status) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACCLR_Msk) + { + /* Wait until LPACCLR register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->LPACCLR = status;; +} + +void XMC_SCU_HIB_LPAC_TriggerCompare(XMC_SCU_HIB_LPAC_INPUT_t input) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_LPACSET_Msk) + { + /* Wait until LPACSET register in hibernate domain is ready to accept a write */ + } + + SCU_HIBERNATE->LPACSET = input; +} + +#endif + +bool XMC_SCU_CLOCK_IsLowPowerOscillatorStable(void) +{ + return ((SCU_HIBERNATE->HDSTAT & SCU_HIBERNATE_HDSTAT_ULPWDG_Msk) == 0UL); } /* API to configure the 32khz Ultra Low Power oscillator */ void XMC_SCU_CLOCK_EnableLowPowerOscillator(void) { + /* Enable OSC_ULP */ while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) { /* Wait until the update of OSCULCTRL register in hibernate domain is completed */ } SCU_HIBERNATE->OSCULCTRL &= ~SCU_HIBERNATE_OSCULCTRL_MODE_Msk; - /* Check if the input clock is OK using OSCULP Oscillator Watchdog*/ + /* Enable OSC_ULP Oscillator Watchdog*/ while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCR_Msk) { /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ } SCU_HIBERNATE->HDCR |= (uint32_t)SCU_HIBERNATE_HDCR_ULPWDGEN_Msk; - /* wait till clock is stable */ - do + /* Enable OSC_ULP Oscillator Watchdog*/ + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDSET_Msk) { - while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCLR_Msk) - { - /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ - } - SCU_HIBERNATE->HDCLR |= (uint32_t)SCU_HIBERNATE_HDCLR_ULPWDG_Msk; - - XMC_SCU_lDelay(50U); - - } while ((SCU_HIBERNATE->HDSTAT & SCU_HIBERNATE_HDSTAT_ULPWDG_Msk) != 0UL); - + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->HDSET = (uint32_t)SCU_HIBERNATE_HDSET_ULPWDG_Msk; } /* API to configure the 32khz Ultra Low Power oscillator */ void XMC_SCU_CLOCK_DisableLowPowerOscillator(void) { - SCU_HIBERNATE->OSCULCTRL |= (uint32_t)SCU_HIBERNATE_OSCULCTRL_MODE_Msk; - while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) { - /* Wait until the update of OSCULCTRL register in hibernate domain is completed */ + /* Wait until OSCULCTRL register in hibernate domain is ready to accept a write */ } + SCU_HIBERNATE->OSCULCTRL |= (uint32_t)SCU_HIBERNATE_OSCULCTRL_MODE_Msk; } -/* API to configure High Precision High Speed oscillator */ +void XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput(void) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) + { + /* Wait until OSCULCTRL register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->OSCULCTRL |= SCU_HIBERNATE_OSCULCTRL_X1DEN_Msk | SCU_HIBERNATE_OSCULCTRL_MODE_Msk; +} + +void XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput(void) +{ + while((SCU_GENERAL->MIRRSTS) & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) + { + /* Wait until OSCULCTRL register in hibernate domain is ready to accept a write */ + } + SCU_HIBERNATE->OSCULCTRL = (SCU_HIBERNATE->OSCULCTRL & ~(uint32_t)(SCU_HIBERNATE_OSCULCTRL_X1DEN_Msk | SCU_HIBERNATE_OSCULCTRL_MODE_Msk)) | + (SCU_HIBERNATE_OSCULCTRL_MODE_OSC_POWER_DOWN << SCU_HIBERNATE_OSCULCTRL_MODE_Pos); +} + +uint32_t XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus(void) +{ + return (SCU_HIBERNATE->OSCULSTAT & SCU_HIBERNATE_OSCULSTAT_X1D_Msk); +} + +/* API to enable High Precision High Speed oscillator */ void XMC_SCU_CLOCK_EnableHighPerformanceOscillator(void) { SCU_PLL->PLLCON0 &= (uint32_t)~SCU_PLL_PLLCON0_PLLPWD_Msk; @@ -1275,28 +1608,47 @@ void XMC_SCU_CLOCK_EnableHighPerformanceOscillator(void) /* restart OSC Watchdog */ SCU_PLL->PLLCON0 &= (uint32_t)~SCU_PLL_PLLCON0_OSCRES_Msk; - - while ((SCU_PLL->PLLSTAT & XMC_SCU_PLL_PLLSTAT_OSC_USABLE) != XMC_SCU_PLL_PLLSTAT_OSC_USABLE) - { - /* wait till OSC_HP output frequency is usable */ - } } +bool XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable(void) +{ + return ((SCU_PLL->PLLSTAT & XMC_SCU_PLL_PLLSTAT_OSC_USABLE) == XMC_SCU_PLL_PLLSTAT_OSC_USABLE); +} + +/* API to disable High Precision High Speed oscillator */ void XMC_SCU_CLOCK_DisableHighPerformanceOscillator(void) { SCU_OSC->OSCHPCTRL |= (uint32_t)SCU_OSC_OSCHPCTRL_MODE_Msk; } +void XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput(void) +{ + SCU_OSC->OSCHPCTRL |= SCU_OSC_OSCHPCTRL_X1DEN_Msk; +} + +void XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput(void) +{ + SCU_OSC->OSCHPCTRL &= ~SCU_OSC_OSCHPCTRL_X1DEN_Msk; +} + +uint32_t XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus(void) +{ + return (SCU_OSC->OSCHPSTAT & SCU_OSC_OSCHPSTAT_X1D_Msk); +} + +/* API to enable main PLL */ void XMC_SCU_CLOCK_EnableSystemPll(void) { SCU_PLL->PLLCON0 &= (uint32_t)~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); } +/* API to disable main PLL */ void XMC_SCU_CLOCK_DisableSystemPll(void) { SCU_PLL->PLLCON0 |= (uint32_t)(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); } +/* API to configure main PLL */ void XMC_SCU_CLOCK_StartSystemPll(XMC_SCU_CLOCK_SYSPLLCLKSRC_t source, XMC_SCU_CLOCK_SYSPLL_MODE_t mode, uint32_t pdiv, @@ -1304,7 +1656,7 @@ void XMC_SCU_CLOCK_StartSystemPll(XMC_SCU_CLOCK_SYSPLLCLKSRC_t source, uint32_t kdiv) { - float vco_frequency; + uint32_t vco_frequency; /* Q10.22, max VCO frequency = 520MHz */ uint32_t kdiv_temp; XMC_SCU_CLOCK_SetSystemPllClockSource(source); @@ -1314,14 +1666,14 @@ void XMC_SCU_CLOCK_StartSystemPll(XMC_SCU_CLOCK_SYSPLLCLKSRC_t source, /* Calculate initial step to be close to fOFI */ if (source == XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP) { - vco_frequency = (float)OSCHP_GetFrequency(); + vco_frequency = (OSCHP_GetFrequency() / 1000000U) << 22; } else { - vco_frequency = (float)OFI_FREQUENCY; + vco_frequency = (OFI_FREQUENCY / 1000000U) << 22; } - vco_frequency = (float)((vco_frequency * (float)ndiv) / (float)pdiv); - kdiv_temp = (uint32_t)((uint32_t)vco_frequency / OFI_FREQUENCY); + vco_frequency = ((vco_frequency * ndiv) / pdiv); + kdiv_temp = (vco_frequency / (OFI_FREQUENCY / 1000000U)) >> 22; /* Switch to prescaler mode */ SCU_PLL->PLLCON0 |= (uint32_t)SCU_PLL_PLLCON0_VCOBYP_Msk; @@ -1356,13 +1708,13 @@ void XMC_SCU_CLOCK_StartSystemPll(XMC_SCU_CLOCK_SYSPLLCLKSRC_t source, } /* Ramp up PLL frequency in steps */ - kdiv_temp = (uint32_t)((uint32_t)vco_frequency / 60000000UL); + kdiv_temp = (vco_frequency / 60UL) >> 22; if (kdiv < kdiv_temp) { XMC_SCU_CLOCK_StepSystemPllFrequency(kdiv_temp); } - kdiv_temp = (uint32_t)((uint32_t)vco_frequency / 90000000UL); + kdiv_temp = (vco_frequency / 90UL) >> 22; if (kdiv < kdiv_temp) { XMC_SCU_CLOCK_StepSystemPllFrequency(kdiv_temp); @@ -1385,11 +1737,13 @@ void XMC_SCU_CLOCK_StartSystemPll(XMC_SCU_CLOCK_SYSPLLCLKSRC_t source, } } +/* API to stop main PLL operation */ void XMC_SCU_CLOCK_StopSystemPll(void) { SCU_PLL->PLLCON0 |= (uint32_t)SCU_PLL_PLLCON0_PLLPWD_Msk; } +/* API to step up/down the main PLL frequency */ void XMC_SCU_CLOCK_StepSystemPllFrequency(uint32_t kdiv) { SCU_PLL->PLLCON1 = (uint32_t)((SCU_PLL->PLLCON1 & ~SCU_PLL_PLLCON1_K2DIV_Msk) | @@ -1398,13 +1752,14 @@ void XMC_SCU_CLOCK_StepSystemPllFrequency(uint32_t kdiv) XMC_SCU_lDelay(50U); } +/* API to check main PLL is locked or not */ bool XMC_SCU_CLOCK_IsSystemPllLocked(void) { return (bool)((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk) != 0UL); } /* - * + * API to assign the event handler function to be executed on occurrence of the selected event. */ XMC_SCU_STATUS_t XMC_SCU_INTERRUPT_SetEventHandler(const XMC_SCU_INTERRUPT_EVENT_t event, const XMC_SCU_INTERRUPT_EVENT_HANDLER_t handler) @@ -1432,7 +1787,7 @@ XMC_SCU_STATUS_t XMC_SCU_INTERRUPT_SetEventHandler(const XMC_SCU_INTERRUPT_EVENT } /* - * + * API to execute callback functions for multiple events. */ void XMC_SCU_IRQHandler(uint32_t sr_num) { diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_acmp.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_acmp.c new file mode 100644 index 00000000..40fb4e11 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_acmp.c @@ -0,0 +1,119 @@ +/** + * @file xmc_acmp.c + * @date 2015-06-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2014-12-10: + * - Initial
+ * 2015-02-20: + * - Removed unused declarations
+ * 2015-05-08: + * - Fixed sequence problem of low power mode in XMC_ACMP_Init() API
+ * - Fixed wrong register setting in XMC_ACMP_SetInput() API
+ * - Removed return type variable and by default comparator enable from XMC_ACMP_Init() API.
+ * Additional call to XMC_ACMP_EnableComparator() API needed to start Comparator after Init.
+ * 2015-06-04: + * - Removed return type variable and by default comparator enable from XMC_ACMP_Init() API.
+ * - Divided XMC_ACMP_SetInput into two 3 APIs to reduce the code size and complexity as stated below
+ * (a)XMC_ACMP_EnableReferenceDivider
+ * (b)XMC_ACMP_DisableReferenceDivider
+ * (c)XMC_ACMP_SetInput
+ * - Optimized enable and disable API's and moved to header file as static inline APIs. + * - XMC_ACMP_t typedef changed to structure which overrides the standard header file structure. + * 2015-06-20: + * - Removed definition of GetDriverVersion API + * @endcond + * + */ + + +/********************************************************************************************************************* + * HEADER FILES + ********************************************************************************************************************/ +#include + +/* If ACMP is available*/ +#if defined (COMPARATOR) + +/********************************************************************************************************************* + * MACROS + ********************************************************************************************************************/ + +#define XMC_ACMP_INSTANCE_1 (1U) /* Instance number for Slice-1 */ + +/********************************************************************************************************************* + * API IMPLEMENTATION + ********************************************************************************************************************/ + +/* API to initialize an instance of ACMP module */ +void XMC_ACMP_Init(XMC_ACMP_t *const peripheral, uint32_t instance, const XMC_ACMP_CONFIG_t *const config) +{ + + XMC_ASSERT("XMC_ACMP_Init:NULL Configuration", (config != (XMC_ACMP_CONFIG_t *)NULL)) + XMC_ASSERT("XMC_ACMP_Init:Wrong module pointer", XMC_ACMP_CHECK_MODULE_PTR(peripheral)) + XMC_ASSERT("XMC_ACMP_Init:Wrong instance number", XMC_ACMP_CHECK_INSTANCE(instance) ) + + /* + * Initializes the comparator with configuration supplied. Low power node setting is retained during initialization. + * All the instances passed are handled with low power setting, to avoid conditional check for ACMP0 instance. + * This reduces the code size. No side effects, because this register bit field is empty for other instances. + */ + peripheral->ANACMP[instance] = ((peripheral->ANACMP[instance] & (uint32_t)COMPARATOR_ANACMP0_CMP_LPWR_Msk)) | + (uint32_t)config->anacmp; +} + +/* API to select INP source */ +void XMC_ACMP_SetInput(XMC_ACMP_t *const peripheral, uint32_t instance, XMC_ACMP_INP_SOURCE_t source) +{ + XMC_ASSERT("XMC_ACMP_SetInput:Wrong module pointer", XMC_ACMP_CHECK_MODULE_PTR(peripheral)) + XMC_ASSERT("XMC_ACMP_SetInput:Wrong instance number", ((instance != XMC_ACMP_INSTANCE_1) && + XMC_ACMP_CHECK_INSTANCE(instance)) ) + XMC_ASSERT("XMC_ACMP_SetInput:Wrong input source", ((source == XMC_ACMP_INP_SOURCE_STANDARD_PORT) || + (source == XMC_ACMP_INP_SOURCE_ACMP1_INP_PORT)) ) + + /* + * Three options of Input Setting are listed below + * 1. The comparator inputs aren't connected to other comparator inputs + * 2. Can program the comparators to connect ACMP0.INP to ACMP1.INP in XMC1200 AA or XMC1300 AA + * Can program the comparators to connect ACMP0.INN to ACMP1.INP in XMC1200 AB or XMC1300 AB or XMC1400 AA + * 3. Can program the comparators to connect ACMP2.INP to ACMP1.INP + * 4. Can program the comparators to connect ACMP3.INP to ACMP1.INP in XMC1400 + */ + peripheral->ANACMP[instance] = ((peripheral->ANACMP[instance] & (uint32_t)(~COMPARATOR_ANACMP0_ACMP0_SEL_Msk))) | + (uint32_t)source; +} + +#endif /* #ifdef ACMP_AVAILABLE */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_bccu.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_bccu.c new file mode 100644 index 00000000..90487a80 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_bccu.c @@ -0,0 +1,577 @@ +/** + * @file xmc_bccu.c + * @date 2015-06-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-02-19: + * - Initial draft
+ * + * 2015-05-08: + * - Minor bug fixes in following APIs: XMC_BCCU_ConcurrentStartDimming(), XMC_BCCU_ConcurrentAbortDimming(), + * XMC_BCCU_SetGlobalDimmingLevel()
+ * + * 2015-06-20: + * - Removed version macros and declaration of GetDriverVersion API + * + * Detailed description of file:
+ * APIs for the functional blocks of BCCU have been defined:
+ * -- GLOBAL configuration
+ * -- Clock configuration, Function/Event configuration, Interrupt configuration
+ * + * @endcond + * + */ + +/********************************************************************************************************************* + * HEADER FILES + ********************************************************************************************************************/ +#include + +#if defined(BCCU0) +#include + +/********************************************************************************************************************* + * MACROS + ********************************************************************************************************************/ +#define XMC_BCCU_NO_OF_CHANNELS (9U) +#define XMC_BCCU_CHANNEL_MASK ((0x1 << XMC_BCCU_NO_OF_CHANNELS)-1) +#define XMC_BCCU_NO_OF_DIM_ENGINE (3U) +#define XMC_BCCU_DIM_ENGINE_MASK (((0x1 << XMC_BCCU_NO_OF_DIM_ENGINE)-1)) + +/********************************************************************************************************************* + * ENUMS + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * DATA STRUCTURES + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * GLOBAL DATA + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * LOCAL/UTILITY ROUTINES + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * API IMPLEMENTATION + ********************************************************************************************************************/ + +/* + * API to initialise the global resources of a BCCU module + */ +void XMC_BCCU_GlobalInit(XMC_BCCU_t *const bccu, const XMC_BCCU_GLOBAL_CONFIG_t *const config) +{ + XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_BCCU0); + + bccu->GLOBCON = config->globcon; + + bccu->GLOBCLK = config->globclk; + bccu->GLOBDIM = config->global_dimlevel; + +} + +/* + * API to configure the global trigger mode & delay of a BCCU module + */ +void XMC_BCCU_ConfigGlobalTrigger(XMC_BCCU_t *const bccu, XMC_BCCU_TRIGMODE_t mode, XMC_BCCU_TRIGDELAY_t delay) +{ + bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TM_Msk | BCCU_GLOBCON_TRDEL_Msk); + bccu->GLOBCON |= ((uint32_t)mode | ((uint32_t)delay << BCCU_GLOBCON_TRDEL_Pos)); +} + +/* + * API to configure the trap input selection of a BCCU module + */ +void XMC_BCCU_SelectTrapInput (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_IN_t input) +{ + bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TRAPIS_Msk); + bccu->GLOBCON |= ((uint32_t)input << BCCU_GLOBCON_TRAPIS_Pos); +} + +/* + * API to configure the trap edge selection of a BCCU module + */ +void XMC_BCCU_SetTrapEdge (XMC_BCCU_t *const bccu, XMC_BCCU_CH_TRAP_EDGE_t edge) +{ + bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TRAPED_Msk); + bccu->GLOBCON |= ((uint32_t)edge << BCCU_GLOBCON_TRAPED_Pos); +} + +/* + * API to configure the suspend mode of a BCCU module + */ +void XMC_BCCU_ConfigSuspendMode (XMC_BCCU_t *const bccu, XMC_BCCU_SUSPEND_MODE_t mode) +{ + bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_SUSCFG_Msk); + bccu->GLOBCON |= ((uint32_t)mode << BCCU_GLOBCON_SUSCFG_Pos); +} + +/* + * API to configure number of consecutive zeroes allowed at modulator output (flicker watch-dog number) + */ +void XMC_BCCU_SetFlickerWDThreshold (XMC_BCCU_t *const bccu, uint32_t threshold_no) +{ + XMC_ASSERT("XMC_BCCU_SetFlickerWDThreshold: Invalid threshold no", (threshold_no <= BCCU_GLOBCON_WDMBN_Msk)); + + bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_WDMBN_Msk); + bccu->GLOBCON |= (uint32_t)(threshold_no << BCCU_GLOBCON_WDMBN_Pos); +} + +/* + * API to configure the fast clock prescaler factor of a BCCU module + */ +void XMC_BCCU_SetFastClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div) +{ + XMC_ASSERT("XMC_BCCU_SetFastClockPrescaler: Invalid divider value", (div <= BCCU_GLOBCLK_FCLK_PS_Msk)); + + bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_FCLK_PS_Msk); + bccu->GLOBCLK |= div; + +} + +/* + * API to configure the dimmer clock prescaler factor of a BCCU module + */ +void XMC_BCCU_SetDimClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div) +{ + XMC_ASSERT("XMC_BCCU_SetDimClockPrescaler: Invalid divider value", (div <= BCCU_GLOBCLK_DCLK_PS_Msk)); + + bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_DCLK_PS_Msk); + bccu->GLOBCLK |= (uint32_t)(div << BCCU_GLOBCLK_DCLK_PS_Pos); + +} + +/* + * API to configure the modulator output (bit-time) clock prescaler factor of a BCCU module + */ +void XMC_BCCU_SelectBitClock (XMC_BCCU_t *const bccu, XMC_BCCU_BCLK_MODE_t div) +{ + bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_BCS_Msk); + bccu->GLOBCLK |= ((uint32_t)div << BCCU_GLOBCLK_BCS_Pos); +} + +/* + * API to enable the channels at the same time + */ +void XMC_BCCU_ConcurrentEnableChannels (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentEnableChannels: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MASK)); + + bccu->CHEN |= mask; +} + +/* + * API to disable the channels at the same time + */ +void XMC_BCCU_ConcurrentDisableChannels (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentDisableChannels: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MASK)); + bccu->CHEN &= ~(uint32_t)(mask); +} + +/* + * API to set the channel's output passive levels at the same time + */ +void XMC_BCCU_ConcurrentSetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_mask, XMC_BCCU_CH_ACTIVE_LEVEL_t level) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentSetOutputPassiveLevel: Invalid channel mask", (chan_mask <= XMC_BCCU_CHANNEL_MASK)); + + bccu->CHOCON &= ~(uint32_t)(chan_mask); + bccu->CHOCON |= (chan_mask * (uint32_t)level); +} + +/* + * API to enable the various types of traps at the same time + */ +void XMC_BCCU_ConcurrentEnableTrap (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentEnableTrap: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MASK)); + + bccu->CHOCON |= (uint32_t)(mask << BCCU_CHOCON_CH0TPE_Pos); +} + +/* + * API to disable the various types of traps at the same time + */ +void XMC_BCCU_ConcurrentDisableTrap (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentDisableTrap: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MASK)); + + bccu->CHOCON &= ~(uint32_t)(mask << BCCU_CHOCON_CH0TPE_Pos); +} + +/* + * API to configure trigger mode and trigger delay at the same time, and also configure the channel enable + */ +void XMC_BCCU_ConcurrentConfigTrigger (XMC_BCCU_t *const bccu, XMC_BCCU_TRIG_CONFIG_t *trig) +{ + uint32_t reg; + + XMC_ASSERT("XMC_BCCU_ConcurrentConfigTrigger: Invalid channel mask", (trig->mask_chans <= XMC_BCCU_CHANNEL_MASK)); + + bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_TM_Msk | BCCU_GLOBCON_TRDEL_Msk); + bccu->GLOBCON |= ((uint32_t)trig->mode | ((uint32_t)trig->delay << BCCU_GLOBCON_TRDEL_Pos)); + reg = 0U; + reg |= trig->mask_chans; + reg |= ((uint32_t)trig->mask_trig_lines << BCCU_CHTRIG_TOS0_Pos); + bccu->CHTRIG = reg; +} + +/* + * API to start the linear walk of the channels to change towards target intensity at the same time + */ +void XMC_BCCU_ConcurrentStartLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentStartLinearWalk: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MASK)); + + bccu->CHSTRCON |= (uint32_t)(mask); +} + +/* + * API to abort the linear walk of the channels at the same time + */ +void XMC_BCCU_ConcurrentAbortLinearWalk (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentAbortLinearWalk: Invalid channel mask", (mask <= XMC_BCCU_CHANNEL_MASK)); + + bccu->CHSTRCON |= (uint32_t)(mask << BCCU_CHSTRCON_CH0A_Pos); +} + +/* + * API to enable the dimming engines at the same time + */ +void XMC_BCCU_ConcurrentEnableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentEnableDimmingEngine: Invalid dimming engine mask", (mask <= XMC_BCCU_DIM_ENGINE_MASK)); + + bccu->DEEN = (uint32_t)(mask); +} + +/* + * API to enable the dimming engines at the same time + */ +void XMC_BCCU_ConcurrentDisableDimmingEngine (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentDisableDimmingEngine: Invalid dimming engine mask", (mask <= XMC_BCCU_DIM_ENGINE_MASK)); + + bccu->DEEN &= ~(uint32_t)(mask); +} + +/* + * API to start the dimming engines at the same time to change towards target dim level + */ +void XMC_BCCU_ConcurrentStartDimming (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentStartDimming: Invalid dimming engine mask", (mask <= XMC_BCCU_DIM_ENGINE_MASK)); + + bccu->DESTRCON = (uint32_t)(mask); +} + +/* + * API to abort the dimming engines at the same time + */ +void XMC_BCCU_ConcurrentAbortDimming (XMC_BCCU_t *const bccu, uint32_t mask) +{ + XMC_ASSERT("XMC_BCCU_ConcurrentAbortDimming: Invalid dimming engine mask", (mask <= XMC_BCCU_DIM_ENGINE_MASK)); + + bccu->DESTRCON = (uint32_t)(mask << BCCU_DESTRCON_DE0A_Pos); +} + +/* + * API to configure the dim level of a dimming engine + */ +void XMC_BCCU_SetGlobalDimmingLevel (XMC_BCCU_t *const bccu, uint32_t level) +{ + XMC_ASSERT("XMC_BCCU_SetGlobalDimmingLevel: Invalid global dimming level", (level <= BCCU_GLOBDIM_GLOBDIM_Msk)); + + bccu->GLOBDIM = level; +} + +/* + * API to enable a specific channel + */ +void XMC_BCCU_EnableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + XMC_ASSERT("XMC_BCCU_EnableChannel: Invalid channel number", (chan_no <= (XMC_BCCU_NO_OF_CHANNELS-1))); + + bccu->CHEN |= (uint32_t)(BCCU_CHEN_ECH0_Msk << chan_no); +} + +/* + * API to disable a specific channel + */ +void XMC_BCCU_DisableChannel (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + XMC_ASSERT("XMC_BCCU_DisableChannel: Invalid channel number", (chan_no <= (XMC_BCCU_NO_OF_CHANNELS-1))); + + bccu->CHEN &= ~(uint32_t)(BCCU_CHEN_ECH0_Msk << chan_no); +} + +/* + * API to set the specific channel's passive level + */ +void XMC_BCCU_SetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_ACTIVE_LEVEL_t level) +{ + XMC_ASSERT("XMC_BCCU_SetOutputPassiveLevel: Invalid channel number", (chan_no <= (XMC_BCCU_NO_OF_CHANNELS-1))); + + bccu->CHOCON |= ((uint32_t)level << chan_no); +} + +/* + * API to enable the specific channel trap + */ +void XMC_BCCU_EnableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + XMC_ASSERT("XMC_BCCU_EnableTrap: Invalid channel number", (chan_no <= (XMC_BCCU_NO_OF_CHANNELS-1))); + + bccu->CHOCON |= (uint32_t)(BCCU_CHOCON_CH0TPE_Msk << chan_no); +} + +/* + * API to disable the specific channel trap + */ +void XMC_BCCU_DisableTrap (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + XMC_ASSERT("XMC_BCCU_DisableTrap: Invalid channel number", (chan_no <= (XMC_BCCU_NO_OF_CHANNELS-1))); + + bccu->CHOCON &= ~(uint32_t)(BCCU_CHOCON_CH0TPE_Msk << chan_no); +} + +/* + * API to configure specific channel trigger enable and trigger line. + */ +void XMC_BCCU_EnableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_TRIGOUT_t trig_line) +{ + uint32_t reg; + XMC_ASSERT("XMC_BCCU_EnableChannelTrigger: Invalid channel number", (chan_no <= (XMC_BCCU_NO_OF_CHANNELS-1))); + + bccu->CHTRIG &= ~(uint32_t)(BCCU_CHTRIG_TOS0_Msk << chan_no); + reg = (uint32_t)(BCCU_CHTRIG_ET0_Msk << chan_no); + reg |= ((uint32_t)trig_line << (BCCU_CHTRIG_TOS0_Pos + chan_no)); + bccu->CHTRIG |= reg; +} + +/* + * API to disable specific channel + */ +void XMC_BCCU_DisableChannelTrigger (XMC_BCCU_t *const bccu, uint32_t chan_no) +{ + XMC_ASSERT("XMC_BCCU_DisableChannelTrigger: Invalid channel number", (chan_no <= (XMC_BCCU_NO_OF_CHANNELS-1))); + + bccu->CHTRIG &= ~(uint32_t)(BCCU_CHTRIG_ET0_Msk << chan_no); +} + +/* + * API to initialise the channel of a BCCU module + */ +void XMC_BCCU_CH_Init (XMC_BCCU_CH_t *const channel, const XMC_BCCU_CH_CONFIG_t *const config) +{ + channel->CHCONFIG = config->chconfig; + + channel->PKCMP = config->pkcmp; + + channel->PKCNTR = config->pkcntr; +} + +/* + * API to configure channel trigger edge and force trigger edge + */ +void XMC_BCCU_CH_ConfigTrigger (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_TRIG_EDGE_t edge, uint32_t force_trig_en) +{ + uint32_t reg; + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_TRED_Msk | BCCU_CH_CHCONFIG_ENFT_Msk); + + reg = ((uint32_t)edge << BCCU_CH_CHCONFIG_TRED_Pos); + reg |= (uint32_t)(force_trig_en << BCCU_CH_CHCONFIG_ENFT_Pos); + channel->CHCONFIG |= reg; +} + +/* + * API to configure the linear walker clock prescaler factor of a BCCU channel + */ +void XMC_BCCU_CH_SetLinearWalkPrescaler (XMC_BCCU_CH_t *const channel, uint32_t clk_div) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_LINPRES_Msk); + channel->CHCONFIG |= (uint32_t)(clk_div << BCCU_CH_CHCONFIG_LINPRES_Pos); +} + +/* + * API to set channel target intensity + */ +void XMC_BCCU_CH_SetTargetIntensity (XMC_BCCU_CH_t *const channel, uint32_t ch_int) +{ + channel->INTS = ch_int; +} + +/* + * API to retrieve the channel actual intensity + */ +uint32_t XMC_BCCU_CH_ReadIntensity (XMC_BCCU_CH_t *const channel) +{ + return (uint32_t)(channel->INT & BCCU_CH_INT_CHINT_Msk); +} + +/* + * API to enable packer. Also configures packer threshold, off-time and on-time compare levels + */ +void XMC_BCCU_CH_EnablePacker (XMC_BCCU_CH_t *const channel, uint32_t thresh, uint32_t off_comp, uint32_t on_comp) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_PEN_Msk | BCCU_CH_CHCONFIG_PKTH_Msk); + channel->CHCONFIG |= thresh; + channel->PKCMP = (off_comp | (uint32_t)(on_comp << BCCU_CH_PKCMP_ONCMP_Pos)); + channel->CHCONFIG |= (uint32_t)BCCU_CH_CHCONFIG_PEN_Msk; +} + +/* + * API to configure packer threshold + */ +void XMC_BCCU_CH_SetPackerThreshold (XMC_BCCU_CH_t *const channel, uint32_t val) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_PKTH_Msk); + channel->CHCONFIG |= val; +} + +/* + * API to configure packer off-time compare level + */ +void XMC_BCCU_CH_SetPackerOffCompare (XMC_BCCU_CH_t *const channel, uint32_t level) +{ + channel->PKCMP &= ~(uint32_t)(BCCU_CH_PKCMP_OFFCMP_Msk); + channel->PKCMP |= level; +} + +/* + * API to configure packer on-time compare level. + */ +void XMC_BCCU_CH_SetPackerOnCompare (XMC_BCCU_CH_t *const channel, uint32_t level) +{ + channel->PKCMP &= ~(uint32_t)(BCCU_CH_PKCMP_ONCMP_Msk); + channel->PKCMP |= (level << BCCU_CH_PKCMP_ONCMP_Pos); +} + +/* + * API to disable a packer. + */ +void XMC_BCCU_CH_DisablePacker (XMC_BCCU_CH_t *const channel) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_PEN_Msk); +} + +/* + * API to set packer off-time counter value + */ +void XMC_BCCU_CH_SetPackerOffCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val) +{ + channel->PKCNTR &= ~(uint32_t)(BCCU_CH_PKCNTR_OFFCNTVAL_Msk); + channel->PKCNTR |= cnt_val; +} + +/* + * API to set packer on-time counter value + */ +void XMC_BCCU_CH_SetPackerOnCounter (XMC_BCCU_CH_t *const channel, uint32_t cnt_val) +{ + channel->PKCNTR &= ~(uint32_t)(BCCU_CH_PKCNTR_ONCNTVAL_Msk); + channel->PKCNTR |= (uint32_t)(cnt_val << BCCU_CH_PKCNTR_ONCNTVAL_Pos); +} + +/* + * API to select the dimming engine of a channel + */ +void XMC_BCCU_CH_SelectDimEngine (XMC_BCCU_CH_t *const channel, XMC_BCCU_CH_DIMMING_SOURCE_t sel) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_DSEL_Msk); + channel->CHCONFIG |= ((uint32_t)sel << BCCU_CH_CHCONFIG_DSEL_Pos); +} + +/* + * API to bypass the dimming engine. And the brightness of channel is depending only on + * intensity of the channel. + */ +void XMC_BCCU_CH_EnableDimmingBypass (XMC_BCCU_CH_t *const channel) +{ + channel->CHCONFIG |= (uint32_t)(BCCU_CH_CHCONFIG_DBP_Msk); +} + +/* + * API to disable the bypass of dimming engine. And the brightness of channel is depending + * on intensity of channel and dimming level of dimming engine. + */ +void XMC_BCCU_CH_DisableDimmingBypass (XMC_BCCU_CH_t *const channel) +{ + channel->CHCONFIG &= ~(uint32_t)(BCCU_CH_CHCONFIG_DBP_Msk); +} + +/* + * API to initialise a specific dimming engine of a BCCU module + */ +void XMC_BCCU_DIM_Init (XMC_BCCU_DIM_t *const dim_engine, const XMC_BCCU_DIM_CONFIG_t *const config) +{ + dim_engine->DTT = config->dtt; +} + +/* + * API to set dimming engine target dim level + */ +void XMC_BCCU_DIM_SetTargetDimmingLevel (XMC_BCCU_DIM_t *const dim_engine, uint32_t level) +{ + dim_engine->DLS = level; +} + +/* + * API to configure the dimming clock prescaler factor of a dimming engine + */ +void XMC_BCCU_DIM_SetDimDivider (XMC_BCCU_DIM_t *const dim_engine, uint32_t div) +{ + dim_engine->DTT &= ~(uint32_t)(BCCU_DE_DTT_DIMDIV_Msk); + dim_engine->DTT |= div; +} + +/* + * API to configure the dimming curve + */ +void XMC_BCCU_DIM_ConfigDimCurve (XMC_BCCU_DIM_t *const dim_engine, uint32_t dither_en, XMC_BCCU_DIM_CURVE_t sel) +{ + uint32_t reg; + dim_engine->DTT &= ~(uint32_t)(BCCU_DE_DTT_DTEN_Msk | BCCU_DE_DTT_CSEL_Msk); + reg = (uint32_t)(dither_en << BCCU_DE_DTT_DTEN_Pos); + reg |= ((uint32_t)sel << BCCU_DE_DTT_CSEL_Pos); + dim_engine->DTT |= reg; +} + +#endif /* BCCU0 */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_can.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_can.c index 4748c42a..4bf50f8a 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_can.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_can.c @@ -1,12 +1,12 @@ /** * @file xmc_can.c - * @date 2015-10-27 + * @date 2016-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -53,6 +53,11 @@ * 2015-09-08: * - Fixed bug in XMC_CAN_Init()
* + * 2016-06-07: + * - Changed XMC_CAN_AllocateMOtoNodeList to wait for ready status of list controller + * + * 2015-06-20: + * - Fixed bug in XMC_CAN_MO_Config()
* @endcond * */ @@ -205,13 +210,14 @@ void XMC_CAN_NODE_NominalBitTimeConfigure (XMC_CAN_NODE_t *const can_node, /* Function to allocate message object from free list to node list */ void XMC_CAN_AllocateMOtoNodeList(XMC_CAN_t *const obj, const uint8_t node_num, const uint8_t mo_num) { - /* Panel Command for allocation of MO to node list */ - XMC_CAN_PanelControl(obj, XMC_CAN_PANCMD_STATIC_ALLOCATE,mo_num,(node_num + 1U)); - /* wait until panel as done the command */ - while (obj->PANCTR & CAN_PANCTR_BUSY_Msk) + /* wait while panel operation is in progress. */ + while (XMC_CAN_IsPanelControlReady(obj) == false) { /*Do nothing*/ }; + + /* Panel Command for allocation of MO to node list */ + XMC_CAN_PanelControl(obj, XMC_CAN_PANCMD_STATIC_ALLOCATE,mo_num,(node_num + 1U)); } /* Disable XMC_CAN Peripheral */ @@ -433,10 +439,13 @@ void XMC_CAN_MO_SetAcceptanceMask(XMC_CAN_MO_t *const can_mo,const uint32_t can_ void XMC_CAN_MO_Config(const XMC_CAN_MO_t *const can_mo) { uint32_t reg; + /* Configure MPN */ uint32_t num = ((uint32_t)(can_mo->can_mo_ptr) - CAN_BASE - 0x1000U)/0x0020U; - can_mo->can_mo_ptr->MOIPR = (((uint32_t)(num/32) << (CAN_MO_MOIPR_MPN_Pos + 5U)) | ((uint32_t)(num%32) << CAN_MO_MOIPR_MPN_Pos)); - + uint32_t set = (((uint32_t)(num/32) << (CAN_MO_MOIPR_MPN_Pos + 5U)) | ((uint32_t)(num%32) << CAN_MO_MOIPR_MPN_Pos)); + can_mo->can_mo_ptr->MOIPR &= ~(CAN_MO_MOIPR_MPN_Msk); + can_mo->can_mo_ptr->MOIPR |= set; + if (((can_mo->can_id_mode != (uint32_t) XMC_CAN_FRAME_TYPE_STANDARD_11BITS) && (can_mo->can_id_mode != (uint32_t) XMC_CAN_FRAME_TYPE_EXTENDED_29BITS)) || ((can_mo->can_mo_type != XMC_CAN_MO_TYPE_RECMSGOBJ) && diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu4.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu4.c index 0bf274b4..b2afb166 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu4.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu4.c @@ -1,12 +1,12 @@ /** * @file xmc_ccu4.c - * @date 2015-10-27 + * @date 2015-10-07 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu8.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu8.c index 01da1e63..8a1cd615 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu8.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ccu8.c @@ -1,12 +1,12 @@ /** * @file xmc_ccu8.c - * @date 2015-10-27 + * @date 2015-10-07 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_common.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_common.c index 55f92844..174a85dc 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_common.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_common.c @@ -1,12 +1,12 @@ /** * @file xmc_common.c - * @date 2015-10-27 + * @date 2015-02-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -58,7 +58,7 @@ struct list *******************************************************************************/ #if defined(XMC_ASSERT_ENABLE) && !defined(XMC_USER_ASSERT_FUNCTION) -void XMC_AssertHandler(const char *const msg, const char *const file, uint32_t line) +__WEAK void XMC_AssertHandler(const char *const msg, const char *const file, uint32_t line) { while(1) { diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dac.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dac.c index 3d09a82c..2325e1fd 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dac.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dac.c @@ -1,12 +1,12 @@ /** * @file xmc_dac.c - * @date 2015-10-27 + * @date 2015-06-19 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dma.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dma.c index 5947f097..d4f0b934 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dma.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dma.c @@ -1,13 +1,13 @@ /** * @file xmc_dma.c - * @date 2015-10-27 + * @date 2016-04-08 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -54,6 +54,15 @@ * on advanced DMA channels)
* - Updated XMC_DMA_CH_Disable()
* + * 2016-03-09: + * - Optimize write only registers + * + * 2016-04-08: + * - Update XMC_DMA_CH_EnableEvent and XMC_DMA_CH_DisableEvent. + * Write optimization of MASKCHEV + * - Fix XMC_DMA_IRQHandler, clear channel event status before processing the event handler. + * It corrects event losses if the DMA triggered in the event handler finished before returning from handler. + * * @endcond */ @@ -269,12 +278,12 @@ void XMC_DMA_ClearOverrunStatus(XMC_DMA_t *const dma, const uint8_t line) if (dma == XMC_DMA0) { #endif - DLR->OVRCLR |= (uint32_t)(0x1UL << line); + DLR->OVRCLR = (uint32_t)(0x1UL << line); #if defined(GPDMA1) } else { - DLR->OVRCLR |= (uint32_t)(0x100UL << line); + DLR->OVRCLR = (uint32_t)(0x100UL << line); } #endif } @@ -469,7 +478,7 @@ void XMC_DMA_CH_EnableEvent(XMC_DMA_t *const dma, const uint8_t channel, const u { if (event & ((uint32_t)0x1UL << event_idx)) { - dma->MASKCHEV[event_idx * 2UL] |= ((uint32_t)0x101UL << channel); + dma->MASKCHEV[event_idx * 2UL] = ((uint32_t)0x101UL << channel); } } } @@ -483,7 +492,7 @@ void XMC_DMA_CH_DisableEvent(XMC_DMA_t *const dma, const uint8_t channel, const { if (event & ((uint32_t)0x1UL << event_idx)) { - dma->MASKCHEV[event_idx * 2UL] |= ((uint32_t)0x100UL << channel); + dma->MASKCHEV[event_idx * 2UL] = ((uint32_t)0x100UL << channel); } } } @@ -672,16 +681,15 @@ void XMC_DMA_IRQHandler(XMC_DMA_t *const dma) mask = (uint32_t)1U << channel; if ((event & mask) != 0) { - event_handler = dma_event_handlers[channel]; + XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)XMC_DMA_CH_EVENT_ERROR); /* Call user callback to handle event */ + event_handler = dma_event_handlers[channel]; if (event_handler != NULL) { event_handler(XMC_DMA_CH_EVENT_ERROR); } - - XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)XMC_DMA_CH_EVENT_ERROR); - + break; } ++channel; @@ -695,18 +703,17 @@ void XMC_DMA_IRQHandler(XMC_DMA_t *const dma) mask = (uint32_t)1U << channel; if (event & mask) { - event_handler = dma_event_handlers[channel]; - - /* Call user callback to handle event */ - if (event_handler != NULL) - { - event_handler(XMC_DMA_CH_EVENT_TRANSFER_COMPLETE); - } - XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)((uint32_t)XMC_DMA_CH_EVENT_TRANSFER_COMPLETE | (uint32_t)XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE | (uint32_t)XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE | (uint32_t)XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE)); + + /* Call user callback to handle event */ + event_handler = dma_event_handlers[channel]; + if (event_handler != NULL) + { + event_handler(XMC_DMA_CH_EVENT_TRANSFER_COMPLETE); + } break; } @@ -721,17 +728,17 @@ void XMC_DMA_IRQHandler(XMC_DMA_t *const dma) mask = (uint32_t)1U << channel; if (event & mask) { - event_handler = dma_event_handlers[channel]; + XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)((uint32_t)XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE | + (uint32_t)XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE | + (uint32_t)XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE)); /* Call user callback to handle event */ + event_handler = dma_event_handlers[channel]; if (event_handler != NULL) { event_handler(XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE); } - XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)((uint32_t)XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE | - (uint32_t)XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE | - (uint32_t)XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE)); break; } ++channel; @@ -745,15 +752,14 @@ void XMC_DMA_IRQHandler(XMC_DMA_t *const dma) mask = (uint32_t)1U << channel; if (event & mask) { - event_handler = dma_event_handlers[channel]; + XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE); /* Call user callback to handle event */ + event_handler = dma_event_handlers[channel]; if (event_handler != NULL) { event_handler(XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE); } - - XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)XMC_DMA_CH_EVENT_SRC_TRANSACTION_COMPLETE); break; } @@ -768,15 +774,14 @@ void XMC_DMA_IRQHandler(XMC_DMA_t *const dma) mask = (uint32_t)1U << channel; if (event & mask) { - event_handler = dma_event_handlers[channel]; + XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE); /* Call user callback to handle event */ + event_handler = dma_event_handlers[channel]; if (event_handler != NULL) { event_handler(XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE); - } - - XMC_DMA_CH_ClearEventStatus(dma, (uint8_t)channel, (uint32_t)XMC_DMA_CH_EVENT_DST_TRANSACTION_COMPLETE); + } break; } diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dsd.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dsd.c index d3258fbe..73b7ba44 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dsd.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_dsd.c @@ -1,12 +1,12 @@ /** * @file xmc_dsd.c - * @date 2015-10-27 + * @date 2015-09-18 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ebu.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ebu.c index e89a531b..d938b2f4 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ebu.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ebu.c @@ -1,12 +1,12 @@ /** * @file xmc_ebu.c - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ecat.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ecat.c new file mode 100644 index 00000000..40acd30c --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ecat.c @@ -0,0 +1,198 @@ + +/** + * @file xmc_ecat.c + * @date 2015-10-21 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-12-27: + * - Add clock gating control in enable/disable APIs + * + * 2015-10-21: + * - Initial Version + * + * @endcond + */ + +/******************************************************************************* + * HEADER FILES + *******************************************************************************/ + +#include + +#if defined (ECAT0) + +#include + +/******************************************************************************* + * MACROS + *******************************************************************************/ + +/******************************************************************************* + * API IMPLEMENTATION + *******************************************************************************/ +/* The function defines the access state to the MII management for the PDI interface*/ +__STATIC_INLINE void XMC_ECAT_lRequestPhyAccessToMII(void) +{ + ECAT0->MII_PDI_ACS_STATE |= 0x01; +} + +/* EtherCAT module clock ungating and deassert reset API (Enables ECAT) */ +void XMC_ECAT_Enable(void) +{ + XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_ECAT0); + XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_ECAT0); + + while (XMC_SCU_RESET_IsPeripheralResetAsserted(XMC_SCU_PERIPHERAL_RESET_ECAT0) == true){} +} + +/* EtherCAT module clock gating and assert reset API (Disables ECAT)*/ +void XMC_ECAT_Disable(void) +{ + XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_ECAT0); + while (XMC_SCU_RESET_IsPeripheralResetAsserted(XMC_SCU_PERIPHERAL_RESET_ECAT0) == false){} + + XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_ECAT0); +} + +/* EtherCAT initialization function */ +void XMC_ECAT_Init(XMC_ECAT_CONFIG_t *const config) +{ + XMC_ECAT_Enable(); + + /* The process memory is not accessible until the ESC Configuration Area is loaded successfully. */ + + /* words 0x0-0x3 */ + ECAT0->EEP_DATA[0U] = config->dword[0U]; + ECAT0->EEP_DATA[1U] = config->dword[1U]; + ECAT0->EEP_CONT_STAT |= (uint16_t)((uint16_t)0x4U << (uint16_t)ECAT_EEP_CONT_STAT_CMD_REG_Pos); + + /* words 0x4-0x7 */ + ECAT0->EEP_DATA[0U] = config->dword[2U]; + ECAT0->EEP_DATA[1U] = config->dword[3U]; + ECAT0->EEP_CONT_STAT |= (uint16_t)((uint16_t)0x4U << (uint16_t)ECAT_EEP_CONT_STAT_CMD_REG_Pos); + + while (ECAT0->EEP_CONT_STAT & ECAT_EEP_CONT_STAT_L_STAT_Msk) + { + /* Wait until the EEPROM_Loaded signal is active */ + } + +} + +/* EtherCAT application event enable API */ +void XMC_ECAT_EnableEvent(uint32_t event) +{ + ECAT0->AL_EVENT_MASK |= event; +} +/* EtherCAT application event disable API */ +void XMC_ECAT_DisableEvent(uint32_t event) +{ + ECAT0->AL_EVENT_MASK &= ~event; +} + +/* EtherCAT application event status reading API */ +uint32_t XMC_ECAT_GetEventStatus(void) +{ + return (ECAT0->AL_EVENT_REQ); +} + +/* EtherCAT SyncManager channel disable function*/ +void XMC_ECAT_DisableSyncManChannel(const uint8_t channel) +{ + ((ECAT0_SM_Type *)(void*)((uint8_t *)(void*)ECAT0_SM0 + (channel * 8U)))->SM_PDI_CTR |= 0x1U; +} + +/* EtherCAT SyncManager channel enable function*/ +void XMC_ECAT_EnableSyncManChannel(const uint8_t channel) +{ + ((ECAT0_SM_Type *)(void*)((uint8_t *)(void*)ECAT0_SM0 + (channel * 8U)))->SM_PDI_CTR &= (uint8_t)(~0x1U); +} + + +/* EtherCAT PHY register read function*/ +XMC_ECAT_STATUS_t XMC_ECAT_ReadPhy(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) +{ + XMC_ECAT_STATUS_t status; + + XMC_ECAT_lRequestPhyAccessToMII(); + + ECAT0->MII_PHY_ADR = phy_addr; + ECAT0->MII_PHY_REG_ADR = reg_addr; + + ECAT0->MII_CONT_STAT |= 0x0100U; /* read instruction */ + while ((ECAT0->MII_CONT_STAT & ECAT_MII_CONT_STAT_BUSY_Msk) != 0U){} + + if ((ECAT0->MII_CONT_STAT & ECAT_MII_CONT_STAT_ERROR_Msk) != 0U) + { + ECAT0->MII_CONT_STAT &= ~ECAT_MII_CONT_STAT_CMD_REG_Msk; /* Clear error */ + status = XMC_ECAT_STATUS_ERROR; + } + else + { + *data = (uint16_t)ECAT0->MII_PHY_DATA; + status = XMC_ECAT_STATUS_OK; + } + + return status; +} + +/* EtherCAT PHY register write function*/ +XMC_ECAT_STATUS_t XMC_ECAT_WritePhy(uint8_t phy_addr, uint8_t reg_addr, uint16_t data) +{ + XMC_ECAT_STATUS_t status; + + XMC_ECAT_lRequestPhyAccessToMII(); + + ECAT0->MII_PHY_ADR = phy_addr; + ECAT0->MII_PHY_REG_ADR = reg_addr; + ECAT0->MII_PHY_DATA = data; + + ECAT0->MII_CONT_STAT |= 0x0200U; /* write instruction */ + while ((ECAT0->MII_CONT_STAT & ECAT_MII_CONT_STAT_BUSY_Msk) != 0U){} + + if ((ECAT0->MII_CONT_STAT & ECAT_MII_CONT_STAT_ERROR_Msk) != 0U) + { + ECAT0->MII_CONT_STAT &= ~ECAT_MII_CONT_STAT_CMD_REG_Msk; /* Clear error */ + status = XMC_ECAT_STATUS_ERROR; + } + else + { + status = XMC_ECAT_STATUS_OK; + } + + return status; +} + +#endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eru.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eru.c index 1be4177b..e7eb30cf 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eru.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eru.c @@ -1,12 +1,12 @@ /** * @file xmc_eru.c - * @date 2015-10-27 + * @date 2016-03-10 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -42,6 +42,9 @@ * 2015-06-20: * - Removed definition of GetDriverVersion API
* + * 2016-03-10: + * - XMC_ERU_ETL_GetEdgeDetection() API is added to get the configured edge for event generation.
+ * * @endcond */ @@ -190,6 +193,14 @@ void XMC_ERU_ETL_SetEdgeDetection(XMC_ERU_t *const eru, eru->EXICON_b[channel].ED = (uint8_t)edge_detection; } +/* Returns the configured event trigger edge/s by reading (RE, FE) bits of EXICONx(x = [0 to 3]) register. */ +XMC_ERU_ETL_EDGE_DETECTION_t XMC_ERU_ETL_GetEdgeDetection(XMC_ERU_t *const eru, const uint8_t channel) +{ + XMC_ASSERT("XMC_ERU_ETL_GetEdgeDetection:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru)); + XMC_ASSERT("XMC_ERU_ETL_GetEdgeDetection:Invalid Channel Number", (channel < 4U)); + return ((XMC_ERU_ETL_EDGE_DETECTION_t)(eru->EXICON_b[channel].ED)); +} + /* Set the status flag bit(FL) in EXICONx(x = [0 to 3]). */ void XMC_ERU_ETL_SetStatusFlagMode(XMC_ERU_t *const eru, const uint8_t channel, diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eth_mac.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eth_mac.c index a42f37e7..8d04e09d 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eth_mac.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_eth_mac.c @@ -1,13 +1,13 @@ /** * @file xmc_eth_mac.c - * @date 2015-10-27 + * @date 2016-08-30 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -37,12 +37,24 @@ * Change History * -------------- * + * 2015-06-20: + * - Initial + * * 2015-09-01: * - Add clock gating control in enable/disable APIs * - Add transmit polling if run out of buffers * - * 2015-06-20: - * - Initial + * 2015-11-30: + * - Fix XMC_ETH_MAC_GetRxFrameSize return value in case of errors + * + * 2016-03-16: + * - Fix XMC_ETH_MAC_DisableEvent + * + * 2016-05-19: + * - Changed XMC_ETH_MAC_ReturnTxDescriptor and XMC_ETH_MAC_ReturnRxDescriptor + * + * 2016-08-30: + * - Changed XMC_ETH_MAC_Init() to disable MMC interrupt events * * @endcond */ @@ -82,57 +94,6 @@ #define XMC_ETH_MAC_MDC_DIVIDER_102 (4U << ETH_GMII_ADDRESS_CR_Pos) /**< MDC clock: ETH clock/102 */ #define XMC_ETH_MAC_MDC_DIVIDER_124 (5U << ETH_GMII_ADDRESS_CR_Pos) /**< MDC clock: ETH clock/124 */ -/** - * TDES0 Descriptor TX Packet Control/Status - */ -#define ETH_MAC_DMA_TDES0_OWN (0x80000000U) /**< Own bit 1=DMA, 0=CPU */ -#define ETH_MAC_DMA_TDES0_IC (0x40000000U) /**< Interrupt on competition */ -#define ETH_MAC_DMA_TDES0_LS (0x20000000U) /**< Last segment */ -#define ETH_MAC_DMA_TDES0_FS (0x10000000U) /**< First segment */ -#define ETH_MAC_DMA_TDES0_DC (0x08000000U) /**< Disable CRC */ -#define ETH_MAC_DMA_TDES0_DP (0x04000000U) /**< Disable pad */ -#define ETH_MAC_DMA_TDES0_TTSE (0x02000000U) /**< Transmit time stamp enable */ -#define ETH_MAC_DMA_TDES0_CIC (0x00C00000U) /**< Checksum insertion control */ -#define ETH_MAC_DMA_TDES0_TER (0x00200000U) /**< Transmit end of ring */ -#define ETH_MAC_DMA_TDES0_TCH (0x00100000U) /**< Second address chained */ -#define ETH_MAC_DMA_TDES0_TTSS (0x00020000U) /**< Transmit time stamp status */ -#define ETH_MAC_DMA_TDES0_IHE (0x00010000U) /**< IP header error */ -#define ETH_MAC_DMA_TDES0_ES (0x00008000U) /**< Error summary */ -#define ETH_MAC_DMA_TDES0_JT (0x00004000U) /**< Jabber timeout */ -#define ETH_MAC_DMA_TDES0_FF (0x00002000U) /**< Frame flushed */ -#define ETH_MAC_DMA_TDES0_IPE (0x00001000U) /**< IP payload error */ -#define ETH_MAC_DMA_TDES0_LOC (0x00000800U) /**< Loss of carrier */ -#define ETH_MAC_DMA_TDES0_NC (0x00000400U) /**< No carrier */ -#define ETH_MAC_DMA_TDES0_LC (0x00000200U) /**< Late collision */ -#define ETH_MAC_DMA_TDES0_EC (0x00000100U) /**< Excessive collision */ -#define ETH_MAC_DMA_TDES0_VF (0x00000080U) /**< VLAN frame */ -#define ETH_MAC_DMA_TDES0_CC (0x00000078U) /**< Collision count */ -#define ETH_MAC_DMA_TDES0_ED (0x00000004U) /**< Excessive deferral */ -#define ETH_MAC_DMA_TDES0_UF (0x00000002U) /**< Underflow error */ -#define ETH_MAC_DMA_TDES0_DB (0x00000001U) /**< Deferred bit */ - -/** - * RDES0 Descriptor RX Packet Status - */ -#define ETH_MAC_DMA_RDES0_OWN (0x80000000U) /**< Own bit 1=DMA, 0=CPU */ -#define ETH_MAC_DMA_RDES0_AFM (0x40000000U) /**< Destination address filter fail */ -#define ETH_MAC_DMA_RDES0_FL (0x3FFF0000U) /**< Frame length mask */ -#define ETH_MAC_DMA_RDES0_ES (0x00008000U) /**< Error summary */ -#define ETH_MAC_DMA_RDES0_DE (0x00004000U) /**< Descriptor error */ -#define ETH_MAC_DMA_RDES0_SAF (0x00002000U) /**< Source address filter fail */ -#define ETH_MAC_DMA_RDES0_LE (0x00001000U) /**< Length error */ -#define ETH_MAC_DMA_RDES0_OE (0x00000800U) /**< Overflow error */ -#define ETH_MAC_DMA_RDES0_VLAN (0x00000400U) /**< VLAN tag */ -#define ETH_MAC_DMA_RDES0_FS (0x00000200U) /**< First descriptor */ -#define ETH_MAC_DMA_RDES0_LS (0x00000100U) /**< Last descriptor */ -#define ETH_MAC_DMA_RDES0_TSA (0x00000080U) /**< Timestamp available */ -#define ETH_MAC_DMA_RDES0_LC (0x00000040U) /**< Late collision */ -#define ETH_MAC_DMA_RDES0_FT (0x00000020U) /**< Frame type */ -#define ETH_MAC_DMA_RDES0_RWT (0x00000010U) /**< Receive watchdog timeout */ -#define ETH_MAC_DMA_RDES0_RE (0x00000008U) /**< Receive error */ -#define ETH_MAC_DMA_RDES0_DBE (0x00000004U) /**< Dribble bit error */ -#define ETH_MAC_DMA_RDES0_CE (0x00000002U) /**< CRC error */ -#define ETH_MAC_DMA_RDES0_ESA (0x00000001U) /**< Extended Status/Rx MAC address */ /** * RDES1 Descriptor RX Packet Control @@ -141,6 +102,7 @@ #define ETH_MAC_DMA_RDES1_RER (0x00008000U) /**< Receive end of ring */ #define ETH_MAC_DMA_RDES1_RCH (0x00004000U) /**< Second address chained */ #define ETH_MAC_DMA_RDES1_RBS1 (0x00001FFFU) /**< Receive buffer 1 size */ +#define ETH_MAC_MMC_INTERRUPT_MSK (0x03ffffffU) /**< Bit mask to disable MMMC transmit and receive interrupts*/ /** * Normal MAC events @@ -237,6 +199,10 @@ XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_Init(XMC_ETH_MAC_t *const eth_mac) /* Clear interrupts */ eth_mac->regs->STATUS = 0xFFFFFFFFUL; + /* Disable MMC interrupt events */ + eth_mac->regs->MMC_TRANSMIT_INTERRUPT_MASK = ETH_MAC_MMC_INTERRUPT_MSK; + eth_mac->regs->MMC_RECEIVE_INTERRUPT_MASK = ETH_MAC_MMC_INTERRUPT_MSK; + eth_mac->frame_end = NULL; return status; @@ -325,7 +291,7 @@ XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_SendFrame(XMC_ETH_MAC_t *const eth_mac, const u uint32_t ctrl; XMC_ASSERT("XMC_ETH_MAC_SendFrame:", eth_mac != NULL); - XMC_ASSERT("XMC_ETH_MAC_SendFrame:", eth_mac->regs != ETH0); + XMC_ASSERT("XMC_ETH_MAC_SendFrame:", eth_mac->regs == ETH0); XMC_ASSERT("XMC_ETH_MAC_SendFrame:", (frame != NULL) && (len > 0)); dst = eth_mac->frame_end; @@ -405,7 +371,7 @@ uint32_t XMC_ETH_MAC_ReadFrame(XMC_ETH_MAC_t *const eth_mac, uint8_t *frame, uin uint8_t const *src; XMC_ASSERT("XMC_ETH_MAC_ReadFrame:", eth_mac != NULL); - XMC_ASSERT("XMC_ETH_MAC_ReadFrame:", eth_mac->regs != ETH0); + XMC_ASSERT("XMC_ETH_MAC_ReadFrame:", eth_mac->regs == ETH0); XMC_ASSERT("XMC_ETH_MAC_ReadFrame:", (frame != NULL) && (len > 0)); /* Fast-copy data to packet buffer */ @@ -445,16 +411,18 @@ uint32_t XMC_ETH_MAC_GetRxFrameSize(XMC_ETH_MAC_t *const eth_mac) /* Owned by DMA */ len = 0U; } - - if (((status & ETH_MAC_DMA_RDES0_ES) != 0U) || - ((status & ETH_MAC_DMA_RDES0_FS) == 0U) || - ((status & ETH_MAC_DMA_RDES0_LS) == 0U)) { + else if (((status & ETH_MAC_DMA_RDES0_ES) != 0U) || + ((status & ETH_MAC_DMA_RDES0_FS) == 0U) || + ((status & ETH_MAC_DMA_RDES0_LS) == 0U)) + { /* Error, this block is invalid */ len = 0xFFFFFFFFU; } - - /* Subtract CRC */ - len = ((status & ETH_MAC_DMA_RDES0_FL) >> 16U) - 4U; + else + { + /* Subtract CRC */ + len = ((status & ETH_MAC_DMA_RDES0_FL) >> 16U) - 4U; + } return len; } @@ -633,7 +601,7 @@ void XMC_ETH_MAC_DisableEvent(XMC_ETH_MAC_t *const eth_mac, uint32_t event) eth_mac->regs->INTERRUPT_MASK |= event >> 16U; - event &= (uint16_t)~0xffffU; + event &= 0x7fffU; eth_mac->regs->INTERRUPT_ENABLE &= ~event; } @@ -671,18 +639,26 @@ uint32_t XMC_ETH_MAC_GetEventStatus(const XMC_ETH_MAC_t *const eth_mac) void XMC_ETH_MAC_ReturnRxDescriptor(XMC_ETH_MAC_t *const eth_mac) { eth_mac->rx_desc[eth_mac->rx_index].status |= ETH_MAC_DMA_RDES0_OWN; + eth_mac->rx_index++; + if (eth_mac->rx_index == eth_mac->num_rx_buf) + { + eth_mac->rx_index = 0U; + } } /* Return TX descriptor */ void XMC_ETH_MAC_ReturnTxDescriptor(XMC_ETH_MAC_t *const eth_mac) { - eth_mac->tx_desc[eth_mac->tx_index].status |= ETH_MAC_DMA_TDES0_OWN; -} + eth_mac->tx_ts_index = eth_mac->tx_index; -/* Is TX descriptor owned by DMA? */ -bool XMC_ETH_MAC_IsTxDescriptorOwnedByDma(XMC_ETH_MAC_t *const eth_mac) -{ - return ((eth_mac->tx_desc[eth_mac->tx_index].status & ETH_MAC_DMA_TDES0_OWN) != 0U); + eth_mac->tx_desc[eth_mac->tx_index].status |= ETH_MAC_DMA_TDES0_CIC |ETH_MAC_DMA_TDES0_OWN; + eth_mac->tx_index++; + if (eth_mac->tx_index == eth_mac->num_tx_buf) + { + eth_mac->tx_index = 0U; + } + + eth_mac->frame_end = NULL; } /* Set VLAN tag */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_fce.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_fce.c index 65b413cf..13a66837 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_fce.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_fce.c @@ -1,12 +1,12 @@ /** * @file xmc_fce.c - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_gpio.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_gpio.c index b8bdd895..2c8dc145 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_gpio.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_gpio.c @@ -1,12 +1,12 @@ /** * @file xmc_gpio.c - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_hrpwm.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_hrpwm.c index cf2a4c84..48258c5e 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_hrpwm.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_hrpwm.c @@ -1,13 +1,13 @@ /** * @file xmc_hrpwm.c - * @date 2015-10-27 + * @date 2015-07-14 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2c.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2c.c index a6c28847..ad2b810f 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2c.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2c.c @@ -1,12 +1,12 @@ /** * @file xmc_i2c.c - * @date 2015-10-27 + * @date 2015-10-02 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2s.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2s.c index da05947d..de0822f2 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2s.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_i2s.c @@ -1,12 +1,12 @@ /** * @file xmc_i2s.c - * @date 2015-10-27 + * @date 2015-06-30 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -49,6 +49,16 @@ * 2015-09-28: * - Fixed bugs in the XMC_I2S_CH_Init() and in the ASSERTs
* + * 2015-11-04: + * - Modified the check of XMC_USIC_CH_GetTransmitBufferStatus() in the XMC_I2S_CH_Transmit() API
+ * + * 2016-06-30: + * - Modified XMC_I2S_CH_Init: + * + change default passive level to 0 + * + Call XMC_I2S_CH_SetSystemWordLength() to set the system frame length equal to the frame length. + * - Modified XMC_I2S_CH_SetBaudrate: + * + Optional Master clock output signal generated with a fixed phase relation to SCLK. + * * @endcond * */ @@ -67,7 +77,8 @@ /********************************************************************************************************************* * MACROS ********************************************************************************************************************/ -#define XMC_I2S_CH_OVERSAMPLING (2UL) +/* To take into account the SCLK divider by 2 and the PPPEN divider (see Divider Mode Counter figure in RM) */ +#define XMC_I2S_CH_OVERSAMPLING (4UL) /********************************************************************************************************************* * API IMPLEMENTATION @@ -87,12 +98,10 @@ void XMC_I2S_CH_Init(XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CONFIG_t *co } /* Configuration of USIC Shift Control */ /* Transmission Mode (TRM) = 1 */ - /* Passive Data Level (PDL) = 1 */ - channel->SCTR = (uint32_t)(((uint32_t)(USIC_CH_SCTR_PDL_Msk | - (uint32_t)(0x3UL << USIC_CH_SCTR_TRM_Pos)) | - (uint32_t)((uint32_t)((uint32_t)config->frame_length -1U) << USIC_CH_SCTR_FLE_Pos)) | - (uint32_t)((uint32_t)((uint32_t)((uint32_t)config->data_bits -1U) << USIC_CH_SCTR_WLE_Pos) | - (uint32_t)USIC_CH_SCTR_SDIR_Msk)); + channel->SCTR = (uint32_t)(0x3UL << USIC_CH_SCTR_TRM_Pos) | + (uint32_t)((config->frame_length -1U) << USIC_CH_SCTR_FLE_Pos) | + (uint32_t)((config->data_bits - 1U) << USIC_CH_SCTR_WLE_Pos) | + USIC_CH_SCTR_SDIR_Msk; /* Configuration of USIC Transmit Control/Status Register */ /* TBUF Data Enable (TDEN) = 1 */ @@ -111,10 +120,14 @@ void XMC_I2S_CH_Init(XMC_USIC_CH_t *const channel, const XMC_I2S_CH_CONFIG_t *co /* Configuration of Protocol Control Register */ channel->PCR_IISMode = (uint32_t)USIC_CH_PCR_IISMode_WAGEN_Msk; } + /* Configuration of Protocol Control Register */ channel->PCR_IISMode |= (uint32_t)(USIC_CH_PCR_IISMode_DTEN_Msk | (uint32_t)config->wa_inversion) | ((uint32_t)((uint32_t)config->data_delayed_sclk_periods - 1U) << USIC_CH_PCR_IISMode_TDEL_Pos); + + XMC_I2S_CH_SetSystemWordLength(channel, config->frame_length); + /* Clear protocol status */ channel->PSCR = 0xFFFFFFFFUL; } @@ -131,7 +144,8 @@ XMC_I2S_CH_STATUS_t XMC_I2S_CH_SetBaudrate(XMC_USIC_CH_t *const channel, const u if (XMC_USIC_CH_SetBaudrate(channel, rate, XMC_I2S_CH_OVERSAMPLING) == XMC_USIC_CH_STATUS_OK) { channel->BRG = (uint32_t)((channel->BRG & ~(USIC_CH_BRG_CTQSEL_Msk)) | - (0x2UL << USIC_CH_BRG_CTQSEL_Pos)); + (0x2UL << USIC_CH_BRG_CTQSEL_Pos)) | + USIC_CH_BRG_PPPEN_Msk; status = XMC_I2S_CH_STATUS_OK; } @@ -192,7 +206,7 @@ void XMC_I2S_CH_Transmit(XMC_USIC_CH_t *const channel, const uint16_t data, cons /* Check FIFO size */ if ((channel->TBCTR & USIC_CH_TBCTR_SIZE_Msk) == 0U) { - while((uint32_t)XMC_USIC_CH_GetTransmitBufferStatus(channel) & (uint32_t)XMC_USIC_CH_TBUF_STATUS_BUSY) + while((uint32_t)XMC_USIC_CH_GetTransmitBufferStatus(channel) == (uint32_t)XMC_USIC_CH_TBUF_STATUS_BUSY) { } diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ledts.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ledts.c index 2ea5602f..6377321a 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ledts.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_ledts.c @@ -1,12 +1,12 @@ /** * @file xmc_ledts.c - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_math.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_math.c new file mode 100644 index 00000000..dc436810 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_math.c @@ -0,0 +1,463 @@ + +/** + * @file xmc_math.c + * @date 2015-10-08 + * + * @cond + ********************************************************************************** + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification,are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share + * modifications, enhancements or bug fixes with Infineon Technologies AG + * dave@infineon.com). + ********************************************************************************** + * + * Change History + * -------------- + * + * 2015-06-20: + * - Removed version macros and declaration of GetDriverVersion API
+ * - Updated copyright and change history section. + * + * 2015-09-23: + * - Added SQRT functions + * + * 2015-10-08: + * - Return values for sin(), cos(), sinh(), cosh(), arctan() are corrected. + * + * @endcond + * + */ + +/** + * + * @brief MATH driver - API implementation for XMC13 family MATH libraries.
+ * + * Detailed description of file
+ * APIs provided in this file cover the following functional blocks of MATH:
+ * + */ + +/********************************************************************************************************************* + * HEADER FILES + ********************************************************************************************************************/ +#include + +#if defined (MATH) +/********************************************************************************************************************* + * MACROS + ********************************************************************************************************************/ +/* Reciprocal of Circular gain in XMC_MATH_Q0_23_t format ((2^23)/1.646760258121) */ +#define XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023 (0x4DBA76U) +/* Reciprocal of Hyperbolic gain in XMC_MATH_Q1_22_t format ((2^22)/0.828159360960) */ +#define XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22 (0x4D47A1U) +/* Signed division is selected */ +#define XMC_MATH_SIGNED_DIVISION ((uint32_t) 0 << MATH_DIVCON_USIGN_Pos) +/* Unsigned division is selected */ +#define XMC_MATH_UNSIGNED_DIVISION ((uint32_t) 1 << MATH_DIVCON_USIGN_Pos) + +/********************************************************************************************************************* + * ENUMS + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * GLOBAL DATA + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * DATA STRUCTURES + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * LOCAL ROUTINES + ********************************************************************************************************************/ + +/********************************************************************************************************************* + * API IMPLEMENTATION - Utility functions + ********************************************************************************************************************/ + +/* Utility function to check if the DIV unit is busy */ +bool XMC_MATH_DIV_IsBusy(void) +{ + bool status; + if (MATH->DIVST & MATH_DIVST_BSY_Msk) + { + status = true; /* DIV unit is busy running a division operation */ + } + else + { + status = false; /* DIV unit is idle */ + } + + return (status); +} + +/* Utility function to check if the CORDIC unit is busy */ +bool XMC_MATH_CORDIC_IsBusy(void) +{ + bool status; + if (MATH->STATC & MATH_STATC_BSY_Msk) + { + status = true; /* CORDIC unit is busy running an operation */ + } + else + { + status = false; /* CORDIC unit is idle */ + } + + return (status); +} + +/* This functions returns the status of a requested event */ +bool XMC_MATH_GetEventStatus(const XMC_MATH_EVENT_t event) +{ + bool status; + if (MATH->EVFR & (uint32_t) event) + { + status = true; /* Requested event has been detected */ + } + else + { + status = false; /* Requested event has not been detected */ + } + return (status); +} + +#ifndef XMC_MATH_DISABLE_DIV_ABI +/*********************************************************************************************************************** + * API IMPLEMENTATION - aeabi routines + **********************************************************************************************************************/ +/* This function performs unsigned integer division */ +uint32_t __aeabi_uidiv(uint32_t dividend, uint32_t divisor) +{ + MATH->DIVCON = XMC_MATH_UNSIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; + + return ((uint32_t) MATH->QUOT); +} + +/* This function performs signed integer division */ +int32_t __aeabi_idiv(int32_t dividend, int32_t divisor) +{ + MATH->DIVCON = XMC_MATH_SIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; + + return ((int32_t) MATH->QUOT); +} + +/* This function performs unsigned integer division modulo */ +uint64_t __aeabi_uidivmod(uint32_t dividend, uint32_t divisor) +{ + uint64_t remainder; + + MATH->DIVCON = XMC_MATH_UNSIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; + + remainder = ((uint64_t) MATH->RMD) << 32U; + return (remainder | MATH->QUOT); +} + +/* This function performs signed integer division modulo */ +int64_t __aeabi_idivmod(int32_t dividend, int32_t divisor) +{ + uint64_t remainder; + uint64_t result; + + MATH->DIVCON = XMC_MATH_SIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; + + remainder = ((uint64_t) MATH->RMD) << 32U; + result = (remainder | MATH->QUOT); + return ((int64_t) result); +} +#endif + +/*********************************************************************************************************************** + * API IMPLEMENTATION - Blocking functions + **********************************************************************************************************************/ +/* This function computes the cosine of a given angle in radians */ +XMC_MATH_Q0_23_t XMC_MATH_CORDIC_Cos(XMC_MATH_Q0_23_t angle_in_radians) +{ + int32_t result; + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t) angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023 << MATH_CORDX_DATA_Pos; + result = ((int32_t)MATH->CORRX) >> MATH_CORRX_RESULT_Pos; + return ((XMC_MATH_Q0_23_t) result); +} + +/* This function computes the sine of a given angle in radians */ +XMC_MATH_Q0_23_t XMC_MATH_CORDIC_Sin(XMC_MATH_Q0_23_t angle_in_radians) +{ + int32_t result; + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t)angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023 << MATH_CORDX_DATA_Pos; + result = ((int32_t)MATH->CORRY) >> MATH_CORRY_RESULT_Pos; + return ((XMC_MATH_Q0_23_t) result); +} + +/* This function computes the tangent of a given angle in radians */ +XMC_MATH_Q0_11_t XMC_MATH_CORDIC_Tan(XMC_MATH_Q0_23_t angle_in_radians) +{ + uint32_t result; + MATH->GLBCON = (uint32_t) XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE + \ + (uint32_t) XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE; /* Chain the results of CORDIC operation to DIV unit */ + MATH->DIVCON = (uint32_t) 11 << MATH_DIVCON_DVSSRC_Pos; /* Right Shifts Divisor by 11 places prior to division */ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t)angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023 << MATH_CORDX_DATA_Pos; + result = MATH->QUOT; + return ((XMC_MATH_Q0_11_t) result); +} + +/* This function computes the arc tangent of a given angle in radians */ +XMC_MATH_Q0_23_t XMC_MATH_CORDIC_ArcTan(XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y) +{ + uint32_t result; + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR; + MATH->CORDZ = 0U; /* Clear register */ + MATH->CORDY = ((uint32_t) y) << MATH_CORDY_DATA_Pos; + MATH->CORDX = ((uint32_t) x) << MATH_CORDX_DATA_Pos; + result = ((int32_t)MATH->CORRZ) >> MATH_CORRZ_RESULT_Pos; + return ((XMC_MATH_Q0_23_t) result); +} + +/* This function computes the hyperbolic cosine of a given angle in radians */ +XMC_MATH_Q1_22_t XMC_MATH_CORDIC_Cosh(XMC_MATH_Q0_23_t angle_in_radians) +{ + int32_t result; + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t) angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22 << MATH_CORDX_DATA_Pos; + result = ((int32_t)MATH->CORRX) >> MATH_CORRX_RESULT_Pos; + return ((XMC_MATH_Q1_22_t) result); +} + +/* This function computes the hyperbolic sine of a given angle in radians */ +XMC_MATH_Q1_22_t XMC_MATH_CORDIC_Sinh(XMC_MATH_Q0_23_t angle_in_radians) +{ + int32_t result; + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t)angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22 << MATH_CORDX_DATA_Pos; + result = ((int32_t)MATH->CORRY) >> MATH_CORRY_RESULT_Pos; + return ((XMC_MATH_Q1_22_t) result); +} + +/* This function computes the hyperbolic tangent of a given angle in radians */ +XMC_MATH_Q0_11_t XMC_MATH_CORDIC_Tanh(XMC_MATH_Q0_23_t angle_in_radians) +{ + uint32_t result; + MATH->GLBCON = (uint32_t) XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE + \ + (uint32_t) XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE; /* Chain the results of CORDIC operation to DIV unit */ + MATH->DIVCON = (uint32_t) 11 << MATH_DIVCON_DVSSRC_Pos; /* Right Shifts Divisor by 11 places prior to division */ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t) angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22 << MATH_CORDX_DATA_Pos; + result = MATH->QUOT; + return ((XMC_MATH_Q0_11_t) result); +} + +/*********************************************************************************************************************** + * API IMPLEMENTATION - Non blocking functions + **********************************************************************************************************************/ +/* This function computes the cosine of a given angle in radians */ +void XMC_MATH_CORDIC_CosNB(XMC_MATH_Q0_23_t angle_in_radians) +{ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t) angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023 << MATH_CORDX_DATA_Pos; +} + +/* This function computes the sine of a given angle in radians */ +void XMC_MATH_CORDIC_SinNB(XMC_MATH_Q0_23_t angle_in_radians) +{ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t)angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023 << MATH_CORDX_DATA_Pos; +} + +/* This function computes the tangent of a given angle in radians */ +void XMC_MATH_CORDIC_TanNB(XMC_MATH_Q0_23_t angle_in_radians) +{ + MATH->GLBCON = (uint32_t) XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE + \ + (uint32_t) XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE; /* Chain the results of CORDIC operation to DIV unit */ + MATH->DIVCON = (uint32_t) 11 << MATH_DIVCON_DVSSRC_Pos; /* Right Shifts Divisor by 11 places prior to division */ + + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t)angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_CIRCULAR_GAIN_IN_Q023 << MATH_CORDX_DATA_Pos; +} + +/* This function computes the arc tangent of a given value */ +void XMC_MATH_CORDIC_ArcTanNB(XMC_MATH_Q8_15_t x, XMC_MATH_Q8_15_t y) +{ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_CIRCULAR; + MATH->CORDZ = 0U; /* Clear register */ + MATH->CORDY = ((uint32_t) y) << MATH_CORDY_DATA_Pos; + MATH->CORDX = ((uint32_t) x) << MATH_CORDX_DATA_Pos; +} + +/* This function computes the hyperbolic cosine of a given angle in radians */ +void XMC_MATH_CORDIC_CoshNB(XMC_MATH_Q0_23_t angle_in_radians) +{ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t)angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22 << MATH_CORDX_DATA_Pos; +} + +/* This function computes the hyperbolic sine of a given angle in radians */ +void XMC_MATH_CORDIC_SinhNB(XMC_MATH_Q0_23_t angle_in_radians) +{ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t)angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22 << MATH_CORDX_DATA_Pos; +} + +/* This function computes the hyperbolic tangent of a given angle in radians */ +void XMC_MATH_CORDIC_TanhNB(XMC_MATH_Q0_23_t angle_in_radians) +{ + MATH->GLBCON = (uint32_t) XMC_MATH_DIV_DVDRC_CORRY_IS_SOURCE + \ + (uint32_t) XMC_MATH_DIV_DVSRC_CORRX_IS_SOURCE; /* Chain the results of CORDIC operation to DIV unit */ + MATH->DIVCON = (uint32_t) 11 << MATH_DIVCON_DVSSRC_Pos; /* Right Shifts Divisor by 11 places prior to division */ + MATH->STATC = 0U; /* Clear register */ + MATH->CON = (uint32_t) XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC + \ + (uint32_t) XMC_MATH_CORDIC_ROTVEC_MODE_ROTATION; + MATH->CORDZ = ((uint32_t) angle_in_radians) << MATH_CORDZ_DATA_Pos; + MATH->CORDY = 0U; /* Clear register */ + MATH->CORDX = XMC_MATH_RECIPROC_HYPERBOLIC_GAIN_IN_Q1_22 << MATH_CORDX_DATA_Pos; +} + +/* This function performs division for given two unsigned arguments */ +void XMC_MATH_DIV_UnsignedDivNB(uint32_t dividend, uint32_t divisor) +{ + MATH->DIVCON = XMC_MATH_UNSIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; +} + +/* This function performs division for given two signed arguments */ +void XMC_MATH_DIV_SignedDivNB(int32_t dividend, int32_t divisor) +{ + MATH->DIVCON = XMC_MATH_SIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; +} + +/* This function performs modulo operation for given two unsigned arguments */ +void XMC_MATH_DIV_UnsignedModNB(uint32_t dividend, uint32_t divisor) +{ + MATH->DIVCON = XMC_MATH_UNSIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; +} + +/* This function performs modulo operation for given two signed arguments */ +void XMC_MATH_DIV_SignedModNB(int32_t dividend, int32_t divisor) +{ + MATH->DIVCON = XMC_MATH_SIGNED_DIVISION; + MATH->DVD = dividend; + MATH->DVS = divisor; +} + +int16_t XMC_MATH_CORDIC_Q15_Sqrt(int16_t x) +{ + int32_t temp; + MATH->STATC = 0U; /* Clear register */ + + MATH->CON = (uint32_t)XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC | + (uint32_t)XMC_MATH_CORDIC_ROTVEC_MODE_VECTORING; + + temp = (int32_t)x << 15; /* Q30 to handle numbers > 1.0 */ + + MATH->CORDY = (temp - 0x10000000U); /* x - 0.25 */ + MATH->CORDX = (temp + 0x10000000U); /* x + 0.25 */ + + return (int16_t)(((MATH->CORRX >> 14) * 39568) >> 16); /* Q16 * Q15 */ +} + +int32_t XMC_MATH_CORDIC_Q31_Sqrt(int32_t x) +{ + MATH->STATC = 0U; /* Clear register */ + + MATH->CON = (uint32_t)XMC_MATH_CORDIC_OPERATING_MODE_HYPERBOLIC | + (uint32_t)XMC_MATH_CORDIC_ROTVEC_MODE_VECTORING; + + x >>= 1; /* Q30 to handle numbers > 1.0 */ + + MATH->CORDY = (x - 0x10000000U); /* x - 0.25 */ + MATH->CORDX = (x + 0x10000000U); /* x + 0.25 */ + + return ((MATH->CORRX >> 14) * 39568); /* Q16 * Q15 */ +} + +#endif /* end of #if defined (MATH) */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_pau.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_pau.c new file mode 100644 index 00000000..2eeed86e --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_pau.c @@ -0,0 +1,109 @@ +/** + * @file xmc_pau.c + * @date 2015-06-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-02-20: + * - Initial
+ * + * 2015-06-20: + * - Removed GetDriverVersion API + * @endcond + * + */ + +/** + * + * @brief PAU driver for XMC1 microcontroller family. + * + */ + +/********************************************************************************************************************* + * HEADER FILES + *********************************************************************************************************************/ +#include "xmc_pau.h" + +#if defined(PAU) + +/********************************************************************************************************************** + * API IMPLEMENTATION + *********************************************************************************************************************/ + +/* + * Enable peripheral access + */ +void XMC_PAU_EnablePeripheralAccess(XMC_PAU_PERIPHERAL_t peripheral) +{ + uint32_t reg_num; + + reg_num = ((uint32_t)peripheral & 0xf0000000U) >> 28U; + XMC_PAU->PRIVDIS[reg_num] &= (uint32_t)~((uint32_t)peripheral & 0x0fffffffUL); +} + +/* + * Disable peripheral access + */ +void XMC_PAU_DisablePeripheralAccess(XMC_PAU_PERIPHERAL_t peripheral) +{ + uint32_t reg_num; + + reg_num = ((uint32_t)peripheral & 0xf0000000U) >> 28U; + XMC_PAU->PRIVDIS[reg_num] |= (uint32_t)((uint32_t)peripheral & 0x0fffffffUL); +} + +/* + * Check if peripheral access is enabled + */ +bool XMC_PAU_IsPeripheralAccessEnabled(XMC_PAU_PERIPHERAL_t peripheral) +{ + uint32_t reg_num; + + reg_num = ((uint32_t)peripheral & 0xf0000000U) >> 28U; + return (bool)(XMC_PAU->PRIVDIS[reg_num] & ((uint32_t)peripheral & 0x0fffffffUL)); +} + +/* + * Check if peripheral is available + */ +bool XMC_PAU_IsPeripheralAvailable(XMC_PAU_PERIPHERAL_t peripheral) +{ + uint32_t reg_num; + + reg_num = ((uint32_t)peripheral & 0xf0000000U) >> 28U; + return (bool)(XMC_PAU->AVAIL[reg_num] & ((uint32_t)peripheral & 0x0fffffffUL)); +} + +#endif /* defined(PAU) */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_posif.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_posif.c index 7414af91..6977e878 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_posif.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_posif.c @@ -1,12 +1,12 @@ /** * @file xmc_posif.c - * @date 2015-10-27 + * @date 2015-06-19 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_prng.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_prng.c new file mode 100644 index 00000000..0758edc2 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_prng.c @@ -0,0 +1,107 @@ + +/** + * @file xmc_prng.c + * @date 2015-06-20 + * + * @cond + ********************************************************************************************************************* + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-02-20: + * - Initial
+ * - Removed GetDriverVersion API
+ * + * 2015-06-20 + * - Removed definition of GetDriverVersion API
+ * + * @endcond + */ + +#include "xmc_prng.h" + +#if defined (PRNG) + +/********************************************************************************************************************* + * API IMPLEMENTATION + *********************************************************************************************************************/ + +/* + * Initializes the PRNG peripheral with the settings in the + * initialization structure XMC_PRNG_INIT_t + */ +XMC_PRNG_INIT_STATUS_t XMC_PRNG_Init(const XMC_PRNG_INIT_t *prng) +{ + volatile uint16_t read_warm_up; + uint16_t reg_val, iter; + XMC_PRNG_INIT_STATUS_t status = XMC_PRNG_INITIALIZED; + + XMC_ASSERT("XMC_PRNG_Init:Null Pointer", (prng != (XMC_PRNG_INIT_t *)NULL)); + + /* Configure block size for key loading mode */ + XMC_PRNG_SetRandomDataBlockSize(XMC_PRNG_RDBS_WORD); + + /* Enable key loading mode */ + XMC_PRNG_EnableKeyLoadingMode(); + + /* Load key words (80 bits) and wait till RDV is set */ + for (iter = (uint16_t)0UL; iter < (uint16_t)5UL; iter++) + { + XMC_PRNG_LoadKeyWords(prng->key_words[iter]); + while (PRNG_CHK_RDV_Msk != XMC_PRNG_CheckValidStatus()); + } + + XMC_PRNG_EnableStreamingMode(); + + /* Warm up phase: Read and discard 64 bits */ + read_warm_up = PRNG->WORD; + read_warm_up = PRNG->WORD; + read_warm_up = PRNG->WORD; + reg_val = PRNG->WORD; + read_warm_up &= reg_val; + + /* Configure block size either byte (8 bit) or word (16 bit) */ + XMC_PRNG_SetRandomDataBlockSize(prng->block_size); + + /* + * Checks for reset value for "random data block size". If reset, + * PRNG is not initialized + */ + if ((uint16_t)XMC_PRNG_RDBS_RESET == (PRNG->CTRL & (uint16_t)PRNG_CTRL_RDBS_Msk)) + { + status = XMC_PRNG_NOT_INITIALIZED; + } + + return status; +} + +#endif /* #if defined (PRNG) */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_rtc.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_rtc.c index a63520ab..c6670f6e 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_rtc.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_rtc.c @@ -1,12 +1,12 @@ /** * @file xmc_rtc.c - * @date 2015-10-27 + * @date 2015-05-19 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -41,6 +41,10 @@ * * 2015-06-20: * - Removed GetDriverVersion API + * + * 2016-05-19: + * - Added XMC_RTC_SetTimeStdFormat() and XMC_RTC_SetAlarmStdFormat() + * * @endcond * */ @@ -167,6 +171,25 @@ void XMC_RTC_GetTime(XMC_RTC_TIME_t *const time) time->raw1 = RTC->TIM1; } +/* + * Sets the RTC module time values in standard format + */ +void XMC_RTC_SetTimeStdFormat(const struct tm *const stdtime) +{ + + XMC_RTC_TIME_t time; + + time.seconds = stdtime->tm_sec; + time.minutes = stdtime->tm_min; + time.hours = stdtime->tm_hour; + time.days = stdtime->tm_mday - 1; + time.month = stdtime->tm_mon; + time.year = stdtime->tm_year + XMC_RTC_YEAR_OFFSET; + time.daysofweek = stdtime->tm_wday; + + XMC_RTC_SetTime(&time); +} + /* * Gets the RTC module time values in standard format */ @@ -230,6 +253,24 @@ void XMC_RTC_GetAlarm(XMC_RTC_ALARM_t *const alarm) } +/* + * Sets the RTC module alarm time value in standard format + */ +void XMC_RTC_SetAlarmStdFormat(const struct tm *const stdtime) +{ + XMC_RTC_ALARM_t alarm; + + + alarm.seconds = stdtime->tm_sec; + alarm.minutes = stdtime->tm_min; + alarm.hours = stdtime->tm_hour; + alarm.days = stdtime->tm_mday - 1; + alarm.month = stdtime->tm_mon; + alarm.year = stdtime->tm_year + XMC_RTC_YEAR_OFFSET; + + XMC_RTC_SetAlarm(&alarm); +} + /* * Gets the RTC module alarm time value in standard format */ diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_sdmmc.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_sdmmc.c index 51bb70b4..f5846b46 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_sdmmc.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_sdmmc.c @@ -1,13 +1,13 @@ /** * @file xmc_sdmmc.c - * @date 2015-10-27 + * @date 2016-07-11 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -44,6 +44,12 @@ * 2015-06-20: * - Removed definition of GetDriverVersion API
* + * 2016-03-14: + * - Values are directly assigned to the int status registers
+ * + * 2016-07-11: + * - XMC_SDMMC_SetDataTransferMode() shall not invoke SetDateLineTimeout()
+ * * @endcond */ @@ -257,8 +263,8 @@ void XMC_SDMMC_ClearEvent(XMC_SDMMC_t *const sdmmc, uint32_t event) XMC_ASSERT("XMC_SDMMC_ClearEvent: Invalid module pointer", XMC_SDMMC_CHECK_MODULE_PTR(sdmmc)); XMC_ASSERT("XMC_SDMMC_ClearEvent: Invalid bit-field", !(event & XMC_SDMMC_TARGET_RESP_ERR)); - sdmmc->INT_STATUS_NORM |= (uint16_t)event; - sdmmc->INT_STATUS_ERR |= (uint16_t)(event >> 16U); + sdmmc->INT_STATUS_NORM = (uint16_t)event; + sdmmc->INT_STATUS_ERR = (uint16_t)(event >> 16U); } /* Get the status of an SDMMC event */ @@ -309,9 +315,6 @@ void XMC_SDMMC_SetDataTransferMode(XMC_SDMMC_t *const sdmmc, XMC_SDMMC_TRANSFER_ XMC_ASSERT("XMC_SDMMC_SetDataTransferMode: Invalid module pointer", XMC_SDMMC_CHECK_MODULE_PTR(sdmmc)); XMC_ASSERT("XMC_SDMMC_SetDataTransferMode: Invalid transfer type", XMC_SDMMC_CHECK_TRANSFER_MODE(response->type)); - /* Data line time-out */ - XMC_SDMMC_SetDataLineTimeout(sdmmc, XMC_SDMMC_DAT_TIMEOUT_COUNTER_2_POW_27); - /* Block size */ sdmmc->BLOCK_SIZE = (uint16_t)(response->block_size); @@ -319,7 +322,8 @@ void XMC_SDMMC_SetDataTransferMode(XMC_SDMMC_t *const sdmmc, XMC_SDMMC_TRANSFER_ sdmmc->BLOCK_COUNT = (uint16_t)(response->num_blocks); /* Type of data transfer: single, infinite, multiple or stop multiple */ - sdmmc->TRANSFER_MODE |= (uint16_t)response->type; + sdmmc->TRANSFER_MODE = (uint16_t)((sdmmc->TRANSFER_MODE & (uint16_t)~SDMMC_TRANSFER_MODE_MULTI_BLOCK_SELECT_Msk) | + ((uint16_t)response->type)); /* * Clear block count enable bit; that's only valid for diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_spi.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_spi.c index 553852f1..7ea64cb9 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_spi.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_spi.c @@ -1,12 +1,12 @@ /** * @file xmc_spi.c - * @date 2015-10-27 + * @date 2015-11-04 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -47,7 +47,10 @@ * - Removed GetDriverVersion API
* * 2015-09-01: - * - Modified XMC_UART_CH_EnableEvent() and XMC_UART_CH_DisableEvent() for supporting multiple events configuration
+ * - Modified XMC_SPI_CH_EnableEvent() and XMC_SPI_CH_DisableEvent() for supporting multiple events configuration
+ * + * 2015-11-04: + * - Modified the check of XMC_USIC_CH_GetTransmitBufferStatus() in the XMC_SPI_CH_Transmit() flag
* @endcond * */ @@ -158,7 +161,7 @@ void XMC_SPI_CH_Transmit(XMC_USIC_CH_t *const channel, const uint16_t data, cons /* Check FIFO size */ if ((channel->TBCTR & USIC_CH_TBCTR_SIZE_Msk) == 0U) { - while((uint32_t)XMC_USIC_CH_GetTransmitBufferStatus(channel) & (uint32_t)XMC_USIC_CH_TBUF_STATUS_BUSY) + while((uint32_t)XMC_USIC_CH_GetTransmitBufferStatus(channel) == (uint32_t)XMC_USIC_CH_TBUF_STATUS_BUSY) { } diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_uart.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_uart.c index 95d26ca8..3e9b1422 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_uart.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_uart.c @@ -1,12 +1,12 @@ /** * @file xmc_uart.c - * @date 2015-10-27 + * @date 2016-07-22 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -48,6 +48,11 @@ * * 2015-09-01: * - Modified XMC_UART_CH_EnableEvent() and XMC_UART_CH_DisableEvent() for supporting multiple events configuration
+ * + * 2016-07-22: + * - Modified XMC_UART_CH_Init() to enable transfer status BUSY + * - Modified XMC_UART_CH_Stop() to check for transfer status + * * @endcond * */ @@ -90,10 +95,13 @@ void XMC_UART_CH_Init(XMC_USIC_CH_t *channel, const XMC_UART_CH_CONFIG_t *const * Pulse length is set to 0 to have standard UART signaling, * i.e. the 0 level is signaled during the complete bit time * Sampling point set equal to the half of the oversampling period - * Enable Sample Majority Decision */ + * Enable Sample Majority Decision + * Enable Transfer Status BUSY + */ channel->PCR_ASCMode = (uint32_t)(((config->stop_bits - 1UL) << USIC_CH_PCR_ASCMode_STPB_Pos) | - (((oversampling >> 1UL) + 1UL) << USIC_CH_PCR_ASCMode_SP_Pos) | - USIC_CH_PCR_ASCMode_SMD_Msk); + (((oversampling >> 1UL) + 1UL) << USIC_CH_PCR_ASCMode_SP_Pos) | + USIC_CH_PCR_ASCMode_SMD_Msk | + USIC_CH_PCR_ASCMode_RSTEN_Msk | USIC_CH_PCR_ASCMode_TSTEN_Msk); /* Set passive data level, high Set word length. Data bits - 1 @@ -101,7 +109,7 @@ void XMC_UART_CH_Init(XMC_USIC_CH_t *channel, const XMC_UART_CH_CONFIG_t *const Transmission Mode: The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers */ channel->SCTR = (uint32_t)((((uint32_t)config->data_bits - 1UL) << USIC_CH_SCTR_WLE_Pos) | - ((0x1UL << USIC_CH_SCTR_TRM_Pos) | USIC_CH_SCTR_PDL_Msk)); + ((0x1UL << USIC_CH_SCTR_TRM_Pos) | USIC_CH_SCTR_PDL_Msk)); if (config->frame_length != 0U) { @@ -181,14 +189,16 @@ uint16_t XMC_UART_CH_GetReceivedData(XMC_USIC_CH_t *const channel) XMC_UART_CH_STATUS_t XMC_UART_CH_Stop(XMC_USIC_CH_t *const channel) { XMC_UART_CH_STATUS_t status = XMC_UART_CH_STATUS_OK; - if ((XMC_USIC_CH_GetTransmitBufferStatus(channel) & (uint32_t) XMC_USIC_CH_TBUF_STATUS_BUSY) != 0U) + + if (((XMC_USIC_CH_GetTransmitBufferStatus(channel) & (uint32_t) XMC_USIC_CH_TBUF_STATUS_BUSY) != 0U) || + ((XMC_UART_CH_GetStatusFlag(channel) & XMC_UART_CH_STATUS_FLAG_TRANSFER_STATUS_BUSY) != 0)) { - status = XMC_UART_CH_STATUS_BUSY; + status = XMC_UART_CH_STATUS_BUSY; } else { - /* USIC channel in IDLE mode */ - XMC_USIC_CH_SetMode(channel, XMC_USIC_CH_OPERATING_MODE_IDLE); + /* USIC channel in IDLE mode */ + XMC_USIC_CH_SetMode(channel, XMC_USIC_CH_OPERATING_MODE_IDLE); } return status; } diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbd.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbd.c index 24f79ec4..f0281582 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbd.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbd.c @@ -1,12 +1,12 @@ /** * @file xmc_usbd.c - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************** - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbh.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbh.c new file mode 100644 index 00000000..dc3ad755 --- /dev/null +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usbh.c @@ -0,0 +1,1487 @@ +/** + * @file xmc_usbh.c + * @date 2016-06-30 + * + * @cond + ********************************************************************************** + * XMClib v2.1.8 - XMC Peripheral Driver Library + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * (To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + * + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2016-06-30: + * - Initial
+ * 2016-09-01: + * - Removed Keil specific exclusion
+ * + * @endcond + * + */ + +#include +#include + +#include "xmc_usbh.h" + +#if((UC_SERIES == XMC45) || (UC_SERIES == XMC44) || (UC_SERIES == XMC43) || (UC_SERIES == XMC47) || (UC_SERIES == XMC48)) + +/*Function provides transfer result*/ +static uint32_t XMC_USBH_PipeTransferGetResult (XMC_USBH_PIPE_HANDLE pipe_hndl); +/*Updates the power state of the driver*/ +static int32_t XMC_USBH_PowerControl (XMC_USBH_POWER_STATE_t state); + +/*********************************************************** USBH Driver ***************************************************************** */ + +/*Macro to represent USB host driver version*/ +#define XMC_USBH_DRV_VERSION ((uint16_t)((uint16_t)XMC_LIB_MINOR_VERSION << 8U)|XMC_LIB_PATCH_VERSION) +/*Macro used to gate PHY clock and AHB clock*/ +#define XMC_USBH_PHY_CLK_STOP (0x03U) +/*Macro used to ungate PHY clock and AHB clock*/ +#define XMC_USBH_PHY_CLK_UNGATE (0x100U) + +/* Driver Version */ +static const XMC_USBH_DRIVER_VERSION_t xmc_usbh_driver_version = { XMC_USBH_API_VERSION, XMC_USBH_DRV_VERSION }; + +/*Variables to hold selected VBUS port pin*/ +XMC_GPIO_PORT_t * VBUS_port = XMC_GPIO_PORT3; +uint32_t VBUS_pin = 2U; + +/*Array to track nack events on each pipe*/ +bool is_nack[USBH0_MAX_PIPE_NUM]; + +/* Driver Capabilities */ +static const XMC_USBH_CAPABILITIES_t xmc_usbh_driver_capabilities = { + 0x0001U, /* Root HUB available Ports Mask */ + 0U, /* Automatic SPLIT packet handling */ + 1U, /* Signal Connect event */ + 1U, /* Signal Disconnect event */ + 0U /* Signal Overcurrent event */ +}; +/* Driver state and registers */ +static XMC_USBH0_DEVICE_t XMC_USBH0_device/* __attribute__((section ("RW_IRAM1")))*/ = { + (USB0_GLOBAL_TypeDef *)(USB0_BASE), /** Global register interface */ + ((USB0_CH_TypeDef *)(USB0_CH0_BASE)), /** Host channel interface */ + 0, /** Port event callback; set during init */ + 0, /** Pipe event callback; set during init */ + false, /** init status */ + XMC_USBH_POWER_OFF, /** USB Power status */ + false /** Port reset state */ +}; + +/*USB host pipe information. The array stores information related to packet id, data toggle, + * pending data transfer information, periodic transfer interval, received data size etc for each + * pipe.*/ +volatile XMC_USBH0_pipe_t pipe[USBH0_MAX_PIPE_NUM]; + +/* FIFO sizes in bytes (total available memory for FIFOs is 1.25 kB) */ +#define RX_FIFO_SIZE (1128U) /* RxFIFO size */ +#define TX_FIFO_SIZE_NON_PERI (64U) /* Non-periodic Tx FIFO size */ +#define TX_FIFO_SIZE_PERI (1024U) /* Periodic Tx FIFO size */ + +/*Stores data FIFO pointer for each pipe*/ +static uint32_t *XMC_USBH0_dfifo_ptr[USBH0_MAX_PIPE_NUM]; + +/* Local functions */ +/** + * @param enable Enable (XMC_USBH_CLOCK_GATING_ENABLE) or disable(XMC_USBH_CLOCK_GATING_DISABLE) clock gating + * @return None + * \parDescription:
+ * Enable/disable clock gating depending if feature is supported. +*/ +__INLINE static void XMC_lClockGating(uint8_t enable) +{ +#if defined(CLOCK_GATING_SUPPORTED) +if (enable == XMC_USBH_CLOCK_GATING_ENABLE) + XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_USB0); + if (enable == XMC_USBH_CLOCK_GATING_DISABLE) + XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_USB0); +#endif + return; +} + +/** + * @param ptr_ch Pointer to Channel + * @return None + * \parDescription:
+ * Triggers halt of a channel. +*/ +__INLINE static void XMC_lTriggerHaltChannel(USB0_CH_TypeDef *ptr_ch) +{ + ptr_ch->HCINTMSK = USB_CH_HCINT_ChHltd_Msk; /* Enable halt interrupt */ + ptr_ch->HCCHAR |= (uint32_t)(USB_CH_HCCHAR_ChEna_Msk | USB_CH_HCCHAR_ChDis_Msk); + return; +} + +/** + * @param ptr_pipe Pointer to Pipe + * @param ptr_ch Pointer to Channel + * @return bool \n + * true = success,\n + * false = fail + * \parDescription:
+ * Start transfer on Pipe. The function uses transfer complete interrupts to transfer data more than maximum + * packet size. It takes care of updating data toggle information in subsequent packets related to the same data transfer. +*/ +static bool XMC_lStartTransfer (XMC_USBH0_pipe_t *ptr_pipe, USB0_CH_TypeDef *ptr_ch) { + uint32_t hcchar; + uint32_t hctsiz; + uint32_t hcintmsk; + uint32_t num_remaining_transfer; + uint32_t num_remaining_fifo; + uint32_t num_remaining_queue; + uint32_t txsts = 0U; + uint32_t pckt_num; + uint32_t max_pckt_size; + uint8_t *ptr_src = ptr_pipe->data; + uint32_t *ptr_dest = NULL; + uint16_t cnt; + uint32_t loc_index; + bool status; + + if (!(XMC_USBH0_device.global_register->HPRT & USB_HPRT_PrtConnSts_Msk)) + { + status = false; + } + else + { + /* Save channel characteristic register to local variable */ + hcchar = ptr_ch->HCCHAR; + /* Save transfer size register to local variable */ + hctsiz = ptr_ch->HCTSIZ_BUFFERMODE; + hcintmsk = 0U; + cnt = 0U; + + /* Prepare transfer */ + /* Reset EPDir (transfer direction = output) and enable channel */ + hcchar &= (uint32_t)(~(uint32_t)(USB_CH_HCCHAR_EPDir_Msk | USB_CH_HCCHAR_ChDis_Msk)); + hcchar |= (uint32_t)USB_CH_HCCHAR_ChEna_Msk; + + /* Enable default interrupts needed for all transfers */ + hcintmsk = (USB_CH_HCINTMSK_XactErrMsk_Msk | + USB_CH_HCINTMSK_XferComplMsk_Msk | + USB_CH_HCINTMSK_NakMsk_Msk | + USB_CH_HCINTMSK_StallMsk_Msk) ; + /* Keep PID */ + hctsiz &= (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk; + + /* Packet specific setup */ + switch (ptr_pipe->packet & XMC_USBH_PACKET_TOKEN_Msk) { + case XMC_USBH_PACKET_IN: + /* set transfer direction to input */ + hcchar |= (uint32_t)USB_CH_HCCHAR_EPDir_Msk; + /* Enable IN transfer specific interrupts */ + hcintmsk |= (uint32_t)( USB_CH_HCINTMSK_DataTglErrMsk_Msk | + USB_CH_HCINTMSK_BblErrMsk_Msk | + USB_CH_HCINTMSK_AckMsk_Msk | + USB_CH_HCINTMSK_NakMsk_Msk ) ; + break; + case XMC_USBH_PACKET_OUT: + break; + case XMC_USBH_PACKET_SETUP: + hctsiz &= (uint32_t)~USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk ; + hctsiz |= (uint32_t)USB_CH_HCTSIZx_DPID_MDATA; + break; + default: + break; + } + /* Prepare PID */ + switch (ptr_pipe->packet & XMC_USBH_PACKET_DATA_Msk) { + case XMC_USBH_PACKET_DATA0: + hctsiz &= (uint32_t)~USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk; + hctsiz |= (uint32_t)USB_CH_HCTSIZx_DPID_DATA0; + break; + case XMC_USBH_PACKET_DATA1: + hctsiz &= (uint32_t)~USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk; + hctsiz |= (uint32_t)USB_CH_HCTSIZx_DPID_DATA1; + break; + default: + break; + } + + /* Prepare odd/even frame */ + if ((XMC_USBH0_device.global_register->HFNUM & 1U) != 0U) { + hcchar &= (uint32_t)~USB_CH_HCCHAR_OddFrm_Msk; + } else { + hcchar |= (uint32_t)USB_CH_HCCHAR_OddFrm_Msk; + } + + /* Get transfer type specific status */ + switch (ptr_pipe->ep_type) { + case XMC_USBH_ENDPOINT_CONTROL: + case XMC_USBH_ENDPOINT_BULK: + if (!(hcchar & USB_CH_HCCHAR_EPDir_Msk)) { + txsts = XMC_USBH0_device.global_register->GNPTXSTS; + } + break; + case XMC_USBH_ENDPOINT_ISOCHRONOUS: + case XMC_USBH_ENDPOINT_INTERRUPT: + if (!(hcchar & USB_CH_HCCHAR_EPDir_Msk)) { + txsts = XMC_USBH0_device.global_register->HPTXSTS; + } + break; + default: + break; + } + + /* Calculate remaining transfer size */ + num_remaining_transfer = ptr_pipe->num - ptr_pipe->num_transferred_total; + /* Limit transfer to available space inside fifo/queue if OUT transaction */ + if ((uint32_t)(hcchar & USB_CH_HCCHAR_EPDir_Msk) == 0U) { + max_pckt_size = ptr_pipe->ep_max_packet_size; + num_remaining_fifo = (uint32_t)((uint32_t)(txsts & 0x0000FFFFU) << 2); + num_remaining_queue = (uint32_t)((uint32_t)(txsts & 0x00FF0000U) >> 16); + if (num_remaining_transfer > num_remaining_fifo) { + num_remaining_transfer = num_remaining_fifo; + } + pckt_num = (uint32_t)((num_remaining_transfer + (max_pckt_size - 1U)) / max_pckt_size); + if (pckt_num > num_remaining_queue) { + pckt_num = num_remaining_queue; + } + if (num_remaining_transfer > (pckt_num * max_pckt_size)) { + num_remaining_transfer = pckt_num * max_pckt_size; + } + cnt = (uint16_t)((num_remaining_transfer + 3U) / 4U); + ptr_src = ptr_pipe->data + ptr_pipe->num_transferred_total; + loc_index = ((USB0_CH_TypeDef *)ptr_ch - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers)); + ptr_dest = (uint32_t *)XMC_USBH0_dfifo_ptr[loc_index]; + /* For OUT/SETUP transfer num_transferring represents num of bytes to be sent */ + ptr_pipe->num_transferring = num_remaining_transfer; + } + else { + /* For IN transfer num_transferring is zero */ + ptr_pipe->num_transferring = 0U; + } + /* Set packet count and transfer size */ + if (num_remaining_transfer != 0U) { + hctsiz |= (((num_remaining_transfer + ptr_pipe->ep_max_packet_size) - 1U) / ptr_pipe->ep_max_packet_size) << 19U; + hctsiz |= num_remaining_transfer; + } else { /* Zero length packet */ + hctsiz |= ((uint32_t)1U << USB_CH_HCTSIZ_BUFFERMODE_PktCnt_Pos); /* Packet count = 1 */ + hctsiz |= 0U; /* Transfer size = 0 */ + } + NVIC_DisableIRQ (USB0_0_IRQn); + ptr_ch->HCINTMSK = hcintmsk; /* Enable channel interrupts */ + ptr_ch->HCTSIZ_BUFFERMODE = hctsiz; /* Write ch transfer size */ + ptr_ch->HCCHAR = hcchar; /* Write ch characteristics */ + while (cnt != 0U) { /* Load data */ +#if defined __TASKING__/*tasking*/ + *ptr_dest = *((__unaligned uint32_t *)ptr_src); +#else/* defined (__GNUC__) || defined (__CC_ARM) || defined (__ICCARM__)*/ + *ptr_dest = *((__packed uint32_t *)ptr_src); +#endif + ptr_src += 4U; + cnt--; + } + NVIC_EnableIRQ (USB0_0_IRQn); /* Enable OTG interrupt */ + status = true; + } + return status; +} + +/* USB driver API functions */ +/** + * @return \ref XMC_USBH_DRIVER_VERSION_t + * \parDescription:
+ * Get driver version. +*/ +static XMC_USBH_DRIVER_VERSION_t XMC_USBH_GetVersion (void) { return xmc_usbh_driver_version; } + +/** + * @return \ref XMC_USBH_CAPABILITIES_t + * \parDescription:
+ * Get driver capabilities. +*/ +static XMC_USBH_CAPABILITIES_t XMC_USBH_GetCapabilities (void) { return xmc_usbh_driver_capabilities; } + +/** + * @param cb_port_event Pointer to port event callback function \ref ARM_USBH_SignalPortEvent + * @param cb_pipe_event Pointer to pipe event callback function \ref ARM_USBH_SignalPipeEvent + * @return int32_t \ref Execution_status. 0 if execution is successful. + * + * \parDescription:
+ * Initialize USB Host Interface. Registers callback functions to be executed on port event and pipe event. + * Initializes FIFO address for each pipe. Configures P3.2 as the VBUS charge pump enable pin.\n + * + * \parRelated APIs:
+ * XMC_USBH_Select_VBUS(), XMC_USBH_Uninitialize() \n +*/ +static int32_t XMC_USBH_Initialize (XMC_USBH_SignalPortEvent_t cb_port_event, + XMC_USBH_SignalPipeEvent_t cb_pipe_event) { + + uint32_t channel; + int32_t status = XMC_USBH_DRIVER_OK; + if (XMC_USBH0_device.init_done == true) + { + /*return ok since initialized*/ + } + else + { + /* assign callbacks */ + XMC_USBH0_device.SignalPortEvent_cb = cb_port_event; + XMC_USBH0_device.SignalPipeEvent_cb = cb_pipe_event; + + /* assign fifo start addresses */ + for (channel = 0U; channel < USBH0_MAX_PIPE_NUM; channel++) { + XMC_USBH0_dfifo_ptr[channel] = (uint32_t *)((uint32_t)USB0_BASE + ((channel + 1U) * 0x01000U)); + } + + XMC_GPIO_SetMode(VBUS_port, (uint8_t)VBUS_pin, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1); + + XMC_USBH0_device.init_done = true; + } + return status; +} + +/** + * @return int32_t \ref Execution_status. Returns 0 to indicate success. + * \parDescription:
+ * De-initialize USB Host Interface. Sets the driver power state as powered off. Disables VBUS.\n + * + * \parRelated APIs:
+ * XMC_USBH_Select_VBUS(), XMC_USBH_Initialize(), XMC_USBH_PortVbusOnOff() \n +*/ +static int32_t XMC_USBH_Uninitialize (void) { + XMC_USBH0_device.init_done = false; + (void)XMC_USBH_PowerControl(XMC_USBH_POWER_OFF); + return XMC_USBH_DRIVER_OK; +} + +/** + * @param state Power state. \ref XMC_USBH_POWER_STATE_t + * @return int32_t \ref Execution_status. Returns 0 if successful. + * \parDescription:
+ * Control USB Host Interface Power. If power state is set to \ref XMC_USBH_POWER_FULL, + * it initializes the peripheral and enables VBUS. If power state is set to \ref XMC_USBH_POWER_OFF, + * disables the peripheral and the VBUS.\n + * + * \parRelated APIs:
+ * XMC_USBH_Select_VBUS(), XMC_USBH_Initialize(), XMC_USBH_PortVbusOnOff(), XMC_USBH_Uninitialize() \n +*/ +static int32_t XMC_USBH_PowerControl (XMC_USBH_POWER_STATE_t state) { + int32_t status = XMC_USBH_DRIVER_OK; + uint32_t loc_value; + switch (state) { + case XMC_USBH_POWER_LOW: + status = XMC_USBH_DRIVER_ERROR_UNSUPPORTED; + break; + case XMC_USBH_POWER_OFF: + NVIC_DisableIRQ (USB0_0_IRQn); + NVIC_ClearPendingIRQ (USB0_0_IRQn); /* Clear pending interrupt */ + XMC_USBH0_device.power_state = state; /* Clear powered flag */ + XMC_USBH0_device.global_register->GAHBCFG &= (uint32_t)(~USB_GAHBCFG_GlblIntrMsk_Msk); /* Disable USB interrupts */ + XMC_lClockGating((uint8_t)XMC_USBH_CLOCK_GATING_ENABLE); /* Enable Clock Gating */ + XMC_USBH0_device.global_register->PCGCCTL |= (uint32_t)USB_PCGCCTL_StopPclk_Msk; /* Stop PHY clock */ + XMC_SCU_POWER_DisableUsb(); /* Disable Power USB */ + XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_USB0); /* reset USB */ + XMC_USBH0_device.port_reset_active = false; /* Reset variables */ + memset((void *)(pipe), 0, (USBH0_MAX_PIPE_NUM * sizeof(XMC_USBH0_pipe_t))); + break; + case XMC_USBH_POWER_FULL: + if (XMC_USBH0_device.init_done == false) + { + status = XMC_USBH_DRIVER_ERROR; + break; + } /* not initialized */ + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_FULL) + { + status = XMC_USBH_DRIVER_OK; + break; + } /* already powered */ + XMC_lClockGating((uint8_t)XMC_USBH_CLOCK_GATING_DISABLE); /* disable clock gating */ + (void)XMC_USBH_osDelay(2U); + XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_USB0); /* deassert reset USB */ + (void)XMC_USBH_osDelay(2U); + (void)XMC_USBH_osDelay(100U); + XMC_SCU_POWER_EnableUsb(); /* Enable Power USB */ + + /* On-chip Full-speed PHY */ + XMC_USBH0_device.global_register->PCGCCTL &= (uint32_t)~USB_PCGCCTL_StopPclk_Msk; /* Start PHY clock */ + XMC_USBH0_device.global_register->GUSBCFG |= (uint32_t)USB_GUSBCFG_PHYSel_Msk; /* Full-speed transceiver */ + + while ((XMC_USBH0_device.global_register->GRSTCTL & USB_GRSTCTL_AHBIdle_Msk) == 0U) /* wait until AHB master state machine is idle */ + { + /*Wait*/ + } + + XMC_USBH0_device.global_register->GRSTCTL |= (uint32_t)USB_GRSTCTL_CSftRst_Msk; /* Core soft reset */ + + while ((XMC_USBH0_device.global_register->GRSTCTL & USB_GRSTCTL_CSftRst_Msk) != 0U) /* wait soft reset confirmation */ + { + /*Wait*/ + } + (void)XMC_USBH_osDelay(100U); + + XMC_USBH0_device.port_reset_active = false; /* Reset variables */ + memset((void *)(pipe), 0, (USBH0_MAX_PIPE_NUM * sizeof(XMC_USBH0_pipe_t))); + + /*Created local copy of GUSBCFG to avoid side effects*/ + loc_value = XMC_USBH0_device.global_register->GUSBCFG; + if (((loc_value & USB_GUSBCFG_ForceHstMode_Msk) == 0U) || \ + ((loc_value & USB_GUSBCFG_ForceDevMode_Msk) != 0U)) + { + XMC_USBH0_device.global_register->GUSBCFG &= (uint32_t)~USB_GUSBCFG_ForceDevMode_Msk; /* Clear force device mode */ + XMC_USBH0_device.global_register->GUSBCFG |= (uint32_t)USB_GUSBCFG_ForceHstMode_Msk; /* Force host mode */ + (void)XMC_USBH_osDelay(100U); + } + + /* FS only, even if HS is supported */ + XMC_USBH0_device.global_register->HCFG |= (uint32_t)(0x200U | USB_CH_HCFG_FSLSSUP(1)); + + /* Rx FIFO setting */ + XMC_USBH0_device.global_register->GRXFSIZ = (RX_FIFO_SIZE/4U); + /* Non-periodic Tx FIFO setting */ + XMC_USBH0_device.global_register->GNPTXFSIZ_HOSTMODE = (((uint32_t)(TX_FIFO_SIZE_NON_PERI/4U) << 16) | (RX_FIFO_SIZE / 4U)); + /* Periodic Tx FIFO setting */ + XMC_USBH0_device.global_register->HPTXFSIZ = ((uint32_t)(TX_FIFO_SIZE_PERI / 4U) << 16U) | ((RX_FIFO_SIZE + TX_FIFO_SIZE_NON_PERI) / 4U); + /* Enable channel interrupts */ + XMC_USBH0_device.global_register->HAINTMSK = ((uint32_t)1U << USBH0_MAX_PIPE_NUM) - 1U; + /* Unmask interrupts */ + XMC_USBH0_device.global_register->GINTMSK_HOSTMODE = ( + USB_GINTSTS_HOSTMODE_DisconnInt_Msk | + USB_GINTMSK_HOSTMODE_HChIntMsk_Msk | + USB_GINTMSK_HOSTMODE_PrtIntMsk_Msk | + USB_GINTMSK_HOSTMODE_RxFLvlMsk_Msk | + USB_GINTMSK_HOSTMODE_SofMsk_Msk | + USB_GINTMSK_HOSTMODE_WkUpIntMsk_Msk + ) ; + /* Set powered state */ + XMC_USBH0_device.power_state = state; + /* Enable interrupts */ + XMC_USBH0_device.global_register->GAHBCFG |= (uint32_t)USB_GAHBCFG_GlblIntrMsk_Msk; + /* Set highest interrupt priority */ + NVIC_SetPriority (USB0_0_IRQn, 0U); + NVIC_EnableIRQ (USB0_0_IRQn); + break; + default: + status = XMC_USBH_DRIVER_ERROR_UNSUPPORTED; + } + return status; +} + +/** + * @param port Root HUB Port Number. Only one port(0) is supported. + * @param vbus VBUS state - \n + * - \b false VBUS off + * - \b true VBUS on + * @return int32_t \ref Execution_status. Returns 0 if successful. + * + * \parDescription:
+ * Set USB port VBUS on/off. +*/ +static int32_t XMC_USBH_PortVbusOnOff (uint8_t port, bool vbus) { + int32_t status = XMC_USBH_DRIVER_OK; + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + if (port != 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + if (vbus != 0U) { + /* Port power on */ + XMC_USBH0_device.global_register->HPRT |= (uint32_t)USB_HPRT_PrtPwr_Msk; + XMC_GPIO_SetMode(VBUS_port, (uint8_t)VBUS_pin, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1); + } else { + /* Port power off */ + XMC_USBH0_device.global_register->HPRT &= (uint32_t)~USB_HPRT_PrtPwr_Msk; + XMC_GPIO_SetMode(VBUS_port, (uint8_t)VBUS_pin, XMC_GPIO_MODE_INPUT_TRISTATE); + } + } + } + return status; +} + +/** + * @param port Root HUB Port Number. Only one port(0) is supported. + * @return int32_t Execution status. \ref Execution_status + * \parDescription:
+ * Do USB port reset. Port reset should honor the requirement of 50ms delay before enabling. + * The function depends on implementation of XMC_USBH_osDelay() for 1ms delay to achieve required delay. + * +*/ +static int32_t XMC_USBH_PortReset (uint8_t port) { + uint32_t hprt; + int32_t status = XMC_USBH_DRIVER_OK; + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + if (port != 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + + XMC_USBH0_device.port_reset_active = true; + hprt = XMC_USBH0_device.global_register->HPRT; + hprt &= (uint32_t)~USB_HPRT_PrtEna_Msk; /* Disable port */ + hprt |= (uint32_t)USB_HPRT_PrtRst_Msk; /* Port reset */ + XMC_USBH0_device.global_register->HPRT = hprt; + (void)XMC_USBH_osDelay(50U); /* wait at least 50ms */ + hprt &= (uint32_t)~USB_HPRT_PrtRst_Msk; /* Clear port reset */ + XMC_USBH0_device.global_register->HPRT = hprt; + (void)XMC_USBH_osDelay(50U); /* wait for ISR */ + + /*Wait for the port to be enabled*/ + while ((XMC_USBH0_device.global_register->HPRT & USB_HPRT_PrtEna_Msk) == 0U) + { + /*wait*/ + } + + if (XMC_USBH0_device.port_reset_active == true) + { + XMC_USBH0_device.port_reset_active = false; + status = XMC_USBH_DRIVER_ERROR; /* reset not confirmed inside ISR */ + } + } + + return status; +} + +/** + * @param port USB port number. Only one port(0) is supported. + * @return \ref Execution_status + * \parDescription:
+ * Suspend USB Port (stop generating SOFs).\n + * + * \parRelated APIs:
+ * XMC_USBH_PortResume() \n +*/ +static int32_t XMC_USBH_PortSuspend (uint8_t port) +{ + int32_t status = XMC_USBH_DRIVER_OK; + uint32_t hprt; + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + if (port != 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + hprt = XMC_USBH0_device.global_register->HPRT; + hprt &= (uint32_t)~(USB_HPRT_PrtEna_Msk); + hprt |= (uint32_t)USB_HPRT_PrtSusp_Msk; + XMC_USBH0_device.global_register->HPRT = hprt; + /* Stop PHY clock after suspending the bus*/ + XMC_USBH0_device.global_register->PCGCCTL |= XMC_USBH_PHY_CLK_STOP; + + } + } + return status; +} + +/** + * @param port USB port number. Only one port(0) is supported. + * @return \ref Execution_status + * \parDescription:
+ * Resume suspended USB port (start generating SOFs).\n + * + * \parRelated APIs:
+ * XMC_USBH_PortSuspend() \n +*/ +static int32_t XMC_USBH_PortResume (uint8_t port) +{ + int32_t status = XMC_USBH_DRIVER_OK; + uint32_t hprt; + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + if (port != 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + /*Ungate PHY clock*/ + XMC_USBH0_device.global_register->PCGCCTL = XMC_USBH_PHY_CLK_UNGATE; + /*Set resume bit*/ + hprt = XMC_USBH0_device.global_register->HPRT; + hprt &= (uint32_t)~(USB_HPRT_PrtEna_Msk); + hprt |= (uint32_t)USB_HPRT_PrtRes_Msk; + XMC_USBH0_device.global_register->HPRT = hprt; + + (void)XMC_USBH_osDelay(20U); + + hprt = XMC_USBH0_device.global_register->HPRT; + hprt &= (uint32_t)~(USB_HPRT_PrtEna_Msk); + hprt &= (uint32_t)~((uint32_t)USB_HPRT_PrtRes_Msk); + XMC_USBH0_device.global_register->HPRT = hprt; + } + } + + return status; +} + +/** + * @param port USB port number. Only one port(0) is supported. + * @return XMC_USBH_PORT_STATE_t Port State + * + * \parDescription:
+ * Get current USB port state. The state indicates if the port is connected, port speed + * and port overcurrent status. +*/ +static XMC_USBH_PORT_STATE_t XMC_USBH_PortGetState (uint8_t port) +{ + XMC_USBH_PORT_STATE_t port_state = { 0U, 0U, 0U }; + uint32_t hprt; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + /*Do not update the port state*/ + } + else + { + if (port != 0U) + { + /*Do not update the port state*/ + } + else + { + hprt = XMC_USBH0_device.global_register->HPRT; + if(((hprt & USB_HPRT_PrtConnSts_Msk) != 0U)) + { + port_state.connected = 1U; + } + else + { + port_state.connected = 0U; + } + port_state.overcurrent = 0U; + + switch ((uint32_t)((uint32_t)(hprt & USB_HPRT_PrtSpd_Msk) >> USB_HPRT_PrtSpd_Pos)) { + case 1U: /* Full speed */ + port_state.speed = XMC_USBH_SPEED_FULL; + break; + default: + break; + } + } + } + return port_state; +} + +/** + * @param dev_addr Device address + * @param dev_speed Device speed + * @param hub_addr Hub address. This value should be 0 since hub is not supported. + * @param hub_port USB port number. Only one port(0) is supported. + * @param ep_addr Device endpoint address \n + * - ep_addr.0..3: Address \n + * - ep_addr.7: Direction\n + * @param ep_type Endpoint type (ARM_USB_ENDPOINT_xxx) + * @param ep_max_packet_size Endpoint maximum packet size + * @param ep_interval Endpoint polling interval + * @return XMC_USBH_PIPE_HANDLE Pipe handle is a pointer to pipe hardware base address. + * + * \parDescription:
+ * Create/allocate a pipe configured with input parameters. The function looks for an unused pipe and configures with input parameters. + * + * \parRelated APIs:
+ * XMC_USBH_PipeModify(), XMC_USBH_PipeDelete(), XMC_USBH_PipeReset(), XMC_USBH_PipeTransfer() \n +*/ +static XMC_USBH_PIPE_HANDLE XMC_USBH_PipeCreate (uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size, uint8_t ep_interval) { + XMC_USBH0_pipe_t *ptr_pipe; + USB0_CH_TypeDef *ptr_ch; + uint32_t i; + uint32_t loc_val; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + ptr_ch = (USB0_CH_TypeDef *)NULL; + } + else + { + /* get first free pipe available */ + ptr_ch = (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers); + + for (i = 0U; i < USBH0_MAX_PIPE_NUM; i++) { + if ((ptr_ch->HCCHAR & 0x3FFFFFFFU) == 0U) + { + break; + } + ptr_ch++; + } + + /* free pipe found? */ + if (i == USBH0_MAX_PIPE_NUM) + { + ptr_ch = (USB0_CH_TypeDef *)NULL; + } + else + { + ptr_pipe = (XMC_USBH0_pipe_t *)(&pipe[(ptr_ch - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers))]); + + memset((void *)ptr_pipe, 0, sizeof(XMC_USBH0_pipe_t)); /* Initialize pipe structure */ + + /* Fill in all fields of Endpoint Descriptor */ + /*Get the end point direction from the MSB of address*/ + loc_val = 0U; + if (((ep_addr >> 7U) & 0x1U) == 0U) + { + loc_val = 1U; + } + ptr_ch->HCCHAR = ((uint32_t)(USB_CH_HCCHARx_MPS(ep_max_packet_size))| + USB_CH_HCCHARx_EPNUM(ep_addr)) | + (uint32_t)(USB_CH_HCCHAR_EPDir_Msk * loc_val) | + (USB_CH_HCCHARx_EPTYPE (ep_type) ) | + (USB_CH_HCCHARx_DEVADDR (dev_addr) ) ; + /* Store Pipe settings */ + ptr_pipe->ep_max_packet_size = ep_max_packet_size; + ptr_pipe->ep_type = ep_type; + switch (ep_type) { + case XMC_USBH_ENDPOINT_CONTROL: + case XMC_USBH_ENDPOINT_BULK: + break; + case XMC_USBH_ENDPOINT_ISOCHRONOUS: + case XMC_USBH_ENDPOINT_INTERRUPT: + if (ep_interval > 0U) { + ptr_pipe->interval_reload = ep_interval; + } + ptr_pipe->interval = ptr_pipe->interval_reload; + loc_val = ((((uint32_t)ep_max_packet_size >> 11U) + 1U) & 3U); + ptr_ch->HCCHAR |= (uint32_t)USB_CH_HCCHARx_MCEC(loc_val); + break; + default: + break; + } + } + } + return ((XMC_USBH_EP_HANDLE)ptr_ch); +} + +/** + * @param pipe_hndl Pointer returned by the pipe create function. It is the hardware based address of a USB channel. + * @param dev_addr Device address to be configured for the pipe. + * @param dev_speed Device speed class. + * @param hub_addr Hub address. It should be 0 since hub is not supported. + * @param hub_port USB port number. Only one port(0) is supported. + * @param ep_max_packet_size Endpoint maximum packet size + * @return Execution_status + * + * \parDescription:
+ * Modify an existing pipe with input parameters. It can be used to configure the pipe after receiving configuration details from the device. + * + * \parRelated APIs:
+ * XMC_USBH_PipeCreate(), XMC_USBH_PipeDelete(), XMC_USBH_PipeReset(), XMC_USBH_PipeTransfer() \n +*/ +static int32_t XMC_USBH_PipeModify (XMC_USBH_PIPE_HANDLE pipe_hndl, uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint16_t ep_max_packet_size) { + XMC_USBH0_pipe_t *ptr_pipe; + USB0_CH_TypeDef *ptr_ch; + uint32_t hcchar; + int32_t status = XMC_USBH_DRIVER_OK; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + if (pipe_hndl == 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + ptr_ch = (USB0_CH_TypeDef *)(pipe_hndl); + ptr_pipe = (XMC_USBH0_pipe_t *)(&pipe[(ptr_ch - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers))]); + if (ptr_pipe->in_use != 0U) + { + status = XMC_USBH_DRIVER_ERROR_BUSY; + } + else + { + /* Fill in all fields of channel */ + hcchar = ptr_ch->HCCHAR; + /* Clear fields */ + hcchar &= (uint32_t)~(USB_CH_HCCHAR_MPS_Msk | USB_CH_HCCHAR_DevAddr_Msk) ; + /* Set fields */ + hcchar |= (uint32_t)(USB_CH_HCCHARx_MPS(ep_max_packet_size) | (USB_CH_HCCHARx_DEVADDR(dev_addr))); + ptr_ch->HCCHAR = hcchar; + + ptr_pipe->ep_max_packet_size = ep_max_packet_size; + } + } + } + + return status; +} + +/** + * @param pipe_hndl Pointer returned by the pipe create function. It is the hardware based address of a USB channel. + * @return Execution_status + * + * \parDescription:
+ * Delete pipe from active pipes list. After it is deleted, it can be assigned to new pipe request. + * + * \parRelated APIs:
+ * XMC_USBH_PipeCreate(), XMC_USBH_PipeModify(), XMC_USBH_PipeReset(), XMC_USBH_PipeTransfer() \n +*/ +static int32_t XMC_USBH_PipeDelete (XMC_USBH_PIPE_HANDLE pipe_hndl) { + XMC_USBH0_pipe_t *ptr_pipe; + USB0_CH_TypeDef *ptr_ch; + int32_t status = XMC_USBH_DRIVER_OK; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + if (pipe_hndl == 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + ptr_ch = (USB0_CH_TypeDef *)(pipe_hndl); + ptr_pipe = (XMC_USBH0_pipe_t *)(&pipe[(ptr_ch - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers))]); + if (ptr_pipe->in_use != 0U) + { + status = XMC_USBH_DRIVER_ERROR_BUSY; + } + else + { + ptr_ch->HCCHAR = 0U; + ptr_ch->HCINT = 0U; + ptr_ch->HCINTMSK = 0U; + ptr_ch->HCTSIZ_BUFFERMODE = 0U; + + memset((void *)ptr_pipe, 0, sizeof(XMC_USBH0_pipe_t)); + } + } + } + + return status; +} + +/** + * @param pipe_hndl Pointer returned by the pipe create function. It is the hardware based address of a USB channel. + * @return Execution_status + * \parDescription:
+ * Reset pipe by clearing the interrupt mask and resetting the transfer control register.\n + * + * \parRelated APIs:
+ * XMC_USBH_PipeCreate(), XMC_USBH_PipeModify(), XMC_USBH_PipeDelete(), XMC_USBH_PipeTransfer() \n +*/ +static int32_t XMC_USBH_PipeReset (XMC_USBH_PIPE_HANDLE pipe_hndl) { + XMC_USBH0_pipe_t *ptr_pipe; + USB0_CH_TypeDef *ptr_ch; + int32_t status = XMC_USBH_DRIVER_OK; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + if (pipe_hndl == 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + ptr_ch = (USB0_CH_TypeDef *)(pipe_hndl); + ptr_pipe = (XMC_USBH0_pipe_t *)(&pipe[(ptr_ch - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers))]); + if (ptr_pipe->in_use != 0U) + { + status = XMC_USBH_DRIVER_ERROR_BUSY; + } + else + { + ptr_ch->HCINT = 0U; + ptr_ch->HCINTMSK = 0U; + ptr_ch->HCTSIZ_BUFFERMODE = 0U; + } + } + } + return status; +} + +/** + * @param pipe_hndl Pointer returned by the pipe create function. It is the hardware based address of a USB channel. + * @param packet Packet information with bit masks to represent packet data toggle information and packet type.\n + * \ref XMC_USBH_PACKET_DATA0 / \ref XMC_USBH_PACKET_DATA1, \ref XMC_USBH_PACKET_SETUP / + * \ref XMC_USBH_PACKET_OUT / \ref XMC_USBH_PACKET_IN + * @param data Pointer to buffer with data to send or for received data to be stored. + * @param num Number of data bytes to transfer + * @return Execution_status + * + * \parDescription:
+ * Transfer packets through USB Pipe. Handles transfer of multiple packets using the pipe transfer complete event. + * The pipe event callback function will be called when the transfer is completed.\n + * + * \parRelated APIs:
+ * XMC_USBH_PipeCreate(), XMC_USBH_PipeModify(), XMC_USBH_PipeDelete(), XMC_USBH_PipeReset() \n +*/ +static int32_t XMC_USBH_PipeTransfer (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t packet, uint8_t *data, uint32_t num) { + XMC_USBH0_pipe_t *ptr_pipe; + int32_t status = XMC_USBH_DRIVER_OK; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + + if(!(((((packet & XMC_USBH_PACKET_TOKEN_Msk) == XMC_USBH_PACKET_OUT) || + ((packet & XMC_USBH_PACKET_TOKEN_Msk) == XMC_USBH_PACKET_IN))) || + ((packet & XMC_USBH_PACKET_TOKEN_Msk) == XMC_USBH_PACKET_SETUP ))) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + if (pipe_hndl == 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + if ((XMC_USBH0_device.global_register->HPRT & USB_HPRT_PrtConnSts_Msk) == 0U) + { + status = XMC_USBH_DRIVER_ERROR; + } + else + { + ptr_pipe = (XMC_USBH0_pipe_t *)(&pipe[((USB0_CH_TypeDef *)pipe_hndl - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers))]); + if (ptr_pipe->in_use != 0U) + { + status = XMC_USBH_DRIVER_ERROR_BUSY; + } + else + { + /* Prepare transfer information */ + ptr_pipe->packet = packet; + ptr_pipe->data = data; + ptr_pipe->num = num; + ptr_pipe->num_transferred_total = 0U; + ptr_pipe->num_transferring = 0U; + ptr_pipe->in_use = 0U; + ptr_pipe->transfer_active = 0U; + ptr_pipe->interrupt_triggered = 0U; + ptr_pipe->event = 0U; + + if ((ptr_pipe->ep_type == (uint8_t)XMC_USBH_ENDPOINT_INTERRUPT) && (ptr_pipe->interval != 0U)) { + ptr_pipe->in_use = 1U; /* transfer will be started inside interrupt (SOF) */ + } else { + ptr_pipe->transfer_active = 1U; + ptr_pipe->in_use = 1U; + if(XMC_lStartTransfer (ptr_pipe, (USB0_CH_TypeDef *)pipe_hndl) == false) + { + status = XMC_USBH_DRIVER_ERROR; + } + } + } + } + } + } + } + return status; +} + +/** + * @param pipe_hndl Pointer returned by the pipe create function. It is the hardware based address of a USB channel. + * @return uint32_t Number of successfully transferred data bytes + * + * \parDescription:
+ * Get result of USB Pipe transfer. + * + * \parRelated APIs:
+ * XMC_USBH_PipeCreate(), XMC_USBH_PipeModify(), XMC_USBH_PipeDelete(), XMC_USBH_PipeTransfer() \n +*/ +static uint32_t XMC_USBH_PipeTransferGetResult (XMC_USBH_PIPE_HANDLE pipe_hndl) { + uint32_t status; + if (pipe_hndl == 0U) + { + status = 0U; + } + else + { + status = (pipe[((USB0_CH_TypeDef *)pipe_hndl - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers))].num_transferred_total); + } + return status; +} + +/** + * @param pipe_hndl Pointer returned by the pipe create function. It is the hardware based address of a USB channel. + * @return Execution_status + * + * \parDescription:
+ * Abort current USB Pipe transfer.\n + * + * \parRelated APIs:
+ * XMC_USBH_PipeCreate(), XMC_USBH_PipeModify(), XMC_USBH_PipeDelete(), XMC_USBH_PipeTransfer() \n +*/ +static int32_t XMC_USBH_PipeTransferAbort (XMC_USBH_PIPE_HANDLE pipe_hndl) { + XMC_USBH0_pipe_t *ptr_pipe; + USB0_CH_TypeDef *ptr_ch; + uint32_t timeout; + int32_t status = XMC_USBH_DRIVER_ERROR; + + ptr_ch = (USB0_CH_TypeDef *) pipe_hndl; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + /*Error in power state*/ + } + else + { + if (pipe_hndl == 0U) + { + status = XMC_USBH_DRIVER_ERROR_PARAMETER; + } + else + { + ptr_pipe = (XMC_USBH0_pipe_t *)(&pipe[(ptr_ch - (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers))]); + + if (ptr_pipe->in_use != 0U) { + ptr_pipe->in_use = 0U; + /* Disable channel if not yet halted */ + if ((ptr_ch->HCINT & USB_CH_HCINT_ChHltd_Msk) == 0U) + { + if (ptr_ch->HCCHAR & USB_CH_HCCHAR_ChEna_Msk) + { + ptr_ch->HCINTMSK = 0U; + (void)XMC_USBH_osDelay(1U); + if (ptr_ch->HCINT & USB_CH_HCINT_NAK_Msk) { + ptr_ch->HCINT = USB_CH_HCINTx_ALL; /* Clear all interrupts */ + status = XMC_USBH_DRIVER_OK; + } + else + { + ptr_ch->HCINT = USB_CH_HCINTx_ALL; /* Clear all interrupts */ + ptr_ch->HCCHAR = (uint32_t)(ptr_ch->HCCHAR | USB_CH_HCCHAR_ChEna_Msk | USB_CH_HCCHAR_ChDis_Msk); + + /* wait until channel is halted */ + for (timeout = 0U; timeout < 5000U; timeout++) { + if (ptr_ch->HCINT & USB_CH_HCINT_ChHltd_Msk) { + ptr_ch->HCINT = USB_CH_HCINTx_ALL; + status = XMC_USBH_DRIVER_OK; + } + } + } + } + } + } + } + } + + return status; +} + +/** + * @return Frame number. + * + * \parDescription:
+ * Get current USB Frame Number. +*/ +static uint16_t XMC_USBH_GetFrameNumber (void) +{ + uint16_t status; + + if (XMC_USBH0_device.power_state == XMC_USBH_POWER_OFF) + { + status = 0U; + } + else + { + status = (uint16_t)((XMC_USBH0_device.global_register->HFNUM) & 0xFFFU); + } + return status; +} + +/** + * @param gintsts USB port interrupt status flag. + * + * \parDescription:
+ * USB host interrupt handler. It updates port and pipe state information based on different events + * generated by the peripheral. It propagates the port events to the callback function registered by the user + * during initialization. When a pipe transfer complete event is detected, it checks if any further data is available + * to be transmitted on the same pipe and continues transmission until data is available. A pipe event is also propagated + * to the user provided pipe event callback function. A transfer complete event will be propagated only when all the data + * is transmitted for an OUT transaction. + * +*/ +void XMC_USBH_HandleIrq (uint32_t gintsts) { + XMC_USBH0_pipe_t *ptr_pipe; + USB0_CH_TypeDef *ptr_ch; + uint32_t hprt, haint, hcint, pktcnt, mpsiz; + uint32_t ch; + uint8_t *ptr_data; + uint32_t *dfifo; + uint32_t grxsts, bcnt, dat, len, len_rest; + + /* Host port interrupt */ + if ((gintsts & USB_GINTSTS_HOSTMODE_PrtInt_Msk) != 0U) { + hprt = XMC_USBH0_device.global_register->HPRT; + /* Clear port enable */ + XMC_USBH0_device.global_register->HPRT = hprt & (uint32_t)(~USB_HPRT_PrtEna_Msk); + if ((hprt & USB_HPRT_PrtConnDet_Msk) != 0U) { + XMC_USBH0_device.global_register->HCFG = (0x200U | (USB_CH_HCFG_FSLSPCS(1) | + USB_CH_HCFG_FSLSSUP(1))); + /* Ignore connect under reset */ + if (XMC_USBH0_device.port_reset_active == false) { + XMC_USBH0_device.SignalPortEvent_cb(0U, XMC_USBH_EVENT_CONNECT); + } + } + if ((hprt & USB_HPRT_PrtEnChng_Msk) != 0U) { /* If port enable changed */ + if ((hprt & USB_HPRT_PrtEna_Msk) != 0U) { /* If device connected */ + if (XMC_USBH0_device.port_reset_active == true) { + XMC_USBH0_device.port_reset_active = false; + XMC_USBH0_device.SignalPortEvent_cb(0U, XMC_USBH_EVENT_RESET); + } + } + } + } + + /* Disconnect interrupt */ + if ((gintsts & USB_GINTSTS_HOSTMODE_DisconnInt_Msk) != 0U) { + XMC_USBH0_device.global_register->GINTSTS_HOSTMODE = USB_GINTSTS_HOSTMODE_DisconnInt_Msk; /* Clear disconnect interrupt */ + /* Ignore disconnect under reset */ + if ( XMC_USBH0_device.port_reset_active == false) { + ptr_ch = (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers); + ptr_pipe = (XMC_USBH0_pipe_t *)(pipe); + for (ch = 0U; ch < USBH0_MAX_PIPE_NUM; ch++) { + if (ptr_pipe->in_use != 0U) { + ptr_pipe->in_use = 0U; + ptr_ch->HCINT = USB_CH_HCINTx_ALL; /* Clear all interrupts */ + ptr_ch->HCINTMSK = USB_CH_HCINT_ChHltd_Msk; /* Enable halt interrupt */ + ptr_ch->HCCHAR |= (uint32_t)(USB_CH_HCCHAR_ChEna_Msk | USB_CH_HCCHAR_ChDis_Msk); /* Activate Halt */ + XMC_USBH0_device.SignalPipeEvent_cb((XMC_USBH_EP_HANDLE)ptr_ch, XMC_USBH_EVENT_BUS_ERROR); + } + ptr_ch++; + ptr_pipe++; + } + XMC_USBH0_device.SignalPortEvent_cb(0U, XMC_USBH_EVENT_DISCONNECT); + } + } + /* Handle receive fifo not-empty interrupt */ + if ((gintsts & USB_GINTSTS_HOSTMODE_RxFLvl_Msk) != 0U) { + XMC_USBH0_device.global_register->GINTMSK_HOSTMODE &= (uint32_t)~USB_GINTMSK_HOSTMODE_RxFLvlMsk_Msk; + grxsts = (XMC_USBH0_device.global_register->GRXSTSP_HOSTMODE); + /* IN Data Packet received ? */ + if ((uint32_t)((grxsts >> 17U) & 0x0FU) == (uint32_t)USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT) { + ch = (uint32_t)(grxsts & USB_GRXSTSR_DEVICEMODE_EPNum_Msk); + bcnt = ((uint32_t)(grxsts & USB_GRXSTSR_DEVICEMODE_BCnt_Msk) >> USB_GRXSTSR_DEVICEMODE_BCnt_Pos); + dfifo = (uint32_t *)XMC_USBH0_dfifo_ptr[ch]; + ptr_data = pipe[ch].data + pipe[ch].num_transferred_total; + len = bcnt / 4U; /* Received number of 32-bit data */ + len_rest = bcnt & 3U; /* Number of bytes left */ + /* Read data from fifo */ + /* Read 32 bit sized data */ + while (len != 0U) { +#if defined __TASKING__/*tasking*/ + *((__unaligned uint32_t *)ptr_data) = *dfifo; +#else /* defined (__GNUC__) || defined (__CC_ARM) || defined (__ICCARM__)*/ + *((__packed uint32_t *)ptr_data) = *dfifo; +#endif + + ptr_data += 4U; + len--; + } + /* Read 8 bit sized data */ + if (len_rest != 0U) { +#if defined __TASKING__/*tasking*/ + dat = *((__unaligned uint32_t *)dfifo); +#else /* defined (__GNUC__) || defined (__CC_ARM) || defined (__ICCARM__)*/ + dat = *((__packed uint32_t *)dfifo); +#endif + while (len_rest != 0U) { + *ptr_data = (uint8_t)dat; + ptr_data++; + dat >>= 8; + len_rest--; + } + } + pipe[ch].num_transferring += bcnt; + pipe[ch].num_transferred_total += bcnt; + } + XMC_USBH0_device.global_register->GINTMSK_HOSTMODE |= (uint32_t)USB_GINTMSK_HOSTMODE_RxFLvlMsk_Msk; + } + + /* Handle sof interrupt */ + if ((gintsts & USB_GINTSTS_HOSTMODE_Sof_Msk) != 0U) { /* If start of frame interrupt */ + XMC_USBH0_device.global_register->GINTSTS_HOSTMODE = USB_GINTSTS_HOSTMODE_Sof_Msk; /* Clear SOF interrupt */ + ptr_pipe = (XMC_USBH0_pipe_t *)(pipe); + for (ch = 0U; ch < USBH0_MAX_PIPE_NUM; ch++) { + /* If interrupt transfer is active handle period (interval) */ + if ((ptr_pipe->ep_type == (uint8_t)XMC_USBH_ENDPOINT_INTERRUPT) && (ptr_pipe->in_use == 1U)) { + if (ptr_pipe->interval != 0U) + { + ptr_pipe->interval--; + if (ptr_pipe->interval == 0U) + { + ptr_pipe->interval = ptr_pipe->interval_reload; + ptr_pipe->interrupt_triggered = 1U; + } + } + } + ptr_pipe++; + } + } + + /* Handle host ctrl interrupt */ + if ((gintsts & USB_GINTSTS_HOSTMODE_HChInt_Msk) != 0U) { + haint = XMC_USBH0_device.global_register->HAINT; + for (ch = 0U; ch < USBH0_MAX_PIPE_NUM; ch++) { + /* Check for interrupt of all channels */ + if ((haint & (uint32_t)((uint32_t)1U << ch)) != 0U) { + haint &= (uint32_t)~((uint32_t)1U << ch); + ptr_ch = (USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers) + ch; + ptr_pipe = (XMC_USBH0_pipe_t *)(&pipe[ch]); + /*Local variable for HCINT*/ + dat = ptr_ch->HCINT; + hcint = (uint32_t)(dat & ptr_ch->HCINTMSK); + if ((hcint & USB_CH_HCINT_ChHltd_Msk) != 0U) { /* channel halted ? */ + ptr_ch->HCINTMSK = 0U; /* disable all channel interrupts */ + ptr_ch->HCINT = USB_CH_HCINTx_ALL; /* clear all interrupts */ + ptr_pipe->transfer_active = 0U; /* set status transfer not active */ + hcint = 0U; + } + if ((hcint & USB_CH_HCINT_XferCompl_Msk) != 0U) { /* data transfer finished ? */ + ptr_ch->HCINT = USB_CH_HCINTx_ALL; /* clear all interrupts */ + if ((ptr_ch->HCCHAR & USB_CH_HCCHAR_EPDir_Msk) == 0U) { /* endpoint OUT ? */ + ptr_ch->HCINTMSK = 0U; /* disable all channel interrupts */ + ptr_pipe->transfer_active = 0U; /* transfer not in progress */ + ptr_pipe->num_transferred_total += ptr_pipe->num_transferring; /* admin OUT transfer status */ + ptr_pipe->num_transferring = 0U; /* admin OUT transfer status */ + if (ptr_pipe->num_transferred_total == ptr_pipe->num) { /* all bytes transferred ? */ + ptr_pipe->in_use = 0U; /* release pipe */ + ptr_pipe->event = (uint8_t)XMC_USBH_EVENT_TRANSFER_COMPLETE; /* prepare event notification */ + } + hcint = 0U; + } + if ((ptr_ch->HCCHAR & USB_CH_HCCHAR_EPDir_Msk) != 0U) { /* endpoint IN ? */ + ptr_pipe->in_use = 0U; /* release pipe */ + ptr_pipe->event = (uint8_t)XMC_USBH_EVENT_TRANSFER_COMPLETE; /* prepare event notification */ + XMC_lTriggerHaltChannel(ptr_ch); /* trigger channel halt */ + } + } + if ((hcint & USB_CH_HCINTMSK_AckMsk_Msk) != 0U) { /* ACK received ? */ + ptr_ch->HCINT = USB_CH_HCINTMSK_AckMsk_Msk; /* clear ACK interrupt */ + is_nack[ch] = false; + if ((ptr_ch->HCCHAR & USB_CH_HCCHAR_EPDir_Msk) != 0U) { /* endpoint IN ? */ + if ((ptr_pipe->num != ptr_pipe->num_transferred_total) && /* if all data was not transferred */ + (ptr_pipe->num_transferring != 0U) && /* if zero-length packet was not received */ + ((ptr_pipe->num_transferred_total%ptr_pipe->ep_max_packet_size) == 0U)){ /* if short packet was not received */ + ptr_ch->HCCHAR |= (uint32_t)USB_CH_HCCHAR_ChEna_Msk; /* trigger next transfer */ + } + } else { /* endpoint OUT */ + XMC_lTriggerHaltChannel(ptr_ch); /* trigger channel halt */ + } + hcint = 0U; + } + /*local variable for HCCHAR*/ + dat = ptr_ch->HCCHAR; + if (((hcint & (USB_CH_HCINTMSK_StallMsk_Msk | /* STALL */ + USB_CH_HCINTMSK_NakMsk_Msk | /* or NAK */ + USB_CH_HCINTx_ERRORS )) != 0U) && /* or transaction error */ + ((dat & USB_CH_HCCHAR_EPDir_Msk) == 0U)) + { /* and endpoint OUT */ + + pktcnt = (uint32_t)((ptr_ch->HCTSIZ_BUFFERMODE & USB_CH_HCTSIZ_BUFFERMODE_PktCnt_Msk) /* administrate OUT transfer status */ + >> USB_CH_HCTSIZ_BUFFERMODE_PktCnt_Pos); + mpsiz = (ptr_ch->HCCHAR ) & 0x000007FFU; + if ((ptr_pipe->num_transferring >= mpsiz) && (pktcnt > 0U)) { + ptr_pipe->num_transferred_total += (uint32_t)(ptr_pipe->num_transferring - (mpsiz * pktcnt)); + } + ptr_pipe->num_transferring = 0U; + } + + if ((hcint & USB_CH_HCINTMSK_NakMsk_Msk)!=0U) { /* if NAK */ + is_nack[ch] = true; + ptr_pipe->event |= (uint8_t)XMC_USBH_EVENT_HANDSHAKE_NAK; + ptr_ch->HCINT = USB_CH_HCINTMSK_NakMsk_Msk; /* clear NAK interrupt */ + if ((ptr_ch->HCCHAR & USB_CH_HCCHAR_EPDir_Msk) != 0U) { /* endpoint IN ? */ + if (ptr_pipe->ep_type == (uint8_t)XMC_USBH_ENDPOINT_INTERRUPT) { /* is endpoint of type interrupt ? */ + XMC_lTriggerHaltChannel(ptr_ch); /* trigger channel halt (after halted will be restarted in next sof) */ + } else { /* is endpoint not of type interrupt ?*/ + ptr_ch->HCCHAR |= (uint32_t)USB_CH_HCCHAR_ChEna_Msk; /* trigger next transfer */ + } + } else { /* If endpoint OUT */ /* endpoint OUT ? */ + XMC_lTriggerHaltChannel(ptr_ch); /* trigger channel halt */ + } + hcint = 0U; + } + + if ((hcint & USB_CH_HCINTMSK_StallMsk_Msk) != 0U) { /* if STALL */ + /*Reset the packet data toggle*/ + ptr_ch->HCINT = USB_CH_HCINTMSK_StallMsk_Msk; /* clear STALL interrupt */ + ptr_pipe->in_use = 0U; /* release pipe */ + ptr_pipe->packet &= (uint32_t)(~XMC_USBH_PACKET_DATA_Msk); + ptr_pipe->packet |= (uint32_t)XMC_USBH_PACKET_DATA0; + ptr_pipe->event = (uint8_t)XMC_USBH_EVENT_HANDSHAKE_STALL; /* prepare event notification */ + XMC_lTriggerHaltChannel(ptr_ch); /* trigger channel halt */ + hcint = 0U; + } + if ((hcint & USB_CH_HCINTx_ERRORS) != 0U) { /* if transaction error */ + ptr_ch->HCINT = USB_CH_HCINTx_ERRORS; /* clear all error interrupt */ + ptr_pipe->in_use = 0U; /* release pipe */ + ptr_pipe->event = (uint8_t)XMC_USBH_EVENT_BUS_ERROR; /* prepare event notification */ + XMC_lTriggerHaltChannel(ptr_ch); /* trigger channel halt */ + hcint = 0U; + } + if ((ptr_pipe->transfer_active == 0U) && (ptr_pipe->in_use == 0U) && (ptr_pipe->event != 0U)) { + XMC_USBH0_device.SignalPipeEvent_cb((XMC_USBH_EP_HANDLE)ptr_ch, (uint32_t)ptr_pipe->event); + ptr_pipe->event = 0U; + } + } + } + } + /*Check if remote wakeup event detected*/ + if ((gintsts & USB_GINTSTS_HOSTMODE_WkUpInt_Msk) != 0U) + { + XMC_USBH0_device.global_register->GINTSTS_HOSTMODE = USB_GINTSTS_HOSTMODE_WkUpInt_Msk; /* Clear wakeup interrupt */ + /*Recover PHY clock*/ + XMC_USBH0_device.global_register->PCGCCTL = XMC_USBH_PHY_CLK_UNGATE; + /*Callback function execution*/ + XMC_USBH0_device.SignalPortEvent_cb(0U, XMC_USBH_EVENT_REMOTE_WAKEUP); + } + + /* Handle restarts of unfinished transfers (due to NAK or ACK) */ + ptr_pipe = (XMC_USBH0_pipe_t *)(pipe); + for (ch = 0U; ch < USBH0_MAX_PIPE_NUM; ch++) { + if ((ptr_pipe->in_use == 1U) && (ptr_pipe->transfer_active == 0U)) { + /* Restart periodic transfer if not in progress and interval expired */ + if (ptr_pipe->ep_type != (uint8_t)XMC_USBH_ENDPOINT_INTERRUPT) + { + /*Data toggle if NACK not received*/ + if (!is_nack[ch]) + { + switch (ptr_pipe->packet & (uint32_t)XMC_USBH_PACKET_DATA_Msk) + { + case XMC_USBH_PACKET_DATA0: + ptr_pipe->packet &= (uint32_t)~XMC_USBH_PACKET_DATA_Msk; + ptr_pipe->packet |= (uint32_t)XMC_USBH_PACKET_DATA1; + break; + case XMC_USBH_PACKET_DATA1: + ptr_pipe->packet &= (uint32_t)~XMC_USBH_PACKET_DATA_Msk; + ptr_pipe->packet |= (uint32_t)XMC_USBH_PACKET_DATA0; + break; + default: + break; + } + } + else + { + is_nack[ch] = false; + } + } + if (((ptr_pipe->ep_type == (uint8_t)XMC_USBH_ENDPOINT_INTERRUPT)&&(ptr_pipe->interrupt_triggered == 1U))|| + (ptr_pipe->ep_type != (uint8_t)XMC_USBH_ENDPOINT_INTERRUPT)) + { + ptr_pipe->interrupt_triggered = 0U; + ptr_pipe->transfer_active = 1U; + (void)XMC_lStartTransfer (ptr_pipe, (((USB0_CH_TypeDef *)(XMC_USBH0_device.host_channel_registers)) + ch)); + } + } + ptr_pipe++; + } +} + +/*Function provides host mode interrupt status*/ +uint32_t XMC_USBH_GetInterruptStatus(void) +{ + return XMC_USBH0_device.global_register->GINTSTS_HOSTMODE; +} + +/*Function selects the port pin used as DRIVEVBUS*/ +void XMC_USBH_Select_VBUS(XMC_GPIO_PORT_t* port, uint32_t pin) +{ + VBUS_port = port; + VBUS_pin = pin; + + /*Configure the port pin alternate function*/ + XMC_GPIO_SetMode(VBUS_port, (uint8_t)VBUS_pin, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1); +} + +/*Function asserts the remote wakeup request by device by clearing the resume bit*/ +void XMC_USBH_TurnOffResumeBit(void) +{ + uint32_t hprt; + /*Clear resume bit*/ + hprt = XMC_USBH0_device.global_register->HPRT; + hprt &= (uint32_t)~(USB_HPRT_PrtEna_Msk); + hprt &= (uint32_t)~((uint32_t)USB_HPRT_PrtRes_Msk); + XMC_USBH0_device.global_register->HPRT = hprt; +} + + + +/*USB host driver assembling all the implementation into a single CMSIS compliant structure type*/ +XMC_USBH_DRIVER_t Driver_USBH0 = { + XMC_USBH_GetVersion, + XMC_USBH_GetCapabilities, + XMC_USBH_Initialize, + XMC_USBH_Uninitialize, + XMC_USBH_PowerControl, + XMC_USBH_PortVbusOnOff, + XMC_USBH_PortReset, + XMC_USBH_PortSuspend, + XMC_USBH_PortResume, + XMC_USBH_PortGetState, + XMC_USBH_PipeCreate, + XMC_USBH_PipeModify, + XMC_USBH_PipeDelete, + XMC_USBH_PipeReset, + XMC_USBH_PipeTransfer, + XMC_USBH_PipeTransferGetResult, + XMC_USBH_PipeTransferAbort, + XMC_USBH_GetFrameNumber +}; + + +/*Weak definition of delay function*/ +__WEAK uint8_t XMC_USBH_osDelay(uint32_t MS) +{ + /*A precise time delay implementation for this function has to be provided*/ + while (1) + { + /*Wait*/ + } +} + +#endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usic.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usic.c index 786e8c54..2440ae75 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usic.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_usic.c @@ -1,12 +1,12 @@ /** * @file xmc_usic.c - * @date 2015-10-27 + * @date 2015-09-01 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_vadc.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_vadc.c index b37d93ce..e312efe3 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_vadc.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_vadc.c @@ -1,12 +1,12 @@ /** * @file xmc_vadc.c - * @date 2015-10-27 + * @date 2016-06-17 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the @@ -67,6 +67,24 @@ * - XMC_VADC_GROUP_ChannelGetResultAlignment * - XMC_VADC_GROUP_ChannelGetInputClass * - XMC_VADC_GROUP_SetResultSubtractionValue + * + * 2015-12-01: + * - Fixed the analog calibration voltage for XMC1100 to external reference upper supply range. + * - Fixed the XMC_VADC_GLOBAL_StartupCalibration() for XMC1100. + * + * 2016-06-17: + * - New macros added XMC_VADC_SHS_FULL_SET_REG, XMC_VADC_RESULT_PRIORITY_AVAILABLE + * and XMC_VADC_SYNCTR_START_LOCATION + * - New Enum added XMC_VADC_SHS_GAIN_LEVEL_t and XMC_VADC_SYNCTR_EVAL_t + * - Fixed the EVAL configuration in API XMC_VADC_GROUP_CheckSlaveReadiness and XMC_VADC_GROUP_IgnoreSlaveReadiness + * - New APIs added are: + * - XMC_VADC_GROUP_SetSyncSlaveReadySignal + * - XMC_VADC_GROUP_ChannelGetAssertedEvents + * - XMC_VADC_GROUP_GetAssertedResultEvents + * - XMC_VADC_GROUP_SetResultRegPriority + * - XMC_VADC_GROUP_SetSyncReadySignal + * - XMC_VADC_GROUP_GetSyncReadySignal + * - XMC_VADC_GROUP_GetResultRegPriority * @endcond * */ @@ -82,8 +100,10 @@ #define XMC_VADC_MAX_ICLASS_SET (2U) /**< Defines the maximum number of conversion parameter sets */ #define XMC_VADC_NUM_EMUX_INTERFACES (2U) /**< Defines the maximum number of external multiplexer interfaces */ -#define XMC_VADC_RESULT_LEFT_ALIGN_10BIT (2U) /**< Defines the 10 bit converted result register left align mask. It - is used in the XMC_VADC_GLOBAL_SetCompareValue() API*/ +#define XMC_VADC_RESULT_LEFT_ALIGN_10BIT (2U) /**< Defines the 10 bit converted result register left align mask. It \ + is used in the XMC_VADC_GLOBAL_SetCompareValue() API */ + +#define XMC_VADC_SYNCTR_START_LOCATION (3U) /**< Defines the location in SYNCTR needed for calculations*/ /********************************************************************************************************************* * ENUMS ********************************************************************************************************************/ @@ -196,8 +216,6 @@ void XMC_VADC_GLOBAL_Init(XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_GL /* Configure the SHS register that are needed for XMC11xx devices*/ #if (XMC_VADC_GROUP_AVAILABLE == 0U) - /* Select Internal reference Upper suppy range*/ - SHS0->SHSCFG |= SHS_SHSCFG_SCWC_Msk |(2 <SHSCFG | SHS_SHSCFG_SCWC_Msk; @@ -262,7 +280,8 @@ void XMC_VADC_GLOBAL_StartupCalibration(XMC_VADC_GLOBAL_t *const global_ptr) } #else /* Loop until it finishes calibration */ - while( ( (SHS0->SHSCFG) & (uint32_t)SHS_SHSCFG_STATE_Msk) == XMC_VADC_SHS_START_UP_CAL_ACTIVE ) + while ((((SHS0->SHSCFG) & (uint32_t)SHS_SHSCFG_STATE_Msk) >> (uint32_t)SHS_SHSCFG_STATE_Pos) == + XMC_VADC_SHS_START_UP_CAL_ACTIVE ) { /* NOP */ } @@ -548,87 +567,67 @@ void XMC_VADC_GROUP_SetSyncMaster(XMC_VADC_GROUP_t *const group_ptr) /* API to enable checking of readiness of slaves before a synchronous conversion request is issued */ void XMC_VADC_GROUP_CheckSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group) { -#if (XMC_VADC_MAXIMUM_NUM_GROUPS == 4U) - uint32_t slave_kernel; - uint32_t adc_ready; - uint8_t ready_pos; -#endif - + uint32_t i,master_grp_num; XMC_ASSERT("XMC_VADC_GROUP_CheckSlaveReadiness:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) - -#if(XMC_VADC_MAXIMUM_NUM_GROUPS == 4U) - - slave_kernel = slave_group; - if (0U == slave_kernel) + master_grp_num =0; + for(i=0; iSYNCTR |= (uint32_t)((uint32_t)1 << ready_pos); -#else - group_ptr->SYNCTR |= ((uint32_t)VADC_G_SYNCTR_EVALR1_Msk); -#endif + if(slave_group < master_grp_num) + { + slave_group++; + } + group_ptr->SYNCTR |= (1U << (slave_group + XMC_VADC_SYNCTR_START_LOCATION)); } /* API to disable checking of readiness of slaves during synchronous conversions */ void XMC_VADC_GROUP_IgnoreSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint32_t slave_group) { -#if(XMC_VADC_MAXIMUM_NUM_GROUPS == 4U) - uint32_t slave_kernel; - uint32_t adc_ready; - uint8_t ready_pos; -#endif + uint32_t i,master_grp_num; XMC_ASSERT("XMC_VADC_GROUP_IgnoreSlaveReadiness:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) -#if(XMC_VADC_MAXIMUM_NUM_GROUPS == 4U) - slave_kernel = slave_group; - - if (0U == slave_kernel) + master_grp_num =0; + for(i=0; iSYNCTR &= ~((uint32_t)((uint32_t)1 << ready_pos)); -#else - group_ptr->SYNCTR &= ~((uint32_t)VADC_G_SYNCTR_EVALR1_Msk); -#endif + if(slave_group < master_grp_num) + { + slave_group++; + } + group_ptr->SYNCTR &= ~(1U << (slave_group + XMC_VADC_SYNCTR_START_LOCATION)); } +/* API to configure EVAL bit in the slave groups*/ +void XMC_VADC_GROUP_SetSyncSlaveReadySignal(XMC_VADC_GROUP_t *const group_ptr, + uint32_t eval_waiting_group, + uint32_t eval_origin_group) +{ + XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlaveReadySignal:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(group_ptr)) + XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlaveReadySignal:Wrong Group numbers", (eval_waiting_group == eval_origin_group )) + + if(eval_origin_group < eval_waiting_group) + { + eval_origin_group++; + } + group_ptr->SYNCTR |= (1U << (eval_origin_group + XMC_VADC_SYNCTR_START_LOCATION)); +} + + /* API to enable the synchronous conversion feature - Applicable only to kernel configured as master */ void XMC_VADC_GROUP_EnableChannelSyncRequest(XMC_VADC_GROUP_t *const group_ptr, const uint32_t ch_num) { @@ -767,9 +766,9 @@ void XMC_VADC_GROUP_SetBoundaryEventInterruptNode(XMC_VADC_GROUP_t *const group_ group_ptr->BFLNP |= (uint32_t)sr << flag_pos; } -#endif /* XMC_VADC_BOUNDARY_FLAG_SELECT */ +#endif -#endif /* XMC_VADC_GROUP_AVAILABLE */ +#endif #if(XMC_VADC_SHS_AVAILABLE == 1U) @@ -782,11 +781,14 @@ void XMC_VADC_GLOBAL_SHS_Init(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const XMC_VA /* Initialize the SHS Configuration register*/ shs_ptr->SHSCFG = (uint32_t)((uint32_t)config->shscfg | (uint32_t)SHS_SHSCFG_SCWC_Msk); +#if(XMC_VADC_SHS_FULL_SET_REG == 1U) /* Select the Calibration order*/ shs_ptr->CALCTR &= ~((uint32_t)SHS_CALCTR_CALORD_Msk); shs_ptr->CALCTR |= (uint32_t) ((uint32_t)config->calibration_order << SHS_CALCTR_CALORD_Pos); +#endif } +#if(XMC_VADC_SHS_FULL_SET_REG == 1U) /* API to enable the accelerated mode of conversion */ void XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_GROUP_INDEX_t group_num) { @@ -857,6 +859,7 @@ void XMC_VADC_GLOBAL_SHS_SetShortSampleTime(XMC_VADC_GLOBAL_SHS_t *const shs_ptr /* for MISRA*/ } } +#endif /* API to set the gain factor of the Sample and hold module*/ void XMC_VADC_GLOBAL_SHS_SetGainFactor(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, @@ -887,6 +890,7 @@ void XMC_VADC_GLOBAL_SHS_SetGainFactor(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, } } +#if(XMC_VADC_SHS_FULL_SET_REG == 1U) /* API to enable the gain and offset calibration of the Sample and hold module*/ void XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, XMC_VADC_GROUP_INDEX_t group_num) @@ -995,6 +999,7 @@ void XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t *const /* for MISRA */ } } +#endif /* API to set the values of sigma delta loop of the Sample and hold module*/ void XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, @@ -1017,7 +1022,7 @@ void XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, } -#endif /* XMC_VADC_SHS_AVAILABLE */ +#endif #if (XMC_VADC_GSCAN_AVAILABLE == 1U) /* API to initialize the group scan hardware of a kernel */ @@ -1190,7 +1195,7 @@ void XMC_VADC_GROUP_ScanRemoveChannel(XMC_VADC_GROUP_t *const group_ptr, const u assel &= (~( 1 << channel_num)); group_ptr->ASSEL = assel; } -#endif /* XMC_VADC_GSCAN_AVAILABLE */ +#endif /* API to initialize background scan request source hardware */ void XMC_VADC_GLOBAL_BackgroundInit(XMC_VADC_GLOBAL_t *const global_ptr, const XMC_VADC_BACKGROUND_CONFIG_t *config) @@ -1637,7 +1642,7 @@ void XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode(XMC_VADC_GROUP_t *const gro group_ptr->SEVNP = sevnp; } -#endif /* XMC_VADC_QUEUE_AVAILABLE*/ +#endif #if (XMC_VADC_GROUP_AVAILABLE ==1U) /* API to initialize a channel unit */ @@ -2110,4 +2115,4 @@ bool XMC_VADC_GROUP_IsResultRegisterFifoHead(XMC_VADC_GROUP_t *const group_ptr, return ret_val; } -#endif /*XMC_VADC_GROUP_AVAILABLE */ +#endif diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_wdt.c b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_wdt.c index eb515a56..c7164684 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_wdt.c +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Boot/lib/xmclib/src/xmc_wdt.c @@ -1,12 +1,12 @@ /** * @file xmc_wdt.c - * @date 2015-10-27 + * @date 2015-06-20 * * @cond ********************************************************************************************************************* - * XMClib v2.1.2 - XMC Peripheral Driver Library + * XMClib v2.1.8 - XMC Peripheral Driver Library * - * Copyright (c) 2015, Infineon Technologies AG + * Copyright (c) 2015-2016, Infineon Technologies AG * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.elf b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.elf index 7153a007b7333f0c35540030bc056d83fac7c70c..b57c8304f4812627d64955ac1a0058a5561c3b93 100644 GIT binary patch delta 153914 zcmbrn2Ygh;_cuIq%ii71Zn7jHSwcc8JwQNEIsqaeH54g|5EK;@6{U!c1w;fz1%s?Y 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z`${HF7>V1SlQ})hrkCGeGIZG3@+q0ETeWQ~j4L0WIZT)`dVKjL->?Z&@0)`2xS^Ag z>TTVIr~0N$7&&rWxo`3m+>qwf*23f&lc$uA_iy||eaKD=|6!)Iy6KK9zgLS|+O+vE zH)AtfXSZr?ZTN@zNfLL>nI{k6iza+()s5afU_K~Lq^yHx8oz^d(5!H!-%BSB zni)#&a8U?}rvLEk!fB%LdIDv{Y%yI7B#^aH=%^oS|^YEsnuW`;a&yD9vO<{rd7)S~yzh|s5(nL-KfMDnox X2918-te0?plPS!HR_vpCpcnoJ0**;U diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.map b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.map index d54f524f..44951469 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.map +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.map @@ -18,9 +18,11 @@ Common symbol size file dma0_event_handlers 0x20 ..\obj\lib\xmclib\src\xmc_dma.o +pipe 0x1c0 ..\obj\lib\xmclib\src\xmc_usbh.o dma1_event_handlers 0x10 ..\obj\lib\xmclib\src\xmc_dma.o event_handler_list 0x80 ..\obj\lib\xmclib\src\xmc4_scu.o +is_nack 0xe ..\obj\lib\xmclib\src\xmc_usbh.o usbd_init 0x4 ..\obj\lib\xmclib\src\xmc_usbd.o xmc_device 0x208 ..\obj\lib\xmclib\src\xmc_usbd.o @@ -119,7 +121,7 @@ Discarded input sections .debug_macro 0x00000000 0x50 ..\obj\led.o .debug_macro 0x00000000 0xe66 ..\obj\led.o .debug_macro 0x00000000 0x16 ..\obj\led.o - .debug_macro 0x00000000 0x166f2 ..\obj\led.o + .debug_macro 0x00000000 0x165d5 ..\obj\led.o .debug_macro 0x00000000 0x174 ..\obj\led.o .debug_macro 0x00000000 0x22 ..\obj\led.o .debug_macro 0x00000000 0x52 ..\obj\led.o @@ -133,9 +135,9 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\led.o .debug_macro 0x00000000 0x10 ..\obj\led.o .debug_macro 0x00000000 0x35 ..\obj\led.o - .debug_macro 0x00000000 0x170 ..\obj\led.o + .debug_macro 0x00000000 0x183 ..\obj\led.o .debug_macro 0x00000000 0x46 ..\obj\led.o - .debug_macro 0x00000000 0xd4d ..\obj\led.o + .debug_macro 0x00000000 0xdc4 ..\obj\led.o .debug_macro 0x00000000 0xba ..\obj\led.o .group 0x00000000 0x8 ..\obj\lib\system_xmc4700.o .group 0x00000000 0x8 ..\obj\lib\system_xmc4700.o @@ -186,7 +188,7 @@ Discarded input sections .debug_macro 0x00000000 0x50 ..\obj\lib\system_xmc4700.o .debug_macro 0x00000000 0xe66 ..\obj\lib\system_xmc4700.o .debug_macro 0x00000000 0x16 ..\obj\lib\system_xmc4700.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\system_xmc4700.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\system_xmc4700.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_eru.o @@ -253,20 +255,20 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_macro 0x00000000 0x2a1 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc4_eru.o .debug_line 0x00000000 0x393 ..\obj\lib\xmclib\src\xmc4_eru.o - .debug_str 0x00000000 0x77058 ..\obj\lib\xmclib\src\xmc4_eru.o + .debug_str 0x00000000 0x76a91 ..\obj\lib\xmclib\src\xmc4_eru.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc4_eru.o .debug_frame 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_eru.o .ARM.attributes @@ -329,34 +331,34 @@ Discarded input sections .text.XMC_FLASH_DisableEvent 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_ProgramPage - 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_EraseSector - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_lErasePhysicalSectorCommand 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_lRepairPhysicalSectorCommand 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_ErasePhysicalSector - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_RepairPhysicalSector 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_EraseUCB - 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_Reset 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_InstallProtection - 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x60 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_ConfirmProtection - 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x54 ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_VerifyReadProtection - 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_VerifyWriteProtection - 0x00000000 0x48 ..\obj\lib\xmclib\src\xmc4_flash.o + 0x00000000 0x5c ..\obj\lib\xmclib\src\xmc4_flash.o .text.XMC_FLASH_ResumeProtection 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_info 0x00000000 0x99b ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_abbrev 0x00000000 0x201 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_loc 0x00000000 0x620 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_info 0x00000000 0x9d3 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_abbrev 0x00000000 0x210 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_loc 0x00000000 0x6df ..\obj\lib\xmclib\src\xmc4_flash.o .debug_aranges 0x00000000 0xe0 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_ranges 0x00000000 0xd0 ..\obj\lib\xmclib\src\xmc4_flash.o @@ -381,18 +383,18 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_flash.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_macro 0x00000000 0xda ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_line 0x00000000 0x58f ..\obj\lib\xmclib\src\xmc4_flash.o - .debug_str 0x00000000 0x7631d ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_macro 0x00000000 0xdd ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_line 0x00000000 0x5b1 ..\obj\lib\xmclib\src\xmc4_flash.o + .debug_str 0x00000000 0x75dca ..\obj\lib\xmclib\src\xmc4_flash.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc4_flash.o .debug_frame 0x00000000 0x264 ..\obj\lib\xmclib\src\xmc4_flash.o .ARM.attributes @@ -454,17 +456,17 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x00000000 0xd4d ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x00000000 0xdc4 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_macro 0x00000000 0xba ..\obj\lib\xmclib\src\xmc4_gpio.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc4_rtc.o @@ -523,10 +525,10 @@ Discarded input sections .text.XMC_RTC_DisableEvent 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_rtc.o .text.XMC_RTC_ClearEvent - 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_info 0x00000000 0x6f6 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_abbrev 0x00000000 0x1da ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_loc 0x00000000 0x9a ..\obj\lib\xmclib\src\xmc4_rtc.o + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_info 0x00000000 0x6f4 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_abbrev 0x00000000 0x1e9 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_loc 0x00000000 0x79 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_aranges 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_ranges 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_rtc.o @@ -551,14 +553,14 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_rtc.o @@ -571,9 +573,9 @@ Discarded input sections .debug_macro 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0xd7 ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_line 0x00000000 0x509 ..\obj\lib\xmclib\src\xmc4_rtc.o - .debug_str 0x00000000 0x76490 ..\obj\lib\xmclib\src\xmc4_rtc.o + .debug_str 0x00000000 0x75ec9 ..\obj\lib\xmclib\src\xmc4_rtc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc4_rtc.o .debug_frame 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc4_rtc.o .ARM.attributes @@ -622,7 +624,7 @@ Discarded input sections .text.XMC_SCU_INTERUPT_GetEventStatus 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_INTERRUPT_ClearEventStatus - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_GetBootMode 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_SetBootMode @@ -645,7 +647,7 @@ Discarded input sections 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_IsTemperatureSensorReady 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .text.XMC_SCU_GetTemperature + .text.XMC_SCU_GetTemperatureMeasurement 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_IsTemperatureSensorBusy 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o @@ -654,7 +656,7 @@ Discarded input sections .text.XMC_SCU_WriteToRetentionMemory 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_ReadFromRetentionMemory - 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_Enable 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_Disable @@ -662,9 +664,9 @@ Discarded input sections .text.XMC_SCU_TRAP_GetStatus 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_Trigger - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_TRAP_ClearStatus - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_PARITY_ClearStatus 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_PARITY_GetStatus @@ -684,7 +686,7 @@ Discarded input sections .text.XMC_SCU_RESET_AssertPeripheralReset 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_RESET_IsPeripheralResetAsserted - 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_GetSystemPllClockFrequency @@ -740,7 +742,11 @@ Discarded input sections .text.XMC_SCU_CLOCK_GatePeripheralClock 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_IsPeripheralClockGated - 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_POWER_GetEVR13Voltage + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_POWER_GetEVR33Voltage + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableUsbPll 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableUsbPll @@ -752,29 +758,67 @@ Discarded input sections .text.XMC_SCU_CLOCK_SetBackupClockCalibrationMode 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_POWER_EnableUsb - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_POWER_DisableUsb - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_IsUsbPllLocked 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_EnableHibernateDomain - 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_DisableHibernateDomain - 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_IsHibernateDomainEnabled 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_EnableInternalSlowClock 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_HIB_DisableInternalSlowClock 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_ClearEventStatus + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_TriggerEvent + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_EnableEvent + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_DisableEvent + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_EnterHibernateState + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_EnterHibernateStateEx + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetWakeupTriggerInput + 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetPinMode + 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetPinOutputLevel + 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetInput0 + 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_HIB_SetSR0Input + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_IsLowPowerOscillatorStable + 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableLowPowerOscillator - 0x00000000 0x5c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x48 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableLowPowerOscillator 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableHighPerformanceOscillator - 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableHighPerformanceOscillator 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o + .text.XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus + 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_EnableSystemPll 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_DisableSystemPll @@ -784,23 +828,15 @@ Discarded input sections .text.XMC_SCU_CLOCK_StepSystemPllFrequency 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_StartSystemPll - 0x00000000 0x124 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x10c ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_Init - 0x00000000 0x7c ..\obj\lib\xmclib\src\xmc4_scu.o + 0x00000000 0x8c ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_CLOCK_IsSystemPllLocked 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_INTERRUPT_SetEventHandler 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc4_scu.o .text.XMC_SCU_IRQHandler 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.set_peripheral_gate.7682 - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.set_peripheral_reset.7561 - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.clear_peripheral_gate.7694 - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.clear_peripheral_reset.7573 - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc4_scu.o @@ -821,17 +857,159 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc4_scu.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc4_scu.o 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..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_bccu.o + .text 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_bccu.o + .data 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_bccu.o + .bss 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_info 0x00000000 0xa4 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_abbrev 0x00000000 0x4e ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_aranges + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x197 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x87 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0xfd ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x5e ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x1df ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x1f ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x43 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x187 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_line 0x00000000 0x342 ..\obj\lib\xmclib\src\xmc_bccu.o + .debug_str 0x00000000 0x74b57 ..\obj\lib\xmclib\src\xmc_bccu.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_bccu.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_bccu.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_can.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_can.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_can.o @@ -894,7 +1072,7 @@ Discarded input sections .text.XMC_CAN_MO_UpdateData 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_can.o .text.XMC_CAN_MO_Config - 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_can.o + 0x00000000 0x94 ..\obj\lib\xmclib\src\xmc_can.o .text.XMC_CAN_MO_Transmit 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc_can.o .text.XMC_CAN_MO_ReceiveData @@ -915,9 +1093,9 @@ Discarded input sections 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc_can.o .text.XMC_CAN_GATEWAY_InitSourceObject 0x00000000 0x5c ..\obj\lib\xmclib\src\xmc_can.o - .debug_info 0x00000000 0x1373 ..\obj\lib\xmclib\src\xmc_can.o - .debug_abbrev 0x00000000 0x3b2 ..\obj\lib\xmclib\src\xmc_can.o - .debug_loc 0x00000000 0xc5f ..\obj\lib\xmclib\src\xmc_can.o + .debug_info 0x00000000 0x13c4 ..\obj\lib\xmclib\src\xmc_can.o + .debug_abbrev 0x00000000 0x3b3 ..\obj\lib\xmclib\src\xmc_can.o + .debug_loc 0x00000000 0xc86 ..\obj\lib\xmclib\src\xmc_can.o .debug_aranges 0x00000000 0xd8 ..\obj\lib\xmclib\src\xmc_can.o .debug_ranges 0x00000000 0xe0 ..\obj\lib\xmclib\src\xmc_can.o @@ -942,20 +1120,20 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_can.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_can.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x70a ..\obj\lib\xmclib\src\xmc_can.o .debug_macro 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_can.o - .debug_line 0x00000000 0x691 ..\obj\lib\xmclib\src\xmc_can.o - .debug_str 0x00000000 0x799f3 ..\obj\lib\xmclib\src\xmc_can.o + .debug_line 0x00000000 0x69c ..\obj\lib\xmclib\src\xmc_can.o + .debug_str 0x00000000 0x79448 ..\obj\lib\xmclib\src\xmc_can.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_can.o .debug_frame 0x00000000 0x20c ..\obj\lib\xmclib\src\xmc_can.o .ARM.attributes @@ -1081,19 +1259,19 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_macro 0x00000000 0x740 ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_line 0x00000000 0x67c ..\obj\lib\xmclib\src\xmc_ccu4.o - .debug_str 0x00000000 0x792d6 ..\obj\lib\xmclib\src\xmc_ccu4.o + .debug_str 0x00000000 0x78d0f ..\obj\lib\xmclib\src\xmc_ccu4.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ccu4.o .debug_frame 0x00000000 0x264 ..\obj\lib\xmclib\src\xmc_ccu4.o .ARM.attributes @@ -1142,9 +1320,9 @@ Discarded input sections .text.XMC_CCU8_SetModuleClock 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_CompareInit - 0x00000000 0x3c ..\obj\lib\xmclib\src\xmc_ccu8.o + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_CaptureInit - 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_ccu8.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_SetOutPath 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SetMultiChannelShadowTransferMode @@ -1189,7 +1367,7 @@ Discarded input sections 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_GetLastCapturedTimerValue 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ccu8.o - .text.XMC_CCU8_GetCapturedValueFromFifo + .text.XMC_CCU8_SLICE_GetCapturedValueFromFifo 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_EnableDithering 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_ccu8.o @@ -1213,9 +1391,9 @@ Discarded input sections 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_ccu8.o .text.XMC_CCU8_SLICE_ConfigureStatusBitOutput 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_info 0x00000000 0x1deb ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_abbrev 0x00000000 0x2a3 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_loc 0x00000000 0xb83 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_info 0x00000000 0x1dac ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_abbrev 0x00000000 0x2b2 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_loc 0x00000000 0xbba ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_aranges 0x00000000 0x158 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_ranges 0x00000000 0x148 ..\obj\lib\xmclib\src\xmc_ccu8.o @@ -1240,20 +1418,20 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x3e3 ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_line 0x00000000 0x74e ..\obj\lib\xmclib\src\xmc_ccu8.o - .debug_str 0x00000000 0x794d2 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_line 0x00000000 0x74d ..\obj\lib\xmclib\src\xmc_ccu8.o + .debug_str 0x00000000 0x78eef ..\obj\lib\xmclib\src\xmc_ccu8.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ccu8.o .debug_frame 0x00000000 0x304 ..\obj\lib\xmclib\src\xmc_ccu8.o .ARM.attributes @@ -1335,17 +1513,17 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_common.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_common.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_common.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_common.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_common.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_common.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_common.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_common.o .debug_line 0x00000000 0x41f ..\obj\lib\xmclib\src\xmc_common.o - .debug_str 0x00000000 0x75223 ..\obj\lib\xmclib\src\xmc_common.o + .debug_str 0x00000000 0x74cf0 ..\obj\lib\xmclib\src\xmc_common.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_common.o .debug_frame 0x00000000 0xd4 ..\obj\lib\xmclib\src\xmc_common.o .ARM.attributes @@ -1435,19 +1613,19 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_dac.o .debug_macro 0x00000000 0x51 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_dac.o .debug_line 0x00000000 0x510 ..\obj\lib\xmclib\src\xmc_dac.o - .debug_str 0x00000000 0x76b92 ..\obj\lib\xmclib\src\xmc_dac.o + .debug_str 0x00000000 0x765cb ..\obj\lib\xmclib\src\xmc_dac.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_dac.o .debug_frame 0x00000000 0x158 ..\obj\lib\xmclib\src\xmc_dac.o .ARM.attributes @@ -1504,7 +1682,7 @@ Discarded input sections .text.XMC_DMA_GetOverrunStatus 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_ClearOverrunStatus - 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_Disable 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_IsEnabled @@ -1516,9 +1694,9 @@ Discarded input sections .text.XMC_DMA_CH_IsSuspended 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_EnableEvent - 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_DisableEvent - 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_ClearEventStatus 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_CH_Init @@ -1554,10 +1732,10 @@ Discarded input sections .text.XMC_DMA_CH_ClearDestinationPeripheralRequest 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_dma.o .text.XMC_DMA_IRQHandler - 0x00000000 0x124 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_info 0x00000000 0x18db ..\obj\lib\xmclib\src\xmc_dma.o - .debug_abbrev 0x00000000 0x30e ..\obj\lib\xmclib\src\xmc_dma.o - .debug_loc 0x00000000 0xcdd ..\obj\lib\xmclib\src\xmc_dma.o + 0x00000000 0x120 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_info 0x00000000 0x18bc ..\obj\lib\xmclib\src\xmc_dma.o + .debug_abbrev 0x00000000 0x317 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_loc 0x00000000 0xc89 ..\obj\lib\xmclib\src\xmc_dma.o .debug_aranges 0x00000000 0x128 ..\obj\lib\xmclib\src\xmc_dma.o .debug_ranges 0x00000000 0x118 ..\obj\lib\xmclib\src\xmc_dma.o @@ -1582,22 +1760,22 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x3c2 ..\obj\lib\xmclib\src\xmc_dma.o .debug_macro 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_dma.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_line 0x00000000 0x758 ..\obj\lib\xmclib\src\xmc_dma.o - .debug_str 0x00000000 0x7944a ..\obj\lib\xmclib\src\xmc_dma.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_line 0x00000000 0x755 ..\obj\lib\xmclib\src\xmc_dma.o + .debug_str 0x00000000 0x78e83 ..\obj\lib\xmclib\src\xmc_dma.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_dma.o - .debug_frame 0x00000000 0x2dc ..\obj\lib\xmclib\src\xmc_dma.o + .debug_frame 0x00000000 0x2d4 ..\obj\lib\xmclib\src\xmc_dma.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_dma.o COMMON 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_dma.o @@ -1692,19 +1870,19 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_dsd.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_dsd.o .debug_line 0x00000000 0x49e ..\obj\lib\xmclib\src\xmc_dsd.o - .debug_str 0x00000000 0x765f5 ..\obj\lib\xmclib\src\xmc_dsd.o + .debug_str 0x00000000 0x7602e ..\obj\lib\xmclib\src\xmc_dsd.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_dsd.o .debug_frame 0x00000000 0x138 ..\obj\lib\xmclib\src\xmc_dsd.o .ARM.attributes @@ -1749,7 +1927,7 @@ Discarded input sections 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ebu.o .text.XMC_EBU_ConfigureRegion 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_info 0x00000000 0xc52 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_info 0x00000000 0xc82 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_abbrev 0x00000000 0x218 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_loc 0x00000000 0x97 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_aranges @@ -1776,23 +1954,94 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_ebu.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ebu.o .debug_line 0x00000000 0x3a1 ..\obj\lib\xmclib\src\xmc_ebu.o - .debug_str 0x00000000 0x7641e ..\obj\lib\xmclib\src\xmc_ebu.o + .debug_str 0x00000000 0x75ea6 ..\obj\lib\xmclib\src\xmc_ebu.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ebu.o .debug_frame 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc_ebu.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_ebu.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_ecat.o + .text 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_ecat.o + .data 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_ecat.o + .bss 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_info 0x00000000 0xa4 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_abbrev 0x00000000 0x4e ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_aranges + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x197 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x87 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0xfd ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x5e ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x1df ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x1f ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x43 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x187 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_line 0x00000000 0x342 ..\obj\lib\xmclib\src\xmc_ecat.o + .debug_str 0x00000000 0x74b57 ..\obj\lib\xmclib\src\xmc_ecat.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_ecat.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_ecat.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eru.o @@ -1837,6 +2086,8 @@ Discarded input sections 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_ETL_SetEdgeDetection 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o + .text.XMC_ERU_ETL_GetEdgeDetection + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_ETL_SetStatusFlagMode 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_ETL_EnableOutputTrigger @@ -1853,12 +2104,12 @@ Discarded input sections 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o .text.XMC_ERU_OGU_SetServiceRequestMode 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_info 0x00000000 0xa37 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_abbrev 0x00000000 0x20c ..\obj\lib\xmclib\src\xmc_eru.o - .debug_loc 0x00000000 0x246 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_info 0x00000000 0xa73 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_abbrev 0x00000000 0x228 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_loc 0x00000000 0x288 ..\obj\lib\xmclib\src\xmc_eru.o .debug_aranges - 0x00000000 0x80 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_ranges 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_eru.o + 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_ranges 0x00000000 0x78 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x1ed ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_eru.o @@ -1880,21 +2131,21 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eru.o .debug_macro 0x00000000 0x2a1 ..\obj\lib\xmclib\src\xmc_eru.o - .debug_line 0x00000000 0x43c ..\obj\lib\xmclib\src\xmc_eru.o - .debug_str 0x00000000 0x77642 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_line 0x00000000 0x44e ..\obj\lib\xmclib\src\xmc_eru.o + .debug_str 0x00000000 0x7712c ..\obj\lib\xmclib\src\xmc_eru.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_eru.o - .debug_frame 0x00000000 0x104 ..\obj\lib\xmclib\src\xmc_eru.o + .debug_frame 0x00000000 0x114 ..\obj\lib\xmclib\src\xmc_eru.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_eru.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eth_mac.o @@ -1947,13 +2198,13 @@ Discarded input sections .text.XMC_ETH_MAC_ReadFrame 0x00000000 0x64 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_GetRxFrameSize - 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_SetManagmentClockDivider 0x00000000 0x8c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_Enable 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_Init - 0x00000000 0x80 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x90 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_Disable 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ReadPhy @@ -1969,17 +2220,15 @@ Discarded input sections .text.XMC_ETH_MAC_EnableEvent 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_DisableEvent - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ClearEventStatus 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_GetEventStatus 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ReturnRxDescriptor - 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_ReturnTxDescriptor - 0x00000000 0x14 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .text.XMC_ETH_MAC_IsTxDescriptorOwnedByDma - 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_SetVLANTag 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_InitPTP @@ -1998,13 +2247,13 @@ Discarded input sections 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_eth_mac.o .text.XMC_ETH_MAC_GetTxTimeStamp 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_info 0x00000000 0x1a9b ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_abbrev 0x00000000 0x333 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_loc 0x00000000 0x930 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_info 0x00000000 0x1a73 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_abbrev 0x00000000 0x315 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_loc 0x00000000 0x987 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_aranges - 0x00000000 0x118 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_ranges 0x00000000 0x108 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x374 ..\obj\lib\xmclib\src\xmc_eth_mac.o + 0x00000000 0x110 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_ranges 0x00000000 0x100 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x264 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_eth_mac.o @@ -2025,24 +2274,24 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0x131 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_eth_mac.o .debug_macro 0x00000000 0x29 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_line 0x00000000 0x6f8 ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_str 0x00000000 0x782d2 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_line 0x00000000 0x6fa ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_str 0x00000000 0x77d0e ..\obj\lib\xmclib\src\xmc_eth_mac.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_eth_mac.o - .debug_frame 0x00000000 0x2b4 ..\obj\lib\xmclib\src\xmc_eth_mac.o + .debug_frame 0x00000000 0x2a4 ..\obj\lib\xmclib\src\xmc_eth_mac.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_eth_mac.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_fce.o @@ -2124,19 +2373,19 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_fce.o .debug_macro 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_fce.o .debug_line 0x00000000 0x482 ..\obj\lib\xmclib\src\xmc_fce.o - .debug_str 0x00000000 0x76112 ..\obj\lib\xmclib\src\xmc_fce.o + .debug_str 0x00000000 0x75b4b ..\obj\lib\xmclib\src\xmc_fce.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_fce.o .debug_frame 0x00000000 0x148 ..\obj\lib\xmclib\src\xmc_fce.o .ARM.attributes @@ -2198,17 +2447,17 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x00000000 0xd4d ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x00000000 0xdc4 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_macro 0x00000000 0xba ..\obj\lib\xmclib\src\xmc_gpio.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_hrpwm.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_hrpwm.o @@ -2267,17 +2516,17 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_hrpwm.o .debug_line 0x00000000 0x344 ..\obj\lib\xmclib\src\xmc_hrpwm.o - .debug_str 0x00000000 0x75088 ..\obj\lib\xmclib\src\xmc_hrpwm.o + .debug_str 0x00000000 0x74b55 ..\obj\lib\xmclib\src\xmc_hrpwm.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_hrpwm.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_hrpwm.o @@ -2346,7 +2595,7 @@ Discarded input sections 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_i2c.o .text.XMC_I2C_CH_DisableEvent 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_info 0x00000000 0xc42 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_info 0x00000000 0xc43 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_abbrev 0x00000000 0x2db ..\obj\lib\xmclib\src\xmc_i2c.o .debug_loc 0x00000000 0x4a9 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_aranges @@ -2373,20 +2622,20 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x8b ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_i2c.o .debug_macro 0x00000000 0x2e ..\obj\lib\xmclib\src\xmc_i2c.o .debug_line 0x00000000 0x58c ..\obj\lib\xmclib\src\xmc_i2c.o - .debug_str 0x00000000 0x768a4 ..\obj\lib\xmclib\src\xmc_i2c.o + .debug_str 0x00000000 0x763ae ..\obj\lib\xmclib\src\xmc_i2c.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_i2c.o .debug_frame 0x00000000 0x12c ..\obj\lib\xmclib\src\xmc_i2c.o .ARM.attributes @@ -2429,10 +2678,10 @@ Discarded input sections .bss 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_i2s.o .text.XMC_I2S_CH_SetBaudrate 0x00000000 0x34 ..\obj\lib\xmclib\src\xmc_i2s.o - .text.XMC_I2S_CH_Init - 0x00000000 0x64 ..\obj\lib\xmclib\src\xmc_i2s.o .text.XMC_I2S_CH_SetSystemWordLength 0x00000000 0x64 ..\obj\lib\xmclib\src\xmc_i2s.o + .text.XMC_I2S_CH_Init + 0x00000000 0x6c ..\obj\lib\xmclib\src\xmc_i2s.o .text.XMC_I2S_CH_Transmit 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_i2s.o .text.XMC_I2S_CH_GetReceivedData @@ -2443,8 +2692,8 @@ Discarded input sections 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_i2s.o .text.XMC_I2S_CH_DisableEvent 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_info 0x00000000 0x978 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_abbrev 0x00000000 0x265 ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_info 0x00000000 0x992 ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_abbrev 0x00000000 0x29d ..\obj\lib\xmclib\src\xmc_i2s.o .debug_loc 0x00000000 0x3ca ..\obj\lib\xmclib\src\xmc_i2s.o .debug_aranges 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_i2s.o @@ -2470,21 +2719,21 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_macro 0x00000000 0x8e ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_macro 0x00000000 0x91 ..\obj\lib\xmclib\src\xmc_i2s.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_i2s.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_line 0x00000000 0x48f ..\obj\lib\xmclib\src\xmc_i2s.o - .debug_str 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..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_prng.o + .text 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_prng.o + .data 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_prng.o + .bss 0x00000000 0x0 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_info 0x00000000 0xa4 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_abbrev 0x00000000 0x4e ..\obj\lib\xmclib\src\xmc_prng.o + .debug_aranges + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x197 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x87 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0xfd ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x5e ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x1df ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x9c ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x52 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x1f ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x43 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x187 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_line 0x00000000 0x342 ..\obj\lib\xmclib\src\xmc_prng.o + .debug_str 0x00000000 0x74b57 ..\obj\lib\xmclib\src\xmc_prng.o + .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_prng.o + .ARM.attributes + 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_prng.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_rtc.o @@ -2747,22 +3209,26 @@ Discarded input sections 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetTime 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o + .text.XMC_RTC_SetTimeStdFormat + 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetTimeStdFormat 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_SetAlarm 0x00000000 0x30 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetAlarm 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o + .text.XMC_RTC_SetAlarmStdFormat + 0x00000000 0x64 ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetAlarmStdFormat 0x00000000 0x4c ..\obj\lib\xmclib\src\xmc_rtc.o .text.XMC_RTC_GetEventStatus 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_info 0x00000000 0x74f ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_abbrev 0x00000000 0x1b7 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_loc 0x00000000 0x21 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_info 0x00000000 0x7ec ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_abbrev 0x00000000 0x215 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_loc 0x00000000 0x63 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_aranges - 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_ranges 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_rtc.o + 0x00000000 0x78 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_ranges 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x292 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_rtc.o @@ -2784,16 +3250,16 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_rtc.o @@ -2805,10 +3271,10 @@ Discarded input sections .debug_macro 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0xd7 ..\obj\lib\xmclib\src\xmc_rtc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_line 0x00000000 0x53c ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_str 0x00000000 0x7653a ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_line 0x00000000 0x56d ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_str 0x00000000 0x75fa6 ..\obj\lib\xmclib\src\xmc_rtc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_rtc.o - .debug_frame 0x00000000 0xc0 ..\obj\lib\xmclib\src\xmc_rtc.o + .debug_frame 0x00000000 0xf8 ..\obj\lib\xmclib\src\xmc_rtc.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_rtc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_sdmmc.o @@ -2862,7 +3328,7 @@ Discarded input sections .text.XMC_SDMMC_DisableEvent 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_ClearEvent - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_sdmmc.o + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_GetEvent 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_GetR2Response @@ -2870,14 +3336,14 @@ Discarded input sections .text.XMC_SDMMC_SendCommand 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_sdmmc.o .text.XMC_SDMMC_SetDataTransferMode - 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_info 0x00000000 0xc49 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_abbrev 0x00000000 0x27b ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_loc 0x00000000 0x22b ..\obj\lib\xmclib\src\xmc_sdmmc.o + 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_info 0x00000000 0xb90 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_abbrev 0x00000000 0x245 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_loc 0x00000000 0x204 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_aranges 0x00000000 0x80 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_ranges 0x00000000 0x70 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x1da ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x1db ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_sdmmc.o @@ -2898,19 +3364,19 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0x38 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_line 0x00000000 0x464 ..\obj\lib\xmclib\src\xmc_sdmmc.o - .debug_str 0x00000000 0x774a9 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0x47 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_line 0x00000000 0x45b ..\obj\lib\xmclib\src\xmc_sdmmc.o + .debug_str 0x00000000 0x76c99 ..\obj\lib\xmclib\src\xmc_sdmmc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_sdmmc.o .debug_frame 0x00000000 0x108 ..\obj\lib\xmclib\src\xmc_sdmmc.o .ARM.attributes @@ -2998,21 +3464,21 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_spi.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x8e ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_spi.o - .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x91 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_spi.o + .debug_macro 0x00000000 0x2a ..\obj\lib\xmclib\src\xmc_spi.o .debug_line 0x00000000 0x4b8 ..\obj\lib\xmclib\src\xmc_spi.o - .debug_str 0x00000000 0x76e93 ..\obj\lib\xmclib\src\xmc_spi.o + .debug_str 0x00000000 0x76909 ..\obj\lib\xmclib\src\xmc_spi.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_spi.o .debug_frame 0x00000000 0xe4 ..\obj\lib\xmclib\src\xmc_spi.o .ARM.attributes @@ -3058,7 +3524,7 @@ Discarded input sections .text.XMC_UART_CH_Transmit 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc_uart.o .text.XMC_UART_CH_Stop - 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_uart.o + 0x00000000 0x24 ..\obj\lib\xmclib\src\xmc_uart.o .text.XMC_UART_CH_EnableEvent 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_uart.o .text.XMC_UART_CH_DisableEvent @@ -3083,18 +3549,18 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x8e ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x91 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_uart.o .debug_macro 0x00000000 0x28 ..\obj\lib\xmclib\src\xmc_uart.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbd.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usbd.o @@ -3248,28 +3714,173 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x29 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0x2c3 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_usbd.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_macro 0x00000000 0xc5 ..\obj\lib\xmclib\src\xmc_usbd.o .debug_line 0x00000000 0x981 ..\obj\lib\xmclib\src\xmc_usbd.o - .debug_str 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0x00000000 0x44 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeTransfer + 0x00000000 0xb8 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeTransferGetResult + 0x00000000 0x20 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_GetFrameNumber + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PortVbusOnOff + 0x00000000 0x68 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_Initialize + 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeDelete + 0x00000000 0x54 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_PipeCreate + 0x00000000 0xdc ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_HandleIrq + 0x00000000 0x4a8 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_GetInterruptStatus + 0x00000000 0xc ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_Select_VBUS + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_TurnOffResumeBit + 0x00000000 0x18 ..\obj\lib\xmclib\src\xmc_usbh.o + .text.XMC_USBH_osDelay + 0x00000000 0x4 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..\obj\lib\xmclib\src\xmc_usic.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_usic.o @@ -3341,18 +3952,18 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_usic.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x88 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0x2da ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x8b ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0x2ef ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_usic.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_vadc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_vadc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_vadc.o @@ -3422,9 +4033,11 @@ Discarded input sections .text.XMC_VADC_GROUP_SetSyncMaster 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_vadc.o .text.XMC_VADC_GROUP_CheckSlaveReadiness - 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_vadc.o + 0x00000000 0x3c ..\obj\lib\xmclib\src\xmc_vadc.o .text.XMC_VADC_GROUP_IgnoreSlaveReadiness - 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_vadc.o + 0x00000000 0x40 ..\obj\lib\xmclib\src\xmc_vadc.o + .text.XMC_VADC_GROUP_SetSyncSlaveReadySignal + 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_vadc.o .text.XMC_VADC_GROUP_EnableChannelSyncRequest 0x00000000 0x1c ..\obj\lib\xmclib\src\xmc_vadc.o .text.XMC_VADC_GROUP_DisableChannelSyncRequest @@ -3527,13 +4140,13 @@ Discarded input sections 0x00000000 0x2c ..\obj\lib\xmclib\src\xmc_vadc.o .rodata.g_xmc_vadc_group_array 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_info 0x00000000 0x3142 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_abbrev 0x00000000 0x331 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_loc 0x00000000 0x19e5 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_info 0x00000000 0x316c ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_abbrev 0x00000000 0x313 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_loc 0x00000000 0x19cc ..\obj\lib\xmclib\src\xmc_vadc.o .debug_aranges - 0x00000000 0x240 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_ranges 0x00000000 0x230 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x1d6 ..\obj\lib\xmclib\src\xmc_vadc.o + 0x00000000 0x248 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_ranges 0x00000000 0x238 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x1dc ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x892 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x174 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x22 ..\obj\lib\xmclib\src\xmc_vadc.o @@ -3554,21 +4167,21 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_vadc.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0xa0 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_macro 0x00000000 0x66 ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_line 0x00000000 0xb1b ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_str 0x00000000 0x783da ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x9f ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_macro 0x00000000 0x74 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_line 0x00000000 0xb46 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_str 0x00000000 0x77eb8 ..\obj\lib\xmclib\src\xmc_vadc.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_vadc.o - .debug_frame 0x00000000 0x568 ..\obj\lib\xmclib\src\xmc_vadc.o + .debug_frame 0x00000000 0x590 ..\obj\lib\xmclib\src\xmc_vadc.o .ARM.attributes 0x00000000 0x39 ..\obj\lib\xmclib\src\xmc_vadc.o .group 0x00000000 0x8 ..\obj\lib\xmclib\src\xmc_wdt.o @@ -3637,18 +4250,18 @@ Discarded input sections .debug_macro 0x00000000 0x30d ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x10 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x35 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0x162 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0x16e ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x2d ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x3b ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x50 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0xe66 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x16 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0x166f2 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0x12 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0x165d5 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0x19 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_macro 0x00000000 0x46 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_macro 0x00000000 0xa6 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_macro 0x00000000 0xa5 ..\obj\lib\xmclib\src\xmc_wdt.o .debug_line 0x00000000 0x394 ..\obj\lib\xmclib\src\xmc_wdt.o - .debug_str 0x00000000 0x75f00 ..\obj\lib\xmclib\src\xmc_wdt.o + .debug_str 0x00000000 0x75939 ..\obj\lib\xmclib\src\xmc_wdt.o .comment 0x00000000 0x6f ..\obj\lib\xmclib\src\xmc_wdt.o .debug_frame 0x00000000 0x58 ..\obj\lib\xmclib\src\xmc_wdt.o .ARM.attributes @@ -3683,7 +4296,7 @@ Discarded input sections .debug_macro 0x00000000 0x50 ..\obj\main.o .debug_macro 0x00000000 0xe66 ..\obj\main.o .debug_macro 0x00000000 0x16 ..\obj\main.o - .debug_macro 0x00000000 0x166f2 ..\obj\main.o + .debug_macro 0x00000000 0x165d5 ..\obj\main.o .data 0x00000000 0x0 ..\obj\startup_xmc4700.o .bss 0x00000000 0x0 ..\obj\startup_xmc4700.o .group 0x00000000 0x8 ..\obj\timer.o @@ -3718,7 +4331,7 @@ Discarded input sections .debug_macro 0x00000000 0x50 ..\obj\timer.o .debug_macro 0x00000000 0xe66 ..\obj\timer.o .debug_macro 0x00000000 0x16 ..\obj\timer.o - .debug_macro 0x00000000 0x166f2 ..\obj\timer.o + .debug_macro 0x00000000 0x165d5 ..\obj\timer.o .text 0x00000000 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-exit.o) .data 0x00000000 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-exit.o) .bss 0x00000000 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-exit.o) @@ -3766,7 +4379,7 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x00000000 __HEAP_SIZE = 0x0 0x00000100 __STACK_SIZE = 0x100 -.text 0x08004000 0xd48 +.text 0x08004000 0xd08 *(.isr_vector) .isr_vector 0x08004000 0x204 ..\obj\startup_xmc4700.o 0x08004000 __isr_vector @@ -3806,192 +4419,192 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x08004508 0x8c ..\obj\lib\system_xmc4700.o 0x08004508 SystemCoreClockUpdate .text.SystemCoreClockSetup - 0x08004594 0x1bc ..\obj\lib\system_xmc4700.o + 0x08004594 0x198 ..\obj\lib\system_xmc4700.o 0x08004594 SystemCoreClockSetup .text.SystemInit - 0x08004750 0x1c ..\obj\lib\system_xmc4700.o - 0x08004750 SystemInit + 0x0800472c 0x1c ..\obj\lib\system_xmc4700.o + 0x0800472c SystemInit .text.XMC_GPIO_Init - 0x0800476c 0x94 ..\obj\lib\xmclib\src\xmc4_gpio.o - 0x0800476c XMC_GPIO_Init + 0x08004748 0x94 ..\obj\lib\xmclib\src\xmc4_gpio.o + 0x08004748 XMC_GPIO_Init .text.XMC_SCU_RESET_DeassertPeripheralReset - 0x08004800 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o - 0x08004800 XMC_SCU_RESET_DeassertPeripheralReset + 0x080047dc 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x080047dc XMC_SCU_RESET_DeassertPeripheralReset .text.XMC_SCU_CLOCK_GetPeripheralClockFrequency - 0x08004818 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o - 0x08004818 XMC_SCU_CLOCK_GetPeripheralClockFrequency + 0x080047f4 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x080047f4 XMC_SCU_CLOCK_GetPeripheralClockFrequency .text.XMC_SCU_CLOCK_UngatePeripheralClock - 0x08004830 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o - 0x08004830 XMC_SCU_CLOCK_UngatePeripheralClock + 0x0800480c 0x18 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x0800480c XMC_SCU_CLOCK_UngatePeripheralClock .text.XMC_GPIO_SetMode - 0x08004848 0x30 ..\obj\lib\xmclib\src\xmc_gpio.o - 0x08004848 XMC_GPIO_SetMode + 0x08004824 0x30 ..\obj\lib\xmclib\src\xmc_gpio.o + 0x08004824 XMC_GPIO_SetMode .text.XMC_UART_CH_Init - 0x08004878 0x68 ..\obj\lib\xmclib\src\xmc_uart.o - 0x08004878 XMC_UART_CH_Init + 0x08004854 0x6c ..\obj\lib\xmclib\src\xmc_uart.o + 0x08004854 XMC_UART_CH_Init .text.XMC_UART_CH_GetReceivedData - 0x080048e0 0x18 ..\obj\lib\xmclib\src\xmc_uart.o - 0x080048e0 XMC_UART_CH_GetReceivedData + 0x080048c0 0x18 ..\obj\lib\xmclib\src\xmc_uart.o + 0x080048c0 XMC_UART_CH_GetReceivedData .text.XMC_USIC_CH_SetBaudrate - 0x080048f8 0x8c ..\obj\lib\xmclib\src\xmc_usic.o - 0x080048f8 XMC_USIC_CH_SetBaudrate + 0x080048d8 0x8c ..\obj\lib\xmclib\src\xmc_usic.o + 0x080048d8 XMC_USIC_CH_SetBaudrate .text.XMC_USIC_CH_TXFIFO_Configure - 0x08004984 0x30 ..\obj\lib\xmclib\src\xmc_usic.o - 0x08004984 XMC_USIC_CH_TXFIFO_Configure + 0x08004964 0x30 ..\obj\lib\xmclib\src\xmc_usic.o + 0x08004964 XMC_USIC_CH_TXFIFO_Configure .text.XMC_USIC_CH_RXFIFO_Configure - 0x080049b4 0x34 ..\obj\lib\xmclib\src\xmc_usic.o - 0x080049b4 XMC_USIC_CH_RXFIFO_Configure + 0x08004994 0x34 ..\obj\lib\xmclib\src\xmc_usic.o + 0x08004994 XMC_USIC_CH_RXFIFO_Configure .text.XMC_USIC_Enable - 0x080049e8 0x5c ..\obj\lib\xmclib\src\xmc_usic.o - 0x080049e8 XMC_USIC_Enable + 0x080049c8 0x5c ..\obj\lib\xmclib\src\xmc_usic.o + 0x080049c8 XMC_USIC_Enable .text.XMC_USIC_CH_Enable - 0x08004a44 0x74 ..\obj\lib\xmclib\src\xmc_usic.o - 0x08004a44 XMC_USIC_CH_Enable - .text.Init 0x08004ab8 0x10 ..\obj\main.o - .text.main 0x08004ac8 0x14 ..\obj\main.o - 0x08004ac8 main - .text 0x08004adc 0x134 ..\obj\startup_xmc4700.o - 0x08004adc Reset_Handler - 0x08004b2a NMI_Handler - 0x08004b2c HardFault_Handler - 0x08004b2e MemManage_Handler - 0x08004b30 BusFault_Handler - 0x08004b32 UsageFault_Handler - 0x08004b34 SVC_Handler - 0x08004b36 DebugMon_Handler - 0x08004b38 PendSV_Handler - 0x08004b3c Default_Handler - 0x08004b3e SCU_0_IRQHandler - 0x08004b40 ERU0_0_IRQHandler - 0x08004b42 ERU0_1_IRQHandler - 0x08004b44 ERU0_2_IRQHandler - 0x08004b46 ERU0_3_IRQHandler - 0x08004b48 ERU1_0_IRQHandler - 0x08004b4a ERU1_1_IRQHandler - 0x08004b4c ERU1_2_IRQHandler - 0x08004b4e ERU1_3_IRQHandler - 0x08004b50 PMU0_0_IRQHandler - 0x08004b52 VADC0_C0_0_IRQHandler - 0x08004b54 VADC0_C0_1_IRQHandler - 0x08004b56 VADC0_C0_2_IRQHandler - 0x08004b58 VADC0_C0_3_IRQHandler - 0x08004b5a VADC0_G0_0_IRQHandler - 0x08004b5c VADC0_G0_1_IRQHandler - 0x08004b5e VADC0_G0_2_IRQHandler - 0x08004b60 VADC0_G0_3_IRQHandler - 0x08004b62 VADC0_G1_0_IRQHandler - 0x08004b64 VADC0_G1_1_IRQHandler - 0x08004b66 VADC0_G1_2_IRQHandler - 0x08004b68 VADC0_G1_3_IRQHandler - 0x08004b6a VADC0_G2_0_IRQHandler - 0x08004b6c VADC0_G2_1_IRQHandler - 0x08004b6e VADC0_G2_2_IRQHandler - 0x08004b70 VADC0_G2_3_IRQHandler - 0x08004b72 VADC0_G3_0_IRQHandler - 0x08004b74 VADC0_G3_1_IRQHandler - 0x08004b76 VADC0_G3_2_IRQHandler - 0x08004b78 VADC0_G3_3_IRQHandler - 0x08004b7a DSD0_0_IRQHandler - 0x08004b7c DSD0_1_IRQHandler - 0x08004b7e DSD0_2_IRQHandler - 0x08004b80 DSD0_3_IRQHandler - 0x08004b82 DSD0_4_IRQHandler - 0x08004b84 DSD0_5_IRQHandler - 0x08004b86 DSD0_6_IRQHandler - 0x08004b88 DSD0_7_IRQHandler - 0x08004b8a DAC0_0_IRQHandler - 0x08004b8c DAC0_1_IRQHandler - 0x08004b8e CCU40_0_IRQHandler - 0x08004b90 CCU40_1_IRQHandler - 0x08004b92 CCU40_2_IRQHandler - 0x08004b94 CCU40_3_IRQHandler - 0x08004b96 CCU41_0_IRQHandler - 0x08004b98 CCU41_1_IRQHandler - 0x08004b9a CCU41_2_IRQHandler - 0x08004b9c CCU41_3_IRQHandler - 0x08004b9e CCU42_0_IRQHandler - 0x08004ba0 CCU42_1_IRQHandler - 0x08004ba2 CCU42_2_IRQHandler - 0x08004ba4 CCU42_3_IRQHandler - 0x08004ba6 CCU43_0_IRQHandler - 0x08004ba8 CCU43_1_IRQHandler - 0x08004baa CCU43_2_IRQHandler - 0x08004bac CCU43_3_IRQHandler - 0x08004bae CCU80_0_IRQHandler - 0x08004bb0 CCU80_1_IRQHandler - 0x08004bb2 CCU80_2_IRQHandler - 0x08004bb4 CCU80_3_IRQHandler - 0x08004bb6 CCU81_0_IRQHandler - 0x08004bb8 CCU81_1_IRQHandler - 0x08004bba CCU81_2_IRQHandler - 0x08004bbc CCU81_3_IRQHandler - 0x08004bbe POSIF0_0_IRQHandler - 0x08004bc0 POSIF0_1_IRQHandler - 0x08004bc2 POSIF1_0_IRQHandler - 0x08004bc4 POSIF1_1_IRQHandler - 0x08004bc6 CAN0_0_IRQHandler - 0x08004bc8 CAN0_1_IRQHandler - 0x08004bca CAN0_2_IRQHandler - 0x08004bcc CAN0_3_IRQHandler - 0x08004bce CAN0_4_IRQHandler - 0x08004bd0 CAN0_5_IRQHandler - 0x08004bd2 CAN0_6_IRQHandler - 0x08004bd4 CAN0_7_IRQHandler - 0x08004bd6 USIC0_0_IRQHandler - 0x08004bd8 USIC0_1_IRQHandler - 0x08004bda USIC0_2_IRQHandler - 0x08004bdc USIC0_3_IRQHandler - 0x08004bde USIC0_4_IRQHandler - 0x08004be0 USIC0_5_IRQHandler - 0x08004be2 USIC1_0_IRQHandler - 0x08004be4 USIC1_1_IRQHandler - 0x08004be6 USIC1_2_IRQHandler - 0x08004be8 USIC1_3_IRQHandler - 0x08004bea USIC1_4_IRQHandler - 0x08004bec USIC1_5_IRQHandler - 0x08004bee USIC2_0_IRQHandler - 0x08004bf0 USIC2_1_IRQHandler - 0x08004bf2 USIC2_2_IRQHandler - 0x08004bf4 USIC2_3_IRQHandler - 0x08004bf6 USIC2_4_IRQHandler - 0x08004bf8 USIC2_5_IRQHandler - 0x08004bfa LEDTS0_0_IRQHandler - 0x08004bfc FCE0_0_IRQHandler - 0x08004bfe GPDMA0_0_IRQHandler - 0x08004c00 SDMMC0_0_IRQHandler - 0x08004c02 USB0_0_IRQHandler - 0x08004c04 ETH0_0_IRQHandler - 0x08004c06 GPDMA1_0_IRQHandler + 0x08004a24 0x74 ..\obj\lib\xmclib\src\xmc_usic.o + 0x08004a24 XMC_USIC_CH_Enable + .text.Init 0x08004a98 0x10 ..\obj\main.o + .text.main 0x08004aa8 0x14 ..\obj\main.o + 0x08004aa8 main + .text 0x08004abc 0x134 ..\obj\startup_xmc4700.o + 0x08004abc Reset_Handler + 0x08004b0a NMI_Handler + 0x08004b0c HardFault_Handler + 0x08004b0e MemManage_Handler + 0x08004b10 BusFault_Handler + 0x08004b12 UsageFault_Handler + 0x08004b14 SVC_Handler + 0x08004b16 DebugMon_Handler + 0x08004b18 PendSV_Handler + 0x08004b1c Default_Handler + 0x08004b1e SCU_0_IRQHandler + 0x08004b20 ERU0_0_IRQHandler + 0x08004b22 ERU0_1_IRQHandler + 0x08004b24 ERU0_2_IRQHandler + 0x08004b26 ERU0_3_IRQHandler + 0x08004b28 ERU1_0_IRQHandler + 0x08004b2a ERU1_1_IRQHandler + 0x08004b2c ERU1_2_IRQHandler + 0x08004b2e ERU1_3_IRQHandler + 0x08004b30 PMU0_0_IRQHandler + 0x08004b32 VADC0_C0_0_IRQHandler + 0x08004b34 VADC0_C0_1_IRQHandler + 0x08004b36 VADC0_C0_2_IRQHandler + 0x08004b38 VADC0_C0_3_IRQHandler + 0x08004b3a VADC0_G0_0_IRQHandler + 0x08004b3c VADC0_G0_1_IRQHandler + 0x08004b3e VADC0_G0_2_IRQHandler + 0x08004b40 VADC0_G0_3_IRQHandler + 0x08004b42 VADC0_G1_0_IRQHandler + 0x08004b44 VADC0_G1_1_IRQHandler + 0x08004b46 VADC0_G1_2_IRQHandler + 0x08004b48 VADC0_G1_3_IRQHandler + 0x08004b4a VADC0_G2_0_IRQHandler + 0x08004b4c VADC0_G2_1_IRQHandler + 0x08004b4e VADC0_G2_2_IRQHandler + 0x08004b50 VADC0_G2_3_IRQHandler + 0x08004b52 VADC0_G3_0_IRQHandler + 0x08004b54 VADC0_G3_1_IRQHandler + 0x08004b56 VADC0_G3_2_IRQHandler + 0x08004b58 VADC0_G3_3_IRQHandler + 0x08004b5a DSD0_0_IRQHandler + 0x08004b5c DSD0_1_IRQHandler + 0x08004b5e DSD0_2_IRQHandler + 0x08004b60 DSD0_3_IRQHandler + 0x08004b62 DSD0_4_IRQHandler + 0x08004b64 DSD0_5_IRQHandler + 0x08004b66 DSD0_6_IRQHandler + 0x08004b68 DSD0_7_IRQHandler + 0x08004b6a DAC0_0_IRQHandler + 0x08004b6c DAC0_1_IRQHandler + 0x08004b6e CCU40_0_IRQHandler + 0x08004b70 CCU40_1_IRQHandler + 0x08004b72 CCU40_2_IRQHandler + 0x08004b74 CCU40_3_IRQHandler + 0x08004b76 CCU41_0_IRQHandler + 0x08004b78 CCU41_1_IRQHandler + 0x08004b7a CCU41_2_IRQHandler + 0x08004b7c CCU41_3_IRQHandler + 0x08004b7e CCU42_0_IRQHandler + 0x08004b80 CCU42_1_IRQHandler + 0x08004b82 CCU42_2_IRQHandler + 0x08004b84 CCU42_3_IRQHandler + 0x08004b86 CCU43_0_IRQHandler + 0x08004b88 CCU43_1_IRQHandler + 0x08004b8a CCU43_2_IRQHandler + 0x08004b8c CCU43_3_IRQHandler + 0x08004b8e CCU80_0_IRQHandler + 0x08004b90 CCU80_1_IRQHandler + 0x08004b92 CCU80_2_IRQHandler + 0x08004b94 CCU80_3_IRQHandler + 0x08004b96 CCU81_0_IRQHandler + 0x08004b98 CCU81_1_IRQHandler + 0x08004b9a CCU81_2_IRQHandler + 0x08004b9c CCU81_3_IRQHandler + 0x08004b9e POSIF0_0_IRQHandler + 0x08004ba0 POSIF0_1_IRQHandler + 0x08004ba2 POSIF1_0_IRQHandler + 0x08004ba4 POSIF1_1_IRQHandler + 0x08004ba6 CAN0_0_IRQHandler + 0x08004ba8 CAN0_1_IRQHandler + 0x08004baa CAN0_2_IRQHandler + 0x08004bac CAN0_3_IRQHandler + 0x08004bae CAN0_4_IRQHandler + 0x08004bb0 CAN0_5_IRQHandler + 0x08004bb2 CAN0_6_IRQHandler + 0x08004bb4 CAN0_7_IRQHandler + 0x08004bb6 USIC0_0_IRQHandler + 0x08004bb8 USIC0_1_IRQHandler + 0x08004bba USIC0_2_IRQHandler + 0x08004bbc USIC0_3_IRQHandler + 0x08004bbe USIC0_4_IRQHandler + 0x08004bc0 USIC0_5_IRQHandler + 0x08004bc2 USIC1_0_IRQHandler + 0x08004bc4 USIC1_1_IRQHandler + 0x08004bc6 USIC1_2_IRQHandler + 0x08004bc8 USIC1_3_IRQHandler + 0x08004bca USIC1_4_IRQHandler + 0x08004bcc USIC1_5_IRQHandler + 0x08004bce USIC2_0_IRQHandler + 0x08004bd0 USIC2_1_IRQHandler + 0x08004bd2 USIC2_2_IRQHandler + 0x08004bd4 USIC2_3_IRQHandler + 0x08004bd6 USIC2_4_IRQHandler + 0x08004bd8 USIC2_5_IRQHandler + 0x08004bda LEDTS0_0_IRQHandler + 0x08004bdc FCE0_0_IRQHandler + 0x08004bde GPDMA0_0_IRQHandler + 0x08004be0 SDMMC0_0_IRQHandler + 0x08004be2 USB0_0_IRQHandler + 0x08004be4 ETH0_0_IRQHandler + 0x08004be6 GPDMA1_0_IRQHandler .text.TimerSet - 0x08004c10 0xc ..\obj\timer.o - 0x08004c10 TimerSet + 0x08004bf0 0xc ..\obj\timer.o + 0x08004bf0 TimerSet .text.TimerInit - 0x08004c1c 0x44 ..\obj\timer.o - 0x08004c1c TimerInit + 0x08004bfc 0x44 ..\obj\timer.o + 0x08004bfc TimerInit .text.TimerGet - 0x08004c60 0xc ..\obj\timer.o - 0x08004c60 TimerGet + 0x08004c40 0xc ..\obj\timer.o + 0x08004c40 TimerGet .text.SysTick_Handler - 0x08004c6c 0x10 ..\obj\timer.o - 0x08004c6c SysTick_Handler - .text.exit 0x08004c7c 0x28 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-exit.o) - 0x08004c7c exit + 0x08004c4c 0x10 ..\obj\timer.o + 0x08004c4c SysTick_Handler + .text.exit 0x08004c5c 0x28 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-exit.o) + 0x08004c5c exit .text.__libc_init_array - 0x08004ca4 0x4c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-init.o) - 0x08004ca4 __libc_init_array - .text.memset 0x08004cf0 0x10 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-memset.o) - 0x08004cf0 memset - .text._exit 0x08004d00 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libnosys_s.a(_exit.o) - 0x08004d00 _exit + 0x08004c84 0x4c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-init.o) + 0x08004c84 __libc_init_array + .text.memset 0x08004cd0 0x10 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-memset.o) + 0x08004cd0 memset + .text._exit 0x08004ce0 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libnosys_s.a(_exit.o) + 0x08004ce0 _exit *(.init) - *fill* 0x08004d02 0x2 - .init 0x08004d04 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crti.o - 0x08004d04 _init - .init 0x08004d08 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtn.o + *fill* 0x08004ce2 0x2 + .init 0x08004ce4 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crti.o + 0x08004ce4 _init + .init 0x08004ce8 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtn.o *(.fini) - .fini 0x08004d10 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crti.o - 0x08004d10 _fini - .fini 0x08004d14 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtn.o + .fini 0x08004cf0 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crti.o + 0x08004cf0 _fini + .fini 0x08004cf4 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtn.o *crtbegin.o(.ctors) *crtbegin?.o(.ctors) *(EXCLUDE_FILE(*crtend.o *crtend?.o) .ctors) @@ -4003,49 +4616,45 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- *(SORT(.dtors.*)) *(.dtors) *(.rodata*) - .rodata.clear_peripheral_gate.7688 - 0x08004d1c 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o - .rodata.clear_peripheral_reset.7567 - 0x08004d2c 0x10 ..\obj\lib\xmclib\src\xmc4_scu.o .rodata.str1.1 - 0x08004d3c 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) - *fill* 0x08004d3e 0x2 + 0x08004cfc 0x2 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) + *fill* 0x08004cfe 0x2 .rodata._global_impure_ptr - 0x08004d40 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) - 0x08004d40 _global_impure_ptr + 0x08004d00 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-impure.o) + 0x08004d00 _global_impure_ptr *(.eh_frame*) - .eh_frame 0x08004d44 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o - .eh_frame 0x08004d44 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtend.o + .eh_frame 0x08004d04 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o + .eh_frame 0x08004d04 0x4 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtend.o -.glue_7 0x08004d48 0x0 - .glue_7 0x08004d48 0x0 linker stubs +.glue_7 0x08004d08 0x0 + .glue_7 0x08004d08 0x0 linker stubs -.glue_7t 0x08004d48 0x0 - .glue_7t 0x08004d48 0x0 linker stubs +.glue_7t 0x08004d08 0x0 + .glue_7t 0x08004d08 0x0 linker stubs -.vfp11_veneer 0x08004d48 0x0 - .vfp11_veneer 0x08004d48 0x0 linker stubs +.vfp11_veneer 0x08004d08 0x0 + .vfp11_veneer 0x08004d08 0x0 linker stubs -.v4_bx 0x08004d48 0x0 - .v4_bx 0x08004d48 0x0 linker stubs +.v4_bx 0x08004d08 0x0 + .v4_bx 0x08004d08 0x0 linker stubs -.iplt 0x08004d48 0x0 - .iplt 0x08004d48 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o +.iplt 0x08004d08 0x0 + .iplt 0x08004d08 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08004d48 __exidx_start = . + 0x08004d08 __exidx_start = . -.ARM.exidx 0x08004d48 0x8 +.ARM.exidx 0x08004d08 0x8 *(.ARM.exidx* .gnu.linkonce.armexidx.*) - .ARM.exidx 0x08004d48 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu/crt0.o - 0x08004d50 __exidx_end = . - 0x08004d50 __etext = . + .ARM.exidx 0x08004d08 0x8 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu/crt0.o + 0x08004d10 __exidx_end = . + 0x08004d10 __etext = . -.rel.dyn 0x08004d50 0x0 - .rel.iplt 0x08004d50 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o +.rel.dyn 0x08004d10 0x0 + .rel.iplt 0x08004d10 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o -.data 0x20000000 0x68 load address 0x08004d50 +.data 0x20000000 0x68 load address 0x08004d10 0x20000000 __data_start__ = . *(vtable) *(.data*) @@ -4070,49 +4679,48 @@ LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none- 0x20000068 . = ALIGN (0x4) 0x20000068 __data_end__ = . -.jcr 0x20000068 0x0 load address 0x08004db8 +.jcr 0x20000068 0x0 load address 0x08004d78 .jcr 0x20000068 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o -.igot.plt 0x20000068 0x0 load address 0x08004db8 +.igot.plt 0x20000068 0x0 load address 0x08004d78 .igot.plt 0x20000068 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o -.no_init 0x20000068 0x14 load address 0x08004db8 +.no_init 0x20000068 0x14 load address 0x08004d78 .no_init 0x20000068 0x14 ..\obj\lib\system_xmc4700.o 0x20000068 SystemCoreClock 0x2000006c g_chipid -.bss 0x2000007c 0x70 load address 0x08004dcc +.bss 0x2000007c 0x6c load address 0x08004d8c 0x2000007c __bss_start__ = . *(.bss*) .bss 0x2000007c 0x1c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu/crtbegin.o - .bss.xcpCtoRxLength.7700 - 0x20000098 0x1 ..\obj\boot.o - .bss.xcpCtoRxInProgress.7701 - 0x20000099 0x1 ..\obj\boot.o - *fill* 0x2000009a 0x2 - .bss.xcpCtoReqPacket.7699 - 0x2000009c 0x41 ..\obj\boot.o - *fill* 0x200000dd 0x3 - .bss.timer_counter_last.7078 - 0x200000e0 0x4 ..\obj\led.o - .bss.led_toggle_state.7077 - 0x200000e4 0x1 ..\obj\led.o - *fill* 0x200000e5 0x3 + .bss.xcpCtoReqPacket.7706 + 0x20000098 0x41 ..\obj\boot.o + .bss.xcpCtoRxLength.7707 + 0x200000d9 0x1 ..\obj\boot.o + .bss.xcpCtoRxInProgress.7708 + 0x200000da 0x1 ..\obj\boot.o + *fill* 0x200000db 0x1 + .bss.timer_counter_last.7074 + 0x200000dc 0x4 ..\obj\led.o + .bss.led_toggle_state.7073 + 0x200000e0 0x1 ..\obj\led.o + *fill* 0x200000e1 0x3 .bss.millisecond_counter - 0x200000e8 0x4 ..\obj\timer.o + 0x200000e4 0x4 ..\obj\timer.o *(COMMON) - 0x200000ec __bss_end__ = . + 0x200000e8 __bss_end__ = . -.heap 0x200000f0 0x0 - 0x200000f0 __end__ = . - 0x200000f0 end = __end__ +.heap 0x200000e8 0x0 + 0x200000e8 __end__ = . + 0x200000e8 end = __end__ *(.heap*) - .heap 0x200000f0 0x0 ..\obj\startup_xmc4700.o - 0x200000f0 __HeapLimit = . + .heap 0x200000e8 0x0 ..\obj\startup_xmc4700.o + 0x200000e8 __HeapLimit = . -.stack_dummy 0x200000f0 0x100 +.stack_dummy 0x200000e8 0x100 *(.stack) - .stack 0x200000f0 0x100 ..\obj\startup_xmc4700.o + .stack 0x200000e8 0x100 ..\obj\startup_xmc4700.o 0x20020000 __StackTop = (ORIGIN (RAM) + LENGTH (RAM)) 0x2001ff00 __StackLimit = (__StackTop - SIZEOF (.stack_dummy)) 0x20020000 PROVIDE (__stack, __StackTop) @@ -4125,6 +4733,8 @@ LOAD ..\obj\lib\xmclib\src\xmc4_flash.o LOAD ..\obj\lib\xmclib\src\xmc4_gpio.o LOAD ..\obj\lib\xmclib\src\xmc4_rtc.o LOAD ..\obj\lib\xmclib\src\xmc4_scu.o +LOAD ..\obj\lib\xmclib\src\xmc_acmp.o +LOAD ..\obj\lib\xmclib\src\xmc_bccu.o LOAD ..\obj\lib\xmclib\src\xmc_can.o LOAD ..\obj\lib\xmclib\src\xmc_ccu4.o LOAD ..\obj\lib\xmclib\src\xmc_ccu8.o @@ -4133,6 +4743,7 @@ LOAD ..\obj\lib\xmclib\src\xmc_dac.o LOAD ..\obj\lib\xmclib\src\xmc_dma.o LOAD ..\obj\lib\xmclib\src\xmc_dsd.o LOAD ..\obj\lib\xmclib\src\xmc_ebu.o +LOAD ..\obj\lib\xmclib\src\xmc_ecat.o LOAD ..\obj\lib\xmclib\src\xmc_eru.o LOAD ..\obj\lib\xmclib\src\xmc_eth_mac.o LOAD ..\obj\lib\xmclib\src\xmc_fce.o @@ -4141,12 +4752,16 @@ LOAD ..\obj\lib\xmclib\src\xmc_hrpwm.o LOAD ..\obj\lib\xmclib\src\xmc_i2c.o LOAD ..\obj\lib\xmclib\src\xmc_i2s.o LOAD ..\obj\lib\xmclib\src\xmc_ledts.o +LOAD ..\obj\lib\xmclib\src\xmc_math.o +LOAD ..\obj\lib\xmclib\src\xmc_pau.o LOAD ..\obj\lib\xmclib\src\xmc_posif.o +LOAD ..\obj\lib\xmclib\src\xmc_prng.o LOAD ..\obj\lib\xmclib\src\xmc_rtc.o LOAD ..\obj\lib\xmclib\src\xmc_sdmmc.o LOAD ..\obj\lib\xmclib\src\xmc_spi.o LOAD ..\obj\lib\xmclib\src\xmc_uart.o LOAD ..\obj\lib\xmclib\src\xmc_usbd.o +LOAD ..\obj\lib\xmclib\src\xmc_usbh.o LOAD ..\obj\lib\xmclib\src\xmc_usic.o LOAD ..\obj\lib\xmclib\src\xmc_vadc.o LOAD ..\obj\lib\xmclib\src\xmc_wdt.o @@ -4225,44 +4840,44 @@ OUTPUT(..\bin\demoprog_xmc4700.elf elf32-littlearm) .comment 0x0000006e 0x6f ..\obj\main.o .comment 0x0000006e 0x6f ..\obj\timer.o -.debug_info 0x00000000 0x6221 - .debug_info 0x00000000 0xc7b ..\obj\boot.o - .debug_info 0x00000c7b 0x449 ..\obj\led.o - .debug_info 0x000010c4 0x99a ..\obj\lib\system_xmc4700.o - .debug_info 0x00001a5e 0x412 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_info 0x00001e70 0x2048 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_info 0x00003eb8 0x38e ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_info 0x00004246 0x8c2 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_info 0x00004b08 0xd78 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_info 0x00005880 0x14f ..\obj\main.o - .debug_info 0x000059cf 0x8d ..\obj\startup_xmc4700.o - .debug_info 0x00005a5c 0x7c5 ..\obj\timer.o +.debug_info 0x00000000 0x64cf + .debug_info 0x00000000 0xc7c ..\obj\boot.o + .debug_info 0x00000c7c 0x449 ..\obj\led.o + .debug_info 0x000010c5 0x943 ..\obj\lib\system_xmc4700.o + .debug_info 0x00001a08 0x412 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_info 0x00001e1a 0x2311 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_info 0x0000412b 0x38e ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_info 0x000044b9 0x8fd ..\obj\lib\xmclib\src\xmc_uart.o + .debug_info 0x00004db6 0xd78 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_info 0x00005b2e 0x14f ..\obj\main.o + .debug_info 0x00005c7d 0x8d ..\obj\startup_xmc4700.o + .debug_info 0x00005d0a 0x7c5 ..\obj\timer.o -.debug_abbrev 0x00000000 0x130c +.debug_abbrev 0x00000000 0x12f6 .debug_abbrev 0x00000000 0x2e4 ..\obj\boot.o .debug_abbrev 0x000002e4 0x181 ..\obj\led.o .debug_abbrev 0x00000465 0x1c1 ..\obj\lib\system_xmc4700.o .debug_abbrev 0x00000626 0x136 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_abbrev 0x0000075c 0x317 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_abbrev 0x00000a73 0x11e ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_abbrev 0x00000b91 0x265 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_abbrev 0x00000df6 0x279 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_abbrev 0x0000106f 0xa5 ..\obj\main.o - .debug_abbrev 0x00001114 0x14 ..\obj\startup_xmc4700.o - .debug_abbrev 0x00001128 0x1e4 ..\obj\timer.o + .debug_abbrev 0x0000075c 0x301 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_abbrev 0x00000a5d 0x11e ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_abbrev 0x00000b7b 0x265 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_abbrev 0x00000de0 0x279 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_abbrev 0x00001059 0xa5 ..\obj\main.o + .debug_abbrev 0x000010fe 0x14 ..\obj\startup_xmc4700.o + .debug_abbrev 0x00001112 0x1e4 ..\obj\timer.o -.debug_loc 0x00000000 0x18b3 +.debug_loc 0x00000000 0x1930 .debug_loc 0x00000000 0xa7 ..\obj\boot.o .debug_loc 0x000000a7 0xc4 ..\obj\led.o .debug_loc 0x0000016b 0xa8 ..\obj\lib\system_xmc4700.o .debug_loc 0x00000213 0x9d ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_loc 0x000002b0 0xda7 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_loc 0x00001057 0x84 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_loc 0x000010db 0x24b ..\obj\lib\xmclib\src\xmc_uart.o - .debug_loc 0x00001326 0x533 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_loc 0x00001859 0x5a ..\obj\timer.o + .debug_loc 0x000002b0 0xdf8 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_loc 0x000010a8 0x84 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_loc 0x0000112c 0x277 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_loc 0x000013a3 0x533 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_loc 0x000018d6 0x5a ..\obj\timer.o -.debug_aranges 0x00000000 0x568 +.debug_aranges 0x00000000 0x610 .debug_aranges 0x00000000 0x48 ..\obj\boot.o .debug_aranges @@ -4272,33 +4887,33 @@ OUTPUT(..\bin\demoprog_xmc4700.elf elf32-littlearm) .debug_aranges 0x000000b8 0x28 ..\obj\lib\xmclib\src\xmc4_gpio.o .debug_aranges - 0x000000e0 0x308 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x000000e0 0x3b0 ..\obj\lib\xmclib\src\xmc4_scu.o .debug_aranges - 0x000003e8 0x28 ..\obj\lib\xmclib\src\xmc_gpio.o + 0x00000490 0x28 ..\obj\lib\xmclib\src\xmc_gpio.o .debug_aranges - 0x00000410 0x50 ..\obj\lib\xmclib\src\xmc_uart.o + 0x000004b8 0x50 ..\obj\lib\xmclib\src\xmc_uart.o .debug_aranges - 0x00000460 0x80 ..\obj\lib\xmclib\src\xmc_usic.o + 0x00000508 0x80 ..\obj\lib\xmclib\src\xmc_usic.o .debug_aranges - 0x000004e0 0x28 ..\obj\main.o + 0x00000588 0x28 ..\obj\main.o .debug_aranges - 0x00000508 0x20 ..\obj\startup_xmc4700.o + 0x000005b0 0x20 ..\obj\startup_xmc4700.o .debug_aranges - 0x00000528 0x40 ..\obj\timer.o + 0x000005d0 0x40 ..\obj\timer.o -.debug_ranges 0x00000000 0x4a8 +.debug_ranges 0x00000000 0x550 .debug_ranges 0x00000000 0x38 ..\obj\boot.o .debug_ranges 0x00000038 0x18 ..\obj\led.o .debug_ranges 0x00000050 0x38 ..\obj\lib\system_xmc4700.o .debug_ranges 0x00000088 0x18 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_ranges 0x000000a0 0x2f8 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_ranges 0x00000398 0x18 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_ranges 0x000003b0 0x40 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_ranges 0x000003f0 0x70 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_ranges 0x00000460 0x18 ..\obj\main.o - .debug_ranges 0x00000478 0x30 ..\obj\timer.o + .debug_ranges 0x000000a0 0x3a0 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_ranges 0x00000440 0x18 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_ranges 0x00000458 0x40 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_ranges 0x00000498 0x70 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_ranges 0x00000508 0x18 ..\obj\main.o + .debug_ranges 0x00000520 0x30 ..\obj\timer.o -.debug_macro 0x00000000 0x1b247 +.debug_macro 0x00000000 0x1b1ef .debug_macro 0x00000000 0x208 ..\obj\boot.o .debug_macro 0x00000208 0x892 ..\obj\boot.o .debug_macro 0x00000a9a 0x65 ..\obj\boot.o @@ -4313,89 +4928,89 @@ OUTPUT(..\bin\demoprog_xmc4700.elf elf32-littlearm) .debug_macro 0x00000f88 0x50 ..\obj\boot.o .debug_macro 0x00000fd8 0xe66 ..\obj\boot.o .debug_macro 0x00001e3e 0x16 ..\obj\boot.o - .debug_macro 0x00001e54 0x166f2 ..\obj\boot.o - .debug_macro 0x00018546 0x174 ..\obj\boot.o - .debug_macro 0x000186ba 0x22 ..\obj\boot.o - .debug_macro 0x000186dc 0x52 ..\obj\boot.o - .debug_macro 0x0001872e 0x35 ..\obj\boot.o - .debug_macro 0x00018763 0x9c ..\obj\boot.o - .debug_macro 0x000187ff 0x52 ..\obj\boot.o - .debug_macro 0x00018851 0x1f ..\obj\boot.o - .debug_macro 0x00018870 0x43 ..\obj\boot.o - .debug_macro 0x000188b3 0x20 ..\obj\boot.o - .debug_macro 0x000188d3 0x187 ..\obj\boot.o - .debug_macro 0x00018a5a 0x30d ..\obj\boot.o - .debug_macro 0x00018d67 0x10 ..\obj\boot.o - .debug_macro 0x00018d77 0x35 ..\obj\boot.o - .debug_macro 0x00018dac 0x170 ..\obj\boot.o - .debug_macro 0x00018f1c 0x46 ..\obj\boot.o - .debug_macro 0x00018f62 0x88 ..\obj\boot.o - .debug_macro 0x00018fea 0x2da ..\obj\boot.o - .debug_macro 0x000192c4 0x28 ..\obj\boot.o - .debug_macro 0x000192ec 0x28 ..\obj\boot.o - .debug_macro 0x00019314 0xd4d ..\obj\boot.o - .debug_macro 0x0001a061 0xba ..\obj\boot.o - .debug_macro 0x0001a11b 0x1ec ..\obj\led.o - .debug_macro 0x0001a307 0x22 ..\obj\led.o - .debug_macro 0x0001a329 0x317 ..\obj\lib\system_xmc4700.o - .debug_macro 0x0001a640 0x4c ..\obj\lib\system_xmc4700.o - .debug_macro 0x0001a68c 0x8d ..\obj\lib\system_xmc4700.o - .debug_macro 0x0001a719 0x4a ..\obj\lib\system_xmc4700.o - .debug_macro 0x0001a763 0x1c7 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_macro 0x0001a92a 0x1ef ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_macro 0x0001ab19 0x1bb ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_macro 0x0001acd4 0x1d9 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_macro 0x0001aead 0x1c4 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_macro 0x0001b071 0xeb ..\obj\main.o - .debug_macro 0x0001b15c 0xeb ..\obj\timer.o + .debug_macro 0x00001e54 0x165d5 ..\obj\boot.o + .debug_macro 0x00018429 0x174 ..\obj\boot.o + .debug_macro 0x0001859d 0x22 ..\obj\boot.o + .debug_macro 0x000185bf 0x52 ..\obj\boot.o + .debug_macro 0x00018611 0x35 ..\obj\boot.o + .debug_macro 0x00018646 0x9c ..\obj\boot.o + .debug_macro 0x000186e2 0x52 ..\obj\boot.o + .debug_macro 0x00018734 0x1f ..\obj\boot.o + .debug_macro 0x00018753 0x43 ..\obj\boot.o + .debug_macro 0x00018796 0x20 ..\obj\boot.o + .debug_macro 0x000187b6 0x187 ..\obj\boot.o + .debug_macro 0x0001893d 0x30d ..\obj\boot.o + .debug_macro 0x00018c4a 0x10 ..\obj\boot.o + .debug_macro 0x00018c5a 0x35 ..\obj\boot.o + .debug_macro 0x00018c8f 0x183 ..\obj\boot.o + .debug_macro 0x00018e12 0x46 ..\obj\boot.o + .debug_macro 0x00018e58 0x8b ..\obj\boot.o + .debug_macro 0x00018ee3 0x2ef ..\obj\boot.o + .debug_macro 0x000191d2 0x28 ..\obj\boot.o + .debug_macro 0x000191fa 0x28 ..\obj\boot.o + .debug_macro 0x00019222 0xdc4 ..\obj\boot.o + .debug_macro 0x00019fe6 0xba ..\obj\boot.o + .debug_macro 0x0001a0a0 0x1ec ..\obj\led.o + .debug_macro 0x0001a28c 0x22 ..\obj\led.o + .debug_macro 0x0001a2ae 0x317 ..\obj\lib\system_xmc4700.o + .debug_macro 0x0001a5c5 0x4c ..\obj\lib\system_xmc4700.o + .debug_macro 0x0001a611 0x8d ..\obj\lib\system_xmc4700.o + .debug_macro 0x0001a69e 0x4a ..\obj\lib\system_xmc4700.o + .debug_macro 0x0001a6e8 0x1c7 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_macro 0x0001a8af 0x212 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_macro 0x0001aac1 0x1bb ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_macro 0x0001ac7c 0x1d9 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_macro 0x0001ae55 0x1c4 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_macro 0x0001b019 0xeb ..\obj\main.o + .debug_macro 0x0001b104 0xeb ..\obj\timer.o -.debug_line 0x00000000 0x2ec4 +.debug_line 0x00000000 0x3072 .debug_line 0x00000000 0x48f ..\obj\boot.o .debug_line 0x0000048f 0x3e0 ..\obj\led.o - .debug_line 0x0000086f 0x3f0 ..\obj\lib\system_xmc4700.o - .debug_line 0x00000c5f 0x398 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_line 0x00000ff7 0xb48 ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_line 0x00001b3f 0x38a ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_line 0x00001ec9 0x450 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_line 0x00002319 0x4e4 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_line 0x000027fd 0x2d4 ..\obj\main.o - .debug_line 0x00002ad1 0xe3 ..\obj\startup_xmc4700.o - .debug_line 0x00002bb4 0x310 ..\obj\timer.o + .debug_line 0x0000086f 0x3e8 ..\obj\lib\system_xmc4700.o + .debug_line 0x00000c57 0x398 ..\obj\lib\xmclib\src\xmc4_gpio.o + .debug_line 0x00000fef 0xcf0 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_line 0x00001cdf 0x38a ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_line 0x00002069 0x45e ..\obj\lib\xmclib\src\xmc_uart.o + .debug_line 0x000024c7 0x4e4 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_line 0x000029ab 0x2d4 ..\obj\main.o + .debug_line 0x00002c7f 0xe3 ..\obj\startup_xmc4700.o + .debug_line 0x00002d62 0x310 ..\obj\timer.o -.debug_str 0x00000000 0x80b8b - .debug_str 0x00000000 0x7c276 ..\obj\boot.o - 0x7c4f0 (size before relaxing) - .debug_str 0x0007c276 0x9c ..\obj\led.o - 0x7b0ed (size before relaxing) - .debug_str 0x0007c312 0xe04 ..\obj\lib\system_xmc4700.o - 0x75a23 (size before relaxing) - .debug_str 0x0007d116 0x8f ..\obj\lib\xmclib\src\xmc4_gpio.o - 0x7b076 (size before relaxing) - .debug_str 0x0007d1a5 0x24f8 ..\obj\lib\xmclib\src\xmc4_scu.o - 0x778ea (size before relaxing) - .debug_str 0x0007f69d 0x7b ..\obj\lib\xmclib\src\xmc_gpio.o - 0x7aef1 (size before relaxing) - .debug_str 0x0007f718 0x608 ..\obj\lib\xmclib\src\xmc_uart.o - 0x76c8d (size before relaxing) - .debug_str 0x0007fd20 0x797 ..\obj\lib\xmclib\src\xmc_usic.o - 0x774ce (size before relaxing) - .debug_str 0x000804b7 0x14 ..\obj\main.o - 0x72358 (size before relaxing) - .debug_str 0x000804cb 0x6c0 ..\obj\timer.o - 0x72a81 (size before relaxing) +.debug_str 0x00000000 0x80fee + .debug_str 0x00000000 0x7c09e ..\obj\boot.o + 0x7c323 (size before relaxing) + .debug_str 0x0007c09e 0x9c ..\obj\led.o + 0x7aee3 (size before relaxing) + .debug_str 0x0007c13a 0xdca ..\obj\lib\system_xmc4700.o + 0x75489 (size before relaxing) + .debug_str 0x0007cf04 0x8f ..\obj\lib\xmclib\src\xmc4_gpio.o + 0x7ae6c (size before relaxing) + .debug_str 0x0007cf93 0x2b53 ..\obj\lib\xmclib\src\xmc4_scu.o + 0x779e4 (size before relaxing) + .debug_str 0x0007fae6 0x7b ..\obj\lib\xmclib\src\xmc_gpio.o + 0x7ace7 (size before relaxing) + .debug_str 0x0007fb61 0x622 ..\obj\lib\xmclib\src\xmc_uart.o + 0x7671d (size before relaxing) + .debug_str 0x00080183 0x797 ..\obj\lib\xmclib\src\xmc_usic.o + 0x76f44 (size before relaxing) + .debug_str 0x0008091a 0x14 ..\obj\main.o + 0x71df8 (size before relaxing) + .debug_str 0x0008092e 0x6c0 ..\obj\timer.o + 0x72521 (size before relaxing) -.debug_frame 0x00000000 0xbf0 +.debug_frame 0x00000000 0xd54 .debug_frame 0x00000000 0xac ..\obj\boot.o .debug_frame 0x000000ac 0x40 ..\obj\led.o .debug_frame 0x000000ec 0x94 ..\obj\lib\system_xmc4700.o .debug_frame 0x00000180 0x50 ..\obj\lib\xmclib\src\xmc4_gpio.o - .debug_frame 0x000001d0 0x6ac ..\obj\lib\xmclib\src\xmc4_scu.o - .debug_frame 0x0000087c 0x48 ..\obj\lib\xmclib\src\xmc_gpio.o - .debug_frame 0x000008c4 0x98 ..\obj\lib\xmclib\src\xmc_uart.o - .debug_frame 0x0000095c 0x158 ..\obj\lib\xmclib\src\xmc_usic.o - .debug_frame 0x00000ab4 0x40 ..\obj\main.o - .debug_frame 0x00000af4 0x68 ..\obj\timer.o - .debug_frame 0x00000b5c 0x28 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-exit.o) - .debug_frame 0x00000b84 0x2c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-init.o) - .debug_frame 0x00000bb0 0x20 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-memset.o) - .debug_frame 0x00000bd0 0x20 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libnosys_s.a(_exit.o) + .debug_frame 0x000001d0 0x810 ..\obj\lib\xmclib\src\xmc4_scu.o + .debug_frame 0x000009e0 0x48 ..\obj\lib\xmclib\src\xmc_gpio.o + .debug_frame 0x00000a28 0x98 ..\obj\lib\xmclib\src\xmc_uart.o + .debug_frame 0x00000ac0 0x158 ..\obj\lib\xmclib\src\xmc_usic.o + .debug_frame 0x00000c18 0x40 ..\obj\main.o + .debug_frame 0x00000c58 0x68 ..\obj\timer.o + .debug_frame 0x00000cc0 0x28 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-exit.o) + .debug_frame 0x00000ce8 0x2c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-init.o) + .debug_frame 0x00000d14 0x20 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libg_n.a(lib_a-memset.o) + .debug_frame 0x00000d34 0x20 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7e-m/fpu\libnosys_s.a(_exit.o) diff --git a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.srec b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.srec index deaee651..6df8172f 100644 --- a/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.srec +++ b/Target/Demo/ARMCM4_XMC4_XCM4700_Relax_Kit_GCC/Prog/bin/demoprog_xmc4700.srec @@ -1,61 +1,61 @@ S01F00002E2E5C62696E5C64656D6F70726F675F786D63343730302E73726563E9 -S3150800400000000220DD4A00082B4B00082D4B000853 -S315080040102F4B0008314B0008334B00080000000006 -S31508004020000000000000000000000000354B0008FA -S31508004030374B000800000000394B00086D4C00089B -S315080040403F4B0008414B0008434B0008454B00080E -S31508004050474B0008494B00084B4B00084D4B0008DE -S315080040604F4B0008000000000000000000000000A0 -S31508004070514B000800000000534B0008554B000840 -S31508004080574B0008594B00085B4B00085D4B00086E -S315080040905F4B0008614B0008634B0008654B00083E -S315080040A0674B0008694B00086B4B00086D4B00080E -S315080040B06F4B0008714B0008734B0008754B0008DE -S315080040C0774B0008794B00087B4B00087D4B0008AE -S315080040D07F4B0008814B0008834B0008854B00087E -S315080040E0874B0008894B00088B4B00088D4B00084E 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