From fd5fc2dfc5721e099cdffb94e2266e2b322a0ef5 Mon Sep 17 00:00:00 2001 From: Frank Voorburg Date: Wed, 19 Jul 2017 13:01:37 +0000 Subject: [PATCH] Refs #363. Added GCC/Makefile support to Nucleo-F091RC demo. git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@308 5dc33758-31d5-4daf-9ae8-b24bf3d40d73 --- .../Boot/bin/openblt_stm32f091.elf | Bin 609704 -> 623548 bytes .../Boot/bin/openblt_stm32f091.map | 5277 +-- .../Boot/bin/openblt_stm32f091.srec | 1000 +- .../Boot/cfg/STM32F091x.svd | 31643 ---------------- .../Boot/ide/stm32f091.depend | 569 - .../Boot/ide/stm32f091.ebp | 410 - .../Boot/ide/stm32f091.elay | 109 - .../Boot/lib/newlib/_exit.c | 38 + .../Boot/makefile | 174 + .../Boot/{cfg => }/stm32f091rc_flash.ld | 0 .../Prog/bin/demoprog_stm32f091.elf | Bin 489920 -> 502764 bytes .../Prog/bin/demoprog_stm32f091.map | 4191 +- .../Prog/bin/demoprog_stm32f091.srec | 512 +- .../Prog/cfg/STM32F091x.svd | 31643 ---------------- .../Prog/ide/stm32f091.depend | 788 - .../Prog/ide/stm32f091.ebp | 307 - .../Prog/ide/stm32f091.elay | 19 - .../Prog/lib/newlib/_exit.c | 38 + .../Prog/makefile | 164 + .../Prog/{cfg => }/stm32f091rc_flash.ld | 0 20 files changed, 1718 insertions(+), 75164 deletions(-) delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/cfg/STM32F091x.svd delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.depend delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.ebp delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.elay create mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/lib/newlib/_exit.c create mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/makefile rename Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/{cfg => }/stm32f091rc_flash.ld (100%) delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/cfg/STM32F091x.svd delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.depend delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.ebp delete mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.elay create mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/lib/newlib/_exit.c create mode 100644 Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/makefile rename Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/{cfg => }/stm32f091rc_flash.ld (100%) diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/bin/openblt_stm32f091.elf b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/bin/openblt_stm32f091.elf index 6c4230119f7eef1d5acf096aefb775e9913286e2..3f34c717a9a1e6a1c82138924fb7b5d3fd5b2463 100644 GIT binary patch delta 137135 zcmeFa2YggT+crKkXV31Y_hi#Ig%BW+&_P;&5IO=PDx%T_MF>qn!HtLtiVA`rl&D}q z#D)d2fMP{`ETBFriVze56*1UCO}^`zvu6oDKKebr-~ac1-|znhX7`@E%{}d&Idf)a z*RE`|>4t(O{+z1HFd>vM+X%lfM4?C&aY71FQJ5`7VYcuVF72Mzs3cnm22=1)l0j^N z)D|K9zrVPb6CrBG9+5SZPHrg|G`$k#68!5dg@1ti zRNPu0CH>LN{}z-3sdq+MyP{;WOVkt{xg%Qkv0|g8H^Y&u+0eVZ@|pSTD;vM8WKIX9 z^zLzMTcpe#C~6v=^yd@;bJaylw#SW^87xcCLUDEy>#6E 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..\obj\lib\spl\src\stm32f0xx_crc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_crs.o -LOAD ..\obj\lib\spl\src\stm32f0xx_dac.o -LOAD ..\obj\lib\spl\src\stm32f0xx_dbgmcu.o -LOAD ..\obj\lib\spl\src\stm32f0xx_dma.o -LOAD ..\obj\lib\spl\src\stm32f0xx_exti.o -LOAD ..\obj\lib\spl\src\stm32f0xx_flash.o -LOAD ..\obj\lib\spl\src\stm32f0xx_gpio.o -LOAD ..\obj\lib\spl\src\stm32f0xx_i2c.o -LOAD ..\obj\lib\spl\src\stm32f0xx_iwdg.o -LOAD ..\obj\lib\spl\src\stm32f0xx_misc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_pwr.o -LOAD ..\obj\lib\spl\src\stm32f0xx_rcc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_rtc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_spi.o -LOAD ..\obj\lib\spl\src\stm32f0xx_syscfg.o -LOAD ..\obj\lib\spl\src\stm32f0xx_tim.o -LOAD ..\obj\lib\spl\src\stm32f0xx_usart.o -LOAD ..\obj\lib\spl\src\stm32f0xx_wwdg.o -LOAD ..\obj\lib\system_stm32f0xx.o -LOAD ..\obj\main.o -LOAD ..\obj\startup_stm32f0xx.o -LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o -LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o -LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o -LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\gcc\cpu_comp.o -LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o -LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\timer.o -LOAD ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o -LOAD ..\obj\~#\~#\~#\source\assert.o -LOAD ..\obj\~#\~#\~#\source\backdoor.o -LOAD ..\obj\~#\~#\~#\source\boot.o -LOAD ..\obj\~#\~#\~#\source\com.o -LOAD ..\obj\~#\~#\~#\source\cop.o -LOAD ..\obj\~#\~#\~#\source\file.o -LOAD ..\obj\~#\~#\~#\source\net.o -LOAD ..\obj\~#\~#\~#\source\xcp.o -START GROUP -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libc_n.a -END GROUP -START GROUP -LOAD c:/program files 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0x2a4 ..\obj\lib\spl\src\stm32f0xx_gpio.o - .debug_loc 0x00001496 0xa2c ..\obj\lib\spl\src\stm32f0xx_rcc.o - .debug_loc 0x00001ec2 0x20a ..\obj\lib\spl\src\stm32f0xx_syscfg.o - .debug_loc 0x000020cc 0x97b ..\obj\lib\spl\src\stm32f0xx_usart.o - .debug_loc 0x00002a47 0x113 ..\obj\lib\system_stm32f0xx.o - .debug_loc 0x00002b5a 0x20f ..\obj\~#\~#\~#\source\armcm0_stm32f0\can.o - .debug_loc 0x00002d69 0xbe ..\obj\~#\~#\~#\source\armcm0_stm32f0\cpu.o - .debug_loc 0x00002e27 0x6ad ..\obj\~#\~#\~#\source\armcm0_stm32f0\flash.o - .debug_loc 0x000034d4 0xa5 ..\obj\~#\~#\~#\source\armcm0_stm32f0\nvm.o - .debug_loc 0x00003579 0x130 ..\obj\~#\~#\~#\source\armcm0_stm32f0\uart.o - .debug_loc 0x000036a9 0x42 ..\obj\~#\~#\~#\source\assert.o - .debug_loc 0x000036eb 0x8b ..\obj\~#\~#\~#\source\com.o - .debug_loc 0x00003776 0x3b6 ..\obj\~#\~#\~#\source\xcp.o + +bin/openblt_stm32f091.elf: file format elf32-littlearm +bin/openblt_stm32f091.elf +architecture: arm, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x08000000 + +Program Header: +0x70000001 off 0x00011f28 vaddr 0x08001f28 paddr 0x08001f28 align 2**2 + filesz 0x00000008 memsz 0x00000008 flags r-- + LOAD off 0x00010000 vaddr 0x08000000 paddr 0x08000000 align 2**16 + filesz 0x00001f30 memsz 0x00001f30 flags r-x + LOAD off 0x000200c0 vaddr 0x200000c0 paddr 0x08001f30 align 2**16 + filesz 0x0000007c memsz 0x0000058c flags rw- +private flags = 5000200: [Version5 EABI] [soft-float ABI] + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text 00001f28 08000000 08000000 00010000 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .ARM.exidx 00000008 08001f28 08001f28 00011f28 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 2 .data 0000007c 200000c0 08001f30 000200c0 2**2 + CONTENTS, ALLOC, LOAD, DATA + 3 .bss 00000510 2000013c 08001fac 0002013c 2**2 + ALLOC + 4 .stack_dummy 00000100 20000650 20000650 00020140 2**3 + CONTENTS, READONLY + 5 .ARM.attributes 00000028 00000000 00000000 00020240 2**0 + CONTENTS, READONLY + 6 .comment 0000006e 00000000 00000000 00020268 2**0 + CONTENTS, READONLY + 7 .debug_line 00006206 00000000 00000000 000202d6 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_info 0000797f 00000000 00000000 000264dc 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_abbrev 00001fba 00000000 00000000 0002de5b 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_aranges 000009b0 00000000 00000000 0002fe18 2**3 + CONTENTS, READONLY, DEBUGGING + 11 .debug_ranges 000008b8 00000000 00000000 000307c8 2**0 + CONTENTS, READONLY, DEBUGGING + 12 .debug_macro 0000f0ad 00000000 00000000 00031080 2**0 + CONTENTS, READONLY, DEBUGGING + 13 .debug_str 00050082 00000000 00000000 0004012d 2**0 + CONTENTS, READONLY, DEBUGGING + 14 .debug_frame 00001418 00000000 00000000 000901b0 2**2 + CONTENTS, READONLY, DEBUGGING + 15 .debug_loc 00003b7e 00000000 00000000 000915c8 2**0 + CONTENTS, READONLY, DEBUGGING +SYMBOL TABLE: +08000000 l d .text 00000000 .text +08001f28 l d .ARM.exidx 00000000 .ARM.exidx +200000c0 l d .data 00000000 .data +2000013c l d .bss 00000000 .bss +20000650 l d .stack_dummy 00000000 .stack_dummy +00000000 l d .ARM.attributes 00000000 .ARM.attributes +00000000 l d .comment 00000000 .comment +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_ranges 00000000 .debug_ranges +00000000 l d .debug_macro 00000000 .debug_macro +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_frame 00000000 .debug_frame +00000000 l d .debug_loc 00000000 .debug_loc +00000000 l df *ABS* 00000000 obj/startup_stm32f0xx.o +00000100 l *ABS* 00000000 Stack_Size +00000000 l *ABS* 00000000 Heap_Size +080001ae l .text 00000000 .flash_to_ram_loop_end +080001a4 l .text 00000000 .flash_to_ram_loop +080001d8 l .text 00000000 .fill_zero_bss +080001d4 l .text 00000000 .loop_zero_bss +00000000 l df *ABS* 00000000 crtstuff.c +08001f24 l O .text 00000000 __EH_FRAME_BEGIN__ +080000c0 l F .text 00000000 __do_global_dtors_aux +2000013c l .bss 00000000 completed.8603 +20000138 l O .data 00000000 __do_global_dtors_aux_fini_array_entry +080000e8 l F .text 00000000 frame_dummy +20000140 l .bss 00000000 object.8608 +20000134 l O .data 00000000 __frame_dummy_init_array_entry +00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/crt0.o +00000000 l df *ABS* 00000000 main.c +00000000 l df *ABS* 00000000 hooks.c +00000000 l df *ABS* 00000000 led.c +20000158 l O .bss 00000004 nextBlinkEvent.6556 +2000015c l O .bss 00000002 ledBlinkIntervalMs +2000015e l O .bss 00000001 ledOn.6555 +00000000 l df *ABS* 00000000 _exit.c +00000000 l df *ABS* 00000000 stm32f0xx_can.c +00000000 l df *ABS* 00000000 stm32f0xx_rcc.c +200000c0 l O .data 00000010 APBAHBPrescTable +00000000 l df *ABS* 00000000 stm32f0xx_flash.c +00000000 l df *ABS* 00000000 stm32f0xx_syscfg.c +00000000 l df *ABS* 00000000 stm32f0xx_usart.c +00000000 l df *ABS* 00000000 stm32f0xx_gpio.c +00000000 l df *ABS* 00000000 system_stm32f0xx.c +00000000 l df *ABS* 00000000 xcp.c +08000e54 l F .text 00000014 XcpSetCtoError +08001dc0 l O .text 00000008 xcpStationId +20000160 l O .bss 0000004c xcpInfo +00000000 l df *ABS* 00000000 com.c +200001ac l O .bss 00000040 xcpCtoReqPacket.4275 +200000d0 l O .data 00000001 comActiveInterface +00000000 l df *ABS* 00000000 boot.c +00000000 l df *ABS* 00000000 cop.c +00000000 l df *ABS* 00000000 backdoor.c +200001ec l O .bss 00000001 backdoorOpen +200001f0 l O .bss 00000004 backdoorOpenTime +00000000 l df *ABS* 00000000 assert.c +00000000 l df *ABS* 00000000 uart.c +080012e8 l F .text 00000034 UartTransmitByte +0800131c l F .text 00000024 UartReceiveByte +200001f4 l O .bss 00000001 xcpCtoRxLength.6565 +200001f8 l O .bss 00000004 xcpCtoRxStartTime.6567 +200001fc l O .bss 00000041 xcpCtoReqPacket.6564 +2000023d l O .bss 00000001 xcpCtoRxInProgress.6566 +00000000 l df *ABS* 00000000 nvm.c +00000000 l df *ABS* 00000000 cpu.c +00000000 l df *ABS* 00000000 flash.c +08001520 l F .text 0000003c FlashGetSector +0800155c l F .text 00000084 FlashWriteBlock +080015e0 l F .text 00000054 FlashSwitchBlock +08001634 l F .text 00000098 FlashAddToBlock +08001df0 l O .text 000000e4 flashLayout +20000240 l O .bss 00000204 bootBlockInfo +20000444 l O .bss 00000204 blockInfo +00000000 l df *ABS* 00000000 can.c +08001efc l O .text 00000024 canTiming +00000000 l df *ABS* 00000000 timer.c +20000648 l O .bss 00000004 millisecond_counter +00000000 l df *ABS* 00000000 cpu_comp.c +00000000 l df *ABS* 00000000 _udivsi3.o +08001b30 l .text 00000000 .udivsi3_skip_div0_test +00000000 l df *ABS* 00000000 _dvmd_tls.o +00000000 l df *ABS* 00000000 exit.c +00000000 l df *ABS* 00000000 init.c +00000000 l df *ABS* 00000000 memset.c +00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o +00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o +00000000 l df *ABS* 00000000 impure.c +200000d4 l O .data 00000060 impure_data +00000000 l df *ABS* 00000000 crtstuff.c +08001f24 l O .text 00000000 __FRAME_END__ +00000000 l df *ABS* 00000000 +20000138 l .data 00000000 __init_array_end +20000134 l .data 00000000 __preinit_array_end +20000134 l .data 00000000 __init_array_start +20000134 l .data 00000000 __preinit_array_start +0800116c g F .text 00000020 ComInit +080016e4 g F .text 0000005c FlashWrite +20000650 g .stack_dummy 00000000 __HeapBase +08000a54 g F .text 00000020 FLASH_Unlock +080012e0 g F .text 00000008 AssertFailure +08001a68 g F .text 00000064 CanReceivePacket +08000d74 g F .text 00000022 GPIO_PinAFConfig +00000000 g *ABS* 00000000 __HEAP_SIZE +08001afc g F .text 0000001c TimerUpdate +08000e94 g F .text 00000010 XcpPacketTransmitted +200000c0 g .data 00000000 __data_start__ +0800020a w F .text 00000002 TIM1_CC_IRQHandler +0800118c g F .text 00000038 ComTask +080001e4 w F .text 00000002 HardFault_Handler +08000b1c g F .text 00000064 FLASH_ProgramWord +080004f4 g F .text 000000fc CAN_FilterInit +08000206 w F .text 00000002 ADC1_COMP_IRQHandler +080001ea w F .text 00000002 SysTick_Handler +080001f0 w F .text 00000002 PVD_IRQHandler +08001248 g F .text 0000001c BootInit +080001e8 w F .text 00000002 PendSV_Handler +080001e2 w F .text 00000002 NMI_Handler +080006e8 g F .text 0000005c CAN_TransmitStatus +08001f30 g .ARM.exidx 00000000 __exidx_end +0800022e w F .text 00000002 BootRAM +0800021c w F .text 00000002 I2C1_IRQHandler +080012c0 g F .text 00000020 BackDoorInit +08001f30 g .ARM.exidx 00000000 __etext +08000cac g F .text 0000000e USART_GetFlagStatus +08001280 g F .text 00000008 CopService +08001b28 g F .text 00000004 CpuIrqDisable +08000ae4 g F .text 00000038 FLASH_ErasePage +0800192c g F .text 00000008 FlashGetUserProgBaseAddress +08001af0 g F .text 0000000c TimerReset +08000c90 g F .text 00000008 USART_ReceiveData +08001264 g F .text 00000014 BootTask +08001b30 g F .text 0000010a .hidden __udivsi3 +08001850 g F .text 00000050 FlashWriteChecksum +08000a00 g F .text 0000001c RCC_APB2PeriphClockCmd +080011c8 g F .text 00000030 ComTransmitPacket +08000cbc g F .text 000000a2 GPIO_Init +20000650 g .stack_dummy 00000000 __HeapLimit +2000013c g .bss 00000000 __bss_start__ +08000220 w F .text 00000002 SPI1_IRQHandler +08000c70 g F .text 00000018 USART_Cmd +08000210 w F .text 00000002 TIM6_DAC_IRQHandler +08000a1c g F .text 0000001c RCC_APB1PeriphClockCmd +08001f28 g .text 00000000 __exidx_start +08001f20 g O .text 00000004 _global_impure_ptr +08001c74 g F .text 0000004c __libc_init_array +08000228 w F .text 00000002 USART3_4_IRQHandler +080009e4 g F .text 0000001c RCC_AHBPeriphClockCmd +08000120 g F .text 00000000 _mainCRTStartup +080001fa w F .text 00000002 EXTI2_3_IRQHandler +080003d0 g F .text 00000018 CAN_DeInit +08000e84 g F .text 00000010 XcpIsConnected +08001cd0 g F .text 00000000 _init +0800021e w F .text 00000002 I2C2_IRQHandler +08001474 g F .text 00000008 NvmInit +080016cc g F .text 00000018 FlashInit +08000a74 g F .text 00000010 FLASH_Lock +08001494 g F .text 00000008 NvmGetUserProgBaseAddress +0800021a w F .text 00000002 TIM17_IRQHandler +00000000 w *UND* 00000000 __libc_fini_array +080001f2 w F .text 00000002 RTC_IRQHandler +08000198 g F .text 00000034 Reset_Handler +080011c4 g F .text 00000002 ComFree +08000d6c g F .text 00000004 GPIO_SetBits +00000000 w *UND* 00000000 __sf_fake_stderr +00000000 w *UND* 00000000 __deregister_frame_info +20000650 g .stack_dummy 00000000 end +08001340 g F .text 0000003c UartInit +2000013c g .data 00000000 __data_end__ +080007fc g F .text 000001e8 RCC_GetClocksFreq +08001484 g F .text 00000008 NvmErase +0800032c g F .text 0000001c CpuUserProgramStartHook +08000218 w F .text 00000002 TIM16_IRQHandler +08000b94 g F .text 000000dc USART_Init +2000064c g .bss 00000000 __bss_end__ +00000100 g *ABS* 00000000 __STACK_SIZE +0800020e w F .text 00000002 TIM3_IRQHandler +080001fc w F .text 00000002 EXTI4_15_IRQHandler +080001f6 w F .text 00000002 RCC_IRQHandler +08000744 g F .text 0000009a CAN_Receive +00000000 w *UND* 00000000 __call_exitprocs +080003e8 g F .text 0000010c CAN_Init +08000200 w F .text 00000002 DMA1_Channel1_IRQHandler +080001ec w F .text 00000002 Default_Handler +08000120 g F .text 00000000 _start +08000a90 g F .text 00000028 FLASH_GetStatus +08000ea4 g F .text 000002c8 XcpPacketReceived +080005f0 g F .text 00000020 CAN_StructInit +080014ac g F .text 00000008 CpuInit +08000a84 g F .text 0000000c FLASH_ClearFlag +08000ab8 g F .text 0000002c FLASH_WaitForLastOperation +0800035c g F .text 0000000c LedBlinkInit +0800022a w F .text 00000002 CEC_IRQHandler +08000214 w F .text 00000002 TIM14_IRQHandler +080018f8 g F .text 00000034 FlashDone +08000204 w F .text 00000002 DMA1_Channel4_5_IRQHandler +00000000 w *UND* 00000000 software_init_hook +08000368 g F .text 00000054 LedBlinkTask +08000d70 g F .text 00000004 GPIO_ResetBits +08000212 w F .text 00000002 TIM7_IRQHandler +08001a14 g F .text 00000054 CanTransmitPacket +08000216 w F .text 00000002 TIM15_IRQHandler +080001f8 w F .text 00000002 EXTI0_1_IRQHandler +0800022c w F .text 00000002 USB_IRQHandler +08001c44 w F .text 00000002 .hidden __aeabi_ldiv0 +08000c98 g F .text 00000014 USART_OverrunDetectionConfig +08000e68 g F .text 0000001c XcpInit +08000222 w F .text 00000002 SPI2_IRQHandler +00000000 w *UND* 00000000 __sf_fake_stdin +08001740 g F .text 00000110 FlashErase +08000b80 g F .text 00000014 SYSCFG_MemoryRemapConfig +08001cc0 g F .text 00000010 memset +080003bc g F .text 0000000e LedBlinkExit +08000000 g .text 000000c0 __isr_vector +08000238 g F .text 000000f4 main +08001b30 g F .text 00000000 .hidden __aeabi_uidiv +080001e6 w F .text 00000002 SVC_Handler +0800149c g F .text 00000010 NvmDone +0800137c g F .text 00000058 UartTransmitPacket +0800148c g F .text 00000008 NvmVerifyChecksum +00000000 w *UND* 00000000 hardware_init_hook +080014b4 g F .text 00000022 CpuMemCopy +20000650 g .stack_dummy 00000000 __end__ +080007e0 g F .text 0000001c CAN_MessagePending +08000d98 g F .text 000000bc SystemInit +08001cdc g F .text 00000000 _fini +0800121c g F .text 00000024 ComGetActiveInterfaceMaxTxLen +00000000 w *UND* 00000000 atexit +080013d4 g F .text 000000a0 UartReceivePacket +08001b2c g F .text 00000004 CpuIrqEnable +20008000 g .bss 00000000 __StackTop +080001fe w F .text 00000002 TS_IRQHandler +080001ee w F .text 00000002 WWDG_IRQHandler +08000a38 g F .text 0000001c RCC_APB1PeriphResetCmd +08001278 g F .text 00000008 CopInit +0800020c w F .text 00000002 TIM2_IRQHandler +08001934 g F .text 000000e0 CanInit +0800147c g F .text 00000008 NvmWrite +080014d8 g F .text 00000046 CpuStartUserProgram +08000202 w F .text 00000002 DMA1_Channel2_3_IRQHandler +08000c88 g F .text 00000008 USART_SendData +20008000 g *ABS* 00000000 __stack +08001c3c g F .text 00000008 .hidden __aeabi_uidivmod +080018a0 g F .text 00000058 FlashVerifyChecksum +20007f00 g *ABS* 00000100 __StackLimit +08000226 w F .text 00000002 USART2_IRQHandler +08001c48 g F .text 0000002c exit +08001240 g F .text 00000008 ComIsConnected +00000000 w *UND* 00000000 __sf_fake_stdout +08001c44 w F .text 00000002 .hidden __aeabi_idiv0 +080001f4 w F .text 00000002 FLASH_IRQHandler +080003cc w F .text 00000002 _exit +080011f8 g F .text 00000024 ComGetActiveInterfaceMaxRxLen +08000224 w F .text 00000002 USART1_IRQHandler +08000348 g F .text 0000000a CopInitHook +08001288 g F .text 00000038 BackDoorCheck +08000208 w F .text 00000002 TIM1_BRK_UP_TRG_COM_IRQHandler +08001b18 g F .text 00000010 TimerGet +00000000 w *UND* 00000000 _Jv_RegisterClasses +08000d60 g F .text 0000000c GPIO_ReadInputDataBit +08001acc g F .text 00000024 TimerInit +00000000 w *UND* 00000000 __register_frame_info +08000354 g F .text 00000008 CopServiceHook +08000610 g F .text 000000d6 CAN_Transmit + + diff --git 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a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/cfg/STM32F091x.svd +++ /dev/null @@ -1,31643 +0,0 @@ - - - STM32F091x - 1.0 - STM32F091x - - - 8 - - 32 - - 0x20 - 0x0 - 0xFFFFFFFF - - - CRC - cyclic redundancy check calculation - unit - CRC - 0x40023000 - - 0x0 - 0x400 - registers - - - - DR - DR - Data register - 0x0 - 0x20 - read-write - 0xFFFFFFFF - - - DR - Data register bits - 0 - 32 - - - - - IDR - IDR - Independent data register - 0x4 - 0x20 - read-write - 0x00000000 - - - IDR - General-purpose 8-bit data register - bits - 0 - 8 - - - - - CR - CR - Control register - 0x8 - 0x20 - read-write - 0x00000000 - - - RESET - reset bit - 0 - 1 - - - REV_IN - Reverse input data - 5 - 2 - - - REV_OUT - Reverse output data - 7 - 1 - - - - - INIT - INIT - Initial CRC value - 0xC - 0x20 - read-write - 0xFFFFFFFF - - - INIT - Programmable initial CRC - value - 0 - 32 - - - - - - - GPIOF - General-purpose I/Os - GPIO - 0x48001400 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x00000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bit - 15 - 15 - 1 - - - OT14 - Port x configuration bit - 14 - 14 - 1 - - - OT13 - Port x configuration bit - 13 - 13 - 1 - - - OT12 - Port x configuration bit - 12 - 12 - 1 - - - OT11 - Port x configuration bit - 11 - 11 - 1 - - - OT10 - Port x configuration bit - 10 - 10 - 1 - - - OT9 - Port x configuration bit 9 - 9 - 1 - - - OT8 - Port x configuration bit 8 - 8 - 1 - - - OT7 - Port x configuration bit 7 - 7 - 1 - - - OT6 - Port x configuration bit 6 - 6 - 1 - - - OT5 - Port x configuration bit 5 - 5 - 1 - - - OT4 - Port x configuration bit 4 - 4 - 1 - - - OT3 - Port x configuration bit 3 - 3 - 1 - - - OT2 - Port x configuration bit 2 - 2 - 1 - - - OT1 - Port x configuration bit 1 - 1 - 1 - - - OT0 - Port x configuration bit 0 - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x00000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Port x lock bit y - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - BRR - BRR - Port bit reset register - 0x28 - 0x20 - write-only - 0x00000000 - - - BR0 - Port x Reset bit y - 0 - 1 - - - BR1 - Port x Reset bit y - 1 - 1 - - - BR2 - Port x Reset bit y - 2 - 1 - - - BR3 - Port x Reset bit y - 3 - 1 - - - BR4 - Port x Reset bit y - 4 - 1 - - - BR5 - Port x Reset bit y - 5 - 1 - - - BR6 - Port x Reset bit y - 6 - 1 - - - BR7 - Port x Reset bit y - 7 - 1 - - - BR8 - Port x Reset bit y - 8 - 1 - - - BR9 - Port x Reset bit y - 9 - 1 - - - BR10 - Port x Reset bit y - 10 - 1 - - - BR11 - Port x Reset bit y - 11 - 1 - - - BR12 - Port x Reset bit y - 12 - 1 - - - BR13 - Port x Reset bit y - 13 - 1 - - - BR14 - Port x Reset bit y - 14 - 1 - - - BR15 - Port x Reset bit y - 15 - 1 - - - - - - - GPIOD - 0x48000C00 - - - GPIOC - 0x48000800 - - - GPIOB - 0x48000400 - - - GPIOE - 0x48001000 - - - GPIOA - General-purpose I/Os - GPIO - 0x48000000 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x28000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x24000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - BRR - BRR - Port bit reset register - 0x28 - 0x20 - write-only - 0x00000000 - - - BR0 - Port x Reset bit y - 0 - 1 - - - BR1 - Port x Reset bit y - 1 - 1 - - - BR2 - Port x Reset bit y - 2 - 1 - - - BR3 - Port x Reset bit y - 3 - 1 - - - BR4 - Port x Reset bit y - 4 - 1 - - - BR5 - Port x Reset bit y - 5 - 1 - - - BR6 - Port x Reset bit y - 6 - 1 - - - BR7 - Port x Reset bit y - 7 - 1 - - - BR8 - Port x Reset bit y - 8 - 1 - - - BR9 - Port x Reset bit y - 9 - 1 - - - BR10 - Port x Reset bit y - 10 - 1 - - - BR11 - Port x Reset bit y - 11 - 1 - - - BR12 - Port x Reset bit y - 12 - 1 - - - BR13 - Port x Reset bit y - 13 - 1 - - - BR14 - Port x Reset bit y - 14 - 1 - - - BR15 - Port x Reset bit y - 15 - 1 - - - - - - - SPI1 - Serial peripheral interface - SPI - 0x40013000 - - 0x0 - 0x400 - registers - - - SPI1 - SPI1_global_interrupt - 25 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - BIDIMODE - Bidirectional data mode - enable - 15 - 1 - - - BIDIOE - Output enable in bidirectional - mode - 14 - 1 - - - CRCEN - Hardware CRC calculation - enable - 13 - 1 - - - CRCNEXT - CRC transfer next - 12 - 1 - - - DFF - Data frame format - 11 - 1 - - - RXONLY - Receive only - 10 - 1 - - - SSM - Software slave management - 9 - 1 - - - SSI - Internal slave select - 8 - 1 - - - LSBFIRST - Frame format - 7 - 1 - - - SPE - SPI enable - 6 - 1 - - - BR - Baud rate control - 3 - 3 - - - MSTR - Master selection - 2 - 1 - - - CPOL - Clock polarity - 1 - 1 - - - CPHA - Clock phase - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - RXDMAEN - Rx buffer DMA enable - 0 - 1 - - - TXDMAEN - Tx buffer DMA enable - 1 - 1 - - - SSOE - SS output enable - 2 - 1 - - - NSSP - NSS pulse management - 3 - 1 - - - FRF - Frame format - 4 - 1 - - - ERRIE - Error interrupt enable - 5 - 1 - - - RXNEIE - RX buffer not empty interrupt - enable - 6 - 1 - - - TXEIE - Tx buffer empty interrupt - enable - 7 - 1 - - - DS - Data size - 8 - 4 - - - FRXTH - FIFO reception threshold - 12 - 1 - - - LDMA_RX - Last DMA transfer for - reception - 13 - 1 - - - LDMA_TX - Last DMA transfer for - transmission - 14 - 1 - - - - - SR - SR - status register - 0x8 - 0x20 - 0x0002 - - - RXNE - Receive buffer not empty - 0 - 1 - read-only - - - TXE - Transmit buffer empty - 1 - 1 - read-only - - - CHSIDE - Channel side - 2 - 1 - read-only - - - UDR - Underrun flag - 3 - 1 - read-only - - - CRCERR - CRC error flag - 4 - 1 - read-write - - - MODF - Mode fault - 5 - 1 - read-only - - - OVR - Overrun flag - 6 - 1 - read-only - - - BSY - Busy flag - 7 - 1 - read-only - - - TIFRFE - TI frame format error - 8 - 1 - read-only - - - FRLVL - FIFO reception level - 9 - 2 - read-only - - - FTLVL - FIFO transmission level - 11 - 2 - read-only - - - - - DR - DR - data register - 0xC - 0x20 - read-write - 0x0000 - - - DR - Data register - 0 - 16 - - - - - CRCPR - CRCPR - CRC polynomial register - 0x10 - 0x20 - read-write - 0x0007 - - - CRCPOLY - CRC polynomial register - 0 - 16 - - - - - RXCRCR - RXCRCR - RX CRC register - 0x14 - 0x20 - read-only - 0x0000 - - - RxCRC - Rx CRC register - 0 - 16 - - - - - TXCRCR - TXCRCR - TX CRC register - 0x18 - 0x20 - read-only - 0x0000 - - - TxCRC - Tx CRC register - 0 - 16 - - - - - I2SCFGR - I2SCFGR - I2S configuration register - 0x1C - 0x20 - read-write - 0x0000 - - - I2SMOD - I2S mode selection - 11 - 1 - - - I2SE - I2S Enable - 10 - 1 - - - I2SCFG - I2S configuration mode - 8 - 2 - - - PCMSYNC - PCM frame synchronization - 7 - 1 - - - I2SSTD - I2S standard selection - 4 - 2 - - - CKPOL - Steady state clock - polarity - 3 - 1 - - - DATLEN - Data length to be - transferred - 1 - 2 - - - CHLEN - Channel length (number of bits per audio - channel) - 0 - 1 - - - - - I2SPR - I2SPR - I2S prescaler register - 0x20 - 0x20 - read-write - 0x00000010 - - - MCKOE - Master clock output enable - 9 - 1 - - - ODD - Odd factor for the - prescaler - 8 - 1 - - - I2SDIV - I2S Linear prescaler - 0 - 8 - - - - - - - SPI2 - 0x40003800 - - SPI2 - SPI2 global interrupt - 26 - - - - DAC - Digital-to-analog converter - DAC - 0x40007400 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt and DAC underrun - interrupt - 17 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - EN1 - DAC channel1 enable - 0 - 1 - - - BOFF1 - DAC channel1 output buffer - disable - 1 - 1 - - - TEN1 - DAC channel1 trigger - enable - 2 - 1 - - - TSEL10 - DAC channel1 trigger - selection - 3 - 1 - - - TSEL11 - DAC channel1 trigger - selection - 4 - 1 - - - TSEL12 - DAC channel1 trigger - selection - 5 - 1 - - - DMAEN1 - DAC channel1 DMA enable - 12 - 1 - - - DMAUDRIE1 - DAC channel1 DMA Underrun Interrupt - enable - 13 - 1 - - - - - SWTRIGR - SWTRIGR - software trigger register - 0x4 - 0x20 - write-only - 0x00000000 - - - SWTRIG1 - DAC channel1 software - trigger - 0 - 1 - - - - - DHR12R1 - DHR12R1 - channel1 12-bit right-aligned data holding - register - 0x8 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L1 - DHR12L1 - channel1 12-bit left aligned data holding - register - 0xC - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R1 - DHR8R1 - channel1 8-bit right aligned data holding - register - 0x10 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DOR1 - DOR1 - channel1 data output register - 0x2C - 0x20 - read-only - 0x00000000 - - - DACC1DOR - DAC channel1 data output - 0 - 12 - - - - - SR - SR - status register - 0x34 - 0x20 - read-write - 0x00000000 - - - DMAUDR2 - DAC channel2 DMA underrun - flag - 29 - 1 - - - DMAUDR1 - DAC channel1 DMA underrun - flag - 13 - 1 - - - - - - - PWR - Power control - PWR - 0x40007000 - - 0x0 - 0x400 - registers - - - - CR - CR - power control register - 0x0 - 0x20 - read-write - 0x00000000 - - - FPDS - Flash power down in Stop - mode - 9 - 1 - - - DBP - Disable backup domain write - protection - 8 - 1 - - - PLS - PVD level selection - 5 - 3 - - - PVDE - Power voltage detector - enable - 4 - 1 - - - CSBF - Clear standby flag - 3 - 1 - - - CWUF - Clear wakeup flag - 2 - 1 - - - PDDS - Power down deepsleep - 1 - 1 - - - LPDS - Low-power deep sleep - 0 - 1 - - - - - CSR - CSR - power control/status register - 0x4 - 0x20 - 0x00000000 - - - BRE - Backup regulator enable - 9 - 1 - read-write - - - EWUP - Enable WKUP pin - 8 - 1 - read-write - - - BRR - Backup regulator ready - 3 - 1 - read-only - - - PVDO - PVD output - 2 - 1 - read-only - - - SBF - Standby flag - 1 - 1 - read-only - - - WUF - Wakeup flag - 0 - 1 - read-only - - - - - - - I2C1 - Inter-integrated circuit - I2C - 0x40005400 - - 0x0 - 0x400 - registers - - - I2C1 - I2C1 global interrupt - 23 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - 0x00000000 - - - PE - Peripheral enable - 0 - 1 - read-write - - - TXIE - TX Interrupt enable - 1 - 1 - read-write - - - RXIE - RX Interrupt enable - 2 - 1 - read-write - - - ADDRIE - Address match interrupt enable (slave - only) - 3 - 1 - read-write - - - NACKIE - Not acknowledge received interrupt - enable - 4 - 1 - read-write - - - STOPIE - STOP detection Interrupt - enable - 5 - 1 - read-write - - - TCIE - Transfer Complete interrupt - enable - 6 - 1 - read-write - - - ERRIE - Error interrupts enable - 7 - 1 - read-write - - - DNF - Digital noise filter - 8 - 4 - read-write - - - ANFOFF - Analog noise filter OFF - 12 - 1 - read-write - - - SWRST - Software reset - 13 - 1 - write-only - - - TXDMAEN - DMA transmission requests - enable - 14 - 1 - read-write - - - RXDMAEN - DMA reception requests - enable - 15 - 1 - read-write - - - SBC - Slave byte control - 16 - 1 - read-write - - - NOSTRETCH - Clock stretching disable - 17 - 1 - read-write - - - WUPEN - Wakeup from STOP enable - 18 - 1 - read-write - - - GCEN - General call enable - 19 - 1 - read-write - - - SMBHEN - SMBus Host address enable - 20 - 1 - read-write - - - SMBDEN - SMBus Device Default address - enable - 21 - 1 - read-write - - - ALERTEN - SMBUS alert enable - 22 - 1 - read-write - - - PECEN - PEC enable - 23 - 1 - read-write - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x00000000 - - - PECBYTE - Packet error checking byte - 26 - 1 - - - AUTOEND - Automatic end mode (master - mode) - 25 - 1 - - - RELOAD - NBYTES reload mode - 24 - 1 - - - NBYTES - Number of bytes - 16 - 8 - - - NACK - NACK generation (slave - mode) - 15 - 1 - - - STOP - Stop generation (master - mode) - 14 - 1 - - - START - Start generation - 13 - 1 - - - HEAD10R - 10-bit address header only read - direction (master receiver mode) - 12 - 1 - - - ADD10 - 10-bit addressing mode (master - mode) - 11 - 1 - - - RD_WRN - Transfer direction (master - mode) - 10 - 1 - - - SADD8 - Slave address bit 9:8 (master - mode) - 8 - 2 - - - SADD1 - Slave address bit 7:1 (master - mode) - 1 - 7 - - - SADD0 - Slave address bit 0 (master - mode) - 0 - 1 - - - - - OAR1 - OAR1 - Own address register 1 - 0x8 - 0x20 - read-write - 0x00000000 - - - OA1_0 - Interface address - 0 - 1 - - - OA1_1 - Interface address - 1 - 7 - - - OA1_8 - Interface address - 8 - 2 - - - OA1MODE - Own Address 1 10-bit mode - 10 - 1 - - - OA1EN - Own Address 1 enable - 15 - 1 - - - - - OAR2 - OAR2 - Own address register 2 - 0xC - 0x20 - read-write - 0x00000000 - - - OA2 - Interface address - 1 - 7 - - - OA2MSK - Own Address 2 masks - 8 - 3 - - - OA2EN - Own Address 2 enable - 15 - 1 - - - - - TIMINGR - TIMINGR - Timing register - 0x10 - 0x20 - read-write - 0x00000000 - - - SCLL - SCL low period (master - mode) - 0 - 8 - - - SCLH - SCL high period (master - mode) - 8 - 8 - - - SDADEL - Data hold time - 16 - 4 - - - SCLDEL - Data setup time - 20 - 4 - - - PRESC - Timing prescaler - 28 - 4 - - - - - TIMEOUTR - TIMEOUTR - Status register 1 - 0x14 - 0x20 - read-write - 0x00000000 - - - TIMEOUTA - Bus timeout A - 0 - 12 - - - TIDLE - Idle clock timeout - detection - 12 - 1 - - - TIMOUTEN - Clock timeout enable - 15 - 1 - - - TIMEOUTB - Bus timeout B - 16 - 12 - - - TEXTEN - Extended clock timeout - enable - 31 - 1 - - - - - ISR - ISR - Interrupt and Status register - 0x18 - 0x20 - 0x00000001 - - - ADDCODE - Address match code (Slave - mode) - 17 - 7 - read-only - - - DIR - Transfer direction (Slave - mode) - 16 - 1 - read-only - - - BUSY - Bus busy - 15 - 1 - read-only - - - ALERT - SMBus alert - 13 - 1 - read-only - - - TIMEOUT - Timeout or t_low detection - flag - 12 - 1 - read-only - - - PECERR - PEC Error in reception - 11 - 1 - read-only - - - OVR - Overrun/Underrun (slave - mode) - 10 - 1 - read-only - - - ARLO - Arbitration lost - 9 - 1 - read-only - - - BERR - Bus error - 8 - 1 - read-only - - - TCR - Transfer Complete Reload - 7 - 1 - read-only - - - TC - Transfer Complete (master - mode) - 6 - 1 - read-only - - - STOPF - Stop detection flag - 5 - 1 - read-only - - - NACKF - Not acknowledge received - flag - 4 - 1 - read-only - - - ADDR - Address matched (slave - mode) - 3 - 1 - read-only - - - RXNE - Receive data register not empty - (receivers) - 2 - 1 - read-only - - - TXIS - Transmit interrupt status - (transmitters) - 1 - 1 - read-write - - - TXE - Transmit data register empty - (transmitters) - 0 - 1 - read-write - - - - - ICR - ICR - Interrupt clear register - 0x1C - 0x20 - write-only - 0x00000000 - - - ALERTCF - Alert flag clear - 13 - 1 - - - TIMOUTCF - Timeout detection flag - clear - 12 - 1 - - - PECCF - PEC Error flag clear - 11 - 1 - - - OVRCF - Overrun/Underrun flag - clear - 10 - 1 - - - ARLOCF - Arbitration lost flag - clear - 9 - 1 - - - BERRCF - Bus error flag clear - 8 - 1 - - - STOPCF - Stop detection flag clear - 5 - 1 - - - NACKCF - Not Acknowledge flag clear - 4 - 1 - - - ADDRCF - Address Matched flag clear - 3 - 1 - - - - - PECR - PECR - PEC register - 0x20 - 0x20 - read-only - 0x00000000 - - - PEC - Packet error checking - register - 0 - 8 - - - - - RXDR - RXDR - Receive data register - 0x24 - 0x20 - read-only - 0x00000000 - - - RXDATA - 8-bit receive data - 0 - 8 - - - - - TXDR - TXDR - Transmit data register - 0x28 - 0x20 - read-write - 0x00000000 - - - TXDATA - 8-bit transmit data - 0 - 8 - - - - - - - I2C2 - 0x40005800 - - I2C2 - I2C2 global interrupt - 24 - - - - IWDG - Independent watchdog - IWDG - 0x40003000 - - 0x0 - 0x400 - registers - - - - KR - KR - Key register - 0x0 - 0x20 - write-only - 0x00000000 - - - KEY - Key value - 0 - 16 - - - - - PR - PR - Prescaler register - 0x4 - 0x20 - read-write - 0x00000000 - - - PR - Prescaler divider - 0 - 3 - - - - - RLR - RLR - Reload register - 0x8 - 0x20 - read-write - 0x00000FFF - - - RL - Watchdog counter reload - value - 0 - 12 - - - - - SR - SR - Status register - 0xC - 0x20 - read-only - 0x00000000 - - - PVU - Watchdog prescaler value - update - 0 - 1 - - - RVU - Watchdog counter reload value - update - 1 - 1 - - - WVU - Watchdog counter window value - update - 2 - 1 - - - - - WINR - WINR - Window register - 0x10 - 0x20 - read-write - 0x00000FFF - - - WIN - Watchdog counter window - value - 0 - 12 - - - - - - - WWDG - Window watchdog - WWDG - 0x40002C00 - - 0x0 - 0x400 - registers - - - WWDG - Window Watchdog interrupt - 0 - - - - CR - CR - Control register - 0x0 - 0x20 - read-write - 0x0000007F - - - WDGA - Activation bit - 7 - 1 - - - T - 7-bit counter - 0 - 7 - - - - - CFR - CFR - Configuration register - 0x4 - 0x20 - read-write - 0x0000007F - - - EWI - Early wakeup interrupt - 9 - 1 - - - WDGTB - Timer base - 7 - 2 - - - W - 7-bit window value - 0 - 7 - - - - - SR - SR - Status register - 0x8 - 0x20 - read-write - 0x00000000 - - - EWIF - Early wakeup interrupt - flag - 0 - 1 - - - - - - - TIM1 - Advanced-timers - TIM - 0x40012C00 - - 0x0 - 0x400 - registers - - - TIM1_BRK_UP_TRG_COM - TIM1 break, update, trigger and commutation - interrupt - 13 - - - TIM1_CC - TIM1 Capture Compare interrupt - 14 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS4 - Output Idle state 4 - 14 - 1 - - - OIS3N - Output Idle state 3 - 13 - 1 - - - OIS3 - Output Idle state 3 - 12 - 1 - - - OIS2N - Output Idle state 2 - 11 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - Reserved - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output Compare 2 clear - enable - 15 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output Compare 1 clear - enable - 7 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3NE - Capture/Compare 3 complementary output - enable - 10 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2NE - Capture/Compare 2 complementary output - enable - 6 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3 - Capture/Compare 3 value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4 - Capture/Compare 3 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM2 - General-purpose-timers - TIM - 0x40000000 - - 0x0 - 0x400 - registers - - - TIM2 - TIM2 global interrupt - 15 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - Reserved - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output compare 2 clear - enable - 15 - 1 - - - OC2M - Output compare 2 mode - 12 - 3 - - - OC2PE - Output compare 2 preload - enable - 11 - 1 - - - OC2FE - Output compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output compare 1 clear - enable - 7 - 1 - - - OC1M - Output compare 1 mode - 4 - 3 - - - OC1PE - Output compare 1 preload - enable - 3 - 1 - - - OC1FE - Output compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT_H - High counter value (TIM2 - only) - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value (TIM2 - only) - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 value (TIM2 - only) - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 value (TIM2 - only) - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value (TIM2 - only) - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value (TIM2 - only) - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAR - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM3 - 0x40000400 - - TIM3 - TIM3 global interrupt - 16 - - - - TIM14 - General-purpose-timers - TIM - 0x40002000 - - 0x0 - 0x400 - registers - - - TIM14 - TIM14 global interrupt - 19 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1FE - Output compare 1 fast - enable - 2 - 1 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - OR - OR - option register - 0x50 - 0x20 - read-write - 0x00000000 - - - RMP - Timer input 1 remap - 0 - 2 - - - - - - - TIM6 - Basic-timers - TIM - 0x40001000 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt and DAC underrun - interrupt - 17 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UDE - Update DMA request enable - 8 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - UG - Update generation - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Low Auto-reload value - 0 - 16 - - - - - - - TIM7 - 0x40001400 - - TIM7 - TIM7 global interrupt - 18 - - - - EXTI - External interrupt/event - controller - EXTI - 0x40010400 - - 0x0 - 0x400 - registers - - - PVD - PVD and VDDIO2 supply comparator - interrupt - 1 - - - EXTI0_1 - EXTI Line[1:0] interrupts - 5 - - - EXTI2_3 - EXTI Line[3:2] interrupts - 6 - - - EXTI4_15 - EXTI Line15 and EXTI4 interrupts - 7 - - - - IMR - IMR - Interrupt mask register - (EXTI_IMR) - 0x0 - 0x20 - read-write - 0x0F940000 - - - MR0 - Interrupt Mask on line 0 - 0 - 1 - - - MR1 - Interrupt Mask on line 1 - 1 - 1 - - - MR2 - Interrupt Mask on line 2 - 2 - 1 - - - MR3 - Interrupt Mask on line 3 - 3 - 1 - - - MR4 - Interrupt Mask on line 4 - 4 - 1 - - - MR5 - Interrupt Mask on line 5 - 5 - 1 - - - MR6 - Interrupt Mask on line 6 - 6 - 1 - - - MR7 - Interrupt Mask on line 7 - 7 - 1 - - - MR8 - Interrupt Mask on line 8 - 8 - 1 - - - MR9 - Interrupt Mask on line 9 - 9 - 1 - - - MR10 - Interrupt Mask on line 10 - 10 - 1 - - - MR11 - Interrupt Mask on line 11 - 11 - 1 - - - MR12 - Interrupt Mask on line 12 - 12 - 1 - - - MR13 - Interrupt Mask on line 13 - 13 - 1 - - - MR14 - Interrupt Mask on line 14 - 14 - 1 - - - MR15 - Interrupt Mask on line 15 - 15 - 1 - - - MR16 - Interrupt Mask on line 16 - 16 - 1 - - - MR17 - Interrupt Mask on line 17 - 17 - 1 - - - MR18 - Interrupt Mask on line 18 - 18 - 1 - - - MR19 - Interrupt Mask on line 19 - 19 - 1 - - - MR20 - Interrupt Mask on line 20 - 20 - 1 - - - MR21 - Interrupt Mask on line 21 - 21 - 1 - - - MR22 - Interrupt Mask on line 22 - 22 - 1 - - - MR23 - Interrupt Mask on line 23 - 23 - 1 - - - MR24 - Interrupt Mask on line 24 - 24 - 1 - - - MR25 - Interrupt Mask on line 25 - 25 - 1 - - - MR26 - Interrupt Mask on line 26 - 26 - 1 - - - MR27 - Interrupt Mask on line 27 - 27 - 1 - - - - - EMR - EMR - Event mask register (EXTI_EMR) - 0x4 - 0x20 - read-write - 0x00000000 - - - MR0 - Event Mask on line 0 - 0 - 1 - - - MR1 - Event Mask on line 1 - 1 - 1 - - - MR2 - Event Mask on line 2 - 2 - 1 - - - MR3 - Event Mask on line 3 - 3 - 1 - - - MR4 - Event Mask on line 4 - 4 - 1 - - - MR5 - Event Mask on line 5 - 5 - 1 - - - MR6 - Event Mask on line 6 - 6 - 1 - - - MR7 - Event Mask on line 7 - 7 - 1 - - - MR8 - Event Mask on line 8 - 8 - 1 - - - MR9 - Event Mask on line 9 - 9 - 1 - - - MR10 - Event Mask on line 10 - 10 - 1 - - - MR11 - Event Mask on line 11 - 11 - 1 - - - MR12 - Event Mask on line 12 - 12 - 1 - - - MR13 - Event Mask on line 13 - 13 - 1 - - - MR14 - Event Mask on line 14 - 14 - 1 - - - MR15 - Event Mask on line 15 - 15 - 1 - - - MR16 - Event Mask on line 16 - 16 - 1 - - - MR17 - Event Mask on line 17 - 17 - 1 - - - MR18 - Event Mask on line 18 - 18 - 1 - - - MR19 - Event Mask on line 19 - 19 - 1 - - - MR20 - Event Mask on line 20 - 20 - 1 - - - MR21 - Event Mask on line 21 - 21 - 1 - - - MR22 - Event Mask on line 22 - 22 - 1 - - - MR23 - Event Mask on line 23 - 23 - 1 - - - MR24 - Event Mask on line 24 - 24 - 1 - - - MR25 - Event Mask on line 25 - 25 - 1 - - - MR26 - Event Mask on line 26 - 26 - 1 - - - MR27 - Event Mask on line 27 - 27 - 1 - - - - - RTSR - RTSR - Rising Trigger selection register - (EXTI_RTSR) - 0x8 - 0x20 - read-write - 0x00000000 - - - TR0 - Rising trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Rising trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Rising trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Rising trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Rising trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Rising trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Rising trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Rising trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Rising trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Rising trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Rising trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Rising trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Rising trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Rising trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Rising trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Rising trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Rising trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Rising trigger event configuration of - line 17 - 17 - 1 - - - TR19 - Rising trigger event configuration of - line 19 - 19 - 1 - - - - - FTSR - FTSR - Falling Trigger selection register - (EXTI_FTSR) - 0xC - 0x20 - read-write - 0x00000000 - - - TR0 - Falling trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Falling trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Falling trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Falling trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Falling trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Falling trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Falling trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Falling trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Falling trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Falling trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Falling trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Falling trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Falling trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Falling trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Falling trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Falling trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Falling trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Falling trigger event configuration of - line 17 - 17 - 1 - - - TR19 - Falling trigger event configuration of - line 19 - 19 - 1 - - - - - SWIER - SWIER - Software interrupt event register - (EXTI_SWIER) - 0x10 - 0x20 - read-write - 0x00000000 - - - SWIER0 - Software Interrupt on line - 0 - 0 - 1 - - - SWIER1 - Software Interrupt on line - 1 - 1 - 1 - - - SWIER2 - Software Interrupt on line - 2 - 2 - 1 - - - SWIER3 - Software Interrupt on line - 3 - 3 - 1 - - - SWIER4 - Software Interrupt on line - 4 - 4 - 1 - - - SWIER5 - Software Interrupt on line - 5 - 5 - 1 - - - SWIER6 - Software Interrupt on line - 6 - 6 - 1 - - - SWIER7 - Software Interrupt on line - 7 - 7 - 1 - - - SWIER8 - Software Interrupt on line - 8 - 8 - 1 - - - SWIER9 - Software Interrupt on line - 9 - 9 - 1 - - - SWIER10 - Software Interrupt on line - 10 - 10 - 1 - - - SWIER11 - Software Interrupt on line - 11 - 11 - 1 - - - SWIER12 - Software Interrupt on line - 12 - 12 - 1 - - - SWIER13 - Software Interrupt on line - 13 - 13 - 1 - - - SWIER14 - Software Interrupt on line - 14 - 14 - 1 - - - SWIER15 - Software Interrupt on line - 15 - 15 - 1 - - - SWIER16 - Software Interrupt on line - 16 - 16 - 1 - - - SWIER17 - Software Interrupt on line - 17 - 17 - 1 - - - SWIER19 - Software Interrupt on line - 19 - 19 - 1 - - - - - PR - PR - Pending register (EXTI_PR) - 0x14 - 0x20 - read-write - 0x00000000 - - - PR0 - Pending bit 0 - 0 - 1 - - - PR1 - Pending bit 1 - 1 - 1 - - - PR2 - Pending bit 2 - 2 - 1 - - - PR3 - Pending bit 3 - 3 - 1 - - - PR4 - Pending bit 4 - 4 - 1 - - - PR5 - Pending bit 5 - 5 - 1 - - - PR6 - Pending bit 6 - 6 - 1 - - - PR7 - Pending bit 7 - 7 - 1 - - - PR8 - Pending bit 8 - 8 - 1 - - - PR9 - Pending bit 9 - 9 - 1 - - - PR10 - Pending bit 10 - 10 - 1 - - - PR11 - Pending bit 11 - 11 - 1 - - - PR12 - Pending bit 12 - 12 - 1 - - - PR13 - Pending bit 13 - 13 - 1 - - - PR14 - Pending bit 14 - 14 - 1 - - - PR15 - Pending bit 15 - 15 - 1 - - - PR16 - Pending bit 16 - 16 - 1 - - - PR17 - Pending bit 17 - 17 - 1 - - - PR19 - Pending bit 19 - 19 - 1 - - - - - - - NVIC - Nested Vectored Interrupt - Controller - NVIC - 0xE000E100 - - 0x0 - 0x33D - registers - - - - ISER - ISER - Interrupt Set Enable Register - 0x0 - 0x20 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ICER - ICER - Interrupt Clear Enable - Register - 0x80 - 0x20 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ISPR - ISPR - Interrupt Set-Pending Register - 0x100 - 0x20 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ICPR - ICPR - Interrupt Clear-Pending - Register - 0x180 - 0x20 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - IPR0 - IPR0 - Interrupt Priority Register 0 - 0x300 - 0x20 - read-write - 0x00000000 - - - PRI_00 - PRI_00 - 6 - 2 - - - PRI_01 - PRI_01 - 14 - 2 - - - PRI_02 - PRI_02 - 22 - 2 - - - PRI_03 - PRI_03 - 30 - 2 - - - - - IPR1 - IPR1 - Interrupt Priority Register 1 - 0x304 - 0x20 - read-write - 0x00000000 - - - PRI_40 - PRI_40 - 6 - 2 - - - PRI_41 - PRI_41 - 14 - 2 - - - PRI_42 - PRI_42 - 22 - 2 - - - PRI_43 - PRI_43 - 30 - 2 - - - - - IPR2 - IPR2 - Interrupt Priority Register 2 - 0x308 - 0x20 - read-write - 0x00000000 - - - PRI_80 - PRI_80 - 6 - 2 - - - PRI_81 - PRI_81 - 14 - 2 - - - PRI_82 - PRI_82 - 22 - 2 - - - PRI_83 - PRI_83 - 30 - 2 - - - - - IPR3 - IPR3 - Interrupt Priority Register 3 - 0x30C - 0x20 - read-write - 0x00000000 - - - PRI_120 - PRI_120 - 6 - 2 - - - PRI_121 - PRI_121 - 14 - 2 - - - PRI_122 - PRI_122 - 22 - 2 - - - PRI_123 - PRI_123 - 30 - 2 - - - - - IPR4 - IPR4 - Interrupt Priority Register 4 - 0x310 - 0x20 - read-write - 0x00000000 - - - PRI_160 - PRI_160 - 6 - 2 - - - PRI_161 - PRI_161 - 14 - 2 - - - PRI_162 - PRI_162 - 22 - 2 - - - PRI_163 - PRI_163 - 30 - 2 - - - - - IPR5 - IPR5 - Interrupt Priority Register 5 - 0x314 - 0x20 - read-write - 0x00000000 - - - PRI_200 - PRI_200 - 6 - 2 - - - PRI_201 - PRI_201 - 14 - 2 - - - PRI_202 - PRI_202 - 22 - 2 - - - PRI_203 - PRI_203 - 30 - 2 - - - - - IPR6 - IPR6 - Interrupt Priority Register 6 - 0x318 - 0x20 - read-write - 0x00000000 - - - PRI_240 - PRI_240 - 6 - 2 - - - PRI_241 - PRI_241 - 14 - 2 - - - PRI_242 - PRI_242 - 22 - 2 - - - PRI_243 - PRI_243 - 30 - 2 - - - - - IPR7 - IPR7 - Interrupt Priority Register 7 - 0x31C - 0x20 - read-write - 0x00000000 - - - PRI_280 - PRI_280 - 6 - 2 - - - PRI_281 - PRI_281 - 14 - 2 - - - PRI_282 - PRI_282 - 22 - 2 - - - PRI_283 - PRI_283 - 30 - 2 - - - - - - - DMA - DMA controller - DMA - 0x40020000 - - 0x0 - 0x400 - registers - - - DMA_CH1 - DMA channel 1 interrupt - 9 - - - DMA_CH2_3 - DMA channel 2 and 3 interrupts - 10 - - - DMA_CH4_5_6_7 - DMA channel 4, 5, 6 and 7 - interrupts - 11 - - - - ISR - ISR - DMA interrupt status register - (DMA_ISR) - 0x0 - 0x20 - read-only - 0x00000000 - - - GIF1 - Channel 1 Global interrupt - flag - 0 - 1 - - - TCIF1 - Channel 1 Transfer Complete - flag - 1 - 1 - - - HTIF1 - Channel 1 Half Transfer Complete - flag - 2 - 1 - - - TEIF1 - Channel 1 Transfer Error - flag - 3 - 1 - - - GIF2 - Channel 2 Global interrupt - flag - 4 - 1 - - - TCIF2 - Channel 2 Transfer Complete - flag - 5 - 1 - - - HTIF2 - Channel 2 Half Transfer Complete - flag - 6 - 1 - - - TEIF2 - Channel 2 Transfer Error - flag - 7 - 1 - - - GIF3 - Channel 3 Global interrupt - flag - 8 - 1 - - - TCIF3 - Channel 3 Transfer Complete - flag - 9 - 1 - - - HTIF3 - Channel 3 Half Transfer Complete - flag - 10 - 1 - - - TEIF3 - Channel 3 Transfer Error - flag - 11 - 1 - - - GIF4 - Channel 4 Global interrupt - flag - 12 - 1 - - - TCIF4 - Channel 4 Transfer Complete - flag - 13 - 1 - - - HTIF4 - Channel 4 Half Transfer Complete - flag - 14 - 1 - - - TEIF4 - Channel 4 Transfer Error - flag - 15 - 1 - - - GIF5 - Channel 5 Global interrupt - flag - 16 - 1 - - - TCIF5 - Channel 5 Transfer Complete - flag - 17 - 1 - - - HTIF5 - Channel 5 Half Transfer Complete - flag - 18 - 1 - - - TEIF5 - Channel 5 Transfer Error - flag - 19 - 1 - - - GIF6 - Channel 6 Global interrupt - flag - 20 - 1 - - - TCIF6 - Channel 6 Transfer Complete - flag - 21 - 1 - - - HTIF6 - Channel 6 Half Transfer Complete - flag - 22 - 1 - - - TEIF6 - Channel 6 Transfer Error - flag - 23 - 1 - - - GIF7 - Channel 7 Global interrupt - flag - 24 - 1 - - - TCIF7 - Channel 7 Transfer Complete - flag - 25 - 1 - - - HTIF7 - Channel 7 Half Transfer Complete - flag - 26 - 1 - - - TEIF7 - Channel 7 Transfer Error - flag - 27 - 1 - - - - - IFCR - IFCR - DMA interrupt flag clear register - (DMA_IFCR) - 0x4 - 0x20 - write-only - 0x00000000 - - - CGIF1 - Channel 1 Global interrupt - clear - 0 - 1 - - - CTCIF1 - Channel 1 Transfer Complete - clear - 1 - 1 - - - CHTIF1 - Channel 1 Half Transfer - clear - 2 - 1 - - - CTEIF1 - Channel 1 Transfer Error - clear - 3 - 1 - - - CGIF2 - Channel 2 Global interrupt - clear - 4 - 1 - - - CTCIF2 - Channel 2 Transfer Complete - clear - 5 - 1 - - - CHTIF2 - Channel 2 Half Transfer - clear - 6 - 1 - - - CTEIF2 - Channel 2 Transfer Error - clear - 7 - 1 - - - CGIF3 - Channel 3 Global interrupt - clear - 8 - 1 - - - CTCIF3 - Channel 3 Transfer Complete - clear - 9 - 1 - - - CHTIF3 - Channel 3 Half Transfer - clear - 10 - 1 - - - CTEIF3 - Channel 3 Transfer Error - clear - 11 - 1 - - - CGIF4 - Channel 4 Global interrupt - clear - 12 - 1 - - - CTCIF4 - Channel 4 Transfer Complete - clear - 13 - 1 - - - CHTIF4 - Channel 4 Half Transfer - clear - 14 - 1 - - - CTEIF4 - Channel 4 Transfer Error - clear - 15 - 1 - - - CGIF5 - Channel 5 Global interrupt - clear - 16 - 1 - - - CTCIF5 - Channel 5 Transfer Complete - clear - 17 - 1 - - - CHTIF5 - Channel 5 Half Transfer - clear - 18 - 1 - - - CTEIF5 - Channel 5 Transfer Error - clear - 19 - 1 - - - CGIF6 - Channel 6 Global interrupt - clear - 20 - 1 - - - CTCIF6 - Channel 6 Transfer Complete - clear - 21 - 1 - - - CHTIF6 - Channel 6 Half Transfer - clear - 22 - 1 - - - CTEIF6 - Channel 6 Transfer Error - clear - 23 - 1 - - - CGIF7 - Channel 7 Global interrupt - clear - 24 - 1 - - - CTCIF7 - Channel 7 Transfer Complete - clear - 25 - 1 - - - CHTIF7 - Channel 7 Half Transfer - clear - 26 - 1 - - - CTEIF7 - Channel 7 Transfer Error - clear - 27 - 1 - - - - - CCR1 - CCR1 - DMA channel configuration register - (DMA_CCR) - 0x8 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR1 - CNDTR1 - DMA channel 1 number of data - register - 0xC - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR1 - CPAR1 - DMA channel 1 peripheral address - register - 0x10 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR1 - CMAR1 - DMA channel 1 memory address - register - 0x14 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR2 - CCR2 - DMA channel configuration register - (DMA_CCR) - 0x1C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR2 - CNDTR2 - DMA channel 2 number of data - register - 0x20 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR2 - CPAR2 - DMA channel 2 peripheral address - register - 0x24 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR2 - CMAR2 - DMA channel 2 memory address - register - 0x28 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR3 - CCR3 - DMA channel configuration register - (DMA_CCR) - 0x30 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR3 - CNDTR3 - DMA channel 3 number of data - register - 0x34 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR3 - CPAR3 - DMA channel 3 peripheral address - register - 0x38 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR3 - CMAR3 - DMA channel 3 memory address - register - 0x3C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR4 - CCR4 - DMA channel configuration register - (DMA_CCR) - 0x44 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR4 - CNDTR4 - DMA channel 4 number of data - register - 0x48 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR4 - CPAR4 - DMA channel 4 peripheral address - register - 0x4C - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR4 - CMAR4 - DMA channel 4 memory address - register - 0x50 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR5 - CCR5 - DMA channel configuration register - (DMA_CCR) - 0x58 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR5 - CNDTR5 - DMA channel 5 number of data - register - 0x5C - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR5 - CPAR5 - DMA channel 5 peripheral address - register - 0x60 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR5 - CMAR5 - DMA channel 5 memory address - register - 0x64 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR6 - CCR6 - DMA channel configuration register - (DMA_CCR) - 0x6C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR6 - CNDTR6 - DMA channel 6 number of data - register - 0x70 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR6 - CPAR6 - DMA channel 6 peripheral address - register - 0x74 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR6 - CMAR6 - DMA channel 6 memory address - register - 0x78 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR7 - CCR7 - DMA channel configuration register - (DMA_CCR) - 0x80 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR7 - CNDTR7 - DMA channel 7 number of data - register - 0x84 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR7 - CPAR7 - DMA channel 7 peripheral address - register - 0x88 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR7 - CMAR7 - DMA channel 7 memory address - register - 0x8C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - - - RCC - Reset and clock control - RCC - 0x40021000 - - 0x0 - 0x400 - registers - - - RCC_CRS - RCC and CRS global interrupts - 4 - - - - CR - CR - Clock control register - 0x0 - 0x20 - 0x00000083 - - - HSION - Internal High Speed clock - enable - 0 - 1 - read-write - - - HSIRDY - Internal High Speed clock ready - flag - 1 - 1 - read-only - - - HSITRIM - Internal High Speed clock - trimming - 3 - 5 - read-write - - - HSICAL - Internal High Speed clock - Calibration - 8 - 8 - read-only - - - HSEON - External High Speed clock - enable - 16 - 1 - read-write - - - HSERDY - External High Speed clock ready - flag - 17 - 1 - read-only - - - HSEBYP - External High Speed clock - Bypass - 18 - 1 - read-write - - - CSSON - Clock Security System - enable - 19 - 1 - read-write - - - PLLON - PLL enable - 24 - 1 - read-write - - - PLLRDY - PLL clock ready flag - 25 - 1 - read-only - - - - - CFGR - CFGR - Clock configuration register - (RCC_CFGR) - 0x4 - 0x20 - 0x00000000 - - - SW - System clock Switch - 0 - 2 - read-write - - - SWS - System Clock Switch Status - 2 - 2 - read-only - - - HPRE - AHB prescaler - 4 - 4 - read-write - - - PPRE - APB Low speed prescaler - (APB1) - 8 - 3 - read-write - - - ADCPRE - ADC prescaler - 14 - 1 - read-write - - - PLLSRC - PLL input clock source - 15 - 2 - read-write - - - PLLXTPRE - HSE divider for PLL entry - 17 - 1 - read-write - - - PLLMUL - PLL Multiplication Factor - 18 - 4 - read-write - - - MCO - Microcontroller clock - output - 24 - 3 - read-write - - - MCOPRE - Microcontroller Clock Output - Prescaler - 28 - 3 - read-write - - - PLLNODIV - PLL clock not divided for - MCO - 31 - 1 - read-write - - - - - CIR - CIR - Clock interrupt register - (RCC_CIR) - 0x8 - 0x20 - 0x00000000 - - - LSIRDYF - LSI Ready Interrupt flag - 0 - 1 - read-only - - - LSERDYF - LSE Ready Interrupt flag - 1 - 1 - read-only - - - HSIRDYF - HSI Ready Interrupt flag - 2 - 1 - read-only - - - HSERDYF - HSE Ready Interrupt flag - 3 - 1 - read-only - - - PLLRDYF - PLL Ready Interrupt flag - 4 - 1 - read-only - - - HSI14RDYF - HSI14 ready interrupt flag - 5 - 1 - read-only - - - HSI48RDYF - HSI48 ready interrupt flag - 6 - 1 - read-only - - - CSSF - Clock Security System Interrupt - flag - 7 - 1 - read-only - - - LSIRDYIE - LSI Ready Interrupt Enable - 8 - 1 - read-write - - - LSERDYIE - LSE Ready Interrupt Enable - 9 - 1 - read-write - - - HSIRDYIE - HSI Ready Interrupt Enable - 10 - 1 - read-write - - - HSERDYIE - HSE Ready Interrupt Enable - 11 - 1 - read-write - - - PLLRDYIE - PLL Ready Interrupt Enable - 12 - 1 - read-write - - - HSI14RDYE - HSI14 ready interrupt - enable - 13 - 1 - read-write - - - HSI48RDYIE - HSI48 ready interrupt - enable - 14 - 1 - read-write - - - LSIRDYC - LSI Ready Interrupt Clear - 16 - 1 - write-only - - - LSERDYC - LSE Ready Interrupt Clear - 17 - 1 - write-only - - - HSIRDYC - HSI Ready Interrupt Clear - 18 - 1 - write-only - - - HSERDYC - HSE Ready Interrupt Clear - 19 - 1 - write-only - - - PLLRDYC - PLL Ready Interrupt Clear - 20 - 1 - write-only - - - HSI14RDYC - HSI 14 MHz Ready Interrupt - Clear - 21 - 1 - write-only - - - HSI48RDYC - HSI48 Ready Interrupt - Clear - 22 - 1 - write-only - - - CSSC - Clock security system interrupt - clear - 23 - 1 - write-only - - - - - APB2RSTR - APB2RSTR - APB2 peripheral reset register - (RCC_APB2RSTR) - 0xC - 0x20 - read-write - 0x00000000 - - - SYSCFGRST - SYSCFG and COMP reset - 0 - 1 - - - ADCRST - ADC interface reset - 9 - 1 - - - TIM1RST - TIM1 timer reset - 11 - 1 - - - SPI1RST - SPI 1 reset - 12 - 1 - - - USART1RST - USART1 reset - 14 - 1 - - - TIM15RST - TIM15 timer reset - 16 - 1 - - - TIM16RST - TIM16 timer reset - 17 - 1 - - - TIM17RST - TIM17 timer reset - 18 - 1 - - - DBGMCURST - Debug MCU reset - 22 - 1 - - - - - APB1RSTR - APB1RSTR - APB1 peripheral reset register - (RCC_APB1RSTR) - 0x10 - 0x20 - read-write - 0x00000000 - - - TIM2RST - Timer 2 reset - 0 - 1 - - - TIM3RST - Timer 3 reset - 1 - 1 - - - TIM6RST - Timer 6 reset - 4 - 1 - - - TIM7RST - TIM7 timer reset - 5 - 1 - - - TIM14RST - Timer 14 reset - 8 - 1 - - - WWDGRST - Window watchdog reset - 11 - 1 - - - SPI2RST - SPI2 reset - 14 - 1 - - - USART2RST - USART 2 reset - 17 - 1 - - - USART3RST - USART3 reset - 18 - 1 - - - USART4RST - USART4 reset - 19 - 1 - - - I2C1RST - I2C1 reset - 21 - 1 - - - I2C2RST - I2C2 reset - 22 - 1 - - - USBRST - USB interface reset - 23 - 1 - - - CANRST - CAN interface reset - 25 - 1 - - - CRSRST - Clock Recovery System interface - reset - 27 - 1 - - - PWRRST - Power interface reset - 28 - 1 - - - DACRST - DAC interface reset - 29 - 1 - - - CECRST - HDMI CEC reset - 30 - 1 - - - - - AHBENR - AHBENR - AHB Peripheral Clock enable register - (RCC_AHBENR) - 0x14 - 0x20 - read-write - 0x00000014 - - - DMAEN - DMA1 clock enable - 0 - 1 - - - SRAMEN - SRAM interface clock - enable - 2 - 1 - - - FLITFEN - FLITF clock enable - 4 - 1 - - - CRCEN - CRC clock enable - 6 - 1 - - - IOPAEN - I/O port A clock enable - 17 - 1 - - - IOPBEN - I/O port B clock enable - 18 - 1 - - - IOPCEN - I/O port C clock enable - 19 - 1 - - - IOPDEN - I/O port D clock enable - 20 - 1 - - - IOPFEN - I/O port F clock enable - 22 - 1 - - - TSCEN - Touch sensing controller clock - enable - 24 - 1 - - - - - APB2ENR - APB2ENR - APB2 peripheral clock enable register - (RCC_APB2ENR) - 0x18 - 0x20 - read-write - 0x00000000 - - - SYSCFGEN - SYSCFG clock enable - 0 - 1 - - - ADCEN - ADC 1 interface clock - enable - 9 - 1 - - - TIM1EN - TIM1 Timer clock enable - 11 - 1 - - - SPI1EN - SPI 1 clock enable - 12 - 1 - - - USART1EN - USART1 clock enable - 14 - 1 - - - TIM15EN - TIM15 timer clock enable - 16 - 1 - - - TIM16EN - TIM16 timer clock enable - 17 - 1 - - - TIM17EN - TIM17 timer clock enable - 18 - 1 - - - DBGMCUEN - MCU debug module clock - enable - 22 - 1 - - - - - APB1ENR - APB1ENR - APB1 peripheral clock enable register - (RCC_APB1ENR) - 0x1C - 0x20 - read-write - 0x00000000 - - - TIM2EN - Timer 2 clock enable - 0 - 1 - - - TIM3EN - Timer 3 clock enable - 1 - 1 - - - TIM6EN - Timer 6 clock enable - 4 - 1 - - - TIM7EN - TIM7 timer clock enable - 5 - 1 - - - TIM14EN - Timer 14 clock enable - 8 - 1 - - - WWDGEN - Window watchdog clock - enable - 11 - 1 - - - SPI2EN - SPI 2 clock enable - 14 - 1 - - - USART2EN - USART 2 clock enable - 17 - 1 - - - USART3EN - USART3 clock enable - 18 - 1 - - - USART4EN - USART4 clock enable - 19 - 1 - - - I2C1EN - I2C 1 clock enable - 21 - 1 - - - I2C2EN - I2C 2 clock enable - 22 - 1 - - - USBRST - USB interface clock enable - 23 - 1 - - - CANEN - CAN interface clock enable - 25 - 1 - - - CRSEN - Clock Recovery System interface clock - enable - 27 - 1 - - - PWREN - Power interface clock - enable - 28 - 1 - - - DACEN - DAC interface clock enable - 29 - 1 - - - CECEN - HDMI CEC interface clock - enable - 30 - 1 - - - - - BDCR - BDCR - Backup domain control register - (RCC_BDCR) - 0x20 - 0x20 - 0x00000000 - - - LSEON - External Low Speed oscillator - enable - 0 - 1 - read-write - - - LSERDY - External Low Speed oscillator - ready - 1 - 1 - read-only - - - LSEBYP - External Low Speed oscillator - bypass - 2 - 1 - read-write - - - LSEDRV - LSE oscillator drive - capability - 3 - 2 - read-write - - - RTCSEL - RTC clock source selection - 8 - 2 - read-write - - - RTCEN - RTC clock enable - 15 - 1 - read-write - - - BDRST - Backup domain software - reset - 16 - 1 - read-write - - - - - CSR - CSR - Control/status register - (RCC_CSR) - 0x24 - 0x20 - 0x0C000000 - - - LSION - Internal low speed oscillator - enable - 0 - 1 - read-write - - - LSIRDY - Internal low speed oscillator - ready - 1 - 1 - read-only - - - RMVF - Remove reset flag - 24 - 1 - read-write - - - OBLRSTF - Option byte loader reset - flag - 25 - 1 - read-write - - - PINRSTF - PIN reset flag - 26 - 1 - read-write - - - PORRSTF - POR/PDR reset flag - 27 - 1 - read-write - - - SFTRSTF - Software reset flag - 28 - 1 - read-write - - - IWDGRSTF - Independent watchdog reset - flag - 29 - 1 - read-write - - - WWDGRSTF - Window watchdog reset flag - 30 - 1 - read-write - - - LPWRRSTF - Low-power reset flag - 31 - 1 - read-write - - - - - AHBRSTR - AHBRSTR - AHB peripheral reset register - 0x28 - 0x20 - read-write - 0x00000000 - - - IOPARST - I/O port A reset - 17 - 1 - - - IOPBRST - I/O port B reset - 18 - 1 - - - IOPCRST - I/O port C reset - 19 - 1 - - - IOPDRST - I/O port D reset - 20 - 1 - - - IOPFRST - I/O port F reset - 22 - 1 - - - TSCRST - Touch sensing controller - reset - 24 - 1 - - - - - CFGR2 - CFGR2 - Clock configuration register 2 - 0x2C - 0x20 - read-write - 0x00000000 - - - PREDIV - PREDIV division factor - 0 - 4 - - - - - CFGR3 - CFGR3 - Clock configuration register 3 - 0x30 - 0x20 - read-write - 0x00000000 - - - USART1SW - USART1 clock source - selection - 0 - 2 - - - I2C1SW - I2C1 clock source - selection - 4 - 1 - - - CECSW - HDMI CEC clock source - selection - 6 - 1 - - - USBSW - USB clock source selection - 7 - 1 - - - ADCSW - ADC clock source selection - 8 - 1 - - - USART2SW - USART2 clock source - selection - 16 - 2 - - - - - CR2 - CR2 - Clock control register 2 - 0x34 - 0x20 - 0x00000080 - - - HSI14ON - HSI14 clock enable - 0 - 1 - read-write - - - HSI14RDY - HR14 clock ready flag - 1 - 1 - read-only - - - HSI14DIS - HSI14 clock request from ADC - disable - 2 - 1 - read-write - - - HSI14TRIM - HSI14 clock trimming - 3 - 5 - read-write - - - HSI14CAL - HSI14 clock calibration - 8 - 8 - read-only - - - HSI48ON - HSI48 clock enable - 16 - 1 - read-write - - - HSI48RDY - HSI48 clock ready flag - 17 - 1 - read-only - - - HSI48CAL - HSI48 factory clock - calibration - 24 - 1 - read-only - - - - - - - SYSCFG - System configuration controller - SYSCFG - 0x40010000 - - 0x0 - 0x400 - registers - - - - CFGR1 - CFGR1 - configuration register 1 - 0x0 - 0x20 - read-write - 0x00000000 - - - MEM_MODE - Memory mapping selection - bits - 0 - 2 - - - ADC_DMA_RMP - ADC DMA remapping bit - 8 - 1 - - - USART1_TX_DMA_RMP - USART1_TX DMA remapping - bit - 9 - 1 - - - USART1_RX_DMA_RMP - USART1_RX DMA request remapping - bit - 10 - 1 - - - TIM16_DMA_RMP - TIM16 DMA request remapping - bit - 11 - 1 - - - TIM17_DMA_RMP - TIM17 DMA request remapping - bit - 12 - 1 - - - I2C_PB6_FM - Fast Mode Plus (FM plus) driving - capability activation bits. - 16 - 1 - - - I2C_PB7_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 17 - 1 - - - I2C_PB8_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 18 - 1 - - - I2C_PB9_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 19 - 1 - - - I2C1_FM_plus - FM+ driving capability activation for - I2C1 - 20 - 1 - - - I2C2_FM_plus - FM+ driving capability activation for - I2C2 - 21 - 1 - - - SPI2_DMA_RMP - SPI2 DMA request remapping - bit - 24 - 1 - - - USART2_DMA_RMP - USART2 DMA request remapping - bit - 25 - 1 - - - USART3_DMA_RMP - USART3 DMA request remapping - bit - 26 - 1 - - - I2C1_DMA_RMP - I2C1 DMA request remapping - bit - 27 - 1 - - - TIM1_DMA_RMP - TIM1 DMA request remapping - bit - 28 - 1 - - - TIM2_DMA_RMP - TIM2 DMA request remapping - bit - 29 - 1 - - - TIM3_DMA_RMP - TIM3 DMA request remapping - bit - 30 - 1 - - - - - EXTICR1 - EXTICR1 - external interrupt configuration register - 1 - 0x8 - 0x20 - read-write - 0x0000 - - - EXTI3 - EXTI 3 configuration bits - 12 - 4 - - - EXTI2 - EXTI 2 configuration bits - 8 - 4 - - - EXTI1 - EXTI 1 configuration bits - 4 - 4 - - - EXTI0 - EXTI 0 configuration bits - 0 - 4 - - - - - EXTICR2 - EXTICR2 - external interrupt configuration register - 2 - 0xC - 0x20 - read-write - 0x0000 - - - EXTI7 - EXTI 7 configuration bits - 12 - 4 - - - EXTI6 - EXTI 6 configuration bits - 8 - 4 - - - EXTI5 - EXTI 5 configuration bits - 4 - 4 - - - EXTI4 - EXTI 4 configuration bits - 0 - 4 - - - - - EXTICR3 - EXTICR3 - external interrupt configuration register - 3 - 0x10 - 0x20 - read-write - 0x0000 - - - EXTI11 - EXTI 11 configuration bits - 12 - 4 - - - EXTI10 - EXTI 10 configuration bits - 8 - 4 - - - EXTI9 - EXTI 9 configuration bits - 4 - 4 - - - EXTI8 - EXTI 8 configuration bits - 0 - 4 - - - - - EXTICR4 - EXTICR4 - external interrupt configuration register - 4 - 0x14 - 0x20 - read-write - 0x0000 - - - EXTI15 - EXTI 15 configuration bits - 12 - 4 - - - EXTI14 - EXTI 14 configuration bits - 8 - 4 - - - EXTI13 - EXTI 13 configuration bits - 4 - 4 - - - EXTI12 - EXTI 12 configuration bits - 0 - 4 - - - - - CFGR2 - CFGR2 - configuration register 2 - 0x18 - 0x20 - read-write - 0x0000 - - - SRAM_PEF - SRAM parity flag - 8 - 1 - - - PVD_LOCK - PVD lock enable bit - 2 - 1 - - - SRAM_PARITY_LOCK - SRAM parity lock bit - 1 - 1 - - - LOCUP_LOCK - Cortex-M0 LOCKUP bit enable - bit - 0 - 1 - - - - - - - ADC - Analog-to-digital converter - ADC - 0x40012400 - - 0x0 - 0x400 - registers - - - ADC_COMP - ADC and comparator interrupts - 12 - - - - ISR - ISR - interrupt and status register - 0x0 - 0x20 - read-write - 0x00000000 - - - AWD - Analog watchdog flag - 7 - 1 - - - OVR - ADC overrun - 4 - 1 - - - EOS - End of sequence flag - 3 - 1 - - - EOC - End of conversion flag - 2 - 1 - - - EOSMP - End of sampling flag - 1 - 1 - - - ADRDY - ADC ready - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x4 - 0x20 - read-write - 0x00000000 - - - AWDIE - Analog watchdog interrupt - enable - 7 - 1 - - - OVRIE - Overrun interrupt enable - 4 - 1 - - - EOSIE - End of conversion sequence interrupt - enable - 3 - 1 - - - EOCIE - End of conversion interrupt - enable - 2 - 1 - - - EOSMPIE - End of sampling flag interrupt - enable - 1 - 1 - - - ADRDYIE - ADC ready interrupt enable - 0 - 1 - - - - - CR - CR - control register - 0x8 - 0x20 - read-write - 0x00000000 - - - ADCAL - ADC calibration - 31 - 1 - - - ADSTP - ADC stop conversion - command - 4 - 1 - - - ADSTART - ADC start conversion - command - 2 - 1 - - - ADDIS - ADC disable command - 1 - 1 - - - ADEN - ADC enable command - 0 - 1 - - - - - CFGR1 - CFGR1 - configuration register 1 - 0xC - 0x20 - read-write - 0x00000000 - - - AWDCH - Analog watchdog channel - selection - 26 - 5 - - - AWDEN - Analog watchdog enable - 23 - 1 - - - AWDSGL - Enable the watchdog on a single channel - or on all channels - 22 - 1 - - - DISCEN - Discontinuous mode - 16 - 1 - - - AUTOFF - Auto-off mode - 15 - 1 - - - AUTDLY - Auto-delayed conversion - mode - 14 - 1 - - - CONT - Single / continuous conversion - mode - 13 - 1 - - - OVRMOD - Overrun management mode - 12 - 1 - - - EXTEN - External trigger enable and polarity - selection - 10 - 2 - - - EXTSEL - External trigger selection - 6 - 3 - - - ALIGN - Data alignment - 5 - 1 - - - RES - Data resolution - 3 - 2 - - - SCANDIR - Scan sequence direction - 2 - 1 - - - DMACFG - Direct memery access - configuration - 1 - 1 - - - DMAEN - Direct memory access - enable - 0 - 1 - - - - - CFGR2 - CFGR2 - configuration register 2 - 0x10 - 0x20 - read-write - 0x00008000 - - - JITOFF_D4 - JITOFF_D4 - 31 - 1 - - - JITOFF_D2 - JITOFF_D2 - 30 - 1 - - - - - SMPR - SMPR - sampling time register - 0x14 - 0x20 - read-write - 0x00000000 - - - SMPR - Sampling time selection - 0 - 3 - - - - - TR - TR - watchdog threshold register - 0x20 - 0x20 - read-write - 0x00000FFF - - - HT - Analog watchdog higher - threshold - 16 - 12 - - - LT - Analog watchdog lower - threshold - 0 - 12 - - - - - CHSELR - CHSELR - channel selection register - 0x28 - 0x20 - read-write - 0x00000000 - - - CHSEL18 - Channel-x selection - 18 - 1 - - - CHSEL17 - Channel-x selection - 17 - 1 - - - CHSEL16 - Channel-x selection - 16 - 1 - - - CHSEL15 - Channel-x selection - 15 - 1 - - - CHSEL14 - Channel-x selection - 14 - 1 - - - CHSEL13 - Channel-x selection - 13 - 1 - - - CHSEL12 - Channel-x selection - 12 - 1 - - - CHSEL11 - Channel-x selection - 11 - 1 - - - CHSEL10 - Channel-x selection - 10 - 1 - - - CHSEL9 - Channel-x selection - 9 - 1 - - - CHSEL8 - Channel-x selection - 8 - 1 - - - CHSEL7 - Channel-x selection - 7 - 1 - - - CHSEL6 - Channel-x selection - 6 - 1 - - - CHSEL5 - Channel-x selection - 5 - 1 - - - CHSEL4 - Channel-x selection - 4 - 1 - - - CHSEL3 - Channel-x selection - 3 - 1 - - - CHSEL2 - Channel-x selection - 2 - 1 - - - CHSEL1 - Channel-x selection - 1 - 1 - - - CHSEL0 - Channel-x selection - 0 - 1 - - - - - DR - DR - data register - 0x40 - 0x20 - read-only - 0x00000000 - - - DATA - Converted data - 0 - 16 - - - - - CCR - CCR - common configuration register - 0x308 - 0x20 - read-write - 0x00000000 - - - VBATEN - VBAT enable - 24 - 1 - - - TSEN - Temperature sensor enable - 23 - 1 - - - VREFEN - Temperature sensor and VREFINT - enable - 22 - 1 - - - - - - - USART1 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40013800 - - 0x0 - 0x400 - registers - - - USART1 - USART1 global interrupt - 27 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - UE - USART enable - 0 - 1 - - - UESM - USART enable in Stop mode - 1 - 1 - - - RE - Receiver enable - 2 - 1 - - - TE - Transmitter enable - 3 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - TXEIE - interrupt enable - 7 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - PS - Parity selection - 9 - 1 - - - PCE - Parity control enable - 10 - 1 - - - WAKE - Receiver wakeup method - 11 - 1 - - - M - Word length - 12 - 1 - - - MME - Mute mode enable - 13 - 1 - - - CMIE - Character match interrupt - enable - 14 - 1 - - - OVER8 - Oversampling mode - 15 - 1 - - - DEDT - Driver Enable deassertion - time - 16 - 5 - - - DEAT - Driver Enable assertion - time - 21 - 5 - - - RTOIE - Receiver timeout interrupt - enable - 26 - 1 - - - EOBIE - End of Block interrupt - enable - 27 - 1 - - - M1 - Word length - 28 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - ADD4 - Address of the USART node - 28 - 4 - - - ADD0 - Address of the USART node - 24 - 4 - - - RTOEN - Receiver timeout enable - 23 - 1 - - - ABRMOD - Auto baud rate mode - 21 - 2 - - - ABREN - Auto baud rate enable - 20 - 1 - - - MSBFIRST - Most significant bit first - 19 - 1 - - - DATAINV - Binary data inversion - 18 - 1 - - - TXINV - TX pin active level - inversion - 17 - 1 - - - RXINV - RX pin active level - inversion - 16 - 1 - - - SWAP - Swap TX/RX pins - 15 - 1 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - CLKEN - Clock enable - 11 - 1 - - - CPOL - Clock polarity - 10 - 1 - - - CPHA - Clock phase - 9 - 1 - - - LBCL - Last bit clock pulse - 8 - 1 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - LIN break detection length - 5 - 1 - - - ADDM7 - 7-bit Address Detection/4-bit Address - Detection - 4 - 1 - - - - - CR3 - CR3 - Control register 3 - 0x8 - 0x20 - read-write - 0x0000 - - - WUFIE - Wakeup from Stop mode interrupt - enable - 22 - 1 - - - WUS - Wakeup from Stop mode interrupt flag - selection - 20 - 2 - - - SCARCNT - Smartcard auto-retry count - 17 - 3 - - - DEP - Driver enable polarity - selection - 15 - 1 - - - DEM - Driver enable mode - 14 - 1 - - - DDRE - DMA Disable on Reception - Error - 13 - 1 - - - OVRDIS - Overrun Disable - 12 - 1 - - - ONEBIT - One sample bit method - enable - 11 - 1 - - - CTSIE - CTS interrupt enable - 10 - 1 - - - CTSE - CTS enable - 9 - 1 - - - RTSE - RTS enable - 8 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - SCEN - Smartcard mode enable - 5 - 1 - - - NACK - Smartcard NACK enable - 4 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - BRR - BRR - Baud rate register - 0xC - 0x20 - read-write - 0x0000 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - GTPR - GTPR - Guard time and prescaler - register - 0x10 - 0x20 - read-write - 0x0000 - - - GT - Guard time value - 8 - 8 - - - PSC - Prescaler value - 0 - 8 - - - - - RTOR - RTOR - Receiver timeout register - 0x14 - 0x20 - read-write - 0x0000 - - - BLEN - Block Length - 24 - 8 - - - RTO - Receiver timeout value - 0 - 24 - - - - - RQR - RQR - Request register - 0x18 - 0x20 - read-write - 0x0000 - - - TXFRQ - Transmit data flush - request - 4 - 1 - - - RXFRQ - Receive data flush request - 3 - 1 - - - MMRQ - Mute mode request - 2 - 1 - - - SBKRQ - Send break request - 1 - 1 - - - ABRRQ - Auto baud rate request - 0 - 1 - - - - - ISR - ISR - Interrupt & status - register - 0x1C - 0x20 - read-only - 0x00C0 - - - REACK - Receive enable acknowledge - flag - 22 - 1 - - - TEACK - Transmit enable acknowledge - flag - 21 - 1 - - - WUF - Wakeup from Stop mode flag - 20 - 1 - - - RWU - Receiver wakeup from Mute - mode - 19 - 1 - - - SBKF - Send break flag - 18 - 1 - - - CMF - character match flag - 17 - 1 - - - BUSY - Busy flag - 16 - 1 - - - ABRF - Auto baud rate flag - 15 - 1 - - - ABRE - Auto baud rate error - 14 - 1 - - - EOBF - End of block flag - 12 - 1 - - - RTOF - Receiver timeout - 11 - 1 - - - CTS - CTS flag - 10 - 1 - - - CTSIF - CTS interrupt flag - 9 - 1 - - - LBDF - LIN break detection flag - 8 - 1 - - - TXE - Transmit data register - empty - 7 - 1 - - - TC - Transmission complete - 6 - 1 - - - RXNE - Read data register not - empty - 5 - 1 - - - IDLE - Idle line detected - 4 - 1 - - - ORE - Overrun error - 3 - 1 - - - NF - Noise detected flag - 2 - 1 - - - FE - Framing error - 1 - 1 - - - PE - Parity error - 0 - 1 - - - - - ICR - ICR - Interrupt flag clear register - 0x20 - 0x20 - read-write - 0x0000 - - - WUCF - Wakeup from Stop mode clear - flag - 20 - 1 - - - CMCF - Character match clear flag - 17 - 1 - - - EOBCF - End of timeout clear flag - 12 - 1 - - - RTOCF - Receiver timeout clear - flag - 11 - 1 - - - CTSCF - CTS clear flag - 9 - 1 - - - LBDCF - LIN break detection clear - flag - 8 - 1 - - - TCCF - Transmission complete clear - flag - 6 - 1 - - - IDLECF - Idle line detected clear - flag - 4 - 1 - - - ORECF - Overrun error clear flag - 3 - 1 - - - NCF - Noise detected clear flag - 2 - 1 - - - FECF - Framing error clear flag - 1 - 1 - - - PECF - Parity error clear flag - 0 - 1 - - - - - RDR - RDR - Receive data register - 0x24 - 0x20 - read-only - 0x0000 - - - RDR - Receive data value - 0 - 9 - - - - - TDR - TDR - Transmit data register - 0x28 - 0x20 - read-write - 0x0000 - - - TDR - Transmit data value - 0 - 9 - - - - - - - USART2 - 0x40004400 - - USART2 - USART2 global interrupt - 28 - - - - USART3 - 0x40004800 - - USART3_4 - USART3 and USART4 global - interrupt - 29 - - - - USART4 - 0x40004C00 - - USART3_4 - USART3 and USART4 global - interrupt - 29 - - - - USART6 - 0x40011400 - - USART1 - USART1 global interrupt - 27 - - - - USART7 - 0x40011800 - - USART1 - USART1 global interrupt - 27 - - - - USART8 - 0x40011C00 - - USART1 - USART1 global interrupt - 27 - - - - COMP - Comparator - COMP - 0x4001001C - - 0x0 - 0x400 - registers - - - ADC_COMP - ADC and comparator interrupts - 12 - - - - CSR - CSR - control and status register - 0x0 - 0x20 - 0x00000000 - - - COMP1EN - Comparator 1 enable - 0 - 1 - read-write - - - COMP1_INP_DAC - COMP1_INP_DAC - 1 - 1 - read-write - - - COMP1MODE - Comparator 1 mode - 2 - 2 - read-write - - - COMP1INSEL - Comparator 1 inverting input - selection - 4 - 3 - read-write - - - COMP1OUTSEL - Comparator 1 output - selection - 8 - 3 - read-write - - - COMP1POL - Comparator 1 output - polarity - 11 - 1 - read-write - - - COMP1HYST - Comparator 1 hysteresis - 12 - 2 - read-write - - - COMP1OUT - Comparator 1 output - 14 - 1 - read-only - - - COMP1LOCK - Comparator 1 lock - 15 - 1 - read-write - - - COMP2EN - Comparator 2 enable - 16 - 1 - read-write - - - COMP2MODE - Comparator 2 mode - 18 - 2 - read-write - - - COMP2INSEL - Comparator 2 inverting input - selection - 20 - 3 - read-write - - - WNDWEN - Window mode enable - 23 - 1 - read-write - - - COMP2OUTSEL - Comparator 2 output - selection - 24 - 3 - read-write - - - COMP2POL - Comparator 2 output - polarity - 27 - 1 - read-write - - - COMP2HYST - Comparator 2 hysteresis - 28 - 2 - read-write - - - COMP2OUT - Comparator 2 output - 30 - 1 - read-only - - - COMP2LOCK - Comparator 2 lock - 31 - 1 - read-write - - - - - - - RTC - Real-time clock - RTC - 0x40002800 - - 0x0 - 0x400 - registers - - - RTC - RTC interrupts - 2 - - - - TR - TR - time register - 0x0 - 0x20 - read-write - 0x00000000 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - DR - DR - date register - 0x4 - 0x20 - read-write - 0x00002101 - - - YT - Year tens in BCD format - 20 - 4 - - - YU - Year units in BCD format - 16 - 4 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - CR - CR - control register - 0x8 - 0x20 - 0x00000000 - - - TSEDGE - Time-stamp event active - edge - 3 - 1 - read-write - - - REFCKON - RTC_REFIN reference clock detection - enable (50 or 60 Hz) - 4 - 1 - read-write - - - BYPSHAD - Bypass the shadow - registers - 5 - 1 - read-write - - - FMT - Hour format - 6 - 1 - read-write - - - ALRAE - Alarm A enable - 8 - 1 - read-write - - - TSE - timestamp enable - 11 - 1 - read-write - - - ALRAIE - Alarm A interrupt enable - 12 - 1 - read-write - - - TSIE - Time-stamp interrupt - enable - 15 - 1 - read-write - - - ADD1H - Add 1 hour (summer time - change) - 16 - 1 - write-only - - - SUB1H - Subtract 1 hour (winter time - change) - 17 - 1 - write-only - - - BKP - Backup - 18 - 1 - read-write - - - COSEL - Calibration output - selection - 19 - 1 - read-write - - - POL - Output polarity - 20 - 1 - read-write - - - OSEL - Output selection - 21 - 2 - read-write - - - COE - Calibration output enable - 23 - 1 - read-write - - - - - ISR - ISR - initialization and status - register - 0xC - 0x20 - 0x00000007 - - - ALRAWF - Alarm A write flag - 0 - 1 - read-only - - - SHPF - Shift operation pending - 3 - 1 - read-write - - - INITS - Initialization status flag - 4 - 1 - read-only - - - RSF - Registers synchronization - flag - 5 - 1 - read-write - - - INITF - Initialization flag - 6 - 1 - read-only - - - INIT - Initialization mode - 7 - 1 - read-write - - - ALRAF - Alarm A flag - 8 - 1 - read-write - - - TSF - Time-stamp flag - 11 - 1 - read-write - - - TSOVF - Time-stamp overflow flag - 12 - 1 - read-write - - - TAMP1F - RTC_TAMP1 detection flag - 13 - 1 - read-write - - - TAMP2F - RTC_TAMP2 detection flag - 14 - 1 - read-write - - - RECALPF - Recalibration pending Flag - 16 - 1 - read-only - - - - - PRER - PRER - prescaler register - 0x10 - 0x20 - read-write - 0x007F00FF - - - PREDIV_A - Asynchronous prescaler - factor - 16 - 7 - - - PREDIV_S - Synchronous prescaler - factor - 0 - 15 - - - - - ALRMAR - ALRMAR - alarm A register - 0x1C - 0x20 - read-write - 0x00000000 - - - MSK4 - Alarm A date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format. - 28 - 2 - - - DU - Date units or day in BCD - format. - 24 - 4 - - - MSK3 - Alarm A hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format. - 20 - 2 - - - HU - Hour units in BCD format. - 16 - 4 - - - MSK2 - Alarm A minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format. - 12 - 3 - - - MNU - Minute units in BCD - format. - 8 - 4 - - - MSK1 - Alarm A seconds mask - 7 - 1 - - - ST - Second tens in BCD format. - 4 - 3 - - - SU - Second units in BCD - format. - 0 - 4 - - - - - WPR - WPR - write protection register - 0x24 - 0x20 - write-only - 0x00000000 - - - KEY - Write protection key - 0 - 8 - - - - - SSR - SSR - sub second register - 0x28 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - SHIFTR - SHIFTR - shift control register - 0x2C - 0x20 - write-only - 0x00000000 - - - ADD1S - Reserved - 31 - 1 - - - SUBFS - Subtract a fraction of a - second - 0 - 15 - - - - - TSTR - TSTR - timestamp time register - 0x30 - 0x20 - read-only - 0x00000000 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format. - 20 - 2 - - - HU - Hour units in BCD format. - 16 - 4 - - - MNT - Minute tens in BCD format. - 12 - 3 - - - MNU - Minute units in BCD - format. - 8 - 4 - - - ST - Second tens in BCD format. - 4 - 3 - - - SU - Second units in BCD - format. - 0 - 4 - - - - - TSDR - TSDR - timestamp date register - 0x34 - 0x20 - read-only - 0x00000000 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - TSSSR - TSSSR - time-stamp sub second register - 0x38 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - CALR - CALR - calibration register - 0x3C - 0x20 - read-write - 0x00000000 - - - CALP - Use an 8-second calibration cycle - period - 15 - 1 - - - CALW8 - Use a 16-second calibration cycle - period - 14 - 1 - - - CALW16 - Reserved - 13 - 1 - - - CALM - Calibration minus - 0 - 9 - - - - - TAFCR - TAFCR - tamper and alternate function configuration - register - 0x40 - 0x20 - read-write - 0x00000000 - - - PC15MODE - PC15 mode - 23 - 1 - - - PC15VALUE - PC15 value - 22 - 1 - - - PC14MODE - PC14 mode - 21 - 1 - - - PC14VALUE - PC14 value - 20 - 1 - - - PC13MODE - PC13 mode - 19 - 1 - - - PC13VALUE - RTC_ALARM output type/PC13 - value - 18 - 1 - - - TAMP_PUDIS - RTC_TAMPx pull-up disable - 15 - 1 - - - TAMP_PRCH - RTC_TAMPx precharge - duration - 13 - 2 - - - TAMPFLT - RTC_TAMPx filter count - 11 - 2 - - - TAMPFREQ - Tamper sampling frequency - 8 - 3 - - - TAMPTS - Activate timestamp on tamper detection - event - 7 - 1 - - - TAMP2_TRG - Active level for RTC_TAMP2 - input - 4 - 1 - - - TAMP2E - RTC_TAMP2 input detection - enable - 3 - 1 - - - TAMPIE - Tamper interrupt enable - 2 - 1 - - - TAMP1TRG - Active level for RTC_TAMP1 - input - 1 - 1 - - - TAMP1E - RTC_TAMP1 input detection - enable - 0 - 1 - - - - - ALRMASSR - ALRMASSR - alarm A sub second register - 0x44 - 0x20 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - BKP0R - BKP0R - backup register - 0x50 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP1R - BKP1R - backup register - 0x54 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP2R - BKP2R - backup register - 0x58 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP3R - BKP3R - backup register - 0x5C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP4R - BKP4R - backup register - 0x60 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - - - TIM15 - General-purpose-timers - TIM - 0x40014000 - - 0x0 - 0x400 - registers - - - TIM15 - TIM15 global interrupt - 20 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM16 - General-purpose-timers - TIM - 0x40014400 - - 0x0 - 0x400 - registers - - - TIM16 - TIM16 global interrupt - 21 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM17 - 0x40014800 - - TIM17 - TIM17 global interrupt - 22 - - - - TSC - Touch sensing controller - TSC - 0x40024000 - - 0x0 - 0x400 - registers - - - TSC - Touch sensing interrupt - 8 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - CTPH - Charge transfer pulse high - 28 - 4 - - - CTPL - Charge transfer pulse low - 24 - 4 - - - SSD - Spread spectrum deviation - 17 - 7 - - - SSE - Spread spectrum enable - 16 - 1 - - - SSPSC - Spread spectrum prescaler - 15 - 1 - - - PGPSC - pulse generator prescaler - 12 - 3 - - - MCV - Max count value - 5 - 3 - - - IODEF - I/O Default mode - 4 - 1 - - - SYNCPOL - Synchronization pin - polarity - 3 - 1 - - - AM - Acquisition mode - 2 - 1 - - - START - Start a new acquisition - 1 - 1 - - - TSCE - Touch sensing controller - enable - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x4 - 0x20 - read-write - 0x00000000 - - - MCEIE - Max count error interrupt - enable - 1 - 1 - - - EOAIE - End of acquisition interrupt - enable - 0 - 1 - - - - - ICR - ICR - interrupt clear register - 0x8 - 0x20 - read-write - 0x00000000 - - - MCEIC - Max count error interrupt - clear - 1 - 1 - - - EOAIC - End of acquisition interrupt - clear - 0 - 1 - - - - - ISR - ISR - interrupt status register - 0xC - 0x20 - read-write - 0x00000000 - - - MCEF - Max count error flag - 1 - 1 - - - EOAF - End of acquisition flag - 0 - 1 - - - - - IOHCR - IOHCR - I/O hysteresis control - register - 0x10 - 0x20 - read-write - 0xFFFFFFFF - - - G6_IO4 - G6_IO4 Schmitt trigger hysteresis - mode - 23 - 1 - - - G6_IO3 - G6_IO3 Schmitt trigger hysteresis - mode - 22 - 1 - - - G6_IO2 - G6_IO2 Schmitt trigger hysteresis - mode - 21 - 1 - - - G6_IO1 - G6_IO1 Schmitt trigger hysteresis - mode - 20 - 1 - - - G5_IO4 - G5_IO4 Schmitt trigger hysteresis - mode - 19 - 1 - - - G5_IO3 - G5_IO3 Schmitt trigger hysteresis - mode - 18 - 1 - - - G5_IO2 - G5_IO2 Schmitt trigger hysteresis - mode - 17 - 1 - - - G5_IO1 - G5_IO1 Schmitt trigger hysteresis - mode - 16 - 1 - - - G4_IO4 - G4_IO4 Schmitt trigger hysteresis - mode - 15 - 1 - - - G4_IO3 - G4_IO3 Schmitt trigger hysteresis - mode - 14 - 1 - - - G4_IO2 - G4_IO2 Schmitt trigger hysteresis - mode - 13 - 1 - - - G4_IO1 - G4_IO1 Schmitt trigger hysteresis - mode - 12 - 1 - - - G3_IO4 - G3_IO4 Schmitt trigger hysteresis - mode - 11 - 1 - - - G3_IO3 - G3_IO3 Schmitt trigger hysteresis - mode - 10 - 1 - - - G3_IO2 - G3_IO2 Schmitt trigger hysteresis - mode - 9 - 1 - - - G3_IO1 - G3_IO1 Schmitt trigger hysteresis - mode - 8 - 1 - - - G2_IO4 - G2_IO4 Schmitt trigger hysteresis - mode - 7 - 1 - - - G2_IO3 - G2_IO3 Schmitt trigger hysteresis - mode - 6 - 1 - - - G2_IO2 - G2_IO2 Schmitt trigger hysteresis - mode - 5 - 1 - - - G2_IO1 - G2_IO1 Schmitt trigger hysteresis - mode - 4 - 1 - - - G1_IO4 - G1_IO4 Schmitt trigger hysteresis - mode - 3 - 1 - - - G1_IO3 - G1_IO3 Schmitt trigger hysteresis - mode - 2 - 1 - - - G1_IO2 - G1_IO2 Schmitt trigger hysteresis - mode - 1 - 1 - - - G1_IO1 - G1_IO1 Schmitt trigger hysteresis - mode - 0 - 1 - - - - - IOASCR - IOASCR - I/O analog switch control - register - 0x18 - 0x20 - read-write - 0x00000000 - - - G6_IO4 - G6_IO4 analog switch - enable - 23 - 1 - - - G6_IO3 - G6_IO3 analog switch - enable - 22 - 1 - - - G6_IO2 - G6_IO2 analog switch - enable - 21 - 1 - - - G6_IO1 - G6_IO1 analog switch - enable - 20 - 1 - - - G5_IO4 - G5_IO4 analog switch - enable - 19 - 1 - - - G5_IO3 - G5_IO3 analog switch - enable - 18 - 1 - - - G5_IO2 - G5_IO2 analog switch - enable - 17 - 1 - - - G5_IO1 - G5_IO1 analog switch - enable - 16 - 1 - - - G4_IO4 - G4_IO4 analog switch - enable - 15 - 1 - - - G4_IO3 - G4_IO3 analog switch - enable - 14 - 1 - - - G4_IO2 - G4_IO2 analog switch - enable - 13 - 1 - - - G4_IO1 - G4_IO1 analog switch - enable - 12 - 1 - - - G3_IO4 - G3_IO4 analog switch - enable - 11 - 1 - - - G3_IO3 - G3_IO3 analog switch - enable - 10 - 1 - - - G3_IO2 - G3_IO2 analog switch - enable - 9 - 1 - - - G3_IO1 - G3_IO1 analog switch - enable - 8 - 1 - - - G2_IO4 - G2_IO4 analog switch - enable - 7 - 1 - - - G2_IO3 - G2_IO3 analog switch - enable - 6 - 1 - - - G2_IO2 - G2_IO2 analog switch - enable - 5 - 1 - - - G2_IO1 - G2_IO1 analog switch - enable - 4 - 1 - - - G1_IO4 - G1_IO4 analog switch - enable - 3 - 1 - - - G1_IO3 - G1_IO3 analog switch - enable - 2 - 1 - - - G1_IO2 - G1_IO2 analog switch - enable - 1 - 1 - - - G1_IO1 - G1_IO1 analog switch - enable - 0 - 1 - - - - - IOSCR - IOSCR - I/O sampling control register - 0x20 - 0x20 - read-write - 0x00000000 - - - G6_IO4 - G6_IO4 sampling mode - 23 - 1 - - - G6_IO3 - G6_IO3 sampling mode - 22 - 1 - - - G6_IO2 - G6_IO2 sampling mode - 21 - 1 - - - G6_IO1 - G6_IO1 sampling mode - 20 - 1 - - - G5_IO4 - G5_IO4 sampling mode - 19 - 1 - - - G5_IO3 - G5_IO3 sampling mode - 18 - 1 - - - G5_IO2 - G5_IO2 sampling mode - 17 - 1 - - - G5_IO1 - G5_IO1 sampling mode - 16 - 1 - - - G4_IO4 - G4_IO4 sampling mode - 15 - 1 - - - G4_IO3 - G4_IO3 sampling mode - 14 - 1 - - - G4_IO2 - G4_IO2 sampling mode - 13 - 1 - - - G4_IO1 - G4_IO1 sampling mode - 12 - 1 - - - G3_IO4 - G3_IO4 sampling mode - 11 - 1 - - - G3_IO3 - G3_IO3 sampling mode - 10 - 1 - - - G3_IO2 - G3_IO2 sampling mode - 9 - 1 - - - G3_IO1 - G3_IO1 sampling mode - 8 - 1 - - - G2_IO4 - G2_IO4 sampling mode - 7 - 1 - - - G2_IO3 - G2_IO3 sampling mode - 6 - 1 - - - G2_IO2 - G2_IO2 sampling mode - 5 - 1 - - - G2_IO1 - G2_IO1 sampling mode - 4 - 1 - - - G1_IO4 - G1_IO4 sampling mode - 3 - 1 - - - G1_IO3 - G1_IO3 sampling mode - 2 - 1 - - - G1_IO2 - G1_IO2 sampling mode - 1 - 1 - - - G1_IO1 - G1_IO1 sampling mode - 0 - 1 - - - - - IOCCR - IOCCR - I/O channel control register - 0x28 - 0x20 - read-write - 0x00000000 - - - G6_IO4 - G6_IO4 channel mode - 23 - 1 - - - G6_IO3 - G6_IO3 channel mode - 22 - 1 - - - G6_IO2 - G6_IO2 channel mode - 21 - 1 - - - G6_IO1 - G6_IO1 channel mode - 20 - 1 - - - G5_IO4 - G5_IO4 channel mode - 19 - 1 - - - G5_IO3 - G5_IO3 channel mode - 18 - 1 - - - G5_IO2 - G5_IO2 channel mode - 17 - 1 - - - G5_IO1 - G5_IO1 channel mode - 16 - 1 - - - G4_IO4 - G4_IO4 channel mode - 15 - 1 - - - G4_IO3 - G4_IO3 channel mode - 14 - 1 - - - G4_IO2 - G4_IO2 channel mode - 13 - 1 - - - G4_IO1 - G4_IO1 channel mode - 12 - 1 - - - G3_IO4 - G3_IO4 channel mode - 11 - 1 - - - G3_IO3 - G3_IO3 channel mode - 10 - 1 - - - G3_IO2 - G3_IO2 channel mode - 9 - 1 - - - G3_IO1 - G3_IO1 channel mode - 8 - 1 - - - G2_IO4 - G2_IO4 channel mode - 7 - 1 - - - G2_IO3 - G2_IO3 channel mode - 6 - 1 - - - G2_IO2 - G2_IO2 channel mode - 5 - 1 - - - G2_IO1 - G2_IO1 channel mode - 4 - 1 - - - G1_IO4 - G1_IO4 channel mode - 3 - 1 - - - G1_IO3 - G1_IO3 channel mode - 2 - 1 - - - G1_IO2 - G1_IO2 channel mode - 1 - 1 - - - G1_IO1 - G1_IO1 channel mode - 0 - 1 - - - - - IOGCSR - IOGCSR - I/O group control status - register - 0x30 - 0x20 - 0x00000000 - - - G8S - Analog I/O group x status - 23 - 1 - read-write - - - G7S - Analog I/O group x status - 22 - 1 - read-write - - - G6S - Analog I/O group x status - 21 - 1 - read-only - - - G5S - Analog I/O group x status - 20 - 1 - read-only - - - G4S - Analog I/O group x status - 19 - 1 - read-only - - - G3S - Analog I/O group x status - 18 - 1 - read-only - - - G2S - Analog I/O group x status - 17 - 1 - read-only - - - G1S - Analog I/O group x status - 16 - 1 - read-only - - - G8E - Analog I/O group x enable - 7 - 1 - read-write - - - G7E - Analog I/O group x enable - 6 - 1 - read-write - - - G6E - Analog I/O group x enable - 5 - 1 - read-write - - - G5E - Analog I/O group x enable - 4 - 1 - read-write - - - G4E - Analog I/O group x enable - 3 - 1 - read-write - - - G3E - Analog I/O group x enable - 2 - 1 - read-write - - - G2E - Analog I/O group x enable - 1 - 1 - read-write - - - G1E - Analog I/O group x enable - 0 - 1 - read-write - - - - - IOG1CR - IOG1CR - I/O group x counter register - 0x34 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG2CR - IOG2CR - I/O group x counter register - 0x38 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG3CR - IOG3CR - I/O group x counter register - 0x3C - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG4CR - IOG4CR - I/O group x counter register - 0x40 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG5CR - IOG5CR - I/O group x counter register - 0x44 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG6CR - IOG6CR - I/O group x counter register - 0x48 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - - - CEC - HDMI-CEC controller - CEC - 0x40007800 - - 0x0 - 0x400 - registers - - - CEC_CAN - CEC and CAN global interrupt - 30 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - TXEOM - Tx End Of Message - 2 - 1 - - - TXSOM - Tx start of message - 1 - 1 - - - CECEN - CEC Enable - 0 - 1 - - - - - CFGR - CFGR - configuration register - 0x4 - 0x20 - read-write - 0x00000000 - - - LBPEGEN - Generate Error-Bit on Long Bit Period - Error - 11 - 1 - - - BREGEN - Generate error-bit on bit rising - error - 10 - 1 - - - BRESTP - Rx-stop on bit rising - error - 9 - 1 - - - RXTOL - Rx-Tolerance - 8 - 1 - - - SFT - Signal Free Time - 5 - 3 - - - LSTN - Listen mode - 4 - 1 - - - OAR - Own Address - 0 - 4 - - - - - TXDR - TXDR - Tx data register - 0x8 - 0x20 - write-only - 0x00000000 - - - TXD - Tx Data register - 0 - 8 - - - - - RXDR - RXDR - Rx Data Register - 0xC - 0x20 - read-only - 0x00000000 - - - RXDR - CEC Rx Data Register - 0 - 8 - - - - - ISR - ISR - Interrupt and Status Register - 0x10 - 0x20 - read-write - 0x00000000 - - - TXACKE - Tx-Missing acknowledge - error - 12 - 1 - - - TXERR - Tx-Error - 11 - 1 - - - TXUDR - Tx-Buffer Underrun - 10 - 1 - - - TXEND - End of Transmission - 9 - 1 - - - TXBR - Tx-Byte Request - 8 - 1 - - - ARBLST - Arbitration Lost - 7 - 1 - - - RXACKE - Rx-Missing Acknowledge - 6 - 1 - - - LBPE - Rx-Long Bit Period Error - 5 - 1 - - - SBPE - Rx-Short Bit period error - 4 - 1 - - - BRE - Rx-Bit rising error - 3 - 1 - - - RXOVR - Rx-Overrun - 2 - 1 - - - RXEND - End Of Reception - 1 - 1 - - - RXBR - Rx-Byte Received - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x14 - 0x20 - read-write - 0x00000000 - - - TXACKIE - Tx-Missing Acknowledge Error Interrupt - Enable - 12 - 1 - - - TXERRIE - Tx-Error Interrupt Enable - 11 - 1 - - - TXUDRIE - Tx-Underrun interrupt - enable - 10 - 1 - - - TXENDIE - Tx-End of message interrupt - enable - 9 - 1 - - - TXBRIE - Tx-Byte Request Interrupt - Enable - 8 - 1 - - - ARBLSTIE - Arbitration Lost Interrupt - Enable - 7 - 1 - - - RXACKIE - Rx-Missing Acknowledge Error Interrupt - Enable - 6 - 1 - - - LBPEIE - Long Bit Period Error Interrupt - Enable - 5 - 1 - - - SBPEIE - Short Bit Period Error Interrupt - Enable - 4 - 1 - - - BREIE - Bit Rising Error Interrupt - Enable - 3 - 1 - - - RXOVRIE - Rx-Buffer Overrun Interrupt - Enable - 2 - 1 - - - RXENDIE - End Of Reception Interrupt - Enable - 1 - 1 - - - RXBRIE - Rx-Byte Received Interrupt - Enable - 0 - 1 - - - - - - - Flash - Flash - Flash - 0x40022000 - - 0x0 - 0x400 - registers - - - FLASH - Flash global interrupt - 3 - - - - ACR - ACR - Flash access control register - 0x0 - 0x20 - 0x00000030 - - - LATENCY - LATENCY - 0 - 3 - read-write - - - PRFTBE - PRFTBE - 4 - 1 - read-write - - - PRFTBS - PRFTBS - 5 - 1 - read-only - - - - - KEYR - KEYR - Flash key register - 0x4 - 0x20 - write-only - 0x00000000 - - - FKEYR - Flash Key - 0 - 32 - - - - - OPTKEYR - OPTKEYR - Flash option key register - 0x8 - 0x20 - write-only - 0x00000000 - - - OPTKEYR - Option byte key - 0 - 32 - - - - - SR - SR - Flash status register - 0xC - 0x20 - 0x00000000 - - - EOP - End of operation - 5 - 1 - read-write - - - WRPRT - Write protection error - 4 - 1 - read-write - - - PGERR - Programming error - 2 - 1 - read-write - - - BSY - Busy - 0 - 1 - read-only - - - - - CR - CR - Flash control register - 0x10 - 0x20 - read-write - 0x00000080 - - - FORCE_OPTLOAD - Force option byte loading - 13 - 1 - - - EOPIE - End of operation interrupt - enable - 12 - 1 - - - ERRIE - Error interrupt enable - 10 - 1 - - - OPTWRE - Option bytes write enable - 9 - 1 - - - LOCK - Lock - 7 - 1 - - - STRT - Start - 6 - 1 - - - OPTER - Option byte erase - 5 - 1 - - - OPTPG - Option byte programming - 4 - 1 - - - MER - Mass erase - 2 - 1 - - - PER - Page erase - 1 - 1 - - - PG - Programming - 0 - 1 - - - - - AR - AR - Flash address register - 0x14 - 0x20 - write-only - 0x00000000 - - - FAR - Flash address - 0 - 32 - - - - - OBR - OBR - Option byte register - 0x1C - 0x20 - read-only - 0x03FFFFF2 - - - Data1 - Data1 - 24 - 8 - - - Data0 - Data0 - 16 - 8 - - - VDDA_MONITOR - VDDA_MONITOR - 13 - 1 - - - BOOT1 - BOOT1 - 12 - 1 - - - nRST_STDBY - nRST_STDBY - 10 - 1 - - - nRST_STOP - nRST_STOP - 9 - 1 - - - WDG_SW - WDG_SW - 8 - 1 - - - LEVEL2_PROT - Level 2 protection status - 2 - 1 - - - LEVEL1_PROT - Level 1 protection status - 1 - 1 - - - OPTERR - Option byte error - 0 - 1 - - - - - WRPR - WRPR - Write protection register - 0x20 - 0x20 - read-only - 0xFFFFFFFF - - - WRP - Write protect - 0 - 32 - - - - - - - DBGMCU - Debug support - DBGMCU - 0x40015800 - - 0x0 - 0x400 - registers - - - - IDCODE - IDCODE - MCU Device ID Code Register - 0x0 - 0x20 - read-only - 0x0 - - - DEV_ID - Device Identifier - 0 - 12 - - - DIV_ID - Division Identifier - 12 - 4 - - - REV_ID - Revision Identifier - 16 - 16 - - - - - CR - CR - Debug MCU Configuration - Register - 0x4 - 0x20 - read-write - 0x0 - - - DBG_STOP - Debug Stop Mode - 1 - 1 - - - DBG_STANDBY - Debug Standby Mode - 2 - 1 - - - - - APBLFZ - APBLFZ - APB Low Freeze Register - 0x8 - 0x20 - read-write - 0x0 - - - DBG_TIMER2_STOP - Debug Timer 2 stopped when Core is - halted - 0 - 1 - - - DBG_TIMER3_STOP - Debug Timer 3 stopped when Core is - halted - 1 - 1 - - - DBG_TIMER6_STOP - Debug Timer 6 stopped when Core is - halted - 4 - 1 - - - DBG_TIMER14_STOP - Debug Timer 14 stopped when Core is - halted - 8 - 1 - - - DBG_RTC_STOP - Debug RTC stopped when Core is - halted - 10 - 1 - - - DBG_WWDG_STOP - Debug Window Wachdog stopped when Core - is halted - 11 - 1 - - - DBG_IWDG_STOP - Debug Independent Wachdog stopped when - Core is halted - 12 - 1 - - - I2C1_SMBUS_TIMEOUT - SMBUS timeout mode stopped when Core is - halted - 21 - 1 - - - - - APBHFZ - APBHFZ - APB High Freeze Register - 0xC - 0x20 - read-write - 0x0 - - - DBG_TIMER1_STOP - Debug Timer 1 stopped when Core is - halted - 11 - 1 - - - DBG_TIMER15_STO - Debug Timer 15 stopped when Core is - halted - 16 - 1 - - - DBG_TIMER16_STO - Debug Timer 16 stopped when Core is - halted - 17 - 1 - - - DBG_TIMER17_STO - Debug Timer 17 stopped when Core is - halted - 18 - 1 - - - - - - - USB - Universal serial bus full-speed device - interface - USB - 0x40005C00 - - 0x0 - 0x400 - registers - - - USB - USB global interrupt - 31 - - - - EP0R - EP0R - endpoint 0 register - 0x0 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP1R - EP1R - endpoint 1 register - 0x4 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP2R - EP2R - endpoint 2 register - 0x8 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP3R - EP3R - endpoint 3 register - 0xC - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP4R - EP4R - endpoint 4 register - 0x10 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP5R - EP5R - endpoint 5 register - 0x14 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP6R - EP6R - endpoint 6 register - 0x18 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP7R - EP7R - endpoint 7 register - 0x1C - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - CNTR - CNTR - control register - 0x40 - 0x20 - read-write - 0x00000003 - - - FRES - Force USB Reset - 0 - 1 - - - PDWN - Power down - 1 - 1 - - - LPMODE - Low-power mode - 2 - 1 - - - FSUSP - Force suspend - 3 - 1 - - - RESUME - Resume request - 4 - 1 - - - L1RESUME - LPM L1 Resume request - 5 - 1 - - - L1REQM - LPM L1 state request interrupt - mask - 7 - 1 - - - ESOFM - Expected start of frame interrupt - mask - 8 - 1 - - - SOFM - Start of frame interrupt - mask - 9 - 1 - - - RESETM - USB reset interrupt mask - 10 - 1 - - - SUSPM - Suspend mode interrupt - mask - 11 - 1 - - - WKUPM - Wakeup interrupt mask - 12 - 1 - - - ERRM - Error interrupt mask - 13 - 1 - - - PMAOVRM - Packet memory area over / underrun - interrupt mask - 14 - 1 - - - CTRM - Correct transfer interrupt - mask - 15 - 1 - - - - - ISTR - ISTR - interrupt status register - 0x44 - 0x20 - 0x00000000 - - - EP_ID - Endpoint Identifier - 0 - 4 - read-only - - - DIR - Direction of transaction - 4 - 1 - read-only - - - L1REQ - LPM L1 state request - 7 - 1 - read-write - - - ESOF - Expected start frame - 8 - 1 - read-write - - - SOF - start of frame - 9 - 1 - read-write - - - RESET - reset request - 10 - 1 - read-write - - - SUSP - Suspend mode request - 11 - 1 - read-write - - - WKUP - Wakeup - 12 - 1 - read-write - - - ERR - Error - 13 - 1 - read-write - - - PMAOVR - Packet memory area over / - underrun - 14 - 1 - read-write - - - CTR - Correct transfer - 15 - 1 - read-only - - - - - FNR - FNR - frame number register - 0x48 - 0x20 - read-only - 0x0000 - - - FN - Frame number - 0 - 11 - - - LSOF - Lost SOF - 11 - 2 - - - LCK - Locked - 13 - 1 - - - RXDM - Receive data - line status - 14 - 1 - - - RXDP - Receive data + line status - 15 - 1 - - - - - DADDR - DADDR - device address - 0x4C - 0x20 - read-write - 0x0000 - - - ADD - Device address - 0 - 7 - - - EF - Enable function - 7 - 1 - - - - - BTABLE - BTABLE - Buffer table address - 0x50 - 0x20 - read-write - 0x0000 - - - BTABLE - Buffer table - 3 - 13 - - - - - LPMCSR - LPMCSR - LPM control and status - register - 0x54 - 0x20 - 0x0000 - - - LPMEN - LPM support enable - 0 - 1 - read-write - - - LPMACK - LPM Token acknowledge - enable - 1 - 1 - read-write - - - REMWAKE - bRemoteWake value - 3 - 1 - read-only - - - BESL - BESL value - 4 - 4 - read-only - - - - - BCDR - BCDR - Battery charging detector - 0x58 - 0x20 - 0x0000 - - - BCDEN - Battery charging detector (BCD) - enable - 0 - 1 - read-write - - - DCDEN - Data contact detection (DCD) mode - enable - 1 - 1 - read-write - - - PDEN - Primary detection (PD) mode - enable - 2 - 1 - read-write - - - SDEN - Secondary detection (SD) mode - enable - 3 - 1 - read-write - - - DCDET - Data contact detection (DCD) - status - 4 - 1 - read-only - - - PDET - Primary detection (PD) - status - 5 - 1 - read-only - - - SDET - Secondary detection (SD) - status - 6 - 1 - read-only - - - PS2DET - DM pull-up detection - status - 7 - 1 - read-only - - - DPPU - DP pull-up control - 15 - 1 - read-write - - - - - - - CRS - Clock recovery system - CRS - 0x40006C00 - - 0x0 - 0x400 - registers - - - RCC_CRS - RCC and CRS global interrupts - 4 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00002000 - - - TRIM - HSI48 oscillator smooth - trimming - 8 - 6 - - - SWSYNC - Generate software SYNC - event - 7 - 1 - - - AUTOTRIMEN - Automatic trimming enable - 6 - 1 - - - CEN - Frequency error counter - enable - 5 - 1 - - - ESYNCIE - Expected SYNC interrupt - enable - 3 - 1 - - - ERRIE - Synchronization or trimming error - interrupt enable - 2 - 1 - - - SYNCWARNIE - SYNC warning interrupt - enable - 1 - 1 - - - SYNCOKIE - SYNC event OK interrupt - enable - 0 - 1 - - - - - CFGR - CFGR - configuration register - 0x4 - 0x20 - read-write - 0x2022BB7F - - - SYNCPOL - SYNC polarity selection - 31 - 1 - - - SYNCSRC - SYNC signal source - selection - 28 - 2 - - - SYNCDIV - SYNC divider - 24 - 3 - - - FELIM - Frequency error limit - 16 - 8 - - - RELOAD - Counter reload value - 0 - 16 - - - - - ISR - ISR - interrupt and status register - 0x8 - 0x20 - read-only - 0x00000000 - - - FECAP - Frequency error capture - 16 - 16 - - - FEDIR - Frequency error direction - 15 - 1 - - - TRIMOVF - Trimming overflow or - underflow - 10 - 1 - - - SYNCMISS - SYNC missed - 9 - 1 - - - SYNCERR - SYNC error - 8 - 1 - - - ESYNCF - Expected SYNC flag - 3 - 1 - - - ERRF - Error flag - 2 - 1 - - - SYNCWARNF - SYNC warning flag - 1 - 1 - - - SYNCOKF - SYNC event OK flag - 0 - 1 - - - - - ICR - ICR - interrupt flag clear register - 0xC - 0x20 - read-write - 0x00000000 - - - ESYNCC - Expected SYNC clear flag - 3 - 1 - - - ERRC - Error clear flag - 2 - 1 - - - SYNCWARNC - SYNC warning clear flag - 1 - 1 - - - SYNCOKC - SYNC event OK clear flag - 0 - 1 - - - - - - - CAN - Controller area network - CAN - 0x40006400 - - 0x0 - 0x400 - registers - - - CEC_CAN - CEC and CAN global interrupt - 30 - - - - CAN_MCR - CAN_MCR - CAN_MCR - 0x0 - 0x20 - read-write - 0x00000000 - - - DBF - DBF - 16 - 1 - - - RESET - RESET - 15 - 1 - - - TTCM - TTCM - 7 - 1 - - - ABOM - ABOM - 6 - 1 - - - AWUM - AWUM - 5 - 1 - - - NART - NART - 4 - 1 - - - RFLM - RFLM - 3 - 1 - - - TXFP - TXFP - 2 - 1 - - - SLEEP - SLEEP - 1 - 1 - - - INRQ - INRQ - 0 - 1 - - - - - CAN_MSR - CAN_MSR - CAN_MSR - 0x4 - 0x20 - 0x00000000 - - - RX - RX - 11 - 1 - read-only - - - SAMP - SAMP - 10 - 1 - read-only - - - RXM - RXM - 9 - 1 - read-only - - - TXM - TXM - 8 - 1 - read-only - - - SLAKI - SLAKI - 4 - 1 - read-write - - - WKUI - WKUI - 3 - 1 - read-write - - - ERRI - ERRI - 2 - 1 - read-write - - - SLAK - SLAK - 1 - 1 - read-only - - - INAK - INAK - 0 - 1 - read-only - - - - - CAN_TSR - CAN_TSR - CAN_TSR - 0x8 - 0x20 - 0x00000000 - - - LOW2 - Lowest priority flag for mailbox - 2 - 31 - 1 - read-only - - - LOW1 - Lowest priority flag for mailbox - 1 - 30 - 1 - read-only - - - LOW0 - Lowest priority flag for mailbox - 0 - 29 - 1 - read-only - - - TME2 - Lowest priority flag for mailbox - 2 - 28 - 1 - read-only - - - TME1 - Lowest priority flag for mailbox - 1 - 27 - 1 - read-only - - - TME0 - Lowest priority flag for mailbox - 0 - 26 - 1 - read-only - - - CODE - CODE - 24 - 2 - read-only - - - ABRQ2 - ABRQ2 - 23 - 1 - read-write - - - TERR2 - TERR2 - 19 - 1 - read-write - - - ALST2 - ALST2 - 18 - 1 - read-write - - - TXOK2 - TXOK2 - 17 - 1 - read-write - - - RQCP2 - RQCP2 - 16 - 1 - read-write - - - ABRQ1 - ABRQ1 - 15 - 1 - read-write - - - TERR1 - TERR1 - 11 - 1 - read-write - - - ALST1 - ALST1 - 10 - 1 - read-write - - - TXOK1 - TXOK1 - 9 - 1 - read-write - - - RQCP1 - RQCP1 - 8 - 1 - read-write - - - ABRQ0 - ABRQ0 - 7 - 1 - read-write - - - TERR0 - TERR0 - 3 - 1 - read-write - - - ALST0 - ALST0 - 2 - 1 - read-write - - - TXOK0 - TXOK0 - 1 - 1 - read-write - - - RQCP0 - RQCP0 - 0 - 1 - read-write - - - - - CAN_RF0R - CAN_RF0R - CAN_RF0R - 0xC - 0x20 - 0x00000000 - - - RFOM0 - RFOM0 - 5 - 1 - read-write - - - FOVR0 - FOVR0 - 4 - 1 - read-write - - - FULL0 - FULL0 - 3 - 1 - read-write - - - FMP0 - FMP0 - 0 - 2 - read-only - - - - - CAN_RF1R - CAN_RF1R - CAN_RF1R - 0x10 - 0x20 - 0x00000000 - - - RFOM1 - RFOM1 - 5 - 1 - read-write - - - FOVR1 - FOVR1 - 4 - 1 - read-write - - - FULL1 - FULL1 - 3 - 1 - read-write - - - FMP1 - FMP1 - 0 - 2 - read-only - - - - - CAN_IER - CAN_IER - CAN_IER - 0x14 - 0x20 - read-write - 0x00000000 - - - SLKIE - SLKIE - 17 - 1 - - - WKUIE - WKUIE - 16 - 1 - - - ERRIE - ERRIE - 15 - 1 - - - LECIE - LECIE - 11 - 1 - - - BOFIE - BOFIE - 10 - 1 - - - EPVIE - EPVIE - 9 - 1 - - - EWGIE - EWGIE - 8 - 1 - - - FOVIE1 - FOVIE1 - 6 - 1 - - - FFIE1 - FFIE1 - 5 - 1 - - - FMPIE1 - FMPIE1 - 4 - 1 - - - FOVIE0 - FOVIE0 - 3 - 1 - - - FFIE0 - FFIE0 - 2 - 1 - - - FMPIE0 - FMPIE0 - 1 - 1 - - - TMEIE - TMEIE - 0 - 1 - - - - - CAN_ESR - CAN_ESR - CAN_ESR - 0x18 - 0x20 - 0x00000000 - - - REC - REC - 24 - 8 - read-only - - - TEC - TEC - 16 - 8 - read-only - - - LEC - LEC - 4 - 3 - read-write - - - BOFF - BOFF - 2 - 1 - read-only - - - EPVF - EPVF - 1 - 1 - read-only - - - EWGF - EWGF - 0 - 1 - read-only - - - - - CAN_BTR - CAN_BTR - CAN_BTR - 0x1C - 0x20 - read-write - 0x00000000 - - - SILM - SILM - 31 - 1 - - - LBKM - LBKM - 30 - 1 - - - SJW - SJW - 24 - 2 - - - TS2 - TS2 - 20 - 3 - - - TS1 - TS1 - 16 - 4 - - - BRP - BRP - 0 - 10 - - - - - CAN_TI0R - CAN_TI0R - CAN_TI0R - 0x180 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT0R - CAN_TDT0R - CAN_TDT0R - 0x184 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL0R - CAN_TDL0R - CAN_TDL0R - 0x188 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH0R - CAN_TDH0R - CAN_TDH0R - 0x18C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_TI1R - CAN_TI1R - CAN_TI1R - 0x190 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT1R - CAN_TDT1R - CAN_TDT1R - 0x194 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL1R - CAN_TDL1R - CAN_TDL1R - 0x198 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH1R - CAN_TDH1R - CAN_TDH1R - 0x19C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_TI2R - CAN_TI2R - CAN_TI2R - 0x1A0 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT2R - CAN_TDT2R - CAN_TDT2R - 0x1A4 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL2R - CAN_TDL2R - CAN_TDL2R - 0x1A8 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH2R - CAN_TDH2R - CAN_TDH2R - 0x1AC - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_RI0R - CAN_RI0R - CAN_RI0R - 0x1B0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - CAN_RDT0R - CAN_RDT0R - CAN_RDT0R - 0x1B4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - CAN_RDL0R - CAN_RDL0R - CAN_RDL0R - 0x1B8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_RDH0R - CAN_RDH0R - CAN_RDH0R - 0x1BC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_RI1R - CAN_RI1R - CAN_RI1R - 0x1C0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - CAN_RDT1R - CAN_RDT1R - CAN_RDT1R - 0x1C4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - CAN_RDL1R - CAN_RDL1R - CAN_RDL1R - 0x1C8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_RDH1R - CAN_RDH1R - CAN_RDH1R - 0x1CC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_FMR - CAN_FMR - CAN_FMR - 0x200 - 0x20 - read-write - 0x00000000 - - - CAN2SB - CAN2SB - 8 - 6 - - - FINIT - FINIT - 0 - 1 - - - - - CAN_FM1R - CAN_FM1R - CAN_FM1R - 0x204 - 0x20 - read-write - 0x00000000 - - - FBM0 - Filter mode - 0 - 1 - - - FBM1 - Filter mode - 1 - 1 - - - FBM2 - Filter mode - 2 - 1 - - - FBM3 - Filter mode - 3 - 1 - - - FBM4 - Filter mode - 4 - 1 - - - FBM5 - Filter mode - 5 - 1 - - - FBM6 - Filter mode - 6 - 1 - - - FBM7 - Filter mode - 7 - 1 - - - FBM8 - Filter mode - 8 - 1 - - - FBM9 - Filter mode - 9 - 1 - - - FBM10 - Filter mode - 10 - 1 - - - FBM11 - Filter mode - 11 - 1 - - - FBM12 - Filter mode - 12 - 1 - - - FBM13 - Filter mode - 13 - 1 - - - FBM14 - Filter mode - 14 - 1 - - - FBM15 - Filter mode - 15 - 1 - - - FBM16 - Filter mode - 16 - 1 - - - FBM17 - Filter mode - 17 - 1 - - - FBM18 - Filter mode - 18 - 1 - - - FBM19 - Filter mode - 19 - 1 - - - FBM20 - Filter mode - 20 - 1 - - - FBM21 - Filter mode - 21 - 1 - - - FBM22 - Filter mode - 22 - 1 - - - FBM23 - Filter mode - 23 - 1 - - - FBM24 - Filter mode - 24 - 1 - - - FBM25 - Filter mode - 25 - 1 - - - FBM26 - Filter mode - 26 - 1 - - - FBM27 - Filter mode - 27 - 1 - - - - - CAN_FS1R - CAN_FS1R - CAN_FS1R - 0x20C - 0x20 - read-write - 0x00000000 - - - FSC0 - Filter scale configuration - 0 - 1 - - - FSC1 - Filter scale configuration - 1 - 1 - - - FSC2 - Filter scale configuration - 2 - 1 - - - FSC3 - Filter scale configuration - 3 - 1 - - - FSC4 - Filter scale configuration - 4 - 1 - - - FSC5 - Filter scale configuration - 5 - 1 - - - FSC6 - Filter scale configuration - 6 - 1 - - - FSC7 - Filter scale configuration - 7 - 1 - - - FSC8 - Filter scale configuration - 8 - 1 - - - FSC9 - Filter scale configuration - 9 - 1 - - - FSC10 - Filter scale configuration - 10 - 1 - - - FSC11 - Filter scale configuration - 11 - 1 - - - FSC12 - Filter scale configuration - 12 - 1 - - - FSC13 - Filter scale configuration - 13 - 1 - - - FSC14 - Filter scale configuration - 14 - 1 - - - FSC15 - Filter scale configuration - 15 - 1 - - - FSC16 - Filter scale configuration - 16 - 1 - - - FSC17 - Filter scale configuration - 17 - 1 - - - FSC18 - Filter scale configuration - 18 - 1 - - - FSC19 - Filter scale configuration - 19 - 1 - - - FSC20 - Filter scale configuration - 20 - 1 - - - FSC21 - Filter scale configuration - 21 - 1 - - - FSC22 - Filter scale configuration - 22 - 1 - - - FSC23 - Filter scale configuration - 23 - 1 - - - FSC24 - Filter scale configuration - 24 - 1 - - - FSC25 - Filter scale configuration - 25 - 1 - - - FSC26 - Filter scale configuration - 26 - 1 - - - FSC27 - Filter scale configuration - 27 - 1 - - - - - CAN_FFA1R - CAN_FFA1R - CAN_FFA1R - 0x214 - 0x20 - read-write - 0x00000000 - - - FFA0 - Filter FIFO assignment for filter - 0 - 0 - 1 - - - FFA1 - Filter FIFO assignment for filter - 1 - 1 - 1 - - - FFA2 - Filter FIFO assignment for filter - 2 - 2 - 1 - - - FFA3 - Filter FIFO assignment for filter - 3 - 3 - 1 - - - FFA4 - Filter FIFO assignment for filter - 4 - 4 - 1 - - - FFA5 - Filter FIFO assignment for filter - 5 - 5 - 1 - - - FFA6 - Filter FIFO assignment for filter - 6 - 6 - 1 - - - FFA7 - Filter FIFO assignment for filter - 7 - 7 - 1 - - - FFA8 - Filter FIFO assignment for filter - 8 - 8 - 1 - - - FFA9 - Filter FIFO assignment for filter - 9 - 9 - 1 - - - FFA10 - Filter FIFO assignment for filter - 10 - 10 - 1 - - - FFA11 - Filter FIFO assignment for filter - 11 - 11 - 1 - - - FFA12 - Filter FIFO assignment for filter - 12 - 12 - 1 - - - FFA13 - Filter FIFO assignment for filter - 13 - 13 - 1 - - - FFA14 - Filter FIFO assignment for filter - 14 - 14 - 1 - - - FFA15 - Filter FIFO assignment for filter - 15 - 15 - 1 - - - FFA16 - Filter FIFO assignment for filter - 16 - 16 - 1 - - - FFA17 - Filter FIFO assignment for filter - 17 - 17 - 1 - - - FFA18 - Filter FIFO assignment for filter - 18 - 18 - 1 - - - FFA19 - Filter FIFO assignment for filter - 19 - 19 - 1 - - - FFA20 - Filter FIFO assignment for filter - 20 - 20 - 1 - - - FFA21 - Filter FIFO assignment for filter - 21 - 21 - 1 - - - FFA22 - Filter FIFO assignment for filter - 22 - 22 - 1 - - - FFA23 - Filter FIFO assignment for filter - 23 - 23 - 1 - - - FFA24 - Filter FIFO assignment for filter - 24 - 24 - 1 - - - FFA25 - Filter FIFO assignment for filter - 25 - 25 - 1 - - - FFA26 - Filter FIFO assignment for filter - 26 - 26 - 1 - - - FFA27 - Filter FIFO assignment for filter - 27 - 27 - 1 - - - - - CAN_FA1R - CAN_FA1R - CAN_FA1R - 0x21C - 0x20 - read-write - 0x00000000 - - - FACT0 - Filter active - 0 - 1 - - - FACT1 - Filter active - 1 - 1 - - - FACT2 - Filter active - 2 - 1 - - - FACT3 - Filter active - 3 - 1 - - - FACT4 - Filter active - 4 - 1 - - - FACT5 - Filter active - 5 - 1 - - - FACT6 - Filter active - 6 - 1 - - - FACT7 - Filter active - 7 - 1 - - - FACT8 - Filter active - 8 - 1 - - - FACT9 - Filter active - 9 - 1 - - - FACT10 - Filter active - 10 - 1 - - - FACT11 - Filter active - 11 - 1 - - - FACT12 - Filter active - 12 - 1 - - - FACT13 - Filter active - 13 - 1 - - - FACT14 - Filter active - 14 - 1 - - - FACT15 - Filter active - 15 - 1 - - - FACT16 - Filter active - 16 - 1 - - - FACT17 - Filter active - 17 - 1 - - - FACT18 - Filter active - 18 - 1 - - - FACT19 - Filter active - 19 - 1 - - - FACT20 - Filter active - 20 - 1 - - - FACT21 - Filter active - 21 - 1 - - - FACT22 - Filter active - 22 - 1 - - - FACT23 - Filter active - 23 - 1 - - - FACT24 - Filter active - 24 - 1 - - - FACT25 - Filter active - 25 - 1 - - - FACT26 - Filter active - 26 - 1 - - - FACT27 - Filter active - 27 - 1 - - - - - F0R1 - F0R1 - Filter bank 0 register 1 - 0x240 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F0R2 - F0R2 - Filter bank 0 register 2 - 0x244 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R1 - F1R1 - Filter bank 1 register 1 - 0x248 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R2 - F1R2 - Filter bank 1 register 2 - 0x24C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R1 - F2R1 - Filter bank 2 register 1 - 0x250 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R2 - F2R2 - Filter bank 2 register 2 - 0x254 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R1 - F3R1 - Filter bank 3 register 1 - 0x258 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R2 - F3R2 - Filter bank 3 register 2 - 0x25C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R1 - F4R1 - Filter bank 4 register 1 - 0x260 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R2 - F4R2 - Filter bank 4 register 2 - 0x264 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R1 - F5R1 - Filter bank 5 register 1 - 0x268 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R2 - F5R2 - Filter bank 5 register 2 - 0x26C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R1 - F6R1 - Filter bank 6 register 1 - 0x270 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R2 - F6R2 - Filter bank 6 register 2 - 0x274 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R1 - F7R1 - Filter bank 7 register 1 - 0x278 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R2 - F7R2 - Filter bank 7 register 2 - 0x27C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R1 - F8R1 - Filter bank 8 register 1 - 0x280 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R2 - F8R2 - Filter bank 8 register 2 - 0x284 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R1 - F9R1 - Filter bank 9 register 1 - 0x288 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R2 - F9R2 - Filter bank 9 register 2 - 0x28C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R1 - F10R1 - Filter bank 10 register 1 - 0x290 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R2 - F10R2 - Filter bank 10 register 2 - 0x294 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R1 - F11R1 - Filter bank 11 register 1 - 0x298 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R2 - F11R2 - Filter bank 11 register 2 - 0x29C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R1 - F12R1 - Filter bank 4 register 1 - 0x2A0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R2 - F12R2 - Filter bank 12 register 2 - 0x2A4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R1 - F13R1 - Filter bank 13 register 1 - 0x2A8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R2 - F13R2 - Filter bank 13 register 2 - 0x2AC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 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- - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R2 - F14R2 - Filter bank 14 register 2 - 0x2B4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R1 - F15R1 - Filter bank 15 register 1 - 0x2B8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R2 - F15R2 - Filter bank 15 register 2 - 0x2BC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R1 - F16R1 - Filter bank 16 register 1 - 0x2C0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R2 - F16R2 - Filter bank 16 register 2 - 0x2C4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R1 - F17R1 - Filter bank 17 register 1 - 0x2C8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R2 - F17R2 - Filter bank 17 register 2 - 0x2CC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R1 - F18R1 - Filter bank 18 register 1 - 0x2D0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R2 - F18R2 - Filter bank 18 register 2 - 0x2D4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R1 - F19R1 - Filter bank 19 register 1 - 0x2D8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R2 - F19R2 - Filter bank 19 register 2 - 0x2DC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R1 - F20R1 - Filter bank 20 register 1 - 0x2E0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R2 - F20R2 - Filter bank 20 register 2 - 0x2E4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R1 - F21R1 - Filter bank 21 register 1 - 0x2E8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R2 - F21R2 - Filter bank 21 register 2 - 0x2EC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R1 - F22R1 - Filter bank 22 register 1 - 0x2F0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R2 - F22R2 - Filter bank 22 register 2 - 0x2F4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R1 - F23R1 - Filter bank 23 register 1 - 0x2F8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R2 - F23R2 - Filter bank 23 register 2 - 0x2FC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R1 - F24R1 - Filter bank 24 register 1 - 0x300 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R2 - F24R2 - Filter bank 24 register 2 - 0x304 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R1 - F25R1 - Filter bank 25 register 1 - 0x308 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R2 - F25R2 - Filter bank 25 register 2 - 0x30C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R1 - F26R1 - Filter bank 26 register 1 - 0x310 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R2 - F26R2 - Filter bank 26 register 2 - 0x314 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R1 - F27R1 - Filter bank 27 register 1 - 0x318 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R2 - F27R2 - Filter bank 27 register 2 - 0x31C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - - - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.depend b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.depend deleted file mode 100644 index 3afddcd6..00000000 --- a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.depend +++ /dev/null @@ -1,569 +0,0 @@ -# depslib dependency file v1.0 -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_adc.c - "stm32f0xx_adc.h" - "stm32f0xx_rcc.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_adc.h - "stm32f0xx.h" - -1417710862 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\stm32f0xx.h - "core_cm0.h" - "system_stm32f0xx.h" - - "stm32f0xx_conf.h" - -1417516674 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\cmsis\core_cm0.h - - - - -1417516674 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\cmsis\core_cminstr.h - - - -1417516674 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\cmsis\core_cmfunc.h - - - -1417714462 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\system_stm32f0xx.h - -1417516578 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\stm32f0xx_conf.h - "stm32f0xx_adc.h" - "stm32f0xx_can.h" - "stm32f0xx_cec.h" - "stm32f0xx_comp.h" - "stm32f0xx_crc.h" - "stm32f0xx_crs.h" - "stm32f0xx_dac.h" - "stm32f0xx_dbgmcu.h" - "stm32f0xx_dma.h" - "stm32f0xx_exti.h" - "stm32f0xx_flash.h" - "stm32f0xx_gpio.h" - "stm32f0xx_i2c.h" - "stm32f0xx_iwdg.h" - "stm32f0xx_pwr.h" - "stm32f0xx_rcc.h" - "stm32f0xx_rtc.h" - "stm32f0xx_spi.h" - "stm32f0xx_syscfg.h" - "stm32f0xx_tim.h" - "stm32f0xx_usart.h" - "stm32f0xx_wwdg.h" - "stm32f0xx_misc.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_can.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_cec.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_comp.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_crc.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_crs.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_dac.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_dbgmcu.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_dma.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_exti.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_flash.h - "stm32f0xx.h" - -1417710865 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source:c:\work\software\openblt\target\source\armcm0_stm32f0\gcc\cstart.s - -1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\nvm.c - "boot.h" - "flash.h" - -1495810634 c:\work\software\openblt\target\source\armcm0_stm32f0\flash.h - -1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\timer.c - "boot.h" - "stm32f0xx.h" - -1495810634 source:c:\work\software\openblt\target\source\armcm0_stm32f0\uart.c - "boot.h" - "stm32f0xx.h" - -1495810634 source:c:\work\software\openblt\target\source\assert.c - "boot.h" - -1495810633 source:c:\work\software\openblt\target\source\backdoor.c - "boot.h" - -1495810634 source:c:\work\software\openblt\target\source\boot.c - "boot.h" - -1495810633 source:c:\work\software\openblt\target\source\com.c - "boot.h" - "can.h" - "uart.h" - "usb.h" - "net.h" - -1495810632 c:\work\software\openblt\target\source\can.h - -1495810634 c:\work\software\openblt\target\source\uart.h - -1495810633 c:\work\software\openblt\target\source\usb.h - -1495810633 c:\work\software\openblt\target\source\net.h - -1495810633 source:c:\work\software\openblt\target\source\cop.c - "boot.h" - -1495810634 source:c:\work\software\openblt\target\source\file.c - "boot.h" - - - -1495810633 source:c:\work\software\openblt\target\source\net.c - "boot.h" - "netdev.h" - "uip.h" - "uip_arp.h" - -1495810633 source:c:\work\software\openblt\target\source\xcp.c - "boot.h" - -1499942243 source:c:\work\software\openblt\target\source\armcm0_stm32f0\can.c - "boot.h" - "stm32f0xx.h" - -1499943437 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\boot\startup_stm32f0xx.s - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.ebp b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.ebp deleted file mode 100644 index 954db928..00000000 --- a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.ebp +++ /dev/null @@ -1,410 +0,0 @@ - - - - - - - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.elay b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.elay deleted file mode 100644 index 4b2c968e..00000000 --- a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/ide/stm32f091.elay +++ /dev/null @@ -1,109 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/lib/newlib/_exit.c b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/lib/newlib/_exit.c new file mode 100644 index 00000000..4ae9532c --- /dev/null +++ b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/lib/newlib/_exit.c @@ -0,0 +1,38 @@ +// ---------------------------------------------------------------------------- + +#include + +// ---------------------------------------------------------------------------- + +// Forward declaration + +void +_exit(int code); + +// ---------------------------------------------------------------------------- + +// We just enter an infinite loop, to be used as landmark when halting +// the debugger. +// +// It can be redefined in the application, if more functionality +// is required. + +void +__attribute__((weak)) +_exit(int code __attribute__((unused))) +{ + // TODO: write on trace + while (1) + ; +} + +// ---------------------------------------------------------------------------- + +void +__attribute__((weak,noreturn)) +abort(void) +{ + _exit(1); +} + +// ---------------------------------------------------------------------------- diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/makefile b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/makefile new file mode 100644 index 00000000..b69f40ee --- /dev/null +++ b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/makefile @@ -0,0 +1,174 @@ +#**************************************************************************************** +#| Description: Makefile for GNU ARM Embedded toolchain. +#| File Name: makefile +#| +#|--------------------------------------------------------------------------------------- +#| C O P Y R I G H T +#|--------------------------------------------------------------------------------------- +#| Copyright (c) 2017 by Feaser http://www.feaser.com All rights reserved +#| +#|--------------------------------------------------------------------------------------- +#| L I C E N S E +#|--------------------------------------------------------------------------------------- +#| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or +#| modify it under the terms of the GNU General Public License as published by the Free +#| Software Foundation, either version 3 of the License, or (at your option) any later +#| version. +#| +#| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; +#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +#| PURPOSE. See the GNU General Public License for more details. +#| +#| You have received a copy of the GNU General Public License along with OpenBLT. It +#| should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy. +#| +#**************************************************************************************** +SHELL = sh + +#|--------------------------------------------------------------------------------------| +#| Configure project name | +#|--------------------------------------------------------------------------------------| +PROJ_NAME=openblt_stm32f091 + + +#|--------------------------------------------------------------------------------------| +#| Configure tool path | +#|--------------------------------------------------------------------------------------| +TOOL_PATH=/opt/gcc-arm-none-eabi-5_4-2016q3/bin/ + + +#|--------------------------------------------------------------------------------------| +#| Collect project files | +#|--------------------------------------------------------------------------------------| +# Recursive wildcard function implementation. Example usages: +# $(call rwildcard, , *.c *.h) +# --> Returns all *.c and *.h files in the current directory and below +# $(call rwildcard, /lib/, *.c) +# --> Returns all *.c files in the /lib directory and below +rwildcard = $(strip $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d))) + +# Collect all application files in the current directory and its subdirectories, but +# exclude flash-layout.c as this one is directly included in a source file, when used. +PROJ_FILES = $(filter-out flash_layout.c, $(call rwildcard, , *.c *.h *.S)) +# Collect bootloader core files +PROJ_FILES += $(wildcard ../../../Source/*.c) +PROJ_FILES += $(wildcard ../../../Source/*.h) +# Collect bootloader port files +PROJ_FILES += $(wildcard ../../../Source/ARMCM0_STM32F0/*.c) +PROJ_FILES += $(wildcard ../../../Source/ARMCM0_STM32F0/*.h) +# Collect bootloader port compiler specific files +PROJ_FILES += $(wildcard ../../../Source/ARMCM0_STM32F0/GCC/*.c) +PROJ_FILES += $(wildcard ../../../Source/ARMCM0_STM32F0/GCC/*.h) + + +#|--------------------------------------------------------------------------------------| +#| Toolchain binaries | +#|--------------------------------------------------------------------------------------| +RM = rm +CC = $(TOOL_PATH)arm-none-eabi-gcc +LN = $(TOOL_PATH)arm-none-eabi-gcc +OC = $(TOOL_PATH)arm-none-eabi-objcopy +OD = $(TOOL_PATH)arm-none-eabi-objdump +AS = $(TOOL_PATH)arm-none-eabi-gcc +SZ = $(TOOL_PATH)arm-none-eabi-size + + +#|--------------------------------------------------------------------------------------| +#| Filter project files +#|--------------------------------------------------------------------------------------| +PROJ_ASRCS = $(filter %.S,$(foreach file,$(PROJ_FILES),$(notdir $(file)))) +PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file)))) +PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file)))) + + +#|--------------------------------------------------------------------------------------| +#| Set important path variables | +#|--------------------------------------------------------------------------------------| +VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :) +OBJ_PATH = obj +BIN_PATH = bin +INC_PATH = $(patsubst %/,%,$(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file)))))) +LIB_PATH = + + +#|--------------------------------------------------------------------------------------| +#| Options for toolchain binaries | +#|--------------------------------------------------------------------------------------| +HEAP_SIZE = 0x0000 +STACK_SIZE = 0x0100 +STDFLAGS = -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -fno-strict-aliasing +STDFLAGS += -fdata-sections -ffunction-sections -Wall -g3 +OPTFLAGS = -O1 +CFLAGS = $(STDFLAGS) $(OPTFLAGS) +CFLAGS += -DSTM32F091 -DUSE_STDPERIPH_DRIVER +CFLAGS += -D__HEAP_SIZE=$(HEAP_SIZE) -D__STACK_SIZE=$(STACK_SIZE) +CFLAGS += $(INC_PATH) +AFLAGS = $(CFLAGS) +LFLAGS = $(STDFLAGS) $(OPTFLAGS) +LFLAGS += -Wl,--defsym=__HEAP_SIZE=$(HEAP_SIZE) -Wl,--defsym=__STACK_SIZE=$(STACK_SIZE) +LFLAGS += -Wl,-script="stm32f091rc_flash.ld" -Wl,-Map=$(BIN_PATH)/$(PROJ_NAME).map +LFLAGS += -specs=nano.specs -Wl,--gc-sections $(LIB_PATH) +OFLAGS = -O srec +ODFLAGS = -x +SZFLAGS = -B -d +RMFLAGS = -f + + +#|--------------------------------------------------------------------------------------| +#| Specify library files | +#|--------------------------------------------------------------------------------------| +LIBS = + + +#|--------------------------------------------------------------------------------------| +#| Define targets | +#|--------------------------------------------------------------------------------------| +AOBJS = $(patsubst %.S,%.o,$(PROJ_ASRCS)) +COBJS = $(patsubst %.c,%.o,$(PROJ_CSRCS)) + + +#|--------------------------------------------------------------------------------------| +#| Make ALL | +#|--------------------------------------------------------------------------------------| +.PHONY: all +all: $(BIN_PATH)/$(PROJ_NAME).srec + + +$(BIN_PATH)/$(PROJ_NAME).srec : $(BIN_PATH)/$(PROJ_NAME).elf + @$(OC) $< $(OFLAGS) $@ + @$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map + @echo +++ Summary of memory consumption: + @$(SZ) $(SZFLAGS) $< + @echo +++ Build complete [$(notdir $@)] + +$(BIN_PATH)/$(PROJ_NAME).elf : $(AOBJS) $(COBJS) + @echo +++ Linking [$(notdir $@)] + @$(LN) $(LFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)/%.o,$(^F)) $(LIBS) + + +#|--------------------------------------------------------------------------------------| +#| Compile and assemble | +#|--------------------------------------------------------------------------------------| +$(AOBJS): %.o: %.S $(PROJ_CHDRS) + @echo +++ Assembling [$(notdir $<)] + @$(AS) $(AFLAGS) -c $< -o $(OBJ_PATH)/$(@F) + +$(COBJS): %.o: %.c $(PROJ_CHDRS) + @echo +++ Compiling [$(notdir $<)] + @$(CC) $(CFLAGS) -c $< -o $(OBJ_PATH)/$(@F) + + +#|--------------------------------------------------------------------------------------| +#| Make CLEAN | +#|--------------------------------------------------------------------------------------| +.PHONY: clean +clean: + @echo +++ Cleaning build environment + @$(RM) $(RMFLAGS) $(foreach file,$(AOBJS),$(OBJ_PATH)/$(file)) + @$(RM) $(RMFLAGS) $(foreach file,$(COBJS),$(OBJ_PATH)/$(file)) + @$(RM) $(RMFLAGS) $(patsubst %.o,%.lst,$(foreach file,$(COBJS),$(OBJ_PATH)/$(file))) + @$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).elf $(BIN_PATH)/$(PROJ_NAME).map + @$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).srec + @echo +++ Clean complete + + diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/cfg/stm32f091rc_flash.ld b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Boot/stm32f091rc_flash.ld similarity index 100% rename from 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(0x4) - 0x2000013c __data_end__ = . - -.jcr 0x2000013c 0x0 load address 0x080030a8 - .jcr 0x2000013c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o - -.igot.plt 0x2000013c 0x0 load address 0x080030a8 - .igot.plt 0x2000013c 0x0 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o - -.bss 0x2000013c 0x70 load address 0x080030a8 - 0x2000013c __bss_start__ = . - *(.bss*) - .bss 0x2000013c 0x1c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o - .bss.xcpCtoReqPacket.6496 - 0x20000158 0x41 ..\obj\boot.o - .bss.xcpCtoRxLength.6497 - 0x20000199 0x1 ..\obj\boot.o - .bss.xcpCtoRxInProgress.6498 - 0x2000019a 0x1 ..\obj\boot.o - *fill* 0x2000019b 0x1 - .bss.xcpCtoRxStartTime.6499 - 0x2000019c 0x4 ..\obj\boot.o - .bss.timer_counter_last.6477 - 0x200001a0 0x4 ..\obj\led.o - .bss.led_toggle_state.6476 - 0x200001a4 0x1 ..\obj\led.o - *fill* 0x200001a5 0x3 - .bss.millisecond_counter - 0x200001a8 0x4 ..\obj\timer.o - *(COMMON) - 0x200001ac __bss_end__ = . - -.heap 0x200001b0 0x0 - 0x200001b0 __end__ = . - 0x200001b0 end = __end__ - *(.heap*) - .heap 0x200001b0 0x0 ..\obj\startup_stm32f0xx.o - 0x200001b0 __HeapLimit = . - -.stack_dummy 0x200001b0 0x100 - *(.stack) - .stack 0x200001b0 0x100 ..\obj\startup_stm32f0xx.o - 0x20008000 __StackTop = (ORIGIN (RAM) + LENGTH (RAM)) - 0x20007f00 __StackLimit = (__StackTop - SIZEOF (.stack_dummy)) - 0x20008000 PROVIDE (__stack, __StackTop) - 0x00000001 ASSERT ((__StackLimit >= __HeapLimit), region RAM overflowed with stack) -LOAD ..\obj\boot.o -LOAD ..\obj\led.o -LOAD ..\obj\lib\spl\src\stm32f0xx_adc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_can.o -LOAD ..\obj\lib\spl\src\stm32f0xx_cec.o -LOAD ..\obj\lib\spl\src\stm32f0xx_comp.o -LOAD ..\obj\lib\spl\src\stm32f0xx_crc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_crs.o -LOAD ..\obj\lib\spl\src\stm32f0xx_dac.o -LOAD ..\obj\lib\spl\src\stm32f0xx_dbgmcu.o -LOAD ..\obj\lib\spl\src\stm32f0xx_dma.o -LOAD ..\obj\lib\spl\src\stm32f0xx_exti.o -LOAD ..\obj\lib\spl\src\stm32f0xx_flash.o -LOAD ..\obj\lib\spl\src\stm32f0xx_gpio.o -LOAD ..\obj\lib\spl\src\stm32f0xx_i2c.o -LOAD ..\obj\lib\spl\src\stm32f0xx_iwdg.o -LOAD ..\obj\lib\spl\src\stm32f0xx_misc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_pwr.o -LOAD ..\obj\lib\spl\src\stm32f0xx_rcc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_rtc.o -LOAD ..\obj\lib\spl\src\stm32f0xx_spi.o -LOAD ..\obj\lib\spl\src\stm32f0xx_syscfg.o -LOAD ..\obj\lib\spl\src\stm32f0xx_tim.o -LOAD ..\obj\lib\spl\src\stm32f0xx_usart.o -LOAD ..\obj\lib\spl\src\stm32f0xx_wwdg.o -LOAD ..\obj\lib\system_stm32f0xx.o -LOAD ..\obj\main.o -LOAD ..\obj\startup_stm32f0xx.o -LOAD ..\obj\timer.o -START GROUP -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libc_n.a -END GROUP -START GROUP -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m\libgcc.a -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libc_n.a -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libnosys_s.a -END GROUP -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtend.o -LOAD c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o -OUTPUT(..\bin\demoprog_stm32f091.elf elf32-littlearm) - -.ARM.attributes - 0x00000000 0x28 - .ARM.attributes - 0x00000000 0x1e c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o - .ARM.attributes - 0x0000001e 0x2c c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtbegin.o - .ARM.attributes - 0x0000004a 0x1b c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/crt0.o - .ARM.attributes - 0x00000065 0x31 ..\obj\boot.o - .ARM.attributes - 0x00000096 0x31 ..\obj\led.o - .ARM.attributes - 0x000000c7 0x31 ..\obj\lib\spl\src\stm32f0xx_can.o - .ARM.attributes - 0x000000f8 0x31 ..\obj\lib\spl\src\stm32f0xx_gpio.o - .ARM.attributes - 0x00000129 0x31 ..\obj\lib\spl\src\stm32f0xx_rcc.o - .ARM.attributes - 0x0000015a 0x31 ..\obj\lib\spl\src\stm32f0xx_usart.o - .ARM.attributes - 0x0000018b 0x31 ..\obj\lib\system_stm32f0xx.o - .ARM.attributes - 0x000001bc 0x31 ..\obj\main.o - .ARM.attributes - 0x000001ed 0x1b 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(x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-init.o) - .debug_frame 0x00000bc8 0x28 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-memcpy-stub.o) - .debug_frame 0x00000bf0 0x20 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libg_n.a(lib_a-memset.o) - .debug_frame 0x00000c10 0x20 c:/program files (x86)/embitz/1.00/share/em_armgcc/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m\libnosys_s.a(_exit.o) + +bin/demoprog_stm32f091.elf: file format elf32-littlearm +bin/demoprog_stm32f091.elf +architecture: arm, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x08002000 + +Program Header: +0x70000001 off 0x00002fa8 vaddr 0x08002fa8 paddr 0x08002fa8 align 2**2 + filesz 0x00000008 memsz 0x00000008 flags r-- + LOAD off 0x00000000 vaddr 0x08000000 paddr 0x08000000 align 2**16 + filesz 0x00002fb0 memsz 0x00002fb0 flags r-x + LOAD off 0x000100c0 vaddr 0x200000c0 paddr 0x08002fb0 align 2**16 + filesz 0x0000007c memsz 0x000000ec flags rw- +private flags = 5000200: [Version5 EABI] [soft-float ABI] + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text 00000fa8 08002000 08002000 00002000 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .ARM.exidx 00000008 08002fa8 08002fa8 00002fa8 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 2 .data 0000007c 200000c0 08002fb0 000100c0 2**2 + CONTENTS, ALLOC, LOAD, DATA + 3 .bss 00000070 2000013c 0800302c 0001013c 2**2 + ALLOC + 4 .stack_dummy 00000100 200001b0 200001b0 00010140 2**3 + CONTENTS, READONLY + 5 .ARM.attributes 00000028 00000000 00000000 00010240 2**0 + CONTENTS, READONLY + 6 .comment 0000006e 00000000 00000000 00010268 2**0 + CONTENTS, READONLY + 7 .debug_line 000034b7 00000000 00000000 000102d6 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_info 00004b96 00000000 00000000 0001378d 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_abbrev 000010a7 00000000 00000000 00018323 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_aranges 00000588 00000000 00000000 000193d0 2**3 + CONTENTS, READONLY, DEBUGGING + 11 .debug_loc 000022ba 00000000 00000000 00019958 2**0 + CONTENTS, READONLY, DEBUGGING + 12 .debug_ranges 00000550 00000000 00000000 0001bc12 2**0 + CONTENTS, READONLY, DEBUGGING + 13 .debug_macro 0000d5b0 00000000 00000000 0001c162 2**0 + CONTENTS, READONLY, DEBUGGING + 14 .debug_str 0004e982 00000000 00000000 00029712 2**0 + CONTENTS, READONLY, DEBUGGING + 15 .debug_frame 00000b50 00000000 00000000 00078094 2**2 + CONTENTS, READONLY, DEBUGGING +SYMBOL TABLE: +08002000 l d .text 00000000 .text +08002fa8 l d .ARM.exidx 00000000 .ARM.exidx +200000c0 l d .data 00000000 .data +2000013c l d .bss 00000000 .bss +200001b0 l d .stack_dummy 00000000 .stack_dummy +00000000 l d .ARM.attributes 00000000 .ARM.attributes +00000000 l d .comment 00000000 .comment +00000000 l d .debug_line 00000000 .debug_line +00000000 l d .debug_info 00000000 .debug_info +00000000 l d .debug_abbrev 00000000 .debug_abbrev +00000000 l d .debug_aranges 00000000 .debug_aranges +00000000 l d .debug_loc 00000000 .debug_loc +00000000 l d .debug_ranges 00000000 .debug_ranges +00000000 l d .debug_macro 00000000 .debug_macro +00000000 l d .debug_str 00000000 .debug_str +00000000 l d .debug_frame 00000000 .debug_frame +00000000 l df *ABS* 00000000 obj/startup_stm32f0xx.o +00000100 l *ABS* 00000000 Stack_Size +00000000 l *ABS* 00000000 Heap_Size +080021b6 l .text 00000000 .flash_to_ram_loop_end +080021ac l .text 00000000 .flash_to_ram_loop +080021e4 l .text 00000000 .fill_zero_bss +080021e0 l .text 00000000 .loop_zero_bss +00000000 l df *ABS* 00000000 crtstuff.c +08002fa4 l O .text 00000000 __EH_FRAME_BEGIN__ +080020c4 l F .text 00000000 __do_global_dtors_aux +2000013c l .bss 00000000 completed.8603 +20000138 l O .data 00000000 __do_global_dtors_aux_fini_array_entry +080020ec l F .text 00000000 frame_dummy +20000140 l .bss 00000000 object.8608 +20000134 l O .data 00000000 __frame_dummy_init_array_entry +00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/crt0.o +00000000 l df *ABS* 00000000 boot.c +08002244 l F .text 00000024 UartReceiveByte +20000158 l O .bss 00000041 xcpCtoReqPacket.6496 +20000199 l O .bss 00000001 xcpCtoRxLength.6497 +2000019a l O .bss 00000001 xcpCtoRxInProgress.6498 +08002f7c l O .text 00000024 canTiming +2000019c l O .bss 00000004 xcpCtoRxStartTime.6499 +00000000 l df *ABS* 00000000 main.c +00000000 l df *ABS* 00000000 led.c +200001a0 l O .bss 00000004 timer_counter_last.6477 +200001a4 l O .bss 00000001 led_toggle_state.6476 +00000000 l df *ABS* 00000000 timer.c +200001a8 l O .bss 00000004 millisecond_counter +00000000 l df *ABS* 00000000 _exit.c +00000000 l df *ABS* 00000000 stm32f0xx_can.c +00000000 l df *ABS* 00000000 stm32f0xx_rcc.c +200000c0 l O .data 00000010 APBAHBPrescTable +00000000 l df *ABS* 00000000 stm32f0xx_usart.c +00000000 l df *ABS* 00000000 stm32f0xx_gpio.c +00000000 l df *ABS* 00000000 system_stm32f0xx.c +00000000 l df *ABS* 00000000 _udivsi3.o +08002dc4 l .text 00000000 .udivsi3_skip_div0_test +00000000 l df *ABS* 00000000 _dvmd_tls.o +00000000 l df *ABS* 00000000 exit.c +00000000 l df *ABS* 00000000 init.c +00000000 l df *ABS* 00000000 memset.c +00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crti.o +00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-m/crtn.o +00000000 l df *ABS* 00000000 impure.c +200000d4 l O .data 00000060 impure_data +00000000 l df *ABS* 00000000 crtstuff.c +08002fa4 l O .text 00000000 __FRAME_END__ +00000000 l df *ABS* 00000000 +20000138 l .data 00000000 __init_array_end +20000134 l .data 00000000 __preinit_array_end +20000134 l .data 00000000 __init_array_start +20000134 l .data 00000000 __preinit_array_start +200001b0 g .stack_dummy 00000000 __HeapBase +08002ce4 g F .text 00000022 GPIO_PinAFConfig +00000000 g *ABS* 00000000 __HEAP_SIZE +200000c0 g .data 00000000 __data_start__ +08002216 w F .text 00000002 TIM1_CC_IRQHandler +080021f0 w F .text 00000002 HardFault_Handler +0800271c g F .text 000000fc CAN_FilterInit +08002212 w F .text 00000002 ADC1_COMP_IRQHandler +080025e4 g F .text 00000010 SysTick_Handler +080021fc w F .text 00000002 PVD_IRQHandler +080021f4 w F .text 00000002 PendSV_Handler +080021ee w F .text 00000002 NMI_Handler +08002fb0 g .ARM.exidx 00000000 __exidx_end +0800223a w F .text 00000002 BootRAM +08002228 w F .text 00000002 I2C1_IRQHandler +08002fb0 g .ARM.exidx 00000000 __etext +08002c28 g F .text 0000000e USART_GetFlagStatus +200000d0 g O .data 00000004 SystemCoreClock +08002c20 g F .text 00000008 USART_ReceiveData +08002dc4 g F .text 0000010a .hidden __udivsi3 +08002c38 g F .text 000000a2 GPIO_Init +200001b0 g .stack_dummy 00000000 __HeapLimit +2000013c g .bss 00000000 __bss_start__ +0800222c w F .text 00000002 SPI1_IRQHandler +08002c08 g F .text 00000018 USART_Cmd +0800221c w F .text 00000002 TIM6_DAC_IRQHandler +08002af4 g F .text 0000001c RCC_APB1PeriphClockCmd +08002fa8 g .text 00000000 __exidx_start +08002fa0 g O .text 00000004 _global_impure_ptr +08002f08 g F .text 0000004c __libc_init_array +08002234 w F .text 00000002 USART3_4_IRQHandler +08002ad8 g F .text 0000001c RCC_AHBPeriphClockCmd +08002124 g F .text 00000000 _mainCRTStartup +08002206 w F .text 00000002 EXTI2_3_IRQHandler +080025f8 g F .text 00000018 CAN_DeInit +08002f64 g F .text 00000000 _init +0800222a w F .text 00000002 I2C2_IRQHandler +080023f0 g F .text 00000018 BootActivate +08002226 w F .text 00000002 TIM17_IRQHandler +00000000 w *UND* 00000000 __libc_fini_array +080021fe w F .text 00000002 RTC_IRQHandler +0800219c g F .text 0000003c Reset_Handler +080024fc g F .text 0000003a LedInit +08002cdc g F .text 00000004 GPIO_SetBits +00000000 w *UND* 00000000 __sf_fake_stderr +00000000 w *UND* 00000000 __deregister_frame_info +200001b0 g .stack_dummy 00000000 end +2000013c g .data 00000000 __data_end__ +080028f0 g F .text 000001e8 RCC_GetClocksFreq +08002224 w F .text 00000002 TIM16_IRQHandler +08002b2c g F .text 000000dc USART_Init +200001ac g .bss 00000000 __bss_end__ +00000100 g *ABS* 00000000 __STACK_SIZE +0800221a w F .text 00000002 TIM3_IRQHandler +08002208 w F .text 00000002 EXTI4_15_IRQHandler +08002202 w F .text 00000002 RCC_IRQHandler +08002838 g F .text 0000009a CAN_Receive +00000000 w *UND* 00000000 __call_exitprocs +08002610 g F .text 0000010c CAN_Init +0800220c w F .text 00000002 DMA1_Channel1_IRQHandler +080021f8 w F .text 00000002 Default_Handler +08002124 g F .text 00000000 _start +08002818 g F .text 00000020 CAN_StructInit +08002236 w F .text 00000002 CEC_IRQHandler +08002220 w F .text 00000002 TIM14_IRQHandler +08002210 w F .text 00000002 DMA1_Channel4_5_IRQHandler +00000000 w *UND* 00000000 software_init_hook +08002ce0 g F .text 00000004 GPIO_ResetBits +0800221e w F .text 00000002 TIM7_IRQHandler +08002222 w F .text 00000002 TIM15_IRQHandler +08002204 w F .text 00000002 EXTI0_1_IRQHandler +08002238 w F .text 00000002 USB_IRQHandler +08002ed8 w F .text 00000002 .hidden __aeabi_ldiv0 +0800222e w F .text 00000002 SPI2_IRQHandler +00000000 w *UND* 00000000 __sf_fake_stdin +08002f54 g F .text 00000010 memset +08002000 g .text 000000c4 __isr_vector +080024e4 g F .text 00000018 main +08002dc4 g F .text 00000000 .hidden __aeabi_uidiv +080021f2 w F .text 00000002 SVC_Handler +00000000 w *UND* 00000000 hardware_init_hook +200001b0 g .stack_dummy 00000000 __end__ +080028d4 g F .text 0000001c CAN_MessagePending +08002268 g F .text 00000188 BootComInit +08002d08 g F .text 000000bc SystemInit +08002f70 g F .text 00000000 _fini +00000000 w *UND* 00000000 atexit +20008000 g .bss 00000000 __StackTop +0800220a w F .text 00000002 TS_IRQHandler +080021fa w F .text 00000002 WWDG_IRQHandler +08002b10 g F .text 0000001c RCC_APB1PeriphResetCmd +08002538 g F .text 00000050 LedToggle +08002218 w F .text 00000002 TIM2_IRQHandler +0800220e w F .text 00000002 DMA1_Channel2_3_IRQHandler +20008000 g *ABS* 00000000 __stack +08002ed0 g F .text 00000008 .hidden __aeabi_uidivmod +20007f00 g *ABS* 00000100 __StackLimit +08002232 w F .text 00000002 USART2_IRQHandler +08002edc g F .text 0000002c exit +00000000 w *UND* 00000000 __sf_fake_stdout +08002408 g F .text 000000dc BootComCheckActivationRequest +08002ed8 w F .text 00000002 .hidden __aeabi_idiv0 +08002200 w F .text 00000002 FLASH_IRQHandler +080025f4 w F .text 00000002 _exit +08002230 w F .text 00000002 USART1_IRQHandler +08002214 w F .text 00000002 TIM1_BRK_UP_TRG_COM_IRQHandler +080025d8 g F .text 0000000c TimerGet +00000000 w *UND* 00000000 _Jv_RegisterClasses +08002588 g F .text 00000050 TimerInit +00000000 w *UND* 00000000 __register_frame_info + + diff --git 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+S31508002FC0006CDC02000000000000000000000000A9 +S31508002FD000000000000000000000000000000000E3 +S31508002FE000000000000000000000000000000000D3 +S31508002FF000000000000000000000000000000000C3 +S3150800300000000000000000000000000000000000B2 +S3150800301000000000000000000000000000000000A2 +S3110800302000000000ED200008C520000894 S70508002000D2 diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/cfg/STM32F091x.svd b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/cfg/STM32F091x.svd deleted file mode 100644 index 2b84ea3d..00000000 --- a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/cfg/STM32F091x.svd +++ /dev/null @@ -1,31643 +0,0 @@ - - - STM32F091x - 1.0 - STM32F091x - - - 8 - - 32 - - 0x20 - 0x0 - 0xFFFFFFFF - - - CRC - cyclic redundancy check calculation - unit - CRC - 0x40023000 - - 0x0 - 0x400 - registers - - - - DR - DR - Data register - 0x0 - 0x20 - read-write - 0xFFFFFFFF - - - DR - Data register bits - 0 - 32 - - - - - IDR - IDR - Independent data register - 0x4 - 0x20 - read-write - 0x00000000 - - - IDR - General-purpose 8-bit data register - bits - 0 - 8 - - - - - CR - CR - Control register - 0x8 - 0x20 - read-write - 0x00000000 - - - RESET - reset bit - 0 - 1 - - - REV_IN - Reverse input data - 5 - 2 - - - REV_OUT - Reverse output data - 7 - 1 - - - - - INIT - INIT - Initial CRC value - 0xC - 0x20 - read-write - 0xFFFFFFFF - - - INIT - Programmable initial CRC - value - 0 - 32 - - - - - - - GPIOF - General-purpose I/Os - GPIO - 0x48001400 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x00000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bit - 15 - 15 - 1 - - - OT14 - Port x configuration bit - 14 - 14 - 1 - - - OT13 - Port x configuration bit - 13 - 13 - 1 - - - OT12 - Port x configuration bit - 12 - 12 - 1 - - - OT11 - Port x configuration bit - 11 - 11 - 1 - - - OT10 - Port x configuration bit - 10 - 10 - 1 - - - OT9 - Port x configuration bit 9 - 9 - 1 - - - OT8 - Port x configuration bit 8 - 8 - 1 - - - OT7 - Port x configuration bit 7 - 7 - 1 - - - OT6 - Port x configuration bit 6 - 6 - 1 - - - OT5 - Port x configuration bit 5 - 5 - 1 - - - OT4 - Port x configuration bit 4 - 4 - 1 - - - OT3 - Port x configuration bit 3 - 3 - 1 - - - OT2 - Port x configuration bit 2 - 2 - 1 - - - OT1 - Port x configuration bit 1 - 1 - 1 - - - OT0 - Port x configuration bit 0 - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x00000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Port x lock bit y - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - BRR - BRR - Port bit reset register - 0x28 - 0x20 - write-only - 0x00000000 - - - BR0 - Port x Reset bit y - 0 - 1 - - - BR1 - Port x Reset bit y - 1 - 1 - - - BR2 - Port x Reset bit y - 2 - 1 - - - BR3 - Port x Reset bit y - 3 - 1 - - - BR4 - Port x Reset bit y - 4 - 1 - - - BR5 - Port x Reset bit y - 5 - 1 - - - BR6 - Port x Reset bit y - 6 - 1 - - - BR7 - Port x Reset bit y - 7 - 1 - - - BR8 - Port x Reset bit y - 8 - 1 - - - BR9 - Port x Reset bit y - 9 - 1 - - - BR10 - Port x Reset bit y - 10 - 1 - - - BR11 - Port x Reset bit y - 11 - 1 - - - BR12 - Port x Reset bit y - 12 - 1 - - - BR13 - Port x Reset bit y - 13 - 1 - - - BR14 - Port x Reset bit y - 14 - 1 - - - BR15 - Port x Reset bit y - 15 - 1 - - - - - - - GPIOD - 0x48000C00 - - - GPIOC - 0x48000800 - - - GPIOB - 0x48000400 - - - GPIOE - 0x48001000 - - - GPIOA - General-purpose I/Os - GPIO - 0x48000000 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x28000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x24000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - BRR - BRR - Port bit reset register - 0x28 - 0x20 - write-only - 0x00000000 - - - BR0 - Port x Reset bit y - 0 - 1 - - - BR1 - Port x Reset bit y - 1 - 1 - - - BR2 - Port x Reset bit y - 2 - 1 - - - BR3 - Port x Reset bit y - 3 - 1 - - - BR4 - Port x Reset bit y - 4 - 1 - - - BR5 - Port x Reset bit y - 5 - 1 - - - BR6 - Port x Reset bit y - 6 - 1 - - - BR7 - Port x Reset bit y - 7 - 1 - - - BR8 - Port x Reset bit y - 8 - 1 - - - BR9 - Port x Reset bit y - 9 - 1 - - - BR10 - Port x Reset bit y - 10 - 1 - - - BR11 - Port x Reset bit y - 11 - 1 - - - BR12 - Port x Reset bit y - 12 - 1 - - - BR13 - Port x Reset bit y - 13 - 1 - - - BR14 - Port x Reset bit y - 14 - 1 - - - BR15 - Port x Reset bit y - 15 - 1 - - - - - - - SPI1 - Serial peripheral interface - SPI - 0x40013000 - - 0x0 - 0x400 - registers - - - SPI1 - SPI1_global_interrupt - 25 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - BIDIMODE - Bidirectional data mode - enable - 15 - 1 - - - BIDIOE - Output enable in bidirectional - mode - 14 - 1 - - - CRCEN - Hardware CRC calculation - enable - 13 - 1 - - - CRCNEXT - CRC transfer next - 12 - 1 - - - DFF - Data frame format - 11 - 1 - - - RXONLY - Receive only - 10 - 1 - - - SSM - Software slave management - 9 - 1 - - - SSI - Internal slave select - 8 - 1 - - - LSBFIRST - Frame format - 7 - 1 - - - SPE - SPI enable - 6 - 1 - - - BR - Baud rate control - 3 - 3 - - - MSTR - Master selection - 2 - 1 - - - CPOL - Clock polarity - 1 - 1 - - - CPHA - Clock phase - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - RXDMAEN - Rx buffer DMA enable - 0 - 1 - - - TXDMAEN - Tx buffer DMA enable - 1 - 1 - - - SSOE - SS output enable - 2 - 1 - - - NSSP - NSS pulse management - 3 - 1 - - - FRF - Frame format - 4 - 1 - - - ERRIE - Error interrupt enable - 5 - 1 - - - RXNEIE - RX buffer not empty interrupt - enable - 6 - 1 - - - TXEIE - Tx buffer empty interrupt - enable - 7 - 1 - - - DS - Data size - 8 - 4 - - - FRXTH - FIFO reception threshold - 12 - 1 - - - LDMA_RX - Last DMA transfer for - reception - 13 - 1 - - - LDMA_TX - Last DMA transfer for - transmission - 14 - 1 - - - - - SR - SR - status register - 0x8 - 0x20 - 0x0002 - - - RXNE - Receive buffer not empty - 0 - 1 - read-only - - - TXE - Transmit buffer empty - 1 - 1 - read-only - - - CHSIDE - Channel side - 2 - 1 - read-only - - - UDR - Underrun flag - 3 - 1 - read-only - - - CRCERR - CRC error flag - 4 - 1 - read-write - - - MODF - Mode fault - 5 - 1 - read-only - - - OVR - Overrun flag - 6 - 1 - read-only - - - BSY - Busy flag - 7 - 1 - read-only - - - TIFRFE - TI frame format error - 8 - 1 - read-only - - - FRLVL - FIFO reception level - 9 - 2 - read-only - - - FTLVL - FIFO transmission level - 11 - 2 - read-only - - - - - DR - DR - data register - 0xC - 0x20 - read-write - 0x0000 - - - DR - Data register - 0 - 16 - - - - - CRCPR - CRCPR - CRC polynomial register - 0x10 - 0x20 - read-write - 0x0007 - - - CRCPOLY - CRC polynomial register - 0 - 16 - - - - - RXCRCR - RXCRCR - RX CRC register - 0x14 - 0x20 - read-only - 0x0000 - - - RxCRC - Rx CRC register - 0 - 16 - - - - - TXCRCR - TXCRCR - TX CRC register - 0x18 - 0x20 - read-only - 0x0000 - - - TxCRC - Tx CRC register - 0 - 16 - - - - - I2SCFGR - I2SCFGR - I2S configuration register - 0x1C - 0x20 - read-write - 0x0000 - - - I2SMOD - I2S mode selection - 11 - 1 - - - I2SE - I2S Enable - 10 - 1 - - - I2SCFG - I2S configuration mode - 8 - 2 - - - PCMSYNC - PCM frame synchronization - 7 - 1 - - - I2SSTD - I2S standard selection - 4 - 2 - - - CKPOL - Steady state clock - polarity - 3 - 1 - - - DATLEN - Data length to be - transferred - 1 - 2 - - - CHLEN - Channel length (number of bits per audio - channel) - 0 - 1 - - - - - I2SPR - I2SPR - I2S prescaler register - 0x20 - 0x20 - read-write - 0x00000010 - - - MCKOE - Master clock output enable - 9 - 1 - - - ODD - Odd factor for the - prescaler - 8 - 1 - - - I2SDIV - I2S Linear prescaler - 0 - 8 - - - - - - - SPI2 - 0x40003800 - - SPI2 - SPI2 global interrupt - 26 - - - - DAC - Digital-to-analog converter - DAC - 0x40007400 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt and DAC underrun - interrupt - 17 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - EN1 - DAC channel1 enable - 0 - 1 - - - BOFF1 - DAC channel1 output buffer - disable - 1 - 1 - - - TEN1 - DAC channel1 trigger - enable - 2 - 1 - - - TSEL10 - DAC channel1 trigger - selection - 3 - 1 - - - TSEL11 - DAC channel1 trigger - selection - 4 - 1 - - - TSEL12 - DAC channel1 trigger - selection - 5 - 1 - - - DMAEN1 - DAC channel1 DMA enable - 12 - 1 - - - DMAUDRIE1 - DAC channel1 DMA Underrun Interrupt - enable - 13 - 1 - - - - - SWTRIGR - SWTRIGR - software trigger register - 0x4 - 0x20 - write-only - 0x00000000 - - - SWTRIG1 - DAC channel1 software - trigger - 0 - 1 - - - - - DHR12R1 - DHR12R1 - channel1 12-bit right-aligned data holding - register - 0x8 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L1 - DHR12L1 - channel1 12-bit left aligned data holding - register - 0xC - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R1 - DHR8R1 - channel1 8-bit right aligned data holding - register - 0x10 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DOR1 - DOR1 - channel1 data output register - 0x2C - 0x20 - read-only - 0x00000000 - - - DACC1DOR - DAC channel1 data output - 0 - 12 - - - - - SR - SR - status register - 0x34 - 0x20 - read-write - 0x00000000 - - - DMAUDR2 - DAC channel2 DMA underrun - flag - 29 - 1 - - - DMAUDR1 - DAC channel1 DMA underrun - flag - 13 - 1 - - - - - - - PWR - Power control - PWR - 0x40007000 - - 0x0 - 0x400 - registers - - - - CR - CR - power control register - 0x0 - 0x20 - read-write - 0x00000000 - - - FPDS - Flash power down in Stop - mode - 9 - 1 - - - DBP - Disable backup domain write - protection - 8 - 1 - - - PLS - PVD level selection - 5 - 3 - - - PVDE - Power voltage detector - enable - 4 - 1 - - - CSBF - Clear standby flag - 3 - 1 - - - CWUF - Clear wakeup flag - 2 - 1 - - - PDDS - Power down deepsleep - 1 - 1 - - - LPDS - Low-power deep sleep - 0 - 1 - - - - - CSR - CSR - power control/status register - 0x4 - 0x20 - 0x00000000 - - - BRE - Backup regulator enable - 9 - 1 - read-write - - - EWUP - Enable WKUP pin - 8 - 1 - read-write - - - BRR - Backup regulator ready - 3 - 1 - read-only - - - PVDO - PVD output - 2 - 1 - read-only - - - SBF - Standby flag - 1 - 1 - read-only - - - WUF - Wakeup flag - 0 - 1 - read-only - - - - - - - I2C1 - Inter-integrated circuit - I2C - 0x40005400 - - 0x0 - 0x400 - registers - - - I2C1 - I2C1 global interrupt - 23 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - 0x00000000 - - - PE - Peripheral enable - 0 - 1 - read-write - - - TXIE - TX Interrupt enable - 1 - 1 - read-write - - - RXIE - RX Interrupt enable - 2 - 1 - read-write - - - ADDRIE - Address match interrupt enable (slave - only) - 3 - 1 - read-write - - - NACKIE - Not acknowledge received interrupt - enable - 4 - 1 - read-write - - - STOPIE - STOP detection Interrupt - enable - 5 - 1 - read-write - - - TCIE - Transfer Complete interrupt - enable - 6 - 1 - read-write - - - ERRIE - Error interrupts enable - 7 - 1 - read-write - - - DNF - Digital noise filter - 8 - 4 - read-write - - - ANFOFF - Analog noise filter OFF - 12 - 1 - read-write - - - SWRST - Software reset - 13 - 1 - write-only - - - TXDMAEN - DMA transmission requests - enable - 14 - 1 - read-write - - - RXDMAEN - DMA reception requests - enable - 15 - 1 - read-write - - - SBC - Slave byte control - 16 - 1 - read-write - - - NOSTRETCH - Clock stretching disable - 17 - 1 - read-write - - - WUPEN - Wakeup from STOP enable - 18 - 1 - read-write - - - GCEN - General call enable - 19 - 1 - read-write - - - SMBHEN - SMBus Host address enable - 20 - 1 - read-write - - - SMBDEN - SMBus Device Default address - enable - 21 - 1 - read-write - - - ALERTEN - SMBUS alert enable - 22 - 1 - read-write - - - PECEN - PEC enable - 23 - 1 - read-write - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x00000000 - - - PECBYTE - Packet error checking byte - 26 - 1 - - - AUTOEND - Automatic end mode (master - mode) - 25 - 1 - - - RELOAD - NBYTES reload mode - 24 - 1 - - - NBYTES - Number of bytes - 16 - 8 - - - NACK - NACK generation (slave - mode) - 15 - 1 - - - STOP - Stop generation (master - mode) - 14 - 1 - - - START - Start generation - 13 - 1 - - - HEAD10R - 10-bit address header only read - direction (master receiver mode) - 12 - 1 - - - ADD10 - 10-bit addressing mode (master - mode) - 11 - 1 - - - RD_WRN - Transfer direction (master - mode) - 10 - 1 - - - SADD8 - Slave address bit 9:8 (master - mode) - 8 - 2 - - - SADD1 - Slave address bit 7:1 (master - mode) - 1 - 7 - - - SADD0 - Slave address bit 0 (master - mode) - 0 - 1 - - - - - OAR1 - OAR1 - Own address register 1 - 0x8 - 0x20 - read-write - 0x00000000 - - - OA1_0 - Interface address - 0 - 1 - - - OA1_1 - Interface address - 1 - 7 - - - OA1_8 - Interface address - 8 - 2 - - - OA1MODE - Own Address 1 10-bit mode - 10 - 1 - - - OA1EN - Own Address 1 enable - 15 - 1 - - - - - OAR2 - OAR2 - Own address register 2 - 0xC - 0x20 - read-write - 0x00000000 - - - OA2 - Interface address - 1 - 7 - - - OA2MSK - Own Address 2 masks - 8 - 3 - - - OA2EN - Own Address 2 enable - 15 - 1 - - - - - TIMINGR - TIMINGR - Timing register - 0x10 - 0x20 - read-write - 0x00000000 - - - SCLL - SCL low period (master - mode) - 0 - 8 - - - SCLH - SCL high period (master - mode) - 8 - 8 - - - SDADEL - Data hold time - 16 - 4 - - - SCLDEL - Data setup time - 20 - 4 - - - PRESC - Timing prescaler - 28 - 4 - - - - - TIMEOUTR - TIMEOUTR - Status register 1 - 0x14 - 0x20 - read-write - 0x00000000 - - - TIMEOUTA - Bus timeout A - 0 - 12 - - - TIDLE - Idle clock timeout - detection - 12 - 1 - - - TIMOUTEN - Clock timeout enable - 15 - 1 - - - TIMEOUTB - Bus timeout B - 16 - 12 - - - TEXTEN - Extended clock timeout - enable - 31 - 1 - - - - - ISR - ISR - Interrupt and Status register - 0x18 - 0x20 - 0x00000001 - - - ADDCODE - Address match code (Slave - mode) - 17 - 7 - read-only - - - DIR - Transfer direction (Slave - mode) - 16 - 1 - read-only - - - BUSY - Bus busy - 15 - 1 - read-only - - - ALERT - SMBus alert - 13 - 1 - read-only - - - TIMEOUT - Timeout or t_low detection - flag - 12 - 1 - read-only - - - PECERR - PEC Error in reception - 11 - 1 - read-only - - - OVR - Overrun/Underrun (slave - mode) - 10 - 1 - read-only - - - ARLO - Arbitration lost - 9 - 1 - read-only - - - BERR - Bus error - 8 - 1 - read-only - - - TCR - Transfer Complete Reload - 7 - 1 - read-only - - - TC - Transfer Complete (master - mode) - 6 - 1 - read-only - - - STOPF - Stop detection flag - 5 - 1 - read-only - - - NACKF - Not acknowledge received - flag - 4 - 1 - read-only - - - ADDR - Address matched (slave - mode) - 3 - 1 - read-only - - - RXNE - Receive data register not empty - (receivers) - 2 - 1 - read-only - - - TXIS - Transmit interrupt status - (transmitters) - 1 - 1 - read-write - - - TXE - Transmit data register empty - (transmitters) - 0 - 1 - read-write - - - - - ICR - ICR - Interrupt clear register - 0x1C - 0x20 - write-only - 0x00000000 - - - ALERTCF - Alert flag clear - 13 - 1 - - - TIMOUTCF - Timeout detection flag - clear - 12 - 1 - - - PECCF - PEC Error flag clear - 11 - 1 - - - OVRCF - Overrun/Underrun flag - clear - 10 - 1 - - - ARLOCF - Arbitration lost flag - clear - 9 - 1 - - - BERRCF - Bus error flag clear - 8 - 1 - - - STOPCF - Stop detection flag clear - 5 - 1 - - - NACKCF - Not Acknowledge flag clear - 4 - 1 - - - ADDRCF - Address Matched flag clear - 3 - 1 - - - - - PECR - PECR - PEC register - 0x20 - 0x20 - read-only - 0x00000000 - - - PEC - Packet error checking - register - 0 - 8 - - - - - RXDR - RXDR - Receive data register - 0x24 - 0x20 - read-only - 0x00000000 - - - RXDATA - 8-bit receive data - 0 - 8 - - - - - TXDR - TXDR - Transmit data register - 0x28 - 0x20 - read-write - 0x00000000 - - - TXDATA - 8-bit transmit data - 0 - 8 - - - - - - - I2C2 - 0x40005800 - - I2C2 - I2C2 global interrupt - 24 - - - - IWDG - Independent watchdog - IWDG - 0x40003000 - - 0x0 - 0x400 - registers - - - - KR - KR - Key register - 0x0 - 0x20 - write-only - 0x00000000 - - - KEY - Key value - 0 - 16 - - - - - PR - PR - Prescaler register - 0x4 - 0x20 - read-write - 0x00000000 - - - PR - Prescaler divider - 0 - 3 - - - - - RLR - RLR - Reload register - 0x8 - 0x20 - read-write - 0x00000FFF - - - RL - Watchdog counter reload - value - 0 - 12 - - - - - SR - SR - Status register - 0xC - 0x20 - read-only - 0x00000000 - - - PVU - Watchdog prescaler value - update - 0 - 1 - - - RVU - Watchdog counter reload value - update - 1 - 1 - - - WVU - Watchdog counter window value - update - 2 - 1 - - - - - WINR - WINR - Window register - 0x10 - 0x20 - read-write - 0x00000FFF - - - WIN - Watchdog counter window - value - 0 - 12 - - - - - - - WWDG - Window watchdog - WWDG - 0x40002C00 - - 0x0 - 0x400 - registers - - - WWDG - Window Watchdog interrupt - 0 - - - - CR - CR - Control register - 0x0 - 0x20 - read-write - 0x0000007F - - - WDGA - Activation bit - 7 - 1 - - - T - 7-bit counter - 0 - 7 - - - - - CFR - CFR - Configuration register - 0x4 - 0x20 - read-write - 0x0000007F - - - EWI - Early wakeup interrupt - 9 - 1 - - - WDGTB - Timer base - 7 - 2 - - - W - 7-bit window value - 0 - 7 - - - - - SR - SR - Status register - 0x8 - 0x20 - read-write - 0x00000000 - - - EWIF - Early wakeup interrupt - flag - 0 - 1 - - - - - - - TIM1 - Advanced-timers - TIM - 0x40012C00 - - 0x0 - 0x400 - registers - - - TIM1_BRK_UP_TRG_COM - TIM1 break, update, trigger and commutation - interrupt - 13 - - - TIM1_CC - TIM1 Capture Compare interrupt - 14 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS4 - Output Idle state 4 - 14 - 1 - - - OIS3N - Output Idle state 3 - 13 - 1 - - - OIS3 - Output Idle state 3 - 12 - 1 - - - OIS2N - Output Idle state 2 - 11 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - Reserved - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output Compare 2 clear - enable - 15 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output Compare 1 clear - enable - 7 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3NE - Capture/Compare 3 complementary output - enable - 10 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2NE - Capture/Compare 2 complementary output - enable - 6 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3 - Capture/Compare 3 value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4 - Capture/Compare 3 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM2 - General-purpose-timers - TIM - 0x40000000 - - 0x0 - 0x400 - registers - - - TIM2 - TIM2 global interrupt - 15 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - Reserved - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output compare 2 clear - enable - 15 - 1 - - - OC2M - Output compare 2 mode - 12 - 3 - - - OC2PE - Output compare 2 preload - enable - 11 - 1 - - - OC2FE - Output compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output compare 1 clear - enable - 7 - 1 - - - OC1M - Output compare 1 mode - 4 - 3 - - - OC1PE - Output compare 1 preload - enable - 3 - 1 - - - OC1FE - Output compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT_H - High counter value (TIM2 - only) - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value (TIM2 - only) - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 value (TIM2 - only) - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 value (TIM2 - only) - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value (TIM2 - only) - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value (TIM2 - only) - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAR - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM3 - 0x40000400 - - TIM3 - TIM3 global interrupt - 16 - - - - TIM14 - General-purpose-timers - TIM - 0x40002000 - - 0x0 - 0x400 - registers - - - TIM14 - TIM14 global interrupt - 19 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1FE - Output compare 1 fast - enable - 2 - 1 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - OR - OR - option register - 0x50 - 0x20 - read-write - 0x00000000 - - - RMP - Timer input 1 remap - 0 - 2 - - - - - - - TIM6 - Basic-timers - TIM - 0x40001000 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt and DAC underrun - interrupt - 17 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UDE - Update DMA request enable - 8 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - UG - Update generation - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - Low counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Low Auto-reload value - 0 - 16 - - - - - - - TIM7 - 0x40001400 - - TIM7 - TIM7 global interrupt - 18 - - - - EXTI - External interrupt/event - controller - EXTI - 0x40010400 - - 0x0 - 0x400 - registers - - - PVD - PVD and VDDIO2 supply comparator - interrupt - 1 - - - EXTI0_1 - EXTI Line[1:0] interrupts - 5 - - - EXTI2_3 - EXTI Line[3:2] interrupts - 6 - - - EXTI4_15 - EXTI Line15 and EXTI4 interrupts - 7 - - - - IMR - IMR - Interrupt mask register - (EXTI_IMR) - 0x0 - 0x20 - read-write - 0x0F940000 - - - MR0 - Interrupt Mask on line 0 - 0 - 1 - - - MR1 - Interrupt Mask on line 1 - 1 - 1 - - - MR2 - Interrupt Mask on line 2 - 2 - 1 - - - MR3 - Interrupt Mask on line 3 - 3 - 1 - - - MR4 - Interrupt Mask on line 4 - 4 - 1 - - - MR5 - Interrupt Mask on line 5 - 5 - 1 - - - MR6 - Interrupt Mask on line 6 - 6 - 1 - - - MR7 - Interrupt Mask on line 7 - 7 - 1 - - - MR8 - Interrupt Mask on line 8 - 8 - 1 - - - MR9 - Interrupt Mask on line 9 - 9 - 1 - - - MR10 - Interrupt Mask on line 10 - 10 - 1 - - - MR11 - Interrupt Mask on line 11 - 11 - 1 - - - MR12 - Interrupt Mask on line 12 - 12 - 1 - - - MR13 - Interrupt Mask on line 13 - 13 - 1 - - - MR14 - Interrupt Mask on line 14 - 14 - 1 - - - MR15 - Interrupt Mask on line 15 - 15 - 1 - - - MR16 - Interrupt Mask on line 16 - 16 - 1 - - - MR17 - Interrupt Mask on line 17 - 17 - 1 - - - MR18 - Interrupt Mask on line 18 - 18 - 1 - - - MR19 - Interrupt Mask on line 19 - 19 - 1 - - - MR20 - Interrupt Mask on line 20 - 20 - 1 - - - MR21 - Interrupt Mask on line 21 - 21 - 1 - - - MR22 - Interrupt Mask on line 22 - 22 - 1 - - - MR23 - Interrupt Mask on line 23 - 23 - 1 - - - MR24 - Interrupt Mask on line 24 - 24 - 1 - - - MR25 - Interrupt Mask on line 25 - 25 - 1 - - - MR26 - Interrupt Mask on line 26 - 26 - 1 - - - MR27 - Interrupt Mask on line 27 - 27 - 1 - - - - - EMR - EMR - Event mask register (EXTI_EMR) - 0x4 - 0x20 - read-write - 0x00000000 - - - MR0 - Event Mask on line 0 - 0 - 1 - - - MR1 - Event Mask on line 1 - 1 - 1 - - - MR2 - Event Mask on line 2 - 2 - 1 - - - MR3 - Event Mask on line 3 - 3 - 1 - - - MR4 - Event Mask on line 4 - 4 - 1 - - - MR5 - Event Mask on line 5 - 5 - 1 - - - MR6 - Event Mask on line 6 - 6 - 1 - - - MR7 - Event Mask on line 7 - 7 - 1 - - - MR8 - Event Mask on line 8 - 8 - 1 - - - MR9 - Event Mask on line 9 - 9 - 1 - - - MR10 - Event Mask on line 10 - 10 - 1 - - - MR11 - Event Mask on line 11 - 11 - 1 - - - MR12 - Event Mask on line 12 - 12 - 1 - - - MR13 - Event Mask on line 13 - 13 - 1 - - - MR14 - Event Mask on line 14 - 14 - 1 - - - MR15 - Event Mask on line 15 - 15 - 1 - - - MR16 - Event Mask on line 16 - 16 - 1 - - - MR17 - Event Mask on line 17 - 17 - 1 - - - MR18 - Event Mask on line 18 - 18 - 1 - - - MR19 - Event Mask on line 19 - 19 - 1 - - - MR20 - Event Mask on line 20 - 20 - 1 - - - MR21 - Event Mask on line 21 - 21 - 1 - - - MR22 - Event Mask on line 22 - 22 - 1 - - - MR23 - Event Mask on line 23 - 23 - 1 - - - MR24 - Event Mask on line 24 - 24 - 1 - - - MR25 - Event Mask on line 25 - 25 - 1 - - - MR26 - Event Mask on line 26 - 26 - 1 - - - MR27 - Event Mask on line 27 - 27 - 1 - - - - - RTSR - RTSR - Rising Trigger selection register - (EXTI_RTSR) - 0x8 - 0x20 - read-write - 0x00000000 - - - TR0 - Rising trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Rising trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Rising trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Rising trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Rising trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Rising trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Rising trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Rising trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Rising trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Rising trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Rising trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Rising trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Rising trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Rising trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Rising trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Rising trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Rising trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Rising trigger event configuration of - line 17 - 17 - 1 - - - TR19 - Rising trigger event configuration of - line 19 - 19 - 1 - - - - - FTSR - FTSR - Falling Trigger selection register - (EXTI_FTSR) - 0xC - 0x20 - read-write - 0x00000000 - - - TR0 - Falling trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Falling trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Falling trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Falling trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Falling trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Falling trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Falling trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Falling trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Falling trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Falling trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Falling trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Falling trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Falling trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Falling trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Falling trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Falling trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Falling trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Falling trigger event configuration of - line 17 - 17 - 1 - - - TR19 - Falling trigger event configuration of - line 19 - 19 - 1 - - - - - SWIER - SWIER - Software interrupt event register - (EXTI_SWIER) - 0x10 - 0x20 - read-write - 0x00000000 - - - SWIER0 - Software Interrupt on line - 0 - 0 - 1 - - - SWIER1 - Software Interrupt on line - 1 - 1 - 1 - - - SWIER2 - Software Interrupt on line - 2 - 2 - 1 - - - SWIER3 - Software Interrupt on line - 3 - 3 - 1 - - - SWIER4 - Software Interrupt on line - 4 - 4 - 1 - - - SWIER5 - Software Interrupt on line - 5 - 5 - 1 - - - SWIER6 - Software Interrupt on line - 6 - 6 - 1 - - - SWIER7 - Software Interrupt on line - 7 - 7 - 1 - - - SWIER8 - Software Interrupt on line - 8 - 8 - 1 - - - SWIER9 - Software Interrupt on line - 9 - 9 - 1 - - - SWIER10 - Software Interrupt on line - 10 - 10 - 1 - - - SWIER11 - Software Interrupt on line - 11 - 11 - 1 - - - SWIER12 - Software Interrupt on line - 12 - 12 - 1 - - - SWIER13 - Software Interrupt on line - 13 - 13 - 1 - - - SWIER14 - Software Interrupt on line - 14 - 14 - 1 - - - SWIER15 - Software Interrupt on line - 15 - 15 - 1 - - - SWIER16 - Software Interrupt on line - 16 - 16 - 1 - - - SWIER17 - Software Interrupt on line - 17 - 17 - 1 - - - SWIER19 - Software Interrupt on line - 19 - 19 - 1 - - - - - PR - PR - Pending register (EXTI_PR) - 0x14 - 0x20 - read-write - 0x00000000 - - - PR0 - Pending bit 0 - 0 - 1 - - - PR1 - Pending bit 1 - 1 - 1 - - - PR2 - Pending bit 2 - 2 - 1 - - - PR3 - Pending bit 3 - 3 - 1 - - - PR4 - Pending bit 4 - 4 - 1 - - - PR5 - Pending bit 5 - 5 - 1 - - - PR6 - Pending bit 6 - 6 - 1 - - - PR7 - Pending bit 7 - 7 - 1 - - - PR8 - Pending bit 8 - 8 - 1 - - - PR9 - Pending bit 9 - 9 - 1 - - - PR10 - Pending bit 10 - 10 - 1 - - - PR11 - Pending bit 11 - 11 - 1 - - - PR12 - Pending bit 12 - 12 - 1 - - - PR13 - Pending bit 13 - 13 - 1 - - - PR14 - Pending bit 14 - 14 - 1 - - - PR15 - Pending bit 15 - 15 - 1 - - - PR16 - Pending bit 16 - 16 - 1 - - - PR17 - Pending bit 17 - 17 - 1 - - - PR19 - Pending bit 19 - 19 - 1 - - - - - - - NVIC - Nested Vectored Interrupt - Controller - NVIC - 0xE000E100 - - 0x0 - 0x33D - registers - - - - ISER - ISER - Interrupt Set Enable Register - 0x0 - 0x20 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ICER - ICER - Interrupt Clear Enable - Register - 0x80 - 0x20 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ISPR - ISPR - Interrupt Set-Pending Register - 0x100 - 0x20 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ICPR - ICPR - Interrupt Clear-Pending - Register - 0x180 - 0x20 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - IPR0 - IPR0 - Interrupt Priority Register 0 - 0x300 - 0x20 - read-write - 0x00000000 - - - PRI_00 - PRI_00 - 6 - 2 - - - PRI_01 - PRI_01 - 14 - 2 - - - PRI_02 - PRI_02 - 22 - 2 - - - PRI_03 - PRI_03 - 30 - 2 - - - - - IPR1 - IPR1 - Interrupt Priority Register 1 - 0x304 - 0x20 - read-write - 0x00000000 - - - PRI_40 - PRI_40 - 6 - 2 - - - PRI_41 - PRI_41 - 14 - 2 - - - PRI_42 - PRI_42 - 22 - 2 - - - PRI_43 - PRI_43 - 30 - 2 - - - - - IPR2 - IPR2 - Interrupt Priority Register 2 - 0x308 - 0x20 - read-write - 0x00000000 - - - PRI_80 - PRI_80 - 6 - 2 - - - PRI_81 - PRI_81 - 14 - 2 - - - PRI_82 - PRI_82 - 22 - 2 - - - PRI_83 - PRI_83 - 30 - 2 - - - - - IPR3 - IPR3 - Interrupt Priority Register 3 - 0x30C - 0x20 - read-write - 0x00000000 - - - PRI_120 - PRI_120 - 6 - 2 - - - PRI_121 - PRI_121 - 14 - 2 - - - PRI_122 - PRI_122 - 22 - 2 - - - PRI_123 - PRI_123 - 30 - 2 - - - - - IPR4 - IPR4 - Interrupt Priority Register 4 - 0x310 - 0x20 - read-write - 0x00000000 - - - PRI_160 - PRI_160 - 6 - 2 - - - PRI_161 - PRI_161 - 14 - 2 - - - PRI_162 - PRI_162 - 22 - 2 - - - PRI_163 - PRI_163 - 30 - 2 - - - - - IPR5 - IPR5 - Interrupt Priority Register 5 - 0x314 - 0x20 - read-write - 0x00000000 - - - PRI_200 - PRI_200 - 6 - 2 - - - PRI_201 - PRI_201 - 14 - 2 - - - PRI_202 - PRI_202 - 22 - 2 - - - PRI_203 - PRI_203 - 30 - 2 - - - - - IPR6 - IPR6 - Interrupt Priority Register 6 - 0x318 - 0x20 - read-write - 0x00000000 - - - PRI_240 - PRI_240 - 6 - 2 - - - PRI_241 - PRI_241 - 14 - 2 - - - PRI_242 - PRI_242 - 22 - 2 - - - PRI_243 - PRI_243 - 30 - 2 - - - - - IPR7 - IPR7 - Interrupt Priority Register 7 - 0x31C - 0x20 - read-write - 0x00000000 - - - PRI_280 - PRI_280 - 6 - 2 - - - PRI_281 - PRI_281 - 14 - 2 - - - PRI_282 - PRI_282 - 22 - 2 - - - PRI_283 - PRI_283 - 30 - 2 - - - - - - - DMA - DMA controller - DMA - 0x40020000 - - 0x0 - 0x400 - registers - - - DMA_CH1 - DMA channel 1 interrupt - 9 - - - DMA_CH2_3 - DMA channel 2 and 3 interrupts - 10 - - - DMA_CH4_5_6_7 - DMA channel 4, 5, 6 and 7 - interrupts - 11 - - - - ISR - ISR - DMA interrupt status register - (DMA_ISR) - 0x0 - 0x20 - read-only - 0x00000000 - - - GIF1 - Channel 1 Global interrupt - flag - 0 - 1 - - - TCIF1 - Channel 1 Transfer Complete - flag - 1 - 1 - - - HTIF1 - Channel 1 Half Transfer Complete - flag - 2 - 1 - - - TEIF1 - Channel 1 Transfer Error - flag - 3 - 1 - - - GIF2 - Channel 2 Global interrupt - flag - 4 - 1 - - - TCIF2 - Channel 2 Transfer Complete - flag - 5 - 1 - - - HTIF2 - Channel 2 Half Transfer Complete - flag - 6 - 1 - - - TEIF2 - Channel 2 Transfer Error - flag - 7 - 1 - - - GIF3 - Channel 3 Global interrupt - flag - 8 - 1 - - - TCIF3 - Channel 3 Transfer Complete - flag - 9 - 1 - - - HTIF3 - Channel 3 Half Transfer Complete - flag - 10 - 1 - - - TEIF3 - Channel 3 Transfer Error - flag - 11 - 1 - - - GIF4 - Channel 4 Global interrupt - flag - 12 - 1 - - - TCIF4 - Channel 4 Transfer Complete - flag - 13 - 1 - - - HTIF4 - Channel 4 Half Transfer Complete - flag - 14 - 1 - - - TEIF4 - Channel 4 Transfer Error - flag - 15 - 1 - - - GIF5 - Channel 5 Global interrupt - flag - 16 - 1 - - - TCIF5 - Channel 5 Transfer Complete - flag - 17 - 1 - - - HTIF5 - Channel 5 Half Transfer Complete - flag - 18 - 1 - - - TEIF5 - Channel 5 Transfer Error - flag - 19 - 1 - - - GIF6 - Channel 6 Global interrupt - flag - 20 - 1 - - - TCIF6 - Channel 6 Transfer Complete - flag - 21 - 1 - - - HTIF6 - Channel 6 Half Transfer Complete - flag - 22 - 1 - - - TEIF6 - Channel 6 Transfer Error - flag - 23 - 1 - - - GIF7 - Channel 7 Global interrupt - flag - 24 - 1 - - - TCIF7 - Channel 7 Transfer Complete - flag - 25 - 1 - - - HTIF7 - Channel 7 Half Transfer Complete - flag - 26 - 1 - - - TEIF7 - Channel 7 Transfer Error - flag - 27 - 1 - - - - - IFCR - IFCR - DMA interrupt flag clear register - (DMA_IFCR) - 0x4 - 0x20 - write-only - 0x00000000 - - - CGIF1 - Channel 1 Global interrupt - clear - 0 - 1 - - - CTCIF1 - Channel 1 Transfer Complete - clear - 1 - 1 - - - CHTIF1 - Channel 1 Half Transfer - clear - 2 - 1 - - - CTEIF1 - Channel 1 Transfer Error - clear - 3 - 1 - - - CGIF2 - Channel 2 Global interrupt - clear - 4 - 1 - - - CTCIF2 - Channel 2 Transfer Complete - clear - 5 - 1 - - - CHTIF2 - Channel 2 Half Transfer - clear - 6 - 1 - - - CTEIF2 - Channel 2 Transfer Error - clear - 7 - 1 - - - CGIF3 - Channel 3 Global interrupt - clear - 8 - 1 - - - CTCIF3 - Channel 3 Transfer Complete - clear - 9 - 1 - - - CHTIF3 - Channel 3 Half Transfer - clear - 10 - 1 - - - CTEIF3 - Channel 3 Transfer Error - clear - 11 - 1 - - - CGIF4 - Channel 4 Global interrupt - clear - 12 - 1 - - - CTCIF4 - Channel 4 Transfer Complete - clear - 13 - 1 - - - CHTIF4 - Channel 4 Half Transfer - clear - 14 - 1 - - - CTEIF4 - Channel 4 Transfer Error - clear - 15 - 1 - - - CGIF5 - Channel 5 Global interrupt - clear - 16 - 1 - - - CTCIF5 - Channel 5 Transfer Complete - clear - 17 - 1 - - - CHTIF5 - Channel 5 Half Transfer - clear - 18 - 1 - - - CTEIF5 - Channel 5 Transfer Error - clear - 19 - 1 - - - CGIF6 - Channel 6 Global interrupt - clear - 20 - 1 - - - CTCIF6 - Channel 6 Transfer Complete - clear - 21 - 1 - - - CHTIF6 - Channel 6 Half Transfer - clear - 22 - 1 - - - CTEIF6 - Channel 6 Transfer Error - clear - 23 - 1 - - - CGIF7 - Channel 7 Global interrupt - clear - 24 - 1 - - - CTCIF7 - Channel 7 Transfer Complete - clear - 25 - 1 - - - CHTIF7 - Channel 7 Half Transfer - clear - 26 - 1 - - - CTEIF7 - Channel 7 Transfer Error - clear - 27 - 1 - - - - - CCR1 - CCR1 - DMA channel configuration register - (DMA_CCR) - 0x8 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR1 - CNDTR1 - DMA channel 1 number of data - register - 0xC - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR1 - CPAR1 - DMA channel 1 peripheral address - register - 0x10 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR1 - CMAR1 - DMA channel 1 memory address - register - 0x14 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR2 - CCR2 - DMA channel configuration register - (DMA_CCR) - 0x1C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR2 - CNDTR2 - DMA channel 2 number of data - register - 0x20 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR2 - CPAR2 - DMA channel 2 peripheral address - register - 0x24 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR2 - CMAR2 - DMA channel 2 memory address - register - 0x28 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR3 - CCR3 - DMA channel configuration register - (DMA_CCR) - 0x30 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR3 - CNDTR3 - DMA channel 3 number of data - register - 0x34 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR3 - CPAR3 - DMA channel 3 peripheral address - register - 0x38 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR3 - CMAR3 - DMA channel 3 memory address - register - 0x3C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR4 - CCR4 - DMA channel configuration register - (DMA_CCR) - 0x44 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR4 - CNDTR4 - DMA channel 4 number of data - register - 0x48 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR4 - CPAR4 - DMA channel 4 peripheral address - register - 0x4C - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR4 - CMAR4 - DMA channel 4 memory address - register - 0x50 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR5 - CCR5 - DMA channel configuration register - (DMA_CCR) - 0x58 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR5 - CNDTR5 - DMA channel 5 number of data - register - 0x5C - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR5 - CPAR5 - DMA channel 5 peripheral address - register - 0x60 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR5 - CMAR5 - DMA channel 5 memory address - register - 0x64 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR6 - CCR6 - DMA channel configuration register - (DMA_CCR) - 0x6C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR6 - CNDTR6 - DMA channel 6 number of data - register - 0x70 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR6 - CPAR6 - DMA channel 6 peripheral address - register - 0x74 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR6 - CMAR6 - DMA channel 6 memory address - register - 0x78 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR7 - CCR7 - DMA channel configuration register - (DMA_CCR) - 0x80 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR7 - CNDTR7 - DMA channel 7 number of data - register - 0x84 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR7 - CPAR7 - DMA channel 7 peripheral address - register - 0x88 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR7 - CMAR7 - DMA channel 7 memory address - register - 0x8C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - - - RCC - Reset and clock control - RCC - 0x40021000 - - 0x0 - 0x400 - registers - - - RCC_CRS - RCC and CRS global interrupts - 4 - - - - CR - CR - Clock control register - 0x0 - 0x20 - 0x00000083 - - - HSION - Internal High Speed clock - enable - 0 - 1 - read-write - - - HSIRDY - Internal High Speed clock ready - flag - 1 - 1 - read-only - - - HSITRIM - Internal High Speed clock - trimming - 3 - 5 - read-write - - - HSICAL - Internal High Speed clock - Calibration - 8 - 8 - read-only - - - HSEON - External High Speed clock - enable - 16 - 1 - read-write - - - HSERDY - External High Speed clock ready - flag - 17 - 1 - read-only - - - HSEBYP - External High Speed clock - Bypass - 18 - 1 - read-write - - - CSSON - Clock Security System - enable - 19 - 1 - read-write - - - PLLON - PLL enable - 24 - 1 - read-write - - - PLLRDY - PLL clock ready flag - 25 - 1 - read-only - - - - - CFGR - CFGR - Clock configuration register - (RCC_CFGR) - 0x4 - 0x20 - 0x00000000 - - - SW - System clock Switch - 0 - 2 - read-write - - - SWS - System Clock Switch Status - 2 - 2 - read-only - - - HPRE - AHB prescaler - 4 - 4 - read-write - - - PPRE - APB Low speed prescaler - (APB1) - 8 - 3 - read-write - - - ADCPRE - ADC prescaler - 14 - 1 - read-write - - - PLLSRC - PLL input clock source - 15 - 2 - read-write - - - PLLXTPRE - HSE divider for PLL entry - 17 - 1 - read-write - - - PLLMUL - PLL Multiplication Factor - 18 - 4 - read-write - - - MCO - Microcontroller clock - output - 24 - 3 - read-write - - - MCOPRE - Microcontroller Clock Output - Prescaler - 28 - 3 - read-write - - - PLLNODIV - PLL clock not divided for - MCO - 31 - 1 - read-write - - - - - CIR - CIR - Clock interrupt register - (RCC_CIR) - 0x8 - 0x20 - 0x00000000 - - - LSIRDYF - LSI Ready Interrupt flag - 0 - 1 - read-only - - - LSERDYF - LSE Ready Interrupt flag - 1 - 1 - read-only - - - HSIRDYF - HSI Ready Interrupt flag - 2 - 1 - read-only - - - HSERDYF - HSE Ready Interrupt flag - 3 - 1 - read-only - - - PLLRDYF - PLL Ready Interrupt flag - 4 - 1 - read-only - - - HSI14RDYF - HSI14 ready interrupt flag - 5 - 1 - read-only - - - HSI48RDYF - HSI48 ready interrupt flag - 6 - 1 - read-only - - - CSSF - Clock Security System Interrupt - flag - 7 - 1 - read-only - - - LSIRDYIE - LSI Ready Interrupt Enable - 8 - 1 - read-write - - - LSERDYIE - LSE Ready Interrupt Enable - 9 - 1 - read-write - - - HSIRDYIE - HSI Ready Interrupt Enable - 10 - 1 - read-write - - - HSERDYIE - HSE Ready Interrupt Enable - 11 - 1 - read-write - - - PLLRDYIE - PLL Ready Interrupt Enable - 12 - 1 - read-write - - - HSI14RDYE - HSI14 ready interrupt - enable - 13 - 1 - read-write - - - HSI48RDYIE - HSI48 ready interrupt - enable - 14 - 1 - read-write - - - LSIRDYC - LSI Ready Interrupt Clear - 16 - 1 - write-only - - - LSERDYC - LSE Ready Interrupt Clear - 17 - 1 - write-only - - - HSIRDYC - HSI Ready Interrupt Clear - 18 - 1 - write-only - - - HSERDYC - HSE Ready Interrupt Clear - 19 - 1 - write-only - - - PLLRDYC - PLL Ready Interrupt Clear - 20 - 1 - write-only - - - HSI14RDYC - HSI 14 MHz Ready Interrupt - Clear - 21 - 1 - write-only - - - HSI48RDYC - HSI48 Ready Interrupt - Clear - 22 - 1 - write-only - - - CSSC - Clock security system interrupt - clear - 23 - 1 - write-only - - - - - APB2RSTR - APB2RSTR - APB2 peripheral reset register - (RCC_APB2RSTR) - 0xC - 0x20 - read-write - 0x00000000 - - - SYSCFGRST - SYSCFG and COMP reset - 0 - 1 - - - ADCRST - ADC interface reset - 9 - 1 - - - TIM1RST - TIM1 timer reset - 11 - 1 - - - SPI1RST - SPI 1 reset - 12 - 1 - - - USART1RST - USART1 reset - 14 - 1 - - - TIM15RST - TIM15 timer reset - 16 - 1 - - - TIM16RST - TIM16 timer reset - 17 - 1 - - - TIM17RST - TIM17 timer reset - 18 - 1 - - - DBGMCURST - Debug MCU reset - 22 - 1 - - - - - APB1RSTR - APB1RSTR - APB1 peripheral reset register - (RCC_APB1RSTR) - 0x10 - 0x20 - read-write - 0x00000000 - - - TIM2RST - Timer 2 reset - 0 - 1 - - - TIM3RST - Timer 3 reset - 1 - 1 - - - TIM6RST - Timer 6 reset - 4 - 1 - - - TIM7RST - TIM7 timer reset - 5 - 1 - - - TIM14RST - Timer 14 reset - 8 - 1 - - - WWDGRST - Window watchdog reset - 11 - 1 - - - SPI2RST - SPI2 reset - 14 - 1 - - - USART2RST - USART 2 reset - 17 - 1 - - - USART3RST - USART3 reset - 18 - 1 - - - USART4RST - USART4 reset - 19 - 1 - - - I2C1RST - I2C1 reset - 21 - 1 - - - I2C2RST - I2C2 reset - 22 - 1 - - - USBRST - USB interface reset - 23 - 1 - - - CANRST - CAN interface reset - 25 - 1 - - - CRSRST - Clock Recovery System interface - reset - 27 - 1 - - - PWRRST - Power interface reset - 28 - 1 - - - DACRST - DAC interface reset - 29 - 1 - - - CECRST - HDMI CEC reset - 30 - 1 - - - - - AHBENR - AHBENR - AHB Peripheral Clock enable register - (RCC_AHBENR) - 0x14 - 0x20 - read-write - 0x00000014 - - - DMAEN - DMA1 clock enable - 0 - 1 - - - SRAMEN - SRAM interface clock - enable - 2 - 1 - - - FLITFEN - FLITF clock enable - 4 - 1 - - - CRCEN - CRC clock enable - 6 - 1 - - - IOPAEN - I/O port A clock enable - 17 - 1 - - - IOPBEN - I/O port B clock enable - 18 - 1 - - - IOPCEN - I/O port C clock enable - 19 - 1 - - - IOPDEN - I/O port D clock enable - 20 - 1 - - - IOPFEN - I/O port F clock enable - 22 - 1 - - - TSCEN - Touch sensing controller clock - enable - 24 - 1 - - - - - APB2ENR - APB2ENR - APB2 peripheral clock enable register - (RCC_APB2ENR) - 0x18 - 0x20 - read-write - 0x00000000 - - - SYSCFGEN - SYSCFG clock enable - 0 - 1 - - - ADCEN - ADC 1 interface clock - enable - 9 - 1 - - - TIM1EN - TIM1 Timer clock enable - 11 - 1 - - - SPI1EN - SPI 1 clock enable - 12 - 1 - - - USART1EN - USART1 clock enable - 14 - 1 - - - TIM15EN - TIM15 timer clock enable - 16 - 1 - - - TIM16EN - TIM16 timer clock enable - 17 - 1 - - - TIM17EN - TIM17 timer clock enable - 18 - 1 - - - DBGMCUEN - MCU debug module clock - enable - 22 - 1 - - - - - APB1ENR - APB1ENR - APB1 peripheral clock enable register - (RCC_APB1ENR) - 0x1C - 0x20 - read-write - 0x00000000 - - - TIM2EN - Timer 2 clock enable - 0 - 1 - - - TIM3EN - Timer 3 clock enable - 1 - 1 - - - TIM6EN - Timer 6 clock enable - 4 - 1 - - - TIM7EN - TIM7 timer clock enable - 5 - 1 - - - TIM14EN - Timer 14 clock enable - 8 - 1 - - - WWDGEN - Window watchdog clock - enable - 11 - 1 - - - SPI2EN - SPI 2 clock enable - 14 - 1 - - - USART2EN - USART 2 clock enable - 17 - 1 - - - USART3EN - USART3 clock enable - 18 - 1 - - - USART4EN - USART4 clock enable - 19 - 1 - - - I2C1EN - I2C 1 clock enable - 21 - 1 - - - I2C2EN - I2C 2 clock enable - 22 - 1 - - - USBRST - USB interface clock enable - 23 - 1 - - - CANEN - CAN interface clock enable - 25 - 1 - - - CRSEN - Clock Recovery System interface clock - enable - 27 - 1 - - - PWREN - Power interface clock - enable - 28 - 1 - - - DACEN - DAC interface clock enable - 29 - 1 - - - CECEN - HDMI CEC interface clock - enable - 30 - 1 - - - - - BDCR - BDCR - Backup domain control register - (RCC_BDCR) - 0x20 - 0x20 - 0x00000000 - - - LSEON - External Low Speed oscillator - enable - 0 - 1 - read-write - - - LSERDY - External Low Speed oscillator - ready - 1 - 1 - read-only - - - LSEBYP - External Low Speed oscillator - bypass - 2 - 1 - read-write - - - LSEDRV - LSE oscillator drive - capability - 3 - 2 - read-write - - - RTCSEL - RTC clock source selection - 8 - 2 - read-write - - - RTCEN - RTC clock enable - 15 - 1 - read-write - - - BDRST - Backup domain software - reset - 16 - 1 - read-write - - - - - CSR - CSR - Control/status register - (RCC_CSR) - 0x24 - 0x20 - 0x0C000000 - - - LSION - Internal low speed oscillator - enable - 0 - 1 - read-write - - - LSIRDY - Internal low speed oscillator - ready - 1 - 1 - read-only - - - RMVF - Remove reset flag - 24 - 1 - read-write - - - OBLRSTF - Option byte loader reset - flag - 25 - 1 - read-write - - - PINRSTF - PIN reset flag - 26 - 1 - read-write - - - PORRSTF - POR/PDR reset flag - 27 - 1 - read-write - - - SFTRSTF - Software reset flag - 28 - 1 - read-write - - - IWDGRSTF - Independent watchdog reset - flag - 29 - 1 - read-write - - - WWDGRSTF - Window watchdog reset flag - 30 - 1 - read-write - - - LPWRRSTF - Low-power reset flag - 31 - 1 - read-write - - - - - AHBRSTR - AHBRSTR - AHB peripheral reset register - 0x28 - 0x20 - read-write - 0x00000000 - - - IOPARST - I/O port A reset - 17 - 1 - - - IOPBRST - I/O port B reset - 18 - 1 - - - IOPCRST - I/O port C reset - 19 - 1 - - - IOPDRST - I/O port D reset - 20 - 1 - - - IOPFRST - I/O port F reset - 22 - 1 - - - TSCRST - Touch sensing controller - reset - 24 - 1 - - - - - CFGR2 - CFGR2 - Clock configuration register 2 - 0x2C - 0x20 - read-write - 0x00000000 - - - PREDIV - PREDIV division factor - 0 - 4 - - - - - CFGR3 - CFGR3 - Clock configuration register 3 - 0x30 - 0x20 - read-write - 0x00000000 - - - USART1SW - USART1 clock source - selection - 0 - 2 - - - I2C1SW - I2C1 clock source - selection - 4 - 1 - - - CECSW - HDMI CEC clock source - selection - 6 - 1 - - - USBSW - USB clock source selection - 7 - 1 - - - ADCSW - ADC clock source selection - 8 - 1 - - - USART2SW - USART2 clock source - selection - 16 - 2 - - - - - CR2 - CR2 - Clock control register 2 - 0x34 - 0x20 - 0x00000080 - - - HSI14ON - HSI14 clock enable - 0 - 1 - read-write - - - HSI14RDY - HR14 clock ready flag - 1 - 1 - read-only - - - HSI14DIS - HSI14 clock request from ADC - disable - 2 - 1 - read-write - - - HSI14TRIM - HSI14 clock trimming - 3 - 5 - read-write - - - HSI14CAL - HSI14 clock calibration - 8 - 8 - read-only - - - HSI48ON - HSI48 clock enable - 16 - 1 - read-write - - - HSI48RDY - HSI48 clock ready flag - 17 - 1 - read-only - - - HSI48CAL - HSI48 factory clock - calibration - 24 - 1 - read-only - - - - - - - SYSCFG - System configuration controller - SYSCFG - 0x40010000 - - 0x0 - 0x400 - registers - - - - CFGR1 - CFGR1 - configuration register 1 - 0x0 - 0x20 - read-write - 0x00000000 - - - MEM_MODE - Memory mapping selection - bits - 0 - 2 - - - ADC_DMA_RMP - ADC DMA remapping bit - 8 - 1 - - - USART1_TX_DMA_RMP - USART1_TX DMA remapping - bit - 9 - 1 - - - USART1_RX_DMA_RMP - USART1_RX DMA request remapping - bit - 10 - 1 - - - TIM16_DMA_RMP - TIM16 DMA request remapping - bit - 11 - 1 - - - TIM17_DMA_RMP - TIM17 DMA request remapping - bit - 12 - 1 - - - I2C_PB6_FM - Fast Mode Plus (FM plus) driving - capability activation bits. - 16 - 1 - - - I2C_PB7_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 17 - 1 - - - I2C_PB8_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 18 - 1 - - - I2C_PB9_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 19 - 1 - - - I2C1_FM_plus - FM+ driving capability activation for - I2C1 - 20 - 1 - - - I2C2_FM_plus - FM+ driving capability activation for - I2C2 - 21 - 1 - - - SPI2_DMA_RMP - SPI2 DMA request remapping - bit - 24 - 1 - - - USART2_DMA_RMP - USART2 DMA request remapping - bit - 25 - 1 - - - USART3_DMA_RMP - USART3 DMA request remapping - bit - 26 - 1 - - - I2C1_DMA_RMP - I2C1 DMA request remapping - bit - 27 - 1 - - - TIM1_DMA_RMP - TIM1 DMA request remapping - bit - 28 - 1 - - - TIM2_DMA_RMP - TIM2 DMA request remapping - bit - 29 - 1 - - - TIM3_DMA_RMP - TIM3 DMA request remapping - bit - 30 - 1 - - - - - EXTICR1 - EXTICR1 - external interrupt configuration register - 1 - 0x8 - 0x20 - read-write - 0x0000 - - - EXTI3 - EXTI 3 configuration bits - 12 - 4 - - - EXTI2 - EXTI 2 configuration bits - 8 - 4 - - - EXTI1 - EXTI 1 configuration bits - 4 - 4 - - - EXTI0 - EXTI 0 configuration bits - 0 - 4 - - - - - EXTICR2 - EXTICR2 - external interrupt configuration register - 2 - 0xC - 0x20 - read-write - 0x0000 - - - EXTI7 - EXTI 7 configuration bits - 12 - 4 - - - EXTI6 - EXTI 6 configuration bits - 8 - 4 - - - EXTI5 - EXTI 5 configuration bits - 4 - 4 - - - EXTI4 - EXTI 4 configuration bits - 0 - 4 - - - - - EXTICR3 - EXTICR3 - external interrupt configuration register - 3 - 0x10 - 0x20 - read-write - 0x0000 - - - EXTI11 - EXTI 11 configuration bits - 12 - 4 - - - EXTI10 - EXTI 10 configuration bits - 8 - 4 - - - EXTI9 - EXTI 9 configuration bits - 4 - 4 - - - EXTI8 - EXTI 8 configuration bits - 0 - 4 - - - - - EXTICR4 - EXTICR4 - external interrupt configuration register - 4 - 0x14 - 0x20 - read-write - 0x0000 - - - EXTI15 - EXTI 15 configuration bits - 12 - 4 - - - EXTI14 - EXTI 14 configuration bits - 8 - 4 - - - EXTI13 - EXTI 13 configuration bits - 4 - 4 - - - EXTI12 - EXTI 12 configuration bits - 0 - 4 - - - - - CFGR2 - CFGR2 - configuration register 2 - 0x18 - 0x20 - read-write - 0x0000 - - - SRAM_PEF - SRAM parity flag - 8 - 1 - - - PVD_LOCK - PVD lock enable bit - 2 - 1 - - - SRAM_PARITY_LOCK - SRAM parity lock bit - 1 - 1 - - - LOCUP_LOCK - Cortex-M0 LOCKUP bit enable - bit - 0 - 1 - - - - - - - ADC - Analog-to-digital converter - ADC - 0x40012400 - - 0x0 - 0x400 - registers - - - ADC_COMP - ADC and comparator interrupts - 12 - - - - ISR - ISR - interrupt and status register - 0x0 - 0x20 - read-write - 0x00000000 - - - AWD - Analog watchdog flag - 7 - 1 - - - OVR - ADC overrun - 4 - 1 - - - EOS - End of sequence flag - 3 - 1 - - - EOC - End of conversion flag - 2 - 1 - - - EOSMP - End of sampling flag - 1 - 1 - - - ADRDY - ADC ready - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x4 - 0x20 - read-write - 0x00000000 - - - AWDIE - Analog watchdog interrupt - enable - 7 - 1 - - - OVRIE - Overrun interrupt enable - 4 - 1 - - - EOSIE - End of conversion sequence interrupt - enable - 3 - 1 - - - EOCIE - End of conversion interrupt - enable - 2 - 1 - - - EOSMPIE - End of sampling flag interrupt - enable - 1 - 1 - - - ADRDYIE - ADC ready interrupt enable - 0 - 1 - - - - - CR - CR - control register - 0x8 - 0x20 - read-write - 0x00000000 - - - ADCAL - ADC calibration - 31 - 1 - - - ADSTP - ADC stop conversion - command - 4 - 1 - - - ADSTART - ADC start conversion - command - 2 - 1 - - - ADDIS - ADC disable command - 1 - 1 - - - ADEN - ADC enable command - 0 - 1 - - - - - CFGR1 - CFGR1 - configuration register 1 - 0xC - 0x20 - read-write - 0x00000000 - - - AWDCH - Analog watchdog channel - selection - 26 - 5 - - - AWDEN - Analog watchdog enable - 23 - 1 - - - AWDSGL - Enable the watchdog on a single channel - or on all channels - 22 - 1 - - - DISCEN - Discontinuous mode - 16 - 1 - - - AUTOFF - Auto-off mode - 15 - 1 - - - AUTDLY - Auto-delayed conversion - mode - 14 - 1 - - - CONT - Single / continuous conversion - mode - 13 - 1 - - - OVRMOD - Overrun management mode - 12 - 1 - - - EXTEN - External trigger enable and polarity - selection - 10 - 2 - - - EXTSEL - External trigger selection - 6 - 3 - - - ALIGN - Data alignment - 5 - 1 - - - RES - Data resolution - 3 - 2 - - - SCANDIR - Scan sequence direction - 2 - 1 - - - DMACFG - Direct memery access - configuration - 1 - 1 - - - DMAEN - Direct memory access - enable - 0 - 1 - - - - - CFGR2 - CFGR2 - configuration register 2 - 0x10 - 0x20 - read-write - 0x00008000 - - - JITOFF_D4 - JITOFF_D4 - 31 - 1 - - - JITOFF_D2 - JITOFF_D2 - 30 - 1 - - - - - SMPR - SMPR - sampling time register - 0x14 - 0x20 - read-write - 0x00000000 - - - SMPR - Sampling time selection - 0 - 3 - - - - - TR - TR - watchdog threshold register - 0x20 - 0x20 - read-write - 0x00000FFF - - - HT - Analog watchdog higher - threshold - 16 - 12 - - - LT - Analog watchdog lower - threshold - 0 - 12 - - - - - CHSELR - CHSELR - channel selection register - 0x28 - 0x20 - read-write - 0x00000000 - - - CHSEL18 - Channel-x selection - 18 - 1 - - - CHSEL17 - Channel-x selection - 17 - 1 - - - CHSEL16 - Channel-x selection - 16 - 1 - - - CHSEL15 - Channel-x selection - 15 - 1 - - - CHSEL14 - Channel-x selection - 14 - 1 - - - CHSEL13 - Channel-x selection - 13 - 1 - - - CHSEL12 - Channel-x selection - 12 - 1 - - - CHSEL11 - Channel-x selection - 11 - 1 - - - CHSEL10 - Channel-x selection - 10 - 1 - - - CHSEL9 - Channel-x selection - 9 - 1 - - - CHSEL8 - Channel-x selection - 8 - 1 - - - CHSEL7 - Channel-x selection - 7 - 1 - - - CHSEL6 - Channel-x selection - 6 - 1 - - - CHSEL5 - Channel-x selection - 5 - 1 - - - CHSEL4 - Channel-x selection - 4 - 1 - - - CHSEL3 - Channel-x selection - 3 - 1 - - - CHSEL2 - Channel-x selection - 2 - 1 - - - CHSEL1 - Channel-x selection - 1 - 1 - - - CHSEL0 - Channel-x selection - 0 - 1 - - - - - DR - DR - data register - 0x40 - 0x20 - read-only - 0x00000000 - - - DATA - Converted data - 0 - 16 - - - - - CCR - CCR - common configuration register - 0x308 - 0x20 - read-write - 0x00000000 - - - VBATEN - VBAT enable - 24 - 1 - - - TSEN - Temperature sensor enable - 23 - 1 - - - VREFEN - Temperature sensor and VREFINT - enable - 22 - 1 - - - - - - - USART1 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40013800 - - 0x0 - 0x400 - registers - - - USART1 - USART1 global interrupt - 27 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - UE - USART enable - 0 - 1 - - - UESM - USART enable in Stop mode - 1 - 1 - - - RE - Receiver enable - 2 - 1 - - - TE - Transmitter enable - 3 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - TXEIE - interrupt enable - 7 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - PS - Parity selection - 9 - 1 - - - PCE - Parity control enable - 10 - 1 - - - WAKE - Receiver wakeup method - 11 - 1 - - - M - Word length - 12 - 1 - - - MME - Mute mode enable - 13 - 1 - - - CMIE - Character match interrupt - enable - 14 - 1 - - - OVER8 - Oversampling mode - 15 - 1 - - - DEDT - Driver Enable deassertion - time - 16 - 5 - - - DEAT - Driver Enable assertion - time - 21 - 5 - - - RTOIE - Receiver timeout interrupt - enable - 26 - 1 - - - EOBIE - End of Block interrupt - enable - 27 - 1 - - - M1 - Word length - 28 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - ADD4 - Address of the USART node - 28 - 4 - - - ADD0 - Address of the USART node - 24 - 4 - - - RTOEN - Receiver timeout enable - 23 - 1 - - - ABRMOD - Auto baud rate mode - 21 - 2 - - - ABREN - Auto baud rate enable - 20 - 1 - - - MSBFIRST - Most significant bit first - 19 - 1 - - - DATAINV - Binary data inversion - 18 - 1 - - - TXINV - TX pin active level - inversion - 17 - 1 - - - RXINV - RX pin active level - inversion - 16 - 1 - - - SWAP - Swap TX/RX pins - 15 - 1 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - CLKEN - Clock enable - 11 - 1 - - - CPOL - Clock polarity - 10 - 1 - - - CPHA - Clock phase - 9 - 1 - - - LBCL - Last bit clock pulse - 8 - 1 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - LIN break detection length - 5 - 1 - - - ADDM7 - 7-bit Address Detection/4-bit Address - Detection - 4 - 1 - - - - - CR3 - CR3 - Control register 3 - 0x8 - 0x20 - read-write - 0x0000 - - - WUFIE - Wakeup from Stop mode interrupt - enable - 22 - 1 - - - WUS - Wakeup from Stop mode interrupt flag - selection - 20 - 2 - - - SCARCNT - Smartcard auto-retry count - 17 - 3 - - - DEP - Driver enable polarity - selection - 15 - 1 - - - DEM - Driver enable mode - 14 - 1 - - - DDRE - DMA Disable on Reception - Error - 13 - 1 - - - OVRDIS - Overrun Disable - 12 - 1 - - - ONEBIT - One sample bit method - enable - 11 - 1 - - - CTSIE - CTS interrupt enable - 10 - 1 - - - CTSE - CTS enable - 9 - 1 - - - RTSE - RTS enable - 8 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - SCEN - Smartcard mode enable - 5 - 1 - - - NACK - Smartcard NACK enable - 4 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - BRR - BRR - Baud rate register - 0xC - 0x20 - read-write - 0x0000 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - GTPR - GTPR - Guard time and prescaler - register - 0x10 - 0x20 - read-write - 0x0000 - - - GT - Guard time value - 8 - 8 - - - PSC - Prescaler value - 0 - 8 - - - - - RTOR - RTOR - Receiver timeout register - 0x14 - 0x20 - read-write - 0x0000 - - - BLEN - Block Length - 24 - 8 - - - RTO - Receiver timeout value - 0 - 24 - - - - - RQR - RQR - Request register - 0x18 - 0x20 - read-write - 0x0000 - - - TXFRQ - Transmit data flush - request - 4 - 1 - - - RXFRQ - Receive data flush request - 3 - 1 - - - MMRQ - Mute mode request - 2 - 1 - - - SBKRQ - Send break request - 1 - 1 - - - ABRRQ - Auto baud rate request - 0 - 1 - - - - - ISR - ISR - Interrupt & status - register - 0x1C - 0x20 - read-only - 0x00C0 - - - REACK - Receive enable acknowledge - flag - 22 - 1 - - - TEACK - Transmit enable acknowledge - flag - 21 - 1 - - - WUF - Wakeup from Stop mode flag - 20 - 1 - - - RWU - Receiver wakeup from Mute - mode - 19 - 1 - - - SBKF - Send break flag - 18 - 1 - - - CMF - character match flag - 17 - 1 - - - BUSY - Busy flag - 16 - 1 - - - ABRF - Auto baud rate flag - 15 - 1 - - - ABRE - Auto baud rate error - 14 - 1 - - - EOBF - End of block flag - 12 - 1 - - - RTOF - Receiver timeout - 11 - 1 - - - CTS - CTS flag - 10 - 1 - - - CTSIF - CTS interrupt flag - 9 - 1 - - - LBDF - LIN break detection flag - 8 - 1 - - - TXE - Transmit data register - empty - 7 - 1 - - - TC - Transmission complete - 6 - 1 - - - RXNE - Read data register not - empty - 5 - 1 - - - IDLE - Idle line detected - 4 - 1 - - - ORE - Overrun error - 3 - 1 - - - NF - Noise detected flag - 2 - 1 - - - FE - Framing error - 1 - 1 - - - PE - Parity error - 0 - 1 - - - - - ICR - ICR - Interrupt flag clear register - 0x20 - 0x20 - read-write - 0x0000 - - - WUCF - Wakeup from Stop mode clear - flag - 20 - 1 - - - CMCF - Character match clear flag - 17 - 1 - - - EOBCF - End of timeout clear flag - 12 - 1 - - - RTOCF - Receiver timeout clear - flag - 11 - 1 - - - CTSCF - CTS clear flag - 9 - 1 - - - LBDCF - LIN break detection clear - flag - 8 - 1 - - - TCCF - Transmission complete clear - flag - 6 - 1 - - - IDLECF - Idle line detected clear - flag - 4 - 1 - - - ORECF - Overrun error clear flag - 3 - 1 - - - NCF - Noise detected clear flag - 2 - 1 - - - FECF - Framing error clear flag - 1 - 1 - - - PECF - Parity error clear flag - 0 - 1 - - - - - RDR - RDR - Receive data register - 0x24 - 0x20 - read-only - 0x0000 - - - RDR - Receive data value - 0 - 9 - - - - - TDR - TDR - Transmit data register - 0x28 - 0x20 - read-write - 0x0000 - - - TDR - Transmit data value - 0 - 9 - - - - - - - USART2 - 0x40004400 - - USART2 - USART2 global interrupt - 28 - - - - USART3 - 0x40004800 - - USART3_4 - USART3 and USART4 global - interrupt - 29 - - - - USART4 - 0x40004C00 - - USART3_4 - USART3 and USART4 global - interrupt - 29 - - - - USART6 - 0x40011400 - - USART1 - USART1 global interrupt - 27 - - - - USART7 - 0x40011800 - - USART1 - USART1 global interrupt - 27 - - - - USART8 - 0x40011C00 - - USART1 - USART1 global interrupt - 27 - - - - COMP - Comparator - COMP - 0x4001001C - - 0x0 - 0x400 - registers - - - ADC_COMP - ADC and comparator interrupts - 12 - - - - CSR - CSR - control and status register - 0x0 - 0x20 - 0x00000000 - - - COMP1EN - Comparator 1 enable - 0 - 1 - read-write - - - COMP1_INP_DAC - COMP1_INP_DAC - 1 - 1 - read-write - - - COMP1MODE - Comparator 1 mode - 2 - 2 - read-write - - - COMP1INSEL - Comparator 1 inverting input - selection - 4 - 3 - read-write - - - COMP1OUTSEL - Comparator 1 output - selection - 8 - 3 - read-write - - - COMP1POL - Comparator 1 output - polarity - 11 - 1 - read-write - - - COMP1HYST - Comparator 1 hysteresis - 12 - 2 - read-write - - - COMP1OUT - Comparator 1 output - 14 - 1 - read-only - - - COMP1LOCK - Comparator 1 lock - 15 - 1 - read-write - - - COMP2EN - Comparator 2 enable - 16 - 1 - read-write - - - COMP2MODE - Comparator 2 mode - 18 - 2 - read-write - - - COMP2INSEL - Comparator 2 inverting input - selection - 20 - 3 - read-write - - - WNDWEN - Window mode enable - 23 - 1 - read-write - - - COMP2OUTSEL - Comparator 2 output - selection - 24 - 3 - read-write - - - COMP2POL - Comparator 2 output - polarity - 27 - 1 - read-write - - - COMP2HYST - Comparator 2 hysteresis - 28 - 2 - read-write - - - COMP2OUT - Comparator 2 output - 30 - 1 - read-only - - - COMP2LOCK - Comparator 2 lock - 31 - 1 - read-write - - - - - - - RTC - Real-time clock - RTC - 0x40002800 - - 0x0 - 0x400 - registers - - - RTC - RTC interrupts - 2 - - - - TR - TR - time register - 0x0 - 0x20 - read-write - 0x00000000 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - DR - DR - date register - 0x4 - 0x20 - read-write - 0x00002101 - - - YT - Year tens in BCD format - 20 - 4 - - - YU - Year units in BCD format - 16 - 4 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - CR - CR - control register - 0x8 - 0x20 - 0x00000000 - - - TSEDGE - Time-stamp event active - edge - 3 - 1 - read-write - - - REFCKON - RTC_REFIN reference clock detection - enable (50 or 60 Hz) - 4 - 1 - read-write - - - BYPSHAD - Bypass the shadow - registers - 5 - 1 - read-write - - - FMT - Hour format - 6 - 1 - read-write - - - ALRAE - Alarm A enable - 8 - 1 - read-write - - - TSE - timestamp enable - 11 - 1 - read-write - - - ALRAIE - Alarm A interrupt enable - 12 - 1 - read-write - - - TSIE - Time-stamp interrupt - enable - 15 - 1 - read-write - - - ADD1H - Add 1 hour (summer time - change) - 16 - 1 - write-only - - - SUB1H - Subtract 1 hour (winter time - change) - 17 - 1 - write-only - - - BKP - Backup - 18 - 1 - read-write - - - COSEL - Calibration output - selection - 19 - 1 - read-write - - - POL - Output polarity - 20 - 1 - read-write - - - OSEL - Output selection - 21 - 2 - read-write - - - COE - Calibration output enable - 23 - 1 - read-write - - - - - ISR - ISR - initialization and status - register - 0xC - 0x20 - 0x00000007 - - - ALRAWF - Alarm A write flag - 0 - 1 - read-only - - - SHPF - Shift operation pending - 3 - 1 - read-write - - - INITS - Initialization status flag - 4 - 1 - read-only - - - RSF - Registers synchronization - flag - 5 - 1 - read-write - - - INITF - Initialization flag - 6 - 1 - read-only - - - INIT - Initialization mode - 7 - 1 - read-write - - - ALRAF - Alarm A flag - 8 - 1 - read-write - - - TSF - Time-stamp flag - 11 - 1 - read-write - - - TSOVF - Time-stamp overflow flag - 12 - 1 - read-write - - - TAMP1F - RTC_TAMP1 detection flag - 13 - 1 - read-write - - - TAMP2F - RTC_TAMP2 detection flag - 14 - 1 - read-write - - - RECALPF - Recalibration pending Flag - 16 - 1 - read-only - - - - - PRER - PRER - prescaler register - 0x10 - 0x20 - read-write - 0x007F00FF - - - PREDIV_A - Asynchronous prescaler - factor - 16 - 7 - - - PREDIV_S - Synchronous prescaler - factor - 0 - 15 - - - - - ALRMAR - ALRMAR - alarm A register - 0x1C - 0x20 - read-write - 0x00000000 - - - MSK4 - Alarm A date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format. - 28 - 2 - - - DU - Date units or day in BCD - format. - 24 - 4 - - - MSK3 - Alarm A hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format. - 20 - 2 - - - HU - Hour units in BCD format. - 16 - 4 - - - MSK2 - Alarm A minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format. - 12 - 3 - - - MNU - Minute units in BCD - format. - 8 - 4 - - - MSK1 - Alarm A seconds mask - 7 - 1 - - - ST - Second tens in BCD format. - 4 - 3 - - - SU - Second units in BCD - format. - 0 - 4 - - - - - WPR - WPR - write protection register - 0x24 - 0x20 - write-only - 0x00000000 - - - KEY - Write protection key - 0 - 8 - - - - - SSR - SSR - sub second register - 0x28 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - SHIFTR - SHIFTR - shift control register - 0x2C - 0x20 - write-only - 0x00000000 - - - ADD1S - Reserved - 31 - 1 - - - SUBFS - Subtract a fraction of a - second - 0 - 15 - - - - - TSTR - TSTR - timestamp time register - 0x30 - 0x20 - read-only - 0x00000000 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format. - 20 - 2 - - - HU - Hour units in BCD format. - 16 - 4 - - - MNT - Minute tens in BCD format. - 12 - 3 - - - MNU - Minute units in BCD - format. - 8 - 4 - - - ST - Second tens in BCD format. - 4 - 3 - - - SU - Second units in BCD - format. - 0 - 4 - - - - - TSDR - TSDR - timestamp date register - 0x34 - 0x20 - read-only - 0x00000000 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - TSSSR - TSSSR - time-stamp sub second register - 0x38 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - CALR - CALR - calibration register - 0x3C - 0x20 - read-write - 0x00000000 - - - CALP - Use an 8-second calibration cycle - period - 15 - 1 - - - CALW8 - Use a 16-second calibration cycle - period - 14 - 1 - - - CALW16 - Reserved - 13 - 1 - - - CALM - Calibration minus - 0 - 9 - - - - - TAFCR - TAFCR - tamper and alternate function configuration - register - 0x40 - 0x20 - read-write - 0x00000000 - - - PC15MODE - PC15 mode - 23 - 1 - - - PC15VALUE - PC15 value - 22 - 1 - - - PC14MODE - PC14 mode - 21 - 1 - - - PC14VALUE - PC14 value - 20 - 1 - - - PC13MODE - PC13 mode - 19 - 1 - - - PC13VALUE - RTC_ALARM output type/PC13 - value - 18 - 1 - - - TAMP_PUDIS - RTC_TAMPx pull-up disable - 15 - 1 - - - TAMP_PRCH - RTC_TAMPx precharge - duration - 13 - 2 - - - TAMPFLT - RTC_TAMPx filter count - 11 - 2 - - - TAMPFREQ - Tamper sampling frequency - 8 - 3 - - - TAMPTS - Activate timestamp on tamper detection - event - 7 - 1 - - - TAMP2_TRG - Active level for RTC_TAMP2 - input - 4 - 1 - - - TAMP2E - RTC_TAMP2 input detection - enable - 3 - 1 - - - TAMPIE - Tamper interrupt enable - 2 - 1 - - - TAMP1TRG - Active level for RTC_TAMP1 - input - 1 - 1 - - - TAMP1E - RTC_TAMP1 input detection - enable - 0 - 1 - - - - - ALRMASSR - ALRMASSR - alarm A sub second register - 0x44 - 0x20 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - BKP0R - BKP0R - backup register - 0x50 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP1R - BKP1R - backup register - 0x54 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP2R - BKP2R - backup register - 0x58 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP3R - BKP3R - backup register - 0x5C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP4R - BKP4R - backup register - 0x60 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - - - TIM15 - General-purpose-timers - TIM - 0x40014000 - - 0x0 - 0x400 - registers - - - TIM15 - TIM15 global interrupt - 20 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM16 - General-purpose-timers - TIM - 0x40014400 - - 0x0 - 0x400 - registers - - - TIM16 - TIM16 global interrupt - 21 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM17 - 0x40014800 - - TIM17 - TIM17 global interrupt - 22 - - - - TSC - Touch sensing controller - TSC - 0x40024000 - - 0x0 - 0x400 - registers - - - TSC - Touch sensing interrupt - 8 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - CTPH - Charge transfer pulse high - 28 - 4 - - - CTPL - Charge transfer pulse low - 24 - 4 - - - SSD - Spread spectrum deviation - 17 - 7 - - - SSE - Spread spectrum enable - 16 - 1 - - - SSPSC - Spread spectrum prescaler - 15 - 1 - - - PGPSC - pulse generator prescaler - 12 - 3 - - - MCV - Max count value - 5 - 3 - - - IODEF - I/O Default mode - 4 - 1 - - - SYNCPOL - Synchronization pin - polarity - 3 - 1 - - - AM - Acquisition mode - 2 - 1 - - - START - Start a new acquisition - 1 - 1 - - - TSCE - Touch sensing controller - enable - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x4 - 0x20 - read-write - 0x00000000 - - - MCEIE - Max count error interrupt - enable - 1 - 1 - - - EOAIE - End of acquisition interrupt - enable - 0 - 1 - - - - - ICR - ICR - interrupt clear register - 0x8 - 0x20 - read-write - 0x00000000 - - - MCEIC - Max count error interrupt - clear - 1 - 1 - - - EOAIC - End of acquisition interrupt - clear - 0 - 1 - - - - - ISR - ISR - interrupt status register - 0xC - 0x20 - read-write - 0x00000000 - - - MCEF - Max count error flag - 1 - 1 - - - EOAF - End of acquisition flag - 0 - 1 - - - - - IOHCR - IOHCR - I/O hysteresis control - register - 0x10 - 0x20 - read-write - 0xFFFFFFFF - - - G6_IO4 - G6_IO4 Schmitt trigger hysteresis - mode - 23 - 1 - - - G6_IO3 - G6_IO3 Schmitt trigger hysteresis - mode - 22 - 1 - - - G6_IO2 - G6_IO2 Schmitt trigger hysteresis - mode - 21 - 1 - - - G6_IO1 - G6_IO1 Schmitt trigger hysteresis - mode - 20 - 1 - - - G5_IO4 - G5_IO4 Schmitt trigger hysteresis - mode - 19 - 1 - - - G5_IO3 - G5_IO3 Schmitt trigger hysteresis - mode - 18 - 1 - - - G5_IO2 - G5_IO2 Schmitt trigger hysteresis - mode - 17 - 1 - - - G5_IO1 - G5_IO1 Schmitt trigger hysteresis - mode - 16 - 1 - - - G4_IO4 - G4_IO4 Schmitt trigger hysteresis - mode - 15 - 1 - - - G4_IO3 - G4_IO3 Schmitt trigger hysteresis - mode - 14 - 1 - - - G4_IO2 - G4_IO2 Schmitt trigger hysteresis - mode - 13 - 1 - - - G4_IO1 - G4_IO1 Schmitt trigger hysteresis - mode - 12 - 1 - - - G3_IO4 - G3_IO4 Schmitt trigger hysteresis - mode - 11 - 1 - - - G3_IO3 - G3_IO3 Schmitt trigger hysteresis - mode - 10 - 1 - - - G3_IO2 - G3_IO2 Schmitt trigger hysteresis - mode - 9 - 1 - - - G3_IO1 - G3_IO1 Schmitt trigger hysteresis - mode - 8 - 1 - - - G2_IO4 - G2_IO4 Schmitt trigger hysteresis - mode - 7 - 1 - - - G2_IO3 - G2_IO3 Schmitt trigger hysteresis - mode - 6 - 1 - - - G2_IO2 - G2_IO2 Schmitt trigger hysteresis - mode - 5 - 1 - - - G2_IO1 - G2_IO1 Schmitt trigger hysteresis - mode - 4 - 1 - - - G1_IO4 - G1_IO4 Schmitt trigger hysteresis - mode - 3 - 1 - - - G1_IO3 - G1_IO3 Schmitt trigger hysteresis - mode - 2 - 1 - - - G1_IO2 - G1_IO2 Schmitt trigger hysteresis - mode - 1 - 1 - - - G1_IO1 - G1_IO1 Schmitt trigger hysteresis - mode - 0 - 1 - - - - - IOASCR - IOASCR - I/O analog switch control - register - 0x18 - 0x20 - read-write - 0x00000000 - - - G6_IO4 - G6_IO4 analog switch - enable - 23 - 1 - - - G6_IO3 - G6_IO3 analog switch - enable - 22 - 1 - - - G6_IO2 - G6_IO2 analog switch - enable - 21 - 1 - - - G6_IO1 - G6_IO1 analog switch - enable - 20 - 1 - - - G5_IO4 - G5_IO4 analog switch - enable - 19 - 1 - - - G5_IO3 - G5_IO3 analog switch - enable - 18 - 1 - - - G5_IO2 - G5_IO2 analog switch - enable - 17 - 1 - - - G5_IO1 - G5_IO1 analog switch - enable - 16 - 1 - - - G4_IO4 - G4_IO4 analog switch - enable - 15 - 1 - - - G4_IO3 - G4_IO3 analog switch - enable - 14 - 1 - - - G4_IO2 - G4_IO2 analog switch - enable - 13 - 1 - - - G4_IO1 - G4_IO1 analog switch - enable - 12 - 1 - - - G3_IO4 - G3_IO4 analog switch - enable - 11 - 1 - - - G3_IO3 - G3_IO3 analog switch - enable - 10 - 1 - - - G3_IO2 - G3_IO2 analog switch - enable - 9 - 1 - - - G3_IO1 - G3_IO1 analog switch - enable - 8 - 1 - - - G2_IO4 - G2_IO4 analog switch - enable - 7 - 1 - - - G2_IO3 - G2_IO3 analog switch - enable - 6 - 1 - - - G2_IO2 - G2_IO2 analog switch - enable - 5 - 1 - - - G2_IO1 - G2_IO1 analog switch - enable - 4 - 1 - - - G1_IO4 - G1_IO4 analog switch - enable - 3 - 1 - - - G1_IO3 - G1_IO3 analog switch - enable - 2 - 1 - - - G1_IO2 - G1_IO2 analog switch - enable - 1 - 1 - - - G1_IO1 - G1_IO1 analog switch - enable - 0 - 1 - - - - - IOSCR - IOSCR - I/O sampling control register - 0x20 - 0x20 - read-write - 0x00000000 - - - G6_IO4 - G6_IO4 sampling mode - 23 - 1 - - - G6_IO3 - G6_IO3 sampling mode - 22 - 1 - - - G6_IO2 - G6_IO2 sampling mode - 21 - 1 - - - G6_IO1 - G6_IO1 sampling mode - 20 - 1 - - - G5_IO4 - G5_IO4 sampling mode - 19 - 1 - - - G5_IO3 - G5_IO3 sampling mode - 18 - 1 - - - G5_IO2 - G5_IO2 sampling mode - 17 - 1 - - - G5_IO1 - G5_IO1 sampling mode - 16 - 1 - - - G4_IO4 - G4_IO4 sampling mode - 15 - 1 - - - G4_IO3 - G4_IO3 sampling mode - 14 - 1 - - - G4_IO2 - G4_IO2 sampling mode - 13 - 1 - - - G4_IO1 - G4_IO1 sampling mode - 12 - 1 - - - G3_IO4 - G3_IO4 sampling mode - 11 - 1 - - - G3_IO3 - G3_IO3 sampling mode - 10 - 1 - - - G3_IO2 - G3_IO2 sampling mode - 9 - 1 - - - G3_IO1 - G3_IO1 sampling mode - 8 - 1 - - - G2_IO4 - G2_IO4 sampling mode - 7 - 1 - - - G2_IO3 - G2_IO3 sampling mode - 6 - 1 - - - G2_IO2 - G2_IO2 sampling mode - 5 - 1 - - - G2_IO1 - G2_IO1 sampling mode - 4 - 1 - - - G1_IO4 - G1_IO4 sampling mode - 3 - 1 - - - G1_IO3 - G1_IO3 sampling mode - 2 - 1 - - - G1_IO2 - G1_IO2 sampling mode - 1 - 1 - - - G1_IO1 - G1_IO1 sampling mode - 0 - 1 - - - - - IOCCR - IOCCR - I/O channel control register - 0x28 - 0x20 - read-write - 0x00000000 - - - G6_IO4 - G6_IO4 channel mode - 23 - 1 - - - G6_IO3 - G6_IO3 channel mode - 22 - 1 - - - G6_IO2 - G6_IO2 channel mode - 21 - 1 - - - G6_IO1 - G6_IO1 channel mode - 20 - 1 - - - G5_IO4 - G5_IO4 channel mode - 19 - 1 - - - G5_IO3 - G5_IO3 channel mode - 18 - 1 - - - G5_IO2 - G5_IO2 channel mode - 17 - 1 - - - G5_IO1 - G5_IO1 channel mode - 16 - 1 - - - G4_IO4 - G4_IO4 channel mode - 15 - 1 - - - G4_IO3 - G4_IO3 channel mode - 14 - 1 - - - G4_IO2 - G4_IO2 channel mode - 13 - 1 - - - G4_IO1 - G4_IO1 channel mode - 12 - 1 - - - G3_IO4 - G3_IO4 channel mode - 11 - 1 - - - G3_IO3 - G3_IO3 channel mode - 10 - 1 - - - G3_IO2 - G3_IO2 channel mode - 9 - 1 - - - G3_IO1 - G3_IO1 channel mode - 8 - 1 - - - G2_IO4 - G2_IO4 channel mode - 7 - 1 - - - G2_IO3 - G2_IO3 channel mode - 6 - 1 - - - G2_IO2 - G2_IO2 channel mode - 5 - 1 - - - G2_IO1 - G2_IO1 channel mode - 4 - 1 - - - G1_IO4 - G1_IO4 channel mode - 3 - 1 - - - G1_IO3 - G1_IO3 channel mode - 2 - 1 - - - G1_IO2 - G1_IO2 channel mode - 1 - 1 - - - G1_IO1 - G1_IO1 channel mode - 0 - 1 - - - - - IOGCSR - IOGCSR - I/O group control status - register - 0x30 - 0x20 - 0x00000000 - - - G8S - Analog I/O group x status - 23 - 1 - read-write - - - G7S - Analog I/O group x status - 22 - 1 - read-write - - - G6S - Analog I/O group x status - 21 - 1 - read-only - - - G5S - Analog I/O group x status - 20 - 1 - read-only - - - G4S - Analog I/O group x status - 19 - 1 - read-only - - - G3S - Analog I/O group x status - 18 - 1 - read-only - - - G2S - Analog I/O group x status - 17 - 1 - read-only - - - G1S - Analog I/O group x status - 16 - 1 - read-only - - - G8E - Analog I/O group x enable - 7 - 1 - read-write - - - G7E - Analog I/O group x enable - 6 - 1 - read-write - - - G6E - Analog I/O group x enable - 5 - 1 - read-write - - - G5E - Analog I/O group x enable - 4 - 1 - read-write - - - G4E - Analog I/O group x enable - 3 - 1 - read-write - - - G3E - Analog I/O group x enable - 2 - 1 - read-write - - - G2E - Analog I/O group x enable - 1 - 1 - read-write - - - G1E - Analog I/O group x enable - 0 - 1 - read-write - - - - - IOG1CR - IOG1CR - I/O group x counter register - 0x34 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG2CR - IOG2CR - I/O group x counter register - 0x38 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG3CR - IOG3CR - I/O group x counter register - 0x3C - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG4CR - IOG4CR - I/O group x counter register - 0x40 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG5CR - IOG5CR - I/O group x counter register - 0x44 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG6CR - IOG6CR - I/O group x counter register - 0x48 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - - - CEC - HDMI-CEC controller - CEC - 0x40007800 - - 0x0 - 0x400 - registers - - - CEC_CAN - CEC and CAN global interrupt - 30 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - TXEOM - Tx End Of Message - 2 - 1 - - - TXSOM - Tx start of message - 1 - 1 - - - CECEN - CEC Enable - 0 - 1 - - - - - CFGR - CFGR - configuration register - 0x4 - 0x20 - read-write - 0x00000000 - - - LBPEGEN - Generate Error-Bit on Long Bit Period - Error - 11 - 1 - - - BREGEN - Generate error-bit on bit rising - error - 10 - 1 - - - BRESTP - Rx-stop on bit rising - error - 9 - 1 - - - RXTOL - Rx-Tolerance - 8 - 1 - - - SFT - Signal Free Time - 5 - 3 - - - LSTN - Listen mode - 4 - 1 - - - OAR - Own Address - 0 - 4 - - - - - TXDR - TXDR - Tx data register - 0x8 - 0x20 - write-only - 0x00000000 - - - TXD - Tx Data register - 0 - 8 - - - - - RXDR - RXDR - Rx Data Register - 0xC - 0x20 - read-only - 0x00000000 - - - RXDR - CEC Rx Data Register - 0 - 8 - - - - - ISR - ISR - Interrupt and Status Register - 0x10 - 0x20 - read-write - 0x00000000 - - - TXACKE - Tx-Missing acknowledge - error - 12 - 1 - - - TXERR - Tx-Error - 11 - 1 - - - TXUDR - Tx-Buffer Underrun - 10 - 1 - - - TXEND - End of Transmission - 9 - 1 - - - TXBR - Tx-Byte Request - 8 - 1 - - - ARBLST - Arbitration Lost - 7 - 1 - - - RXACKE - Rx-Missing Acknowledge - 6 - 1 - - - LBPE - Rx-Long Bit Period Error - 5 - 1 - - - SBPE - Rx-Short Bit period error - 4 - 1 - - - BRE - Rx-Bit rising error - 3 - 1 - - - RXOVR - Rx-Overrun - 2 - 1 - - - RXEND - End Of Reception - 1 - 1 - - - RXBR - Rx-Byte Received - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x14 - 0x20 - read-write - 0x00000000 - - - TXACKIE - Tx-Missing Acknowledge Error Interrupt - Enable - 12 - 1 - - - TXERRIE - Tx-Error Interrupt Enable - 11 - 1 - - - TXUDRIE - Tx-Underrun interrupt - enable - 10 - 1 - - - TXENDIE - Tx-End of message interrupt - enable - 9 - 1 - - - TXBRIE - Tx-Byte Request Interrupt - Enable - 8 - 1 - - - ARBLSTIE - Arbitration Lost Interrupt - Enable - 7 - 1 - - - RXACKIE - Rx-Missing Acknowledge Error Interrupt - Enable - 6 - 1 - - - LBPEIE - Long Bit Period Error Interrupt - Enable - 5 - 1 - - - SBPEIE - Short Bit Period Error Interrupt - Enable - 4 - 1 - - - BREIE - Bit Rising Error Interrupt - Enable - 3 - 1 - - - RXOVRIE - Rx-Buffer Overrun Interrupt - Enable - 2 - 1 - - - RXENDIE - End Of Reception Interrupt - Enable - 1 - 1 - - - RXBRIE - Rx-Byte Received Interrupt - Enable - 0 - 1 - - - - - - - Flash - Flash - Flash - 0x40022000 - - 0x0 - 0x400 - registers - - - FLASH - Flash global interrupt - 3 - - - - ACR - ACR - Flash access control register - 0x0 - 0x20 - 0x00000030 - - - LATENCY - LATENCY - 0 - 3 - read-write - - - PRFTBE - PRFTBE - 4 - 1 - read-write - - - PRFTBS - PRFTBS - 5 - 1 - read-only - - - - - KEYR - KEYR - Flash key register - 0x4 - 0x20 - write-only - 0x00000000 - - - FKEYR - Flash Key - 0 - 32 - - - - - OPTKEYR - OPTKEYR - Flash option key register - 0x8 - 0x20 - write-only - 0x00000000 - - - OPTKEYR - Option byte key - 0 - 32 - - - - - SR - SR - Flash status register - 0xC - 0x20 - 0x00000000 - - - EOP - End of operation - 5 - 1 - read-write - - - WRPRT - Write protection error - 4 - 1 - read-write - - - PGERR - Programming error - 2 - 1 - read-write - - - BSY - Busy - 0 - 1 - read-only - - - - - CR - CR - Flash control register - 0x10 - 0x20 - read-write - 0x00000080 - - - FORCE_OPTLOAD - Force option byte loading - 13 - 1 - - - EOPIE - End of operation interrupt - enable - 12 - 1 - - - ERRIE - Error interrupt enable - 10 - 1 - - - OPTWRE - Option bytes write enable - 9 - 1 - - - LOCK - Lock - 7 - 1 - - - STRT - Start - 6 - 1 - - - OPTER - Option byte erase - 5 - 1 - - - OPTPG - Option byte programming - 4 - 1 - - - MER - Mass erase - 2 - 1 - - - PER - Page erase - 1 - 1 - - - PG - Programming - 0 - 1 - - - - - AR - AR - Flash address register - 0x14 - 0x20 - write-only - 0x00000000 - - - FAR - Flash address - 0 - 32 - - - - - OBR - OBR - Option byte register - 0x1C - 0x20 - read-only - 0x03FFFFF2 - - - Data1 - Data1 - 24 - 8 - - - Data0 - Data0 - 16 - 8 - - - VDDA_MONITOR - VDDA_MONITOR - 13 - 1 - - - BOOT1 - BOOT1 - 12 - 1 - - - nRST_STDBY - nRST_STDBY - 10 - 1 - - - nRST_STOP - nRST_STOP - 9 - 1 - - - WDG_SW - WDG_SW - 8 - 1 - - - LEVEL2_PROT - Level 2 protection status - 2 - 1 - - - LEVEL1_PROT - Level 1 protection status - 1 - 1 - - - OPTERR - Option byte error - 0 - 1 - - - - - WRPR - WRPR - Write protection register - 0x20 - 0x20 - read-only - 0xFFFFFFFF - - - WRP - Write protect - 0 - 32 - - - - - - - DBGMCU - Debug support - DBGMCU - 0x40015800 - - 0x0 - 0x400 - registers - - - - IDCODE - IDCODE - MCU Device ID Code Register - 0x0 - 0x20 - read-only - 0x0 - - - DEV_ID - Device Identifier - 0 - 12 - - - DIV_ID - Division Identifier - 12 - 4 - - - REV_ID - Revision Identifier - 16 - 16 - - - - - CR - CR - Debug MCU Configuration - Register - 0x4 - 0x20 - read-write - 0x0 - - - DBG_STOP - Debug Stop Mode - 1 - 1 - - - DBG_STANDBY - Debug Standby Mode - 2 - 1 - - - - - APBLFZ - APBLFZ - APB Low Freeze Register - 0x8 - 0x20 - read-write - 0x0 - - - DBG_TIMER2_STOP - Debug Timer 2 stopped when Core is - halted - 0 - 1 - - - DBG_TIMER3_STOP - Debug Timer 3 stopped when Core is - halted - 1 - 1 - - - DBG_TIMER6_STOP - Debug Timer 6 stopped when Core is - halted - 4 - 1 - - - DBG_TIMER14_STOP - Debug Timer 14 stopped when Core is - halted - 8 - 1 - - - DBG_RTC_STOP - Debug RTC stopped when Core is - halted - 10 - 1 - - - DBG_WWDG_STOP - Debug Window Wachdog stopped when Core - is halted - 11 - 1 - - - DBG_IWDG_STOP - Debug Independent Wachdog stopped when - Core is halted - 12 - 1 - - - I2C1_SMBUS_TIMEOUT - SMBUS timeout mode stopped when Core is - halted - 21 - 1 - - - - - APBHFZ - APBHFZ - APB High Freeze Register - 0xC - 0x20 - read-write - 0x0 - - - DBG_TIMER1_STOP - Debug Timer 1 stopped when Core is - halted - 11 - 1 - - - DBG_TIMER15_STO - Debug Timer 15 stopped when Core is - halted - 16 - 1 - - - DBG_TIMER16_STO - Debug Timer 16 stopped when Core is - halted - 17 - 1 - - - DBG_TIMER17_STO - Debug Timer 17 stopped when Core is - halted - 18 - 1 - - - - - - - USB - Universal serial bus full-speed device - interface - USB - 0x40005C00 - - 0x0 - 0x400 - registers - - - USB - USB global interrupt - 31 - - - - EP0R - EP0R - endpoint 0 register - 0x0 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP1R - EP1R - endpoint 1 register - 0x4 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP2R - EP2R - endpoint 2 register - 0x8 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP3R - EP3R - endpoint 3 register - 0xC - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP4R - EP4R - endpoint 4 register - 0x10 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP5R - EP5R - endpoint 5 register - 0x14 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP6R - EP6R - endpoint 6 register - 0x18 - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - EP7R - EP7R - endpoint 7 register - 0x1C - 0x20 - read-write - 0x00000000 - - - EA - Endpoint address - 0 - 4 - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - - - EP_KIND - Endpoint kind - 8 - 1 - - - EP_TYPE - Endpoint type - 9 - 2 - - - SETUP - Setup transaction - completed - 11 - 1 - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - - - CTR_RX - Correct transfer for - reception - 15 - 1 - - - - - CNTR - CNTR - control register - 0x40 - 0x20 - read-write - 0x00000003 - - - FRES - Force USB Reset - 0 - 1 - - - PDWN - Power down - 1 - 1 - - - LPMODE - Low-power mode - 2 - 1 - - - FSUSP - Force suspend - 3 - 1 - - - RESUME - Resume request - 4 - 1 - - - L1RESUME - LPM L1 Resume request - 5 - 1 - - - L1REQM - LPM L1 state request interrupt - mask - 7 - 1 - - - ESOFM - Expected start of frame interrupt - mask - 8 - 1 - - - SOFM - Start of frame interrupt - mask - 9 - 1 - - - RESETM - USB reset interrupt mask - 10 - 1 - - - SUSPM - Suspend mode interrupt - mask - 11 - 1 - - - WKUPM - Wakeup interrupt mask - 12 - 1 - - - ERRM - Error interrupt mask - 13 - 1 - - - PMAOVRM - Packet memory area over / underrun - interrupt mask - 14 - 1 - - - CTRM - Correct transfer interrupt - mask - 15 - 1 - - - - - ISTR - ISTR - interrupt status register - 0x44 - 0x20 - 0x00000000 - - - EP_ID - Endpoint Identifier - 0 - 4 - read-only - - - DIR - Direction of transaction - 4 - 1 - read-only - - - L1REQ - LPM L1 state request - 7 - 1 - read-write - - - ESOF - Expected start frame - 8 - 1 - read-write - - - SOF - start of frame - 9 - 1 - read-write - - - RESET - reset request - 10 - 1 - read-write - - - SUSP - Suspend mode request - 11 - 1 - read-write - - - WKUP - Wakeup - 12 - 1 - read-write - - - ERR - Error - 13 - 1 - read-write - - - PMAOVR - Packet memory area over / - underrun - 14 - 1 - read-write - - - CTR - Correct transfer - 15 - 1 - read-only - - - - - FNR - FNR - frame number register - 0x48 - 0x20 - read-only - 0x0000 - - - FN - Frame number - 0 - 11 - - - LSOF - Lost SOF - 11 - 2 - - - LCK - Locked - 13 - 1 - - - RXDM - Receive data - line status - 14 - 1 - - - RXDP - Receive data + line status - 15 - 1 - - - - - DADDR - DADDR - device address - 0x4C - 0x20 - read-write - 0x0000 - - - ADD - Device address - 0 - 7 - - - EF - Enable function - 7 - 1 - - - - - BTABLE - BTABLE - Buffer table address - 0x50 - 0x20 - read-write - 0x0000 - - - BTABLE - Buffer table - 3 - 13 - - - - - LPMCSR - LPMCSR - LPM control and status - register - 0x54 - 0x20 - 0x0000 - - - LPMEN - LPM support enable - 0 - 1 - read-write - - - LPMACK - LPM Token acknowledge - enable - 1 - 1 - read-write - - - REMWAKE - bRemoteWake value - 3 - 1 - read-only - - - BESL - BESL value - 4 - 4 - read-only - - - - - BCDR - BCDR - Battery charging detector - 0x58 - 0x20 - 0x0000 - - - BCDEN - Battery charging detector (BCD) - enable - 0 - 1 - read-write - - - DCDEN - Data contact detection (DCD) mode - enable - 1 - 1 - read-write - - - PDEN - Primary detection (PD) mode - enable - 2 - 1 - read-write - - - SDEN - Secondary detection (SD) mode - enable - 3 - 1 - read-write - - - DCDET - Data contact detection (DCD) - status - 4 - 1 - read-only - - - PDET - Primary detection (PD) - status - 5 - 1 - read-only - - - SDET - Secondary detection (SD) - status - 6 - 1 - read-only - - - PS2DET - DM pull-up detection - status - 7 - 1 - read-only - - - DPPU - DP pull-up control - 15 - 1 - read-write - - - - - - - CRS - Clock recovery system - CRS - 0x40006C00 - - 0x0 - 0x400 - registers - - - RCC_CRS - RCC and CRS global interrupts - 4 - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00002000 - - - TRIM - HSI48 oscillator smooth - trimming - 8 - 6 - - - SWSYNC - Generate software SYNC - event - 7 - 1 - - - AUTOTRIMEN - Automatic trimming enable - 6 - 1 - - - CEN - Frequency error counter - enable - 5 - 1 - - - ESYNCIE - Expected SYNC interrupt - enable - 3 - 1 - - - ERRIE - Synchronization or trimming error - interrupt enable - 2 - 1 - - - SYNCWARNIE - SYNC warning interrupt - enable - 1 - 1 - - - SYNCOKIE - SYNC event OK interrupt - enable - 0 - 1 - - - - - CFGR - CFGR - configuration register - 0x4 - 0x20 - read-write - 0x2022BB7F - - - SYNCPOL - SYNC polarity selection - 31 - 1 - - - SYNCSRC - SYNC signal source - selection - 28 - 2 - - - SYNCDIV - SYNC divider - 24 - 3 - - - FELIM - Frequency error limit - 16 - 8 - - - RELOAD - Counter reload value - 0 - 16 - - - - - ISR - ISR - interrupt and status register - 0x8 - 0x20 - read-only - 0x00000000 - - - FECAP - Frequency error capture - 16 - 16 - - - FEDIR - Frequency error direction - 15 - 1 - - - TRIMOVF - Trimming overflow or - underflow - 10 - 1 - - - SYNCMISS - SYNC missed - 9 - 1 - - - SYNCERR - SYNC error - 8 - 1 - - - ESYNCF - Expected SYNC flag - 3 - 1 - - - ERRF - Error flag - 2 - 1 - - - SYNCWARNF - SYNC warning flag - 1 - 1 - - - SYNCOKF - SYNC event OK flag - 0 - 1 - - - - - ICR - ICR - interrupt flag clear register - 0xC - 0x20 - read-write - 0x00000000 - - - ESYNCC - Expected SYNC clear flag - 3 - 1 - - - ERRC - Error clear flag - 2 - 1 - - - SYNCWARNC - SYNC warning clear flag - 1 - 1 - - - SYNCOKC - SYNC event OK clear flag - 0 - 1 - - - - - - - CAN - Controller area network - CAN - 0x40006400 - - 0x0 - 0x400 - registers - - - CEC_CAN - CEC and CAN global interrupt - 30 - - - - CAN_MCR - CAN_MCR - CAN_MCR - 0x0 - 0x20 - read-write - 0x00000000 - - - DBF - DBF - 16 - 1 - - - RESET - RESET - 15 - 1 - - - TTCM - TTCM - 7 - 1 - - - ABOM - ABOM - 6 - 1 - - - AWUM - AWUM - 5 - 1 - - - NART - NART - 4 - 1 - - - RFLM - RFLM - 3 - 1 - - - TXFP - TXFP - 2 - 1 - - - SLEEP - SLEEP - 1 - 1 - - - INRQ - INRQ - 0 - 1 - - - - - CAN_MSR - CAN_MSR - CAN_MSR - 0x4 - 0x20 - 0x00000000 - - - RX - RX - 11 - 1 - read-only - - - SAMP - SAMP - 10 - 1 - read-only - - - RXM - RXM - 9 - 1 - read-only - - - TXM - TXM - 8 - 1 - read-only - - - SLAKI - SLAKI - 4 - 1 - read-write - - - WKUI - WKUI - 3 - 1 - read-write - - - ERRI - ERRI - 2 - 1 - read-write - - - SLAK - SLAK - 1 - 1 - read-only - - - INAK - INAK - 0 - 1 - read-only - - - - - CAN_TSR - CAN_TSR - CAN_TSR - 0x8 - 0x20 - 0x00000000 - - - LOW2 - Lowest priority flag for mailbox - 2 - 31 - 1 - read-only - - - LOW1 - Lowest priority flag for mailbox - 1 - 30 - 1 - read-only - - - LOW0 - Lowest priority flag for mailbox - 0 - 29 - 1 - read-only - - - TME2 - Lowest priority flag for mailbox - 2 - 28 - 1 - read-only - - - TME1 - Lowest priority flag for mailbox - 1 - 27 - 1 - read-only - - - TME0 - Lowest priority flag for mailbox - 0 - 26 - 1 - read-only - - - CODE - CODE - 24 - 2 - read-only - - - ABRQ2 - ABRQ2 - 23 - 1 - read-write - - - TERR2 - TERR2 - 19 - 1 - read-write - - - ALST2 - ALST2 - 18 - 1 - read-write - - - TXOK2 - TXOK2 - 17 - 1 - read-write - - - RQCP2 - RQCP2 - 16 - 1 - read-write - - - ABRQ1 - ABRQ1 - 15 - 1 - read-write - - - TERR1 - TERR1 - 11 - 1 - read-write - - - ALST1 - ALST1 - 10 - 1 - read-write - - - TXOK1 - TXOK1 - 9 - 1 - read-write - - - RQCP1 - RQCP1 - 8 - 1 - read-write - - - ABRQ0 - ABRQ0 - 7 - 1 - read-write - - - TERR0 - TERR0 - 3 - 1 - read-write - - - ALST0 - ALST0 - 2 - 1 - read-write - - - TXOK0 - TXOK0 - 1 - 1 - read-write - - - RQCP0 - RQCP0 - 0 - 1 - read-write - - - - - CAN_RF0R - CAN_RF0R - CAN_RF0R - 0xC - 0x20 - 0x00000000 - - - RFOM0 - RFOM0 - 5 - 1 - read-write - - - FOVR0 - FOVR0 - 4 - 1 - read-write - - - FULL0 - FULL0 - 3 - 1 - read-write - - - FMP0 - FMP0 - 0 - 2 - read-only - - - - - CAN_RF1R - CAN_RF1R - CAN_RF1R - 0x10 - 0x20 - 0x00000000 - - - RFOM1 - RFOM1 - 5 - 1 - read-write - - - FOVR1 - FOVR1 - 4 - 1 - read-write - - - FULL1 - FULL1 - 3 - 1 - read-write - - - FMP1 - FMP1 - 0 - 2 - read-only - - - - - CAN_IER - CAN_IER - CAN_IER - 0x14 - 0x20 - read-write - 0x00000000 - - - SLKIE - SLKIE - 17 - 1 - - - WKUIE - WKUIE - 16 - 1 - - - ERRIE - ERRIE - 15 - 1 - - - LECIE - LECIE - 11 - 1 - - - BOFIE - BOFIE - 10 - 1 - - - EPVIE - EPVIE - 9 - 1 - - - EWGIE - EWGIE - 8 - 1 - - - FOVIE1 - FOVIE1 - 6 - 1 - - - FFIE1 - FFIE1 - 5 - 1 - - - FMPIE1 - FMPIE1 - 4 - 1 - - - FOVIE0 - FOVIE0 - 3 - 1 - - - FFIE0 - FFIE0 - 2 - 1 - - - FMPIE0 - FMPIE0 - 1 - 1 - - - TMEIE - TMEIE - 0 - 1 - - - - - CAN_ESR - CAN_ESR - CAN_ESR - 0x18 - 0x20 - 0x00000000 - - - REC - REC - 24 - 8 - read-only - - - TEC - TEC - 16 - 8 - read-only - - - LEC - LEC - 4 - 3 - read-write - - - BOFF - BOFF - 2 - 1 - read-only - - - EPVF - EPVF - 1 - 1 - read-only - - - EWGF - EWGF - 0 - 1 - read-only - - - - - CAN_BTR - CAN_BTR - CAN_BTR - 0x1C - 0x20 - read-write - 0x00000000 - - - SILM - SILM - 31 - 1 - - - LBKM - LBKM - 30 - 1 - - - SJW - SJW - 24 - 2 - - - TS2 - TS2 - 20 - 3 - - - TS1 - TS1 - 16 - 4 - - - BRP - BRP - 0 - 10 - - - - - CAN_TI0R - CAN_TI0R - CAN_TI0R - 0x180 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT0R - CAN_TDT0R - CAN_TDT0R - 0x184 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL0R - CAN_TDL0R - CAN_TDL0R - 0x188 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH0R - CAN_TDH0R - CAN_TDH0R - 0x18C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_TI1R - CAN_TI1R - CAN_TI1R - 0x190 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT1R - CAN_TDT1R - CAN_TDT1R - 0x194 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL1R - CAN_TDL1R - CAN_TDL1R - 0x198 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH1R - CAN_TDH1R - CAN_TDH1R - 0x19C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_TI2R - CAN_TI2R - CAN_TI2R - 0x1A0 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - CAN_TDT2R - CAN_TDT2R - CAN_TDT2R - 0x1A4 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - CAN_TDL2R - CAN_TDL2R - CAN_TDL2R - 0x1A8 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_TDH2R - CAN_TDH2R - CAN_TDH2R - 0x1AC - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_RI0R - CAN_RI0R - CAN_RI0R - 0x1B0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - CAN_RDT0R - CAN_RDT0R - CAN_RDT0R - 0x1B4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - CAN_RDL0R - CAN_RDL0R - CAN_RDL0R - 0x1B8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_RDH0R - CAN_RDH0R - CAN_RDH0R - 0x1BC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_RI1R - CAN_RI1R - CAN_RI1R - 0x1C0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - CAN_RDT1R - CAN_RDT1R - CAN_RDT1R - 0x1C4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - CAN_RDL1R - CAN_RDL1R - CAN_RDL1R - 0x1C8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - CAN_RDH1R - CAN_RDH1R - CAN_RDH1R - 0x1CC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - CAN_FMR - CAN_FMR - CAN_FMR - 0x200 - 0x20 - read-write - 0x00000000 - - - CAN2SB - CAN2SB - 8 - 6 - - - FINIT - FINIT - 0 - 1 - - - - - CAN_FM1R - CAN_FM1R - CAN_FM1R - 0x204 - 0x20 - read-write - 0x00000000 - - - FBM0 - Filter mode - 0 - 1 - - - FBM1 - Filter mode - 1 - 1 - - - FBM2 - Filter mode - 2 - 1 - - - FBM3 - Filter mode - 3 - 1 - - - FBM4 - Filter mode - 4 - 1 - - - FBM5 - Filter mode - 5 - 1 - - - FBM6 - Filter mode - 6 - 1 - - - FBM7 - Filter mode - 7 - 1 - - - FBM8 - Filter mode - 8 - 1 - - - FBM9 - Filter mode - 9 - 1 - - - FBM10 - Filter mode - 10 - 1 - - - FBM11 - Filter mode - 11 - 1 - - - FBM12 - Filter mode - 12 - 1 - - - FBM13 - Filter mode - 13 - 1 - - - FBM14 - Filter mode - 14 - 1 - - - FBM15 - Filter mode - 15 - 1 - - - FBM16 - Filter mode - 16 - 1 - - - FBM17 - Filter mode - 17 - 1 - - - FBM18 - Filter mode - 18 - 1 - - - FBM19 - Filter mode - 19 - 1 - - - FBM20 - Filter mode - 20 - 1 - - - FBM21 - Filter mode - 21 - 1 - - - FBM22 - Filter mode - 22 - 1 - - - FBM23 - Filter mode - 23 - 1 - - - FBM24 - Filter mode - 24 - 1 - - - FBM25 - Filter mode - 25 - 1 - - - FBM26 - Filter mode - 26 - 1 - - - FBM27 - Filter mode - 27 - 1 - - - - - CAN_FS1R - CAN_FS1R - CAN_FS1R - 0x20C - 0x20 - read-write - 0x00000000 - - - FSC0 - Filter scale configuration - 0 - 1 - - - FSC1 - Filter scale configuration - 1 - 1 - - - FSC2 - Filter scale configuration - 2 - 1 - - - FSC3 - Filter scale configuration - 3 - 1 - - - FSC4 - Filter scale configuration - 4 - 1 - - - FSC5 - Filter scale configuration - 5 - 1 - - - FSC6 - Filter scale configuration - 6 - 1 - - - FSC7 - Filter scale configuration - 7 - 1 - - - FSC8 - Filter scale configuration - 8 - 1 - - - FSC9 - Filter scale configuration - 9 - 1 - - - FSC10 - Filter scale configuration - 10 - 1 - - - FSC11 - Filter scale configuration - 11 - 1 - - - FSC12 - Filter scale configuration - 12 - 1 - - - FSC13 - Filter scale configuration - 13 - 1 - - - FSC14 - Filter scale configuration - 14 - 1 - - - FSC15 - Filter scale configuration - 15 - 1 - - - FSC16 - Filter scale configuration - 16 - 1 - - - FSC17 - Filter scale configuration - 17 - 1 - - - FSC18 - Filter scale configuration - 18 - 1 - - - FSC19 - Filter scale configuration - 19 - 1 - - - FSC20 - Filter scale configuration - 20 - 1 - - - FSC21 - Filter scale configuration - 21 - 1 - - - FSC22 - Filter scale configuration - 22 - 1 - - - FSC23 - Filter scale configuration - 23 - 1 - - - FSC24 - Filter scale configuration - 24 - 1 - - - FSC25 - Filter scale configuration - 25 - 1 - - - FSC26 - Filter scale configuration - 26 - 1 - - - FSC27 - Filter scale configuration - 27 - 1 - - - - - CAN_FFA1R - CAN_FFA1R - CAN_FFA1R - 0x214 - 0x20 - read-write - 0x00000000 - - - FFA0 - Filter FIFO assignment for filter - 0 - 0 - 1 - - - FFA1 - Filter FIFO assignment for filter - 1 - 1 - 1 - - - FFA2 - Filter FIFO assignment for filter - 2 - 2 - 1 - - - FFA3 - Filter FIFO assignment for filter - 3 - 3 - 1 - - - FFA4 - Filter FIFO assignment for filter - 4 - 4 - 1 - - - FFA5 - Filter FIFO assignment for filter - 5 - 5 - 1 - - - FFA6 - Filter FIFO assignment for filter - 6 - 6 - 1 - - - FFA7 - Filter FIFO assignment for filter - 7 - 7 - 1 - - - FFA8 - Filter FIFO assignment for filter - 8 - 8 - 1 - - - FFA9 - Filter FIFO assignment for filter - 9 - 9 - 1 - - - FFA10 - Filter FIFO assignment for filter - 10 - 10 - 1 - - - FFA11 - Filter FIFO assignment for filter - 11 - 11 - 1 - - - FFA12 - Filter FIFO assignment for filter - 12 - 12 - 1 - - - FFA13 - Filter FIFO assignment for filter - 13 - 13 - 1 - - - FFA14 - Filter FIFO assignment for filter - 14 - 14 - 1 - - - FFA15 - Filter FIFO assignment for filter - 15 - 15 - 1 - - - FFA16 - Filter FIFO assignment for filter - 16 - 16 - 1 - - - FFA17 - Filter FIFO assignment for filter - 17 - 17 - 1 - - - FFA18 - Filter FIFO assignment for filter - 18 - 18 - 1 - - - FFA19 - Filter FIFO assignment for filter - 19 - 19 - 1 - - - FFA20 - Filter FIFO assignment for filter - 20 - 20 - 1 - - - FFA21 - Filter FIFO assignment for filter - 21 - 21 - 1 - - - FFA22 - Filter FIFO assignment for filter - 22 - 22 - 1 - - - FFA23 - Filter FIFO assignment for filter - 23 - 23 - 1 - - - FFA24 - Filter FIFO assignment for filter - 24 - 24 - 1 - - - FFA25 - Filter FIFO assignment for filter - 25 - 25 - 1 - - - FFA26 - Filter FIFO assignment for filter - 26 - 26 - 1 - - - FFA27 - Filter FIFO assignment for filter - 27 - 27 - 1 - - - - - CAN_FA1R - CAN_FA1R - CAN_FA1R - 0x21C - 0x20 - read-write - 0x00000000 - - - FACT0 - Filter active - 0 - 1 - - - FACT1 - Filter active - 1 - 1 - - - FACT2 - Filter active - 2 - 1 - - - FACT3 - Filter active - 3 - 1 - - - FACT4 - Filter active - 4 - 1 - - - FACT5 - Filter active - 5 - 1 - - - FACT6 - Filter active - 6 - 1 - - - FACT7 - Filter active - 7 - 1 - - - FACT8 - Filter active - 8 - 1 - - - FACT9 - Filter active - 9 - 1 - - - FACT10 - Filter active - 10 - 1 - - - FACT11 - Filter active - 11 - 1 - - - FACT12 - Filter active - 12 - 1 - - - FACT13 - Filter active - 13 - 1 - - - FACT14 - Filter active - 14 - 1 - - - FACT15 - Filter active - 15 - 1 - - - FACT16 - Filter active - 16 - 1 - - - FACT17 - Filter active - 17 - 1 - - - FACT18 - Filter active - 18 - 1 - - - FACT19 - Filter active - 19 - 1 - - - FACT20 - Filter active - 20 - 1 - - - FACT21 - Filter active - 21 - 1 - - - FACT22 - Filter active - 22 - 1 - - - FACT23 - Filter active - 23 - 1 - - - FACT24 - Filter active - 24 - 1 - - - FACT25 - Filter active - 25 - 1 - - - FACT26 - Filter active - 26 - 1 - - - FACT27 - Filter active - 27 - 1 - - - - - F0R1 - F0R1 - Filter bank 0 register 1 - 0x240 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F0R2 - F0R2 - Filter bank 0 register 2 - 0x244 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R1 - F1R1 - Filter bank 1 register 1 - 0x248 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R2 - F1R2 - Filter bank 1 register 2 - 0x24C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R1 - F2R1 - Filter bank 2 register 1 - 0x250 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R2 - F2R2 - Filter bank 2 register 2 - 0x254 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R1 - F3R1 - Filter bank 3 register 1 - 0x258 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R2 - F3R2 - Filter bank 3 register 2 - 0x25C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R1 - F4R1 - Filter bank 4 register 1 - 0x260 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R2 - F4R2 - Filter bank 4 register 2 - 0x264 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R1 - F5R1 - Filter bank 5 register 1 - 0x268 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R2 - F5R2 - Filter bank 5 register 2 - 0x26C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R1 - F6R1 - Filter bank 6 register 1 - 0x270 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R2 - F6R2 - Filter bank 6 register 2 - 0x274 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R1 - F7R1 - Filter bank 7 register 1 - 0x278 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R2 - F7R2 - Filter bank 7 register 2 - 0x27C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R1 - F8R1 - Filter bank 8 register 1 - 0x280 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R2 - F8R2 - Filter bank 8 register 2 - 0x284 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R1 - F9R1 - Filter bank 9 register 1 - 0x288 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R2 - F9R2 - Filter bank 9 register 2 - 0x28C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R1 - F10R1 - Filter bank 10 register 1 - 0x290 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R2 - F10R2 - Filter bank 10 register 2 - 0x294 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R1 - F11R1 - Filter bank 11 register 1 - 0x298 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R2 - F11R2 - Filter bank 11 register 2 - 0x29C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R1 - F12R1 - Filter bank 4 register 1 - 0x2A0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R2 - F12R2 - Filter bank 12 register 2 - 0x2A4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R1 - F13R1 - Filter bank 13 register 1 - 0x2A8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R2 - F13R2 - Filter bank 13 register 2 - 0x2AC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R1 - F14R1 - Filter bank 14 register 1 - 0x2B0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R2 - F14R2 - Filter bank 14 register 2 - 0x2B4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R1 - F15R1 - Filter bank 15 register 1 - 0x2B8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R2 - F15R2 - Filter bank 15 register 2 - 0x2BC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R1 - F16R1 - Filter bank 16 register 1 - 0x2C0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R2 - F16R2 - Filter bank 16 register 2 - 0x2C4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R1 - F17R1 - Filter bank 17 register 1 - 0x2C8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R2 - F17R2 - Filter bank 17 register 2 - 0x2CC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R1 - F18R1 - Filter bank 18 register 1 - 0x2D0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R2 - F18R2 - Filter bank 18 register 2 - 0x2D4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R1 - F19R1 - Filter bank 19 register 1 - 0x2D8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R2 - F19R2 - Filter bank 19 register 2 - 0x2DC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R1 - F20R1 - Filter bank 20 register 1 - 0x2E0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R2 - F20R2 - Filter bank 20 register 2 - 0x2E4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R1 - F21R1 - Filter bank 21 register 1 - 0x2E8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R2 - F21R2 - Filter bank 21 register 2 - 0x2EC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R1 - F22R1 - Filter bank 22 register 1 - 0x2F0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R2 - F22R2 - Filter bank 22 register 2 - 0x2F4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R1 - F23R1 - Filter bank 23 register 1 - 0x2F8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R2 - F23R2 - Filter bank 23 register 2 - 0x2FC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R1 - F24R1 - Filter bank 24 register 1 - 0x300 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R2 - F24R2 - Filter bank 24 register 2 - 0x304 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R1 - F25R1 - Filter bank 25 register 1 - 0x308 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R2 - F25R2 - Filter bank 25 register 2 - 0x30C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R1 - F26R1 - Filter bank 26 register 1 - 0x310 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter 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Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - - - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.depend b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.depend deleted file mode 100644 index 3762bc39..00000000 --- a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.depend +++ /dev/null @@ -1,788 +0,0 @@ -# depslib dependency file v1.0 -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_adc.c - "stm32f0xx_adc.h" - "stm32f0xx_rcc.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_adc.h - "stm32f0xx.h" - -1417710862 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\stm32f0xx.h - "core_cm0.h" - "system_stm32f0xx.h" - - "stm32f0xx_conf.h" - -1417516674 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\cmsis\core_cm0.h - - - - -1417516674 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\cmsis\core_cminstr.h - - - -1417516674 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\cmsis\core_cmfunc.h - - - -1417714462 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\system_stm32f0xx.h - -1417516578 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\stm32f0xx_conf.h - "stm32f0xx_adc.h" - "stm32f0xx_can.h" - "stm32f0xx_cec.h" - "stm32f0xx_comp.h" - "stm32f0xx_crc.h" - "stm32f0xx_crs.h" - "stm32f0xx_dac.h" - "stm32f0xx_dbgmcu.h" - "stm32f0xx_dma.h" - "stm32f0xx_exti.h" - "stm32f0xx_flash.h" - "stm32f0xx_gpio.h" - "stm32f0xx_i2c.h" - "stm32f0xx_iwdg.h" - "stm32f0xx_pwr.h" - "stm32f0xx_rcc.h" - "stm32f0xx_rtc.h" - "stm32f0xx_spi.h" - "stm32f0xx_syscfg.h" - "stm32f0xx_tim.h" - "stm32f0xx_usart.h" - "stm32f0xx_wwdg.h" - "stm32f0xx_misc.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_can.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_cec.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_comp.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_crc.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_crs.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_dac.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_dbgmcu.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_dma.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_exti.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_flash.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_gpio.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_i2c.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_iwdg.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_pwr.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_rcc.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_rtc.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_spi.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_syscfg.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_tim.h - "stm32f0xx.h" - -1417710865 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_usart.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_wwdg.h - "stm32f0xx.h" - -1417710864 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\inc\stm32f0xx_misc.h - "stm32f0xx.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_can.c - "stm32f0xx_can.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_cec.c - "stm32f0xx_cec.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_comp.c - "stm32f0xx_comp.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_crc.c - "stm32f0xx_crc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_crs.c - "stm32f0xx_crs.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_dac.c - "stm32f0xx_dac.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_dbgmcu.c - "stm32f0xx_dbgmcu.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_dma.c - "stm32f0xx_dma.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_exti.c - "stm32f0xx_exti.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_flash.c - "stm32f0xx_flash.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_gpio.c - "stm32f0xx_gpio.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_i2c.c - "stm32f0xx_i2c.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_iwdg.c - "stm32f0xx_iwdg.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_misc.c - "stm32f0xx_misc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_pwr.c - "stm32f0xx_pwr.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_rcc.c - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_rtc.c - "stm32f0xx_rtc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_spi.c - "stm32f0xx_spi.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_syscfg.c - "stm32f0xx_syscfg.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_tim.c - "stm32f0xx_tim.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_usart.c - "stm32f0xx_usart.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\spl\src\stm32f0xx_wwdg.c - "stm32f0xx_wwdg.h" - "stm32f0xx_rcc.h" - -1479203609 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\src\app\app.c - "header.h" - -1461835068 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\header.h - - - "os.h" - "hw.h" - "app.h" - -1452182352 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\os\os.h - -1461835274 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\hw.h - "stm32f0xx_conf.h" - "led.h" - -1452182499 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\led.h - -1452182185 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\app\app.h - "assert.h" - -1452181838 c:\users\voorburg\desktop\stm32f091_emblocks_os\src\app\assert.h - -1452181962 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\src\app\assert.c - "header.h" - -1461835384 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\hw.c - "header.h" - -1471419376 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\startup_stm32f0xx.s - -1471422675 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\system_stm32f0xx.c - "stm32f0xx.h" - -1452182352 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\src\os\os.c - "os.h" - -1471421727 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\src\hw\led.c - "header.h" - -1417710862 c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\system_stm32f0xx.h - -1471419075 source:c:\users\voorburg\desktop\stm32f091_emblocks_os\lib\system_stm32f0xx.c - "stm32f0xx.h" - -1479205364 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\boot\hooks.c - "boot.h" - "led.h" - "stm32f0xx.h" - -1477216154 c:\work\software\openblt\target\source\boot.h - "types.h" - "assert.h" - "blt_conf.h" - "plausibility.h" - "cpu.h" - "cop.h" - "nvm.h" - "timer.h" - "backdoor.h" - "file.h" - "com.h" - -1477294386 c:\work\software\openblt\target\source\armcm0_stm32f0\types.h - -1469431761 c:\work\software\openblt\target\source\assert.h - -1479210119 c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\boot\blt_conf.h - -1469431761 c:\work\software\openblt\target\source\plausibility.h - -1476728168 c:\work\software\openblt\target\source\cpu.h - -1469431761 c:\work\software\openblt\target\source\cop.h - -1469431761 c:\work\software\openblt\target\source\nvm.h - -1469431761 c:\work\software\openblt\target\source\timer.h - -1469431761 c:\work\software\openblt\target\source\backdoor.h - -1469431761 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c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\timer.h - -1479207651 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\led.c - "header.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_adc.c - "stm32f0xx_adc.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_can.c - "stm32f0xx_can.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_cec.c - "stm32f0xx_cec.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_comp.c - "stm32f0xx_comp.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_crc.c - "stm32f0xx_crc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_crs.c - "stm32f0xx_crs.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_dac.c - "stm32f0xx_dac.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_dbgmcu.c - "stm32f0xx_dbgmcu.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_dma.c - "stm32f0xx_dma.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_exti.c - "stm32f0xx_exti.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_flash.c - "stm32f0xx_flash.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_gpio.c - "stm32f0xx_gpio.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_i2c.c - "stm32f0xx_i2c.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_iwdg.c - "stm32f0xx_iwdg.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_misc.c - "stm32f0xx_misc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_pwr.c - "stm32f0xx_pwr.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_rcc.c - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_rtc.c - "stm32f0xx_rtc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_spi.c - "stm32f0xx_spi.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_syscfg.c - "stm32f0xx_syscfg.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_tim.c - "stm32f0xx_tim.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_usart.c - "stm32f0xx_usart.h" - "stm32f0xx_rcc.h" - -1417710867 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\spl\src\stm32f0xx_wwdg.c - "stm32f0xx_wwdg.h" - "stm32f0xx_rcc.h" - -1471419075 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\lib\system_stm32f0xx.c - "stm32f0xx.h" - -1479207524 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\main.c - "header.h" - -1479207898 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\startup_stm32f0xx.s - -1479207534 source:c:\work\software\openblt\target\demo\armcm0_stm32f0_nucleo_f091rc_gcc\prog\timer.c - "header.h" - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.ebp b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.ebp deleted file mode 100644 index 1b087abc..00000000 --- a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.ebp +++ /dev/null @@ -1,307 +0,0 @@ - - - - - - - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.elay b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.elay deleted file mode 100644 index 18668102..00000000 --- a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/ide/stm32f091.elay +++ /dev/null @@ -1,19 +0,0 @@ - - - - - - - - - - - - - - - - - - - diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/lib/newlib/_exit.c b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/lib/newlib/_exit.c new file mode 100644 index 00000000..4ae9532c --- /dev/null +++ b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/lib/newlib/_exit.c @@ -0,0 +1,38 @@ +// ---------------------------------------------------------------------------- + +#include + +// ---------------------------------------------------------------------------- + +// Forward declaration + +void +_exit(int code); + +// ---------------------------------------------------------------------------- + +// We just enter an infinite loop, to be used as landmark when halting +// the debugger. +// +// It can be redefined in the application, if more functionality +// is required. + +void +__attribute__((weak)) +_exit(int code __attribute__((unused))) +{ + // TODO: write on trace + while (1) + ; +} + +// ---------------------------------------------------------------------------- + +void +__attribute__((weak,noreturn)) +abort(void) +{ + _exit(1); +} + +// ---------------------------------------------------------------------------- diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/makefile b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/makefile new file mode 100644 index 00000000..36192857 --- /dev/null +++ b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/makefile @@ -0,0 +1,164 @@ +#**************************************************************************************** +#| Description: Makefile for GNU ARM Embedded toolchain. +#| File Name: makefile +#| +#|--------------------------------------------------------------------------------------- +#| C O P Y R I G H T +#|--------------------------------------------------------------------------------------- +#| Copyright (c) 2017 by Feaser http://www.feaser.com All rights reserved +#| +#|--------------------------------------------------------------------------------------- +#| L I C E N S E +#|--------------------------------------------------------------------------------------- +#| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or +#| modify it under the terms of the GNU General Public License as published by the Free +#| Software Foundation, either version 3 of the License, or (at your option) any later +#| version. +#| +#| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; +#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +#| PURPOSE. See the GNU General Public License for more details. +#| +#| You have received a copy of the GNU General Public License along with OpenBLT. It +#| should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy. +#| +#**************************************************************************************** +SHELL = sh + +#|--------------------------------------------------------------------------------------| +#| Configure project name | +#|--------------------------------------------------------------------------------------| +PROJ_NAME=demoprog_stm32f091 + + +#|--------------------------------------------------------------------------------------| +#| Configure tool path | +#|--------------------------------------------------------------------------------------| +TOOL_PATH=/opt/gcc-arm-none-eabi-5_4-2016q3/bin/ + + +#|--------------------------------------------------------------------------------------| +#| Collect project files | +#|--------------------------------------------------------------------------------------| +# Recursive wildcard function implementation. Example usages: +# $(call rwildcard, , *.c *.h) +# --> Returns all *.c and *.h files in the current directory and below +# $(call rwildcard, /lib/, *.c) +# --> Returns all *.c files in the /lib directory and below +rwildcard = $(strip $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d))) + +# Collect all application files in the current directory and its subdirectories +PROJ_FILES = $(call rwildcard, , *.c *.h *.S) + + +#|--------------------------------------------------------------------------------------| +#| Toolchain binaries | +#|--------------------------------------------------------------------------------------| +RM = rm +CC = $(TOOL_PATH)arm-none-eabi-gcc +LN = $(TOOL_PATH)arm-none-eabi-gcc +OC = $(TOOL_PATH)arm-none-eabi-objcopy +OD = $(TOOL_PATH)arm-none-eabi-objdump +AS = $(TOOL_PATH)arm-none-eabi-gcc +SZ = $(TOOL_PATH)arm-none-eabi-size + + +#|--------------------------------------------------------------------------------------| +#| Filter project files +#|--------------------------------------------------------------------------------------| +PROJ_ASRCS = $(filter %.S,$(foreach file,$(PROJ_FILES),$(notdir $(file)))) +PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file)))) +PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file)))) + + +#|--------------------------------------------------------------------------------------| +#| Set important path variables | +#|--------------------------------------------------------------------------------------| +VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :) +OBJ_PATH = obj +BIN_PATH = bin +INC_PATH = $(patsubst %/,%,$(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file)))))) +LIB_PATH = + + +#|--------------------------------------------------------------------------------------| +#| Options for toolchain binaries | +#|--------------------------------------------------------------------------------------| +HEAP_SIZE = 0x0000 +STACK_SIZE = 0x0100 +STDFLAGS = -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -fno-strict-aliasing +STDFLAGS += -fdata-sections -ffunction-sections -Wall -g3 +OPTFLAGS = -O1 +CFLAGS = $(STDFLAGS) $(OPTFLAGS) +CFLAGS += -DSTM32F091 -DUSE_STDPERIPH_DRIVER +CFLAGS += -D__HEAP_SIZE=$(HEAP_SIZE) -D__STACK_SIZE=$(STACK_SIZE) +CFLAGS += $(INC_PATH) +AFLAGS = $(CFLAGS) +LFLAGS = $(STDFLAGS) $(OPTFLAGS) +LFLAGS += -Wl,--defsym=__HEAP_SIZE=$(HEAP_SIZE) -Wl,--defsym=__STACK_SIZE=$(STACK_SIZE) +LFLAGS += -Wl,-script="stm32f091rc_flash.ld" -Wl,-Map=$(BIN_PATH)/$(PROJ_NAME).map +LFLAGS += -specs=nano.specs -Wl,--gc-sections $(LIB_PATH) +OFLAGS = -O srec +ODFLAGS = -x +SZFLAGS = -B -d +RMFLAGS = -f + + +#|--------------------------------------------------------------------------------------| +#| Specify library files | +#|--------------------------------------------------------------------------------------| +LIBS = + + +#|--------------------------------------------------------------------------------------| +#| Define targets | +#|--------------------------------------------------------------------------------------| +AOBJS = $(patsubst %.S,%.o,$(PROJ_ASRCS)) +COBJS = $(patsubst %.c,%.o,$(PROJ_CSRCS)) + + +#|--------------------------------------------------------------------------------------| +#| Make ALL | +#|--------------------------------------------------------------------------------------| +.PHONY: all +all: $(BIN_PATH)/$(PROJ_NAME).srec + + +$(BIN_PATH)/$(PROJ_NAME).srec : $(BIN_PATH)/$(PROJ_NAME).elf + @$(OC) $< $(OFLAGS) $@ + @$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map + @echo +++ Summary of memory consumption: + @$(SZ) $(SZFLAGS) $< + @echo +++ Build complete [$(notdir $@)] + +$(BIN_PATH)/$(PROJ_NAME).elf : $(AOBJS) $(COBJS) + @echo +++ Linking [$(notdir $@)] + @$(LN) $(LFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)/%.o,$(^F)) $(LIBS) + + +#|--------------------------------------------------------------------------------------| +#| Compile and assemble | +#|--------------------------------------------------------------------------------------| +$(AOBJS): %.o: %.S $(PROJ_CHDRS) + @echo +++ Assembling [$(notdir $<)] + @$(AS) $(AFLAGS) -c $< -o $(OBJ_PATH)/$(@F) + +$(COBJS): %.o: %.c $(PROJ_CHDRS) + @echo +++ Compiling [$(notdir $<)] + @$(CC) $(CFLAGS) -c $< -o $(OBJ_PATH)/$(@F) + + +#|--------------------------------------------------------------------------------------| +#| Make CLEAN | +#|--------------------------------------------------------------------------------------| +.PHONY: clean +clean: + @echo +++ Cleaning build environment + @$(RM) $(RMFLAGS) $(foreach file,$(AOBJS),$(OBJ_PATH)/$(file)) + @$(RM) $(RMFLAGS) $(foreach file,$(COBJS),$(OBJ_PATH)/$(file)) + @$(RM) $(RMFLAGS) $(patsubst %.o,%.lst,$(foreach file,$(COBJS),$(OBJ_PATH)/$(file))) + @$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).elf $(BIN_PATH)/$(PROJ_NAME).map + @$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).srec + @echo +++ Clean complete + + diff --git a/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/cfg/stm32f091rc_flash.ld b/Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/stm32f091rc_flash.ld similarity index 100% rename from Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/cfg/stm32f091rc_flash.ld rename to Target/Demo/ARMCM0_STM32F0_Nucleo_F091RC_GCC/Prog/stm32f091rc_flash.ld