/*
** ###################################################################
**     Processor:           S32K118 with 25 KB SRAM
**     Compiler:            IAR ANSI C/C++ Compiler for ARM
**
**     Abstract:
**         Linker file for the IAR ANSI C/C++ Compiler for ARM
**
**     Copyright 2018 NXP
**     All rights reserved.
**
**     THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
**     IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
**     OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
**     IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
**     INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
**     SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
**     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
**     STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
**     IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
**     THE POSSIBILITY OF SUCH DAMAGE.
**
**     http:                 www.freescale.com
**     mail:                 support@freescale.com
**
** ###################################################################
*/

/* If symbol __flash_vector_table__=1 is defined at link time
 * the interrupt vector will not be copied to RAM.
 * Warning: Using the interrupt vector from FLASH will not allow
 * INT_SYS_InstallHandler because the section is Read Only.
 */
define symbol __ram_vector_table_size__ =  isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000C0;
define symbol __ram_vector_table_offset__ =  isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000000BF;

/* Flash */
define symbol m_interrupts_start       = 0x00002000;
define symbol m_interrupts_end         = 0x000020C3;

define symbol m_flash_config_start     = 0x00002400;
define symbol m_flash_config_end       = 0x0000240F;

define symbol m_text_start             = 0x00002410;
define symbol m_text_end               = 0x0003FFFF;

/* SRAM_L */
define symbol m_custom_start           = 0x1FFFFC00;
define symbol m_custom_end             = 0x1FFFFFFF;

/* SRAM_U */
define symbol m_interrupts_ram_start   = 0x20000000;
define symbol m_interrupts_ram_end     = 0x20000000 + __ram_vector_table_offset__;

define symbol m_data_start             = m_interrupts_ram_start + __ram_vector_table_size__;
define symbol m_data_end               = 0x200030BF;

define symbol m_data_2_start           = 0x200030C0;
define symbol m_data_2_end             = 0x200057FF;

/* Sizes */
if (isdefinedsymbol(__stack_size__)) {
  define symbol __size_cstack__        = __stack_size__;
} else {
  define symbol __size_cstack__        = 0x00000200;
}

if (isdefinedsymbol(__heap_size__)) {
  define symbol __size_heap__          = __heap_size__;
} else {
  define symbol __size_heap__          = 0x00000200;
}

define exported symbol __VECTOR_TABLE          = m_interrupts_start;
define exported symbol __VECTOR_RAM            = isdefinedsymbol(__flash_vector_table__) ? m_interrupts_start : m_interrupts_ram_start;
define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;

define exported symbol __RAM_START             = m_interrupts_ram_start;
define exported symbol __RAM_END               = m_data_2_end;

define memory mem with size = 4G;
define region m_flash_config_region   = mem:[from m_flash_config_start to m_flash_config_end];
define region TEXT_region             = mem:[from m_interrupts_start to m_interrupts_end]
                                      | mem:[from m_text_start to m_text_end];
define region DATA_region             = mem:[from m_data_start to m_data_end];
define region DATA_region_2           = mem:[from m_data_2_start to m_data_2_end-__size_cstack__];
define region CSTACK_region           = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end];
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define region CUSTOM_region           = mem:[from m_custom_start to m_custom_end];


define block CSTACK    with alignment = 8, size = __size_cstack__   { };
define block HEAP      with alignment = 8, size = __size_heap__     { };
define block RW        { readwrite };
define block ZI        { zi };

/* Custom Section Block that can be used to place data at absolute address. */
/* Use __attribute__((section (".customSection"))) to place data here. */
/* Use this section only when MTB (Micro Trace Buffer) is not used, because MTB uses the same RAM area, as described in S32K Reference Manual. */
define block customSectionBlock { section .customSection };

define block __CODE_ROM   { section .textrw_init };
define block __CODE_RAM   { section .textrw  };

initialize manually       { section .textrw };
initialize manually       { section .bss };
initialize manually       { section .customSection };
initialize manually       { section .data };
initialize manually       { section __DLIB_PERTHREAD };
do not initialize         { section .noinit, section .bss, section .data, section __DLIB_PERTHREAD, section .customSection };

place at address mem: m_interrupts_start    { readonly section .intvec };
place in m_flash_config_region              { section FlashConfig };
place in TEXT_region                        { readonly };
place in TEXT_region                        { block __CODE_ROM };
place in DATA_region                        { block RW };
place in DATA_region                        { block __CODE_RAM };
place in CUSTOM_region                      { first block customSectionBlock };
place in DATA_region_2                      { block ZI };
place in DATA_region_2                      { last block HEAP };
place in CSTACK_region                      { block CSTACK };
place in m_interrupts_ram_region            { section m_interrupts_ram };