/************************************************************************************//** * \file Demo\ARMCM3_STM32F1_Nucleo_F103RB_GCC\Prog\main.c * \brief Demo program application source file. * \ingroup Prog_ARMCM3_STM32F1_Nucleo_F103RB_GCC * \internal *---------------------------------------------------------------------------------------- * C O P Y R I G H T *---------------------------------------------------------------------------------------- * Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved * *---------------------------------------------------------------------------------------- * L I C E N S E *---------------------------------------------------------------------------------------- * This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published by the Free * Software Foundation, either version 3 of the License, or (at your option) any later * version. * * OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR * PURPOSE. See the GNU General Public License for more details. * * You have received a copy of the GNU General Public License along with OpenBLT. It * should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy. * * \endinternal ****************************************************************************************/ /**************************************************************************************** * Include files ****************************************************************************************/ #include "header.h" /* generic header */ /**************************************************************************************** * Function prototypes ****************************************************************************************/ static void Init(void); /************************************************************************************//** ** \brief This is the entry point for the bootloader application and is called ** by the reset interrupt vector after the C-startup routines executed. ** \return Program return code. ** ****************************************************************************************/ int main(void) { /* initialize the microcontroller */ Init(); /* initialize the bootloader interface */ BootComInit(); /* start the infinite program loop */ while (1) { /* toggle LED with a fixed frequency */ LedToggle(); /* check for bootloader activation request */ BootComCheckActivationRequest(); } /* program should never get here */ return 0; } /*** end of main ***/ /************************************************************************************//** ** \brief Initializes the microcontroller. ** \return none. ** ****************************************************************************************/ static void Init(void) { volatile unsigned long StartUpCounter = 0, HSEStatus = 0; unsigned long pll_multiplier; /* reset the RCC clock configuration to the default reset state (for debug purpose) */ /* set HSION bit */ RCC->CR |= (unsigned long)0x00000001; /* reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ RCC->CFGR &= (unsigned long)0xF8FF0000; /* reset HSEON, CSSON and PLLON bits */ RCC->CR &= (unsigned long)0xFEF6FFFF; /* reset HSEBYP bit */ RCC->CR &= (unsigned long)0xFFFBFFFF; /* reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= (unsigned long)0xFF80FFFF; /* disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000; /* enable HSE */ RCC->CR |= ((unsigned long)RCC_CR_HSEON); /* wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CR & RCC_CR_HSERDY; StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != 1500)); /* check if time out was reached */ if ((RCC->CR & RCC_CR_HSERDY) == RESET) { /* cannot continue when HSE is not ready */ while (1) { ; } } /* enable flash prefetch buffer */ FLASH->ACR |= FLASH_ACR_PRFTBE; /* reset flash wait state configuration to default 0 wait states */ FLASH->ACR &= (unsigned long)((unsigned long)~FLASH_ACR_LATENCY); #if (BOOT_CPU_SYSTEM_SPEED_KHZ > 48000) /* configure 2 flash wait states */ FLASH->ACR |= (unsigned long)FLASH_ACR_LATENCY_2; #elif (BOOT_CPU_SYSTEM_SPEED_KHZ > 24000) /* configure 1 flash wait states */ FLASH->ACR |= (unsigned long)FLASH_ACR_LATENCY_1; #endif /* HCLK = SYSCLK */ RCC->CFGR |= (unsigned long)RCC_CFGR_HPRE_DIV1; /* PCLK2 = HCLK/2 */ RCC->CFGR |= (unsigned long)RCC_CFGR_PPRE2_DIV2; /* PCLK1 = HCLK/2 */ RCC->CFGR |= (unsigned long)RCC_CFGR_PPRE1_DIV2; /* reset PLL configuration */ RCC->CFGR &= (unsigned long)((unsigned long)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | \ RCC_CFGR_PLLMULL)); /* calculate multiplier value */ pll_multiplier = BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ; /* convert to register value */ pll_multiplier = (unsigned long)((pll_multiplier - 2) << 18); /* set the PLL multiplier and clock source */ RCC->CFGR |= (unsigned long)(RCC_CFGR_PLLSRC_HSE | pll_multiplier); /* enable PLL */ RCC->CR |= RCC_CR_PLLON; /* wait till PLL is ready */ while((RCC->CR & RCC_CR_PLLRDY) == 0) { } /* select PLL as system clock source */ RCC->CFGR &= (unsigned long)((unsigned long)~(RCC_CFGR_SW)); RCC->CFGR |= (unsigned long)RCC_CFGR_SW_PLL; /* wait till PLL is used as system clock source */ while ((RCC->CFGR & (unsigned long)RCC_CFGR_SWS) != (unsigned long)0x08) { } /* init the led driver */ LedInit(); /* init the timer driver */ TimerInit(); } /*** end of Init ***/ /*********************************** end of main.c *************************************/