217 lines
9.4 KiB
C
217 lines
9.4 KiB
C
/************************************************************************************//**
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* \file Demo\ARMCM3_STM32F1_Olimex_STM32P103_TrueStudio\Boot\main.c
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* \brief Bootloader application source file.
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* \ingroup Boot_ARMCM3_STM32F1_Olimex_STM32P103_TrueStudio
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2018 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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*
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* \endinternal
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "boot.h" /* bootloader generic header */
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#include "stm32f10x.h" /* microcontroller registers */
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#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
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#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
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#endif
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/****************************************************************************************
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* Function prototypes
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****************************************************************************************/
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static void Init(void);
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/************************************************************************************//**
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** \brief This is the entry point for the bootloader application and is called
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** by the reset interrupt vector after the C-startup routines executed.
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** \return Program return code.
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**
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****************************************************************************************/
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int main(void)
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{
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/* initialize the microcontroller */
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Init();
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/* initialize the bootloader */
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BootInit();
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/* start the infinite program loop */
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while (1)
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{
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/* run the bootloader task */
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BootTask();
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}
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/* program should never get here */
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return 0;
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} /*** end of main ***/
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/************************************************************************************//**
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** \brief Initializes the microcontroller.
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** \return none.
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**
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****************************************************************************************/
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static void Init(void)
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{
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volatile blt_int32u StartUpCounter = 0, HSEStatus = 0;
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blt_int32u pll_multiplier;
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#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
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GPIO_InitTypeDef GPIO_InitStruct;
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USART_InitTypeDef USART_InitStruct;
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#endif
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/* reset the RCC clock configuration to the default reset state (for debug purpose) */
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/* set HSION bit */
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RCC->CR |= (blt_int32u)0x00000001;
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/* reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
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RCC->CFGR &= (blt_int32u)0xF8FF0000;
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/* reset HSEON, CSSON and PLLON bits */
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RCC->CR &= (blt_int32u)0xFEF6FFFF;
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/* reset HSEBYP bit */
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RCC->CR &= (blt_int32u)0xFFFBFFFF;
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/* reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
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RCC->CFGR &= (blt_int32u)0xFF80FFFF;
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/* disable all interrupts and clear pending bits */
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RCC->CIR = 0x009F0000;
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/* enable HSE */
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RCC->CR |= ((blt_int32u)RCC_CR_HSEON);
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/* wait till HSE is ready and if Time out is reached exit */
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do
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{
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HSEStatus = RCC->CR & RCC_CR_HSERDY;
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StartUpCounter++;
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}
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while((HSEStatus == 0) && (StartUpCounter != 1500));
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/* check if time out was reached */
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if ((RCC->CR & RCC_CR_HSERDY) == RESET)
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{
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/* cannot continue when HSE is not ready */
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ASSERT_RT(BLT_FALSE);
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}
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/* enable flash prefetch buffer */
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FLASH->ACR |= FLASH_ACR_PRFTBE;
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/* reset flash wait state configuration to default 0 wait states */
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FLASH->ACR &= (blt_int32u)((blt_int32u)~FLASH_ACR_LATENCY);
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#if (BOOT_CPU_SYSTEM_SPEED_KHZ > 48000)
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/* configure 2 flash wait states */
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FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_2;
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#elif (BOOT_CPU_SYSTEM_SPEED_KHZ > 24000)
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/* configure 1 flash wait states */
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FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_1;
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#endif
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/* HCLK = SYSCLK */
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RCC->CFGR |= (blt_int32u)RCC_CFGR_HPRE_DIV1;
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/* PCLK2 = HCLK/2 */
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RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE2_DIV2;
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/* PCLK1 = HCLK/2 */
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RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE1_DIV2;
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/* reset PLL configuration */
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RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | \
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RCC_CFGR_PLLMULL));
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/* assert that the pll_multiplier is between 2 and 16 */
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ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) >= 2);
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ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) <= 16);
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/* calculate multiplier value */
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pll_multiplier = BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ;
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/* convert to register value */
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pll_multiplier = (blt_int32u)((pll_multiplier - 2) << 18);
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/* set the PLL multiplier and clock source */
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RCC->CFGR |= (blt_int32u)(RCC_CFGR_PLLSRC_HSE | pll_multiplier);
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/* enable PLL */
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RCC->CR |= RCC_CR_PLLON;
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/* wait till PLL is ready */
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while((RCC->CR & RCC_CR_PLLRDY) == 0)
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{
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}
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/* select PLL as system clock source */
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RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_SW));
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RCC->CFGR |= (blt_int32u)RCC_CFGR_SW_PLL;
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/* wait till PLL is used as system clock source */
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while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
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{
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}
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#if (BOOT_COM_CAN_ENABLE > 0)
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/* enable clocks for CAN transmitter and receiver pins (GPIOB and AFIO) */
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RCC->APB2ENR |= (blt_int32u)(0x00000008 | 0x00000001);
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/* configure CAN Rx (GPIOB8) as alternate function input pull-up */
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/* first reset the configuration */
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GPIOB->CRH &= ~(blt_int32u)((blt_int32u)0xf << 0);
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/* CNF8[1:0] = %10 and MODE8[1:0] = %00 */
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GPIOB->CRH |= (blt_int32u)((blt_int32u)0x8 << 0);
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/* configure CAN Tx (GPIOB9) as alternate function push-pull */
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/* first reset the configuration */
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GPIOB->CRH &= ~(blt_int32u)((blt_int32u)0xf << 4);
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/* CNF9[1:0] = %10 and MODE9[1:0] = %11 */
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GPIOB->CRH |= (blt_int32u)((blt_int32u)0xb << 4);
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/* remap CAN1 pins to PortB */
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AFIO->MAPR &= ~(blt_int32u)((blt_int32u)0x3 << 13);
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AFIO->MAPR |= (blt_int32u)((blt_int32u)0x2 << 13);
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/* enable clocks for CAN controller peripheral */
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RCC->APB1ENR |= (blt_int32u)0x02000000;
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#endif
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#if (BOOT_COM_UART_ENABLE > 0)
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/* enable clock for USART2 peripheral */
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RCC->APB1ENR |= (blt_int32u)0x00020000;
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/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
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RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
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/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
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/* first reset the configuration */
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GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
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/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
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GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
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/* configure USART2 Rx (GPIOA3) as alternate function input floating */
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/* first reset the configuration */
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GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
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/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
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GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
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#elif (BOOT_FILE_LOGGING_ENABLE > 0)
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/* enable UART peripheral clock */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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/* enable GPIO peripheral clock for transmitter and receiver pins */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
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/* configure USART Tx as alternate function push-pull */
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* Configure USART Rx as alternate function input floating */
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_3;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* configure UART communcation parameters */
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USART_InitStruct.USART_BaudRate = BOOT_COM_UART_BAUDRATE;
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USART_InitStruct.USART_WordLength = USART_WordLength_8b;
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USART_InitStruct.USART_StopBits = USART_StopBits_1;
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USART_InitStruct.USART_Parity = USART_Parity_No;
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USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(USART2, &USART_InitStruct);
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/* enable UART */
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USART_Cmd(USART2, ENABLE);
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#endif
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} /*** end of Init ***/
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/*********************************** end of main.c *************************************/
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