436 lines
18 KiB
C
436 lines
18 KiB
C
/**
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******************************************************************************
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* @file stm32f0xx_flash.h
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* @author MCD Application Team
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* @version V1.5.0
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* @date 05-December-2014
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* @brief This file contains all the functions prototypes for the FLASH
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* firmware library.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F0XX_FLASH_H
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#define __STM32F0XX_FLASH_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx.h"
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/** @addtogroup STM32F0xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup FLASH
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief FLASH Status
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*/
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typedef enum
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{
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FLASH_BUSY = 1,
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FLASH_ERROR_WRP,
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FLASH_ERROR_PROGRAM,
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FLASH_COMPLETE,
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FLASH_TIMEOUT
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}FLASH_Status;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup FLASH_Exported_Constants
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* @{
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*/
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/** @defgroup FLASH_Latency
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* @{
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*/
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#define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */
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#define FLASH_Latency_1 FLASH_ACR_LATENCY /*!< FLASH One Latency cycle */
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#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
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((LATENCY) == FLASH_Latency_1))
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/**
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* @}
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*/
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/** @defgroup FLASH_Interrupts
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* @{
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*/
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#define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of programming interrupt source */
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#define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error interrupt source */
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#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
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/**
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* @}
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*/
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/** @defgroup FLASH_Address
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* @{
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*/
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#if defined(STM32F042) || defined(STM32F031) || defined(STM32F070x6) /*32K devices */
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x08007FFF))
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#elif defined(STM32F030) || defined(STM32F051) /*64K devices */
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0800FFFF))
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#elif defined(STM32F072) || defined(STM32F070xB) /*128K devices */
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF))
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#else /* STM32F091 || STM32F030 || STM32F030xC */ /*256K Flash devices */
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#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0800FFFF))
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#endif /* STM32F042 || STM32F031 || STM32F070x6 */
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/**
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* @}
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*/
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/** @defgroup FLASH_OB_DATA_ADDRESS
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* @{
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*/
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#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_Write_Protection
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* @{
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*/
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#if !defined (STM32F072) && !defined (STM32F070xB) && !defined (STM32F091) && !defined (STM32F030) && !defined (STM32F030xC) /* 32K and 64K Flash devices */
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#define OB_WRP_Pages0to3 ((uint32_t)0x00000001) /* Write protection of page 0 to 3 */
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#define OB_WRP_Pages4to7 ((uint32_t)0x00000002) /* Write protection of page 4 to 7 */
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#define OB_WRP_Pages8to11 ((uint32_t)0x00000004) /* Write protection of page 8 to 11 */
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#define OB_WRP_Pages12to15 ((uint32_t)0x00000008) /* Write protection of page 12 to 15 */
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#define OB_WRP_Pages16to19 ((uint32_t)0x00000010) /* Write protection of page 16 to 19 */
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#define OB_WRP_Pages20to23 ((uint32_t)0x00000020) /* Write protection of page 20 to 23 */
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#define OB_WRP_Pages24to27 ((uint32_t)0x00000040) /* Write protection of page 24 to 27 */
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#define OB_WRP_Pages28to31 ((uint32_t)0x00000080) /* Write protection of page 28 to 31 */
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#define OB_WRP_Pages32to35 ((uint32_t)0x00000100) /* Write protection of page 32 to 35 */
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#define OB_WRP_Pages36to39 ((uint32_t)0x00000200) /* Write protection of page 36 to 39 */
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#define OB_WRP_Pages40to43 ((uint32_t)0x00000400) /* Write protection of page 40 to 43 */
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#define OB_WRP_Pages44to47 ((uint32_t)0x00000800) /* Write protection of page 44 to 47 */
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#define OB_WRP_Pages48to51 ((uint32_t)0x00001000) /* Write protection of page 48 to 51 */
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#define OB_WRP_Pages52to55 ((uint32_t)0x00002000) /* Write protection of page 52 to 55 */
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#define OB_WRP_Pages56to59 ((uint32_t)0x00004000) /* Write protection of page 56 to 59 */
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#define OB_WRP_Pages60to63 ((uint32_t)0x00008000) /* Write protection of page 60 to 63 */
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#define OB_WRP_AllPages ((uint32_t)0x0000FFFF) /*!< Write protection of all Sectors */
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#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
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#else /* 128K and 256K Flash devices */
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#define OB_WRP_Pages0to1 ((uint32_t)0x00000001) /* Write protection of page 0 to 1 */
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#define OB_WRP_Pages2to3 ((uint32_t)0x00000002) /* Write protection of page 2 to 3 */
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#define OB_WRP_Pages4to5 ((uint32_t)0x00000004) /* Write protection of page 4 to 5 */
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#define OB_WRP_Pages6to7 ((uint32_t)0x00000008) /* Write protection of page 6 to 7 */
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#define OB_WRP_Pages8to9 ((uint32_t)0x00000010) /* Write protection of page 8 to 9 */
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#define OB_WRP_Pages10to11 ((uint32_t)0x00000020) /* Write protection of page 10 to 11 */
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#define OB_WRP_Pages12to13 ((uint32_t)0x00000040) /* Write protection of page 12 to 13 */
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#define OB_WRP_Pages14to15 ((uint32_t)0x00000080) /* Write protection of page 14 to 15 */
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#define OB_WRP_Pages16to17 ((uint32_t)0x00000100) /* Write protection of page 16 to 17 */
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#define OB_WRP_Pages18to19 ((uint32_t)0x00000200) /* Write protection of page 18 to 19 */
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#define OB_WRP_Pages20to21 ((uint32_t)0x00000400) /* Write protection of page 20 to 21 */
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#define OB_WRP_Pages22to23 ((uint32_t)0x00000800) /* Write protection of page 22 to 23 */
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#define OB_WRP_Pages24to25 ((uint32_t)0x00001000) /* Write protection of page 24 to 25 */
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#define OB_WRP_Pages26to27 ((uint32_t)0x00002000) /* Write protection of page 26 to 27 */
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#define OB_WRP_Pages28to29 ((uint32_t)0x00004000) /* Write protection of page 28 to 29 */
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#define OB_WRP_Pages30to31 ((uint32_t)0x00008000) /* Write protection of page 30 to 31 */
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#define OB_WRP_Pages32to33 ((uint32_t)0x00010000) /* Write protection of page 32 to 33 */
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#define OB_WRP_Pages34to35 ((uint32_t)0x00020000) /* Write protection of page 34 to 35 */
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#define OB_WRP_Pages36to37 ((uint32_t)0x00040000) /* Write protection of page 36 to 37 */
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#define OB_WRP_Pages38to39 ((uint32_t)0x00080000) /* Write protection of page 38 to 39 */
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#define OB_WRP_Pages40to41 ((uint32_t)0x00100000) /* Write protection of page 40 to 41 */
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#define OB_WRP_Pages42to43 ((uint32_t)0x00200000) /* Write protection of page 42 to 43 */
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#define OB_WRP_Pages44to45 ((uint32_t)0x00400000) /* Write protection of page 44 to 45 */
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#define OB_WRP_Pages46to47 ((uint32_t)0x00800000) /* Write protection of page 46 to 47 */
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#define OB_WRP_Pages48to49 ((uint32_t)0x01000000) /* Write protection of page 48 to 49 */
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#define OB_WRP_Pages50to51 ((uint32_t)0x02000000) /* Write protection of page 50 to 51 */
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#define OB_WRP_Pages52to53 ((uint32_t)0x04000000) /* Write protection of page 52 to 53 */
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#define OB_WRP_Pages54to55 ((uint32_t)0x08000000) /* Write protection of page 54 to 55 */
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#define OB_WRP_Pages56to57 ((uint32_t)0x10000000) /* Write protection of page 56 to 57 */
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#define OB_WRP_Pages58to59 ((uint32_t)0x20000000) /* Write protection of page 58 to 59 */
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#define OB_WRP_Pages60to61 ((uint32_t)0x40000000) /* Write protection of page 60 to 61 */
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#if defined(STM32F091) || defined(STM32F030xC) /* 256K Flash devices */
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#define OB_WRP_Pages62to127 ((uint32_t)0x80000000) /* Write protection of page 62 to 127 */
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#else /* 128K Flash devices */
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#define OB_WRP_Pages62to63 ((uint32_t)0x80000000) /* Write protection of page 62 to 63 */
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#endif /* STM32F091 || STM32F030xC */
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#define OB_WRP_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
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#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
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#endif /* STM32F072 || STM32F070xB || STM32F091 || STM32F030 || STM32F030xC */
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_Read_Protection
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* @{
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*/
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/**
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* @brief FLASH_Read Protection Level
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*/
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#define OB_RDP_Level_0 ((uint8_t)0xAA)
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#define OB_RDP_Level_1 ((uint8_t)0xBB)
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/*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /* Warning: When enabling read protection level 2
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it's no more possible to go back to level 1 or 0 */
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#define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
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((LEVEL) == OB_RDP_Level_1))/*||\
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((LEVEL) == OB_RDP_Level_2))*/
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_IWatchdog
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* @{
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*/
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#define OB_IWDG_SW ((uint8_t)0x01) /*!< Software IWDG selected */
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#define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
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#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_nRST_STOP
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* @{
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*/
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#define OB_STOP_NoRST ((uint8_t)0x02) /*!< No reset generated when entering in STOP */
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#define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
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#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_nRST_STDBY
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* @{
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*/
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#define OB_STDBY_NoRST ((uint8_t)0x04) /*!< No reset generated when entering in STANDBY */
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#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
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#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_BOOT1
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* @{
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*/
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#define OB_BOOT1_RESET ((uint8_t)0x00) /*!< BOOT1 Reset */
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#define OB_BOOT1_SET ((uint8_t)0x10) /*!< BOOT1 Set */
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#define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_BOOT0
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* @{
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*/
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#define OB_BOOT0_RESET ((uint8_t)0x00) /*!< BOOT0 Reset */
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#define OB_BOOT0_SET ((uint8_t)0x08) /*!< BOOT0 Set */
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#define IS_OB_BOOT0(BOOT0) (((BOOT0) == OB_BOOT0_RESET) || ((BOOT0) == OB_BOOT0_SET))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_BOOT0SW
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* @{
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*/
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#define OB_BOOT0_SW ((uint8_t)0x00) /*!< BOOT0 pin disabled */
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#define OB_BOOT0_HW ((uint8_t)0x80) /*!< BOOT0 pin bonded with GPIO */
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#define IS_OB_BOOT0SW(BOOT0) (((BOOT0) == OB_BOOT0_SW) || ((BOOT0) == OB_BOOT0_HW))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_VDDA_Analog_Monitoring
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* @{
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*/
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#define OB_VDDA_ANALOG_ON ((uint8_t)0x20) /*!< Analog monitoring on VDDA Power source ON */
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#define OB_VDDA_ANALOG_OFF ((uint8_t)0x00) /*!< Analog monitoring on VDDA Power source OFF */
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#define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_SRAM_Parity_Enable
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* @{
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*/
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#define OB_SRAM_PARITY_SET ((uint8_t)0x00) /*!< SRAM parity enable Set */
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#define OB_SRAM_PARITY_RESET ((uint8_t)0x40) /*!< SRAM parity enable reset */
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#define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_SRAM_PARITY_SET) || ((PARITY) == OB_SRAM_PARITY_RESET))
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/**
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* @}
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*/
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/** @defgroup FLASH_Flags
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* @{
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*/
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#define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
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#define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */
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#define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */
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#define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Programming flag */
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#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCB) == 0x00000000) && ((FLAG) != 0x00000000))
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#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_PGERR) || \
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((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_EOP))
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/**
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* @}
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*/
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/** @defgroup FLASH_Timeout_definition
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* @{
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*/
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#define FLASH_ER_PRG_TIMEOUT ((uint32_t)0x000B0000)
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/**
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* @}
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*/
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/** @defgroup FLASH_Legacy
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* @{
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*/
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#define FLASH_WRProt_Pages0to3 OB_WRP_Pages0to3
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#define FLASH_WRProt_Pages4to7 OB_WRP_Pages4to7
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#define FLASH_WRProt_Pages8to11 OB_WRP_Pages8to11
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#define FLASH_WRProt_Pages12to15 OB_WRP_Pages12to15
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#define FLASH_WRProt_Pages16to19 OB_WRP_Pages16to19
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#define FLASH_WRProt_Pages20to23 OB_WRP_Pages20to23
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#define FLASH_WRProt_Pages24to27 OB_WRP_Pages24to27
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#define FLASH_WRProt_Pages28to31 OB_WRP_Pages28to31
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#define FLASH_WRProt_Pages32to35 OB_WRP_Pages32to35
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#define FLASH_WRProt_Pages36to39 OB_WRP_Pages36to39
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#define FLASH_WRProt_Pages40to43 OB_WRP_Pages40to21
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#define FLASH_WRProt_Pages44to47 OB_WRP_Pages44to23
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#define FLASH_WRProt_Pages48to51 OB_WRP_Pages48to51
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#define FLASH_WRProt_Pages52to55 OB_WRP_Pages52to55
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#define FLASH_WRProt_Pages56to59 OB_WRP_Pages56to59
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#define FLASH_WRProt_Pages60to63 OB_WRP_Pages60to63
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#define FLASH_WRProt_AllPages OB_WRP_AllPages
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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/**
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* @brief FLASH memory functions that can be executed from FLASH.
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*/
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/* FLASH Interface configuration functions ************************************/
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void FLASH_SetLatency(uint32_t FLASH_Latency);
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void FLASH_PrefetchBufferCmd(FunctionalState NewState);
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FlagStatus FLASH_GetPrefetchBufferStatus(void);
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/* FLASH Memory Programming functions *****************************************/
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void FLASH_Unlock(void);
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void FLASH_Lock(void);
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FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
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FLASH_Status FLASH_EraseAllPages(void);
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FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
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FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
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/* FLASH Option Bytes Programming functions *****************************************/
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void FLASH_OB_Unlock(void);
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void FLASH_OB_Lock(void);
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void FLASH_OB_Launch(void);
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FLASH_Status FLASH_OB_Erase(void);
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FLASH_Status FLASH_OB_EnableWRP(uint32_t OB_WRP);
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FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP);
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FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
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FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1);
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FLASH_Status FLASH_OB_BOOT0Config(uint8_t OB_BOOT0);
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FLASH_Status FLASH_OB_BOOT0SWConfig(uint8_t OB_BOOT0SW);
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FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG);
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FLASH_Status FLASH_OB_SRAMParityConfig(uint8_t OB_SRAM_Parity);
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FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER);
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FLASH_Status FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
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uint8_t FLASH_OB_GetUser(void);
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uint32_t FLASH_OB_GetWRP(void);
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FlagStatus FLASH_OB_GetRDP(void);
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/* FLASH Interrupts and flags management functions **********************************/
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void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
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FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
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void FLASH_ClearFlag(uint32_t FLASH_FLAG);
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FLASH_Status FLASH_GetStatus(void);
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FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
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/** @defgroup FLASH_Legacy
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* @{
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*/
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#define FLASH_EraseOptionBytes FLASH_OB_Erase
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#define FLASH_EnableWriteProtection FLASH_OB_EnableWRP
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#define FLASH_UserOptionByteConfig FLASH_OB_UserConfig
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#define FLASH_ProgramOptionByteData FLASH_OB_ProgramData
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#define FLASH_GetUserOptionByte FLASH_OB_GetUser
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#define FLASH_GetWriteProtectionOptionByte FLASH_OB_GetWRP
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F0XX_FLASH_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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