245 lines
9.8 KiB
ArmAsm
245 lines
9.8 KiB
ArmAsm
/* File: startup_ARMCM0.S
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* Purpose: startup file for Cortex-M0 devices. Should use with
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* GCC for ARM Embedded Processors
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* Version: V1.3
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* Date: 08 Feb 2012
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*
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* Copyright (c) 2012, ARM Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the ARM Limited nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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.syntax unified
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.arch armv6-m
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0x400
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0xC00
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.if Heap_Size
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.space Heap_Size
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.endif
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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// External Interrupts
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.long WWDG_IRQHandler // Window Watchdog
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.long PVD_IRQHandler // PVD through EXTI Line detect
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.long RTC_IRQHandler // RTC through EXTI Line
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.long FLASH_IRQHandler // FLASH
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.long RCC_IRQHandler // RCC
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.long EXTI0_1_IRQHandler // EXTI Line 0 and 1
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.long EXTI2_3_IRQHandler // EXTI Line 2 and 3
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.long EXTI4_15_IRQHandler // EXTI Line 4 to 15
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.long TS_IRQHandler // TS
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.long DMA1_Channel1_IRQHandler // DMA1 Channel 1
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.long DMA1_Channel2_3_IRQHandler // DMA1 Channel 2 and Channel 3
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.long DMA1_Channel4_5_IRQHandler // DMA1 Channel 4 and Channel 5
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.long ADC1_COMP_IRQHandler // ADC1, COMP1 and COMP2
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.long TIM1_BRK_UP_TRG_COM_IRQHandler // TIM1 Break, Update, Trigger and Commutation
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.long TIM1_CC_IRQHandler // TIM1 Capture Compare
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.long TIM2_IRQHandler // TIM2
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.long TIM3_IRQHandler // TIM3
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.long TIM6_DAC_IRQHandler // TIM6 and DAC
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.long TIM7_IRQHandler // Not all devices!!
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.long TIM14_IRQHandler // TIM14
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.long TIM15_IRQHandler // TIM15
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.long TIM16_IRQHandler // TIM16
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.long TIM17_IRQHandler // TIM17
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.long I2C1_IRQHandler // I2C1
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.long I2C2_IRQHandler // I2C2
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.long SPI1_IRQHandler // SPI1
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.long SPI2_IRQHandler // SPI2
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.long USART1_IRQHandler // USART1
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.long USART2_IRQHandler // USART2
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.long USART3_4_IRQHandler // Not all devices!!
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.long CEC_IRQHandler // CEC
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.long USB_IRQHandler // Not all devices!!
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* __etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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subs r3, r2
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ble .flash_to_ram_loop_end
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movs r4, 0
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.flash_to_ram_loop:
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ldr r0, [r1,r4]
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str r0, [r2,r4]
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adds r4, 4
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cmp r4, r3
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blt .flash_to_ram_loop
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.flash_to_ram_loop_end:
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#ifndef __NO_SYSTEM_INIT
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ldr r0, =SystemInit
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blx r0
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#endif
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ldr r0, =_start
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bx r0
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.pool
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.size Reset_Handler, . - Reset_Handler
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/* Our weak _start alternative if we don't use the library _start
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* The zero init section must be cleared, otherwise the librtary is
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* doing that */
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.align 1
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.thumb_func
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.weak _start
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.type _start, %function
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_start:
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/* Zero fill the bss segment. */
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ldr r1, = __bss_start__
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ldr r2, = __bss_end__
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movs r3, #0
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b .fill_zero_bss
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.loop_zero_bss:
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str r3, [r1]
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adds r1, 4
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.fill_zero_bss:
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cmp r1, r2
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bcc .loop_zero_bss
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/* Jump to our main */
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bl main
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b .
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.size _start, . - _start
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.align 1
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.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
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def_irq_handler NMI_Handler
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def_irq_handler HardFault_Handler
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def_irq_handler SVC_Handler
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def_irq_handler PendSV_Handler
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def_irq_handler SysTick_Handler
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def_irq_handler Default_Handler
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// External Interrupts
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def_irq_handler WWDG_IRQHandler // Window Watchdog
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def_irq_handler PVD_IRQHandler // PVD through EXTI Line detect
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def_irq_handler RTC_IRQHandler // RTC through EXTI Line
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def_irq_handler FLASH_IRQHandler // FLASH
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def_irq_handler RCC_IRQHandler // RCC
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def_irq_handler EXTI0_1_IRQHandler // EXTI Line 0 and 1
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def_irq_handler EXTI2_3_IRQHandler // EXTI Line 2 and 3
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def_irq_handler EXTI4_15_IRQHandler // EXTI Line 4 to 15
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def_irq_handler TS_IRQHandler // TS
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def_irq_handler DMA1_Channel1_IRQHandler // DMA1 Channel 1
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def_irq_handler DMA1_Channel2_3_IRQHandler // DMA1 Channel 2 and Channel 3
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def_irq_handler DMA1_Channel4_5_IRQHandler // DMA1 Channel 4 and Channel 5
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def_irq_handler ADC1_COMP_IRQHandler // ADC1, COMP1 and COMP2
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def_irq_handler TIM1_BRK_UP_TRG_COM_IRQHandler // TIM1 Break, Update, Trigger and Commutation
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def_irq_handler TIM1_CC_IRQHandler // TIM1 Capture Compare
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def_irq_handler TIM2_IRQHandler // TIM2
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def_irq_handler TIM3_IRQHandler // TIM3
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def_irq_handler TIM6_DAC_IRQHandler // TIM6 and DAC
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def_irq_handler TIM7_IRQHandler // Not all devices!!
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def_irq_handler TIM14_IRQHandler // TIM14
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def_irq_handler TIM15_IRQHandler // TIM15
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def_irq_handler TIM16_IRQHandler // TIM16
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def_irq_handler TIM17_IRQHandler // TIM17
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def_irq_handler I2C1_IRQHandler // I2C1
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def_irq_handler I2C2_IRQHandler // I2C2
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def_irq_handler SPI1_IRQHandler // SPI1
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def_irq_handler SPI2_IRQHandler // SPI2
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def_irq_handler USART1_IRQHandler // USART1
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def_irq_handler USART2_IRQHandler // USART2
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def_irq_handler USART3_4_IRQHandler // Not all devices!!
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def_irq_handler CEC_IRQHandler // CEC
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def_irq_handler USB_IRQHandler // Not all devices!!
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.end
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