178 lines
7.9 KiB
Plaintext
178 lines
7.9 KiB
Plaintext
|
|
bin/openbtl_olimex_lpc_l2294_20mhz.elf: file format elf32-littlearm
|
|
bin/openbtl_olimex_lpc_l2294_20mhz.elf
|
|
architecture: arm, flags 0x00000112:
|
|
EXEC_P, HAS_SYMS, D_PAGED
|
|
start address 0x00000000
|
|
|
|
Program Header:
|
|
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
|
|
filesz 0x000013d8 memsz 0x000013d8 flags r-x
|
|
LOAD off 0x00010200 vaddr 0x40000200 paddr 0x000013d8 align 2**15
|
|
filesz 0x00000000 memsz 0x000004f4 flags rw-
|
|
private flags = 5000000: [Version5 EABI]
|
|
|
|
Sections:
|
|
Idx Name Size VMA LMA File off Algn
|
|
0 .text 000013d8 00000000 00000000 00008000 2**2
|
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
|
1 .bss 000004f4 40000200 000013d8 00010200 2**2
|
|
ALLOC
|
|
2 .ARM.attributes 00000030 00000000 00000000 000093d8 2**0
|
|
CONTENTS, READONLY
|
|
3 .comment 0000002a 00000000 00000000 00009408 2**0
|
|
CONTENTS, READONLY
|
|
4 .debug_abbrev 00000aa1 00000000 00000000 00009432 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
5 .debug_info 000017a7 00000000 00000000 00009ed3 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
6 .debug_line 0000088b 00000000 00000000 0000b67a 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
7 .debug_pubtypes 00000324 00000000 00000000 0000bf05 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
8 .debug_str 00000905 00000000 00000000 0000c229 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
9 .debug_loc 00000bed 00000000 00000000 0000cb2e 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
10 .debug_pubnames 000003af 00000000 00000000 0000d71b 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
11 .debug_aranges 000001a0 00000000 00000000 0000daca 2**0
|
|
CONTENTS, READONLY, DEBUGGING
|
|
12 .debug_frame 0000062c 00000000 00000000 0000dc6c 2**2
|
|
CONTENTS, READONLY, DEBUGGING
|
|
SYMBOL TABLE:
|
|
00000000 l d .text 00000000 .text
|
|
40000200 l d .bss 00000000 .bss
|
|
00000000 l d .ARM.attributes 00000000 .ARM.attributes
|
|
00000000 l d .comment 00000000 .comment
|
|
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
|
00000000 l d .debug_info 00000000 .debug_info
|
|
00000000 l d .debug_line 00000000 .debug_line
|
|
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
|
|
00000000 l d .debug_str 00000000 .debug_str
|
|
00000000 l d .debug_loc 00000000 .debug_loc
|
|
00000000 l d .debug_pubnames 00000000 .debug_pubnames
|
|
00000000 l d .debug_aranges 00000000 .debug_aranges
|
|
00000000 l d .debug_frame 00000000 .debug_frame
|
|
00000004 l *ABS* 00000000 UND_STACK_SIZE
|
|
00000004 l *ABS* 00000000 ABT_STACK_SIZE
|
|
00000004 l *ABS* 00000000 FIQ_STACK_SIZE
|
|
00000004 l *ABS* 00000000 IRQ_STACK_SIZE
|
|
00000004 l *ABS* 00000000 SVC_STACK_SIZE
|
|
00000010 l *ABS* 00000000 MODE_USR
|
|
00000011 l *ABS* 00000000 MODE_FIQ
|
|
00000012 l *ABS* 00000000 MODE_IRQ
|
|
00000013 l *ABS* 00000000 MODE_SVC
|
|
00000017 l *ABS* 00000000 MODE_ABT
|
|
0000001b l *ABS* 00000000 MODE_UND
|
|
0000001f l *ABS* 00000000 MODE_SYS
|
|
00000080 l *ABS* 00000000 I_BIT
|
|
00000040 l *ABS* 00000000 F_BIT
|
|
e01fc040 l *ABS* 00000000 MEMMAP
|
|
00000000 l .text 00000000 _vectors
|
|
00000020 l .text 00000000 Reset_Addr
|
|
00000024 l .text 00000000 Undef_Addr
|
|
00000028 l .text 00000000 SWI_Addr
|
|
0000002c l .text 00000000 PAbt_Addr
|
|
00000030 l .text 00000000 DAbt_Addr
|
|
00000038 l .text 00000000 IRQ_Addr
|
|
00000034 l .text 00000000 FIQ_Addr
|
|
000000a0 l .text 00000000 Reset_Handler_SWI
|
|
00000000 l df *ABS* 00000000 hooks.c
|
|
00000000 l df *ABS* 00000000 main.c
|
|
000012b4 l O .text 00000004 pll_dividers.1366
|
|
00000000 l df *ABS* 00000000 extflash.c
|
|
00000000 l df *ABS* 00000000 boot.c
|
|
00000000 l df *ABS* 00000000 com.c
|
|
40000200 l O .bss 00000001 comEntryStateConnect
|
|
40000204 l O .bss 00000040 xcpCtoReqPacket.1371
|
|
00000000 l df *ABS* 00000000 xcp.c
|
|
0000032c l F .text 00000014 XcpProtectResources
|
|
00000340 l F .text 00000020 XcpSetCtoError
|
|
000012b8 l O .text 00000008 xcpStationId
|
|
40000244 l O .bss 0000004c xcpInfo
|
|
00000000 l df *ABS* 00000000 backdoor.c
|
|
40000290 l O .bss 00000001 backdoorOpen
|
|
00000000 l df *ABS* 00000000 cop.c
|
|
00000000 l df *ABS* 00000000 assert.c
|
|
40000294 l O .bss 00000004 assert_failure_file
|
|
40000298 l O .bss 00000004 assert_failure_line
|
|
00000000 l df *ABS* 00000000 cpu.c
|
|
00000000 l df *ABS* 00000000 can.c
|
|
00000000 l df *ABS* 00000000 uart.c
|
|
000009a8 l F .text 00000028 UartReceiveByte
|
|
000009d0 l F .text 00000054 UartTransmitByte
|
|
4000029c l O .bss 00000001 xcpCtoRxInProgress.1383
|
|
400002a0 l O .bss 00000041 xcpCtoReqPacket.1381
|
|
400002e1 l O .bss 00000001 xcpCtoRxLength.1382
|
|
00000000 l df *ABS* 00000000 nvm.c
|
|
00000000 l df *ABS* 00000000 timer.c
|
|
400002e4 l O .bss 00000004 millisecond_counter
|
|
400002e8 l O .bss 00000004 free_running_counter_last
|
|
00000000 l df *ABS* 00000000 flash.c
|
|
00000cb4 l F .text 0000006c FlashGetSector
|
|
00000d20 l F .text 00000110 FlashWriteBlock
|
|
00000e30 l F .text 00000038 FlashInitBlock
|
|
00000e68 l F .text 00000068 FlashSwitchBlock
|
|
00000ed0 l F .text 000000dc FlashAddToBlock
|
|
000012c0 l O .text 000000c0 flashLayout
|
|
400002ec l O .bss 00000204 blockInfo
|
|
400004f0 l O .bss 00000204 bootBlockInfo
|
|
00000000 l df *ABS* 00000000 vectors.c
|
|
00000278 g F .text 00000044 ComInit
|
|
00000fc4 g F .text 0000006c FlashWrite
|
|
00000900 g F .text 0000001c AssertFailure
|
|
00001280 g F .text 0000001c IRQ_ISR
|
|
00000c14 g F .text 0000002c TimerUpdate
|
|
000003a0 g F .text 00000014 XcpPacketTransmitted
|
|
000002bc g F .text 00000024 ComTask
|
|
000002f8 g F .text 00000014 ComSetConnectEntryState
|
|
00000244 g F .text 0000001c BootInit
|
|
000008d4 g F .text 00000024 BackDoorInit
|
|
000008fc g F .text 00000004 CopService
|
|
000013d8 g .text 00000000 _etext
|
|
00000bf4 g F .text 00000020 TimerReset
|
|
00000260 g F .text 00000018 BootTask
|
|
00001190 g F .text 00000078 FlashWriteChecksum
|
|
40000200 g .bss 00000000 _bss_start
|
|
000002e0 g F .text 00000018 ComTransmitPacket
|
|
00000000 g .text 00000000 _startup
|
|
00000388 g F .text 00000018 XcpIsConnected
|
|
00000b98 g F .text 00000010 NvmInit
|
|
00000fac g F .text 00000018 FlashInit
|
|
400006f4 g *ABS* 00000000 _bss_end
|
|
00000050 g .text 00000000 Reset_Handler
|
|
00000a24 g F .text 00000040 UartInit
|
|
00000bb8 g F .text 00000010 NvmErase
|
|
000003b4 g F .text 000004d4 XcpPacketReceived
|
|
00001208 g F .text 0000005c FlashDone
|
|
00000040 g .text 00000000 EntryFromProg
|
|
0000030c g F .text 00000010 ComIsConnectEntryState
|
|
00000360 g F .text 00000028 XcpInit
|
|
00001030 g F .text 00000118 FlashErase
|
|
00000148 g F .text 000000fc main
|
|
00000bd8 g F .text 0000001c NvmDone
|
|
00000a64 g F .text 00000084 UartTransmitPacket
|
|
00000bc8 g F .text 00000010 NvmVerifyChecksum
|
|
0000091c g F .text 00000038 CpuMemCopy
|
|
40001edc g *ABS* 00000000 _stack_end
|
|
00000c40 g F .text 00000010 TimerSet
|
|
00001264 g F .text 0000001c FIQ_ISR
|
|
00000ae8 g F .text 000000b0 UartReceivePacket
|
|
40000200 g .text 00000000 _data
|
|
000008f8 g F .text 00000004 CopInit
|
|
00000998 g F .text 00000010 CpuReset
|
|
000000f4 g .text 00000000 SetupRAM
|
|
00000ba8 g F .text 00000010 NvmWrite
|
|
00000954 g F .text 00000044 CpuStartUserProgram
|
|
00001148 g F .text 00000048 FlashVerifyChecksum
|
|
40000200 g .text 00000000 _edata
|
|
400006f4 g *ABS* 00000000 _end
|
|
0000129c g F .text 00000018 UNDEF_ISR
|
|
0000031c g F .text 00000010 ComIsConnected
|
|
00000888 g F .text 0000004c BackDoorCheck
|
|
00000c98 g F .text 0000001c TimerGet
|
|
00000c50 g F .text 00000048 TimerInit
|
|
|
|
|